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[linux-3.10.git] / drivers / watchdog / max77620_wdt.c
1 /*
2  * Watchdog timer for Max77620 PMIC.
3  *
4  * Copyright (c) 2014-2016, NVIDIA Corporation. All rights reserved.
5  *
6  * Author: Chaitanya Bandi <bandik@nvidia.com>
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation version 2.
11  *
12  * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
13  * whether express or implied; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
20  * 02111-1307, USA
21  */
22
23 #include <linux/alarmtimer.h>
24 #include <linux/device.h>
25 #include <linux/err.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
28 #include <linux/irq.h>
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/mfd/max77620.h>
32 #include <linux/platform_device.h>
33 #include <linux/pm.h>
34 #include <linux/rtc.h>
35 #include <linux/slab.h>
36 #include <linux/watchdog.h>
37 #include <linux/workqueue.h>
38
39 static bool nowayout = WATCHDOG_NOWAYOUT;
40
41 struct max77620_wdt {
42         struct watchdog_device          wdt_dev;
43         struct device                   *dev;
44         struct max77620_chip            *chip;
45         struct rtc_device               *rtc;
46
47         int                             boot_timeout;
48         int                             org_boot_timeout;
49         int                             clear_time;
50         bool                            otp_wdtt;
51         bool                            otp_wdten;
52         bool                            enable_on_off;
53         bool                            wdt_suspend_enable;
54         int                             suspend_timeout;
55         int                             org_suspend_timeout;
56         int                             current_timeout;
57         int                             resume_timeout;
58         struct delayed_work             clear_wdt_wq;
59 };
60
61 static int max77620_wdt_start(struct watchdog_device *wdt_dev)
62 {
63         struct max77620_wdt *wdt = watchdog_get_drvdata(wdt_dev);
64         int ret;
65
66         ret = max77620_reg_update(wdt->chip->dev, MAX77620_PWR_SLAVE,
67                         MAX77620_REG_CNFGGLBL2, MAX77620_WDTEN, MAX77620_WDTEN);
68         if (ret < 0) {
69                 dev_err(wdt->dev, "wdt enable failed %d\n", ret);
70                 return ret;
71         }
72
73         return 0;
74 }
75
76 static int max77620_wdt_stop(struct watchdog_device *wdt_dev)
77 {
78         struct max77620_wdt *wdt = watchdog_get_drvdata(wdt_dev);
79         int ret;
80
81         if (wdt->otp_wdten == 0) {
82                 ret = max77620_reg_update(wdt->chip->dev, MAX77620_PWR_SLAVE,
83                         MAX77620_REG_CNFGGLBL2, MAX77620_WDTEN, 0);
84                 if (ret < 0) {
85                         dev_err(wdt->dev, "clear wdten failed %d\n", ret);
86                         return ret;
87                 }
88         } else {
89                 dev_err(wdt->dev, "Can't stop WDTEN as OTP_WDTEN=1\n");
90                 return -EPERM;
91         }
92         return 0;
93 }
94
95 static int max77620_wdt_ping(struct watchdog_device *wdt_dev)
96 {
97         struct max77620_wdt *wdt = watchdog_get_drvdata(wdt_dev);
98         int ret;
99
100         ret = max77620_reg_update(wdt->chip->dev, MAX77620_PWR_SLAVE,
101                 MAX77620_REG_CNFGGLBL3, MAX77620_WDTC_MASK, 0x1);
102         if (ret < 0)
103                 dev_err(wdt->dev, "clear wdt failed: %d\n", ret);
104
105         dev_dbg(wdt->dev, "wdt cleared\n");
106
107         return ret;
108 }
109
110 static int _max77620_wdt_set_timeout(struct watchdog_device *wdt_dev,
111                 unsigned int timeout)
112 {
113         struct max77620_wdt *wdt = watchdog_get_drvdata(wdt_dev);
114         int ret;
115         u8 regval = 0;
116         u8 val = 0;
117
118         if (timeout <= 2)
119                 regval = MAX77620_TWD_2s;
120         else if (timeout <= 16)
121                 regval = MAX77620_TWD_16s;
122         else if (timeout <= 64)
123                 regval = MAX77620_TWD_64s;
124         else if (timeout <= 128)
125                 regval = MAX77620_TWD_128s;
126         else
127                 return -EINVAL;
128
129         if (wdt->otp_wdtt) {
130                 /* if OTP_WDTT = 1, TWD can be changed when WDTEN = 0*/
131                 if (wdt->otp_wdten == 0) {
132                         /* Set WDTEN = 0 and change TWD*/
133                         ret = max77620_reg_read(wdt->chip->dev,
134                                 MAX77620_PWR_SLAVE,
135                                 MAX77620_REG_CNFGGLBL2, &val);
136
137                         ret = max77620_reg_update(wdt->chip->dev,
138                                 MAX77620_PWR_SLAVE,
139                                 MAX77620_REG_CNFGGLBL2, MAX77620_WDTEN, 0);
140                         if (ret < 0) {
141                                 dev_err(wdt->dev,
142                                         "clear wdten failed: %d\n", ret);
143                                 return ret;
144                         }
145
146                         ret = max77620_reg_update(wdt->chip->dev,
147                                 MAX77620_PWR_SLAVE,
148                                 MAX77620_REG_CNFGGLBL2,
149                                 MAX77620_TWD_MASK, regval);
150                         if (ret < 0) {
151                                 dev_err(wdt->dev,
152                                         "set wdt timer failed: %d\n", ret);
153                                 return ret;
154                         }
155
156                         if (val & MAX77620_WDTEN) {
157                                 ret = max77620_reg_update(wdt->chip->dev,
158                                         MAX77620_PWR_SLAVE,
159                                         MAX77620_REG_CNFGGLBL2,
160                                         MAX77620_WDTEN, MAX77620_WDTEN);
161                                 if (ret < 0) {
162                                         dev_err(wdt->dev,
163                                                 "set wdten failed: %d\n", ret);
164                                         return ret;
165                                 }
166                         }
167
168                 } else {
169                         ret = max77620_reg_read(wdt->chip->dev,
170                                 MAX77620_PWR_SLAVE,
171                                 MAX77620_REG_CNFGGLBL2, &val);
172                         if (val & MAX77620_WDTEN) {
173                                 dev_err(wdt->dev,
174                                         "WDTEN is 1. Cannot update timer\n");
175                                 return -EPERM;
176                         } else {
177                                 ret = max77620_reg_update(wdt->chip->dev,
178                                         MAX77620_PWR_SLAVE,
179                                         MAX77620_REG_CNFGGLBL2,
180                                         MAX77620_TWD_MASK, regval);
181                                 if (ret < 0) {
182                                         dev_err(wdt->dev,
183                                         "set wdt timer failed: %d\n", ret);
184                                         return ret;
185                                 }
186                         }
187                 }
188         } else {
189                 /*OTP_WDTT = 0, TWD can be changed by clearing the WDT first*/
190                 ret = max77620_reg_update(wdt->chip->dev, MAX77620_PWR_SLAVE,
191                         MAX77620_REG_CNFGGLBL3, MAX77620_WDTC_MASK, 0x1);
192                 if (ret < 0) {
193                         dev_err(wdt->dev, "clear wdt failed: %d\n", ret);
194                         return ret;
195                 }
196                 ret = max77620_reg_update(wdt->chip->dev, MAX77620_PWR_SLAVE,
197                         MAX77620_REG_CNFGGLBL2, MAX77620_TWD_MASK, regval);
198                 if (ret < 0) {
199                         dev_err(wdt->dev, "set wdt timer failed: %d\n", ret);
200                         return ret;
201                 }
202         }
203
204         wdt->current_timeout = timeout;
205         wdt_dev->timeout = timeout;
206         dev_info(wdt->dev, "Setting WDT timeout %d\n", timeout);
207         return 0;
208 }
209
210 #ifdef CONFIG_PM_SLEEP
211 static int max77620_wdt_restart(struct watchdog_device *wdt_dev,
212                 unsigned int timeout)
213 {
214         int ret;
215
216         if (!timeout)
217                 return 0;
218
219         max77620_wdt_ping(wdt_dev);
220
221         ret = _max77620_wdt_set_timeout(wdt_dev, timeout);
222         if (!ret)
223                 ret = max77620_wdt_start(wdt_dev);
224         return ret;
225 }
226 #endif
227
228 static int max77620_wdt_set_timeout(struct watchdog_device *wdt_dev,
229                 unsigned int timeout)
230 {
231         struct max77620_wdt *wdt = watchdog_get_drvdata(wdt_dev);
232
233         if (wdt->boot_timeout) {
234                 cancel_delayed_work(&wdt->clear_wdt_wq);
235                 wdt->boot_timeout = 0;
236         }
237
238         return _max77620_wdt_set_timeout(wdt_dev, timeout);
239 }
240
241 static void max77620_wdt_clear_workqueue(struct work_struct *work)
242 {
243         struct max77620_wdt *wdt;
244         int ret;
245
246         wdt = container_of(work, struct max77620_wdt, clear_wdt_wq.work);
247         if (!wdt)
248                 return;
249
250         ret = max77620_wdt_ping(&wdt->wdt_dev);
251         if (ret < 0)
252                 dev_err(wdt->dev, "WDT reset failed: %d\n", ret);
253
254         schedule_delayed_work(&wdt->clear_wdt_wq,
255                         msecs_to_jiffies(wdt->clear_time * HZ));
256 }
257
258 static const struct watchdog_info max77620_wdt_info = {
259         .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
260         .identity = "max77620 Watchdog",
261 };
262
263 static const struct watchdog_ops max77620_wdt_ops = {
264         .owner = THIS_MODULE,
265         .start = max77620_wdt_start,
266         .stop = max77620_wdt_stop,
267         .ping = max77620_wdt_ping,
268         .set_timeout = max77620_wdt_set_timeout,
269 };
270
271 static ssize_t show_wdt_suspend_state(struct device *dev,
272                 struct device_attribute *attr, char *buf)
273 {
274         struct max77620_wdt *wdt = dev_get_drvdata(dev);
275
276         return sprintf(buf, "%s",
277                         (wdt->suspend_timeout) ? "enable\n" : "disable\n");
278 }
279
280 static ssize_t set_wdt_suspend_state(struct device *dev,
281                 struct device_attribute *attr, const char *buf, size_t count)
282 {
283         struct max77620_wdt *wdt = dev_get_drvdata(dev);
284         int enable;
285         char *p = (char *)buf;
286         char ch = *p;
287
288         if ((ch == 'e') || (ch == 'E'))
289                 enable = 1;
290         else if ((ch == 'd') || (ch == 'D'))
291                 enable = 0;
292         else
293                 return -EINVAL;
294
295         if (enable)
296                 wdt->suspend_timeout = wdt->org_suspend_timeout;
297         else
298                 wdt->suspend_timeout = 0;
299
300         alarmtimer_set_maximum_wakeup_interval_time(wdt->suspend_timeout);
301         return count;
302 }
303 static DEVICE_ATTR(watchdog_suspend_state, 0644, show_wdt_suspend_state,
304                         set_wdt_suspend_state);
305
306 static ssize_t show_wdt_normal_state(struct device *dev,
307                 struct device_attribute *attr, char *buf)
308 {
309         struct max77620_wdt *wdt = dev_get_drvdata(dev);
310
311         return sprintf(buf, "%s",
312                         (wdt->boot_timeout) ? "enable\n" : "disable\n");
313 }
314
315 static ssize_t set_wdt_normal_state(struct device *dev,
316                 struct device_attribute *attr, const char *buf, size_t count)
317 {
318         struct max77620_wdt *wdt = dev_get_drvdata(dev);
319         int enable;
320         char *p = (char *)buf;
321         char ch = *p;
322         int ret;
323
324         if ((ch == 'e') || (ch == 'E'))
325                 enable = 1;
326         else if ((ch == 'd') || (ch == 'D'))
327                 enable = 0;
328         else
329                 return -EINVAL;
330
331         if (enable && wdt->boot_timeout)
332                 return count;
333         if (!enable && !wdt->boot_timeout)
334                 return count;
335
336         if (enable)
337                 wdt->boot_timeout = wdt->org_boot_timeout;
338         else
339                 wdt->boot_timeout = 0;
340
341         if (wdt->org_boot_timeout) {
342                 if (wdt->boot_timeout) {
343                         ret = max77620_wdt_restart(&wdt->wdt_dev,
344                                         wdt->boot_timeout);
345                         if (ret < 0)
346                                 dev_err(wdt->dev,
347                                         "Watchdog not restarted %d\n", ret);
348
349                         schedule_delayed_work(&wdt->clear_wdt_wq,
350                                 msecs_to_jiffies(wdt->clear_time * HZ));
351                 } else {
352                         ret = max77620_wdt_stop(&wdt->wdt_dev);
353                         if (ret < 0)
354                                 dev_err(wdt->dev, "wdt stop failed: %d\n", ret);
355                         cancel_delayed_work(&wdt->clear_wdt_wq);
356                 }
357         }
358         return count;
359 }
360 static DEVICE_ATTR(watchdog_normal_state, 0644, show_wdt_normal_state,
361                         set_wdt_normal_state);
362
363 static int max77620_wdt_probe(struct platform_device *pdev)
364 {
365         struct max77620_wdt *wdt;
366         struct watchdog_device *wdt_dev;
367         int ret;
368         u32 prop;
369         struct device_node *pnode = pdev->dev.parent->of_node;
370         struct device_node *np = NULL;
371
372         wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
373         if (!wdt) {
374                 dev_err(&pdev->dev, "Failed to allocate mem\n");
375                 return -ENOMEM;
376         }
377
378         ret = max77620_reg_update(pdev->dev.parent, MAX77620_PWR_SLAVE,
379                         MAX77620_REG_CNFGGLBL2, MAX77620_WDTOFFC,
380                         MAX77620_WDTOFFC);
381         if (ret < 0) {
382                 dev_err(&pdev->dev, "CNFGGLBL2 update failed: %d\n", ret);
383                 return ret;
384         }
385
386         if (pnode) {
387                 np = of_get_child_by_name(pnode, "watchdog");
388                 if (!np) {
389                         dev_err(&pdev->dev,
390                                 "Device is not having watcdog node\n");
391                         return -ENODEV;
392                 }
393                 ret = of_device_is_available(np);
394                 if (!ret) {
395                         dev_info(&pdev->dev, "WDT node is disabled\n");
396                         return -ENODEV;
397                 }
398
399                 ret = of_property_read_u32(np, "maxim,wdt-boot-timeout", &prop);
400                 if (!ret)
401                         wdt->boot_timeout = prop;
402                 wdt->clear_time = wdt->boot_timeout / 2;
403
404                 wdt->otp_wdtt = of_property_read_bool(np, "maxim,otp-wdtt");
405                 wdt->otp_wdten = of_property_read_bool(np, "maxim,otp-wdten");
406                 wdt->enable_on_off = of_property_read_bool(np,
407                                         "maxim,enable-wdt-on-off");
408                 of_property_read_u32(np, "maxim,wdt-suspend-timeout",
409                                 &wdt->org_suspend_timeout);
410                 wdt->wdt_suspend_enable = of_property_read_bool(np,
411                                         "maxim,wdt-suspend-enable-from-user");
412         } else {
413                 wdt->boot_timeout = 0;
414                 wdt->otp_wdtt = 0;
415                 wdt->otp_wdten = 0;
416         }
417
418         wdt->dev = &pdev->dev;
419         wdt_dev = &wdt->wdt_dev;
420         wdt->chip = dev_get_drvdata(pdev->dev.parent);
421         wdt_dev->info = &max77620_wdt_info;
422         wdt_dev->ops = &max77620_wdt_ops;
423         wdt_dev->min_timeout = 2;
424         wdt_dev->max_timeout = 128;
425
426         if (!wdt->wdt_suspend_enable)
427                 wdt->suspend_timeout = wdt->org_suspend_timeout;
428         wdt->org_boot_timeout = wdt->boot_timeout;
429
430         watchdog_set_nowayout(wdt_dev, nowayout);
431         watchdog_set_drvdata(wdt_dev, wdt);
432         platform_set_drvdata(pdev, wdt);
433
434         if (wdt->enable_on_off) {
435                 ret = max77620_reg_update(pdev->dev.parent, MAX77620_PWR_SLAVE,
436                                 MAX77620_REG_CNFGGLBL2, MAX77620_WDTOFFC, 0);
437                 if (ret < 0) {
438                         dev_err(&pdev->dev, "CNFGGLBL2 update failed: %d\n",
439                                 ret);
440                         return ret;
441                 }
442         }
443
444         ret = watchdog_register_device(wdt_dev);
445         if (ret < 0) {
446                 dev_err(&pdev->dev, "watchdog registration failed: %d\n", ret);
447                 return ret;
448         }
449
450         ret = device_create_file(&pdev->dev, &dev_attr_watchdog_suspend_state);
451         if (ret < 0)
452                 dev_warn(&pdev->dev,
453                         "wdt suspend sysfs creation failed: %d\n", ret);
454
455         ret = device_create_file(&pdev->dev, &dev_attr_watchdog_normal_state);
456         if (ret < 0)
457                 dev_warn(&pdev->dev,
458                         "wdt normal sysfs creation failed: %d\n", ret);
459
460         /*Enable WD_RST_WK - WDT expire results in a restart*/
461         ret = max77620_reg_update(wdt->chip->dev, MAX77620_PWR_SLAVE,
462                 MAX77620_REG_ONOFFCNFG2, MAX77620_ONOFFCNFG2_WD_RST_WK,
463                                         MAX77620_ONOFFCNFG2_WD_RST_WK);
464         if (ret < 0)
465                 dev_err(wdt->dev, "onoffcnfg2 failed: %d\n", ret);
466
467         /*Set WDT clear in OFF mode*/
468         ret = max77620_reg_update(wdt->chip->dev, MAX77620_PWR_SLAVE,
469                         MAX77620_REG_CNFGGLBL2, MAX77620_WDTOFFC,
470                                                 MAX77620_WDTOFFC);
471         if (ret < 0)
472                 dev_err(wdt->dev, "set wdtoffc failed %d\n", ret);
473
474         /*Set WDT clear in Sleep mode*/
475         ret = max77620_reg_update(wdt->chip->dev, MAX77620_PWR_SLAVE,
476                         MAX77620_REG_CNFGGLBL2, MAX77620_WDTSLPC,
477                                                 MAX77620_WDTSLPC);
478         if (ret < 0)
479                 dev_err(wdt->dev, "set wdtslpc failed %d\n", ret);
480
481         if (!wdt->boot_timeout) {
482                 ret = max77620_wdt_stop(wdt_dev);
483                 if (ret < 0) {
484                         dev_err(wdt->dev, "wdt stop failed: %d\n", ret);
485                         goto scrub;
486                 }
487                 wdt->current_timeout = 0;
488                 goto suspend_timeout;
489         }
490
491         ret = _max77620_wdt_set_timeout(wdt_dev, wdt->boot_timeout);
492         if (ret < 0) {
493                 dev_err(wdt->dev, "wdt set timeout failed: %d\n", ret);
494                 goto scrub;
495         }
496         ret = max77620_wdt_start(&wdt->wdt_dev);
497         if (ret < 0)
498                 dev_err(wdt->dev, "wdt start failed: %d\n", ret);
499
500         INIT_DELAYED_WORK(&wdt->clear_wdt_wq, max77620_wdt_clear_workqueue);
501         schedule_delayed_work(&wdt->clear_wdt_wq,
502                         msecs_to_jiffies(wdt->clear_time * HZ));
503
504 suspend_timeout:
505         if (wdt->suspend_timeout) {
506                 int alarm_time = wdt->suspend_timeout;
507                 alarm_time = (alarm_time > 10) ? alarm_time - 10 : alarm_time;
508                 alarmtimer_set_maximum_wakeup_interval_time(alarm_time);
509         }
510
511         return 0;
512 scrub:
513         watchdog_unregister_device(&wdt->wdt_dev);
514         return ret;
515 }
516
517 static int max77620_wdt_remove(struct platform_device *pdev)
518 {
519         struct max77620_wdt *wdt = platform_get_drvdata(pdev);
520
521         max77620_wdt_stop(&wdt->wdt_dev);
522         if (wdt->boot_timeout)
523                 cancel_delayed_work(&wdt->clear_wdt_wq);
524         watchdog_unregister_device(&wdt->wdt_dev);
525         return 0;
526 }
527
528 static void max77620_wdt_shutdown(struct platform_device *pdev)
529 {
530         struct max77620_wdt *wdt = platform_get_drvdata(pdev);
531
532         max77620_wdt_stop(&wdt->wdt_dev);
533         if (wdt->boot_timeout)
534                 cancel_delayed_work(&wdt->clear_wdt_wq);
535 }
536
537 #ifdef CONFIG_PM_SLEEP
538 static int max77620_wdt_suspend(struct device *dev)
539 {
540         struct max77620_wdt *wdt = dev_get_drvdata(dev);
541         int ret;
542
543         if (!wdt->suspend_timeout) {
544                 ret = max77620_wdt_stop(&wdt->wdt_dev);
545                 if (ret < 0)
546                         dev_err(wdt->dev, "wdt stop failed: %d\n", ret);
547                 if (wdt->boot_timeout)
548                         cancel_delayed_work(&wdt->clear_wdt_wq);
549                 return ret;
550         }
551
552         wdt->resume_timeout = wdt->current_timeout;
553         ret = max77620_wdt_restart(&wdt->wdt_dev, wdt->suspend_timeout);
554         if (ret < 0)
555                 dev_err(wdt->dev, "Watchdog not restarted %d\n", ret);
556         if (wdt->boot_timeout)
557                 cancel_delayed_work(&wdt->clear_wdt_wq);
558         return 0;
559 }
560
561 static int max77620_wdt_resume(struct device *dev)
562 {
563         struct max77620_wdt *wdt = dev_get_drvdata(dev);
564         int ret;
565
566         if (!wdt->suspend_timeout) {
567                 if (wdt->resume_timeout) {
568                         ret = max77620_wdt_start(&wdt->wdt_dev);
569                         if (ret < 0) {
570                                 dev_err(wdt->dev, "wdt start failed:%d\n", ret);
571                                 return ret;
572                         }
573                 }
574                 goto wq_start;
575         }
576
577         ret = max77620_wdt_ping(&wdt->wdt_dev);
578         if (ret < 0)
579                 dev_err(wdt->dev, "wdt ping failed: %d\n", ret);
580
581         if (!wdt->resume_timeout) {
582                 ret = max77620_wdt_stop(&wdt->wdt_dev);
583                 if (ret < 0)
584                         dev_err(wdt->dev, "wdt stop failed: %d\n", ret);
585                 wdt->current_timeout = 0;
586                 return ret;
587         }
588
589         ret = max77620_wdt_restart(&wdt->wdt_dev, wdt->resume_timeout);
590         if (ret < 0)
591                 dev_err(wdt->dev, "Watchdog not restarted %d\n", ret);
592
593 wq_start:
594         if (wdt->boot_timeout)
595                 schedule_delayed_work(&wdt->clear_wdt_wq,
596                                 msecs_to_jiffies(wdt->clear_time * HZ));
597         return 0;
598 }
599 #endif
600
601 static const struct dev_pm_ops max77620_wdt_pm_ops = {
602         SET_SYSTEM_SLEEP_PM_OPS(max77620_wdt_suspend, max77620_wdt_resume)
603 };
604
605 static struct platform_driver max77620_wdt_driver = {
606         .driver = {
607                 .name   = "max77620-wdt",
608                 .owner  = THIS_MODULE,
609                 .pm = &max77620_wdt_pm_ops,
610         },
611         .probe  = max77620_wdt_probe,
612         .remove = max77620_wdt_remove,
613         .shutdown = max77620_wdt_shutdown,
614 };
615
616 static int __init max77620_wdt_init(void)
617 {
618         return platform_driver_register(&max77620_wdt_driver);
619 }
620 subsys_initcall_sync(max77620_wdt_init);
621
622 static void __exit max77620_wdt_exit(void)
623 {
624         platform_driver_unregister(&max77620_wdt_driver);
625 }
626 module_exit(max77620_wdt_exit);
627
628 MODULE_ALIAS("platform:max77620-wdt");
629 MODULE_DESCRIPTION("Max77620 watchdog timer driver");
630 MODULE_AUTHOR("Chaitanya Bandi <bandik@nvidia.com>");
631 MODULE_LICENSE("GPL v2");