video: tegra: dc: enable YUV 1000/1001 modes
[linux-3.10.git] / drivers / video / tegra / dc / edid.c
1 /*
2  * drivers/video/tegra/dc/edid.c
3  *
4  * Copyright (C) 2010 Google, Inc.
5  * Author: Erik Gilling <konkers@android.com>
6  *
7  * Copyright (c) 2010-2015, NVIDIA CORPORATION, All rights reserved.
8  *
9  * This software is licensed under the terms of the GNU General Public
10  * License version 2, as published by the Free Software Foundation, and
11  * may be copied, distributed, and modified under those terms.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  */
19
20
21 #include <linux/debugfs.h>
22 #include <linux/fb.h>
23 #include <linux/i2c.h>
24 #include <linux/module.h>
25 #include <linux/seq_file.h>
26 #include <linux/vmalloc.h>
27 #include <linux/delay.h>
28
29 #include "edid.h"
30 #include "dc_priv.h"
31
32 struct tegra_edid_pvt {
33         struct kref                     refcnt;
34         struct tegra_edid_hdmi_eld      eld;
35         bool                            support_stereo;
36         bool                            support_underscan;
37         bool                            support_audio;
38         bool                            scdc_present;
39         bool                            db420_present;
40         bool                            hfvsdb_present;
41         int                             hdmi_vic_len;
42         u8                              hdmi_vic[7];
43         u16                     color_depth_flag;
44         u16                     max_tmds_char_rate_hf_mhz;
45         u16                     max_tmds_char_rate_hllc_mhz;
46         u16                     colorimetry;
47         u16                     min_vrr_fps;
48         bool                    hdr_present;
49         u8                      hdr_pckt_len;
50         u8                      hdr_eotf;
51         u8                      hdr_static_metadata;
52         u16                     hdr_desired_max_luma;
53         u16                     hdr_desired_max_frame_avg_luma;
54         u16                     hdr_desired_min_luma;
55         /* Note: dc_edid must remain the last member */
56         struct tegra_dc_edid            dc_edid;
57 };
58
59 #ifdef DEBUG
60 static char tegra_edid_dump_buff[16 * 1024];
61
62 static void tegra_edid_dump(struct tegra_edid *edid)
63 {
64         struct seq_file s;
65         int i;
66         char c;
67
68         memset(&s, 0x0, sizeof(s));
69
70         s.buf = tegra_edid_dump_buff;
71         s.size = sizeof(tegra_edid_dump_buff);
72         s.private = edid;
73
74         tegra_edid_show(&s, NULL);
75
76         i = 0;
77         while (i < s.count ) {
78                 if ((s.count - i) > 256) {
79                         c = s.buf[i + 256];
80                         s.buf[i + 256] = 0;
81                         printk("%s", s.buf + i);
82                         s.buf[i + 256] = c;
83                 } else {
84                         printk("%s", s.buf + i);
85                 }
86                 i += 256;
87         }
88 }
89 #else
90 static void tegra_edid_dump(struct tegra_edid *edid)
91 {
92 }
93 #endif
94
95
96 int tegra_edid_i2c_adap_change_rate(struct i2c_adapter *i2c_adap, int rate)
97 {
98         const int MIN_RATE = 5000, MAX_RATE = 4000000;
99         int err = 0, cur_rate = 0;
100         if (rate < MIN_RATE || rate > MAX_RATE) {
101                 pr_warn("Cannot change the i2c_ddc rate, the rate:%d cannot"
102 "be below minimum rate:%d or above maximum rate:%d", rate, MIN_RATE, MAX_RATE);
103                 return -1;
104         }
105
106         if (i2c_adap) {
107                 cur_rate = i2c_get_adapter_bus_clk_rate(i2c_adap);
108                 if (cur_rate == rate)
109                         return 0;
110
111                 err = i2c_set_adapter_bus_clk_rate(i2c_adap, rate);
112                 if (err)
113                         pr_warn("Could not change i2c_ddc sclk rate\n");
114                 else
115                         pr_warn("Switching i2c_ddc sclk rate: from %d, "
116 "to %d\n", cur_rate, rate);
117         } else {
118                 pr_warn("ddc i2c adapter NULL\n");
119                 err = -1;
120         }
121         return err;
122 }
123
124 static int tegra_edid_i2c_divide_rate(struct tegra_edid *edid)
125 {
126         struct i2c_adapter *i2c_adap = i2c_get_adapter(edid->dc->out->ddc_bus);
127         int new_rate = 0, old_rate = 0, err = 0;
128
129         if (i2c_adap) {
130                 old_rate = i2c_get_adapter_bus_clk_rate(i2c_adap);
131                 new_rate = old_rate >> 1;
132                 err = tegra_edid_i2c_adap_change_rate(i2c_adap, new_rate);
133         } else
134                 err = -1;
135         return err;
136 }
137
138 int tegra_edid_read_block(struct tegra_edid *edid, int block, u8 *data)
139 {
140         u8 block_buf[] = {block >> 1};
141         u8 cmd_buf[] = {(block % 0x2) * 128};
142         u8 i;
143         u8 last_checksum = 0;
144         size_t attempt_cnt = 0;
145         struct i2c_msg msg[] = {
146                 {
147                         .addr = 0x30,
148                         .flags = 0,
149                         .len = 1,
150                         .buf = block_buf,
151                 },
152                 {
153                         .addr = 0x50,
154                         .flags = 0,
155                         .len = 1,
156                         .buf = cmd_buf,
157                 },
158                 {
159                         .addr = 0x50,
160                         .flags = I2C_M_RD,
161                         .len = 128,
162                         .buf = data,
163                 }};
164         struct i2c_msg *m;
165         int msg_len;
166         if (block > 1) {
167                 msg_len = 3;
168                 m = msg;
169         } else {
170                 msg_len = 2;
171                 m = &msg[1];
172         }
173
174         do {
175                 u8 checksum = 0;
176                 int status = edid->i2c_ops.i2c_transfer(edid->dc, m, msg_len);
177
178                 if (status < 0)
179                         return status;
180
181                 if (status != msg_len)
182                         return -EIO;
183
184                 /* fix base block header if corrupted */
185                 if (!block) {
186                         for (i = 0; i < EDID_BASE_HEADER_SIZE; i++) {
187                                 if (data[i] != edid_base_header[i])
188                                         data[i] = edid_base_header[i];
189                         }
190                 }
191
192                 for (i = 0; i < 128; i++)
193                         checksum += data[i];
194                 if (checksum != 0) {
195                         /*
196                          * It is completely possible that the sink that we are
197                          * reading has a bad EDID checksum (specifically, some
198                          * of the older TVs). These TVs have the modes, etc
199                          * programmed in their EDID correctly, but just have
200                          * a bad checksum. It then becomes hard to distinguish
201                          * between an i2c failure vs bad EDID.
202                          * To get around this, read the EDID multiple times.
203                          * If the calculated checksum is the exact same
204                          * multiple number of times, just print a
205                          * warning and ignore.
206                          */
207
208                         if (attempt_cnt == 0)
209                                 last_checksum = checksum;
210
211                         /* On different checksum remainder, lower i2c speed */
212                         if (last_checksum != checksum) {
213                                 pr_warn("%s: checksum failed and did not match consecutive reads. Previous remainder was %u. New remainder is %u. Failed at attempt %zu\n",
214                                         __func__, last_checksum, checksum, attempt_cnt);
215                                 if (tegra_edid_i2c_divide_rate(edid)) {
216                                         pr_warn("Cannot halve i2c speed giving"
217 "up on trying to change the i2c speed for EDID read\n");
218                                         return -EIO;
219                                 } else {
220                                         attempt_cnt = 0;
221                                         continue;
222                                 }
223                         }
224                         usleep_range(TEGRA_EDID_MIN_RETRY_DELAY_US, TEGRA_EDID_MAX_RETRY_DELAY_US);
225                 }
226         } while (last_checksum != 0 && ++attempt_cnt < TEGRA_EDID_MAX_RETRY);
227
228         /*
229          * Re-calculate the checksum since the standard EDID parser doesn't
230          * like the bad checksum
231          */
232         if (last_checksum != 0) {
233                 u8 checksum = 0;
234
235                 edid->checksum_corrupted = 1;
236
237                 for (i = 0; i < 127; i++)
238                         checksum += data[i];
239
240                 checksum = (u8)(256 - checksum);
241                 data[127] = checksum;
242
243                 pr_warn("%s: remainder is %u for the last %d attempts. Assuming bad sink EDID and ignoring. New checksum is %u\n",
244                                 __func__, last_checksum, TEGRA_EDID_MAX_RETRY,
245                                 checksum);
246         }
247
248         return 0;
249 }
250
251 bool tegra_edid_is_vrr_capable(struct tegra_edid *edid)
252 {
253         if (!edid || !edid->data) {
254                 pr_warn("edid invalid\n");
255                 return -EFAULT;
256         }
257
258         return edid->data->min_vrr_fps;
259 }
260
261 static int tegra_edid_parse_ext_block(const u8 *raw, int idx,
262                                struct tegra_edid_pvt *edid)
263 {
264         const u8 *ptr;
265         u8 tmp;
266         u8 code;
267         int len;
268         int i;
269         bool basic_audio = false;
270
271         if (!edid) {
272                 pr_err("%s: invalid argument\n", __func__);
273                 return -EINVAL;
274         }
275         ptr = &raw[0];
276
277         /* If CEA 861 block get info for eld struct */
278         if (ptr) {
279                 if (*ptr <= 3)
280                         edid->eld.eld_ver = 0x02;
281                 edid->eld.cea_edid_ver = ptr[1];
282
283                 /* check for basic audio support in CEA 861 block */
284                 if(raw[3] & (1<<6)) {
285                         /* For basic audio, set spk_alloc to Left+Right.
286                          * If there is a Speaker Alloc block this will
287                          * get over written with that value */
288                         basic_audio = true;
289                         edid->support_audio = 1;
290                 }
291         }
292
293         if (raw[3] & 0x80)
294                 edid->support_underscan = 1;
295         else
296                 edid->support_underscan = 0;
297
298         ptr = &raw[4];
299
300         while (ptr < &raw[idx]) {
301                 tmp = *ptr;
302                 len = tmp & 0x1f;
303
304                 /* HDMI Specification v1.4a, section 8.3.2:
305                  * see Table 8-16 for HDMI VSDB format.
306                  * data blocks have tags in top 3 bits:
307                  * tag code 2: video data block
308                  * tag code 3: vendor specific data block
309                  */
310                 code = (tmp >> 5) & 0x7;
311                 switch (code) {
312                 case CEA_DATA_BLOCK_AUDIO:
313                 {
314                         int sad_n = edid->eld.sad_count * 3;
315                         edid->eld.sad_count += len / 3;
316                         pr_debug("%s: incrementing eld.sad_count by %d to %d\n",
317                                  __func__, len / 3, edid->eld.sad_count);
318                         edid->eld.conn_type = 0x00;
319                         edid->eld.support_hdcp = 0x00;
320                         for (i = 0; (i < len) && (sad_n < ELD_MAX_SAD_BYTES);
321                              i++, sad_n++)
322                                 edid->eld.sad[sad_n] = ptr[i + 1];
323                         len++;
324                         ptr += len; /* adding the header */
325                         /* Got an audio data block so enable audio */
326                         if (basic_audio == true)
327                                 edid->eld.spk_alloc = 1;
328                         break;
329                 }
330                 /* case 2 is commented out for now */
331                 case CEA_DATA_BLOCK_VENDOR:
332                 {
333                         int j = 0;
334
335                         /* OUI for hdmi licensing, LLC */
336                         if ((ptr[1] == 0x03) &&
337                                 (ptr[2] == 0x0c) &&
338                                 (ptr[3] == 0)) {
339                                 edid->eld.port_id[0] = ptr[4];
340                                 edid->eld.port_id[1] = ptr[5];
341
342                                 if (len >= 7)
343                                         edid->max_tmds_char_rate_hllc_mhz =
344                                                                 ptr[7] * 5;
345                                 edid->max_tmds_char_rate_hllc_mhz =
346                                         edid->max_tmds_char_rate_hllc_mhz ? :
347                                         165; /* for <=165MHz field may be 0 */
348                         }
349
350                         /* OUI for hdmi forum */
351                         if ((ptr[1] == 0xd8) &&
352                                 (ptr[2] == 0x5d) &&
353                                 (ptr[3] == 0xc4)) {
354                                 edid->hfvsdb_present = true;
355                                 edid->color_depth_flag = ptr[7] &
356                                                         TEGRA_DC_Y420_MASK;
357                                 edid->max_tmds_char_rate_hf_mhz = ptr[5] * 5;
358                                 edid->scdc_present = (ptr[6] >> 7) & 0x1;
359                         }
360
361                         /* OUI for Nvidia */
362                         if ((ptr[1] == 0x4b) &&
363                                 (ptr[2] == 0x04) &&
364                                 (ptr[3] == 0)) {
365                                 /* version 1.0 vrr capabilities */
366                                 if (ptr[4] == 1)
367                                         edid->min_vrr_fps = ptr[5];
368                         }
369
370                         if ((len >= 8) &&
371                                 (ptr[1] == 0x03) &&
372                                 (ptr[2] == 0x0c) &&
373                                 (ptr[3] == 0)) {
374                                 j = 8;
375                                 tmp = ptr[j++];
376                                 /* HDMI_Video_present? */
377                                 if (tmp & 0x20) {
378                                         /* Latency_Fields_present? */
379                                         if (tmp & 0x80)
380                                                 j += 2;
381                                         /* I_Latency_Fields_present? */
382                                         if (tmp & 0x40)
383                                                 j += 2;
384                                         /* 3D_present? */
385                                         if (j <= len && (ptr[j] & 0x80))
386                                                 edid->support_stereo = 1;
387                                         /* HDMI_VIC_LEN */
388                                         if (++j <= len && (ptr[j] & 0xe0)) {
389                                                 int k = 0;
390                                                 edid->hdmi_vic_len = ptr[j] >> 5;
391                                                 for (k = 0; k < edid->hdmi_vic_len; k++)
392                                                     edid->hdmi_vic[k] = ptr[j+k+1];
393                                         }
394                                 }
395                         }
396                         if ((len > 5) &&
397                                 (ptr[1] == 0x03) &&
398                                 (ptr[2] == 0x0c) &&
399                                 (ptr[3] == 0)) {
400
401                                 edid->eld.support_ai = (ptr[6] & 0x80);
402                         }
403
404                         if ((len > 9) &&
405                                 (ptr[1] == 0x03) &&
406                                 (ptr[2] == 0x0c) &&
407                                 (ptr[3] == 0)) {
408
409                                 edid->eld.aud_synch_delay = ptr[10];
410                         }
411                         len++;
412                         ptr += len; /* adding the header */
413                         break;
414                 }
415                 case CEA_DATA_BLOCK_SPEAKER_ALLOC:
416                 {
417                         edid->eld.spk_alloc = ptr[1];
418                         len++;
419                         ptr += len; /* adding the header */
420                         break;
421                 }
422                 case CEA_DATA_BLOCK_EXT:
423                 {
424                         u8 ext_db = ptr[1];
425
426                         switch (ext_db) {
427                         case CEA_DATA_BLOCK_EXT_Y420VDB: /* fall through */
428                         case CEA_DATA_BLOCK_EXT_Y420CMDB:
429                                 edid->db420_present = true;
430                                 break;
431                         case CEA_DATA_BLOCK_EXT_CDB:
432                                 edid->colorimetry = ptr[2];
433                                 break;
434                         case CEA_DATA_BLOCK_EXT_HDR:
435                                 edid->hdr_pckt_len = ptr[0] & 0x0f;
436                                 edid->hdr_present = true;
437                                 edid->hdr_eotf = ptr[2];
438                                 edid->hdr_static_metadata = ptr[3];
439                                 if (edid->hdr_pckt_len > 5) {
440                                         edid->hdr_desired_max_luma = ptr[4];
441                                         edid->hdr_desired_max_frame_avg_luma =
442                                                                         ptr[5];
443                                         edid->hdr_desired_min_luma = ptr[6];
444                                 } else if (edid->hdr_pckt_len > 4) {
445                                         edid->hdr_desired_max_luma = ptr[4];
446                                         edid->hdr_desired_max_frame_avg_luma =
447                                                                         ptr[5];
448                                 } else
449                                         edid->hdr_desired_max_luma = ptr[4];
450                                 break;
451                         };
452
453                         len++;
454                         ptr += len;
455                         break;
456                 }
457                 default:
458                         len++; /* len does not include header */
459                         ptr += len;
460                         break;
461                 }
462         }
463
464         return 0;
465 }
466
467 static int tegra_edid_mode_support_stereo(struct fb_videomode *mode)
468 {
469         if (!mode)
470                 return 0;
471
472         if (mode->xres == 1280 &&
473                 mode->yres == 720 &&
474                 ((mode->refresh == 60) || (mode->refresh == 50)))
475                 return 1;
476
477         if (mode->xres == 1920 && mode->yres == 1080 && mode->refresh == 24)
478                 return 1;
479
480         return 0;
481 }
482
483 static void data_release(struct kref *ref)
484 {
485         struct tegra_edid_pvt *data =
486                 container_of(ref, struct tegra_edid_pvt, refcnt);
487         vfree(data);
488 }
489
490 u16 tegra_edid_get_cd_flag(struct tegra_edid *edid)
491 {
492         if (!edid || !edid->data) {
493                 pr_warn("edid invalid\n");
494                 return -EFAULT;
495         }
496
497         return edid->data->color_depth_flag;
498 }
499
500 u16 tegra_edid_get_ex_hdr_cap(struct tegra_edid *edid)
501 {
502         u16 ret = 0;
503         if (!edid || !edid->data) {
504                 pr_warn("edid invalid\n");
505                 return -EFAULT;
506         }
507
508         if (edid->data->hdr_present)
509                 ret |= FB_CAP_HDR;
510
511         return ret;
512 }
513
514 /* hdmi spec mandates sink to specify correct max_tmds_clk only for >165MHz */
515 u16 tegra_edid_get_max_clk_rate(struct tegra_edid *edid)
516 {
517         u16 tmds_hf, tmds_llc;
518
519         if (!edid || !edid->data) {
520                 pr_warn("edid invalid\n");
521                 return -EFAULT;
522         }
523
524         tmds_hf = edid->data->max_tmds_char_rate_hf_mhz;
525         tmds_llc = edid->data->max_tmds_char_rate_hllc_mhz;
526
527         if (tmds_hf || tmds_llc)
528                 return tmds_hf ? : tmds_llc;
529
530         return 0;
531 }
532
533 bool tegra_edid_is_scdc_present(struct tegra_edid *edid)
534 {
535         if (tegra_platform_is_linsim()) {
536                 return false;
537         }
538         if (!edid || !edid->data) {
539                 pr_warn("edid invalid\n");
540                 return false;
541         }
542
543         if (edid->data->scdc_present &&
544                 !tegra_edid_is_hfvsdb_present(edid)) {
545                 pr_warn("scdc presence incorrectly parsed\n");
546                 dump_stack();
547         }
548
549         return edid->data->scdc_present;
550 }
551
552 bool tegra_edid_is_hfvsdb_present(struct tegra_edid *edid)
553 {
554         if (!edid || !edid->data) {
555                 pr_warn("edid invalid\n");
556                 return false;
557         }
558
559         return edid->data->hfvsdb_present;
560 }
561
562 bool tegra_edid_is_420db_present(struct tegra_edid *edid)
563 {
564         if (!edid || !edid->data) {
565                 pr_warn("edid invalid\n");
566                 return false;
567         }
568
569         return edid->data->db420_present;
570 }
571
572 u16 tegra_edid_get_ex_colorimetry(struct tegra_edid *edid)
573 {
574         if (!edid || !edid->data) {
575                 pr_warn("edid invalid\n");
576                 return 0;
577         }
578
579         return edid->data->colorimetry;
580 }
581
582 int tegra_edid_get_monspecs(struct tegra_edid *edid, struct fb_monspecs *specs)
583 {
584         int i;
585         int j;
586         int ret;
587         int extension_blocks;
588         struct tegra_edid_pvt *new_data, *old_data;
589         u8 checksum = 0;
590         u8 *data;
591
592         new_data = vzalloc(SZ_32K + sizeof(struct tegra_edid_pvt));
593         if (!new_data)
594                 return -ENOMEM;
595
596         kref_init(&new_data->refcnt);
597
598         edid->checksum_corrupted = 0;
599
600         data = new_data->dc_edid.buf;
601
602         if (edid->dc->vedid) {
603                 memcpy(data, edid->dc->vedid_data, 128);
604                 /* checksum new edid */
605                 for (i = 0; i < 128; i++)
606                         checksum += data[i];
607                 if (checksum != 0) {
608                         pr_err("%s: checksum failed\n", __func__);
609                         ret = -EINVAL;
610                         goto fail;
611                 }
612         } else {
613                 ret = tegra_edid_read_block(edid, 0, data);
614                 if (ret)
615                         goto fail;
616         }
617
618         memset(specs, 0x0, sizeof(struct fb_monspecs));
619         memset(&new_data->eld, 0x0, sizeof(new_data->eld));
620         fb_edid_to_monspecs(data, specs);
621         if (specs->modedb == NULL) {
622                 ret = -EINVAL;
623                 goto fail;
624         }
625         memcpy(new_data->eld.monitor_name, specs->monitor, sizeof(specs->monitor));
626         new_data->eld.mnl = strlen(new_data->eld.monitor_name) + 1;
627         new_data->eld.product_id[0] = data[0x8];
628         new_data->eld.product_id[1] = data[0x9];
629         new_data->eld.manufacture_id[0] = data[0xA];
630         new_data->eld.manufacture_id[1] = data[0xB];
631
632         extension_blocks = data[0x7e];
633
634         for (i = 1; i <= extension_blocks; i++) {
635                 if (edid->dc->vedid) {
636                         memcpy(data + i * 128,
637                                 edid->dc->vedid_data + i * 128, 128);
638                         for (j = 0; j < 128; j++)
639                                 checksum += data[i * 128 + j];
640                         if (checksum != 0) {
641                                 pr_err("%s: checksum failed\n", __func__);
642                                 ret = -EINVAL;
643                                 goto fail;
644                         }
645                 } else {
646                         ret = tegra_edid_read_block(edid, i, data + i * 128);
647                         if (ret < 0)
648                                 goto fail;
649                 }
650
651                 if (data[i * 128] == 0x2) {
652                         fb_edid_add_monspecs(data + i * 128, specs);
653
654                         tegra_edid_parse_ext_block(data + i * 128,
655                                         data[i * 128 + 2], new_data);
656
657                         if (new_data->support_stereo) {
658                                 for (j = 0; j < specs->modedb_len; j++) {
659                                         if (tegra_edid_mode_support_stereo(
660                                                 &specs->modedb[j]))
661                                                 specs->modedb[j].vmode |=
662 #ifndef CONFIG_TEGRA_HDMI_74MHZ_LIMIT
663                                                 FB_VMODE_STEREO_FRAME_PACK;
664 #else
665                                                 FB_VMODE_STEREO_LEFT_RIGHT;
666 #endif
667                                 }
668                         }
669
670                         if (new_data->hdmi_vic_len > 0) {
671                                 int k;
672                                 int l = specs->modedb_len;
673                                 struct fb_videomode *m;
674                                 m = kzalloc((specs->modedb_len +
675                                     new_data->hdmi_vic_len) *
676                                     sizeof(struct fb_videomode), GFP_KERNEL);
677                                 if (!m)
678                                         break;
679                                 memcpy(m, specs->modedb, specs->modedb_len *
680                                         sizeof(struct fb_videomode));
681                                 for (k = 0; k < new_data->hdmi_vic_len; k++) {
682                                     unsigned vic = new_data->hdmi_vic[k];
683                                     if (vic >= HDMI_EXT_MODEDB_SIZE) {
684                                         pr_warning("Unsupported HDMI VIC %d, ignoring\n", vic);
685                                         continue;
686                                     }
687                                     memcpy(&m[l], &hdmi_ext_modes[vic],
688                                                 sizeof(m[l]));
689                                     l++;
690                                 }
691                                 kfree(specs->modedb);
692                                 specs->modedb = m;
693                                 specs->modedb_len = specs->modedb_len +
694                                                         new_data->hdmi_vic_len;
695                         }
696                 }
697         }
698
699 #ifdef CONFIG_ARCH_TEGRA_21x_SOC
700         /* T210 supports fractional divider and hence can support the * 1000 / 1001 modes.
701            For now, only enable support for 24, 30 and 60 Hz modes. */
702         {
703                 const int max_modes = 50;
704                 struct fb_videomode *frac_modes, *m;
705                 int frac_n = 0;
706                 frac_modes = kzalloc(sizeof(struct fb_videomode) * max_modes,
707                                      GFP_KERNEL);
708
709                 if (frac_modes) {
710                         for (j = 0; j < specs->modedb_len; ++j) {
711                                 int rate = tegra_dc_calc_fb_refresh(&specs->modedb[j]);
712                                 if ((rate == 24000 ||
713                                      rate == 30000 ||
714                                     (rate > (60000 - 20) && rate < (60000 + 20))) &&
715                                     frac_n < max_modes) {
716                                         memcpy(&frac_modes[frac_n], &specs->modedb[j], sizeof(struct fb_videomode));
717                                         frac_modes[frac_n].pixclock = frac_modes[frac_n].pixclock * 1000 / 1001;
718                                         frac_modes[frac_n].vmode |= FB_VMODE_1000DIV1001;
719                                         frac_n++;
720                                 }
721                         }
722
723                         if (frac_n == max_modes)
724                                 pr_warn("Hit fractional mode limit %d!\n", frac_n);
725
726                         m = kzalloc((specs->modedb_len + frac_n) * sizeof(struct fb_videomode), GFP_KERNEL);
727                         if (m) {
728                                 memcpy(m, specs->modedb, specs->modedb_len * sizeof(struct fb_videomode));
729                                 memcpy(&m[specs->modedb_len], frac_modes, frac_n * sizeof(struct fb_videomode));
730                                 kfree(specs->modedb);
731                                 specs->modedb = m;
732                                 specs->modedb_len += frac_n;
733                         }
734
735                         kfree(frac_modes);
736                 }
737         }
738 #endif
739
740         new_data->dc_edid.len = i * 128;
741
742         mutex_lock(&edid->lock);
743         old_data = edid->data;
744         edid->data = new_data;
745         mutex_unlock(&edid->lock);
746
747         if (old_data)
748                 kref_put(&old_data->refcnt, data_release);
749
750         tegra_edid_dump(edid);
751         return 0;
752
753 fail:
754         vfree(new_data);
755         return ret;
756 }
757
758 int tegra_edid_audio_supported(struct tegra_edid *edid)
759 {
760         if ((!edid) || (!edid->data))
761                 return 0;
762
763         return edid->data->support_audio;
764 }
765
766 int tegra_edid_underscan_supported(struct tegra_edid *edid)
767 {
768         if ((!edid) || (!edid->data))
769                 return 0;
770
771         return edid->data->support_underscan;
772 }
773
774 int tegra_edid_get_eld(struct tegra_edid *edid, struct tegra_edid_hdmi_eld *elddata)
775 {
776         if (!elddata || !edid->data)
777                 return -EFAULT;
778
779         memcpy(elddata,&edid->data->eld,sizeof(struct tegra_edid_hdmi_eld));
780
781         return 0;
782 }
783
784 struct tegra_edid *tegra_edid_create(struct tegra_dc *dc,
785         i2c_transfer_func_t i2c_func)
786 {
787         struct tegra_edid *edid;
788
789         edid = kzalloc(sizeof(struct tegra_edid), GFP_KERNEL);
790         if (!edid)
791                 return ERR_PTR(-ENOMEM);
792
793         mutex_init(&edid->lock);
794         edid->i2c_ops.i2c_transfer = i2c_func;
795         edid->dc = dc;
796
797         return edid;
798 }
799
800 void tegra_edid_destroy(struct tegra_edid *edid)
801 {
802         if (edid->data)
803                 kref_put(&edid->data->refcnt, data_release);
804         kfree(edid);
805 }
806
807 struct tegra_dc_edid *tegra_edid_get_data(struct tegra_edid *edid)
808 {
809         struct tegra_edid_pvt *data;
810
811         mutex_lock(&edid->lock);
812         data = edid->data;
813         if (data)
814                 kref_get(&data->refcnt);
815         mutex_unlock(&edid->lock);
816
817         return data ? &data->dc_edid : NULL;
818 }
819
820 void tegra_edid_put_data(struct tegra_dc_edid *data)
821 {
822         struct tegra_edid_pvt *pvt;
823
824         if (!data)
825                 return;
826
827         pvt = container_of(data, struct tegra_edid_pvt, dc_edid);
828
829         kref_put(&pvt->refcnt, data_release);
830 }
831
832 int tegra_dc_edid_blob(struct tegra_dc *dc, struct i2c_msg *msgs, int num)
833 {
834         struct i2c_msg *pmsg;
835         int i;
836         int status = 0;
837         u32 len = 0;
838         struct device_node *np_panel = NULL;
839
840         np_panel = tegra_get_panel_node_out_type_check(dc,
841                 dc->pdata->default_out->type);
842
843         if (!np_panel || !of_device_is_available(np_panel))
844                 return -ENOENT;
845
846         for (i = 0; i < num; ++i) {
847                 pmsg = &msgs[i];
848
849                 if (pmsg->flags & I2C_M_RD) { /* Read */
850                         len = pmsg->len;
851                         status = of_property_read_u8_array(np_panel,
852                                 "nvidia,edid", pmsg->buf, len);
853
854                         if (status) {
855                                 dev_err(&dc->ndev->dev,
856                                         "Failed to read EDID blob from DT"
857                                         " addr:%d, size:%d\n",
858                                         pmsg->addr, len);
859                                 return status;
860                         }
861                 }
862         }
863         of_node_put(np_panel);
864         return i;
865 }
866
867 struct tegra_dc_edid *tegra_dc_get_edid(struct tegra_dc *dc)
868 {
869         if (!dc->edid)
870                 return ERR_PTR(-ENODEV);
871
872         return tegra_edid_get_data(dc->edid);
873 }
874 EXPORT_SYMBOL(tegra_dc_get_edid);
875
876 void tegra_dc_put_edid(struct tegra_dc_edid *edid)
877 {
878         tegra_edid_put_data(edid);
879 }
880 EXPORT_SYMBOL(tegra_dc_put_edid);
881
882 static const struct i2c_device_id tegra_edid_id[] = {
883         { "tegra_edid", 0 },
884         { }
885 };
886
887 MODULE_DEVICE_TABLE(i2c, tegra_edid_id);
888
889 static struct i2c_driver tegra_edid_driver = {
890         .id_table = tegra_edid_id,
891         .driver = {
892                 .name = "tegra_edid",
893         },
894 };
895
896 static int __init tegra_edid_init(void)
897 {
898         return i2c_add_driver(&tegra_edid_driver);
899 }
900
901 static void __exit tegra_edid_exit(void)
902 {
903         i2c_del_driver(&tegra_edid_driver);
904 }
905
906 module_init(tegra_edid_init);
907 module_exit(tegra_edid_exit);