arm: tegra: Move driver files to drivers/platform
[linux-3.10.git] / drivers / usb / phy / phy-tegra-usb.c
1 /*
2  * Copyright (C) 2010 Google, Inc.
3  * Copyright (c) 2010-2014, NVIDIA CORPORATION.  All rights reserved.
4  *
5  * Author:
6  *      Erik Gilling <konkers@google.com>
7  *      Benoit Goby <benoit@android.com>
8  *
9  * This software is licensed under the terms of the GNU General Public
10  * License version 2, as published by the Free Software Foundation, and
11  * may be copied, distributed, and modified under those terms.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  */
19 #include <linux/resource.h>
20 #include <linux/delay.h>
21 #include <linux/interrupt.h>
22 #include <linux/slab.h>
23 #include <linux/err.h>
24 #include <linux/export.h>
25 #include <linux/platform_device.h>
26 #include <linux/io.h>
27 #include <linux/gpio.h>
28 #include <linux/interrupt.h>
29 #include <linux/clk.h>
30 #include <linux/regulator/consumer.h>
31 #include <linux/platform_data/tegra_usb.h>
32 #include <linux/usb/otg.h>
33 #include <linux/tegra-soc.h>
34
35 /* HACK -- need to pass this through DT */
36 #include "../../../arch/arm/mach-tegra/iomap.h"
37
38 #include <linux/platform/tegra/clock.h>
39 #include "tegra_usb_phy.h"
40 #include <linux/platform/tegra/common.h>
41
42 /* HACK! This needs to come from DT */
43 #include "../../../arch/arm/mach-tegra/iomap.h"
44
45 #define ERR(stuff...)           pr_err("usb_phy: " stuff)
46 #define WARNING(stuff...)       pr_warning("usb_phy: " stuff)
47 #define INFO(stuff...)          pr_info("usb_phy: " stuff)
48
49 #define AHB_MEM_PREFETCH_CFG3           0xe0
50 #define AHB_MEM_PREFETCH_CFG4           0xe4
51 #define AHB_MEM_PREFETCH_CFG1           0xec
52 #define AHB_MEM_PREFETCH_CFG2           0xf0
53 #define PREFETCH_ENB                    (1 << 31)
54
55 #if defined(CONFIG_ARCH_TEGRA_2x_SOC)  || defined(CONFIG_ARCH_TEGRA_3x_SOC) || \
56         defined(CONFIG_ARCH_TEGRA_11x_SOC) || defined(CONFIG_ARCH_TEGRA_14x_SOC)
57 #define USB_PLL_REG "avdd_usb_pll"
58 #else
59 #define USB_PLL_REG "avdd_pll_utmip"
60 #endif
61
62 #ifdef DEBUG
63 #define DBG(stuff...)           pr_info("usb_phy: " stuff)
64 #else
65 #define DBG(stuff...)           do {} while (0)
66 #endif
67
68 static void print_usb_plat_data_info(struct tegra_usb_phy *phy)
69 {
70         struct tegra_usb_platform_data *pdata = phy->pdata;
71         char op_mode[][50] = {
72                 "TEGRA_USB_OPMODE_DEVICE",
73                 "TEGRA_USB_OPMODE_HOST"
74         };
75         char phy_intf[][50] = {
76                 "USB_PHY_INTF_UTMI",
77                 "USB_PHY_INTF_ULPI_LINK",
78                 "USB_PHY_INTF_ULPI_NULL",
79                 "USB_PHY_INTF_HSIC",
80                 "USB_PHY_INTF_ICUSB"
81         };
82
83         pr_info("tegra USB phy - inst[%d] platform info:\n", phy->inst);
84         pr_info("port_otg: %s\n", pdata->port_otg ? "yes" : "no");
85         pr_info("has_hostpc: %s\n", pdata->has_hostpc ? "yes" : "no");
86         pr_info("phy_interface: %s\n", phy_intf[pdata->phy_intf]);
87         pr_info("op_mode: %s\n", op_mode[pdata->op_mode]);
88         pr_info("qc2_voltage: %d\n", pdata->qc2_voltage);
89         if (pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
90                 pr_info("vbus_pmu_irq: %d\n", pdata->u_data.dev.vbus_pmu_irq);
91                 pr_info("charging: %s\n", pdata->u_data.dev.charging_supported ?
92                                 "enabled" : "disabled");
93                 pr_info("remote_wakeup: %s\n", pdata->u_data.dev.remote_wakeup_supported
94                                 ? "enabled" : "disabled");
95         } else {
96                 pr_info("hot_plug: %s\n", pdata->u_data.host.hot_plug ?
97                                 "enabled" : "disabled");
98                 pr_info("remote_wakeup: %s\n", pdata->u_data.host.remote_wakeup_supported
99                                 ? "enabled" : "disabled");
100         }
101 }
102
103 struct tegra_usb_phy *get_tegra_phy(struct usb_phy *x)
104 {
105         return (struct tegra_usb_phy *)x;
106 }
107
108 static void usb_host_vbus_enable(struct tegra_usb_phy *phy, bool enable)
109 {
110         int ret;
111
112         /* OTG driver will take care for OTG port */
113         if (phy->pdata->port_otg)
114                 return;
115
116         if (phy->vbus_reg) {
117                 if (enable) {
118                         ret = regulator_enable(phy->vbus_reg);
119                         if (ret)
120                                 ERR("can't enable regulator vbus_reg,err %d\n",
121                                 ret);
122                 }
123                 else
124                         regulator_disable(phy->vbus_reg);
125         }
126 }
127
128 void tegra_usb_enable_vbus(struct tegra_usb_phy *phy, bool enable)
129 {
130         usb_host_vbus_enable(phy, enable);
131 }
132 EXPORT_SYMBOL_GPL(tegra_usb_enable_vbus);
133
134 int usb_phy_reg_status_wait(void __iomem *reg, u32 mask,
135                                         u32 result, u32 timeout)
136 {
137         do {
138                 if ((readl(reg) & mask) == result)
139                         return 0;
140                 udelay(1);
141                 timeout--;
142         } while (timeout);
143
144         return -1;
145 }
146
147 static int tegra_usb_phy_init_ops(struct tegra_usb_phy *phy)
148 {
149         int err = 0;
150
151         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
152
153         if (phy->pdata->has_hostpc)
154 #if defined(CONFIG_ARCH_TEGRA_3x_SOC)
155                 err = tegra3_usb_phy_init_ops(phy);
156 #else
157                 err = tegra11x_usb_phy_init_ops(phy);
158 #endif
159 #if defined (CONFIG_ARCH_TEGRA_2x_SOC)
160         else
161                 err = tegra2_usb_phy_init_ops(phy);
162 #endif
163         return err;
164 }
165
166 static irqreturn_t usb_phy_dev_vbus_pmu_irq_thr(int irq, void *pdata)
167 {
168         struct tegra_usb_phy *phy = pdata;
169         int ret;
170
171         if (phy->vdd_reg && !phy->vdd_reg_on) {
172                 ret = regulator_enable(phy->vdd_reg);
173                 if (ret)
174                         ERR("can't enable regulator vdd_reg, error %d\n", ret);
175                 phy->vdd_reg_on = true;
176                 /*
177                  * Optimal time to get the regulator turned on
178                  * before detecting vbus interrupt.
179                  */
180                 mdelay(15);
181         }
182
183         /* clk is disabled during phy power off and not here*/
184         if (!phy->ctrl_clk_on) {
185                 tegra_clk_prepare_enable(phy->ctrlr_clk);
186                 phy->ctrl_clk_on = true;
187         }
188
189         return IRQ_HANDLED;
190 }
191
192 static void tegra_usb_phy_release_clocks(struct tegra_usb_phy *phy)
193 {
194         clk_put(phy->emc_clk);
195         clk_put(phy->sys_clk);
196         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_HOST)
197                 if (phy->pdata->u_data.host.hot_plug ||
198                         phy->pdata->u_data.host.remote_wakeup_supported)
199                         tegra_clk_disable_unprepare(phy->ctrlr_clk);
200         clk_put(phy->ctrlr_clk);
201         if (tegra_platform_is_silicon()) {
202                 tegra_clk_disable_unprepare(phy->pllu_clk);
203                 clk_put(phy->pllu_clk);
204         }
205 }
206
207 static int tegra_usb_phy_get_clocks(struct tegra_usb_phy *phy)
208 {
209         int err = 0, ret;
210
211         if (tegra_platform_is_silicon()) {
212                 phy->pllu_reg = regulator_get(&phy->pdev->dev, USB_PLL_REG);
213                 if (IS_ERR_OR_NULL(phy->pllu_reg)) {
214                         ERR("Couldn't get regulator %s: %ld\n", USB_PLL_REG,
215                                 PTR_ERR(phy->pllu_reg));
216                         err = phy->pllu_reg ? PTR_ERR(phy->pllu_reg) : -ENODEV;
217                         phy->pllu_reg = NULL;
218                         return err;
219                 }
220                 ret = regulator_enable(phy->pllu_reg);
221                 if (ret)
222                         ERR("can't enable regulator pllu_reg, error %d\n", ret);
223
224                 phy->pllu_clk = clk_get_sys(NULL, "pll_u");
225                 if (IS_ERR(phy->pllu_clk)) {
226                         ERR("inst:[%d] Can't get pllu_clk clock\n", phy->inst);
227                         err = PTR_ERR(phy->pllu_clk);
228                         goto fail_pll;
229                 }
230                 tegra_clk_prepare_enable(phy->pllu_clk);
231         }
232
233         phy->ctrlr_clk = clk_get(&phy->pdev->dev, NULL);
234         if (IS_ERR(phy->ctrlr_clk)) {
235                 dev_err(&phy->pdev->dev, "Can't get controller clock\n");
236                 err = PTR_ERR(phy->ctrlr_clk);
237                 goto fail_ctrlr_clk;
238         }
239
240         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_HOST)
241                 if (phy->pdata->u_data.host.hot_plug ||
242                         phy->pdata->u_data.host.remote_wakeup_supported)
243                         tegra_clk_prepare_enable(phy->ctrlr_clk);
244
245         phy->sys_clk = clk_get(&phy->pdev->dev, "sclk");
246         if (IS_ERR(phy->sys_clk)) {
247                 dev_err(&phy->pdev->dev, "Can't get sclk clock\n");
248                 err = PTR_ERR(phy->sys_clk);
249                 goto fail_sclk;
250         }
251         clk_set_rate(phy->sys_clk, 80000000);
252
253         phy->emc_clk = clk_get(&phy->pdev->dev, "emc");
254         if (IS_ERR(phy->emc_clk)) {
255                 dev_err(&phy->pdev->dev, "Can't get emc clock\n");
256                 err = PTR_ERR(phy->emc_clk);
257                 goto fail_emc;
258         }
259
260         if(phy->pdata->has_hostpc)
261                 clk_set_rate(phy->emc_clk, 12750000);
262         else
263                 clk_set_rate(phy->emc_clk, 300000000);
264
265         return err;
266
267 fail_emc:
268         clk_put(phy->sys_clk);
269
270 fail_sclk:
271         clk_put(phy->ctrlr_clk);
272
273 fail_ctrlr_clk:
274         if (tegra_platform_is_silicon()) {
275                 tegra_clk_disable_unprepare(phy->pllu_clk);
276                 clk_put(phy->pllu_clk);
277         }
278 fail_pll:
279         if (tegra_platform_is_silicon()) {
280                 regulator_disable(phy->pllu_reg);
281                 regulator_put(phy->pllu_reg);
282         }
283
284         return err;
285 }
286
287 void tegra_usb_phy_close(struct usb_phy *x)
288 {
289         struct tegra_usb_phy *phy = get_tegra_phy(x);
290
291         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
292
293         if (phy->ops && phy->ops->close)
294                 phy->ops->close(phy);
295
296         if (phy->pdata->ops && phy->pdata->ops->close)
297                 phy->pdata->ops->close();
298
299         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
300                 if (phy->pdata->u_data.dev.vbus_pmu_irq)
301                         free_irq(phy->pdata->u_data.dev.vbus_pmu_irq, phy);
302                 else
303                         tegra_clk_disable_unprepare(phy->ctrlr_clk);
304         } else {
305                 usb_host_vbus_enable(phy, false);
306
307                 if (phy->vbus_reg)
308                         regulator_put(phy->vbus_reg);
309         }
310
311         if (phy->vdd_reg) {
312                 if (phy->vdd_reg_on)
313                         regulator_disable(phy->vdd_reg);
314                 regulator_put(phy->vdd_reg);
315         }
316
317
318         tegra_usb_phy_release_clocks(phy);
319
320         if (tegra_platform_is_silicon() && phy->pllu_reg) {
321                 regulator_disable(phy->pllu_reg);
322                 regulator_put(phy->pllu_reg);
323         }
324 }
325
326 irqreturn_t tegra_usb_phy_irq(struct tegra_usb_phy *phy)
327 {
328         irqreturn_t status = IRQ_HANDLED;
329
330         if (phy->ops && phy->ops->irq)
331                 status = phy->ops->irq(phy);
332
333         return status;
334 }
335 EXPORT_SYMBOL_GPL(tegra_usb_phy_irq);
336
337 int tegra_usb_phy_init(struct usb_phy *x)
338 {
339         int status = 0;
340         struct tegra_usb_phy *phy = get_tegra_phy(x);
341         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
342
343         if (phy->pdata->ops && phy->pdata->ops->init)
344                 phy->pdata->ops->init();
345
346         if (phy->ops && phy->ops->init)
347                 status = phy->ops->init(phy);
348
349         return status;
350 }
351
352 int tegra_usb_phy_power_off(struct tegra_usb_phy *phy)
353 {
354         int err = 0;
355
356         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
357
358         if (!phy->phy_power_on)
359                 return err;
360
361         if (phy->ops && phy->ops->power_off) {
362                 if (phy->pdata->ops && phy->pdata->ops->pre_phy_off)
363                         phy->pdata->ops->pre_phy_off();
364                 err = phy->ops->power_off(phy);
365                 if (phy->pdata->ops && phy->pdata->ops->post_phy_off)
366                         phy->pdata->ops->post_phy_off();
367         }
368
369         tegra_clk_disable_unprepare(phy->emc_clk);
370         tegra_clk_disable_unprepare(phy->sys_clk);
371         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_HOST) {
372                 if (!phy->pdata->u_data.host.hot_plug &&
373                         !phy->pdata->u_data.host.remote_wakeup_supported) {
374                         tegra_clk_disable_unprepare(phy->ctrlr_clk);
375                         phy->ctrl_clk_on = false;
376                         if (phy->vdd_reg && phy->vdd_reg_on) {
377                                 regulator_disable(phy->vdd_reg);
378                                 phy->vdd_reg_on = false;
379                         }
380                 }
381         } else {
382                 /* In device mode clock regulator/clocks will be turned off
383                  * only if pmu interrupt is present on the board and host mode
384                  * support through OTG is supported on the board.
385                  */
386                 if (phy->pdata->u_data.dev.vbus_pmu_irq &&
387                         phy->pdata->id_det_type == TEGRA_USB_VIRTUAL_ID) {
388                         tegra_clk_disable_unprepare(phy->ctrlr_clk);
389                         phy->ctrl_clk_on = false;
390                         if (phy->vdd_reg && phy->vdd_reg_on) {
391                                 regulator_disable(phy->vdd_reg);
392                                 phy->vdd_reg_on = false;
393                         }
394                 }
395         }
396
397         phy->phy_power_on = false;
398
399         return err;
400 }
401 EXPORT_SYMBOL_GPL(tegra_usb_phy_power_off);
402
403 int tegra_usb_phy_power_on(struct tegra_usb_phy *phy)
404 {
405         int status = 0, ret;
406
407         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
408
409         if (phy->phy_power_on)
410                 return status;
411
412 #ifndef CONFIG_ARCH_TEGRA_2x_SOC
413         if (phy->vdd_reg && !phy->vdd_reg_on) {
414                 ret = regulator_enable(phy->vdd_reg);
415                 if (ret)
416                         ERR("can't enable regulator vdd_reg, error %d\n", ret);
417                 phy->vdd_reg_on = true;
418         }
419 #endif
420
421         /* In device mode clock is turned on by pmu irq handler
422          * if pmu irq is not available clocks will not be turned off/on
423          */
424         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_HOST) {
425                 if (!phy->pdata->u_data.host.hot_plug &&
426                         !phy->pdata->u_data.host.remote_wakeup_supported)
427                         tegra_clk_prepare_enable(phy->ctrlr_clk);
428         } else {
429                 if (phy->pdata->u_data.dev.vbus_pmu_irq &&
430                         !phy->ctrl_clk_on) {
431                         tegra_clk_prepare_enable(phy->ctrlr_clk);
432                         phy->ctrl_clk_on = true;
433                 }
434         }
435         tegra_clk_prepare_enable(phy->sys_clk);
436         tegra_clk_prepare_enable(phy->emc_clk);
437
438         if (phy->ops && phy->ops->power_on) {
439                 if (phy->pdata->ops && phy->pdata->ops->pre_phy_on)
440                         phy->pdata->ops->pre_phy_on();
441                 status = phy->ops->power_on(phy);
442                 if (phy->pdata->ops && phy->pdata->ops->post_phy_on)
443                         phy->pdata->ops->post_phy_on();
444         }
445
446         phy->phy_power_on = true;
447
448         return status;
449 }
450 EXPORT_SYMBOL_GPL(tegra_usb_phy_power_on);
451
452 int tegra_usb_phy_reset(struct tegra_usb_phy *phy)
453 {
454         int status = 0;
455
456         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
457         if (phy->ops && phy->ops->reset)
458                 status = phy->ops->reset(phy);
459
460         return status;
461 }
462 EXPORT_SYMBOL_GPL(tegra_usb_phy_reset);
463
464 int tegra_usb_phy_pre_suspend(struct tegra_usb_phy *phy)
465 {
466         int status = 0;
467
468         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
469
470         if (phy->pdata->ops && phy->pdata->ops->pre_suspend)
471                 phy->pdata->ops->pre_suspend();
472
473         if (phy->ops && phy->ops->pre_suspend)
474                 status = phy->ops->pre_suspend(phy);
475
476         return status;
477 }
478 EXPORT_SYMBOL_GPL(tegra_usb_phy_pre_suspend);
479
480 int tegra_usb_phy_suspend(struct tegra_usb_phy *phy)
481 {
482         int err = 0;
483
484         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
485
486         if (phy->ops && phy->ops->suspend)
487                 err = phy->ops->suspend(phy);
488
489         if (!err && phy->pdata->u_data.host.power_off_on_suspend)
490                 tegra_usb_phy_power_off(phy);
491
492         return err;
493 }
494
495 int tegra_usb_phy_post_suspend(struct tegra_usb_phy *phy)
496 {
497         int status = 0;
498
499         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
500
501         if (phy->ops && phy->ops->post_suspend)
502                 status = phy->ops->post_suspend(phy);
503
504         if (phy->pdata->ops && phy->pdata->ops->post_suspend)
505                 phy->pdata->ops->post_suspend();
506
507         return status;
508 }
509 EXPORT_SYMBOL_GPL(tegra_usb_phy_post_suspend);
510
511 int tegra_usb_phy_pre_resume(struct tegra_usb_phy *phy, bool remote_wakeup)
512 {
513         int status = 0;
514
515         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
516
517         if (phy->pdata->ops && phy->pdata->ops->pre_resume)
518                 phy->pdata->ops->pre_resume();
519
520         if (phy->ops && phy->ops->pre_resume)
521                 status = phy->ops->pre_resume(phy, remote_wakeup);
522
523         return status;
524 }
525 EXPORT_SYMBOL_GPL(tegra_usb_phy_pre_resume);
526
527 int tegra_usb_phy_resume(struct tegra_usb_phy *phy)
528 {
529         int err = 0;
530
531         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
532
533         if (phy->pdata->u_data.host.power_off_on_suspend) {
534                 err = tegra_usb_phy_power_on(phy);
535         }
536
537         if (!err && phy->ops && phy->ops->resume)
538                 err = phy->ops->resume(phy);
539
540         return err;
541
542 }
543
544 int tegra_usb_phy_post_resume(struct tegra_usb_phy *phy)
545 {
546         int status = 0;
547
548         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
549
550         if (phy->ops && phy->ops->post_resume)
551                 status = phy->ops->post_resume(phy);
552
553         if (phy->pdata->ops && phy->pdata->ops->post_resume)
554                 phy->pdata->ops->post_resume();
555
556         return status;
557 }
558 EXPORT_SYMBOL_GPL(tegra_usb_phy_post_resume);
559
560 int tegra_usb_phy_port_power(struct tegra_usb_phy *phy)
561 {
562         int status = 0;
563
564         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
565
566         if (phy->ops && phy->ops->port_power)
567                 status = phy->ops->port_power(phy);
568
569         return status;
570 }
571 EXPORT_SYMBOL_GPL(tegra_usb_phy_port_power);
572
573 int tegra_usb_phy_bus_reset(struct tegra_usb_phy *phy)
574 {
575         int status = 0;
576
577         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
578
579         if (phy->ops && phy->ops->bus_reset)
580                 status = phy->ops->bus_reset(phy);
581
582         return status;
583 }
584 EXPORT_SYMBOL_GPL(tegra_usb_phy_bus_reset);
585
586 bool tegra_usb_phy_charger_detected(struct tegra_usb_phy *phy)
587 {
588         bool status = 0;
589
590         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
591         if (phy->ops && phy->ops->charger_detect)
592                 status = phy->ops->charger_detect(phy);
593
594         return status;
595 }
596 EXPORT_SYMBOL_GPL(tegra_usb_phy_charger_detected);
597
598 bool tegra_usb_phy_cdp_charger_detected(struct tegra_usb_phy *phy)
599 {
600         bool status = 0;
601
602         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
603         if (phy->ops && phy->ops->cdp_charger_detect)
604                 status = phy->ops->cdp_charger_detect(phy);
605
606         return status;
607 }
608 EXPORT_SYMBOL_GPL(tegra_usb_phy_cdp_charger_detected);
609
610 bool tegra_usb_phy_qc2_charger_detected(struct tegra_usb_phy *phy,
611                         int max_voltage)
612 {
613         bool status = 0;
614
615         DBG("%s(%d) inst:[%d] max_voltage = %d\n", __func__, __LINE__,
616                 phy->inst, max_voltage);
617         if (phy->ops && phy->ops->qc2_charger_detect)
618                 status = phy->ops->qc2_charger_detect(phy, max_voltage);
619
620         return status;
621 }
622 EXPORT_SYMBOL_GPL(tegra_usb_phy_qc2_charger_detected);
623
624 bool tegra_usb_phy_maxim_charger_detected(struct tegra_usb_phy *phy)
625 {
626         bool status = 0;
627
628         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
629         if (phy->ops && phy->ops->maxim_charger_14675)
630                 status = phy->ops->maxim_charger_14675(phy);
631
632         return status;
633 }
634 EXPORT_SYMBOL_GPL(tegra_usb_phy_maxim_charger_detected);
635
636 bool tegra_usb_phy_nv_charger_detected(struct tegra_usb_phy *phy)
637 {
638         bool status = 0;
639
640         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
641         if (phy->ops && phy->ops->nv_charger_detect)
642                 status = phy->ops->nv_charger_detect(phy);
643
644         return status;
645 }
646 EXPORT_SYMBOL_GPL(tegra_usb_phy_nv_charger_detected);
647
648 bool tegra_usb_phy_apple_1000ma_charger_detected(struct tegra_usb_phy *phy)
649 {
650         bool status = 0;
651         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
652         if (phy->ops && phy->ops->apple_charger_1000ma_detect)
653                 status = phy->ops->apple_charger_1000ma_detect(phy);
654
655         return status;
656 }
657 EXPORT_SYMBOL_GPL(tegra_usb_phy_apple_1000ma_charger_detected);
658
659 bool tegra_usb_phy_apple_2000ma_charger_detected(struct tegra_usb_phy *phy)
660 {
661         bool status = 0;
662         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
663         if (phy->ops && phy->ops->apple_charger_2000ma_detect)
664                 status = phy->ops->apple_charger_2000ma_detect(phy);
665
666         return status;
667 }
668 EXPORT_SYMBOL_GPL(tegra_usb_phy_apple_2000ma_charger_detected);
669
670 bool tegra_usb_phy_apple_500ma_charger_detected(struct tegra_usb_phy *phy)
671 {
672         bool status = 0;
673         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, phy->inst);
674         if (phy->ops && phy->ops->apple_charger_500ma_detect)
675                 status = phy->ops->apple_charger_500ma_detect(phy);
676
677         return status;
678 }
679 EXPORT_SYMBOL_GPL(tegra_usb_phy_apple_500ma_charger_detected);
680
681 bool tegra_usb_phy_hw_accessible(struct tegra_usb_phy *phy)
682 {
683         if (!phy->hw_accessible)
684                 DBG("%s(%d) inst:[%d] Not Accessible\n", __func__,
685                                                 __LINE__, phy->inst);
686
687         return phy->hw_accessible;
688 }
689 EXPORT_SYMBOL_GPL(tegra_usb_phy_hw_accessible);
690
691 bool tegra_usb_phy_pmc_wakeup(struct tegra_usb_phy *phy)
692 {
693         return phy->pmc_remote_wakeup || phy->pmc_hotplug_wakeup;
694 }
695 EXPORT_SYMBOL_GPL(tegra_usb_phy_pmc_wakeup);
696
697 void tegra_usb_phy_memory_prefetch_on(struct tegra_usb_phy *phy)
698 {
699         void __iomem *ahb_gizmo = IO_ADDRESS(TEGRA_AHB_GIZMO_BASE);
700         u32 val;
701
702         if (phy->inst == 0 && phy->pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
703                 val = readl(ahb_gizmo + AHB_MEM_PREFETCH_CFG1);
704                 val |= PREFETCH_ENB;
705                 ahb_gizmo_writel(val, ahb_gizmo + AHB_MEM_PREFETCH_CFG1);
706                 val = readl(ahb_gizmo + AHB_MEM_PREFETCH_CFG2);
707                 val |= PREFETCH_ENB;
708                 ahb_gizmo_writel(val, ahb_gizmo + AHB_MEM_PREFETCH_CFG2);
709         }
710 }
711 EXPORT_SYMBOL_GPL(tegra_usb_phy_memory_prefetch_on);
712
713 void tegra_usb_phy_memory_prefetch_off(struct tegra_usb_phy *phy)
714 {
715         void __iomem *ahb_gizmo = IO_ADDRESS(TEGRA_AHB_GIZMO_BASE);
716         u32 val;
717
718         if (phy->inst == 0 && phy->pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
719                 val = readl(ahb_gizmo + AHB_MEM_PREFETCH_CFG1);
720                 val &= ~(PREFETCH_ENB);
721                 ahb_gizmo_writel(val, ahb_gizmo + AHB_MEM_PREFETCH_CFG1);
722                 val = readl(ahb_gizmo + AHB_MEM_PREFETCH_CFG2);
723                 val &= ~(PREFETCH_ENB);
724                 ahb_gizmo_writel(val, ahb_gizmo + AHB_MEM_PREFETCH_CFG2);
725         }
726 }
727 EXPORT_SYMBOL_GPL(tegra_usb_phy_memory_prefetch_off);
728
729 int tegra_usb_phy_set_suspend(struct usb_phy *x, int suspend)
730 {
731         struct tegra_usb_phy *phy = get_tegra_phy(x);
732
733         if (suspend)
734                 return tegra_usb_phy_suspend(phy);
735         else
736                 return tegra_usb_phy_resume(phy);
737 }
738
739 static int tegra_usb_phy_set_clk_freq(struct tegra_usb_phy *phy,
740                 enum usb_device_speed speed)
741 {
742         switch (speed) {
743         case USB_SPEED_HIGH:
744                 if (phy->pdata->has_hostpc) {
745                         DBG("%s(%d) USB_SPEED_HIGH\n",
746                                 __func__, __LINE__);
747                         clk_set_rate(phy->emc_clk, 100000000);
748                 }
749                 break;
750         case USB_SPEED_LOW:
751         case USB_SPEED_FULL:
752         default:
753                 if (phy->pdata->has_hostpc) {
754                         DBG("%s(%d) USB_SPEED_LOW/USB_SPEED_FULL/default\n",
755                                 __func__, __LINE__);
756                         clk_set_rate(phy->emc_clk, 12750000);
757                 }
758         }
759
760         return 0;
761 }
762
763 static int tegra_usb_phy_notify_connect(struct usb_phy *x,
764                 enum usb_device_speed speed)
765 {
766         struct tegra_usb_phy *phy = get_tegra_phy(x);
767
768         tegra_usb_phy_set_clk_freq(phy, speed);
769
770         return 0;
771 }
772
773 static int tegra_usb_phy_notify_disconnect(struct usb_phy *x,
774                 enum usb_device_speed speed)
775 {
776         struct tegra_usb_phy *phy = get_tegra_phy(x);
777
778         tegra_usb_phy_set_clk_freq(phy, USB_SPEED_LOW);
779
780         return 0;
781 }
782
783 struct tegra_usb_phy *tegra_usb_phy_open(struct platform_device *pdev)
784 {
785         struct tegra_usb_phy *phy;
786         struct tegra_usb_platform_data *pdata;
787         struct resource *res;
788         int err;
789         int plat_data_size = sizeof(struct tegra_usb_platform_data);
790
791         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, pdev->id);
792         pdata = dev_get_platdata(&pdev->dev);
793         if (!pdata) {
794                 dev_err(&pdev->dev, "inst:[%d] Platform data missing\n",
795                                                                 pdev->id);
796                 err = -EINVAL;
797                 goto fail_inval;
798         }
799
800         phy = devm_kzalloc(&pdev->dev, sizeof(struct tegra_usb_phy), GFP_KERNEL);
801         if (!phy) {
802                 ERR("inst:[%d] malloc usb phy failed\n", pdev->id);
803                 err = -ENOMEM;
804                 goto fail_nomem;
805         }
806
807         phy->pdata = devm_kzalloc(&pdev->dev, plat_data_size, GFP_KERNEL);
808         if (!phy->pdata) {
809                 ERR("inst:[%d] malloc usb phy pdata failed\n", pdev->id);
810                 err = -ENOMEM;
811                 goto fail_nomem;
812         }
813
814         memcpy(phy->pdata, pdata, plat_data_size);
815         phy->pdev = pdev;
816
817         if (pdev->dev.of_node && phy->pdata->op_mode == TEGRA_USB_OPMODE_DEVICE)
818                 phy->inst = of_alias_get_id(pdev->dev.of_node, "udc");
819         else if (pdev->dev.of_node &&
820                         phy->pdata->op_mode == TEGRA_USB_OPMODE_HOST)
821                 phy->inst = of_alias_get_id(pdev->dev.of_node, "ehci");
822         else
823                 phy->inst = pdev->id;
824
825         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_HOST)
826                 phy->hot_plug = phy->pdata->u_data.host.hot_plug;
827
828         print_usb_plat_data_info(phy);
829
830         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
831         if (!res) {
832                 ERR("inst:[%d] failed to get I/O memory\n", phy->inst);
833                 err = -ENXIO;
834                 goto fail_io;
835         }
836
837         phy->regs = ioremap(res->start, resource_size(res));
838         if (!phy->regs) {
839                 ERR("inst:[%d] Failed to remap I/O memory\n", phy->inst);
840                 err = -ENOMEM;
841                 goto fail_io;
842         }
843
844         phy->vdd_reg = regulator_get(&pdev->dev, "avdd_usb");
845         if (IS_ERR_OR_NULL(phy->vdd_reg)) {
846                 ERR("inst:[%d] couldn't get regulator avdd_usb: %ld\n",
847                         phy->inst, PTR_ERR(phy->vdd_reg));
848                 phy->vdd_reg = NULL;
849         }
850
851         err = tegra_usb_phy_get_clocks(phy);
852         if (err) {
853                 ERR("inst:[%d] Failed to init clocks\n", phy->inst);
854                 goto fail_clk;
855         }
856
857         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
858                 if (phy->pdata->u_data.dev.vbus_pmu_irq) {
859                         err = request_threaded_irq(
860                                         phy->pdata->u_data.dev.vbus_pmu_irq,
861                                         NULL, usb_phy_dev_vbus_pmu_irq_thr,
862                                         IRQF_SHARED, "usb_pmu_vbus_irq", phy);
863                         if (err) {
864                                 ERR("inst:[%d] Failed to register IRQ\n",
865                                                                 phy->inst);
866                                 goto fail_init;
867                         }
868                 } else {
869                         tegra_clk_prepare_enable(phy->ctrlr_clk);
870                 }
871         } else {
872                 phy->vbus_reg = regulator_get(&pdev->dev, "usb_vbus");
873                 if (IS_ERR_OR_NULL(phy->vbus_reg)) {
874                         ERR("failed regulator_get vdd_vbus_usb:%ld,inst:%d\n",
875                                 PTR_ERR(phy->vbus_reg), phy->inst);
876                         phy->vbus_reg = NULL;
877                 }
878
879                 usb_host_vbus_enable(phy, true);
880                 /* Fixme: Need delay to stablize the vbus on USB1
881                    this must be fixed properly */
882                 if (phy->inst == 0)
883                         msleep(1000);
884         }
885         err = tegra_usb_phy_init_ops(phy);
886         if (err) {
887                 ERR("inst:[%d] Failed to init ops\n", phy->inst);
888                 goto fail_init;
889         }
890
891         if (phy->pdata->ops && phy->pdata->ops->open)
892                 phy->pdata->ops->open();
893
894         if (phy->ops && phy->ops->open) {
895                 err = phy->ops->open(phy);
896                 if (err) {
897                         ERR("inst:[%d] Failed to open hw ops\n", phy->inst);
898                         goto fail_init;
899                 }
900         }
901
902         /* Set usb_phy func pointers */
903         phy->phy.init = tegra_usb_phy_init;
904         phy->phy.shutdown = tegra_usb_phy_close;
905         phy->phy.set_suspend = tegra_usb_phy_set_suspend;
906         phy->phy.notify_connect = tegra_usb_phy_notify_connect;
907         phy->phy.notify_disconnect = tegra_usb_phy_notify_disconnect;
908
909         return phy;
910
911 fail_init:
912         tegra_usb_phy_release_clocks(phy);
913
914         if (phy->pdata->op_mode == TEGRA_USB_OPMODE_DEVICE) {
915                 if (phy->pdata->u_data.dev.vbus_pmu_irq)
916                         free_irq(phy->pdata->u_data.dev.vbus_pmu_irq, phy);
917         } else {
918                 usb_host_vbus_enable(phy, false);
919
920                 if (phy->vbus_reg)
921                         regulator_put(phy->vbus_reg);
922         }
923
924 fail_clk:
925         regulator_put(phy->vdd_reg);
926         iounmap(phy->regs);
927
928 fail_io:
929 fail_nomem:
930 fail_inval:
931         return ERR_PTR(err);
932 }
933 EXPORT_SYMBOL_GPL(tegra_usb_phy_open);
934
935 void tegra_usb_phy_pmc_disable(struct tegra_usb_phy *phy)
936 {
937         if (phy->ops && phy->ops->pmc_disable)
938                 phy->ops->pmc_disable(phy);
939 }
940 EXPORT_SYMBOL_GPL(tegra_usb_phy_pmc_disable);