[PATCH] SPI: devices can require LSB-first encodings
[linux-3.10.git] / drivers / spi / spi_bitbang.c
1 /*
2  * spi_bitbang.c - polling/bitbanging SPI master controller driver utilities
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
17  */
18
19 #include <linux/config.h>
20 #include <linux/init.h>
21 #include <linux/spinlock.h>
22 #include <linux/workqueue.h>
23 #include <linux/interrupt.h>
24 #include <linux/delay.h>
25 #include <linux/errno.h>
26 #include <linux/platform_device.h>
27
28 #include <linux/spi/spi.h>
29 #include <linux/spi/spi_bitbang.h>
30
31
32 /*----------------------------------------------------------------------*/
33
34 /*
35  * FIRST PART (OPTIONAL):  word-at-a-time spi_transfer support.
36  * Use this for GPIO or shift-register level hardware APIs.
37  *
38  * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
39  * to glue code.  These bitbang setup() and cleanup() routines are always
40  * used, though maybe they're called from controller-aware code.
41  *
42  * chipselect() and friends may use use spi_device->controller_data and
43  * controller registers as appropriate.
44  *
45  *
46  * NOTE:  SPI controller pins can often be used as GPIO pins instead,
47  * which means you could use a bitbang driver either to get hardware
48  * working quickly, or testing for differences that aren't speed related.
49  */
50
51 struct spi_bitbang_cs {
52         unsigned        nsecs;  /* (clock cycle time)/2 */
53         u32             (*txrx_word)(struct spi_device *spi, unsigned nsecs,
54                                         u32 word, u8 bits);
55         unsigned        (*txrx_bufs)(struct spi_device *,
56                                         u32 (*txrx_word)(
57                                                 struct spi_device *spi,
58                                                 unsigned nsecs,
59                                                 u32 word, u8 bits),
60                                         unsigned, struct spi_transfer *);
61 };
62
63 static unsigned bitbang_txrx_8(
64         struct spi_device       *spi,
65         u32                     (*txrx_word)(struct spi_device *spi,
66                                         unsigned nsecs,
67                                         u32 word, u8 bits),
68         unsigned                ns,
69         struct spi_transfer     *t
70 ) {
71         unsigned                bits = spi->bits_per_word;
72         unsigned                count = t->len;
73         const u8                *tx = t->tx_buf;
74         u8                      *rx = t->rx_buf;
75
76         while (likely(count > 0)) {
77                 u8              word = 0;
78
79                 if (tx)
80                         word = *tx++;
81                 word = txrx_word(spi, ns, word, bits);
82                 if (rx)
83                         *rx++ = word;
84                 count -= 1;
85         }
86         return t->len - count;
87 }
88
89 static unsigned bitbang_txrx_16(
90         struct spi_device       *spi,
91         u32                     (*txrx_word)(struct spi_device *spi,
92                                         unsigned nsecs,
93                                         u32 word, u8 bits),
94         unsigned                ns,
95         struct spi_transfer     *t
96 ) {
97         unsigned                bits = spi->bits_per_word;
98         unsigned                count = t->len;
99         const u16               *tx = t->tx_buf;
100         u16                     *rx = t->rx_buf;
101
102         while (likely(count > 1)) {
103                 u16             word = 0;
104
105                 if (tx)
106                         word = *tx++;
107                 word = txrx_word(spi, ns, word, bits);
108                 if (rx)
109                         *rx++ = word;
110                 count -= 2;
111         }
112         return t->len - count;
113 }
114
115 static unsigned bitbang_txrx_32(
116         struct spi_device       *spi,
117         u32                     (*txrx_word)(struct spi_device *spi,
118                                         unsigned nsecs,
119                                         u32 word, u8 bits),
120         unsigned                ns,
121         struct spi_transfer     *t
122 ) {
123         unsigned                bits = spi->bits_per_word;
124         unsigned                count = t->len;
125         const u32               *tx = t->tx_buf;
126         u32                     *rx = t->rx_buf;
127
128         while (likely(count > 3)) {
129                 u32             word = 0;
130
131                 if (tx)
132                         word = *tx++;
133                 word = txrx_word(spi, ns, word, bits);
134                 if (rx)
135                         *rx++ = word;
136                 count -= 4;
137         }
138         return t->len - count;
139 }
140
141 int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
142 {
143         struct spi_bitbang_cs   *cs = spi->controller_state;
144         u8                      bits_per_word;
145         u32                     hz;
146
147         if (t) {
148                 bits_per_word = t->bits_per_word;
149                 hz = t->speed_hz;
150         } else {
151                 bits_per_word = 0;
152                 hz = 0;
153         }
154
155         /* spi_transfer level calls that work per-word */
156         if (!bits_per_word)
157                 bits_per_word = spi->bits_per_word;
158         if (bits_per_word <= 8)
159                 cs->txrx_bufs = bitbang_txrx_8;
160         else if (bits_per_word <= 16)
161                 cs->txrx_bufs = bitbang_txrx_16;
162         else if (bits_per_word <= 32)
163                 cs->txrx_bufs = bitbang_txrx_32;
164         else
165                 return -EINVAL;
166
167         /* nsecs = (clock period)/2 */
168         if (!hz)
169                 hz = spi->max_speed_hz;
170         cs->nsecs = (1000000000/2) / hz;
171         if (cs->nsecs > MAX_UDELAY_MS * 1000)
172                 return -EINVAL;
173
174         return 0;
175 }
176 EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
177
178 /**
179  * spi_bitbang_setup - default setup for per-word I/O loops
180  */
181 int spi_bitbang_setup(struct spi_device *spi)
182 {
183         struct spi_bitbang_cs   *cs = spi->controller_state;
184         struct spi_bitbang      *bitbang;
185         int                     retval;
186
187         if (!spi->max_speed_hz)
188                 return -EINVAL;
189
190         bitbang = spi_master_get_devdata(spi->master);
191
192         /* REVISIT: some systems will want to support devices using lsb-first
193          * bit encodings on the wire.  In pure software that would be trivial,
194          * just bitbang_txrx_le_cphaX() routines shifting the other way, and
195          * some hardware controllers also have this support.
196          */
197         if ((spi->mode & SPI_LSB_FIRST) != 0)
198                 return -EINVAL;
199
200         if (!cs) {
201                 cs = kzalloc(sizeof *cs, SLAB_KERNEL);
202                 if (!cs)
203                         return -ENOMEM;
204                 spi->controller_state = cs;
205         }
206
207         if (!spi->bits_per_word)
208                 spi->bits_per_word = 8;
209
210         /* per-word shift register access, in hardware or bitbanging */
211         cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
212         if (!cs->txrx_word)
213                 return -EINVAL;
214
215         retval = spi_bitbang_setup_transfer(spi, NULL);
216         if (retval < 0)
217                 return retval;
218
219         dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec\n",
220                         __FUNCTION__, spi->mode & (SPI_CPOL | SPI_CPHA),
221                         spi->bits_per_word, 2 * cs->nsecs);
222
223         /* NOTE we _need_ to call chipselect() early, ideally with adapter
224          * setup, unless the hardware defaults cooperate to avoid confusion
225          * between normal (active low) and inverted chipselects.
226          */
227
228         /* deselect chip (low or high) */
229         spin_lock(&bitbang->lock);
230         if (!bitbang->busy) {
231                 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
232                 ndelay(cs->nsecs);
233         }
234         spin_unlock(&bitbang->lock);
235
236         return 0;
237 }
238 EXPORT_SYMBOL_GPL(spi_bitbang_setup);
239
240 /**
241  * spi_bitbang_cleanup - default cleanup for per-word I/O loops
242  */
243 void spi_bitbang_cleanup(const struct spi_device *spi)
244 {
245         kfree(spi->controller_state);
246 }
247 EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
248
249 static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
250 {
251         struct spi_bitbang_cs   *cs = spi->controller_state;
252         unsigned                nsecs = cs->nsecs;
253
254         return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t);
255 }
256
257 /*----------------------------------------------------------------------*/
258
259 /*
260  * SECOND PART ... simple transfer queue runner.
261  *
262  * This costs a task context per controller, running the queue by
263  * performing each transfer in sequence.  Smarter hardware can queue
264  * several DMA transfers at once, and process several controller queues
265  * in parallel; this driver doesn't match such hardware very well.
266  *
267  * Drivers can provide word-at-a-time i/o primitives, or provide
268  * transfer-at-a-time ones to leverage dma or fifo hardware.
269  */
270 static void bitbang_work(void *_bitbang)
271 {
272         struct spi_bitbang      *bitbang = _bitbang;
273         unsigned long           flags;
274
275         spin_lock_irqsave(&bitbang->lock, flags);
276         bitbang->busy = 1;
277         while (!list_empty(&bitbang->queue)) {
278                 struct spi_message      *m;
279                 struct spi_device       *spi;
280                 unsigned                nsecs;
281                 struct spi_transfer     *t = NULL;
282                 unsigned                tmp;
283                 unsigned                cs_change;
284                 int                     status;
285                 int                     (*setup_transfer)(struct spi_device *,
286                                                 struct spi_transfer *);
287
288                 m = container_of(bitbang->queue.next, struct spi_message,
289                                 queue);
290                 list_del_init(&m->queue);
291                 spin_unlock_irqrestore(&bitbang->lock, flags);
292
293                 /* FIXME this is made-up ... the correct value is known to
294                  * word-at-a-time bitbang code, and presumably chipselect()
295                  * should enforce these requirements too?
296                  */
297                 nsecs = 100;
298
299                 spi = m->spi;
300                 tmp = 0;
301                 cs_change = 1;
302                 status = 0;
303                 setup_transfer = NULL;
304
305                 list_for_each_entry (t, &m->transfers, transfer_list) {
306                         if (bitbang->shutdown) {
307                                 status = -ESHUTDOWN;
308                                 break;
309                         }
310
311                         /* override or restore speed and wordsize */
312                         if (t->speed_hz || t->bits_per_word) {
313                                 setup_transfer = bitbang->setup_transfer;
314                                 if (!setup_transfer) {
315                                         status = -ENOPROTOOPT;
316                                         break;
317                                 }
318                         }
319                         if (setup_transfer) {
320                                 status = setup_transfer(spi, t);
321                                 if (status < 0)
322                                         break;
323                         }
324
325                         /* set up default clock polarity, and activate chip;
326                          * this implicitly updates clock and spi modes as
327                          * previously recorded for this device via setup().
328                          * (and also deselects any other chip that might be
329                          * selected ...)
330                          */
331                         if (cs_change) {
332                                 bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
333                                 ndelay(nsecs);
334                         }
335                         cs_change = t->cs_change;
336                         if (!t->tx_buf && !t->rx_buf && t->len) {
337                                 status = -EINVAL;
338                                 break;
339                         }
340
341                         /* transfer data.  the lower level code handles any
342                          * new dma mappings it needs. our caller always gave
343                          * us dma-safe buffers.
344                          */
345                         if (t->len) {
346                                 /* REVISIT dma API still needs a designated
347                                  * DMA_ADDR_INVALID; ~0 might be better.
348                                  */
349                                 if (!m->is_dma_mapped)
350                                         t->rx_dma = t->tx_dma = 0;
351                                 status = bitbang->txrx_bufs(spi, t);
352                         }
353                         if (status != t->len) {
354                                 if (status > 0)
355                                         status = -EMSGSIZE;
356                                 break;
357                         }
358                         m->actual_length += status;
359                         status = 0;
360
361                         /* protocol tweaks before next transfer */
362                         if (t->delay_usecs)
363                                 udelay(t->delay_usecs);
364
365                         if (!cs_change)
366                                 continue;
367                         if (t->transfer_list.next == &m->transfers)
368                                 break;
369
370                         /* sometimes a short mid-message deselect of the chip
371                          * may be needed to terminate a mode or command
372                          */
373                         ndelay(nsecs);
374                         bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
375                         ndelay(nsecs);
376                 }
377
378                 m->status = status;
379                 m->complete(m->context);
380
381                 /* restore speed and wordsize */
382                 if (setup_transfer)
383                         setup_transfer(spi, NULL);
384
385                 /* normally deactivate chipselect ... unless no error and
386                  * cs_change has hinted that the next message will probably
387                  * be for this chip too.
388                  */
389                 if (!(status == 0 && cs_change)) {
390                         ndelay(nsecs);
391                         bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
392                         ndelay(nsecs);
393                 }
394
395                 spin_lock_irqsave(&bitbang->lock, flags);
396         }
397         bitbang->busy = 0;
398         spin_unlock_irqrestore(&bitbang->lock, flags);
399 }
400
401 /**
402  * spi_bitbang_transfer - default submit to transfer queue
403  */
404 int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m)
405 {
406         struct spi_bitbang      *bitbang;
407         unsigned long           flags;
408
409         m->actual_length = 0;
410         m->status = -EINPROGRESS;
411
412         bitbang = spi_master_get_devdata(spi->master);
413         if (bitbang->shutdown)
414                 return -ESHUTDOWN;
415
416         spin_lock_irqsave(&bitbang->lock, flags);
417         list_add_tail(&m->queue, &bitbang->queue);
418         queue_work(bitbang->workqueue, &bitbang->work);
419         spin_unlock_irqrestore(&bitbang->lock, flags);
420
421         return 0;
422 }
423 EXPORT_SYMBOL_GPL(spi_bitbang_transfer);
424
425 /*----------------------------------------------------------------------*/
426
427 /**
428  * spi_bitbang_start - start up a polled/bitbanging SPI master driver
429  * @bitbang: driver handle
430  *
431  * Caller should have zero-initialized all parts of the structure, and then
432  * provided callbacks for chip selection and I/O loops.  If the master has
433  * a transfer method, its final step should call spi_bitbang_transfer; or,
434  * that's the default if the transfer routine is not initialized.  It should
435  * also set up the bus number and number of chipselects.
436  *
437  * For i/o loops, provide callbacks either per-word (for bitbanging, or for
438  * hardware that basically exposes a shift register) or per-spi_transfer
439  * (which takes better advantage of hardware like fifos or DMA engines).
440  *
441  * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup and
442  * spi_bitbang_cleanup to handle those spi master methods.  Those methods are
443  * the defaults if the bitbang->txrx_bufs routine isn't initialized.
444  *
445  * This routine registers the spi_master, which will process requests in a
446  * dedicated task, keeping IRQs unblocked most of the time.  To stop
447  * processing those requests, call spi_bitbang_stop().
448  */
449 int spi_bitbang_start(struct spi_bitbang *bitbang)
450 {
451         int     status;
452
453         if (!bitbang->master || !bitbang->chipselect)
454                 return -EINVAL;
455
456         INIT_WORK(&bitbang->work, bitbang_work, bitbang);
457         spin_lock_init(&bitbang->lock);
458         INIT_LIST_HEAD(&bitbang->queue);
459
460         if (!bitbang->master->transfer)
461                 bitbang->master->transfer = spi_bitbang_transfer;
462         if (!bitbang->txrx_bufs) {
463                 bitbang->use_dma = 0;
464                 bitbang->txrx_bufs = spi_bitbang_bufs;
465                 if (!bitbang->master->setup) {
466                         if (!bitbang->setup_transfer)
467                                 bitbang->setup_transfer =
468                                          spi_bitbang_setup_transfer;
469                         bitbang->master->setup = spi_bitbang_setup;
470                         bitbang->master->cleanup = spi_bitbang_cleanup;
471                 }
472         } else if (!bitbang->master->setup)
473                 return -EINVAL;
474
475         /* this task is the only thing to touch the SPI bits */
476         bitbang->busy = 0;
477         bitbang->workqueue = create_singlethread_workqueue(
478                         bitbang->master->cdev.dev->bus_id);
479         if (bitbang->workqueue == NULL) {
480                 status = -EBUSY;
481                 goto err1;
482         }
483
484         /* driver may get busy before register() returns, especially
485          * if someone registered boardinfo for devices
486          */
487         status = spi_register_master(bitbang->master);
488         if (status < 0)
489                 goto err2;
490
491         return status;
492
493 err2:
494         destroy_workqueue(bitbang->workqueue);
495 err1:
496         return status;
497 }
498 EXPORT_SYMBOL_GPL(spi_bitbang_start);
499
500 /**
501  * spi_bitbang_stop - stops the task providing spi communication
502  */
503 int spi_bitbang_stop(struct spi_bitbang *bitbang)
504 {
505         unsigned        limit = 500;
506
507         spin_lock_irq(&bitbang->lock);
508         bitbang->shutdown = 0;
509         while (!list_empty(&bitbang->queue) && limit--) {
510                 spin_unlock_irq(&bitbang->lock);
511
512                 dev_dbg(bitbang->master->cdev.dev, "wait for queue\n");
513                 msleep(10);
514
515                 spin_lock_irq(&bitbang->lock);
516         }
517         spin_unlock_irq(&bitbang->lock);
518         if (!list_empty(&bitbang->queue)) {
519                 dev_err(bitbang->master->cdev.dev, "queue didn't empty\n");
520                 return -EBUSY;
521         }
522
523         destroy_workqueue(bitbang->workqueue);
524
525         spi_unregister_master(bitbang->master);
526
527         return 0;
528 }
529 EXPORT_SYMBOL_GPL(spi_bitbang_stop);
530
531 MODULE_LICENSE("GPL");
532