[PATCH] SPI: spi_bitbang: clocking fixes
[linux-3.10.git] / drivers / spi / spi_bitbang.c
1 /*
2  * spi_bitbang.c - polling/bitbanging SPI master controller driver utilities
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
17  */
18
19 #include <linux/config.h>
20 #include <linux/init.h>
21 #include <linux/spinlock.h>
22 #include <linux/workqueue.h>
23 #include <linux/interrupt.h>
24 #include <linux/delay.h>
25 #include <linux/errno.h>
26 #include <linux/platform_device.h>
27
28 #include <linux/spi/spi.h>
29 #include <linux/spi/spi_bitbang.h>
30
31
32 /*----------------------------------------------------------------------*/
33
34 /*
35  * FIRST PART (OPTIONAL):  word-at-a-time spi_transfer support.
36  * Use this for GPIO or shift-register level hardware APIs.
37  *
38  * spi_bitbang_cs is in spi_device->controller_state, which is unavailable
39  * to glue code.  These bitbang setup() and cleanup() routines are always
40  * used, though maybe they're called from controller-aware code.
41  *
42  * chipselect() and friends may use use spi_device->controller_data and
43  * controller registers as appropriate.
44  *
45  *
46  * NOTE:  SPI controller pins can often be used as GPIO pins instead,
47  * which means you could use a bitbang driver either to get hardware
48  * working quickly, or testing for differences that aren't speed related.
49  */
50
51 struct spi_bitbang_cs {
52         unsigned        nsecs;  /* (clock cycle time)/2 */
53         u32             (*txrx_word)(struct spi_device *spi, unsigned nsecs,
54                                         u32 word, u8 bits);
55         unsigned        (*txrx_bufs)(struct spi_device *,
56                                         u32 (*txrx_word)(
57                                                 struct spi_device *spi,
58                                                 unsigned nsecs,
59                                                 u32 word, u8 bits),
60                                         unsigned, struct spi_transfer *);
61 };
62
63 static unsigned bitbang_txrx_8(
64         struct spi_device       *spi,
65         u32                     (*txrx_word)(struct spi_device *spi,
66                                         unsigned nsecs,
67                                         u32 word, u8 bits),
68         unsigned                ns,
69         struct spi_transfer     *t
70 ) {
71         unsigned                bits = spi->bits_per_word;
72         unsigned                count = t->len;
73         const u8                *tx = t->tx_buf;
74         u8                      *rx = t->rx_buf;
75
76         while (likely(count > 0)) {
77                 u8              word = 0;
78
79                 if (tx)
80                         word = *tx++;
81                 word = txrx_word(spi, ns, word, bits);
82                 if (rx)
83                         *rx++ = word;
84                 count -= 1;
85         }
86         return t->len - count;
87 }
88
89 static unsigned bitbang_txrx_16(
90         struct spi_device       *spi,
91         u32                     (*txrx_word)(struct spi_device *spi,
92                                         unsigned nsecs,
93                                         u32 word, u8 bits),
94         unsigned                ns,
95         struct spi_transfer     *t
96 ) {
97         unsigned                bits = spi->bits_per_word;
98         unsigned                count = t->len;
99         const u16               *tx = t->tx_buf;
100         u16                     *rx = t->rx_buf;
101
102         while (likely(count > 1)) {
103                 u16             word = 0;
104
105                 if (tx)
106                         word = *tx++;
107                 word = txrx_word(spi, ns, word, bits);
108                 if (rx)
109                         *rx++ = word;
110                 count -= 2;
111         }
112         return t->len - count;
113 }
114
115 static unsigned bitbang_txrx_32(
116         struct spi_device       *spi,
117         u32                     (*txrx_word)(struct spi_device *spi,
118                                         unsigned nsecs,
119                                         u32 word, u8 bits),
120         unsigned                ns,
121         struct spi_transfer     *t
122 ) {
123         unsigned                bits = spi->bits_per_word;
124         unsigned                count = t->len;
125         const u32               *tx = t->tx_buf;
126         u32                     *rx = t->rx_buf;
127
128         while (likely(count > 3)) {
129                 u32             word = 0;
130
131                 if (tx)
132                         word = *tx++;
133                 word = txrx_word(spi, ns, word, bits);
134                 if (rx)
135                         *rx++ = word;
136                 count -= 4;
137         }
138         return t->len - count;
139 }
140
141 int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
142 {
143         struct spi_bitbang_cs   *cs = spi->controller_state;
144         u8                      bits_per_word;
145         u32                     hz;
146
147         if (t) {
148                 bits_per_word = t->bits_per_word;
149                 hz = t->speed_hz;
150         } else {
151                 bits_per_word = 0;
152                 hz = 0;
153         }
154
155         /* spi_transfer level calls that work per-word */
156         if (!bits_per_word)
157                 bits_per_word = spi->bits_per_word;
158         if (bits_per_word <= 8)
159                 cs->txrx_bufs = bitbang_txrx_8;
160         else if (bits_per_word <= 16)
161                 cs->txrx_bufs = bitbang_txrx_16;
162         else if (bits_per_word <= 32)
163                 cs->txrx_bufs = bitbang_txrx_32;
164         else
165                 return -EINVAL;
166
167         /* nsecs = (clock period)/2 */
168         if (!hz)
169                 hz = spi->max_speed_hz;
170         if (hz) {
171                 cs->nsecs = (1000000000/2) / hz;
172                 if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
173                         return -EINVAL;
174         }
175
176         return 0;
177 }
178 EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
179
180 /**
181  * spi_bitbang_setup - default setup for per-word I/O loops
182  */
183 int spi_bitbang_setup(struct spi_device *spi)
184 {
185         struct spi_bitbang_cs   *cs = spi->controller_state;
186         struct spi_bitbang      *bitbang;
187         int                     retval;
188
189         bitbang = spi_master_get_devdata(spi->master);
190
191         /* REVISIT: some systems will want to support devices using lsb-first
192          * bit encodings on the wire.  In pure software that would be trivial,
193          * just bitbang_txrx_le_cphaX() routines shifting the other way, and
194          * some hardware controllers also have this support.
195          */
196         if ((spi->mode & SPI_LSB_FIRST) != 0)
197                 return -EINVAL;
198
199         if (!cs) {
200                 cs = kzalloc(sizeof *cs, SLAB_KERNEL);
201                 if (!cs)
202                         return -ENOMEM;
203                 spi->controller_state = cs;
204         }
205
206         if (!spi->bits_per_word)
207                 spi->bits_per_word = 8;
208
209         /* per-word shift register access, in hardware or bitbanging */
210         cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
211         if (!cs->txrx_word)
212                 return -EINVAL;
213
214         retval = spi_bitbang_setup_transfer(spi, NULL);
215         if (retval < 0)
216                 return retval;
217
218         dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec/bit\n",
219                         __FUNCTION__, spi->mode & (SPI_CPOL | SPI_CPHA),
220                         spi->bits_per_word, 2 * cs->nsecs);
221
222         /* NOTE we _need_ to call chipselect() early, ideally with adapter
223          * setup, unless the hardware defaults cooperate to avoid confusion
224          * between normal (active low) and inverted chipselects.
225          */
226
227         /* deselect chip (low or high) */
228         spin_lock(&bitbang->lock);
229         if (!bitbang->busy) {
230                 bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
231                 ndelay(cs->nsecs);
232         }
233         spin_unlock(&bitbang->lock);
234
235         return 0;
236 }
237 EXPORT_SYMBOL_GPL(spi_bitbang_setup);
238
239 /**
240  * spi_bitbang_cleanup - default cleanup for per-word I/O loops
241  */
242 void spi_bitbang_cleanup(const struct spi_device *spi)
243 {
244         kfree(spi->controller_state);
245 }
246 EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
247
248 static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
249 {
250         struct spi_bitbang_cs   *cs = spi->controller_state;
251         unsigned                nsecs = cs->nsecs;
252
253         return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t);
254 }
255
256 /*----------------------------------------------------------------------*/
257
258 /*
259  * SECOND PART ... simple transfer queue runner.
260  *
261  * This costs a task context per controller, running the queue by
262  * performing each transfer in sequence.  Smarter hardware can queue
263  * several DMA transfers at once, and process several controller queues
264  * in parallel; this driver doesn't match such hardware very well.
265  *
266  * Drivers can provide word-at-a-time i/o primitives, or provide
267  * transfer-at-a-time ones to leverage dma or fifo hardware.
268  */
269 static void bitbang_work(void *_bitbang)
270 {
271         struct spi_bitbang      *bitbang = _bitbang;
272         unsigned long           flags;
273
274         spin_lock_irqsave(&bitbang->lock, flags);
275         bitbang->busy = 1;
276         while (!list_empty(&bitbang->queue)) {
277                 struct spi_message      *m;
278                 struct spi_device       *spi;
279                 unsigned                nsecs;
280                 struct spi_transfer     *t = NULL;
281                 unsigned                tmp;
282                 unsigned                cs_change;
283                 int                     status;
284                 int                     (*setup_transfer)(struct spi_device *,
285                                                 struct spi_transfer *);
286
287                 m = container_of(bitbang->queue.next, struct spi_message,
288                                 queue);
289                 list_del_init(&m->queue);
290                 spin_unlock_irqrestore(&bitbang->lock, flags);
291
292                 /* FIXME this is made-up ... the correct value is known to
293                  * word-at-a-time bitbang code, and presumably chipselect()
294                  * should enforce these requirements too?
295                  */
296                 nsecs = 100;
297
298                 spi = m->spi;
299                 tmp = 0;
300                 cs_change = 1;
301                 status = 0;
302                 setup_transfer = NULL;
303
304                 list_for_each_entry (t, &m->transfers, transfer_list) {
305                         if (bitbang->shutdown) {
306                                 status = -ESHUTDOWN;
307                                 break;
308                         }
309
310                         /* override or restore speed and wordsize */
311                         if (t->speed_hz || t->bits_per_word) {
312                                 setup_transfer = bitbang->setup_transfer;
313                                 if (!setup_transfer) {
314                                         status = -ENOPROTOOPT;
315                                         break;
316                                 }
317                         }
318                         if (setup_transfer) {
319                                 status = setup_transfer(spi, t);
320                                 if (status < 0)
321                                         break;
322                         }
323
324                         /* set up default clock polarity, and activate chip;
325                          * this implicitly updates clock and spi modes as
326                          * previously recorded for this device via setup().
327                          * (and also deselects any other chip that might be
328                          * selected ...)
329                          */
330                         if (cs_change) {
331                                 bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
332                                 ndelay(nsecs);
333                         }
334                         cs_change = t->cs_change;
335                         if (!t->tx_buf && !t->rx_buf && t->len) {
336                                 status = -EINVAL;
337                                 break;
338                         }
339
340                         /* transfer data.  the lower level code handles any
341                          * new dma mappings it needs. our caller always gave
342                          * us dma-safe buffers.
343                          */
344                         if (t->len) {
345                                 /* REVISIT dma API still needs a designated
346                                  * DMA_ADDR_INVALID; ~0 might be better.
347                                  */
348                                 if (!m->is_dma_mapped)
349                                         t->rx_dma = t->tx_dma = 0;
350                                 status = bitbang->txrx_bufs(spi, t);
351                         }
352                         if (status != t->len) {
353                                 if (status > 0)
354                                         status = -EMSGSIZE;
355                                 break;
356                         }
357                         m->actual_length += status;
358                         status = 0;
359
360                         /* protocol tweaks before next transfer */
361                         if (t->delay_usecs)
362                                 udelay(t->delay_usecs);
363
364                         if (!cs_change)
365                                 continue;
366                         if (t->transfer_list.next == &m->transfers)
367                                 break;
368
369                         /* sometimes a short mid-message deselect of the chip
370                          * may be needed to terminate a mode or command
371                          */
372                         ndelay(nsecs);
373                         bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
374                         ndelay(nsecs);
375                 }
376
377                 m->status = status;
378                 m->complete(m->context);
379
380                 /* restore speed and wordsize */
381                 if (setup_transfer)
382                         setup_transfer(spi, NULL);
383
384                 /* normally deactivate chipselect ... unless no error and
385                  * cs_change has hinted that the next message will probably
386                  * be for this chip too.
387                  */
388                 if (!(status == 0 && cs_change)) {
389                         ndelay(nsecs);
390                         bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
391                         ndelay(nsecs);
392                 }
393
394                 spin_lock_irqsave(&bitbang->lock, flags);
395         }
396         bitbang->busy = 0;
397         spin_unlock_irqrestore(&bitbang->lock, flags);
398 }
399
400 /**
401  * spi_bitbang_transfer - default submit to transfer queue
402  */
403 int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m)
404 {
405         struct spi_bitbang      *bitbang;
406         unsigned long           flags;
407         int                     status = 0;
408
409         m->actual_length = 0;
410         m->status = -EINPROGRESS;
411
412         bitbang = spi_master_get_devdata(spi->master);
413         if (bitbang->shutdown)
414                 return -ESHUTDOWN;
415
416         spin_lock_irqsave(&bitbang->lock, flags);
417         if (!spi->max_speed_hz)
418                 status = -ENETDOWN;
419         else {
420                 list_add_tail(&m->queue, &bitbang->queue);
421                 queue_work(bitbang->workqueue, &bitbang->work);
422         }
423         spin_unlock_irqrestore(&bitbang->lock, flags);
424
425         return status;
426 }
427 EXPORT_SYMBOL_GPL(spi_bitbang_transfer);
428
429 /*----------------------------------------------------------------------*/
430
431 /**
432  * spi_bitbang_start - start up a polled/bitbanging SPI master driver
433  * @bitbang: driver handle
434  *
435  * Caller should have zero-initialized all parts of the structure, and then
436  * provided callbacks for chip selection and I/O loops.  If the master has
437  * a transfer method, its final step should call spi_bitbang_transfer; or,
438  * that's the default if the transfer routine is not initialized.  It should
439  * also set up the bus number and number of chipselects.
440  *
441  * For i/o loops, provide callbacks either per-word (for bitbanging, or for
442  * hardware that basically exposes a shift register) or per-spi_transfer
443  * (which takes better advantage of hardware like fifos or DMA engines).
444  *
445  * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup and
446  * spi_bitbang_cleanup to handle those spi master methods.  Those methods are
447  * the defaults if the bitbang->txrx_bufs routine isn't initialized.
448  *
449  * This routine registers the spi_master, which will process requests in a
450  * dedicated task, keeping IRQs unblocked most of the time.  To stop
451  * processing those requests, call spi_bitbang_stop().
452  */
453 int spi_bitbang_start(struct spi_bitbang *bitbang)
454 {
455         int     status;
456
457         if (!bitbang->master || !bitbang->chipselect)
458                 return -EINVAL;
459
460         INIT_WORK(&bitbang->work, bitbang_work, bitbang);
461         spin_lock_init(&bitbang->lock);
462         INIT_LIST_HEAD(&bitbang->queue);
463
464         if (!bitbang->master->transfer)
465                 bitbang->master->transfer = spi_bitbang_transfer;
466         if (!bitbang->txrx_bufs) {
467                 bitbang->use_dma = 0;
468                 bitbang->txrx_bufs = spi_bitbang_bufs;
469                 if (!bitbang->master->setup) {
470                         if (!bitbang->setup_transfer)
471                                 bitbang->setup_transfer =
472                                          spi_bitbang_setup_transfer;
473                         bitbang->master->setup = spi_bitbang_setup;
474                         bitbang->master->cleanup = spi_bitbang_cleanup;
475                 }
476         } else if (!bitbang->master->setup)
477                 return -EINVAL;
478
479         /* this task is the only thing to touch the SPI bits */
480         bitbang->busy = 0;
481         bitbang->workqueue = create_singlethread_workqueue(
482                         bitbang->master->cdev.dev->bus_id);
483         if (bitbang->workqueue == NULL) {
484                 status = -EBUSY;
485                 goto err1;
486         }
487
488         /* driver may get busy before register() returns, especially
489          * if someone registered boardinfo for devices
490          */
491         status = spi_register_master(bitbang->master);
492         if (status < 0)
493                 goto err2;
494
495         return status;
496
497 err2:
498         destroy_workqueue(bitbang->workqueue);
499 err1:
500         return status;
501 }
502 EXPORT_SYMBOL_GPL(spi_bitbang_start);
503
504 /**
505  * spi_bitbang_stop - stops the task providing spi communication
506  */
507 int spi_bitbang_stop(struct spi_bitbang *bitbang)
508 {
509         unsigned        limit = 500;
510
511         spin_lock_irq(&bitbang->lock);
512         bitbang->shutdown = 0;
513         while (!list_empty(&bitbang->queue) && limit--) {
514                 spin_unlock_irq(&bitbang->lock);
515
516                 dev_dbg(bitbang->master->cdev.dev, "wait for queue\n");
517                 msleep(10);
518
519                 spin_lock_irq(&bitbang->lock);
520         }
521         spin_unlock_irq(&bitbang->lock);
522         if (!list_empty(&bitbang->queue)) {
523                 dev_err(bitbang->master->cdev.dev, "queue didn't empty\n");
524                 return -EBUSY;
525         }
526
527         destroy_workqueue(bitbang->workqueue);
528
529         spi_unregister_master(bitbang->master);
530
531         return 0;
532 }
533 EXPORT_SYMBOL_GPL(spi_bitbang_stop);
534
535 MODULE_LICENSE("GPL");
536