rtc: rtc interfaces don't use class_device
[linux-3.10.git] / drivers / rtc / rtc-vr41xx.c
1 /*
2  *  Driver for NEC VR4100 series Real Time Clock unit.
3  *
4  *  Copyright (C) 2003-2006  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5  *
6  *  This program is free software; you can redistribute it and/or modify
7  *  it under the terms of the GNU General Public License as published by
8  *  the Free Software Foundation; either version 2 of the License, or
9  *  (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *  GNU General Public License for more details.
15  *
16  *  You should have received a copy of the GNU General Public License
17  *  along with this program; if not, write to the Free Software
18  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19  */
20 #include <linux/fs.h>
21 #include <linux/init.h>
22 #include <linux/ioport.h>
23 #include <linux/irq.h>
24 #include <linux/module.h>
25 #include <linux/platform_device.h>
26 #include <linux/rtc.h>
27 #include <linux/spinlock.h>
28 #include <linux/types.h>
29
30 #include <asm/div64.h>
31 #include <asm/io.h>
32 #include <asm/uaccess.h>
33 #include <asm/vr41xx/irq.h>
34
35 MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
36 MODULE_DESCRIPTION("NEC VR4100 series RTC driver");
37 MODULE_LICENSE("GPL");
38
39 #define RTC1_TYPE1_START        0x0b0000c0UL
40 #define RTC1_TYPE1_END          0x0b0000dfUL
41 #define RTC2_TYPE1_START        0x0b0001c0UL
42 #define RTC2_TYPE1_END          0x0b0001dfUL
43
44 #define RTC1_TYPE2_START        0x0f000100UL
45 #define RTC1_TYPE2_END          0x0f00011fUL
46 #define RTC2_TYPE2_START        0x0f000120UL
47 #define RTC2_TYPE2_END          0x0f00013fUL
48
49 #define RTC1_SIZE               0x20
50 #define RTC2_SIZE               0x20
51
52 /* RTC 1 registers */
53 #define ETIMELREG               0x00
54 #define ETIMEMREG               0x02
55 #define ETIMEHREG               0x04
56 /* RFU */
57 #define ECMPLREG                0x08
58 #define ECMPMREG                0x0a
59 #define ECMPHREG                0x0c
60 /* RFU */
61 #define RTCL1LREG               0x10
62 #define RTCL1HREG               0x12
63 #define RTCL1CNTLREG            0x14
64 #define RTCL1CNTHREG            0x16
65 #define RTCL2LREG               0x18
66 #define RTCL2HREG               0x1a
67 #define RTCL2CNTLREG            0x1c
68 #define RTCL2CNTHREG            0x1e
69
70 /* RTC 2 registers */
71 #define TCLKLREG                0x00
72 #define TCLKHREG                0x02
73 #define TCLKCNTLREG             0x04
74 #define TCLKCNTHREG             0x06
75 /* RFU */
76 #define RTCINTREG               0x1e
77  #define TCLOCK_INT             0x08
78  #define RTCLONG2_INT           0x04
79  #define RTCLONG1_INT           0x02
80  #define ELAPSEDTIME_INT        0x01
81
82 #define RTC_FREQUENCY           32768
83 #define MAX_PERIODIC_RATE       6553
84
85 static void __iomem *rtc1_base;
86 static void __iomem *rtc2_base;
87
88 #define rtc1_read(offset)               readw(rtc1_base + (offset))
89 #define rtc1_write(offset, value)       writew((value), rtc1_base + (offset))
90
91 #define rtc2_read(offset)               readw(rtc2_base + (offset))
92 #define rtc2_write(offset, value)       writew((value), rtc2_base + (offset))
93
94 static unsigned long epoch = 1970;      /* Jan 1 1970 00:00:00 */
95
96 static DEFINE_SPINLOCK(rtc_lock);
97 static char rtc_name[] = "RTC";
98 static unsigned long periodic_frequency;
99 static unsigned long periodic_count;
100
101 struct resource rtc_resource[2] = {
102         {       .name   = rtc_name,
103                 .flags  = IORESOURCE_MEM,       },
104         {       .name   = rtc_name,
105                 .flags  = IORESOURCE_MEM,       },
106 };
107
108 static inline unsigned long read_elapsed_second(void)
109 {
110
111         unsigned long first_low, first_mid, first_high;
112
113         unsigned long second_low, second_mid, second_high;
114
115         do {
116                 first_low = rtc1_read(ETIMELREG);
117                 first_mid = rtc1_read(ETIMEMREG);
118                 first_high = rtc1_read(ETIMEHREG);
119                 second_low = rtc1_read(ETIMELREG);
120                 second_mid = rtc1_read(ETIMEMREG);
121                 second_high = rtc1_read(ETIMEHREG);
122         } while (first_low != second_low || first_mid != second_mid ||
123                  first_high != second_high);
124
125         return (first_high << 17) | (first_mid << 1) | (first_low >> 15);
126 }
127
128 static inline void write_elapsed_second(unsigned long sec)
129 {
130         spin_lock_irq(&rtc_lock);
131
132         rtc1_write(ETIMELREG, (uint16_t)(sec << 15));
133         rtc1_write(ETIMEMREG, (uint16_t)(sec >> 1));
134         rtc1_write(ETIMEHREG, (uint16_t)(sec >> 17));
135
136         spin_unlock_irq(&rtc_lock);
137 }
138
139 static void vr41xx_rtc_release(struct device *dev)
140 {
141
142         spin_lock_irq(&rtc_lock);
143
144         rtc1_write(ECMPLREG, 0);
145         rtc1_write(ECMPMREG, 0);
146         rtc1_write(ECMPHREG, 0);
147         rtc1_write(RTCL1LREG, 0);
148         rtc1_write(RTCL1HREG, 0);
149
150         spin_unlock_irq(&rtc_lock);
151
152         disable_irq(ELAPSEDTIME_IRQ);
153         disable_irq(RTCLONG1_IRQ);
154 }
155
156 static int vr41xx_rtc_read_time(struct device *dev, struct rtc_time *time)
157 {
158         unsigned long epoch_sec, elapsed_sec;
159
160         epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
161         elapsed_sec = read_elapsed_second();
162
163         rtc_time_to_tm(epoch_sec + elapsed_sec, time);
164
165         return 0;
166 }
167
168 static int vr41xx_rtc_set_time(struct device *dev, struct rtc_time *time)
169 {
170         unsigned long epoch_sec, current_sec;
171
172         epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
173         current_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
174                              time->tm_hour, time->tm_min, time->tm_sec);
175
176         write_elapsed_second(current_sec - epoch_sec);
177
178         return 0;
179 }
180
181 static int vr41xx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
182 {
183         unsigned long low, mid, high;
184         struct rtc_time *time = &wkalrm->time;
185
186         spin_lock_irq(&rtc_lock);
187
188         low = rtc1_read(ECMPLREG);
189         mid = rtc1_read(ECMPMREG);
190         high = rtc1_read(ECMPHREG);
191
192         spin_unlock_irq(&rtc_lock);
193
194         rtc_time_to_tm((high << 17) | (mid << 1) | (low >> 15), time);
195
196         return 0;
197 }
198
199 static int vr41xx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
200 {
201         unsigned long alarm_sec;
202         struct rtc_time *time = &wkalrm->time;
203
204         alarm_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
205                            time->tm_hour, time->tm_min, time->tm_sec);
206
207         spin_lock_irq(&rtc_lock);
208
209         rtc1_write(ECMPLREG, (uint16_t)(alarm_sec << 15));
210         rtc1_write(ECMPMREG, (uint16_t)(alarm_sec >> 1));
211         rtc1_write(ECMPHREG, (uint16_t)(alarm_sec >> 17));
212
213         spin_unlock_irq(&rtc_lock);
214
215         return 0;
216 }
217
218 static int vr41xx_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
219 {
220         unsigned long count;
221
222         switch (cmd) {
223         case RTC_AIE_ON:
224                 enable_irq(ELAPSEDTIME_IRQ);
225                 break;
226         case RTC_AIE_OFF:
227                 disable_irq(ELAPSEDTIME_IRQ);
228                 break;
229         case RTC_PIE_ON:
230                 enable_irq(RTCLONG1_IRQ);
231                 break;
232         case RTC_PIE_OFF:
233                 disable_irq(RTCLONG1_IRQ);
234                 break;
235         case RTC_IRQP_READ:
236                 return put_user(periodic_frequency, (unsigned long __user *)arg);
237                 break;
238         case RTC_IRQP_SET:
239                 if (arg > MAX_PERIODIC_RATE)
240                         return -EINVAL;
241
242                 periodic_frequency = arg;
243
244                 count = RTC_FREQUENCY;
245                 do_div(count, arg);
246
247                 periodic_count = count;
248
249                 spin_lock_irq(&rtc_lock);
250
251                 rtc1_write(RTCL1LREG, count);
252                 rtc1_write(RTCL1HREG, count >> 16);
253
254                 spin_unlock_irq(&rtc_lock);
255                 break;
256         case RTC_EPOCH_READ:
257                 return put_user(epoch, (unsigned long __user *)arg);
258         case RTC_EPOCH_SET:
259                 /* Doesn't support before 1900 */
260                 if (arg < 1900)
261                         return -EINVAL;
262                 epoch = arg;
263                 break;
264         default:
265                 return -ENOIOCTLCMD;
266         }
267
268         return 0;
269 }
270
271 static irqreturn_t elapsedtime_interrupt(int irq, void *dev_id)
272 {
273         struct platform_device *pdev = (struct platform_device *)dev_id;
274         struct rtc_device *rtc = platform_get_drvdata(pdev);
275
276         rtc2_write(RTCINTREG, ELAPSEDTIME_INT);
277
278         rtc_update_irq(rtc, 1, RTC_AF);
279
280         return IRQ_HANDLED;
281 }
282
283 static irqreturn_t rtclong1_interrupt(int irq, void *dev_id)
284 {
285         struct platform_device *pdev = (struct platform_device *)dev_id;
286         struct rtc_device *rtc = platform_get_drvdata(pdev);
287         unsigned long count = periodic_count;
288
289         rtc2_write(RTCINTREG, RTCLONG1_INT);
290
291         rtc1_write(RTCL1LREG, count);
292         rtc1_write(RTCL1HREG, count >> 16);
293
294         rtc_update_irq(rtc, 1, RTC_PF);
295
296         return IRQ_HANDLED;
297 }
298
299 static const struct rtc_class_ops vr41xx_rtc_ops = {
300         .release        = vr41xx_rtc_release,
301         .ioctl          = vr41xx_rtc_ioctl,
302         .read_time      = vr41xx_rtc_read_time,
303         .set_time       = vr41xx_rtc_set_time,
304         .read_alarm     = vr41xx_rtc_read_alarm,
305         .set_alarm      = vr41xx_rtc_set_alarm,
306 };
307
308 static int __devinit rtc_probe(struct platform_device *pdev)
309 {
310         struct rtc_device *rtc;
311         unsigned int irq;
312         int retval;
313
314         if (pdev->num_resources != 2)
315                 return -EBUSY;
316
317         rtc1_base = ioremap(pdev->resource[0].start, RTC1_SIZE);
318         if (rtc1_base == NULL)
319                 return -EBUSY;
320
321         rtc2_base = ioremap(pdev->resource[1].start, RTC2_SIZE);
322         if (rtc2_base == NULL) {
323                 iounmap(rtc1_base);
324                 rtc1_base = NULL;
325                 return -EBUSY;
326         }
327
328         rtc = rtc_device_register(rtc_name, &pdev->dev, &vr41xx_rtc_ops, THIS_MODULE);
329         if (IS_ERR(rtc)) {
330                 iounmap(rtc1_base);
331                 iounmap(rtc2_base);
332                 rtc1_base = NULL;
333                 rtc2_base = NULL;
334                 return PTR_ERR(rtc);
335         }
336
337         spin_lock_irq(&rtc_lock);
338
339         rtc1_write(ECMPLREG, 0);
340         rtc1_write(ECMPMREG, 0);
341         rtc1_write(ECMPHREG, 0);
342         rtc1_write(RTCL1LREG, 0);
343         rtc1_write(RTCL1HREG, 0);
344
345         spin_unlock_irq(&rtc_lock);
346
347         irq = ELAPSEDTIME_IRQ;
348         retval = request_irq(irq, elapsedtime_interrupt, IRQF_DISABLED,
349                              "elapsed_time", pdev);
350         if (retval == 0) {
351                 irq = RTCLONG1_IRQ;
352                 retval = request_irq(irq, rtclong1_interrupt, IRQF_DISABLED,
353                                      "rtclong1", pdev);
354         }
355
356         if (retval < 0) {
357                 printk(KERN_ERR "rtc: IRQ%d is busy\n", irq);
358                 rtc_device_unregister(rtc);
359                 if (irq == RTCLONG1_IRQ)
360                         free_irq(ELAPSEDTIME_IRQ, NULL);
361                 iounmap(rtc1_base);
362                 iounmap(rtc2_base);
363                 rtc1_base = NULL;
364                 rtc2_base = NULL;
365                 return retval;
366         }
367
368         platform_set_drvdata(pdev, rtc);
369
370         disable_irq(ELAPSEDTIME_IRQ);
371         disable_irq(RTCLONG1_IRQ);
372
373         printk(KERN_INFO "rtc: Real Time Clock of NEC VR4100 series\n");
374
375         return 0;
376 }
377
378 static int __devexit rtc_remove(struct platform_device *pdev)
379 {
380         struct rtc_device *rtc;
381
382         rtc = platform_get_drvdata(pdev);
383         if (rtc != NULL)
384                 rtc_device_unregister(rtc);
385
386         platform_set_drvdata(pdev, NULL);
387
388         free_irq(ELAPSEDTIME_IRQ, NULL);
389         free_irq(RTCLONG1_IRQ, NULL);
390         if (rtc1_base != NULL)
391                 iounmap(rtc1_base);
392         if (rtc2_base != NULL)
393                 iounmap(rtc2_base);
394
395         return 0;
396 }
397
398 static struct platform_device *rtc_platform_device;
399
400 static struct platform_driver rtc_platform_driver = {
401         .probe          = rtc_probe,
402         .remove         = __devexit_p(rtc_remove),
403         .driver         = {
404                 .name   = rtc_name,
405                 .owner  = THIS_MODULE,
406         },
407 };
408
409 static int __init vr41xx_rtc_init(void)
410 {
411         int retval;
412
413         switch (current_cpu_data.cputype) {
414         case CPU_VR4111:
415         case CPU_VR4121:
416                 rtc_resource[0].start = RTC1_TYPE1_START;
417                 rtc_resource[0].end = RTC1_TYPE1_END;
418                 rtc_resource[1].start = RTC2_TYPE1_START;
419                 rtc_resource[1].end = RTC2_TYPE1_END;
420                 break;
421         case CPU_VR4122:
422         case CPU_VR4131:
423         case CPU_VR4133:
424                 rtc_resource[0].start = RTC1_TYPE2_START;
425                 rtc_resource[0].end = RTC1_TYPE2_END;
426                 rtc_resource[1].start = RTC2_TYPE2_START;
427                 rtc_resource[1].end = RTC2_TYPE2_END;
428                 break;
429         default:
430                 return -ENODEV;
431                 break;
432         }
433
434         rtc_platform_device = platform_device_alloc("RTC", -1);
435         if (rtc_platform_device == NULL)
436                 return -ENOMEM;
437
438         retval = platform_device_add_resources(rtc_platform_device,
439                                 rtc_resource, ARRAY_SIZE(rtc_resource));
440
441         if (retval == 0)
442                 retval = platform_device_add(rtc_platform_device);
443
444         if (retval < 0) {
445                 platform_device_put(rtc_platform_device);
446                 return retval;
447         }
448
449         retval = platform_driver_register(&rtc_platform_driver);
450         if (retval < 0)
451                 platform_device_unregister(rtc_platform_device);
452
453         return retval;
454 }
455
456 static void __exit vr41xx_rtc_exit(void)
457 {
458         platform_driver_unregister(&rtc_platform_driver);
459         platform_device_unregister(rtc_platform_device);
460 }
461
462 module_init(vr41xx_rtc_init);
463 module_exit(vr41xx_rtc_exit);