drivers/platform/tegra/tegra_usb_pmc.c

   1 /*
   2  * Copyright (C) 2013 NVIDIA Corporation
   3  *
   4  * This software is licensed under the terms of the GNU General Public
   5  * License version 2, as published by the Free Software Foundation, and
   6  * may be copied, distributed, and modified under those terms.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  */
  14 #include <linux/export.h>
  15 #include <linux/resource.h>
  16 #include <linux/delay.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/slab.h>
  19 #include <linux/err.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/io.h>
  22 #include <linux/gpio.h>
  23 #include <linux/usb/ulpi.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/clk.h>
  26 #include <linux/regulator/consumer.h>
  27 #include <linux/platform_data/tegra_usb.h>
  28 #include <mach/clk.h>
  29 #include <mach/pinmux.h>
  30 #include <mach/pinmux-t11.h>
  31 #include <mach/tegra_usb_pmc.h>
  32
  33 #include "../../../arch/arm/mach-tegra/iomap.h"
  34
  35 static void __iomem *pmc_base;
  36 static unsigned long flags;
  37 static DEFINE_SPINLOCK(pmc_lock);
  38
  39 #ifdef KERNEL_WARNING
  40 static void usb_phy_power_down_pmc(struct tegra_usb_pmc_data *pmc_data)
  41 {
  42         unsigned long val;
  43
  44         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, pmc_data->instance);
  45
  46         spin_lock_irqsave(&pmc_lock, flags);
  47
  48         /* power down all 3 UTMIP interfaces */
  49         val = readl(pmc_base + PMC_UTMIP_MASTER_CONFIG);
  50         val |= UTMIP_PWR(0) | UTMIP_PWR(1) | UTMIP_PWR(2);
  51         writel(val, pmc_base + PMC_UTMIP_MASTER_CONFIG);
  52
  53         /* turn on pad detectors */
  54         writel(PMC_POWER_DOWN_MASK, pmc_base + PMC_USB_AO);
  55
  56         /* setup sleep walk fl all 3 usb controllers */
  57         val = UTMIP_USBOP_RPD_A | UTMIP_USBON_RPD_A | UTMIP_HIGHZ_A |
  58                 UTMIP_USBOP_RPD_B | UTMIP_USBON_RPD_B | UTMIP_HIGHZ_B |
  59                 UTMIP_USBOP_RPD_C | UTMIP_USBON_RPD_C | UTMIP_HIGHZ_C |
  60                 UTMIP_USBOP_RPD_D | UTMIP_USBON_RPD_D | UTMIP_HIGHZ_D;
  61         writel(val, pmc_base + PMC_SLEEPWALK_REG(0));
  62         writel(val, pmc_base + PMC_SLEEPWALK_REG(1));
  63         writel(val, pmc_base + PMC_SLEEPWALK_REG(2));
  64
  65         /* enable pull downs on HSIC PMC */
  66         val = UHSIC_STROBE_RPD_A | UHSIC_DATA_RPD_A | UHSIC_STROBE_RPD_B |
  67                 UHSIC_DATA_RPD_B | UHSIC_STROBE_RPD_C | UHSIC_DATA_RPD_C |
  68                 UHSIC_STROBE_RPD_D | UHSIC_DATA_RPD_D;
  69         writel(val, pmc_base + PMC_SLEEPWALK_UHSIC);
  70
  71         /* Turn over pad configuration to PMC */
  72         val = readl(pmc_base + PMC_SLEEP_CFG);
  73         val &= ~UTMIP_WAKE_VAL(0, ~0);
  74         val &= ~UTMIP_WAKE_VAL(1, ~0);
  75         val &= ~UTMIP_WAKE_VAL(2, ~0);
  76         val &= ~UHSIC_WAKE_VAL_P0(~0);
  77         val |= UTMIP_WAKE_VAL(0, WAKE_VAL_NONE) |
  78         UHSIC_WAKE_VAL_P0(WAKE_VAL_NONE) |
  79         UTMIP_WAKE_VAL(1, WAKE_VAL_NONE) | UTMIP_WAKE_VAL(2, WAKE_VAL_NONE) |
  80         UTMIP_RCTRL_USE_PMC(0) | UTMIP_RCTRL_USE_PMC(1) |
  81         UTMIP_RCTRL_USE_PMC(2) |
  82         UTMIP_TCTRL_USE_PMC(0) | UTMIP_TCTRL_USE_PMC(1) |
  83         UTMIP_TCTRL_USE_PMC(2) |
  84         UTMIP_FSLS_USE_PMC(0) | UTMIP_FSLS_USE_PMC(1) |
  85         UTMIP_FSLS_USE_PMC(2) |
  86         UTMIP_MASTER_ENABLE(0) | UTMIP_MASTER_ENABLE(1) |
  87         UTMIP_MASTER_ENABLE(2) |
  88         UHSIC_MASTER_ENABLE_P0;
  89         writel(val, pmc_base + PMC_SLEEP_CFG);
  90
  91         spin_unlock_irqrestore(&pmc_lock, flags);
  92 }
  93 #endif
  94
  95 static void utmip_setup_pmc_wake_detect(struct tegra_usb_pmc_data *pmc_data)
  96 {
  97         unsigned long val, pmc_pad_cfg_val;
  98         unsigned  int inst = pmc_data->instance;
  99
 100         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, pmc_data->instance);
 101
 102         spin_lock_irqsave(&pmc_lock, flags);
 103
 104         /*Set PMC MASTER bits to do the following
 105         * a. Take over the UTMI drivers
 106         * b. set up such that it will take over resume
 107         *        if remote wakeup is detected
 108         * Prepare PMC to take over suspend-wake detect-drive resume until USB
 109         * controller ready
 110         */
 111
 112         /* disable master enable in PMC */
 113         val = readl(pmc_base + PMC_SLEEP_CFG);
 114         val &= ~UTMIP_MASTER_ENABLE(inst);
 115         writel(val, pmc_base + PMC_SLEEP_CFG);
 116
 117         /* UTMIP_PWR_PX=1 for power savings mode */
 118         val = readl(pmc_base + PMC_UTMIP_MASTER_CONFIG);
 119         val |= UTMIP_PWR(inst);
 120         writel(val, pmc_base + PMC_UTMIP_MASTER_CONFIG);
 121
 122         /* config debouncer */
 123         val = readl(pmc_base + PMC_USB_DEBOUNCE);
 124         val &= ~UTMIP_LINE_DEB_CNT(~0);
 125         val |= UTMIP_LINE_DEB_CNT(1);
 126         val |= PMC_USB_DEBOUNCE_VAL(2);
 127         writel(val, pmc_base + PMC_USB_DEBOUNCE);
 128
 129         /* Make sure nothing is happening on the line with respect to PMC */
 130         val = readl(pmc_base + PMC_UTMIP_FAKE);
 131         val &= ~USBOP_VAL(inst);
 132         val &= ~USBON_VAL(inst);
 133         writel(val, pmc_base + PMC_UTMIP_FAKE);
 134
 135         /* Make sure wake value for line is none */
 136         val = readl(pmc_base + PMC_SLEEPWALK_CFG);
 137         val &= ~UTMIP_LINEVAL_WALK_EN(inst);
 138         writel(val, pmc_base + PMC_SLEEPWALK_CFG);
 139         val = readl(pmc_base + PMC_SLEEP_CFG);
 140         val &= ~UTMIP_WAKE_VAL(inst, ~0);
 141         val |= UTMIP_WAKE_VAL(inst, WAKE_VAL_NONE);
 142         writel(val, pmc_base + PMC_SLEEP_CFG);
 143
 144         /* turn off pad detectors */
 145         val = readl(pmc_base + PMC_USB_AO);
 146         val |= (USBOP_VAL_PD(inst) | USBON_VAL_PD(inst));
 147         writel(val, pmc_base + PMC_USB_AO);
 148
 149         /* Remove fake values and make synchronizers work a bit */
 150         val = readl(pmc_base + PMC_UTMIP_FAKE);
 151         val &= ~USBOP_VAL(inst);
 152         val &= ~USBON_VAL(inst);
 153         writel(val, pmc_base + PMC_UTMIP_FAKE);
 154
 155         /* Enable which type of event can trigger a walk,
 156         * in this case usb_line_wake */
 157         val = readl(pmc_base + PMC_SLEEPWALK_CFG);
 158         val |= UTMIP_LINEVAL_WALK_EN(inst);
 159         writel(val, pmc_base + PMC_SLEEPWALK_CFG);
 160
 161         /* Capture FS/LS pad configurations */
 162         pmc_pad_cfg_val = readl(pmc_base + PMC_PAD_CFG);
 163         val = readl(pmc_base + PMC_TRIGGERS);
 164         val |= UTMIP_CAP_CFG(inst);
 165         writel(val, pmc_base + PMC_TRIGGERS);
 166         udelay(1);
 167         pmc_pad_cfg_val = readl(pmc_base + PMC_PAD_CFG);
 168
 169         /* BIAS MASTER_ENABLE=0 */
 170         val = readl(pmc_base + PMC_UTMIP_BIAS_MASTER_CNTRL);
 171         val &= ~BIAS_MASTER_PROG_VAL;
 172         writel(val, pmc_base + PMC_UTMIP_BIAS_MASTER_CNTRL);
 173
 174         /* program walk sequence for remote or hotplug wakeup */
 175         if ((pmc_data->port_speed < USB_PMC_PORT_SPEED_UNKNOWN) ||
 176                 (pmc_data->port_speed == USB_PMC_PORT_SPEED_SUPER)) {
 177                 /* program walk sequence, maintain a J, followed by a driven K
 178                 * to signal a resume once an wake event is detected */
 179                 val = readl(pmc_base + PMC_SLEEPWALK_REG(inst));
 180                 val &= ~UTMIP_AP_A;
 181                 val |= UTMIP_USBOP_RPD_A | UTMIP_USBON_RPD_A | UTMIP_AN_A |
 182                                         UTMIP_HIGHZ_A |
 183                         UTMIP_USBOP_RPD_B | UTMIP_USBON_RPD_B | UTMIP_AP_B |
 184                                         UTMIP_AN_B |
 185                         UTMIP_USBOP_RPD_C | UTMIP_USBON_RPD_C | UTMIP_AP_C |
 186                                         UTMIP_AN_C |
 187                         UTMIP_USBOP_RPD_D | UTMIP_USBON_RPD_D | UTMIP_AP_D |
 188                                         UTMIP_AN_D;
 189                 writel(val, pmc_base + PMC_SLEEPWALK_REG(inst));
 190
 191                 if (pmc_data->port_speed == USB_PMC_PORT_SPEED_LOW) {
 192                         val = readl(pmc_base + PMC_SLEEPWALK_REG(inst));
 193                         val &= ~(UTMIP_AN_B | UTMIP_HIGHZ_B | UTMIP_AN_C |
 194                                 UTMIP_HIGHZ_C | UTMIP_AN_D | UTMIP_HIGHZ_D);
 195                         writel(val, pmc_base + PMC_SLEEPWALK_REG(inst));
 196                 } else {
 197                         val = readl(pmc_base + PMC_SLEEPWALK_REG(inst));
 198                         val &= ~(UTMIP_AP_B | UTMIP_HIGHZ_B | UTMIP_AP_C |
 199                                 UTMIP_HIGHZ_C | UTMIP_AP_D | UTMIP_HIGHZ_D |
 200                                 UTMIP_AN_A);
 201                                 val |= UTMIP_AP_A;
 202                         writel(val, pmc_base + PMC_SLEEPWALK_REG(inst));
 203                 }
 204         } else {
 205                 /* program walk sequence, pull down both dp and dn lines,
 206                 * tristate lines once an hotplug-in wake event is detected */
 207                 val = readl(pmc_base + PMC_SLEEPWALK_REG(inst));
 208                 val |= UTMIP_USBOP_RPD_A | UTMIP_USBON_RPD_A | UTMIP_HIGHZ_A;
 209                 val &= ~UTMIP_AP_A;
 210                 val &= ~UTMIP_AN_A;
 211                 val |= UTMIP_USBOP_RPD_B | UTMIP_USBON_RPD_B | UTMIP_HIGHZ_B;
 212                 val &= ~UTMIP_AP_B;
 213                 val &= ~UTMIP_AN_B;
 214                 val |= UTMIP_USBOP_RPD_C | UTMIP_USBON_RPD_C | UTMIP_HIGHZ_C;
 215                 val &= ~UTMIP_AP_C;
 216                 val &= ~UTMIP_AN_C;
 217                 val |= UTMIP_USBOP_RPD_D | UTMIP_USBON_RPD_D | UTMIP_HIGHZ_D;
 218                 val &= ~UTMIP_AP_D;
 219                 val &= ~UTMIP_AN_D;
 220                 writel(val, pmc_base + PMC_SLEEPWALK_REG(inst));
 221         }
 222         /* turn on pad detectors */
 223         val = readl(pmc_base + PMC_USB_AO);
 224         val &= ~(USBOP_VAL_PD(inst) | USBON_VAL_PD(inst));
 225         writel(val, pmc_base + PMC_USB_AO);
 226
 227         spin_unlock_irqrestore(&pmc_lock, flags);
 228
 229         /* Add small delay before usb detectors provide stable line values */
 230         mdelay(1);
 231
 232         spin_lock_irqsave(&pmc_lock, flags);
 233
 234         /* Program thermally encoded RCTRL_VAL, TCTRL_VAL into PMC space */
 235         if (pmc_data->utmip_tctrl_val | pmc_data->utmip_rctrl_val) {
 236                 val = readl(pmc_base + PMC_UTMIP_TERM_PAD_CFG);
 237                 val = PMC_TCTRL_VAL(pmc_data->utmip_tctrl_val) |
 238                         PMC_RCTRL_VAL(pmc_data->utmip_rctrl_val);
 239                 writel(val, pmc_base + PMC_UTMIP_TERM_PAD_CFG);
 240         }
 241
 242         /* Turn over pad configuration to PMC  for line wake events*/
 243         val = readl(pmc_base + PMC_SLEEP_CFG);
 244         val &= ~UTMIP_WAKE_VAL(inst, ~0);
 245         val |= UTMIP_WAKE_VAL(inst, WAKE_VAL_ANY);
 246         val |= UTMIP_RCTRL_USE_PMC(inst) | UTMIP_TCTRL_USE_PMC(inst);
 247         val |= UTMIP_MASTER_ENABLE(inst) | UTMIP_FSLS_USE_PMC(inst);
 248         writel(val, pmc_base + PMC_SLEEP_CFG);
 249
 250         spin_unlock_irqrestore(&pmc_lock, flags);
 251 }
 252
 253 static void utmip_phy_disable_pmc_bus_ctrl(struct tegra_usb_pmc_data *pmc_data,
 254                         int enable_sof)
 255 {
 256         unsigned long val;
 257         void __iomem *usb_base;
 258         unsigned  int inst = pmc_data->instance;
 259         usb_base = pmc_data->usb_base;
 260
 261         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, pmc_data->instance);
 262
 263         spin_lock_irqsave(&pmc_lock, flags);
 264
 265         if (pmc_data->controller_type == TEGRA_USB_2_0 && usb_base) {
 266                 /* disable PMC master control */
 267                 val = readl(usb_base + UTMIP_PMC_WAKEUP0);
 268                 val &= ~EVENT_INT_ENB;
 269                 writel(val, usb_base + UTMIP_PMC_WAKEUP0);
 270         }
 271
 272         val = readl(pmc_base + PMC_SLEEP_CFG);
 273         val &= ~UTMIP_WAKE_VAL(inst, 0xF);
 274         val |= UTMIP_WAKE_VAL(inst, WAKE_VAL_NONE);
 275         writel(val, pmc_base + PMC_SLEEP_CFG);
 276
 277         /* Disable PMC master mode by clearing MASTER_EN */
 278         val = readl(pmc_base + PMC_SLEEP_CFG);
 279         /* WAR for xusb */
 280         if (pmc_data->controller_type == TEGRA_USB_3_0)
 281                 val |= UTMIP_RCTRL_USE_PMC(inst) | UTMIP_TCTRL_USE_PMC(inst);
 282         else
 283                 val &= ~(UTMIP_RCTRL_USE_PMC(inst) |
 284                                 UTMIP_TCTRL_USE_PMC(inst));
 285         val &= ~(UTMIP_FSLS_USE_PMC(inst) | UTMIP_MASTER_ENABLE(inst));
 286         writel(val, pmc_base + PMC_SLEEP_CFG);
 287
 288         val = readl(pmc_base + PMC_TRIGGERS);
 289         val &= ~UTMIP_CAP_CFG(inst);
 290         writel(val, pmc_base + PMC_TRIGGERS);
 291
 292         /* turn off pad detectors */
 293         val = readl(pmc_base + PMC_USB_AO);
 294         val |= (USBOP_VAL_PD(inst) | USBON_VAL_PD(inst));
 295         writel(val, pmc_base + PMC_USB_AO);
 296
 297         val = readl(pmc_base + PMC_TRIGGERS);
 298         val |= UTMIP_CLR_WALK_PTR(inst);
 299         val |= UTMIP_CLR_WAKE_ALARM(inst);
 300         writel(val, pmc_base + PMC_TRIGGERS);
 301
 302         if (pmc_data->controller_type == TEGRA_USB_2_0 && enable_sof == 1 &&
 303                 usb_base) {
 304                 val = readl(usb_base + USB_USBCMD);
 305                 val |= USB_USBCMD_RS;
 306                 writel(val, usb_base + USB_USBCMD);
 307         }
 308         spin_unlock_irqrestore(&pmc_lock, flags);
 309 }
 310
 311
 312 static void utmip_powerdown_pmc_wake_detect(struct tegra_usb_pmc_data *pmc_data)
 313 {
 314         unsigned long val;
 315         unsigned  int inst = pmc_data->instance;
 316
 317         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, pmc_data->instance);
 318
 319         spin_lock_irqsave(&pmc_lock, flags);
 320
 321         /* power down UTMIP interfaces */
 322         val = readl(pmc_base + PMC_UTMIP_MASTER_CONFIG);
 323         val |= UTMIP_PWR(inst);
 324         writel(val, pmc_base + PMC_UTMIP_MASTER_CONFIG);
 325
 326         /* setup sleep walk usb controller */
 327         val = UTMIP_USBOP_RPD_A | UTMIP_USBON_RPD_A | UTMIP_HIGHZ_A |
 328                 UTMIP_USBOP_RPD_B | UTMIP_USBON_RPD_B | UTMIP_HIGHZ_B |
 329                 UTMIP_USBOP_RPD_C | UTMIP_USBON_RPD_C | UTMIP_HIGHZ_C |
 330                 UTMIP_USBOP_RPD_D | UTMIP_USBON_RPD_D | UTMIP_HIGHZ_D;
 331         writel(val, pmc_base + PMC_SLEEPWALK_REG(inst));
 332
 333         /* Program thermally encoded RCTRL_VAL, TCTRL_VAL into PMC space */
 334         if (pmc_data->utmip_tctrl_val | pmc_data->utmip_rctrl_val) {
 335                 val = readl(pmc_base + PMC_UTMIP_TERM_PAD_CFG);
 336                 val = PMC_TCTRL_VAL(pmc_data->utmip_tctrl_val) |
 337                         PMC_RCTRL_VAL(pmc_data->utmip_rctrl_val);
 338                 writel(val, pmc_base + PMC_UTMIP_TERM_PAD_CFG);
 339         }
 340
 341         /* Turn over pad configuration to PMC */
 342         val = readl(pmc_base + PMC_SLEEP_CFG);
 343         val &= ~UTMIP_WAKE_VAL(inst, ~0);
 344         val |= UTMIP_WAKE_VAL(inst, WAKE_VAL_NONE) |
 345                 UTMIP_RCTRL_USE_PMC(inst) | UTMIP_TCTRL_USE_PMC(inst) |
 346                 UTMIP_FSLS_USE_PMC(inst) | UTMIP_MASTER_ENABLE(inst);
 347         writel(val, pmc_base + PMC_SLEEP_CFG);
 348
 349         spin_unlock_irqrestore(&pmc_lock, flags);
 350 }
 351
 352 static void utmip_powerup_pmc_wake_detect(struct tegra_usb_pmc_data *pmc_data)
 353 {
 354         unsigned long val;
 355         unsigned  int inst = pmc_data->instance;
 356
 357         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, pmc_data->instance);
 358
 359         spin_lock_irqsave(&pmc_lock, flags);
 360
 361         /* Disable PMC master mode by clearing MASTER_EN */
 362         val = readl(pmc_base + PMC_SLEEP_CFG);
 363         /* WAR for xusb */
 364         if (pmc_data->controller_type == TEGRA_USB_3_0)
 365                 val |= UTMIP_RCTRL_USE_PMC(inst) | UTMIP_TCTRL_USE_PMC(inst);
 366         else
 367                 val &= ~(UTMIP_RCTRL_USE_PMC(inst) |
 368                                 UTMIP_TCTRL_USE_PMC(inst));
 369         val &= ~(UTMIP_FSLS_USE_PMC(inst) | UTMIP_MASTER_ENABLE(inst));
 370         writel(val, pmc_base + PMC_SLEEP_CFG);
 371
 372         spin_unlock_irqrestore(&pmc_lock, flags);
 373         mdelay(1);
 374 }
 375
 376 static void uhsic_powerup_pmc_wake_detect(struct tegra_usb_pmc_data *pmc_data)
 377 {
 378         unsigned long val;
 379         unsigned int inst = pmc_data->instance;
 380
 381         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, pmc_data->instance);
 382
 383         spin_lock_irqsave(&pmc_lock, flags);
 384
 385         /* turn on pad detectors for HSIC*/
 386         val = readl(pmc_base + PMC_USB_AO);
 387         val &= ~(HSIC_RESERVED(inst) | STROBE_VAL_PD(inst) | DATA_VAL_PD(inst));
 388         writel(val, pmc_base + PMC_USB_AO);
 389
 390         /* Disable PMC master mode by clearing MASTER_EN */
 391         val = readl(pmc_base + PMC_UHSIC_SLEEP_CFG(inst));
 392         val &= ~(UHSIC_MASTER_ENABLE(inst));
 393         writel(val, pmc_base + PMC_UHSIC_SLEEP_CFG(inst));
 394
 395         spin_unlock_irqrestore(&pmc_lock, flags);
 396         mdelay(1);
 397 }
 398
 399 static void uhsic_powerdown_pmc_wake_detect(struct tegra_usb_pmc_data *pmc_data)
 400 {
 401         unsigned long val;
 402         unsigned int inst = pmc_data->instance;
 403
 404         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, pmc_data->instance);
 405
 406         spin_lock_irqsave(&pmc_lock, flags);
 407
 408         /* turn off pad detectors for HSIC*/
 409         val = readl(pmc_base + PMC_USB_AO);
 410         val |= (HSIC_RESERVED(inst) | STROBE_VAL_PD(inst) | DATA_VAL_PD(inst));
 411         writel(val, pmc_base + PMC_USB_AO);
 412
 413         /* enable pull downs on HSIC PMC */
 414         val = UHSIC_STROBE_RPD_A | UHSIC_DATA_RPD_A | UHSIC_STROBE_RPD_B |
 415                 UHSIC_DATA_RPD_B | UHSIC_STROBE_RPD_C | UHSIC_DATA_RPD_C |
 416                 UHSIC_STROBE_RPD_D | UHSIC_DATA_RPD_D;
 417         writel(val, pmc_base + PMC_SLEEPWALK_UHSIC(inst));
 418
 419         /* Turn over pad configuration to PMC */
 420         val = readl(pmc_base + PMC_UHSIC_SLEEP_CFG(inst));
 421         val &= ~UHSIC_WAKE_VAL(inst, ~0);
 422         val |= UHSIC_WAKE_VAL(inst, WAKE_VAL_NONE) | UHSIC_MASTER_ENABLE(inst);
 423         writel(val, pmc_base + PMC_UHSIC_SLEEP_CFG(inst));
 424
 425         spin_unlock_irqrestore(&pmc_lock, flags);
 426 }
 427
 428 static void uhsic_setup_pmc_wake_detect(struct tegra_usb_pmc_data *pmc_data)
 429 {
 430         unsigned long val;
 431         unsigned int inst = pmc_data->instance;
 432
 433         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, pmc_data->instance);
 434
 435         spin_lock_irqsave(&pmc_lock, flags);
 436
 437         /*Set PMC MASTER bits to do the following
 438         * a. Take over the hsic drivers
 439         * b. set up such that it will take over resume
 440         *        if remote wakeup is detected
 441         * Prepare PMC to take over suspend-wake detect-drive resume until USB
 442         * controller ready
 443         */
 444
 445         /* disable master enable in PMC */
 446         val = readl(pmc_base + PMC_UHSIC_SLEEP_CFG(inst));
 447         val &= ~UHSIC_MASTER_ENABLE(inst);
 448         writel(val, pmc_base + PMC_UHSIC_SLEEP_CFG(inst));
 449
 450         /* UTMIP_PWR_PX=1 for power savings mode */
 451         val = readl(pmc_base + PMC_UHSIC_MASTER_CONFIG(inst));
 452         val |= UHSIC_PWR(inst);
 453         writel(val, pmc_base + PMC_UHSIC_MASTER_CONFIG(inst));
 454
 455         /* config debouncer */
 456         val = readl(pmc_base + PMC_USB_DEBOUNCE);
 457         val |= PMC_USB_DEBOUNCE_VAL(2);
 458         writel(val, pmc_base + PMC_USB_DEBOUNCE);
 459
 460         /* Make sure nothing is happening on the line with respect to PMC */
 461         val = readl(pmc_base + PMC_UHSIC_FAKE(inst));
 462         val &= ~UHSIC_FAKE_STROBE_VAL(inst);
 463         val &= ~UHSIC_FAKE_DATA_VAL(inst);
 464         writel(val, pmc_base + PMC_UHSIC_FAKE(inst));
 465
 466         /* Clear walk enable */
 467         val = readl(pmc_base + PMC_UHSIC_SLEEPWALK_CFG(inst));
 468         val &= ~UHSIC_LINEVAL_WALK_EN(inst);
 469         writel(val, pmc_base + PMC_UHSIC_SLEEPWALK_CFG(inst));
 470
 471         /* Make sure wake value for line is none */
 472         val = readl(pmc_base + PMC_UHSIC_SLEEP_CFG(inst));
 473         val &= ~UHSIC_WAKE_VAL(inst, WAKE_VAL_ANY);
 474         val |= UHSIC_WAKE_VAL(inst, WAKE_VAL_NONE);
 475         writel(val, pmc_base + PMC_UHSIC_SLEEP_CFG(inst));
 476
 477         /* turn on pad detectors */
 478         val = readl(pmc_base + PMC_USB_AO);
 479         val &= ~(STROBE_VAL_PD(inst) | DATA_VAL_PD(inst));
 480         writel(val, pmc_base + PMC_USB_AO);
 481
 482         /* Add small delay before usb detectors provide stable line values */
 483         udelay(1);
 484
 485         /* Enable which type of event can trigger a walk,
 486         * in this case usb_line_wake */
 487         val = readl(pmc_base + PMC_UHSIC_SLEEPWALK_CFG(inst));
 488         val |= UHSIC_LINEVAL_WALK_EN(inst);
 489         writel(val, pmc_base + PMC_UHSIC_SLEEPWALK_CFG(inst));
 490
 491         /* program walk sequence, maintain a J, followed by a driven K
 492         * to signal a resume once an wake event is detected */
 493
 494         val = readl(pmc_base + PMC_SLEEPWALK_UHSIC(inst));
 495
 496         val &= ~UHSIC_DATA_RPU_A;
 497         val |=  UHSIC_DATA_RPD_A;
 498         val &= ~UHSIC_STROBE_RPD_A;
 499         val |=  UHSIC_STROBE_RPU_A;
 500
 501         val &= ~UHSIC_DATA_RPD_B;
 502         val |=  UHSIC_DATA_RPU_B;
 503         val &= ~UHSIC_STROBE_RPU_B;
 504         val |=  UHSIC_STROBE_RPD_B;
 505
 506         val &= ~UHSIC_DATA_RPD_C;
 507         val |=  UHSIC_DATA_RPU_C;
 508         val &= ~UHSIC_STROBE_RPU_C;
 509         val |=  UHSIC_STROBE_RPD_C;
 510
 511         val &= ~UHSIC_DATA_RPD_D;
 512         val |=  UHSIC_DATA_RPU_D;
 513         val &= ~UHSIC_STROBE_RPU_D;
 514         val |=  UHSIC_STROBE_RPD_D;
 515         writel(val, pmc_base + PMC_SLEEPWALK_UHSIC(inst));
 516
 517         /* Setting Wake event*/
 518         val = readl(pmc_base + PMC_UHSIC_SLEEP_CFG(inst));
 519         val &= ~UHSIC_WAKE_VAL(inst, WAKE_VAL_ANY);
 520         val |= UHSIC_WAKE_VAL(inst, WAKE_VAL_SD10);
 521         writel(val, pmc_base + PMC_UHSIC_SLEEP_CFG(inst));
 522
 523         /* Clear the walk pointers and wake alarm */
 524         val = readl(pmc_base + PMC_UHSIC_TRIGGERS(inst));
 525         val |= UHSIC_CLR_WAKE_ALARM(inst) | UHSIC_CLR_WALK_PTR(inst);
 526         writel(val, pmc_base + PMC_UHSIC_TRIGGERS(inst));
 527
 528         /* Turn over pad configuration to PMC  for line wake events*/
 529         val = readl(pmc_base + PMC_UHSIC_SLEEP_CFG(inst));
 530         val |= UHSIC_MASTER_ENABLE(inst);
 531         writel(val, pmc_base + PMC_UHSIC_SLEEP_CFG(inst));
 532
 533         spin_unlock_irqrestore(&pmc_lock, flags);
 534         DBG("%s:PMC enabled for HSIC remote wakeup\n", __func__);
 535 }
 536
 537 static void uhsic_phy_disable_pmc_bus_ctrl(struct tegra_usb_pmc_data *pmc_data,
 538                         int enable_sof)
 539 {
 540         unsigned long val;
 541         void __iomem *usb_base;
 542         unsigned int inst = pmc_data->instance;
 543         usb_base = pmc_data->usb_base;
 544
 545         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, pmc_data->instance);
 546
 547         spin_lock_irqsave(&pmc_lock, flags);
 548
 549         if (pmc_data->controller_type == TEGRA_USB_2_0 && usb_base) {
 550                 /* disable PMC master control */
 551                 val = readl(usb_base + UTMIP_PMC_WAKEUP0);
 552                 val &= ~EVENT_INT_ENB;
 553                 writel(val, usb_base + UTMIP_PMC_WAKEUP0);
 554         }
 555
 556         val = readl(pmc_base + PMC_UHSIC_SLEEP_CFG(inst));
 557         val &= ~UHSIC_WAKE_VAL(inst, WAKE_VAL_ANY);
 558         val |= UHSIC_WAKE_VAL(inst, WAKE_VAL_NONE);
 559         writel(val, pmc_base + PMC_UHSIC_SLEEP_CFG(inst));
 560
 561         /* Disable PMC master mode by clearing MASTER_EN */
 562         val = readl(pmc_base + PMC_UHSIC_SLEEP_CFG(inst));
 563         val &= ~(UHSIC_MASTER_ENABLE(inst));
 564         writel(val, pmc_base + PMC_UHSIC_SLEEP_CFG(inst));
 565
 566         /* turn off pad detectors */
 567         val = readl(pmc_base + PMC_USB_AO);
 568         val |= (STROBE_VAL_PD(inst) | DATA_VAL_PD(inst));
 569         writel(val, pmc_base + PMC_USB_AO);
 570
 571         val = readl(pmc_base + PMC_UHSIC_TRIGGERS(inst));
 572         val |= (UHSIC_CLR_WALK_PTR(inst) | UHSIC_CLR_WAKE_ALARM(inst));
 573         writel(val, pmc_base + PMC_UHSIC_TRIGGERS(inst));
 574
 575         if (pmc_data->controller_type == TEGRA_USB_2_0 && enable_sof == 1 &&
 576                 usb_base) {
 577                 val = readl(usb_base + USB_USBCMD);
 578                 val |= USB_USBCMD_RS;
 579                 writel(val, usb_base + USB_USBCMD);
 580         }
 581
 582         spin_unlock_irqrestore(&pmc_lock, flags);
 583 }
 584
 585 static struct tegra_usb_pmc_ops usb2_utmi_pmc_ops = {
 586         .setup_pmc_wake_detect = utmip_setup_pmc_wake_detect,
 587         .disable_pmc_bus_ctrl = utmip_phy_disable_pmc_bus_ctrl,
 588         .powerup_pmc_wake_detect = utmip_powerup_pmc_wake_detect,
 589         .powerdown_pmc_wake_detect = utmip_powerdown_pmc_wake_detect,
 590 };
 591
 592 static struct tegra_usb_pmc_ops usb2_hsic_pmc_ops = {
 593         .setup_pmc_wake_detect = uhsic_setup_pmc_wake_detect,
 594         .disable_pmc_bus_ctrl = uhsic_phy_disable_pmc_bus_ctrl,
 595         .powerup_pmc_wake_detect = uhsic_powerup_pmc_wake_detect,
 596         .powerdown_pmc_wake_detect = uhsic_powerdown_pmc_wake_detect,
 597 };
 598
 599 static struct tegra_usb_pmc_ops *pmc_ops[] = {
 600         [TEGRA_USB_PHY_INTF_UTMI] = &usb2_utmi_pmc_ops,
 601         [TEGRA_USB_PHY_INTF_HSIC] = &usb2_hsic_pmc_ops,
 602 };
 603
 604 void tegra_usb_pmc_init(struct tegra_usb_pmc_data *pmc_data)
 605 {
 606         static u32 utmip_rctrl_val;
 607         static u32 utmip_tctrl_val;
 608
 609         DBG("%s(%d) inst:[%d]\n", __func__, __LINE__, pmc_data->instance);
 610
 611         if (!pmc_base)
 612                 pmc_base = IO_ADDRESS(TEGRA_PMC_BASE);
 613
 614 #ifdef KERNEL_WARNING
 615         pmc_data->pmc_ops.power_down_pmc = usb_phy_power_down_pmc;
 616 #endif
 617         if (pmc_data->phy_type == TEGRA_USB_PHY_INTF_UTMI) {
 618                 utmip_rctrl_val = pmc_data->utmip_rctrl_val;
 619                 utmip_tctrl_val = pmc_data->utmip_tctrl_val;
 620         }
 621         pmc_data->pmc_ops = pmc_ops[pmc_data->phy_type];
 622 }
 623 EXPORT_SYMBOL_GPL(tegra_usb_pmc_init);