parisc iommu: fix panic due to trying to allocate too large region
[linux-3.10.git] / drivers / parisc / iommu-helpers.h
1 #include <linux/prefetch.h>
2
3 /**
4  * iommu_fill_pdir - Insert coalesced scatter/gather chunks into the I/O Pdir.
5  * @ioc: The I/O Controller.
6  * @startsg: The scatter/gather list of coalesced chunks.
7  * @nents: The number of entries in the scatter/gather list.
8  * @hint: The DMA Hint.
9  *
10  * This function inserts the coalesced scatter/gather list chunks into the
11  * I/O Controller's I/O Pdir.
12  */ 
13 static inline unsigned int
14 iommu_fill_pdir(struct ioc *ioc, struct scatterlist *startsg, int nents, 
15                 unsigned long hint,
16                 void (*iommu_io_pdir_entry)(u64 *, space_t, unsigned long,
17                                             unsigned long))
18 {
19         struct scatterlist *dma_sg = startsg;   /* pointer to current DMA */
20         unsigned int n_mappings = 0;
21         unsigned long dma_offset = 0, dma_len = 0;
22         u64 *pdirp = NULL;
23
24         /* Horrible hack.  For efficiency's sake, dma_sg starts one 
25          * entry below the true start (it is immediately incremented
26          * in the loop) */
27          dma_sg--;
28
29         while (nents-- > 0) {
30                 unsigned long vaddr;
31                 long size;
32
33                 DBG_RUN_SG(" %d : %08lx/%05x %08lx/%05x\n", nents,
34                            (unsigned long)sg_dma_address(startsg), cnt,
35                            sg_virt_addr(startsg), startsg->length
36                 );
37
38
39                 /*
40                 ** Look for the start of a new DMA stream
41                 */
42                 
43                 if (sg_dma_address(startsg) & PIDE_FLAG) {
44                         u32 pide = sg_dma_address(startsg) & ~PIDE_FLAG;
45
46                         BUG_ON(pdirp && (dma_len != sg_dma_len(dma_sg)));
47
48                         dma_sg++;
49
50                         dma_len = sg_dma_len(startsg);
51                         sg_dma_len(startsg) = 0;
52                         dma_offset = (unsigned long) pide & ~IOVP_MASK;
53                         n_mappings++;
54 #if defined(ZX1_SUPPORT)
55                         /* Pluto IOMMU IO Virt Address is not zero based */
56                         sg_dma_address(dma_sg) = pide | ioc->ibase;
57 #else
58                         /* SBA, ccio, and dino are zero based.
59                          * Trying to save a few CPU cycles for most users.
60                          */
61                         sg_dma_address(dma_sg) = pide;
62 #endif
63                         pdirp = &(ioc->pdir_base[pide >> IOVP_SHIFT]);
64                         prefetchw(pdirp);
65                 }
66                 
67                 BUG_ON(pdirp == NULL);
68                 
69                 vaddr = sg_virt_addr(startsg);
70                 sg_dma_len(dma_sg) += startsg->length;
71                 size = startsg->length + dma_offset;
72                 dma_offset = 0;
73 #ifdef IOMMU_MAP_STATS
74                 ioc->msg_pages += startsg->length >> IOVP_SHIFT;
75 #endif
76                 do {
77                         iommu_io_pdir_entry(pdirp, KERNEL_SPACE, 
78                                             vaddr, hint);
79                         vaddr += IOVP_SIZE;
80                         size -= IOVP_SIZE;
81                         pdirp++;
82                 } while(unlikely(size > 0));
83                 startsg++;
84         }
85         return(n_mappings);
86 }
87
88
89 /*
90 ** First pass is to walk the SG list and determine where the breaks are
91 ** in the DMA stream. Allocates PDIR entries but does not fill them.
92 ** Returns the number of DMA chunks.
93 **
94 ** Doing the fill separate from the coalescing/allocation keeps the
95 ** code simpler. Future enhancement could make one pass through
96 ** the sglist do both.
97 */
98
99 static inline unsigned int
100 iommu_coalesce_chunks(struct ioc *ioc, struct device *dev,
101                 struct scatterlist *startsg, int nents,
102                 int (*iommu_alloc_range)(struct ioc *, struct device *, size_t))
103 {
104         struct scatterlist *contig_sg;     /* contig chunk head */
105         unsigned long dma_offset, dma_len; /* start/len of DMA stream */
106         unsigned int n_mappings = 0;
107         unsigned int max_seg_size = min(dma_get_max_seg_size(dev),
108                                         (unsigned)DMA_CHUNK_SIZE);
109         unsigned int max_seg_boundary = dma_get_seg_boundary(dev) + 1;
110         if (max_seg_boundary)   /* check if the addition above didn't overflow */
111                 max_seg_size = min(max_seg_size, max_seg_boundary);
112
113         while (nents > 0) {
114
115                 /*
116                 ** Prepare for first/next DMA stream
117                 */
118                 contig_sg = startsg;
119                 dma_len = startsg->length;
120                 dma_offset = sg_virt_addr(startsg) & ~IOVP_MASK;
121
122                 /* PARANOID: clear entries */
123                 sg_dma_address(startsg) = 0;
124                 sg_dma_len(startsg) = 0;
125
126                 /*
127                 ** This loop terminates one iteration "early" since
128                 ** it's always looking one "ahead".
129                 */
130                 while(--nents > 0) {
131                         unsigned long prevstartsg_end, startsg_end;
132
133                         prevstartsg_end = sg_virt_addr(startsg) +
134                                 startsg->length;
135
136                         startsg++;
137                         startsg_end = sg_virt_addr(startsg) + 
138                                 startsg->length;
139
140                         /* PARANOID: clear entries */
141                         sg_dma_address(startsg) = 0;
142                         sg_dma_len(startsg) = 0;
143
144                         /*
145                         ** First make sure current dma stream won't
146                         ** exceed max_seg_size if we coalesce the
147                         ** next entry.
148                         */   
149                         if (unlikely(ALIGN(dma_len + dma_offset + startsg->length, IOVP_SIZE) >
150                                      max_seg_size))
151                                 break;
152
153                         /*
154                         ** Next see if we can append the next chunk (i.e.
155                         ** it must end on one page and begin on another
156                         */
157                         if (unlikely(((prevstartsg_end | sg_virt_addr(startsg)) & ~PAGE_MASK) != 0))
158                                 break;
159                         
160                         dma_len += startsg->length;
161                 }
162
163                 /*
164                 ** End of DMA Stream
165                 ** Terminate last VCONTIG block.
166                 ** Allocate space for DMA stream.
167                 */
168                 sg_dma_len(contig_sg) = dma_len;
169                 dma_len = ALIGN(dma_len + dma_offset, IOVP_SIZE);
170                 sg_dma_address(contig_sg) =
171                         PIDE_FLAG 
172                         | (iommu_alloc_range(ioc, dev, dma_len) << IOVP_SHIFT)
173                         | dma_offset;
174                 n_mappings++;
175         }
176
177         return n_mappings;
178 }
179