net: remove mm.h inclusion from netdevice.h
[linux-3.10.git] / drivers / net / wireless / ath / ath9k / recv.c
1 /*
2  * Copyright (c) 2008-2011 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #include <linux/dma-mapping.h>
18 #include "ath9k.h"
19 #include "ar9003_mac.h"
20
21 #define SKB_CB_ATHBUF(__skb)    (*((struct ath_buf **)__skb->cb))
22
23 static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta,
24                                                int mindelta, int main_rssi_avg,
25                                                int alt_rssi_avg, int pkt_count)
26 {
27         return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
28                 (alt_rssi_avg > main_rssi_avg + maxdelta)) ||
29                 (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50);
30 }
31
32 static inline bool ath_ant_div_comb_alt_check(u8 div_group, int alt_ratio,
33                                         int curr_main_set, int curr_alt_set,
34                                         int alt_rssi_avg, int main_rssi_avg)
35 {
36         bool result = false;
37         switch (div_group) {
38         case 0:
39                 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
40                         result = true;
41                 break;
42         case 1:
43                 if ((((curr_main_set == ATH_ANT_DIV_COMB_LNA2) &&
44                         (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) &&
45                                 (alt_rssi_avg >= (main_rssi_avg - 5))) ||
46                         ((curr_main_set == ATH_ANT_DIV_COMB_LNA1) &&
47                         (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) &&
48                                 (alt_rssi_avg >= (main_rssi_avg - 2)))) &&
49                                                         (alt_rssi_avg >= 4))
50                         result = true;
51                 else
52                         result = false;
53                 break;
54         }
55
56         return result;
57 }
58
59 static inline bool ath9k_check_auto_sleep(struct ath_softc *sc)
60 {
61         return sc->ps_enabled &&
62                (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP);
63 }
64
65 /*
66  * Setup and link descriptors.
67  *
68  * 11N: we can no longer afford to self link the last descriptor.
69  * MAC acknowledges BA status as long as it copies frames to host
70  * buffer (or rx fifo). This can incorrectly acknowledge packets
71  * to a sender if last desc is self-linked.
72  */
73 static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
74 {
75         struct ath_hw *ah = sc->sc_ah;
76         struct ath_common *common = ath9k_hw_common(ah);
77         struct ath_desc *ds;
78         struct sk_buff *skb;
79
80         ATH_RXBUF_RESET(bf);
81
82         ds = bf->bf_desc;
83         ds->ds_link = 0; /* link to null */
84         ds->ds_data = bf->bf_buf_addr;
85
86         /* virtual addr of the beginning of the buffer. */
87         skb = bf->bf_mpdu;
88         BUG_ON(skb == NULL);
89         ds->ds_vdata = skb->data;
90
91         /*
92          * setup rx descriptors. The rx_bufsize here tells the hardware
93          * how much data it can DMA to us and that we are prepared
94          * to process
95          */
96         ath9k_hw_setuprxdesc(ah, ds,
97                              common->rx_bufsize,
98                              0);
99
100         if (sc->rx.rxlink == NULL)
101                 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
102         else
103                 *sc->rx.rxlink = bf->bf_daddr;
104
105         sc->rx.rxlink = &ds->ds_link;
106 }
107
108 static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
109 {
110         /* XXX block beacon interrupts */
111         ath9k_hw_setantenna(sc->sc_ah, antenna);
112         sc->rx.defant = antenna;
113         sc->rx.rxotherant = 0;
114 }
115
116 static void ath_opmode_init(struct ath_softc *sc)
117 {
118         struct ath_hw *ah = sc->sc_ah;
119         struct ath_common *common = ath9k_hw_common(ah);
120
121         u32 rfilt, mfilt[2];
122
123         /* configure rx filter */
124         rfilt = ath_calcrxfilter(sc);
125         ath9k_hw_setrxfilter(ah, rfilt);
126
127         /* configure bssid mask */
128         ath_hw_setbssidmask(common);
129
130         /* configure operational mode */
131         ath9k_hw_setopmode(ah);
132
133         /* calculate and install multicast filter */
134         mfilt[0] = mfilt[1] = ~0;
135         ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
136 }
137
138 static bool ath_rx_edma_buf_link(struct ath_softc *sc,
139                                  enum ath9k_rx_qtype qtype)
140 {
141         struct ath_hw *ah = sc->sc_ah;
142         struct ath_rx_edma *rx_edma;
143         struct sk_buff *skb;
144         struct ath_buf *bf;
145
146         rx_edma = &sc->rx.rx_edma[qtype];
147         if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize)
148                 return false;
149
150         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
151         list_del_init(&bf->list);
152
153         skb = bf->bf_mpdu;
154
155         ATH_RXBUF_RESET(bf);
156         memset(skb->data, 0, ah->caps.rx_status_len);
157         dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
158                                 ah->caps.rx_status_len, DMA_TO_DEVICE);
159
160         SKB_CB_ATHBUF(skb) = bf;
161         ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype);
162         skb_queue_tail(&rx_edma->rx_fifo, skb);
163
164         return true;
165 }
166
167 static void ath_rx_addbuffer_edma(struct ath_softc *sc,
168                                   enum ath9k_rx_qtype qtype, int size)
169 {
170         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
171         u32 nbuf = 0;
172
173         if (list_empty(&sc->rx.rxbuf)) {
174                 ath_dbg(common, ATH_DBG_QUEUE, "No free rx buf available\n");
175                 return;
176         }
177
178         while (!list_empty(&sc->rx.rxbuf)) {
179                 nbuf++;
180
181                 if (!ath_rx_edma_buf_link(sc, qtype))
182                         break;
183
184                 if (nbuf >= size)
185                         break;
186         }
187 }
188
189 static void ath_rx_remove_buffer(struct ath_softc *sc,
190                                  enum ath9k_rx_qtype qtype)
191 {
192         struct ath_buf *bf;
193         struct ath_rx_edma *rx_edma;
194         struct sk_buff *skb;
195
196         rx_edma = &sc->rx.rx_edma[qtype];
197
198         while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) {
199                 bf = SKB_CB_ATHBUF(skb);
200                 BUG_ON(!bf);
201                 list_add_tail(&bf->list, &sc->rx.rxbuf);
202         }
203 }
204
205 static void ath_rx_edma_cleanup(struct ath_softc *sc)
206 {
207         struct ath_buf *bf;
208
209         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
210         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
211
212         list_for_each_entry(bf, &sc->rx.rxbuf, list) {
213                 if (bf->bf_mpdu)
214                         dev_kfree_skb_any(bf->bf_mpdu);
215         }
216
217         INIT_LIST_HEAD(&sc->rx.rxbuf);
218
219         kfree(sc->rx.rx_bufptr);
220         sc->rx.rx_bufptr = NULL;
221 }
222
223 static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
224 {
225         skb_queue_head_init(&rx_edma->rx_fifo);
226         skb_queue_head_init(&rx_edma->rx_buffers);
227         rx_edma->rx_fifo_hwsize = size;
228 }
229
230 static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
231 {
232         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
233         struct ath_hw *ah = sc->sc_ah;
234         struct sk_buff *skb;
235         struct ath_buf *bf;
236         int error = 0, i;
237         u32 size;
238
239         ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
240                                     ah->caps.rx_status_len);
241
242         ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
243                                ah->caps.rx_lp_qdepth);
244         ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
245                                ah->caps.rx_hp_qdepth);
246
247         size = sizeof(struct ath_buf) * nbufs;
248         bf = kzalloc(size, GFP_KERNEL);
249         if (!bf)
250                 return -ENOMEM;
251
252         INIT_LIST_HEAD(&sc->rx.rxbuf);
253         sc->rx.rx_bufptr = bf;
254
255         for (i = 0; i < nbufs; i++, bf++) {
256                 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
257                 if (!skb) {
258                         error = -ENOMEM;
259                         goto rx_init_fail;
260                 }
261
262                 memset(skb->data, 0, common->rx_bufsize);
263                 bf->bf_mpdu = skb;
264
265                 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
266                                                  common->rx_bufsize,
267                                                  DMA_BIDIRECTIONAL);
268                 if (unlikely(dma_mapping_error(sc->dev,
269                                                 bf->bf_buf_addr))) {
270                                 dev_kfree_skb_any(skb);
271                                 bf->bf_mpdu = NULL;
272                                 bf->bf_buf_addr = 0;
273                                 ath_err(common,
274                                         "dma_mapping_error() on RX init\n");
275                                 error = -ENOMEM;
276                                 goto rx_init_fail;
277                 }
278
279                 list_add_tail(&bf->list, &sc->rx.rxbuf);
280         }
281
282         return 0;
283
284 rx_init_fail:
285         ath_rx_edma_cleanup(sc);
286         return error;
287 }
288
289 static void ath_edma_start_recv(struct ath_softc *sc)
290 {
291         spin_lock_bh(&sc->rx.rxbuflock);
292
293         ath9k_hw_rxena(sc->sc_ah);
294
295         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
296                               sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
297
298         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
299                               sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
300
301         ath_opmode_init(sc);
302
303         ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
304
305         spin_unlock_bh(&sc->rx.rxbuflock);
306 }
307
308 static void ath_edma_stop_recv(struct ath_softc *sc)
309 {
310         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
311         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
312 }
313
314 int ath_rx_init(struct ath_softc *sc, int nbufs)
315 {
316         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
317         struct sk_buff *skb;
318         struct ath_buf *bf;
319         int error = 0;
320
321         spin_lock_init(&sc->sc_pcu_lock);
322         sc->sc_flags &= ~SC_OP_RXFLUSH;
323         spin_lock_init(&sc->rx.rxbuflock);
324
325         common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
326                              sc->sc_ah->caps.rx_status_len;
327
328         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
329                 return ath_rx_edma_init(sc, nbufs);
330         } else {
331                 ath_dbg(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
332                         common->cachelsz, common->rx_bufsize);
333
334                 /* Initialize rx descriptors */
335
336                 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
337                                 "rx", nbufs, 1, 0);
338                 if (error != 0) {
339                         ath_err(common,
340                                 "failed to allocate rx descriptors: %d\n",
341                                 error);
342                         goto err;
343                 }
344
345                 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
346                         skb = ath_rxbuf_alloc(common, common->rx_bufsize,
347                                               GFP_KERNEL);
348                         if (skb == NULL) {
349                                 error = -ENOMEM;
350                                 goto err;
351                         }
352
353                         bf->bf_mpdu = skb;
354                         bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
355                                         common->rx_bufsize,
356                                         DMA_FROM_DEVICE);
357                         if (unlikely(dma_mapping_error(sc->dev,
358                                                         bf->bf_buf_addr))) {
359                                 dev_kfree_skb_any(skb);
360                                 bf->bf_mpdu = NULL;
361                                 bf->bf_buf_addr = 0;
362                                 ath_err(common,
363                                         "dma_mapping_error() on RX init\n");
364                                 error = -ENOMEM;
365                                 goto err;
366                         }
367                 }
368                 sc->rx.rxlink = NULL;
369         }
370
371 err:
372         if (error)
373                 ath_rx_cleanup(sc);
374
375         return error;
376 }
377
378 void ath_rx_cleanup(struct ath_softc *sc)
379 {
380         struct ath_hw *ah = sc->sc_ah;
381         struct ath_common *common = ath9k_hw_common(ah);
382         struct sk_buff *skb;
383         struct ath_buf *bf;
384
385         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
386                 ath_rx_edma_cleanup(sc);
387                 return;
388         } else {
389                 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
390                         skb = bf->bf_mpdu;
391                         if (skb) {
392                                 dma_unmap_single(sc->dev, bf->bf_buf_addr,
393                                                 common->rx_bufsize,
394                                                 DMA_FROM_DEVICE);
395                                 dev_kfree_skb(skb);
396                                 bf->bf_buf_addr = 0;
397                                 bf->bf_mpdu = NULL;
398                         }
399                 }
400
401                 if (sc->rx.rxdma.dd_desc_len != 0)
402                         ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
403         }
404 }
405
406 /*
407  * Calculate the receive filter according to the
408  * operating mode and state:
409  *
410  * o always accept unicast, broadcast, and multicast traffic
411  * o maintain current state of phy error reception (the hal
412  *   may enable phy error frames for noise immunity work)
413  * o probe request frames are accepted only when operating in
414  *   hostap, adhoc, or monitor modes
415  * o enable promiscuous mode according to the interface state
416  * o accept beacons:
417  *   - when operating in adhoc mode so the 802.11 layer creates
418  *     node table entries for peers,
419  *   - when operating in station mode for collecting rssi data when
420  *     the station is otherwise quiet, or
421  *   - when operating as a repeater so we see repeater-sta beacons
422  *   - when scanning
423  */
424
425 u32 ath_calcrxfilter(struct ath_softc *sc)
426 {
427 #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
428
429         u32 rfilt;
430
431         rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
432                 | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
433                 | ATH9K_RX_FILTER_MCAST;
434
435         if (sc->rx.rxfilter & FIF_PROBE_REQ)
436                 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
437
438         /*
439          * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
440          * mode interface or when in monitor mode. AP mode does not need this
441          * since it receives all in-BSS frames anyway.
442          */
443         if (sc->sc_ah->is_monitoring)
444                 rfilt |= ATH9K_RX_FILTER_PROM;
445
446         if (sc->rx.rxfilter & FIF_CONTROL)
447                 rfilt |= ATH9K_RX_FILTER_CONTROL;
448
449         if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
450             (sc->nvifs <= 1) &&
451             !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
452                 rfilt |= ATH9K_RX_FILTER_MYBEACON;
453         else
454                 rfilt |= ATH9K_RX_FILTER_BEACON;
455
456         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
457             (sc->rx.rxfilter & FIF_PSPOLL))
458                 rfilt |= ATH9K_RX_FILTER_PSPOLL;
459
460         if (conf_is_ht(&sc->hw->conf))
461                 rfilt |= ATH9K_RX_FILTER_COMP_BAR;
462
463         if (sc->nvifs > 1 || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
464                 /* The following may also be needed for other older chips */
465                 if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
466                         rfilt |= ATH9K_RX_FILTER_PROM;
467                 rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
468         }
469
470         return rfilt;
471
472 #undef RX_FILTER_PRESERVE
473 }
474
475 int ath_startrecv(struct ath_softc *sc)
476 {
477         struct ath_hw *ah = sc->sc_ah;
478         struct ath_buf *bf, *tbf;
479
480         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
481                 ath_edma_start_recv(sc);
482                 return 0;
483         }
484
485         spin_lock_bh(&sc->rx.rxbuflock);
486         if (list_empty(&sc->rx.rxbuf))
487                 goto start_recv;
488
489         sc->rx.rxlink = NULL;
490         list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
491                 ath_rx_buf_link(sc, bf);
492         }
493
494         /* We could have deleted elements so the list may be empty now */
495         if (list_empty(&sc->rx.rxbuf))
496                 goto start_recv;
497
498         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
499         ath9k_hw_putrxbuf(ah, bf->bf_daddr);
500         ath9k_hw_rxena(ah);
501
502 start_recv:
503         ath_opmode_init(sc);
504         ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
505
506         spin_unlock_bh(&sc->rx.rxbuflock);
507
508         return 0;
509 }
510
511 bool ath_stoprecv(struct ath_softc *sc)
512 {
513         struct ath_hw *ah = sc->sc_ah;
514         bool stopped, reset = false;
515
516         spin_lock_bh(&sc->rx.rxbuflock);
517         ath9k_hw_abortpcurecv(ah);
518         ath9k_hw_setrxfilter(ah, 0);
519         stopped = ath9k_hw_stopdmarecv(ah, &reset);
520
521         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
522                 ath_edma_stop_recv(sc);
523         else
524                 sc->rx.rxlink = NULL;
525         spin_unlock_bh(&sc->rx.rxbuflock);
526
527         if (!(ah->ah_flags & AH_UNPLUGGED) &&
528             unlikely(!stopped)) {
529                 ath_err(ath9k_hw_common(sc->sc_ah),
530                         "Could not stop RX, we could be "
531                         "confusing the DMA engine when we start RX up\n");
532                 ATH_DBG_WARN_ON_ONCE(!stopped);
533         }
534         return stopped && !reset;
535 }
536
537 void ath_flushrecv(struct ath_softc *sc)
538 {
539         sc->sc_flags |= SC_OP_RXFLUSH;
540         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
541                 ath_rx_tasklet(sc, 1, true);
542         ath_rx_tasklet(sc, 1, false);
543         sc->sc_flags &= ~SC_OP_RXFLUSH;
544 }
545
546 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
547 {
548         /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
549         struct ieee80211_mgmt *mgmt;
550         u8 *pos, *end, id, elen;
551         struct ieee80211_tim_ie *tim;
552
553         mgmt = (struct ieee80211_mgmt *)skb->data;
554         pos = mgmt->u.beacon.variable;
555         end = skb->data + skb->len;
556
557         while (pos + 2 < end) {
558                 id = *pos++;
559                 elen = *pos++;
560                 if (pos + elen > end)
561                         break;
562
563                 if (id == WLAN_EID_TIM) {
564                         if (elen < sizeof(*tim))
565                                 break;
566                         tim = (struct ieee80211_tim_ie *) pos;
567                         if (tim->dtim_count != 0)
568                                 break;
569                         return tim->bitmap_ctrl & 0x01;
570                 }
571
572                 pos += elen;
573         }
574
575         return false;
576 }
577
578 static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
579 {
580         struct ieee80211_mgmt *mgmt;
581         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
582
583         if (skb->len < 24 + 8 + 2 + 2)
584                 return;
585
586         mgmt = (struct ieee80211_mgmt *)skb->data;
587         if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0) {
588                 /* TODO:  This doesn't work well if you have stations
589                  * associated to two different APs because curbssid
590                  * is just the last AP that any of the stations associated
591                  * with.
592                  */
593                 return; /* not from our current AP */
594         }
595
596         sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
597
598         if (sc->ps_flags & PS_BEACON_SYNC) {
599                 sc->ps_flags &= ~PS_BEACON_SYNC;
600                 ath_dbg(common, ATH_DBG_PS,
601                         "Reconfigure Beacon timers based on timestamp from the AP\n");
602                 ath_set_beacon(sc);
603                 sc->ps_flags &= ~PS_TSFOOR_SYNC;
604         }
605
606         if (ath_beacon_dtim_pending_cab(skb)) {
607                 /*
608                  * Remain awake waiting for buffered broadcast/multicast
609                  * frames. If the last broadcast/multicast frame is not
610                  * received properly, the next beacon frame will work as
611                  * a backup trigger for returning into NETWORK SLEEP state,
612                  * so we are waiting for it as well.
613                  */
614                 ath_dbg(common, ATH_DBG_PS,
615                         "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
616                 sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
617                 return;
618         }
619
620         if (sc->ps_flags & PS_WAIT_FOR_CAB) {
621                 /*
622                  * This can happen if a broadcast frame is dropped or the AP
623                  * fails to send a frame indicating that all CAB frames have
624                  * been delivered.
625                  */
626                 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
627                 ath_dbg(common, ATH_DBG_PS,
628                         "PS wait for CAB frames timed out\n");
629         }
630 }
631
632 static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
633 {
634         struct ieee80211_hdr *hdr;
635         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
636
637         hdr = (struct ieee80211_hdr *)skb->data;
638
639         /* Process Beacon and CAB receive in PS state */
640         if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc))
641             && ieee80211_is_beacon(hdr->frame_control))
642                 ath_rx_ps_beacon(sc, skb);
643         else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
644                  (ieee80211_is_data(hdr->frame_control) ||
645                   ieee80211_is_action(hdr->frame_control)) &&
646                  is_multicast_ether_addr(hdr->addr1) &&
647                  !ieee80211_has_moredata(hdr->frame_control)) {
648                 /*
649                  * No more broadcast/multicast frames to be received at this
650                  * point.
651                  */
652                 sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
653                 ath_dbg(common, ATH_DBG_PS,
654                         "All PS CAB frames received, back to sleep\n");
655         } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
656                    !is_multicast_ether_addr(hdr->addr1) &&
657                    !ieee80211_has_morefrags(hdr->frame_control)) {
658                 sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
659                 ath_dbg(common, ATH_DBG_PS,
660                         "Going back to sleep after having received PS-Poll data (0x%lx)\n",
661                         sc->ps_flags & (PS_WAIT_FOR_BEACON |
662                                         PS_WAIT_FOR_CAB |
663                                         PS_WAIT_FOR_PSPOLL_DATA |
664                                         PS_WAIT_FOR_TX_ACK));
665         }
666 }
667
668 static bool ath_edma_get_buffers(struct ath_softc *sc,
669                                  enum ath9k_rx_qtype qtype)
670 {
671         struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
672         struct ath_hw *ah = sc->sc_ah;
673         struct ath_common *common = ath9k_hw_common(ah);
674         struct sk_buff *skb;
675         struct ath_buf *bf;
676         int ret;
677
678         skb = skb_peek(&rx_edma->rx_fifo);
679         if (!skb)
680                 return false;
681
682         bf = SKB_CB_ATHBUF(skb);
683         BUG_ON(!bf);
684
685         dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
686                                 common->rx_bufsize, DMA_FROM_DEVICE);
687
688         ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data);
689         if (ret == -EINPROGRESS) {
690                 /*let device gain the buffer again*/
691                 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
692                                 common->rx_bufsize, DMA_FROM_DEVICE);
693                 return false;
694         }
695
696         __skb_unlink(skb, &rx_edma->rx_fifo);
697         if (ret == -EINVAL) {
698                 /* corrupt descriptor, skip this one and the following one */
699                 list_add_tail(&bf->list, &sc->rx.rxbuf);
700                 ath_rx_edma_buf_link(sc, qtype);
701                 skb = skb_peek(&rx_edma->rx_fifo);
702                 if (!skb)
703                         return true;
704
705                 bf = SKB_CB_ATHBUF(skb);
706                 BUG_ON(!bf);
707
708                 __skb_unlink(skb, &rx_edma->rx_fifo);
709                 list_add_tail(&bf->list, &sc->rx.rxbuf);
710                 ath_rx_edma_buf_link(sc, qtype);
711                 return true;
712         }
713         skb_queue_tail(&rx_edma->rx_buffers, skb);
714
715         return true;
716 }
717
718 static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
719                                                 struct ath_rx_status *rs,
720                                                 enum ath9k_rx_qtype qtype)
721 {
722         struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
723         struct sk_buff *skb;
724         struct ath_buf *bf;
725
726         while (ath_edma_get_buffers(sc, qtype));
727         skb = __skb_dequeue(&rx_edma->rx_buffers);
728         if (!skb)
729                 return NULL;
730
731         bf = SKB_CB_ATHBUF(skb);
732         ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data);
733         return bf;
734 }
735
736 static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
737                                            struct ath_rx_status *rs)
738 {
739         struct ath_hw *ah = sc->sc_ah;
740         struct ath_common *common = ath9k_hw_common(ah);
741         struct ath_desc *ds;
742         struct ath_buf *bf;
743         int ret;
744
745         if (list_empty(&sc->rx.rxbuf)) {
746                 sc->rx.rxlink = NULL;
747                 return NULL;
748         }
749
750         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
751         ds = bf->bf_desc;
752
753         /*
754          * Must provide the virtual address of the current
755          * descriptor, the physical address, and the virtual
756          * address of the next descriptor in the h/w chain.
757          * This allows the HAL to look ahead to see if the
758          * hardware is done with a descriptor by checking the
759          * done bit in the following descriptor and the address
760          * of the current descriptor the DMA engine is working
761          * on.  All this is necessary because of our use of
762          * a self-linked list to avoid rx overruns.
763          */
764         ret = ath9k_hw_rxprocdesc(ah, ds, rs, 0);
765         if (ret == -EINPROGRESS) {
766                 struct ath_rx_status trs;
767                 struct ath_buf *tbf;
768                 struct ath_desc *tds;
769
770                 memset(&trs, 0, sizeof(trs));
771                 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
772                         sc->rx.rxlink = NULL;
773                         return NULL;
774                 }
775
776                 tbf = list_entry(bf->list.next, struct ath_buf, list);
777
778                 /*
779                  * On some hardware the descriptor status words could
780                  * get corrupted, including the done bit. Because of
781                  * this, check if the next descriptor's done bit is
782                  * set or not.
783                  *
784                  * If the next descriptor's done bit is set, the current
785                  * descriptor has been corrupted. Force s/w to discard
786                  * this descriptor and continue...
787                  */
788
789                 tds = tbf->bf_desc;
790                 ret = ath9k_hw_rxprocdesc(ah, tds, &trs, 0);
791                 if (ret == -EINPROGRESS)
792                         return NULL;
793         }
794
795         if (!bf->bf_mpdu)
796                 return bf;
797
798         /*
799          * Synchronize the DMA transfer with CPU before
800          * 1. accessing the frame
801          * 2. requeueing the same buffer to h/w
802          */
803         dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
804                         common->rx_bufsize,
805                         DMA_FROM_DEVICE);
806
807         return bf;
808 }
809
810 /* Assumes you've already done the endian to CPU conversion */
811 static bool ath9k_rx_accept(struct ath_common *common,
812                             struct ieee80211_hdr *hdr,
813                             struct ieee80211_rx_status *rxs,
814                             struct ath_rx_status *rx_stats,
815                             bool *decrypt_error)
816 {
817 #define is_mc_or_valid_tkip_keyix ((is_mc ||                    \
818                 (rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID && \
819                 test_bit(rx_stats->rs_keyix, common->tkip_keymap))))
820
821         struct ath_hw *ah = common->ah;
822         __le16 fc;
823         u8 rx_status_len = ah->caps.rx_status_len;
824
825         fc = hdr->frame_control;
826
827         if (!rx_stats->rs_datalen)
828                 return false;
829         /*
830          * rs_status follows rs_datalen so if rs_datalen is too large
831          * we can take a hint that hardware corrupted it, so ignore
832          * those frames.
833          */
834         if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len))
835                 return false;
836
837         /* Only use error bits from the last fragment */
838         if (rx_stats->rs_more)
839                 return true;
840
841         /*
842          * The rx_stats->rs_status will not be set until the end of the
843          * chained descriptors so it can be ignored if rs_more is set. The
844          * rs_more will be false at the last element of the chained
845          * descriptors.
846          */
847         if (rx_stats->rs_status != 0) {
848                 if (rx_stats->rs_status & ATH9K_RXERR_CRC)
849                         rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
850                 if (rx_stats->rs_status & ATH9K_RXERR_PHY)
851                         return false;
852
853                 if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
854                         *decrypt_error = true;
855                 } else if (rx_stats->rs_status & ATH9K_RXERR_MIC) {
856                         bool is_mc;
857                         /*
858                          * The MIC error bit is only valid if the frame
859                          * is not a control frame or fragment, and it was
860                          * decrypted using a valid TKIP key.
861                          */
862                         is_mc = !!is_multicast_ether_addr(hdr->addr1);
863
864                         if (!ieee80211_is_ctl(fc) &&
865                             !ieee80211_has_morefrags(fc) &&
866                             !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
867                             is_mc_or_valid_tkip_keyix)
868                                 rxs->flag |= RX_FLAG_MMIC_ERROR;
869                         else
870                                 rx_stats->rs_status &= ~ATH9K_RXERR_MIC;
871                 }
872                 /*
873                  * Reject error frames with the exception of
874                  * decryption and MIC failures. For monitor mode,
875                  * we also ignore the CRC error.
876                  */
877                 if (ah->is_monitoring) {
878                         if (rx_stats->rs_status &
879                             ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
880                               ATH9K_RXERR_CRC))
881                                 return false;
882                 } else {
883                         if (rx_stats->rs_status &
884                             ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
885                                 return false;
886                         }
887                 }
888         }
889         return true;
890 }
891
892 static int ath9k_process_rate(struct ath_common *common,
893                               struct ieee80211_hw *hw,
894                               struct ath_rx_status *rx_stats,
895                               struct ieee80211_rx_status *rxs)
896 {
897         struct ieee80211_supported_band *sband;
898         enum ieee80211_band band;
899         unsigned int i = 0;
900
901         band = hw->conf.channel->band;
902         sband = hw->wiphy->bands[band];
903
904         if (rx_stats->rs_rate & 0x80) {
905                 /* HT rate */
906                 rxs->flag |= RX_FLAG_HT;
907                 if (rx_stats->rs_flags & ATH9K_RX_2040)
908                         rxs->flag |= RX_FLAG_40MHZ;
909                 if (rx_stats->rs_flags & ATH9K_RX_GI)
910                         rxs->flag |= RX_FLAG_SHORT_GI;
911                 rxs->rate_idx = rx_stats->rs_rate & 0x7f;
912                 return 0;
913         }
914
915         for (i = 0; i < sband->n_bitrates; i++) {
916                 if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
917                         rxs->rate_idx = i;
918                         return 0;
919                 }
920                 if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
921                         rxs->flag |= RX_FLAG_SHORTPRE;
922                         rxs->rate_idx = i;
923                         return 0;
924                 }
925         }
926
927         /*
928          * No valid hardware bitrate found -- we should not get here
929          * because hardware has already validated this frame as OK.
930          */
931         ath_dbg(common, ATH_DBG_XMIT,
932                 "unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
933                 rx_stats->rs_rate);
934
935         return -EINVAL;
936 }
937
938 static void ath9k_process_rssi(struct ath_common *common,
939                                struct ieee80211_hw *hw,
940                                struct ieee80211_hdr *hdr,
941                                struct ath_rx_status *rx_stats)
942 {
943         struct ath_softc *sc = hw->priv;
944         struct ath_hw *ah = common->ah;
945         int last_rssi;
946         __le16 fc;
947
948         if ((ah->opmode != NL80211_IFTYPE_STATION) &&
949             (ah->opmode != NL80211_IFTYPE_ADHOC))
950                 return;
951
952         fc = hdr->frame_control;
953         if (!ieee80211_is_beacon(fc) ||
954             compare_ether_addr(hdr->addr3, common->curbssid)) {
955                 /* TODO:  This doesn't work well if you have stations
956                  * associated to two different APs because curbssid
957                  * is just the last AP that any of the stations associated
958                  * with.
959                  */
960                 return;
961         }
962
963         if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && !rx_stats->rs_moreaggr)
964                 ATH_RSSI_LPF(sc->last_rssi, rx_stats->rs_rssi);
965
966         last_rssi = sc->last_rssi;
967         if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
968                 rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
969                                               ATH_RSSI_EP_MULTIPLIER);
970         if (rx_stats->rs_rssi < 0)
971                 rx_stats->rs_rssi = 0;
972
973         /* Update Beacon RSSI, this is used by ANI. */
974         ah->stats.avgbrssi = rx_stats->rs_rssi;
975 }
976
977 /*
978  * For Decrypt or Demic errors, we only mark packet status here and always push
979  * up the frame up to let mac80211 handle the actual error case, be it no
980  * decryption key or real decryption error. This let us keep statistics there.
981  */
982 static int ath9k_rx_skb_preprocess(struct ath_common *common,
983                                    struct ieee80211_hw *hw,
984                                    struct ieee80211_hdr *hdr,
985                                    struct ath_rx_status *rx_stats,
986                                    struct ieee80211_rx_status *rx_status,
987                                    bool *decrypt_error)
988 {
989         memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
990
991         /*
992          * everything but the rate is checked here, the rate check is done
993          * separately to avoid doing two lookups for a rate for each frame.
994          */
995         if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error))
996                 return -EINVAL;
997
998         /* Only use status info from the last fragment */
999         if (rx_stats->rs_more)
1000                 return 0;
1001
1002         ath9k_process_rssi(common, hw, hdr, rx_stats);
1003
1004         if (ath9k_process_rate(common, hw, rx_stats, rx_status))
1005                 return -EINVAL;
1006
1007         rx_status->band = hw->conf.channel->band;
1008         rx_status->freq = hw->conf.channel->center_freq;
1009         rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi;
1010         rx_status->antenna = rx_stats->rs_antenna;
1011         rx_status->flag |= RX_FLAG_MACTIME_MPDU;
1012
1013         return 0;
1014 }
1015
1016 static void ath9k_rx_skb_postprocess(struct ath_common *common,
1017                                      struct sk_buff *skb,
1018                                      struct ath_rx_status *rx_stats,
1019                                      struct ieee80211_rx_status *rxs,
1020                                      bool decrypt_error)
1021 {
1022         struct ath_hw *ah = common->ah;
1023         struct ieee80211_hdr *hdr;
1024         int hdrlen, padpos, padsize;
1025         u8 keyix;
1026         __le16 fc;
1027
1028         /* see if any padding is done by the hw and remove it */
1029         hdr = (struct ieee80211_hdr *) skb->data;
1030         hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1031         fc = hdr->frame_control;
1032         padpos = ath9k_cmn_padpos(hdr->frame_control);
1033
1034         /* The MAC header is padded to have 32-bit boundary if the
1035          * packet payload is non-zero. The general calculation for
1036          * padsize would take into account odd header lengths:
1037          * padsize = (4 - padpos % 4) % 4; However, since only
1038          * even-length headers are used, padding can only be 0 or 2
1039          * bytes and we can optimize this a bit. In addition, we must
1040          * not try to remove padding from short control frames that do
1041          * not have payload. */
1042         padsize = padpos & 3;
1043         if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
1044                 memmove(skb->data + padsize, skb->data, padpos);
1045                 skb_pull(skb, padsize);
1046         }
1047
1048         keyix = rx_stats->rs_keyix;
1049
1050         if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
1051             ieee80211_has_protected(fc)) {
1052                 rxs->flag |= RX_FLAG_DECRYPTED;
1053         } else if (ieee80211_has_protected(fc)
1054                    && !decrypt_error && skb->len >= hdrlen + 4) {
1055                 keyix = skb->data[hdrlen + 3] >> 6;
1056
1057                 if (test_bit(keyix, common->keymap))
1058                         rxs->flag |= RX_FLAG_DECRYPTED;
1059         }
1060         if (ah->sw_mgmt_crypto &&
1061             (rxs->flag & RX_FLAG_DECRYPTED) &&
1062             ieee80211_is_mgmt(fc))
1063                 /* Use software decrypt for management frames. */
1064                 rxs->flag &= ~RX_FLAG_DECRYPTED;
1065 }
1066
1067 static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb,
1068                                       struct ath_hw_antcomb_conf ant_conf,
1069                                       int main_rssi_avg)
1070 {
1071         antcomb->quick_scan_cnt = 0;
1072
1073         if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2)
1074                 antcomb->rssi_lna2 = main_rssi_avg;
1075         else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1)
1076                 antcomb->rssi_lna1 = main_rssi_avg;
1077
1078         switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) {
1079         case (0x10): /* LNA2 A-B */
1080                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1081                 antcomb->first_quick_scan_conf =
1082                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1083                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1084                 break;
1085         case (0x20): /* LNA1 A-B */
1086                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1087                 antcomb->first_quick_scan_conf =
1088                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1089                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1090                 break;
1091         case (0x21): /* LNA1 LNA2 */
1092                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2;
1093                 antcomb->first_quick_scan_conf =
1094                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1095                 antcomb->second_quick_scan_conf =
1096                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1097                 break;
1098         case (0x12): /* LNA2 LNA1 */
1099                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1;
1100                 antcomb->first_quick_scan_conf =
1101                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1102                 antcomb->second_quick_scan_conf =
1103                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1104                 break;
1105         case (0x13): /* LNA2 A+B */
1106                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1107                 antcomb->first_quick_scan_conf =
1108                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1109                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1110                 break;
1111         case (0x23): /* LNA1 A+B */
1112                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1113                 antcomb->first_quick_scan_conf =
1114                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1115                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1116                 break;
1117         default:
1118                 break;
1119         }
1120 }
1121
1122 static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb,
1123                                 struct ath_hw_antcomb_conf *div_ant_conf,
1124                                 int main_rssi_avg, int alt_rssi_avg,
1125                                 int alt_ratio)
1126 {
1127         /* alt_good */
1128         switch (antcomb->quick_scan_cnt) {
1129         case 0:
1130                 /* set alt to main, and alt to first conf */
1131                 div_ant_conf->main_lna_conf = antcomb->main_conf;
1132                 div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf;
1133                 break;
1134         case 1:
1135                 /* set alt to main, and alt to first conf */
1136                 div_ant_conf->main_lna_conf = antcomb->main_conf;
1137                 div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf;
1138                 antcomb->rssi_first = main_rssi_avg;
1139                 antcomb->rssi_second = alt_rssi_avg;
1140
1141                 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1142                         /* main is LNA1 */
1143                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1144                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1145                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1146                                                 main_rssi_avg, alt_rssi_avg,
1147                                                 antcomb->total_pkt_count))
1148                                 antcomb->first_ratio = true;
1149                         else
1150                                 antcomb->first_ratio = false;
1151                 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1152                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1153                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1154                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1155                                                 main_rssi_avg, alt_rssi_avg,
1156                                                 antcomb->total_pkt_count))
1157                                 antcomb->first_ratio = true;
1158                         else
1159                                 antcomb->first_ratio = false;
1160                 } else {
1161                         if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1162                             (alt_rssi_avg > main_rssi_avg +
1163                             ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1164                             (alt_rssi_avg > main_rssi_avg)) &&
1165                             (antcomb->total_pkt_count > 50))
1166                                 antcomb->first_ratio = true;
1167                         else
1168                                 antcomb->first_ratio = false;
1169                 }
1170                 break;
1171         case 2:
1172                 antcomb->alt_good = false;
1173                 antcomb->scan_not_start = false;
1174                 antcomb->scan = false;
1175                 antcomb->rssi_first = main_rssi_avg;
1176                 antcomb->rssi_third = alt_rssi_avg;
1177
1178                 if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1)
1179                         antcomb->rssi_lna1 = alt_rssi_avg;
1180                 else if (antcomb->second_quick_scan_conf ==
1181                          ATH_ANT_DIV_COMB_LNA2)
1182                         antcomb->rssi_lna2 = alt_rssi_avg;
1183                 else if (antcomb->second_quick_scan_conf ==
1184                          ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) {
1185                         if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)
1186                                 antcomb->rssi_lna2 = main_rssi_avg;
1187                         else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1)
1188                                 antcomb->rssi_lna1 = main_rssi_avg;
1189                 }
1190
1191                 if (antcomb->rssi_lna2 > antcomb->rssi_lna1 +
1192                     ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)
1193                         div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1194                 else
1195                         div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1;
1196
1197                 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1198                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1199                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1200                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1201                                                 main_rssi_avg, alt_rssi_avg,
1202                                                 antcomb->total_pkt_count))
1203                                 antcomb->second_ratio = true;
1204                         else
1205                                 antcomb->second_ratio = false;
1206                 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1207                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1208                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1209                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1210                                                 main_rssi_avg, alt_rssi_avg,
1211                                                 antcomb->total_pkt_count))
1212                                 antcomb->second_ratio = true;
1213                         else
1214                                 antcomb->second_ratio = false;
1215                 } else {
1216                         if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1217                             (alt_rssi_avg > main_rssi_avg +
1218                             ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1219                             (alt_rssi_avg > main_rssi_avg)) &&
1220                             (antcomb->total_pkt_count > 50))
1221                                 antcomb->second_ratio = true;
1222                         else
1223                                 antcomb->second_ratio = false;
1224                 }
1225
1226                 /* set alt to the conf with maximun ratio */
1227                 if (antcomb->first_ratio && antcomb->second_ratio) {
1228                         if (antcomb->rssi_second > antcomb->rssi_third) {
1229                                 /* first alt*/
1230                                 if ((antcomb->first_quick_scan_conf ==
1231                                     ATH_ANT_DIV_COMB_LNA1) ||
1232                                     (antcomb->first_quick_scan_conf ==
1233                                     ATH_ANT_DIV_COMB_LNA2))
1234                                         /* Set alt LNA1 or LNA2*/
1235                                         if (div_ant_conf->main_lna_conf ==
1236                                             ATH_ANT_DIV_COMB_LNA2)
1237                                                 div_ant_conf->alt_lna_conf =
1238                                                         ATH_ANT_DIV_COMB_LNA1;
1239                                         else
1240                                                 div_ant_conf->alt_lna_conf =
1241                                                         ATH_ANT_DIV_COMB_LNA2;
1242                                 else
1243                                         /* Set alt to A+B or A-B */
1244                                         div_ant_conf->alt_lna_conf =
1245                                                 antcomb->first_quick_scan_conf;
1246                         } else if ((antcomb->second_quick_scan_conf ==
1247                                    ATH_ANT_DIV_COMB_LNA1) ||
1248                                    (antcomb->second_quick_scan_conf ==
1249                                    ATH_ANT_DIV_COMB_LNA2)) {
1250                                 /* Set alt LNA1 or LNA2 */
1251                                 if (div_ant_conf->main_lna_conf ==
1252                                     ATH_ANT_DIV_COMB_LNA2)
1253                                         div_ant_conf->alt_lna_conf =
1254                                                 ATH_ANT_DIV_COMB_LNA1;
1255                                 else
1256                                         div_ant_conf->alt_lna_conf =
1257                                                 ATH_ANT_DIV_COMB_LNA2;
1258                         } else {
1259                                 /* Set alt to A+B or A-B */
1260                                 div_ant_conf->alt_lna_conf =
1261                                         antcomb->second_quick_scan_conf;
1262                         }
1263                 } else if (antcomb->first_ratio) {
1264                         /* first alt */
1265                         if ((antcomb->first_quick_scan_conf ==
1266                             ATH_ANT_DIV_COMB_LNA1) ||
1267                             (antcomb->first_quick_scan_conf ==
1268                             ATH_ANT_DIV_COMB_LNA2))
1269                                         /* Set alt LNA1 or LNA2 */
1270                                 if (div_ant_conf->main_lna_conf ==
1271                                     ATH_ANT_DIV_COMB_LNA2)
1272                                         div_ant_conf->alt_lna_conf =
1273                                                         ATH_ANT_DIV_COMB_LNA1;
1274                                 else
1275                                         div_ant_conf->alt_lna_conf =
1276                                                         ATH_ANT_DIV_COMB_LNA2;
1277                         else
1278                                 /* Set alt to A+B or A-B */
1279                                 div_ant_conf->alt_lna_conf =
1280                                                 antcomb->first_quick_scan_conf;
1281                 } else if (antcomb->second_ratio) {
1282                                 /* second alt */
1283                         if ((antcomb->second_quick_scan_conf ==
1284                             ATH_ANT_DIV_COMB_LNA1) ||
1285                             (antcomb->second_quick_scan_conf ==
1286                             ATH_ANT_DIV_COMB_LNA2))
1287                                 /* Set alt LNA1 or LNA2 */
1288                                 if (div_ant_conf->main_lna_conf ==
1289                                     ATH_ANT_DIV_COMB_LNA2)
1290                                         div_ant_conf->alt_lna_conf =
1291                                                 ATH_ANT_DIV_COMB_LNA1;
1292                                 else
1293                                         div_ant_conf->alt_lna_conf =
1294                                                 ATH_ANT_DIV_COMB_LNA2;
1295                         else
1296                                 /* Set alt to A+B or A-B */
1297                                 div_ant_conf->alt_lna_conf =
1298                                                 antcomb->second_quick_scan_conf;
1299                 } else {
1300                         /* main is largest */
1301                         if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) ||
1302                             (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2))
1303                                 /* Set alt LNA1 or LNA2 */
1304                                 if (div_ant_conf->main_lna_conf ==
1305                                     ATH_ANT_DIV_COMB_LNA2)
1306                                         div_ant_conf->alt_lna_conf =
1307                                                         ATH_ANT_DIV_COMB_LNA1;
1308                                 else
1309                                         div_ant_conf->alt_lna_conf =
1310                                                         ATH_ANT_DIV_COMB_LNA2;
1311                         else
1312                                 /* Set alt to A+B or A-B */
1313                                 div_ant_conf->alt_lna_conf = antcomb->main_conf;
1314                 }
1315                 break;
1316         default:
1317                 break;
1318         }
1319 }
1320
1321 static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf,
1322                 struct ath_ant_comb *antcomb, int alt_ratio)
1323 {
1324         if (ant_conf->div_group == 0) {
1325                 /* Adjust the fast_div_bias based on main and alt lna conf */
1326                 switch ((ant_conf->main_lna_conf << 4) |
1327                                 ant_conf->alt_lna_conf) {
1328                 case (0x01): /* A-B LNA2 */
1329                         ant_conf->fast_div_bias = 0x3b;
1330                         break;
1331                 case (0x02): /* A-B LNA1 */
1332                         ant_conf->fast_div_bias = 0x3d;
1333                         break;
1334                 case (0x03): /* A-B A+B */
1335                         ant_conf->fast_div_bias = 0x1;
1336                         break;
1337                 case (0x10): /* LNA2 A-B */
1338                         ant_conf->fast_div_bias = 0x7;
1339                         break;
1340                 case (0x12): /* LNA2 LNA1 */
1341                         ant_conf->fast_div_bias = 0x2;
1342                         break;
1343                 case (0x13): /* LNA2 A+B */
1344                         ant_conf->fast_div_bias = 0x7;
1345                         break;
1346                 case (0x20): /* LNA1 A-B */
1347                         ant_conf->fast_div_bias = 0x6;
1348                         break;
1349                 case (0x21): /* LNA1 LNA2 */
1350                         ant_conf->fast_div_bias = 0x0;
1351                         break;
1352                 case (0x23): /* LNA1 A+B */
1353                         ant_conf->fast_div_bias = 0x6;
1354                         break;
1355                 case (0x30): /* A+B A-B */
1356                         ant_conf->fast_div_bias = 0x1;
1357                         break;
1358                 case (0x31): /* A+B LNA2 */
1359                         ant_conf->fast_div_bias = 0x3b;
1360                         break;
1361                 case (0x32): /* A+B LNA1 */
1362                         ant_conf->fast_div_bias = 0x3d;
1363                         break;
1364                 default:
1365                         break;
1366                 }
1367         } else if (ant_conf->div_group == 2) {
1368                 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1369                 switch ((ant_conf->main_lna_conf << 4) |
1370                                 ant_conf->alt_lna_conf) {
1371                 case (0x01): /* A-B LNA2 */
1372                         ant_conf->fast_div_bias = 0x1;
1373                         ant_conf->main_gaintb = 0;
1374                         ant_conf->alt_gaintb = 0;
1375                         break;
1376                 case (0x02): /* A-B LNA1 */
1377                         ant_conf->fast_div_bias = 0x1;
1378                         ant_conf->main_gaintb = 0;
1379                         ant_conf->alt_gaintb = 0;
1380                         break;
1381                 case (0x03): /* A-B A+B */
1382                         ant_conf->fast_div_bias = 0x1;
1383                         ant_conf->main_gaintb = 0;
1384                         ant_conf->alt_gaintb = 0;
1385                         break;
1386                 case (0x10): /* LNA2 A-B */
1387                         if (!(antcomb->scan) &&
1388                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1389                                 ant_conf->fast_div_bias = 0x1;
1390                         else
1391                                 ant_conf->fast_div_bias = 0x2;
1392                         ant_conf->main_gaintb = 0;
1393                         ant_conf->alt_gaintb = 0;
1394                         break;
1395                 case (0x12): /* LNA2 LNA1 */
1396                         ant_conf->fast_div_bias = 0x1;
1397                         ant_conf->main_gaintb = 0;
1398                         ant_conf->alt_gaintb = 0;
1399                         break;
1400                 case (0x13): /* LNA2 A+B */
1401                         if (!(antcomb->scan) &&
1402                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1403                                 ant_conf->fast_div_bias = 0x1;
1404                         else
1405                                 ant_conf->fast_div_bias = 0x2;
1406                         ant_conf->main_gaintb = 0;
1407                         ant_conf->alt_gaintb = 0;
1408                         break;
1409                 case (0x20): /* LNA1 A-B */
1410                         if (!(antcomb->scan) &&
1411                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1412                                 ant_conf->fast_div_bias = 0x1;
1413                         else
1414                                 ant_conf->fast_div_bias = 0x2;
1415                         ant_conf->main_gaintb = 0;
1416                         ant_conf->alt_gaintb = 0;
1417                         break;
1418                 case (0x21): /* LNA1 LNA2 */
1419                         ant_conf->fast_div_bias = 0x1;
1420                         ant_conf->main_gaintb = 0;
1421                         ant_conf->alt_gaintb = 0;
1422                         break;
1423                 case (0x23): /* LNA1 A+B */
1424                         if (!(antcomb->scan) &&
1425                                 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1426                                 ant_conf->fast_div_bias = 0x1;
1427                         else
1428                                 ant_conf->fast_div_bias = 0x2;
1429                         ant_conf->main_gaintb = 0;
1430                         ant_conf->alt_gaintb = 0;
1431                         break;
1432                 case (0x30): /* A+B A-B */
1433                         ant_conf->fast_div_bias = 0x1;
1434                         ant_conf->main_gaintb = 0;
1435                         ant_conf->alt_gaintb = 0;
1436                         break;
1437                 case (0x31): /* A+B LNA2 */
1438                         ant_conf->fast_div_bias = 0x1;
1439                         ant_conf->main_gaintb = 0;
1440                         ant_conf->alt_gaintb = 0;
1441                         break;
1442                 case (0x32): /* A+B LNA1 */
1443                         ant_conf->fast_div_bias = 0x1;
1444                         ant_conf->main_gaintb = 0;
1445                         ant_conf->alt_gaintb = 0;
1446                         break;
1447                 default:
1448                         break;
1449                 }
1450
1451         }
1452
1453 }
1454
1455 /* Antenna diversity and combining */
1456 static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs)
1457 {
1458         struct ath_hw_antcomb_conf div_ant_conf;
1459         struct ath_ant_comb *antcomb = &sc->ant_comb;
1460         int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
1461         int curr_main_set;
1462         int main_rssi = rs->rs_rssi_ctl0;
1463         int alt_rssi = rs->rs_rssi_ctl1;
1464         int rx_ant_conf,  main_ant_conf;
1465         bool short_scan = false;
1466
1467         rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) &
1468                        ATH_ANT_RX_MASK;
1469         main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) &
1470                          ATH_ANT_RX_MASK;
1471
1472         /* Record packet only when both main_rssi and  alt_rssi is positive */
1473         if (main_rssi > 0 && alt_rssi > 0) {
1474                 antcomb->total_pkt_count++;
1475                 antcomb->main_total_rssi += main_rssi;
1476                 antcomb->alt_total_rssi  += alt_rssi;
1477                 if (main_ant_conf == rx_ant_conf)
1478                         antcomb->main_recv_cnt++;
1479                 else
1480                         antcomb->alt_recv_cnt++;
1481         }
1482
1483         /* Short scan check */
1484         if (antcomb->scan && antcomb->alt_good) {
1485                 if (time_after(jiffies, antcomb->scan_start_time +
1486                     msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR)))
1487                         short_scan = true;
1488                 else
1489                         if (antcomb->total_pkt_count ==
1490                             ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) {
1491                                 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1492                                             antcomb->total_pkt_count);
1493                                 if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
1494                                         short_scan = true;
1495                         }
1496         }
1497
1498         if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) ||
1499             rs->rs_moreaggr) && !short_scan)
1500                 return;
1501
1502         if (antcomb->total_pkt_count) {
1503                 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1504                              antcomb->total_pkt_count);
1505                 main_rssi_avg = (antcomb->main_total_rssi /
1506                                  antcomb->total_pkt_count);
1507                 alt_rssi_avg = (antcomb->alt_total_rssi /
1508                                  antcomb->total_pkt_count);
1509         }
1510
1511
1512         ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf);
1513         curr_alt_set = div_ant_conf.alt_lna_conf;
1514         curr_main_set = div_ant_conf.main_lna_conf;
1515
1516         antcomb->count++;
1517
1518         if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) {
1519                 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
1520                         ath_lnaconf_alt_good_scan(antcomb, div_ant_conf,
1521                                                   main_rssi_avg);
1522                         antcomb->alt_good = true;
1523                 } else {
1524                         antcomb->alt_good = false;
1525                 }
1526
1527                 antcomb->count = 0;
1528                 antcomb->scan = true;
1529                 antcomb->scan_not_start = true;
1530         }
1531
1532         if (!antcomb->scan) {
1533                 if (ath_ant_div_comb_alt_check(div_ant_conf.div_group,
1534                                         alt_ratio, curr_main_set, curr_alt_set,
1535                                         alt_rssi_avg, main_rssi_avg)) {
1536                         if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) {
1537                                 /* Switch main and alt LNA */
1538                                 div_ant_conf.main_lna_conf =
1539                                                 ATH_ANT_DIV_COMB_LNA2;
1540                                 div_ant_conf.alt_lna_conf  =
1541                                                 ATH_ANT_DIV_COMB_LNA1;
1542                         } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) {
1543                                 div_ant_conf.main_lna_conf =
1544                                                 ATH_ANT_DIV_COMB_LNA1;
1545                                 div_ant_conf.alt_lna_conf  =
1546                                                 ATH_ANT_DIV_COMB_LNA2;
1547                         }
1548
1549                         goto div_comb_done;
1550                 } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) &&
1551                            (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) {
1552                         /* Set alt to another LNA */
1553                         if (curr_main_set == ATH_ANT_DIV_COMB_LNA2)
1554                                 div_ant_conf.alt_lna_conf =
1555                                                 ATH_ANT_DIV_COMB_LNA1;
1556                         else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1)
1557                                 div_ant_conf.alt_lna_conf =
1558                                                 ATH_ANT_DIV_COMB_LNA2;
1559
1560                         goto div_comb_done;
1561                 }
1562
1563                 if ((alt_rssi_avg < (main_rssi_avg +
1564                                                 div_ant_conf.lna1_lna2_delta)))
1565                         goto div_comb_done;
1566         }
1567
1568         if (!antcomb->scan_not_start) {
1569                 switch (curr_alt_set) {
1570                 case ATH_ANT_DIV_COMB_LNA2:
1571                         antcomb->rssi_lna2 = alt_rssi_avg;
1572                         antcomb->rssi_lna1 = main_rssi_avg;
1573                         antcomb->scan = true;
1574                         /* set to A+B */
1575                         div_ant_conf.main_lna_conf =
1576                                 ATH_ANT_DIV_COMB_LNA1;
1577                         div_ant_conf.alt_lna_conf  =
1578                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1579                         break;
1580                 case ATH_ANT_DIV_COMB_LNA1:
1581                         antcomb->rssi_lna1 = alt_rssi_avg;
1582                         antcomb->rssi_lna2 = main_rssi_avg;
1583                         antcomb->scan = true;
1584                         /* set to A+B */
1585                         div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1586                         div_ant_conf.alt_lna_conf  =
1587                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1588                         break;
1589                 case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2:
1590                         antcomb->rssi_add = alt_rssi_avg;
1591                         antcomb->scan = true;
1592                         /* set to A-B */
1593                         div_ant_conf.alt_lna_conf =
1594                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1595                         break;
1596                 case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2:
1597                         antcomb->rssi_sub = alt_rssi_avg;
1598                         antcomb->scan = false;
1599                         if (antcomb->rssi_lna2 >
1600                             (antcomb->rssi_lna1 +
1601                             ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) {
1602                                 /* use LNA2 as main LNA */
1603                                 if ((antcomb->rssi_add > antcomb->rssi_lna1) &&
1604                                     (antcomb->rssi_add > antcomb->rssi_sub)) {
1605                                         /* set to A+B */
1606                                         div_ant_conf.main_lna_conf =
1607                                                 ATH_ANT_DIV_COMB_LNA2;
1608                                         div_ant_conf.alt_lna_conf  =
1609                                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1610                                 } else if (antcomb->rssi_sub >
1611                                            antcomb->rssi_lna1) {
1612                                         /* set to A-B */
1613                                         div_ant_conf.main_lna_conf =
1614                                                 ATH_ANT_DIV_COMB_LNA2;
1615                                         div_ant_conf.alt_lna_conf =
1616                                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1617                                 } else {
1618                                         /* set to LNA1 */
1619                                         div_ant_conf.main_lna_conf =
1620                                                 ATH_ANT_DIV_COMB_LNA2;
1621                                         div_ant_conf.alt_lna_conf =
1622                                                 ATH_ANT_DIV_COMB_LNA1;
1623                                 }
1624                         } else {
1625                                 /* use LNA1 as main LNA */
1626                                 if ((antcomb->rssi_add > antcomb->rssi_lna2) &&
1627                                     (antcomb->rssi_add > antcomb->rssi_sub)) {
1628                                         /* set to A+B */
1629                                         div_ant_conf.main_lna_conf =
1630                                                 ATH_ANT_DIV_COMB_LNA1;
1631                                         div_ant_conf.alt_lna_conf  =
1632                                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1633                                 } else if (antcomb->rssi_sub >
1634                                            antcomb->rssi_lna1) {
1635                                         /* set to A-B */
1636                                         div_ant_conf.main_lna_conf =
1637                                                 ATH_ANT_DIV_COMB_LNA1;
1638                                         div_ant_conf.alt_lna_conf =
1639                                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1640                                 } else {
1641                                         /* set to LNA2 */
1642                                         div_ant_conf.main_lna_conf =
1643                                                 ATH_ANT_DIV_COMB_LNA1;
1644                                         div_ant_conf.alt_lna_conf =
1645                                                 ATH_ANT_DIV_COMB_LNA2;
1646                                 }
1647                         }
1648                         break;
1649                 default:
1650                         break;
1651                 }
1652         } else {
1653                 if (!antcomb->alt_good) {
1654                         antcomb->scan_not_start = false;
1655                         /* Set alt to another LNA */
1656                         if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) {
1657                                 div_ant_conf.main_lna_conf =
1658                                                 ATH_ANT_DIV_COMB_LNA2;
1659                                 div_ant_conf.alt_lna_conf =
1660                                                 ATH_ANT_DIV_COMB_LNA1;
1661                         } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) {
1662                                 div_ant_conf.main_lna_conf =
1663                                                 ATH_ANT_DIV_COMB_LNA1;
1664                                 div_ant_conf.alt_lna_conf =
1665                                                 ATH_ANT_DIV_COMB_LNA2;
1666                         }
1667                         goto div_comb_done;
1668                 }
1669         }
1670
1671         ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf,
1672                                            main_rssi_avg, alt_rssi_avg,
1673                                            alt_ratio);
1674
1675         antcomb->quick_scan_cnt++;
1676
1677 div_comb_done:
1678         ath_ant_div_conf_fast_divbias(&div_ant_conf, antcomb, alt_ratio);
1679         ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf);
1680
1681         antcomb->scan_start_time = jiffies;
1682         antcomb->total_pkt_count = 0;
1683         antcomb->main_total_rssi = 0;
1684         antcomb->alt_total_rssi = 0;
1685         antcomb->main_recv_cnt = 0;
1686         antcomb->alt_recv_cnt = 0;
1687 }
1688
1689 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1690 {
1691         struct ath_buf *bf;
1692         struct sk_buff *skb = NULL, *requeue_skb, *hdr_skb;
1693         struct ieee80211_rx_status *rxs;
1694         struct ath_hw *ah = sc->sc_ah;
1695         struct ath_common *common = ath9k_hw_common(ah);
1696         /*
1697          * The hw can technically differ from common->hw when using ath9k
1698          * virtual wiphy so to account for that we iterate over the active
1699          * wiphys and find the appropriate wiphy and therefore hw.
1700          */
1701         struct ieee80211_hw *hw = sc->hw;
1702         struct ieee80211_hdr *hdr;
1703         int retval;
1704         bool decrypt_error = false;
1705         struct ath_rx_status rs;
1706         enum ath9k_rx_qtype qtype;
1707         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1708         int dma_type;
1709         u8 rx_status_len = ah->caps.rx_status_len;
1710         u64 tsf = 0;
1711         u32 tsf_lower = 0;
1712         unsigned long flags;
1713
1714         if (edma)
1715                 dma_type = DMA_BIDIRECTIONAL;
1716         else
1717                 dma_type = DMA_FROM_DEVICE;
1718
1719         qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
1720         spin_lock_bh(&sc->rx.rxbuflock);
1721
1722         tsf = ath9k_hw_gettsf64(ah);
1723         tsf_lower = tsf & 0xffffffff;
1724
1725         do {
1726                 /* If handling rx interrupt and flush is in progress => exit */
1727                 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
1728                         break;
1729
1730                 memset(&rs, 0, sizeof(rs));
1731                 if (edma)
1732                         bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
1733                 else
1734                         bf = ath_get_next_rx_buf(sc, &rs);
1735
1736                 if (!bf)
1737                         break;
1738
1739                 skb = bf->bf_mpdu;
1740                 if (!skb)
1741                         continue;
1742
1743                 /*
1744                  * Take frame header from the first fragment and RX status from
1745                  * the last one.
1746                  */
1747                 if (sc->rx.frag)
1748                         hdr_skb = sc->rx.frag;
1749                 else
1750                         hdr_skb = skb;
1751
1752                 hdr = (struct ieee80211_hdr *) (hdr_skb->data + rx_status_len);
1753                 rxs = IEEE80211_SKB_RXCB(hdr_skb);
1754
1755                 ath_debug_stat_rx(sc, &rs);
1756
1757                 /*
1758                  * If we're asked to flush receive queue, directly
1759                  * chain it back at the queue without processing it.
1760                  */
1761                 if (flush)
1762                         goto requeue_drop_frag;
1763
1764                 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
1765                                                  rxs, &decrypt_error);
1766                 if (retval)
1767                         goto requeue_drop_frag;
1768
1769                 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
1770                 if (rs.rs_tstamp > tsf_lower &&
1771                     unlikely(rs.rs_tstamp - tsf_lower > 0x10000000))
1772                         rxs->mactime -= 0x100000000ULL;
1773
1774                 if (rs.rs_tstamp < tsf_lower &&
1775                     unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
1776                         rxs->mactime += 0x100000000ULL;
1777
1778                 /* Ensure we always have an skb to requeue once we are done
1779                  * processing the current buffer's skb */
1780                 requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
1781
1782                 /* If there is no memory we ignore the current RX'd frame,
1783                  * tell hardware it can give us a new frame using the old
1784                  * skb and put it at the tail of the sc->rx.rxbuf list for
1785                  * processing. */
1786                 if (!requeue_skb)
1787                         goto requeue_drop_frag;
1788
1789                 /* Unmap the frame */
1790                 dma_unmap_single(sc->dev, bf->bf_buf_addr,
1791                                  common->rx_bufsize,
1792                                  dma_type);
1793
1794                 skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len);
1795                 if (ah->caps.rx_status_len)
1796                         skb_pull(skb, ah->caps.rx_status_len);
1797
1798                 if (!rs.rs_more)
1799                         ath9k_rx_skb_postprocess(common, hdr_skb, &rs,
1800                                                  rxs, decrypt_error);
1801
1802                 /* We will now give hardware our shiny new allocated skb */
1803                 bf->bf_mpdu = requeue_skb;
1804                 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
1805                                                  common->rx_bufsize,
1806                                                  dma_type);
1807                 if (unlikely(dma_mapping_error(sc->dev,
1808                           bf->bf_buf_addr))) {
1809                         dev_kfree_skb_any(requeue_skb);
1810                         bf->bf_mpdu = NULL;
1811                         bf->bf_buf_addr = 0;
1812                         ath_err(common, "dma_mapping_error() on RX\n");
1813                         ieee80211_rx(hw, skb);
1814                         break;
1815                 }
1816
1817                 if (rs.rs_more) {
1818                         /*
1819                          * rs_more indicates chained descriptors which can be
1820                          * used to link buffers together for a sort of
1821                          * scatter-gather operation.
1822                          */
1823                         if (sc->rx.frag) {
1824                                 /* too many fragments - cannot handle frame */
1825                                 dev_kfree_skb_any(sc->rx.frag);
1826                                 dev_kfree_skb_any(skb);
1827                                 skb = NULL;
1828                         }
1829                         sc->rx.frag = skb;
1830                         goto requeue;
1831                 }
1832
1833                 if (sc->rx.frag) {
1834                         int space = skb->len - skb_tailroom(hdr_skb);
1835
1836                         sc->rx.frag = NULL;
1837
1838                         if (pskb_expand_head(hdr_skb, 0, space, GFP_ATOMIC) < 0) {
1839                                 dev_kfree_skb(skb);
1840                                 goto requeue_drop_frag;
1841                         }
1842
1843                         skb_copy_from_linear_data(skb, skb_put(hdr_skb, skb->len),
1844                                                   skb->len);
1845                         dev_kfree_skb_any(skb);
1846                         skb = hdr_skb;
1847                 }
1848
1849                 /*
1850                  * change the default rx antenna if rx diversity chooses the
1851                  * other antenna 3 times in a row.
1852                  */
1853                 if (sc->rx.defant != rs.rs_antenna) {
1854                         if (++sc->rx.rxotherant >= 3)
1855                                 ath_setdefantenna(sc, rs.rs_antenna);
1856                 } else {
1857                         sc->rx.rxotherant = 0;
1858                 }
1859
1860                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1861
1862                 if ((sc->ps_flags & (PS_WAIT_FOR_BEACON |
1863                                               PS_WAIT_FOR_CAB |
1864                                               PS_WAIT_FOR_PSPOLL_DATA)) ||
1865                                                 ath9k_check_auto_sleep(sc))
1866                         ath_rx_ps(sc, skb);
1867                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1868
1869                 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)
1870                         ath_ant_comb_scan(sc, &rs);
1871
1872                 ieee80211_rx(hw, skb);
1873
1874 requeue_drop_frag:
1875                 if (sc->rx.frag) {
1876                         dev_kfree_skb_any(sc->rx.frag);
1877                         sc->rx.frag = NULL;
1878                 }
1879 requeue:
1880                 if (edma) {
1881                         list_add_tail(&bf->list, &sc->rx.rxbuf);
1882                         ath_rx_edma_buf_link(sc, qtype);
1883                 } else {
1884                         list_move_tail(&bf->list, &sc->rx.rxbuf);
1885                         ath_rx_buf_link(sc, bf);
1886                         ath9k_hw_rxena(ah);
1887                 }
1888         } while (1);
1889
1890         spin_unlock_bh(&sc->rx.rxbuflock);
1891
1892         return 0;
1893 }