WorkStruct: make allyesconfig
[linux-3.10.git] / drivers / net / r8169.c
1 /*
2 =========================================================================
3  r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver for Linux kernel 2.4.x.
4  --------------------------------------------------------------------
5
6  History:
7  Feb  4 2002    - created initially by ShuChen <shuchen@realtek.com.tw>.
8  May 20 2002    - Add link status force-mode and TBI mode support.
9         2004    - Massive updates. See kernel SCM system for details.
10 =========================================================================
11   1. [DEPRECATED: use ethtool instead] The media can be forced in 5 modes.
12          Command: 'insmod r8169 media = SET_MEDIA'
13          Ex:      'insmod r8169 media = 0x04' will force PHY to operate in 100Mpbs Half-duplex.
14
15          SET_MEDIA can be:
16                 _10_Half        = 0x01
17                 _10_Full        = 0x02
18                 _100_Half       = 0x04
19                 _100_Full       = 0x08
20                 _1000_Full      = 0x10
21
22   2. Support TBI mode.
23 =========================================================================
24 VERSION 1.1     <2002/10/4>
25
26         The bit4:0 of MII register 4 is called "selector field", and have to be
27         00001b to indicate support of IEEE std 802.3 during NWay process of
28         exchanging Link Code Word (FLP).
29
30 VERSION 1.2     <2002/11/30>
31
32         - Large style cleanup
33         - Use ether_crc in stock kernel (linux/crc32.h)
34         - Copy mc_filter setup code from 8139cp
35           (includes an optimization, and avoids set_bit use)
36
37 VERSION 1.6LK   <2004/04/14>
38
39         - Merge of Realtek's version 1.6
40         - Conversion to DMA API
41         - Suspend/resume
42         - Endianness
43         - Misc Rx/Tx bugs
44
45 VERSION 2.2LK   <2005/01/25>
46
47         - RX csum, TX csum/SG, TSO
48         - VLAN
49         - baby (< 7200) Jumbo frames support
50         - Merge of Realtek's version 2.2 (new phy)
51  */
52
53 #include <linux/module.h>
54 #include <linux/moduleparam.h>
55 #include <linux/pci.h>
56 #include <linux/netdevice.h>
57 #include <linux/etherdevice.h>
58 #include <linux/delay.h>
59 #include <linux/ethtool.h>
60 #include <linux/mii.h>
61 #include <linux/if_vlan.h>
62 #include <linux/crc32.h>
63 #include <linux/in.h>
64 #include <linux/ip.h>
65 #include <linux/tcp.h>
66 #include <linux/init.h>
67 #include <linux/dma-mapping.h>
68
69 #include <asm/io.h>
70 #include <asm/irq.h>
71
72 #ifdef CONFIG_R8169_NAPI
73 #define NAPI_SUFFIX     "-NAPI"
74 #else
75 #define NAPI_SUFFIX     ""
76 #endif
77
78 #define RTL8169_VERSION "2.2LK" NAPI_SUFFIX
79 #define MODULENAME "r8169"
80 #define PFX MODULENAME ": "
81
82 #ifdef RTL8169_DEBUG
83 #define assert(expr) \
84         if (!(expr)) {                                  \
85                 printk( "Assertion failed! %s,%s,%s,line=%d\n", \
86                 #expr,__FILE__,__FUNCTION__,__LINE__);          \
87         }
88 #define dprintk(fmt, args...)   do { printk(PFX fmt, ## args); } while (0)
89 #else
90 #define assert(expr) do {} while (0)
91 #define dprintk(fmt, args...)   do {} while (0)
92 #endif /* RTL8169_DEBUG */
93
94 #define R8169_MSG_DEFAULT \
95         (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
96
97 #define TX_BUFFS_AVAIL(tp) \
98         (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
99
100 #ifdef CONFIG_R8169_NAPI
101 #define rtl8169_rx_skb                  netif_receive_skb
102 #define rtl8169_rx_hwaccel_skb          vlan_hwaccel_receive_skb
103 #define rtl8169_rx_quota(count, quota)  min(count, quota)
104 #else
105 #define rtl8169_rx_skb                  netif_rx
106 #define rtl8169_rx_hwaccel_skb          vlan_hwaccel_rx
107 #define rtl8169_rx_quota(count, quota)  count
108 #endif
109
110 /* media options */
111 #define MAX_UNITS 8
112 static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
113 static int num_media = 0;
114
115 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
116 static const int max_interrupt_work = 20;
117
118 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
119    The RTL chips use a 64 element hash table based on the Ethernet CRC. */
120 static const int multicast_filter_limit = 32;
121
122 /* MAC address length */
123 #define MAC_ADDR_LEN    6
124
125 #define RX_FIFO_THRESH  7       /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
126 #define RX_DMA_BURST    6       /* Maximum PCI burst, '6' is 1024 */
127 #define TX_DMA_BURST    6       /* Maximum PCI burst, '6' is 1024 */
128 #define EarlyTxThld     0x3F    /* 0x3F means NO early transmit */
129 #define RxPacketMaxSize 0x3FE8  /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
130 #define SafeMtu         0x1c20  /* ... actually life sucks beyond ~7k */
131 #define InterFrameGap   0x03    /* 3 means InterFrameGap = the shortest one */
132
133 #define R8169_REGS_SIZE         256
134 #define R8169_NAPI_WEIGHT       64
135 #define NUM_TX_DESC     64      /* Number of Tx descriptor registers */
136 #define NUM_RX_DESC     256     /* Number of Rx descriptor registers */
137 #define RX_BUF_SIZE     1536    /* Rx Buffer size */
138 #define R8169_TX_RING_BYTES     (NUM_TX_DESC * sizeof(struct TxDesc))
139 #define R8169_RX_RING_BYTES     (NUM_RX_DESC * sizeof(struct RxDesc))
140
141 #define RTL8169_TX_TIMEOUT      (6*HZ)
142 #define RTL8169_PHY_TIMEOUT     (10*HZ)
143
144 /* write/read MMIO register */
145 #define RTL_W8(reg, val8)       writeb ((val8), ioaddr + (reg))
146 #define RTL_W16(reg, val16)     writew ((val16), ioaddr + (reg))
147 #define RTL_W32(reg, val32)     writel ((val32), ioaddr + (reg))
148 #define RTL_R8(reg)             readb (ioaddr + (reg))
149 #define RTL_R16(reg)            readw (ioaddr + (reg))
150 #define RTL_R32(reg)            ((unsigned long) readl (ioaddr + (reg)))
151
152 enum mac_version {
153         RTL_GIGA_MAC_VER_01 = 0x00,
154         RTL_GIGA_MAC_VER_02 = 0x01,
155         RTL_GIGA_MAC_VER_03 = 0x02,
156         RTL_GIGA_MAC_VER_04 = 0x03,
157         RTL_GIGA_MAC_VER_05 = 0x04,
158         RTL_GIGA_MAC_VER_11 = 0x0b,
159         RTL_GIGA_MAC_VER_12 = 0x0c,
160         RTL_GIGA_MAC_VER_13 = 0x0d,
161         RTL_GIGA_MAC_VER_14 = 0x0e,
162         RTL_GIGA_MAC_VER_15 = 0x0f
163 };
164
165 enum phy_version {
166         RTL_GIGA_PHY_VER_C = 0x03, /* PHY Reg 0x03 bit0-3 == 0x0000 */
167         RTL_GIGA_PHY_VER_D = 0x04, /* PHY Reg 0x03 bit0-3 == 0x0000 */
168         RTL_GIGA_PHY_VER_E = 0x05, /* PHY Reg 0x03 bit0-3 == 0x0000 */
169         RTL_GIGA_PHY_VER_F = 0x06, /* PHY Reg 0x03 bit0-3 == 0x0001 */
170         RTL_GIGA_PHY_VER_G = 0x07, /* PHY Reg 0x03 bit0-3 == 0x0002 */
171         RTL_GIGA_PHY_VER_H = 0x08, /* PHY Reg 0x03 bit0-3 == 0x0003 */
172 };
173
174 #define _R(NAME,MAC,MASK) \
175         { .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
176
177 static const struct {
178         const char *name;
179         u8 mac_version;
180         u32 RxConfigMask;       /* Clears the bits supported by this chip */
181 } rtl_chip_info[] = {
182         _R("RTL8169",           RTL_GIGA_MAC_VER_01, 0xff7e1880),
183         _R("RTL8169s/8110s",    RTL_GIGA_MAC_VER_02, 0xff7e1880),
184         _R("RTL8169s/8110s",    RTL_GIGA_MAC_VER_03, 0xff7e1880),
185         _R("RTL8169sb/8110sb",  RTL_GIGA_MAC_VER_04, 0xff7e1880),
186         _R("RTL8169sc/8110sc",  RTL_GIGA_MAC_VER_05, 0xff7e1880),
187         _R("RTL8168b/8111b",    RTL_GIGA_MAC_VER_11, 0xff7e1880), // PCI-E
188         _R("RTL8168b/8111b",    RTL_GIGA_MAC_VER_12, 0xff7e1880), // PCI-E
189         _R("RTL8101e",          RTL_GIGA_MAC_VER_13, 0xff7e1880), // PCI-E 8139
190         _R("RTL8100e",          RTL_GIGA_MAC_VER_14, 0xff7e1880), // PCI-E 8139
191         _R("RTL8100e",          RTL_GIGA_MAC_VER_15, 0xff7e1880)  // PCI-E 8139
192 };
193 #undef _R
194
195 enum cfg_version {
196         RTL_CFG_0 = 0x00,
197         RTL_CFG_1,
198         RTL_CFG_2
199 };
200
201 static const struct {
202         unsigned int region;
203         unsigned int align;
204 } rtl_cfg_info[] = {
205         [RTL_CFG_0] = { 1, NET_IP_ALIGN },
206         [RTL_CFG_1] = { 2, NET_IP_ALIGN },
207         [RTL_CFG_2] = { 2, 8 }
208 };
209
210 static struct pci_device_id rtl8169_pci_tbl[] = {
211         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8129), 0, 0, RTL_CFG_0 },
212         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8136), 0, 0, RTL_CFG_2 },
213         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8167), 0, 0, RTL_CFG_0 },
214         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8168), 0, 0, RTL_CFG_2 },
215         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK,     0x8169), 0, 0, RTL_CFG_0 },
216         { PCI_DEVICE(PCI_VENDOR_ID_DLINK,       0x4300), 0, 0, RTL_CFG_0 },
217         { PCI_DEVICE(0x1259,                    0xc107), 0, 0, RTL_CFG_0 },
218         { PCI_DEVICE(0x16ec,                    0x0116), 0, 0, RTL_CFG_0 },
219         { PCI_VENDOR_ID_LINKSYS,                0x1032,
220                 PCI_ANY_ID, 0x0024, 0, 0, RTL_CFG_0 },
221         {0,},
222 };
223
224 MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl);
225
226 static int rx_copybreak = 200;
227 static int use_dac;
228 static struct {
229         u32 msg_enable;
230 } debug = { -1 };
231
232 enum RTL8169_registers {
233         MAC0 = 0,               /* Ethernet hardware address. */
234         MAR0 = 8,               /* Multicast filter. */
235         CounterAddrLow = 0x10,
236         CounterAddrHigh = 0x14,
237         TxDescStartAddrLow = 0x20,
238         TxDescStartAddrHigh = 0x24,
239         TxHDescStartAddrLow = 0x28,
240         TxHDescStartAddrHigh = 0x2c,
241         FLASH = 0x30,
242         ERSR = 0x36,
243         ChipCmd = 0x37,
244         TxPoll = 0x38,
245         IntrMask = 0x3C,
246         IntrStatus = 0x3E,
247         TxConfig = 0x40,
248         RxConfig = 0x44,
249         RxMissed = 0x4C,
250         Cfg9346 = 0x50,
251         Config0 = 0x51,
252         Config1 = 0x52,
253         Config2 = 0x53,
254         Config3 = 0x54,
255         Config4 = 0x55,
256         Config5 = 0x56,
257         MultiIntr = 0x5C,
258         PHYAR = 0x60,
259         TBICSR = 0x64,
260         TBI_ANAR = 0x68,
261         TBI_LPAR = 0x6A,
262         PHYstatus = 0x6C,
263         RxMaxSize = 0xDA,
264         CPlusCmd = 0xE0,
265         IntrMitigate = 0xE2,
266         RxDescAddrLow = 0xE4,
267         RxDescAddrHigh = 0xE8,
268         EarlyTxThres = 0xEC,
269         FuncEvent = 0xF0,
270         FuncEventMask = 0xF4,
271         FuncPresetState = 0xF8,
272         FuncForceEvent = 0xFC,
273 };
274
275 enum RTL8169_register_content {
276         /* InterruptStatusBits */
277         SYSErr = 0x8000,
278         PCSTimeout = 0x4000,
279         SWInt = 0x0100,
280         TxDescUnavail = 0x80,
281         RxFIFOOver = 0x40,
282         LinkChg = 0x20,
283         RxOverflow = 0x10,
284         TxErr = 0x08,
285         TxOK = 0x04,
286         RxErr = 0x02,
287         RxOK = 0x01,
288
289         /* RxStatusDesc */
290         RxFOVF  = (1 << 23),
291         RxRWT   = (1 << 22),
292         RxRES   = (1 << 21),
293         RxRUNT  = (1 << 20),
294         RxCRC   = (1 << 19),
295
296         /* ChipCmdBits */
297         CmdReset = 0x10,
298         CmdRxEnb = 0x08,
299         CmdTxEnb = 0x04,
300         RxBufEmpty = 0x01,
301
302         /* Cfg9346Bits */
303         Cfg9346_Lock = 0x00,
304         Cfg9346_Unlock = 0xC0,
305
306         /* rx_mode_bits */
307         AcceptErr = 0x20,
308         AcceptRunt = 0x10,
309         AcceptBroadcast = 0x08,
310         AcceptMulticast = 0x04,
311         AcceptMyPhys = 0x02,
312         AcceptAllPhys = 0x01,
313
314         /* RxConfigBits */
315         RxCfgFIFOShift = 13,
316         RxCfgDMAShift = 8,
317
318         /* TxConfigBits */
319         TxInterFrameGapShift = 24,
320         TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
321
322         /* Config1 register p.24 */
323         PMEnable        = (1 << 0),     /* Power Management Enable */
324
325         /* Config3 register p.25 */
326         MagicPacket     = (1 << 5),     /* Wake up when receives a Magic Packet */
327         LinkUp          = (1 << 4),     /* Wake up when the cable connection is re-established */
328
329         /* Config5 register p.27 */
330         BWF             = (1 << 6),     /* Accept Broadcast wakeup frame */
331         MWF             = (1 << 5),     /* Accept Multicast wakeup frame */
332         UWF             = (1 << 4),     /* Accept Unicast wakeup frame */
333         LanWake         = (1 << 1),     /* LanWake enable/disable */
334         PMEStatus       = (1 << 0),     /* PME status can be reset by PCI RST# */
335
336         /* TBICSR p.28 */
337         TBIReset        = 0x80000000,
338         TBILoopback     = 0x40000000,
339         TBINwEnable     = 0x20000000,
340         TBINwRestart    = 0x10000000,
341         TBILinkOk       = 0x02000000,
342         TBINwComplete   = 0x01000000,
343
344         /* CPlusCmd p.31 */
345         RxVlan          = (1 << 6),
346         RxChkSum        = (1 << 5),
347         PCIDAC          = (1 << 4),
348         PCIMulRW        = (1 << 3),
349
350         /* rtl8169_PHYstatus */
351         TBI_Enable = 0x80,
352         TxFlowCtrl = 0x40,
353         RxFlowCtrl = 0x20,
354         _1000bpsF = 0x10,
355         _100bps = 0x08,
356         _10bps = 0x04,
357         LinkStatus = 0x02,
358         FullDup = 0x01,
359
360         /* _MediaType */
361         _10_Half = 0x01,
362         _10_Full = 0x02,
363         _100_Half = 0x04,
364         _100_Full = 0x08,
365         _1000_Full = 0x10,
366
367         /* _TBICSRBit */
368         TBILinkOK = 0x02000000,
369
370         /* DumpCounterCommand */
371         CounterDump = 0x8,
372 };
373
374 enum _DescStatusBit {
375         DescOwn         = (1 << 31), /* Descriptor is owned by NIC */
376         RingEnd         = (1 << 30), /* End of descriptor ring */
377         FirstFrag       = (1 << 29), /* First segment of a packet */
378         LastFrag        = (1 << 28), /* Final segment of a packet */
379
380         /* Tx private */
381         LargeSend       = (1 << 27), /* TCP Large Send Offload (TSO) */
382         MSSShift        = 16,        /* MSS value position */
383         MSSMask         = 0xfff,     /* MSS value + LargeSend bit: 12 bits */
384         IPCS            = (1 << 18), /* Calculate IP checksum */
385         UDPCS           = (1 << 17), /* Calculate UDP/IP checksum */
386         TCPCS           = (1 << 16), /* Calculate TCP/IP checksum */
387         TxVlanTag       = (1 << 17), /* Add VLAN tag */
388
389         /* Rx private */
390         PID1            = (1 << 18), /* Protocol ID bit 1/2 */
391         PID0            = (1 << 17), /* Protocol ID bit 2/2 */
392
393 #define RxProtoUDP      (PID1)
394 #define RxProtoTCP      (PID0)
395 #define RxProtoIP       (PID1 | PID0)
396 #define RxProtoMask     RxProtoIP
397
398         IPFail          = (1 << 16), /* IP checksum failed */
399         UDPFail         = (1 << 15), /* UDP/IP checksum failed */
400         TCPFail         = (1 << 14), /* TCP/IP checksum failed */
401         RxVlanTag       = (1 << 16), /* VLAN tag available */
402 };
403
404 #define RsvdMask        0x3fffc000
405
406 struct TxDesc {
407         u32 opts1;
408         u32 opts2;
409         u64 addr;
410 };
411
412 struct RxDesc {
413         u32 opts1;
414         u32 opts2;
415         u64 addr;
416 };
417
418 struct ring_info {
419         struct sk_buff  *skb;
420         u32             len;
421         u8              __pad[sizeof(void *) - sizeof(u32)];
422 };
423
424 struct rtl8169_private {
425         void __iomem *mmio_addr;        /* memory map physical address */
426         struct pci_dev *pci_dev;        /* Index of PCI device */
427         struct net_device *dev;
428         struct net_device_stats stats;  /* statistics of net device */
429         spinlock_t lock;                /* spin lock flag */
430         u32 msg_enable;
431         int chipset;
432         int mac_version;
433         int phy_version;
434         u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
435         u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
436         u32 dirty_rx;
437         u32 dirty_tx;
438         struct TxDesc *TxDescArray;     /* 256-aligned Tx descriptor ring */
439         struct RxDesc *RxDescArray;     /* 256-aligned Rx descriptor ring */
440         dma_addr_t TxPhyAddr;
441         dma_addr_t RxPhyAddr;
442         struct sk_buff *Rx_skbuff[NUM_RX_DESC]; /* Rx data buffers */
443         struct ring_info tx_skb[NUM_TX_DESC];   /* Tx data buffers */
444         unsigned align;
445         unsigned rx_buf_sz;
446         struct timer_list timer;
447         u16 cp_cmd;
448         u16 intr_mask;
449         int phy_auto_nego_reg;
450         int phy_1000_ctrl_reg;
451 #ifdef CONFIG_R8169_VLAN
452         struct vlan_group *vlgrp;
453 #endif
454         int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex);
455         void (*get_settings)(struct net_device *, struct ethtool_cmd *);
456         void (*phy_reset_enable)(void __iomem *);
457         unsigned int (*phy_reset_pending)(void __iomem *);
458         unsigned int (*link_ok)(void __iomem *);
459         struct delayed_work task;
460         unsigned wol_enabled : 1;
461 };
462
463 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
464 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
465 module_param_array(media, int, &num_media, 0);
466 MODULE_PARM_DESC(media, "force phy operation. Deprecated by ethtool (8).");
467 module_param(rx_copybreak, int, 0);
468 MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
469 module_param(use_dac, int, 0);
470 MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
471 module_param_named(debug, debug.msg_enable, int, 0);
472 MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
473 MODULE_LICENSE("GPL");
474 MODULE_VERSION(RTL8169_VERSION);
475
476 static int rtl8169_open(struct net_device *dev);
477 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev);
478 static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance);
479 static int rtl8169_init_ring(struct net_device *dev);
480 static void rtl8169_hw_start(struct net_device *dev);
481 static int rtl8169_close(struct net_device *dev);
482 static void rtl8169_set_rx_mode(struct net_device *dev);
483 static void rtl8169_tx_timeout(struct net_device *dev);
484 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev);
485 static int rtl8169_rx_interrupt(struct net_device *, struct rtl8169_private *,
486                                 void __iomem *);
487 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu);
488 static void rtl8169_down(struct net_device *dev);
489
490 #ifdef CONFIG_R8169_NAPI
491 static int rtl8169_poll(struct net_device *dev, int *budget);
492 #endif
493
494 static const u16 rtl8169_intr_mask =
495         SYSErr | LinkChg | RxOverflow | RxFIFOOver | TxErr | TxOK | RxErr | RxOK;
496 static const u16 rtl8169_napi_event =
497         RxOK | RxOverflow | RxFIFOOver | TxOK | TxErr;
498 static const unsigned int rtl8169_rx_config =
499         (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
500
501 static void mdio_write(void __iomem *ioaddr, int RegAddr, int value)
502 {
503         int i;
504
505         RTL_W32(PHYAR, 0x80000000 | (RegAddr & 0xFF) << 16 | value);
506
507         for (i = 20; i > 0; i--) {
508                 /* Check if the RTL8169 has completed writing to the specified MII register */
509                 if (!(RTL_R32(PHYAR) & 0x80000000))
510                         break;
511                 udelay(25);
512         }
513 }
514
515 static int mdio_read(void __iomem *ioaddr, int RegAddr)
516 {
517         int i, value = -1;
518
519         RTL_W32(PHYAR, 0x0 | (RegAddr & 0xFF) << 16);
520
521         for (i = 20; i > 0; i--) {
522                 /* Check if the RTL8169 has completed retrieving data from the specified MII register */
523                 if (RTL_R32(PHYAR) & 0x80000000) {
524                         value = (int) (RTL_R32(PHYAR) & 0xFFFF);
525                         break;
526                 }
527                 udelay(25);
528         }
529         return value;
530 }
531
532 static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr)
533 {
534         RTL_W16(IntrMask, 0x0000);
535
536         RTL_W16(IntrStatus, 0xffff);
537 }
538
539 static void rtl8169_asic_down(void __iomem *ioaddr)
540 {
541         RTL_W8(ChipCmd, 0x00);
542         rtl8169_irq_mask_and_ack(ioaddr);
543         RTL_R16(CPlusCmd);
544 }
545
546 static unsigned int rtl8169_tbi_reset_pending(void __iomem *ioaddr)
547 {
548         return RTL_R32(TBICSR) & TBIReset;
549 }
550
551 static unsigned int rtl8169_xmii_reset_pending(void __iomem *ioaddr)
552 {
553         return mdio_read(ioaddr, MII_BMCR) & BMCR_RESET;
554 }
555
556 static unsigned int rtl8169_tbi_link_ok(void __iomem *ioaddr)
557 {
558         return RTL_R32(TBICSR) & TBILinkOk;
559 }
560
561 static unsigned int rtl8169_xmii_link_ok(void __iomem *ioaddr)
562 {
563         return RTL_R8(PHYstatus) & LinkStatus;
564 }
565
566 static void rtl8169_tbi_reset_enable(void __iomem *ioaddr)
567 {
568         RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset);
569 }
570
571 static void rtl8169_xmii_reset_enable(void __iomem *ioaddr)
572 {
573         unsigned int val;
574
575         val = (mdio_read(ioaddr, MII_BMCR) | BMCR_RESET) & 0xffff;
576         mdio_write(ioaddr, MII_BMCR, val);
577 }
578
579 static void rtl8169_check_link_status(struct net_device *dev,
580                                       struct rtl8169_private *tp, void __iomem *ioaddr)
581 {
582         unsigned long flags;
583
584         spin_lock_irqsave(&tp->lock, flags);
585         if (tp->link_ok(ioaddr)) {
586                 netif_carrier_on(dev);
587                 if (netif_msg_ifup(tp))
588                         printk(KERN_INFO PFX "%s: link up\n", dev->name);
589         } else {
590                 if (netif_msg_ifdown(tp))
591                         printk(KERN_INFO PFX "%s: link down\n", dev->name);
592                 netif_carrier_off(dev);
593         }
594         spin_unlock_irqrestore(&tp->lock, flags);
595 }
596
597 static void rtl8169_link_option(int idx, u8 *autoneg, u16 *speed, u8 *duplex)
598 {
599         struct {
600                 u16 speed;
601                 u8 duplex;
602                 u8 autoneg;
603                 u8 media;
604         } link_settings[] = {
605                 { SPEED_10,     DUPLEX_HALF, AUTONEG_DISABLE,   _10_Half },
606                 { SPEED_10,     DUPLEX_FULL, AUTONEG_DISABLE,   _10_Full },
607                 { SPEED_100,    DUPLEX_HALF, AUTONEG_DISABLE,   _100_Half },
608                 { SPEED_100,    DUPLEX_FULL, AUTONEG_DISABLE,   _100_Full },
609                 { SPEED_1000,   DUPLEX_FULL, AUTONEG_DISABLE,   _1000_Full },
610                 /* Make TBI happy */
611                 { SPEED_1000,   DUPLEX_FULL, AUTONEG_ENABLE,    0xff }
612         }, *p;
613         unsigned char option;
614
615         option = ((idx < MAX_UNITS) && (idx >= 0)) ? media[idx] : 0xff;
616
617         if ((option != 0xff) && !idx && netif_msg_drv(&debug))
618                 printk(KERN_WARNING PFX "media option is deprecated.\n");
619
620         for (p = link_settings; p->media != 0xff; p++) {
621                 if (p->media == option)
622                         break;
623         }
624         *autoneg = p->autoneg;
625         *speed = p->speed;
626         *duplex = p->duplex;
627 }
628
629 static void rtl8169_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
630 {
631         struct rtl8169_private *tp = netdev_priv(dev);
632         void __iomem *ioaddr = tp->mmio_addr;
633         u8 options;
634
635         wol->wolopts = 0;
636
637 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
638         wol->supported = WAKE_ANY;
639
640         spin_lock_irq(&tp->lock);
641
642         options = RTL_R8(Config1);
643         if (!(options & PMEnable))
644                 goto out_unlock;
645
646         options = RTL_R8(Config3);
647         if (options & LinkUp)
648                 wol->wolopts |= WAKE_PHY;
649         if (options & MagicPacket)
650                 wol->wolopts |= WAKE_MAGIC;
651
652         options = RTL_R8(Config5);
653         if (options & UWF)
654                 wol->wolopts |= WAKE_UCAST;
655         if (options & BWF)
656                 wol->wolopts |= WAKE_BCAST;
657         if (options & MWF)
658                 wol->wolopts |= WAKE_MCAST;
659
660 out_unlock:
661         spin_unlock_irq(&tp->lock);
662 }
663
664 static int rtl8169_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
665 {
666         struct rtl8169_private *tp = netdev_priv(dev);
667         void __iomem *ioaddr = tp->mmio_addr;
668         int i;
669         static struct {
670                 u32 opt;
671                 u16 reg;
672                 u8  mask;
673         } cfg[] = {
674                 { WAKE_ANY,   Config1, PMEnable },
675                 { WAKE_PHY,   Config3, LinkUp },
676                 { WAKE_MAGIC, Config3, MagicPacket },
677                 { WAKE_UCAST, Config5, UWF },
678                 { WAKE_BCAST, Config5, BWF },
679                 { WAKE_MCAST, Config5, MWF },
680                 { WAKE_ANY,   Config5, LanWake }
681         };
682
683         spin_lock_irq(&tp->lock);
684
685         RTL_W8(Cfg9346, Cfg9346_Unlock);
686
687         for (i = 0; i < ARRAY_SIZE(cfg); i++) {
688                 u8 options = RTL_R8(cfg[i].reg) & ~cfg[i].mask;
689                 if (wol->wolopts & cfg[i].opt)
690                         options |= cfg[i].mask;
691                 RTL_W8(cfg[i].reg, options);
692         }
693
694         RTL_W8(Cfg9346, Cfg9346_Lock);
695
696         tp->wol_enabled = (wol->wolopts) ? 1 : 0;
697
698         spin_unlock_irq(&tp->lock);
699
700         return 0;
701 }
702
703 static void rtl8169_get_drvinfo(struct net_device *dev,
704                                 struct ethtool_drvinfo *info)
705 {
706         struct rtl8169_private *tp = netdev_priv(dev);
707
708         strcpy(info->driver, MODULENAME);
709         strcpy(info->version, RTL8169_VERSION);
710         strcpy(info->bus_info, pci_name(tp->pci_dev));
711 }
712
713 static int rtl8169_get_regs_len(struct net_device *dev)
714 {
715         return R8169_REGS_SIZE;
716 }
717
718 static int rtl8169_set_speed_tbi(struct net_device *dev,
719                                  u8 autoneg, u16 speed, u8 duplex)
720 {
721         struct rtl8169_private *tp = netdev_priv(dev);
722         void __iomem *ioaddr = tp->mmio_addr;
723         int ret = 0;
724         u32 reg;
725
726         reg = RTL_R32(TBICSR);
727         if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
728             (duplex == DUPLEX_FULL)) {
729                 RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart));
730         } else if (autoneg == AUTONEG_ENABLE)
731                 RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart);
732         else {
733                 if (netif_msg_link(tp)) {
734                         printk(KERN_WARNING "%s: "
735                                "incorrect speed setting refused in TBI mode\n",
736                                dev->name);
737                 }
738                 ret = -EOPNOTSUPP;
739         }
740
741         return ret;
742 }
743
744 static int rtl8169_set_speed_xmii(struct net_device *dev,
745                                   u8 autoneg, u16 speed, u8 duplex)
746 {
747         struct rtl8169_private *tp = netdev_priv(dev);
748         void __iomem *ioaddr = tp->mmio_addr;
749         int auto_nego, giga_ctrl;
750
751         auto_nego = mdio_read(ioaddr, MII_ADVERTISE);
752         auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
753                        ADVERTISE_100HALF | ADVERTISE_100FULL);
754         giga_ctrl = mdio_read(ioaddr, MII_CTRL1000);
755         giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
756
757         if (autoneg == AUTONEG_ENABLE) {
758                 auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL |
759                               ADVERTISE_100HALF | ADVERTISE_100FULL);
760                 giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
761         } else {
762                 if (speed == SPEED_10)
763                         auto_nego |= ADVERTISE_10HALF | ADVERTISE_10FULL;
764                 else if (speed == SPEED_100)
765                         auto_nego |= ADVERTISE_100HALF | ADVERTISE_100FULL;
766                 else if (speed == SPEED_1000)
767                         giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
768
769                 if (duplex == DUPLEX_HALF)
770                         auto_nego &= ~(ADVERTISE_10FULL | ADVERTISE_100FULL);
771
772                 if (duplex == DUPLEX_FULL)
773                         auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_100HALF);
774
775                 /* This tweak comes straight from Realtek's driver. */
776                 if ((speed == SPEED_100) && (duplex == DUPLEX_HALF) &&
777                     (tp->mac_version == RTL_GIGA_MAC_VER_13)) {
778                         auto_nego = ADVERTISE_100HALF | ADVERTISE_CSMA;
779                 }
780         }
781
782         /* The 8100e/8101e do Fast Ethernet only. */
783         if ((tp->mac_version == RTL_GIGA_MAC_VER_13) ||
784             (tp->mac_version == RTL_GIGA_MAC_VER_14) ||
785             (tp->mac_version == RTL_GIGA_MAC_VER_15)) {
786                 if ((giga_ctrl & (ADVERTISE_1000FULL | ADVERTISE_1000HALF)) &&
787                     netif_msg_link(tp)) {
788                         printk(KERN_INFO "%s: PHY does not support 1000Mbps.\n",
789                                dev->name);
790                 }
791                 giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
792         }
793
794         auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
795
796         tp->phy_auto_nego_reg = auto_nego;
797         tp->phy_1000_ctrl_reg = giga_ctrl;
798
799         mdio_write(ioaddr, MII_ADVERTISE, auto_nego);
800         mdio_write(ioaddr, MII_CTRL1000, giga_ctrl);
801         mdio_write(ioaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
802         return 0;
803 }
804
805 static int rtl8169_set_speed(struct net_device *dev,
806                              u8 autoneg, u16 speed, u8 duplex)
807 {
808         struct rtl8169_private *tp = netdev_priv(dev);
809         int ret;
810
811         ret = tp->set_speed(dev, autoneg, speed, duplex);
812
813         if (netif_running(dev) && (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL))
814                 mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT);
815
816         return ret;
817 }
818
819 static int rtl8169_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
820 {
821         struct rtl8169_private *tp = netdev_priv(dev);
822         unsigned long flags;
823         int ret;
824
825         spin_lock_irqsave(&tp->lock, flags);
826         ret = rtl8169_set_speed(dev, cmd->autoneg, cmd->speed, cmd->duplex);
827         spin_unlock_irqrestore(&tp->lock, flags);
828
829         return ret;
830 }
831
832 static u32 rtl8169_get_rx_csum(struct net_device *dev)
833 {
834         struct rtl8169_private *tp = netdev_priv(dev);
835
836         return tp->cp_cmd & RxChkSum;
837 }
838
839 static int rtl8169_set_rx_csum(struct net_device *dev, u32 data)
840 {
841         struct rtl8169_private *tp = netdev_priv(dev);
842         void __iomem *ioaddr = tp->mmio_addr;
843         unsigned long flags;
844
845         spin_lock_irqsave(&tp->lock, flags);
846
847         if (data)
848                 tp->cp_cmd |= RxChkSum;
849         else
850                 tp->cp_cmd &= ~RxChkSum;
851
852         RTL_W16(CPlusCmd, tp->cp_cmd);
853         RTL_R16(CPlusCmd);
854
855         spin_unlock_irqrestore(&tp->lock, flags);
856
857         return 0;
858 }
859
860 #ifdef CONFIG_R8169_VLAN
861
862 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
863                                       struct sk_buff *skb)
864 {
865         return (tp->vlgrp && vlan_tx_tag_present(skb)) ?
866                 TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
867 }
868
869 static void rtl8169_vlan_rx_register(struct net_device *dev,
870                                      struct vlan_group *grp)
871 {
872         struct rtl8169_private *tp = netdev_priv(dev);
873         void __iomem *ioaddr = tp->mmio_addr;
874         unsigned long flags;
875
876         spin_lock_irqsave(&tp->lock, flags);
877         tp->vlgrp = grp;
878         if (tp->vlgrp)
879                 tp->cp_cmd |= RxVlan;
880         else
881                 tp->cp_cmd &= ~RxVlan;
882         RTL_W16(CPlusCmd, tp->cp_cmd);
883         RTL_R16(CPlusCmd);
884         spin_unlock_irqrestore(&tp->lock, flags);
885 }
886
887 static void rtl8169_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
888 {
889         struct rtl8169_private *tp = netdev_priv(dev);
890         unsigned long flags;
891
892         spin_lock_irqsave(&tp->lock, flags);
893         if (tp->vlgrp)
894                 tp->vlgrp->vlan_devices[vid] = NULL;
895         spin_unlock_irqrestore(&tp->lock, flags);
896 }
897
898 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
899                                struct sk_buff *skb)
900 {
901         u32 opts2 = le32_to_cpu(desc->opts2);
902         int ret;
903
904         if (tp->vlgrp && (opts2 & RxVlanTag)) {
905                 rtl8169_rx_hwaccel_skb(skb, tp->vlgrp,
906                                        swab16(opts2 & 0xffff));
907                 ret = 0;
908         } else
909                 ret = -1;
910         desc->opts2 = 0;
911         return ret;
912 }
913
914 #else /* !CONFIG_R8169_VLAN */
915
916 static inline u32 rtl8169_tx_vlan_tag(struct rtl8169_private *tp,
917                                       struct sk_buff *skb)
918 {
919         return 0;
920 }
921
922 static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
923                                struct sk_buff *skb)
924 {
925         return -1;
926 }
927
928 #endif
929
930 static void rtl8169_gset_tbi(struct net_device *dev, struct ethtool_cmd *cmd)
931 {
932         struct rtl8169_private *tp = netdev_priv(dev);
933         void __iomem *ioaddr = tp->mmio_addr;
934         u32 status;
935
936         cmd->supported =
937                 SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_FIBRE;
938         cmd->port = PORT_FIBRE;
939         cmd->transceiver = XCVR_INTERNAL;
940
941         status = RTL_R32(TBICSR);
942         cmd->advertising = (status & TBINwEnable) ?  ADVERTISED_Autoneg : 0;
943         cmd->autoneg = !!(status & TBINwEnable);
944
945         cmd->speed = SPEED_1000;
946         cmd->duplex = DUPLEX_FULL; /* Always set */
947 }
948
949 static void rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd)
950 {
951         struct rtl8169_private *tp = netdev_priv(dev);
952         void __iomem *ioaddr = tp->mmio_addr;
953         u8 status;
954
955         cmd->supported = SUPPORTED_10baseT_Half |
956                          SUPPORTED_10baseT_Full |
957                          SUPPORTED_100baseT_Half |
958                          SUPPORTED_100baseT_Full |
959                          SUPPORTED_1000baseT_Full |
960                          SUPPORTED_Autoneg |
961                          SUPPORTED_TP;
962
963         cmd->autoneg = 1;
964         cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg;
965
966         if (tp->phy_auto_nego_reg & ADVERTISE_10HALF)
967                 cmd->advertising |= ADVERTISED_10baseT_Half;
968         if (tp->phy_auto_nego_reg & ADVERTISE_10FULL)
969                 cmd->advertising |= ADVERTISED_10baseT_Full;
970         if (tp->phy_auto_nego_reg & ADVERTISE_100HALF)
971                 cmd->advertising |= ADVERTISED_100baseT_Half;
972         if (tp->phy_auto_nego_reg & ADVERTISE_100FULL)
973                 cmd->advertising |= ADVERTISED_100baseT_Full;
974         if (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL)
975                 cmd->advertising |= ADVERTISED_1000baseT_Full;
976
977         status = RTL_R8(PHYstatus);
978
979         if (status & _1000bpsF)
980                 cmd->speed = SPEED_1000;
981         else if (status & _100bps)
982                 cmd->speed = SPEED_100;
983         else if (status & _10bps)
984                 cmd->speed = SPEED_10;
985
986         if (status & TxFlowCtrl)
987                 cmd->advertising |= ADVERTISED_Asym_Pause;
988         if (status & RxFlowCtrl)
989                 cmd->advertising |= ADVERTISED_Pause;
990
991         cmd->duplex = ((status & _1000bpsF) || (status & FullDup)) ?
992                       DUPLEX_FULL : DUPLEX_HALF;
993 }
994
995 static int rtl8169_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
996 {
997         struct rtl8169_private *tp = netdev_priv(dev);
998         unsigned long flags;
999
1000         spin_lock_irqsave(&tp->lock, flags);
1001
1002         tp->get_settings(dev, cmd);
1003
1004         spin_unlock_irqrestore(&tp->lock, flags);
1005         return 0;
1006 }
1007
1008 static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1009                              void *p)
1010 {
1011         struct rtl8169_private *tp = netdev_priv(dev);
1012         unsigned long flags;
1013
1014         if (regs->len > R8169_REGS_SIZE)
1015                 regs->len = R8169_REGS_SIZE;
1016
1017         spin_lock_irqsave(&tp->lock, flags);
1018         memcpy_fromio(p, tp->mmio_addr, regs->len);
1019         spin_unlock_irqrestore(&tp->lock, flags);
1020 }
1021
1022 static u32 rtl8169_get_msglevel(struct net_device *dev)
1023 {
1024         struct rtl8169_private *tp = netdev_priv(dev);
1025
1026         return tp->msg_enable;
1027 }
1028
1029 static void rtl8169_set_msglevel(struct net_device *dev, u32 value)
1030 {
1031         struct rtl8169_private *tp = netdev_priv(dev);
1032
1033         tp->msg_enable = value;
1034 }
1035
1036 static const char rtl8169_gstrings[][ETH_GSTRING_LEN] = {
1037         "tx_packets",
1038         "rx_packets",
1039         "tx_errors",
1040         "rx_errors",
1041         "rx_missed",
1042         "align_errors",
1043         "tx_single_collisions",
1044         "tx_multi_collisions",
1045         "unicast",
1046         "broadcast",
1047         "multicast",
1048         "tx_aborted",
1049         "tx_underrun",
1050 };
1051
1052 struct rtl8169_counters {
1053         u64     tx_packets;
1054         u64     rx_packets;
1055         u64     tx_errors;
1056         u32     rx_errors;
1057         u16     rx_missed;
1058         u16     align_errors;
1059         u32     tx_one_collision;
1060         u32     tx_multi_collision;
1061         u64     rx_unicast;
1062         u64     rx_broadcast;
1063         u32     rx_multicast;
1064         u16     tx_aborted;
1065         u16     tx_underun;
1066 };
1067
1068 static int rtl8169_get_stats_count(struct net_device *dev)
1069 {
1070         return ARRAY_SIZE(rtl8169_gstrings);
1071 }
1072
1073 static void rtl8169_get_ethtool_stats(struct net_device *dev,
1074                                       struct ethtool_stats *stats, u64 *data)
1075 {
1076         struct rtl8169_private *tp = netdev_priv(dev);
1077         void __iomem *ioaddr = tp->mmio_addr;
1078         struct rtl8169_counters *counters;
1079         dma_addr_t paddr;
1080         u32 cmd;
1081
1082         ASSERT_RTNL();
1083
1084         counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr);
1085         if (!counters)
1086                 return;
1087
1088         RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
1089         cmd = (u64)paddr & DMA_32BIT_MASK;
1090         RTL_W32(CounterAddrLow, cmd);
1091         RTL_W32(CounterAddrLow, cmd | CounterDump);
1092
1093         while (RTL_R32(CounterAddrLow) & CounterDump) {
1094                 if (msleep_interruptible(1))
1095                         break;
1096         }
1097
1098         RTL_W32(CounterAddrLow, 0);
1099         RTL_W32(CounterAddrHigh, 0);
1100
1101         data[0] = le64_to_cpu(counters->tx_packets);
1102         data[1] = le64_to_cpu(counters->rx_packets);
1103         data[2] = le64_to_cpu(counters->tx_errors);
1104         data[3] = le32_to_cpu(counters->rx_errors);
1105         data[4] = le16_to_cpu(counters->rx_missed);
1106         data[5] = le16_to_cpu(counters->align_errors);
1107         data[6] = le32_to_cpu(counters->tx_one_collision);
1108         data[7] = le32_to_cpu(counters->tx_multi_collision);
1109         data[8] = le64_to_cpu(counters->rx_unicast);
1110         data[9] = le64_to_cpu(counters->rx_broadcast);
1111         data[10] = le32_to_cpu(counters->rx_multicast);
1112         data[11] = le16_to_cpu(counters->tx_aborted);
1113         data[12] = le16_to_cpu(counters->tx_underun);
1114
1115         pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr);
1116 }
1117
1118 static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data)
1119 {
1120         switch(stringset) {
1121         case ETH_SS_STATS:
1122                 memcpy(data, *rtl8169_gstrings, sizeof(rtl8169_gstrings));
1123                 break;
1124         }
1125 }
1126
1127
1128 static const struct ethtool_ops rtl8169_ethtool_ops = {
1129         .get_drvinfo            = rtl8169_get_drvinfo,
1130         .get_regs_len           = rtl8169_get_regs_len,
1131         .get_link               = ethtool_op_get_link,
1132         .get_settings           = rtl8169_get_settings,
1133         .set_settings           = rtl8169_set_settings,
1134         .get_msglevel           = rtl8169_get_msglevel,
1135         .set_msglevel           = rtl8169_set_msglevel,
1136         .get_rx_csum            = rtl8169_get_rx_csum,
1137         .set_rx_csum            = rtl8169_set_rx_csum,
1138         .get_tx_csum            = ethtool_op_get_tx_csum,
1139         .set_tx_csum            = ethtool_op_set_tx_csum,
1140         .get_sg                 = ethtool_op_get_sg,
1141         .set_sg                 = ethtool_op_set_sg,
1142         .get_tso                = ethtool_op_get_tso,
1143         .set_tso                = ethtool_op_set_tso,
1144         .get_regs               = rtl8169_get_regs,
1145         .get_wol                = rtl8169_get_wol,
1146         .set_wol                = rtl8169_set_wol,
1147         .get_strings            = rtl8169_get_strings,
1148         .get_stats_count        = rtl8169_get_stats_count,
1149         .get_ethtool_stats      = rtl8169_get_ethtool_stats,
1150         .get_perm_addr          = ethtool_op_get_perm_addr,
1151 };
1152
1153 static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg, int bitnum,
1154                                        int bitval)
1155 {
1156         int val;
1157
1158         val = mdio_read(ioaddr, reg);
1159         val = (bitval == 1) ?
1160                 val | (bitval << bitnum) :  val & ~(0x0001 << bitnum);
1161         mdio_write(ioaddr, reg, val & 0xffff);
1162 }
1163
1164 static void rtl8169_get_mac_version(struct rtl8169_private *tp, void __iomem *ioaddr)
1165 {
1166         const struct {
1167                 u32 mask;
1168                 int mac_version;
1169         } mac_info[] = {
1170                 { 0x38800000,   RTL_GIGA_MAC_VER_15 },
1171                 { 0x38000000,   RTL_GIGA_MAC_VER_12 },
1172                 { 0x34000000,   RTL_GIGA_MAC_VER_13 },
1173                 { 0x30800000,   RTL_GIGA_MAC_VER_14 },
1174                 { 0x30000000,   RTL_GIGA_MAC_VER_11 },
1175                 { 0x18000000,   RTL_GIGA_MAC_VER_05 },
1176                 { 0x10000000,   RTL_GIGA_MAC_VER_04 },
1177                 { 0x04000000,   RTL_GIGA_MAC_VER_03 },
1178                 { 0x00800000,   RTL_GIGA_MAC_VER_02 },
1179                 { 0x00000000,   RTL_GIGA_MAC_VER_01 }   /* Catch-all */
1180         }, *p = mac_info;
1181         u32 reg;
1182
1183         reg = RTL_R32(TxConfig) & 0x7c800000;
1184         while ((reg & p->mask) != p->mask)
1185                 p++;
1186         tp->mac_version = p->mac_version;
1187 }
1188
1189 static void rtl8169_print_mac_version(struct rtl8169_private *tp)
1190 {
1191         dprintk("mac_version = 0x%02x\n", tp->mac_version);
1192 }
1193
1194 static void rtl8169_get_phy_version(struct rtl8169_private *tp, void __iomem *ioaddr)
1195 {
1196         const struct {
1197                 u16 mask;
1198                 u16 set;
1199                 int phy_version;
1200         } phy_info[] = {
1201                 { 0x000f, 0x0002, RTL_GIGA_PHY_VER_G },
1202                 { 0x000f, 0x0001, RTL_GIGA_PHY_VER_F },
1203                 { 0x000f, 0x0000, RTL_GIGA_PHY_VER_E },
1204                 { 0x0000, 0x0000, RTL_GIGA_PHY_VER_D } /* Catch-all */
1205         }, *p = phy_info;
1206         u16 reg;
1207
1208         reg = mdio_read(ioaddr, MII_PHYSID2) & 0xffff;
1209         while ((reg & p->mask) != p->set)
1210                 p++;
1211         tp->phy_version = p->phy_version;
1212 }
1213
1214 static void rtl8169_print_phy_version(struct rtl8169_private *tp)
1215 {
1216         struct {
1217                 int version;
1218                 char *msg;
1219                 u32 reg;
1220         } phy_print[] = {
1221                 { RTL_GIGA_PHY_VER_G, "RTL_GIGA_PHY_VER_G", 0x0002 },
1222                 { RTL_GIGA_PHY_VER_F, "RTL_GIGA_PHY_VER_F", 0x0001 },
1223                 { RTL_GIGA_PHY_VER_E, "RTL_GIGA_PHY_VER_E", 0x0000 },
1224                 { RTL_GIGA_PHY_VER_D, "RTL_GIGA_PHY_VER_D", 0x0000 },
1225                 { 0, NULL, 0x0000 }
1226         }, *p;
1227
1228         for (p = phy_print; p->msg; p++) {
1229                 if (tp->phy_version == p->version) {
1230                         dprintk("phy_version == %s (%04x)\n", p->msg, p->reg);
1231                         return;
1232                 }
1233         }
1234         dprintk("phy_version == Unknown\n");
1235 }
1236
1237 static void rtl8169_hw_phy_config(struct net_device *dev)
1238 {
1239         struct rtl8169_private *tp = netdev_priv(dev);
1240         void __iomem *ioaddr = tp->mmio_addr;
1241         struct {
1242                 u16 regs[5]; /* Beware of bit-sign propagation */
1243         } phy_magic[5] = { {
1244                 { 0x0000,       //w 4 15 12 0
1245                   0x00a1,       //w 3 15 0 00a1
1246                   0x0008,       //w 2 15 0 0008
1247                   0x1020,       //w 1 15 0 1020
1248                   0x1000 } },{  //w 0 15 0 1000
1249                 { 0x7000,       //w 4 15 12 7
1250                   0xff41,       //w 3 15 0 ff41
1251                   0xde60,       //w 2 15 0 de60
1252                   0x0140,       //w 1 15 0 0140
1253                   0x0077 } },{  //w 0 15 0 0077
1254                 { 0xa000,       //w 4 15 12 a
1255                   0xdf01,       //w 3 15 0 df01
1256                   0xdf20,       //w 2 15 0 df20
1257                   0xff95,       //w 1 15 0 ff95
1258                   0xfa00 } },{  //w 0 15 0 fa00
1259                 { 0xb000,       //w 4 15 12 b
1260                   0xff41,       //w 3 15 0 ff41
1261                   0xde20,       //w 2 15 0 de20
1262                   0x0140,       //w 1 15 0 0140
1263                   0x00bb } },{  //w 0 15 0 00bb
1264                 { 0xf000,       //w 4 15 12 f
1265                   0xdf01,       //w 3 15 0 df01
1266                   0xdf20,       //w 2 15 0 df20
1267                   0xff95,       //w 1 15 0 ff95
1268                   0xbf00 }      //w 0 15 0 bf00
1269                 }
1270         }, *p = phy_magic;
1271         int i;
1272
1273         rtl8169_print_mac_version(tp);
1274         rtl8169_print_phy_version(tp);
1275
1276         if (tp->mac_version <= RTL_GIGA_MAC_VER_01)
1277                 return;
1278         if (tp->phy_version >= RTL_GIGA_PHY_VER_H)
1279                 return;
1280
1281         dprintk("MAC version != 0 && PHY version == 0 or 1\n");
1282         dprintk("Do final_reg2.cfg\n");
1283
1284         /* Shazam ! */
1285
1286         if (tp->mac_version == RTL_GIGA_MAC_VER_04) {
1287                 mdio_write(ioaddr, 31, 0x0001);
1288                 mdio_write(ioaddr,  9, 0x273a);
1289                 mdio_write(ioaddr, 14, 0x7bfb);
1290                 mdio_write(ioaddr, 27, 0x841e);
1291
1292                 mdio_write(ioaddr, 31, 0x0002);
1293                 mdio_write(ioaddr,  1, 0x90d0);
1294                 mdio_write(ioaddr, 31, 0x0000);
1295                 return;
1296         }
1297
1298         /* phy config for RTL8169s mac_version C chip */
1299         mdio_write(ioaddr, 31, 0x0001);                 //w 31 2 0 1
1300         mdio_write(ioaddr, 21, 0x1000);                 //w 21 15 0 1000
1301         mdio_write(ioaddr, 24, 0x65c7);                 //w 24 15 0 65c7
1302         rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0);   //w 4 11 11 0
1303
1304         for (i = 0; i < ARRAY_SIZE(phy_magic); i++, p++) {
1305                 int val, pos = 4;
1306
1307                 val = (mdio_read(ioaddr, pos) & 0x0fff) | (p->regs[0] & 0xffff);
1308                 mdio_write(ioaddr, pos, val);
1309                 while (--pos >= 0)
1310                         mdio_write(ioaddr, pos, p->regs[4 - pos] & 0xffff);
1311                 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 1); //w 4 11 11 1
1312                 rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
1313         }
1314         mdio_write(ioaddr, 31, 0x0000); //w 31 2 0 0
1315 }
1316
1317 static void rtl8169_phy_timer(unsigned long __opaque)
1318 {
1319         struct net_device *dev = (struct net_device *)__opaque;
1320         struct rtl8169_private *tp = netdev_priv(dev);
1321         struct timer_list *timer = &tp->timer;
1322         void __iomem *ioaddr = tp->mmio_addr;
1323         unsigned long timeout = RTL8169_PHY_TIMEOUT;
1324
1325         assert(tp->mac_version > RTL_GIGA_MAC_VER_01);
1326         assert(tp->phy_version < RTL_GIGA_PHY_VER_H);
1327
1328         if (!(tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL))
1329                 return;
1330
1331         spin_lock_irq(&tp->lock);
1332
1333         if (tp->phy_reset_pending(ioaddr)) {
1334                 /*
1335                  * A busy loop could burn quite a few cycles on nowadays CPU.
1336                  * Let's delay the execution of the timer for a few ticks.
1337                  */
1338                 timeout = HZ/10;
1339                 goto out_mod_timer;
1340         }
1341
1342         if (tp->link_ok(ioaddr))
1343                 goto out_unlock;
1344
1345         if (netif_msg_link(tp))
1346                 printk(KERN_WARNING "%s: PHY reset until link up\n", dev->name);
1347
1348         tp->phy_reset_enable(ioaddr);
1349
1350 out_mod_timer:
1351         mod_timer(timer, jiffies + timeout);
1352 out_unlock:
1353         spin_unlock_irq(&tp->lock);
1354 }
1355
1356 static inline void rtl8169_delete_timer(struct net_device *dev)
1357 {
1358         struct rtl8169_private *tp = netdev_priv(dev);
1359         struct timer_list *timer = &tp->timer;
1360
1361         if ((tp->mac_version <= RTL_GIGA_MAC_VER_01) ||
1362             (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1363                 return;
1364
1365         del_timer_sync(timer);
1366 }
1367
1368 static inline void rtl8169_request_timer(struct net_device *dev)
1369 {
1370         struct rtl8169_private *tp = netdev_priv(dev);
1371         struct timer_list *timer = &tp->timer;
1372
1373         if ((tp->mac_version <= RTL_GIGA_MAC_VER_01) ||
1374             (tp->phy_version >= RTL_GIGA_PHY_VER_H))
1375                 return;
1376
1377         init_timer(timer);
1378         timer->expires = jiffies + RTL8169_PHY_TIMEOUT;
1379         timer->data = (unsigned long)(dev);
1380         timer->function = rtl8169_phy_timer;
1381         add_timer(timer);
1382 }
1383
1384 #ifdef CONFIG_NET_POLL_CONTROLLER
1385 /*
1386  * Polling 'interrupt' - used by things like netconsole to send skbs
1387  * without having to re-enable interrupts. It's not called while
1388  * the interrupt routine is executing.
1389  */
1390 static void rtl8169_netpoll(struct net_device *dev)
1391 {
1392         struct rtl8169_private *tp = netdev_priv(dev);
1393         struct pci_dev *pdev = tp->pci_dev;
1394
1395         disable_irq(pdev->irq);
1396         rtl8169_interrupt(pdev->irq, dev);
1397         enable_irq(pdev->irq);
1398 }
1399 #endif
1400
1401 static void rtl8169_release_board(struct pci_dev *pdev, struct net_device *dev,
1402                                   void __iomem *ioaddr)
1403 {
1404         iounmap(ioaddr);
1405         pci_release_regions(pdev);
1406         pci_disable_device(pdev);
1407         free_netdev(dev);
1408 }
1409
1410 static void rtl8169_init_phy(struct net_device *dev, struct rtl8169_private *tp)
1411 {
1412         void __iomem *ioaddr = tp->mmio_addr;
1413         static int board_idx = -1;
1414         u8 autoneg, duplex;
1415         u16 speed;
1416
1417         board_idx++;
1418
1419         rtl8169_hw_phy_config(dev);
1420
1421         dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1422         RTL_W8(0x82, 0x01);
1423
1424         if (tp->mac_version < RTL_GIGA_MAC_VER_03) {
1425                 dprintk("Set PCI Latency=0x40\n");
1426                 pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40);
1427         }
1428
1429         if (tp->mac_version == RTL_GIGA_MAC_VER_02) {
1430                 dprintk("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
1431                 RTL_W8(0x82, 0x01);
1432                 dprintk("Set PHY Reg 0x0bh = 0x00h\n");
1433                 mdio_write(ioaddr, 0x0b, 0x0000); //w 0x0b 15 0 0
1434         }
1435
1436         rtl8169_link_option(board_idx, &autoneg, &speed, &duplex);
1437
1438         rtl8169_set_speed(dev, autoneg, speed, duplex);
1439
1440         if ((RTL_R8(PHYstatus) & TBI_Enable) && netif_msg_link(tp))
1441                 printk(KERN_INFO PFX "%s: TBI auto-negotiating\n", dev->name);
1442 }
1443
1444 static int rtl8169_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1445 {
1446         struct rtl8169_private *tp = netdev_priv(dev);
1447         struct mii_ioctl_data *data = if_mii(ifr);
1448
1449         if (!netif_running(dev))
1450                 return -ENODEV;
1451
1452         switch (cmd) {
1453         case SIOCGMIIPHY:
1454                 data->phy_id = 32; /* Internal PHY */
1455                 return 0;
1456
1457         case SIOCGMIIREG:
1458                 data->val_out = mdio_read(tp->mmio_addr, data->reg_num & 0x1f);
1459                 return 0;
1460
1461         case SIOCSMIIREG:
1462                 if (!capable(CAP_NET_ADMIN))
1463                         return -EPERM;
1464                 mdio_write(tp->mmio_addr, data->reg_num & 0x1f, data->val_in);
1465                 return 0;
1466         }
1467         return -EOPNOTSUPP;
1468 }
1469
1470 static int __devinit
1471 rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1472 {
1473         const unsigned int region = rtl_cfg_info[ent->driver_data].region;
1474         struct rtl8169_private *tp;
1475         struct net_device *dev;
1476         void __iomem *ioaddr;
1477         unsigned int i, pm_cap;
1478         int rc;
1479
1480         if (netif_msg_drv(&debug)) {
1481                 printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
1482                        MODULENAME, RTL8169_VERSION);
1483         }
1484
1485         dev = alloc_etherdev(sizeof (*tp));
1486         if (!dev) {
1487                 if (netif_msg_drv(&debug))
1488                         dev_err(&pdev->dev, "unable to alloc new ethernet\n");
1489                 rc = -ENOMEM;
1490                 goto out;
1491         }
1492
1493         SET_MODULE_OWNER(dev);
1494         SET_NETDEV_DEV(dev, &pdev->dev);
1495         tp = netdev_priv(dev);
1496         tp->dev = dev;
1497         tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT);
1498
1499         /* enable device (incl. PCI PM wakeup and hotplug setup) */
1500         rc = pci_enable_device(pdev);
1501         if (rc < 0) {
1502                 if (netif_msg_probe(tp))
1503                         dev_err(&pdev->dev, "enable failure\n");
1504                 goto err_out_free_dev_1;
1505         }
1506
1507         rc = pci_set_mwi(pdev);
1508         if (rc < 0)
1509                 goto err_out_disable_2;
1510
1511         /* save power state before pci_enable_device overwrites it */
1512         pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
1513         if (pm_cap) {
1514                 u16 pwr_command, acpi_idle_state;
1515
1516                 pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pwr_command);
1517                 acpi_idle_state = pwr_command & PCI_PM_CTRL_STATE_MASK;
1518         } else {
1519                 if (netif_msg_probe(tp)) {
1520                         dev_err(&pdev->dev,
1521                                 "PowerManagement capability not found.\n");
1522                 }
1523         }
1524
1525         /* make sure PCI base addr 1 is MMIO */
1526         if (!(pci_resource_flags(pdev, region) & IORESOURCE_MEM)) {
1527                 if (netif_msg_probe(tp)) {
1528                         dev_err(&pdev->dev,
1529                                 "region #%d not an MMIO resource, aborting\n",
1530                                 region);
1531                 }
1532                 rc = -ENODEV;
1533                 goto err_out_mwi_3;
1534         }
1535
1536         /* check for weird/broken PCI region reporting */
1537         if (pci_resource_len(pdev, region) < R8169_REGS_SIZE) {
1538                 if (netif_msg_probe(tp)) {
1539                         dev_err(&pdev->dev,
1540                                 "Invalid PCI region size(s), aborting\n");
1541                 }
1542                 rc = -ENODEV;
1543                 goto err_out_mwi_3;
1544         }
1545
1546         rc = pci_request_regions(pdev, MODULENAME);
1547         if (rc < 0) {
1548                 if (netif_msg_probe(tp))
1549                         dev_err(&pdev->dev, "could not request regions.\n");
1550                 goto err_out_mwi_3;
1551         }
1552
1553         tp->cp_cmd = PCIMulRW | RxChkSum;
1554
1555         if ((sizeof(dma_addr_t) > 4) &&
1556             !pci_set_dma_mask(pdev, DMA_64BIT_MASK) && use_dac) {
1557                 tp->cp_cmd |= PCIDAC;
1558                 dev->features |= NETIF_F_HIGHDMA;
1559         } else {
1560                 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1561                 if (rc < 0) {
1562                         if (netif_msg_probe(tp)) {
1563                                 dev_err(&pdev->dev,
1564                                         "DMA configuration failed.\n");
1565                         }
1566                         goto err_out_free_res_4;
1567                 }
1568         }
1569
1570         pci_set_master(pdev);
1571
1572         /* ioremap MMIO region */
1573         ioaddr = ioremap(pci_resource_start(pdev, region), R8169_REGS_SIZE);
1574         if (!ioaddr) {
1575                 if (netif_msg_probe(tp))
1576                         dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
1577                 rc = -EIO;
1578                 goto err_out_free_res_4;
1579         }
1580
1581         /* Unneeded ? Don't mess with Mrs. Murphy. */
1582         rtl8169_irq_mask_and_ack(ioaddr);
1583
1584         /* Soft reset the chip. */
1585         RTL_W8(ChipCmd, CmdReset);
1586
1587         /* Check that the chip has finished the reset. */
1588         for (i = 100; i > 0; i--) {
1589                 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1590                         break;
1591                 msleep_interruptible(1);
1592         }
1593
1594         /* Identify chip attached to board */
1595         rtl8169_get_mac_version(tp, ioaddr);
1596         rtl8169_get_phy_version(tp, ioaddr);
1597
1598         rtl8169_print_mac_version(tp);
1599         rtl8169_print_phy_version(tp);
1600
1601         for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) {
1602                 if (tp->mac_version == rtl_chip_info[i].mac_version)
1603                         break;
1604         }
1605         if (i < 0) {
1606                 /* Unknown chip: assume array element #0, original RTL-8169 */
1607                 if (netif_msg_probe(tp)) {
1608                         dev_printk(KERN_DEBUG, &pdev->dev,
1609                                 "unknown chip version, assuming %s\n",
1610                                 rtl_chip_info[0].name);
1611                 }
1612                 i++;
1613         }
1614         tp->chipset = i;
1615
1616         RTL_W8(Cfg9346, Cfg9346_Unlock);
1617         RTL_W8(Config1, RTL_R8(Config1) | PMEnable);
1618         RTL_W8(Config5, RTL_R8(Config5) & PMEStatus);
1619         RTL_W8(Cfg9346, Cfg9346_Lock);
1620
1621         if (RTL_R8(PHYstatus) & TBI_Enable) {
1622                 tp->set_speed = rtl8169_set_speed_tbi;
1623                 tp->get_settings = rtl8169_gset_tbi;
1624                 tp->phy_reset_enable = rtl8169_tbi_reset_enable;
1625                 tp->phy_reset_pending = rtl8169_tbi_reset_pending;
1626                 tp->link_ok = rtl8169_tbi_link_ok;
1627
1628                 tp->phy_1000_ctrl_reg = ADVERTISE_1000FULL; /* Implied by TBI */
1629         } else {
1630                 tp->set_speed = rtl8169_set_speed_xmii;
1631                 tp->get_settings = rtl8169_gset_xmii;
1632                 tp->phy_reset_enable = rtl8169_xmii_reset_enable;
1633                 tp->phy_reset_pending = rtl8169_xmii_reset_pending;
1634                 tp->link_ok = rtl8169_xmii_link_ok;
1635
1636                 dev->do_ioctl = rtl8169_ioctl;
1637         }
1638
1639         /* Get MAC address.  FIXME: read EEPROM */
1640         for (i = 0; i < MAC_ADDR_LEN; i++)
1641                 dev->dev_addr[i] = RTL_R8(MAC0 + i);
1642         memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
1643
1644         dev->open = rtl8169_open;
1645         dev->hard_start_xmit = rtl8169_start_xmit;
1646         dev->get_stats = rtl8169_get_stats;
1647         SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops);
1648         dev->stop = rtl8169_close;
1649         dev->tx_timeout = rtl8169_tx_timeout;
1650         dev->set_multicast_list = rtl8169_set_rx_mode;
1651         dev->watchdog_timeo = RTL8169_TX_TIMEOUT;
1652         dev->irq = pdev->irq;
1653         dev->base_addr = (unsigned long) ioaddr;
1654         dev->change_mtu = rtl8169_change_mtu;
1655
1656 #ifdef CONFIG_R8169_NAPI
1657         dev->poll = rtl8169_poll;
1658         dev->weight = R8169_NAPI_WEIGHT;
1659 #endif
1660
1661 #ifdef CONFIG_R8169_VLAN
1662         dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1663         dev->vlan_rx_register = rtl8169_vlan_rx_register;
1664         dev->vlan_rx_kill_vid = rtl8169_vlan_rx_kill_vid;
1665 #endif
1666
1667 #ifdef CONFIG_NET_POLL_CONTROLLER
1668         dev->poll_controller = rtl8169_netpoll;
1669 #endif
1670
1671         tp->intr_mask = 0xffff;
1672         tp->pci_dev = pdev;
1673         tp->mmio_addr = ioaddr;
1674         tp->align = rtl_cfg_info[ent->driver_data].align;
1675
1676         spin_lock_init(&tp->lock);
1677
1678         rc = register_netdev(dev);
1679         if (rc < 0)
1680                 goto err_out_unmap_5;
1681
1682         pci_set_drvdata(pdev, dev);
1683
1684         if (netif_msg_probe(tp)) {
1685                 printk(KERN_INFO "%s: %s at 0x%lx, "
1686                        "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
1687                        "IRQ %d\n",
1688                        dev->name,
1689                        rtl_chip_info[tp->chipset].name,
1690                        dev->base_addr,
1691                        dev->dev_addr[0], dev->dev_addr[1],
1692                        dev->dev_addr[2], dev->dev_addr[3],
1693                        dev->dev_addr[4], dev->dev_addr[5], dev->irq);
1694         }
1695
1696         rtl8169_init_phy(dev, tp);
1697
1698 out:
1699         return rc;
1700
1701 err_out_unmap_5:
1702         iounmap(ioaddr);
1703 err_out_free_res_4:
1704         pci_release_regions(pdev);
1705 err_out_mwi_3:
1706         pci_clear_mwi(pdev);
1707 err_out_disable_2:
1708         pci_disable_device(pdev);
1709 err_out_free_dev_1:
1710         free_netdev(dev);
1711         goto out;
1712 }
1713
1714 static void __devexit
1715 rtl8169_remove_one(struct pci_dev *pdev)
1716 {
1717         struct net_device *dev = pci_get_drvdata(pdev);
1718         struct rtl8169_private *tp = netdev_priv(dev);
1719
1720         assert(dev != NULL);
1721         assert(tp != NULL);
1722
1723         unregister_netdev(dev);
1724         rtl8169_release_board(pdev, dev, tp->mmio_addr);
1725         pci_set_drvdata(pdev, NULL);
1726 }
1727
1728 static void rtl8169_set_rxbufsize(struct rtl8169_private *tp,
1729                                   struct net_device *dev)
1730 {
1731         unsigned int mtu = dev->mtu;
1732
1733         tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE;
1734 }
1735
1736 static int rtl8169_open(struct net_device *dev)
1737 {
1738         struct rtl8169_private *tp = netdev_priv(dev);
1739         struct pci_dev *pdev = tp->pci_dev;
1740         int retval;
1741
1742         rtl8169_set_rxbufsize(tp, dev);
1743
1744         retval =
1745             request_irq(dev->irq, rtl8169_interrupt, IRQF_SHARED, dev->name, dev);
1746         if (retval < 0)
1747                 goto out;
1748
1749         retval = -ENOMEM;
1750
1751         /*
1752          * Rx and Tx desscriptors needs 256 bytes alignment.
1753          * pci_alloc_consistent provides more.
1754          */
1755         tp->TxDescArray = pci_alloc_consistent(pdev, R8169_TX_RING_BYTES,
1756                                                &tp->TxPhyAddr);
1757         if (!tp->TxDescArray)
1758                 goto err_free_irq;
1759
1760         tp->RxDescArray = pci_alloc_consistent(pdev, R8169_RX_RING_BYTES,
1761                                                &tp->RxPhyAddr);
1762         if (!tp->RxDescArray)
1763                 goto err_free_tx;
1764
1765         retval = rtl8169_init_ring(dev);
1766         if (retval < 0)
1767                 goto err_free_rx;
1768
1769         INIT_DELAYED_WORK(&tp->task, NULL);
1770
1771         rtl8169_hw_start(dev);
1772
1773         rtl8169_request_timer(dev);
1774
1775         rtl8169_check_link_status(dev, tp, tp->mmio_addr);
1776 out:
1777         return retval;
1778
1779 err_free_rx:
1780         pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
1781                             tp->RxPhyAddr);
1782 err_free_tx:
1783         pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
1784                             tp->TxPhyAddr);
1785 err_free_irq:
1786         free_irq(dev->irq, dev);
1787         goto out;
1788 }
1789
1790 static void rtl8169_hw_reset(void __iomem *ioaddr)
1791 {
1792         /* Disable interrupts */
1793         rtl8169_irq_mask_and_ack(ioaddr);
1794
1795         /* Reset the chipset */
1796         RTL_W8(ChipCmd, CmdReset);
1797
1798         /* PCI commit */
1799         RTL_R8(ChipCmd);
1800 }
1801
1802 static void
1803 rtl8169_hw_start(struct net_device *dev)
1804 {
1805         struct rtl8169_private *tp = netdev_priv(dev);
1806         void __iomem *ioaddr = tp->mmio_addr;
1807         struct pci_dev *pdev = tp->pci_dev;
1808         u32 i;
1809
1810         /* Soft reset the chip. */
1811         RTL_W8(ChipCmd, CmdReset);
1812
1813         /* Check that the chip has finished the reset. */
1814         for (i = 100; i > 0; i--) {
1815                 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1816                         break;
1817                 msleep_interruptible(1);
1818         }
1819
1820         if (tp->mac_version == RTL_GIGA_MAC_VER_13) {
1821                 pci_write_config_word(pdev, 0x68, 0x00);
1822                 pci_write_config_word(pdev, 0x69, 0x08);
1823         }
1824
1825         /* Undocumented stuff. */
1826         if (tp->mac_version == RTL_GIGA_MAC_VER_05) {
1827                 u16 cmd;
1828
1829                 /* Realtek's r1000_n.c driver uses '&& 0x01' here. Well... */
1830                 if ((RTL_R8(Config2) & 0x07) & 0x01)
1831                         RTL_W32(0x7c, 0x0007ffff);
1832
1833                 RTL_W32(0x7c, 0x0007ff00);
1834
1835                 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
1836                 cmd = cmd & 0xef;
1837                 pci_write_config_word(pdev, PCI_COMMAND, cmd);
1838         }
1839
1840
1841         RTL_W8(Cfg9346, Cfg9346_Unlock);
1842         RTL_W8(EarlyTxThres, EarlyTxThld);
1843
1844         /* Low hurts. Let's disable the filtering. */
1845         RTL_W16(RxMaxSize, 16383);
1846
1847         /* Set Rx Config register */
1848         i = rtl8169_rx_config |
1849                 (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
1850         RTL_W32(RxConfig, i);
1851
1852         /* Set DMA burst size and Interframe Gap Time */
1853         RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |
1854                 (InterFrameGap << TxInterFrameGapShift));
1855
1856         tp->cp_cmd |= RTL_R16(CPlusCmd) | PCIMulRW;
1857
1858         if ((tp->mac_version == RTL_GIGA_MAC_VER_02) ||
1859             (tp->mac_version == RTL_GIGA_MAC_VER_03)) {
1860                 dprintk(KERN_INFO PFX "Set MAC Reg C+CR Offset 0xE0. "
1861                         "Bit-3 and bit-14 MUST be 1\n");
1862                 tp->cp_cmd |= (1 << 14);
1863         }
1864
1865         RTL_W16(CPlusCmd, tp->cp_cmd);
1866
1867         /*
1868          * Undocumented corner. Supposedly:
1869          * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
1870          */
1871         RTL_W16(IntrMitigate, 0x0000);
1872
1873         /*
1874          * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
1875          * register to be written before TxDescAddrLow to work.
1876          * Switching from MMIO to I/O access fixes the issue as well.
1877          */
1878         RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32));
1879         RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK));
1880         RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
1881         RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK));
1882         RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
1883         RTL_W8(Cfg9346, Cfg9346_Lock);
1884
1885         /* Initially a 10 us delay. Turned it into a PCI commit. - FR */
1886         RTL_R8(IntrMask);
1887
1888         RTL_W32(RxMissed, 0);
1889
1890         rtl8169_set_rx_mode(dev);
1891
1892         /* no early-rx interrupts */
1893         RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
1894
1895         /* Enable all known interrupts by setting the interrupt mask. */
1896         RTL_W16(IntrMask, rtl8169_intr_mask);
1897
1898         netif_start_queue(dev);
1899 }
1900
1901 static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)
1902 {
1903         struct rtl8169_private *tp = netdev_priv(dev);
1904         int ret = 0;
1905
1906         if (new_mtu < ETH_ZLEN || new_mtu > SafeMtu)
1907                 return -EINVAL;
1908
1909         dev->mtu = new_mtu;
1910
1911         if (!netif_running(dev))
1912                 goto out;
1913
1914         rtl8169_down(dev);
1915
1916         rtl8169_set_rxbufsize(tp, dev);
1917
1918         ret = rtl8169_init_ring(dev);
1919         if (ret < 0)
1920                 goto out;
1921
1922         netif_poll_enable(dev);
1923
1924         rtl8169_hw_start(dev);
1925
1926         rtl8169_request_timer(dev);
1927
1928 out:
1929         return ret;
1930 }
1931
1932 static inline void rtl8169_make_unusable_by_asic(struct RxDesc *desc)
1933 {
1934         desc->addr = 0x0badbadbadbadbadull;
1935         desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
1936 }
1937
1938 static void rtl8169_free_rx_skb(struct rtl8169_private *tp,
1939                                 struct sk_buff **sk_buff, struct RxDesc *desc)
1940 {
1941         struct pci_dev *pdev = tp->pci_dev;
1942
1943         pci_unmap_single(pdev, le64_to_cpu(desc->addr), tp->rx_buf_sz,
1944                          PCI_DMA_FROMDEVICE);
1945         dev_kfree_skb(*sk_buff);
1946         *sk_buff = NULL;
1947         rtl8169_make_unusable_by_asic(desc);
1948 }
1949
1950 static inline void rtl8169_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz)
1951 {
1952         u32 eor = le32_to_cpu(desc->opts1) & RingEnd;
1953
1954         desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz);
1955 }
1956
1957 static inline void rtl8169_map_to_asic(struct RxDesc *desc, dma_addr_t mapping,
1958                                        u32 rx_buf_sz)
1959 {
1960         desc->addr = cpu_to_le64(mapping);
1961         wmb();
1962         rtl8169_mark_to_asic(desc, rx_buf_sz);
1963 }
1964
1965 static int rtl8169_alloc_rx_skb(struct pci_dev *pdev, struct sk_buff **sk_buff,
1966                                 struct RxDesc *desc, int rx_buf_sz,
1967                                 unsigned int align)
1968 {
1969         struct sk_buff *skb;
1970         dma_addr_t mapping;
1971         int ret = 0;
1972
1973         skb = dev_alloc_skb(rx_buf_sz + align);
1974         if (!skb)
1975                 goto err_out;
1976
1977         skb_reserve(skb, align);
1978         *sk_buff = skb;
1979
1980         mapping = pci_map_single(pdev, skb->data, rx_buf_sz,
1981                                  PCI_DMA_FROMDEVICE);
1982
1983         rtl8169_map_to_asic(desc, mapping, rx_buf_sz);
1984
1985 out:
1986         return ret;
1987
1988 err_out:
1989         ret = -ENOMEM;
1990         rtl8169_make_unusable_by_asic(desc);
1991         goto out;
1992 }
1993
1994 static void rtl8169_rx_clear(struct rtl8169_private *tp)
1995 {
1996         int i;
1997
1998         for (i = 0; i < NUM_RX_DESC; i++) {
1999                 if (tp->Rx_skbuff[i]) {
2000                         rtl8169_free_rx_skb(tp, tp->Rx_skbuff + i,
2001                                             tp->RxDescArray + i);
2002                 }
2003         }
2004 }
2005
2006 static u32 rtl8169_rx_fill(struct rtl8169_private *tp, struct net_device *dev,
2007                            u32 start, u32 end)
2008 {
2009         u32 cur;
2010
2011         for (cur = start; end - cur > 0; cur++) {
2012                 int ret, i = cur % NUM_RX_DESC;
2013
2014                 if (tp->Rx_skbuff[i])
2015                         continue;
2016
2017                 ret = rtl8169_alloc_rx_skb(tp->pci_dev, tp->Rx_skbuff + i,
2018                         tp->RxDescArray + i, tp->rx_buf_sz, tp->align);
2019                 if (ret < 0)
2020                         break;
2021         }
2022         return cur - start;
2023 }
2024
2025 static inline void rtl8169_mark_as_last_descriptor(struct RxDesc *desc)
2026 {
2027         desc->opts1 |= cpu_to_le32(RingEnd);
2028 }
2029
2030 static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)
2031 {
2032         tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
2033 }
2034
2035 static int rtl8169_init_ring(struct net_device *dev)
2036 {
2037         struct rtl8169_private *tp = netdev_priv(dev);
2038
2039         rtl8169_init_ring_indexes(tp);
2040
2041         memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info));
2042         memset(tp->Rx_skbuff, 0x0, NUM_RX_DESC * sizeof(struct sk_buff *));
2043
2044         if (rtl8169_rx_fill(tp, dev, 0, NUM_RX_DESC) != NUM_RX_DESC)
2045                 goto err_out;
2046
2047         rtl8169_mark_as_last_descriptor(tp->RxDescArray + NUM_RX_DESC - 1);
2048
2049         return 0;
2050
2051 err_out:
2052         rtl8169_rx_clear(tp);
2053         return -ENOMEM;
2054 }
2055
2056 static void rtl8169_unmap_tx_skb(struct pci_dev *pdev, struct ring_info *tx_skb,
2057                                  struct TxDesc *desc)
2058 {
2059         unsigned int len = tx_skb->len;
2060
2061         pci_unmap_single(pdev, le64_to_cpu(desc->addr), len, PCI_DMA_TODEVICE);
2062         desc->opts1 = 0x00;
2063         desc->opts2 = 0x00;
2064         desc->addr = 0x00;
2065         tx_skb->len = 0;
2066 }
2067
2068 static void rtl8169_tx_clear(struct rtl8169_private *tp)
2069 {
2070         unsigned int i;
2071
2072         for (i = tp->dirty_tx; i < tp->dirty_tx + NUM_TX_DESC; i++) {
2073                 unsigned int entry = i % NUM_TX_DESC;
2074                 struct ring_info *tx_skb = tp->tx_skb + entry;
2075                 unsigned int len = tx_skb->len;
2076
2077                 if (len) {
2078                         struct sk_buff *skb = tx_skb->skb;
2079
2080                         rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb,
2081                                              tp->TxDescArray + entry);
2082                         if (skb) {
2083                                 dev_kfree_skb(skb);
2084                                 tx_skb->skb = NULL;
2085                         }
2086                         tp->stats.tx_dropped++;
2087                 }
2088         }
2089         tp->cur_tx = tp->dirty_tx = 0;
2090 }
2091
2092 static void rtl8169_schedule_work(struct net_device *dev, work_func_t task)
2093 {
2094         struct rtl8169_private *tp = netdev_priv(dev);
2095
2096         PREPARE_DELAYED_WORK(&tp->task, task);
2097         schedule_delayed_work(&tp->task, 4);
2098 }
2099
2100 static void rtl8169_wait_for_quiescence(struct net_device *dev)
2101 {
2102         struct rtl8169_private *tp = netdev_priv(dev);
2103         void __iomem *ioaddr = tp->mmio_addr;
2104
2105         synchronize_irq(dev->irq);
2106
2107         /* Wait for any pending NAPI task to complete */
2108         netif_poll_disable(dev);
2109
2110         rtl8169_irq_mask_and_ack(ioaddr);
2111
2112         netif_poll_enable(dev);
2113 }
2114
2115 static void rtl8169_reinit_task(struct work_struct *work)
2116 {
2117         struct rtl8169_private *tp =
2118                 container_of(work, struct rtl8169_private, task.work);
2119         struct net_device *dev = tp->dev;
2120         int ret;
2121
2122         if (netif_running(dev)) {
2123                 rtl8169_wait_for_quiescence(dev);
2124                 rtl8169_close(dev);
2125         }
2126
2127         ret = rtl8169_open(dev);
2128         if (unlikely(ret < 0)) {
2129                 if (net_ratelimit()) {
2130                         struct rtl8169_private *tp = netdev_priv(dev);
2131
2132                         if (netif_msg_drv(tp)) {
2133                                 printk(PFX KERN_ERR
2134                                        "%s: reinit failure (status = %d)."
2135                                        " Rescheduling.\n", dev->name, ret);
2136                         }
2137                 }
2138                 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2139         }
2140 }
2141
2142 static void rtl8169_reset_task(struct work_struct *work)
2143 {
2144         struct rtl8169_private *tp =
2145                 container_of(work, struct rtl8169_private, task.work);
2146         struct net_device *dev = tp->dev;
2147
2148         if (!netif_running(dev))
2149                 return;
2150
2151         rtl8169_wait_for_quiescence(dev);
2152
2153         rtl8169_rx_interrupt(dev, tp, tp->mmio_addr);
2154         rtl8169_tx_clear(tp);
2155
2156         if (tp->dirty_rx == tp->cur_rx) {
2157                 rtl8169_init_ring_indexes(tp);
2158                 rtl8169_hw_start(dev);
2159                 netif_wake_queue(dev);
2160         } else {
2161                 if (net_ratelimit()) {
2162                         struct rtl8169_private *tp = netdev_priv(dev);
2163
2164                         if (netif_msg_intr(tp)) {
2165                                 printk(PFX KERN_EMERG
2166                                        "%s: Rx buffers shortage\n", dev->name);
2167                         }
2168                 }
2169                 rtl8169_schedule_work(dev, rtl8169_reset_task);
2170         }
2171 }
2172
2173 static void rtl8169_tx_timeout(struct net_device *dev)
2174 {
2175         struct rtl8169_private *tp = netdev_priv(dev);
2176
2177         rtl8169_hw_reset(tp->mmio_addr);
2178
2179         /* Let's wait a bit while any (async) irq lands on */
2180         rtl8169_schedule_work(dev, rtl8169_reset_task);
2181 }
2182
2183 static int rtl8169_xmit_frags(struct rtl8169_private *tp, struct sk_buff *skb,
2184                               u32 opts1)
2185 {
2186         struct skb_shared_info *info = skb_shinfo(skb);
2187         unsigned int cur_frag, entry;
2188         struct TxDesc *txd;
2189
2190         entry = tp->cur_tx;
2191         for (cur_frag = 0; cur_frag < info->nr_frags; cur_frag++) {
2192                 skb_frag_t *frag = info->frags + cur_frag;
2193                 dma_addr_t mapping;
2194                 u32 status, len;
2195                 void *addr;
2196
2197                 entry = (entry + 1) % NUM_TX_DESC;
2198
2199                 txd = tp->TxDescArray + entry;
2200                 len = frag->size;
2201                 addr = ((void *) page_address(frag->page)) + frag->page_offset;
2202                 mapping = pci_map_single(tp->pci_dev, addr, len, PCI_DMA_TODEVICE);
2203
2204                 /* anti gcc 2.95.3 bugware (sic) */
2205                 status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2206
2207                 txd->opts1 = cpu_to_le32(status);
2208                 txd->addr = cpu_to_le64(mapping);
2209
2210                 tp->tx_skb[entry].len = len;
2211         }
2212
2213         if (cur_frag) {
2214                 tp->tx_skb[entry].skb = skb;
2215                 txd->opts1 |= cpu_to_le32(LastFrag);
2216         }
2217
2218         return cur_frag;
2219 }
2220
2221 static inline u32 rtl8169_tso_csum(struct sk_buff *skb, struct net_device *dev)
2222 {
2223         if (dev->features & NETIF_F_TSO) {
2224                 u32 mss = skb_shinfo(skb)->gso_size;
2225
2226                 if (mss)
2227                         return LargeSend | ((mss & MSSMask) << MSSShift);
2228         }
2229         if (skb->ip_summed == CHECKSUM_PARTIAL) {
2230                 const struct iphdr *ip = skb->nh.iph;
2231
2232                 if (ip->protocol == IPPROTO_TCP)
2233                         return IPCS | TCPCS;
2234                 else if (ip->protocol == IPPROTO_UDP)
2235                         return IPCS | UDPCS;
2236                 WARN_ON(1);     /* we need a WARN() */
2237         }
2238         return 0;
2239 }
2240
2241 static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev)
2242 {
2243         struct rtl8169_private *tp = netdev_priv(dev);
2244         unsigned int frags, entry = tp->cur_tx % NUM_TX_DESC;
2245         struct TxDesc *txd = tp->TxDescArray + entry;
2246         void __iomem *ioaddr = tp->mmio_addr;
2247         dma_addr_t mapping;
2248         u32 status, len;
2249         u32 opts1;
2250         int ret = NETDEV_TX_OK;
2251
2252         if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) {
2253                 if (netif_msg_drv(tp)) {
2254                         printk(KERN_ERR
2255                                "%s: BUG! Tx Ring full when queue awake!\n",
2256                                dev->name);
2257                 }
2258                 goto err_stop;
2259         }
2260
2261         if (unlikely(le32_to_cpu(txd->opts1) & DescOwn))
2262                 goto err_stop;
2263
2264         opts1 = DescOwn | rtl8169_tso_csum(skb, dev);
2265
2266         frags = rtl8169_xmit_frags(tp, skb, opts1);
2267         if (frags) {
2268                 len = skb_headlen(skb);
2269                 opts1 |= FirstFrag;
2270         } else {
2271                 len = skb->len;
2272
2273                 if (unlikely(len < ETH_ZLEN)) {
2274                         if (skb_padto(skb, ETH_ZLEN))
2275                                 goto err_update_stats;
2276                         len = ETH_ZLEN;
2277                 }
2278
2279                 opts1 |= FirstFrag | LastFrag;
2280                 tp->tx_skb[entry].skb = skb;
2281         }
2282
2283         mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
2284
2285         tp->tx_skb[entry].len = len;
2286         txd->addr = cpu_to_le64(mapping);
2287         txd->opts2 = cpu_to_le32(rtl8169_tx_vlan_tag(tp, skb));
2288
2289         wmb();
2290
2291         /* anti gcc 2.95.3 bugware (sic) */
2292         status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
2293         txd->opts1 = cpu_to_le32(status);
2294
2295         dev->trans_start = jiffies;
2296
2297         tp->cur_tx += frags + 1;
2298
2299         smp_wmb();
2300
2301         RTL_W8(TxPoll, 0x40);   /* set polling bit */
2302
2303         if (TX_BUFFS_AVAIL(tp) < MAX_SKB_FRAGS) {
2304                 netif_stop_queue(dev);
2305                 smp_rmb();
2306                 if (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)
2307                         netif_wake_queue(dev);
2308         }
2309
2310 out:
2311         return ret;
2312
2313 err_stop:
2314         netif_stop_queue(dev);
2315         ret = NETDEV_TX_BUSY;
2316 err_update_stats:
2317         tp->stats.tx_dropped++;
2318         goto out;
2319 }
2320
2321 static void rtl8169_pcierr_interrupt(struct net_device *dev)
2322 {
2323         struct rtl8169_private *tp = netdev_priv(dev);
2324         struct pci_dev *pdev = tp->pci_dev;
2325         void __iomem *ioaddr = tp->mmio_addr;
2326         u16 pci_status, pci_cmd;
2327
2328         pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
2329         pci_read_config_word(pdev, PCI_STATUS, &pci_status);
2330
2331         if (netif_msg_intr(tp)) {
2332                 printk(KERN_ERR
2333                        "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n",
2334                        dev->name, pci_cmd, pci_status);
2335         }
2336
2337         /*
2338          * The recovery sequence below admits a very elaborated explanation:
2339          * - it seems to work;
2340          * - I did not see what else could be done.
2341          *
2342          * Feel free to adjust to your needs.
2343          */
2344         pci_write_config_word(pdev, PCI_COMMAND,
2345                               pci_cmd | PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
2346
2347         pci_write_config_word(pdev, PCI_STATUS,
2348                 pci_status & (PCI_STATUS_DETECTED_PARITY |
2349                 PCI_STATUS_SIG_SYSTEM_ERROR | PCI_STATUS_REC_MASTER_ABORT |
2350                 PCI_STATUS_REC_TARGET_ABORT | PCI_STATUS_SIG_TARGET_ABORT));
2351
2352         /* The infamous DAC f*ckup only happens at boot time */
2353         if ((tp->cp_cmd & PCIDAC) && !tp->dirty_rx && !tp->cur_rx) {
2354                 if (netif_msg_intr(tp))
2355                         printk(KERN_INFO "%s: disabling PCI DAC.\n", dev->name);
2356                 tp->cp_cmd &= ~PCIDAC;
2357                 RTL_W16(CPlusCmd, tp->cp_cmd);
2358                 dev->features &= ~NETIF_F_HIGHDMA;
2359                 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2360         }
2361
2362         rtl8169_hw_reset(ioaddr);
2363 }
2364
2365 static void
2366 rtl8169_tx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2367                      void __iomem *ioaddr)
2368 {
2369         unsigned int dirty_tx, tx_left;
2370
2371         assert(dev != NULL);
2372         assert(tp != NULL);
2373         assert(ioaddr != NULL);
2374
2375         dirty_tx = tp->dirty_tx;
2376         smp_rmb();
2377         tx_left = tp->cur_tx - dirty_tx;
2378
2379         while (tx_left > 0) {
2380                 unsigned int entry = dirty_tx % NUM_TX_DESC;
2381                 struct ring_info *tx_skb = tp->tx_skb + entry;
2382                 u32 len = tx_skb->len;
2383                 u32 status;
2384
2385                 rmb();
2386                 status = le32_to_cpu(tp->TxDescArray[entry].opts1);
2387                 if (status & DescOwn)
2388                         break;
2389
2390                 tp->stats.tx_bytes += len;
2391                 tp->stats.tx_packets++;
2392
2393                 rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb, tp->TxDescArray + entry);
2394
2395                 if (status & LastFrag) {
2396                         dev_kfree_skb_irq(tx_skb->skb);
2397                         tx_skb->skb = NULL;
2398                 }
2399                 dirty_tx++;
2400                 tx_left--;
2401         }
2402
2403         if (tp->dirty_tx != dirty_tx) {
2404                 tp->dirty_tx = dirty_tx;
2405                 smp_wmb();
2406                 if (netif_queue_stopped(dev) &&
2407                     (TX_BUFFS_AVAIL(tp) >= MAX_SKB_FRAGS)) {
2408                         netif_wake_queue(dev);
2409                 }
2410         }
2411 }
2412
2413 static inline int rtl8169_fragmented_frame(u32 status)
2414 {
2415         return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
2416 }
2417
2418 static inline void rtl8169_rx_csum(struct sk_buff *skb, struct RxDesc *desc)
2419 {
2420         u32 opts1 = le32_to_cpu(desc->opts1);
2421         u32 status = opts1 & RxProtoMask;
2422
2423         if (((status == RxProtoTCP) && !(opts1 & TCPFail)) ||
2424             ((status == RxProtoUDP) && !(opts1 & UDPFail)) ||
2425             ((status == RxProtoIP) && !(opts1 & IPFail)))
2426                 skb->ip_summed = CHECKSUM_UNNECESSARY;
2427         else
2428                 skb->ip_summed = CHECKSUM_NONE;
2429 }
2430
2431 static inline int rtl8169_try_rx_copy(struct sk_buff **sk_buff, int pkt_size,
2432                                       struct RxDesc *desc, int rx_buf_sz,
2433                                       unsigned int align)
2434 {
2435         int ret = -1;
2436
2437         if (pkt_size < rx_copybreak) {
2438                 struct sk_buff *skb;
2439
2440                 skb = dev_alloc_skb(pkt_size + align);
2441                 if (skb) {
2442                         skb_reserve(skb, align);
2443                         eth_copy_and_sum(skb, sk_buff[0]->data, pkt_size, 0);
2444                         *sk_buff = skb;
2445                         rtl8169_mark_to_asic(desc, rx_buf_sz);
2446                         ret = 0;
2447                 }
2448         }
2449         return ret;
2450 }
2451
2452 static int
2453 rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2454                      void __iomem *ioaddr)
2455 {
2456         unsigned int cur_rx, rx_left;
2457         unsigned int delta, count;
2458
2459         assert(dev != NULL);
2460         assert(tp != NULL);
2461         assert(ioaddr != NULL);
2462
2463         cur_rx = tp->cur_rx;
2464         rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
2465         rx_left = rtl8169_rx_quota(rx_left, (u32) dev->quota);
2466
2467         for (; rx_left > 0; rx_left--, cur_rx++) {
2468                 unsigned int entry = cur_rx % NUM_RX_DESC;
2469                 struct RxDesc *desc = tp->RxDescArray + entry;
2470                 u32 status;
2471
2472                 rmb();
2473                 status = le32_to_cpu(desc->opts1);
2474
2475                 if (status & DescOwn)
2476                         break;
2477                 if (unlikely(status & RxRES)) {
2478                         if (netif_msg_rx_err(tp)) {
2479                                 printk(KERN_INFO
2480                                        "%s: Rx ERROR. status = %08x\n",
2481                                        dev->name, status);
2482                         }
2483                         tp->stats.rx_errors++;
2484                         if (status & (RxRWT | RxRUNT))
2485                                 tp->stats.rx_length_errors++;
2486                         if (status & RxCRC)
2487                                 tp->stats.rx_crc_errors++;
2488                         if (status & RxFOVF) {
2489                                 rtl8169_schedule_work(dev, rtl8169_reset_task);
2490                                 tp->stats.rx_fifo_errors++;
2491                         }
2492                         rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2493                 } else {
2494                         struct sk_buff *skb = tp->Rx_skbuff[entry];
2495                         int pkt_size = (status & 0x00001FFF) - 4;
2496                         void (*pci_action)(struct pci_dev *, dma_addr_t,
2497                                 size_t, int) = pci_dma_sync_single_for_device;
2498
2499                         /*
2500                          * The driver does not support incoming fragmented
2501                          * frames. They are seen as a symptom of over-mtu
2502                          * sized frames.
2503                          */
2504                         if (unlikely(rtl8169_fragmented_frame(status))) {
2505                                 tp->stats.rx_dropped++;
2506                                 tp->stats.rx_length_errors++;
2507                                 rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
2508                                 continue;
2509                         }
2510
2511                         rtl8169_rx_csum(skb, desc);
2512
2513                         pci_dma_sync_single_for_cpu(tp->pci_dev,
2514                                 le64_to_cpu(desc->addr), tp->rx_buf_sz,
2515                                 PCI_DMA_FROMDEVICE);
2516
2517                         if (rtl8169_try_rx_copy(&skb, pkt_size, desc,
2518                                                 tp->rx_buf_sz, tp->align)) {
2519                                 pci_action = pci_unmap_single;
2520                                 tp->Rx_skbuff[entry] = NULL;
2521                         }
2522
2523                         pci_action(tp->pci_dev, le64_to_cpu(desc->addr),
2524                                    tp->rx_buf_sz, PCI_DMA_FROMDEVICE);
2525
2526                         skb->dev = dev;
2527                         skb_put(skb, pkt_size);
2528                         skb->protocol = eth_type_trans(skb, dev);
2529
2530                         if (rtl8169_rx_vlan_skb(tp, desc, skb) < 0)
2531                                 rtl8169_rx_skb(skb);
2532
2533                         dev->last_rx = jiffies;
2534                         tp->stats.rx_bytes += pkt_size;
2535                         tp->stats.rx_packets++;
2536                 }
2537         }
2538
2539         count = cur_rx - tp->cur_rx;
2540         tp->cur_rx = cur_rx;
2541
2542         delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx);
2543         if (!delta && count && netif_msg_intr(tp))
2544                 printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name);
2545         tp->dirty_rx += delta;
2546
2547         /*
2548          * FIXME: until there is periodic timer to try and refill the ring,
2549          * a temporary shortage may definitely kill the Rx process.
2550          * - disable the asic to try and avoid an overflow and kick it again
2551          *   after refill ?
2552          * - how do others driver handle this condition (Uh oh...).
2553          */
2554         if ((tp->dirty_rx + NUM_RX_DESC == tp->cur_rx) && netif_msg_intr(tp))
2555                 printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name);
2556
2557         return count;
2558 }
2559
2560 /* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */
2561 static irqreturn_t
2562 rtl8169_interrupt(int irq, void *dev_instance)
2563 {
2564         struct net_device *dev = (struct net_device *) dev_instance;
2565         struct rtl8169_private *tp = netdev_priv(dev);
2566         int boguscnt = max_interrupt_work;
2567         void __iomem *ioaddr = tp->mmio_addr;
2568         int status;
2569         int handled = 0;
2570
2571         do {
2572                 status = RTL_R16(IntrStatus);
2573
2574                 /* hotplug/major error/no more work/shared irq */
2575                 if ((status == 0xFFFF) || !status)
2576                         break;
2577
2578                 handled = 1;
2579
2580                 if (unlikely(!netif_running(dev))) {
2581                         rtl8169_asic_down(ioaddr);
2582                         goto out;
2583                 }
2584
2585                 status &= tp->intr_mask;
2586                 RTL_W16(IntrStatus,
2587                         (status & RxFIFOOver) ? (status | RxOverflow) : status);
2588
2589                 if (!(status & rtl8169_intr_mask))
2590                         break;
2591
2592                 if (unlikely(status & SYSErr)) {
2593                         rtl8169_pcierr_interrupt(dev);
2594                         break;
2595                 }
2596
2597                 if (status & LinkChg)
2598                         rtl8169_check_link_status(dev, tp, ioaddr);
2599
2600 #ifdef CONFIG_R8169_NAPI
2601                 RTL_W16(IntrMask, rtl8169_intr_mask & ~rtl8169_napi_event);
2602                 tp->intr_mask = ~rtl8169_napi_event;
2603
2604                 if (likely(netif_rx_schedule_prep(dev)))
2605                         __netif_rx_schedule(dev);
2606                 else if (netif_msg_intr(tp)) {
2607                         printk(KERN_INFO "%s: interrupt %04x taken in poll\n",
2608                                dev->name, status);
2609                 }
2610                 break;
2611 #else
2612                 /* Rx interrupt */
2613                 if (status & (RxOK | RxOverflow | RxFIFOOver)) {
2614                         rtl8169_rx_interrupt(dev, tp, ioaddr);
2615                 }
2616                 /* Tx interrupt */
2617                 if (status & (TxOK | TxErr))
2618                         rtl8169_tx_interrupt(dev, tp, ioaddr);
2619 #endif
2620
2621                 boguscnt--;
2622         } while (boguscnt > 0);
2623
2624         if (boguscnt <= 0) {
2625                 if (netif_msg_intr(tp) && net_ratelimit() ) {
2626                         printk(KERN_WARNING
2627                                "%s: Too much work at interrupt!\n", dev->name);
2628                 }
2629                 /* Clear all interrupt sources. */
2630                 RTL_W16(IntrStatus, 0xffff);
2631         }
2632 out:
2633         return IRQ_RETVAL(handled);
2634 }
2635
2636 #ifdef CONFIG_R8169_NAPI
2637 static int rtl8169_poll(struct net_device *dev, int *budget)
2638 {
2639         unsigned int work_done, work_to_do = min(*budget, dev->quota);
2640         struct rtl8169_private *tp = netdev_priv(dev);
2641         void __iomem *ioaddr = tp->mmio_addr;
2642
2643         work_done = rtl8169_rx_interrupt(dev, tp, ioaddr);
2644         rtl8169_tx_interrupt(dev, tp, ioaddr);
2645
2646         *budget -= work_done;
2647         dev->quota -= work_done;
2648
2649         if (work_done < work_to_do) {
2650                 netif_rx_complete(dev);
2651                 tp->intr_mask = 0xffff;
2652                 /*
2653                  * 20040426: the barrier is not strictly required but the
2654                  * behavior of the irq handler could be less predictable
2655                  * without it. Btw, the lack of flush for the posted pci
2656                  * write is safe - FR
2657                  */
2658                 smp_wmb();
2659                 RTL_W16(IntrMask, rtl8169_intr_mask);
2660         }
2661
2662         return (work_done >= work_to_do);
2663 }
2664 #endif
2665
2666 static void rtl8169_down(struct net_device *dev)
2667 {
2668         struct rtl8169_private *tp = netdev_priv(dev);
2669         void __iomem *ioaddr = tp->mmio_addr;
2670         unsigned int poll_locked = 0;
2671         unsigned int intrmask;
2672
2673         rtl8169_delete_timer(dev);
2674
2675         netif_stop_queue(dev);
2676
2677         flush_scheduled_work();
2678
2679 core_down:
2680         spin_lock_irq(&tp->lock);
2681
2682         rtl8169_asic_down(ioaddr);
2683
2684         /* Update the error counts. */
2685         tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2686         RTL_W32(RxMissed, 0);
2687
2688         spin_unlock_irq(&tp->lock);
2689
2690         synchronize_irq(dev->irq);
2691
2692         if (!poll_locked) {
2693                 netif_poll_disable(dev);
2694                 poll_locked++;
2695         }
2696
2697         /* Give a racing hard_start_xmit a few cycles to complete. */
2698         synchronize_sched();  /* FIXME: should this be synchronize_irq()? */
2699
2700         /*
2701          * And now for the 50k$ question: are IRQ disabled or not ?
2702          *
2703          * Two paths lead here:
2704          * 1) dev->close
2705          *    -> netif_running() is available to sync the current code and the
2706          *       IRQ handler. See rtl8169_interrupt for details.
2707          * 2) dev->change_mtu
2708          *    -> rtl8169_poll can not be issued again and re-enable the
2709          *       interruptions. Let's simply issue the IRQ down sequence again.
2710          *
2711          * No loop if hotpluged or major error (0xffff).
2712          */
2713         intrmask = RTL_R16(IntrMask);
2714         if (intrmask && (intrmask != 0xffff))
2715                 goto core_down;
2716
2717         rtl8169_tx_clear(tp);
2718
2719         rtl8169_rx_clear(tp);
2720 }
2721
2722 static int rtl8169_close(struct net_device *dev)
2723 {
2724         struct rtl8169_private *tp = netdev_priv(dev);
2725         struct pci_dev *pdev = tp->pci_dev;
2726
2727         rtl8169_down(dev);
2728
2729         free_irq(dev->irq, dev);
2730
2731         netif_poll_enable(dev);
2732
2733         pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray,
2734                             tp->RxPhyAddr);
2735         pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray,
2736                             tp->TxPhyAddr);
2737         tp->TxDescArray = NULL;
2738         tp->RxDescArray = NULL;
2739
2740         return 0;
2741 }
2742
2743 static void
2744 rtl8169_set_rx_mode(struct net_device *dev)
2745 {
2746         struct rtl8169_private *tp = netdev_priv(dev);
2747         void __iomem *ioaddr = tp->mmio_addr;
2748         unsigned long flags;
2749         u32 mc_filter[2];       /* Multicast hash filter */
2750         int i, rx_mode;
2751         u32 tmp = 0;
2752
2753         if (dev->flags & IFF_PROMISC) {
2754                 /* Unconditionally log net taps. */
2755                 if (netif_msg_link(tp)) {
2756                         printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n",
2757                                dev->name);
2758                 }
2759                 rx_mode =
2760                     AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
2761                     AcceptAllPhys;
2762                 mc_filter[1] = mc_filter[0] = 0xffffffff;
2763         } else if ((dev->mc_count > multicast_filter_limit)
2764                    || (dev->flags & IFF_ALLMULTI)) {
2765                 /* Too many to filter perfectly -- accept all multicasts. */
2766                 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
2767                 mc_filter[1] = mc_filter[0] = 0xffffffff;
2768         } else {
2769                 struct dev_mc_list *mclist;
2770                 rx_mode = AcceptBroadcast | AcceptMyPhys;
2771                 mc_filter[1] = mc_filter[0] = 0;
2772                 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
2773                      i++, mclist = mclist->next) {
2774                         int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
2775                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2776                         rx_mode |= AcceptMulticast;
2777                 }
2778         }
2779
2780         spin_lock_irqsave(&tp->lock, flags);
2781
2782         tmp = rtl8169_rx_config | rx_mode |
2783               (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
2784
2785         if ((tp->mac_version == RTL_GIGA_MAC_VER_11) ||
2786             (tp->mac_version == RTL_GIGA_MAC_VER_12) ||
2787             (tp->mac_version == RTL_GIGA_MAC_VER_13) ||
2788             (tp->mac_version == RTL_GIGA_MAC_VER_14) ||
2789             (tp->mac_version == RTL_GIGA_MAC_VER_15)) {
2790                 mc_filter[0] = 0xffffffff;
2791                 mc_filter[1] = 0xffffffff;
2792         }
2793
2794         RTL_W32(RxConfig, tmp);
2795         RTL_W32(MAR0 + 0, mc_filter[0]);
2796         RTL_W32(MAR0 + 4, mc_filter[1]);
2797
2798         spin_unlock_irqrestore(&tp->lock, flags);
2799 }
2800
2801 /**
2802  *  rtl8169_get_stats - Get rtl8169 read/write statistics
2803  *  @dev: The Ethernet Device to get statistics for
2804  *
2805  *  Get TX/RX statistics for rtl8169
2806  */
2807 static struct net_device_stats *rtl8169_get_stats(struct net_device *dev)
2808 {
2809         struct rtl8169_private *tp = netdev_priv(dev);
2810         void __iomem *ioaddr = tp->mmio_addr;
2811         unsigned long flags;
2812
2813         if (netif_running(dev)) {
2814                 spin_lock_irqsave(&tp->lock, flags);
2815                 tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2816                 RTL_W32(RxMissed, 0);
2817                 spin_unlock_irqrestore(&tp->lock, flags);
2818         }
2819
2820         return &tp->stats;
2821 }
2822
2823 #ifdef CONFIG_PM
2824
2825 static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state)
2826 {
2827         struct net_device *dev = pci_get_drvdata(pdev);
2828         struct rtl8169_private *tp = netdev_priv(dev);
2829         void __iomem *ioaddr = tp->mmio_addr;
2830
2831         if (!netif_running(dev))
2832                 goto out;
2833
2834         netif_device_detach(dev);
2835         netif_stop_queue(dev);
2836
2837         spin_lock_irq(&tp->lock);
2838
2839         rtl8169_asic_down(ioaddr);
2840
2841         tp->stats.rx_missed_errors += RTL_R32(RxMissed);
2842         RTL_W32(RxMissed, 0);
2843
2844         spin_unlock_irq(&tp->lock);
2845
2846         pci_save_state(pdev);
2847         pci_enable_wake(pdev, pci_choose_state(pdev, state), tp->wol_enabled);
2848         pci_set_power_state(pdev, pci_choose_state(pdev, state));
2849 out:
2850         return 0;
2851 }
2852
2853 static int rtl8169_resume(struct pci_dev *pdev)
2854 {
2855         struct net_device *dev = pci_get_drvdata(pdev);
2856
2857         if (!netif_running(dev))
2858                 goto out;
2859
2860         netif_device_attach(dev);
2861
2862         pci_set_power_state(pdev, PCI_D0);
2863         pci_restore_state(pdev);
2864         pci_enable_wake(pdev, PCI_D0, 0);
2865
2866         rtl8169_schedule_work(dev, rtl8169_reset_task);
2867 out:
2868         return 0;
2869 }
2870
2871 #endif /* CONFIG_PM */
2872
2873 static struct pci_driver rtl8169_pci_driver = {
2874         .name           = MODULENAME,
2875         .id_table       = rtl8169_pci_tbl,
2876         .probe          = rtl8169_init_one,
2877         .remove         = __devexit_p(rtl8169_remove_one),
2878 #ifdef CONFIG_PM
2879         .suspend        = rtl8169_suspend,
2880         .resume         = rtl8169_resume,
2881 #endif
2882 };
2883
2884 static int __init
2885 rtl8169_init_module(void)
2886 {
2887         return pci_register_driver(&rtl8169_pci_driver);
2888 }
2889
2890 static void __exit
2891 rtl8169_cleanup_module(void)
2892 {
2893         pci_unregister_driver(&rtl8169_pci_driver);
2894 }
2895
2896 module_init(rtl8169_init_module);
2897 module_exit(rtl8169_cleanup_module);