[PATCH] OneNAND: Fix bug in write verify
[linux-3.10.git] / drivers / mtd / onenand / onenand_base.c
1 /*
2  *  linux/drivers/mtd/onenand/onenand_base.c
3  *
4  *  Copyright (C) 2005 Samsung Electronics
5  *  Kyungmin Park <kyungmin.park@samsung.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/mtd/mtd.h>
16 #include <linux/mtd/onenand.h>
17 #include <linux/mtd/partitions.h>
18
19 #include <asm/io.h>
20
21 /**
22  * onenand_oob_64 - oob info for large (2KB) page
23  */
24 static struct nand_oobinfo onenand_oob_64 = {
25         .useecc         = MTD_NANDECC_AUTOPLACE,
26         .eccbytes       = 20,
27         .eccpos         = {
28                 8, 9, 10, 11, 12,
29                 24, 25, 26, 27, 28,
30                 40, 41, 42, 43, 44,
31                 56, 57, 58, 59, 60,
32                 },
33         .oobfree        = {
34                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
35                 {24, 3}, {46, 2}, {40, 3}, {62, 2} }
36 };
37
38 /**
39  * onenand_oob_32 - oob info for middle (1KB) page
40  */
41 static struct nand_oobinfo onenand_oob_32 = {
42         .useecc         = MTD_NANDECC_AUTOPLACE,
43         .eccbytes       = 10,
44         .eccpos         = {
45                 8, 9, 10, 11, 12,
46                 24, 25, 26, 27, 28,
47                 },
48         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
49 };
50
51 static const unsigned char ffchars[] = {
52         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
53         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
54         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
55         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
56         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
57         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
58         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
59         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
60 };
61
62 /**
63  * onenand_readw - [OneNAND Interface] Read OneNAND register
64  * @param addr          address to read
65  *
66  * Read OneNAND register
67  */
68 static unsigned short onenand_readw(void __iomem *addr)
69 {
70         return readw(addr);
71 }
72
73 /**
74  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
75  * @param value         value to write
76  * @param addr          address to write
77  *
78  * Write OneNAND register with value
79  */
80 static void onenand_writew(unsigned short value, void __iomem *addr)
81 {
82         writew(value, addr);
83 }
84
85 /**
86  * onenand_block_address - [DEFAULT] Get block address
87  * @param device        the device id
88  * @param block         the block
89  * @return              translated block address if DDP, otherwise same
90  *
91  * Setup Start Address 1 Register (F100h)
92  */
93 static int onenand_block_address(int device, int block)
94 {
95         if (device & ONENAND_DEVICE_IS_DDP) {
96                 /* Device Flash Core select, NAND Flash Block Address */
97                 int dfs = 0, density, mask;
98
99                 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
100                 mask = (1 << (density + 6));
101
102                 if (block & mask)
103                         dfs = 1;
104
105                 return (dfs << ONENAND_DDP_SHIFT) | (block & (mask - 1));
106         }
107
108         return block;
109 }
110
111 /**
112  * onenand_bufferram_address - [DEFAULT] Get bufferram address
113  * @param device        the device id
114  * @param block         the block
115  * @return              set DBS value if DDP, otherwise 0
116  *
117  * Setup Start Address 2 Register (F101h) for DDP
118  */
119 static int onenand_bufferram_address(int device, int block)
120 {
121         if (device & ONENAND_DEVICE_IS_DDP) {
122                 /* Device BufferRAM Select */
123                 int dbs = 0, density, mask;
124
125                 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
126                 mask = (1 << (density + 6));
127
128                 if (block & mask)
129                         dbs = 1;
130
131                 return (dbs << ONENAND_DDP_SHIFT);
132         }
133
134         return 0;
135 }
136
137 /**
138  * onenand_page_address - [DEFAULT] Get page address
139  * @param page          the page address
140  * @param sector        the sector address
141  * @return              combined page and sector address
142  *
143  * Setup Start Address 8 Register (F107h)
144  */
145 static int onenand_page_address(int page, int sector)
146 {
147         /* Flash Page Address, Flash Sector Address */
148         int fpa, fsa;
149
150         fpa = page & ONENAND_FPA_MASK;
151         fsa = sector & ONENAND_FSA_MASK;
152
153         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
154 }
155
156 /**
157  * onenand_buffer_address - [DEFAULT] Get buffer address
158  * @param dataram1      DataRAM index
159  * @param sectors       the sector address
160  * @param count         the number of sectors
161  * @return              the start buffer value
162  *
163  * Setup Start Buffer Register (F200h)
164  */
165 static int onenand_buffer_address(int dataram1, int sectors, int count)
166 {
167         int bsa, bsc;
168
169         /* BufferRAM Sector Address */
170         bsa = sectors & ONENAND_BSA_MASK;
171
172         if (dataram1)
173                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
174         else
175                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
176
177         /* BufferRAM Sector Count */
178         bsc = count & ONENAND_BSC_MASK;
179
180         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
181 }
182
183 /**
184  * onenand_command - [DEFAULT] Send command to OneNAND device
185  * @param mtd           MTD device structure
186  * @param cmd           the command to be sent
187  * @param addr          offset to read from or write to
188  * @param len           number of bytes to read or write
189  *
190  * Send command to OneNAND device. This function is used for middle/large page
191  * devices (1KB/2KB Bytes per page)
192  */
193 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
194 {
195         struct onenand_chip *this = mtd->priv;
196         int value, readcmd = 0;
197         int block, page;
198         /* Now we use page size operation */
199         int sectors = 4, count = 4;
200
201         /* Address translation */
202         switch (cmd) {
203         case ONENAND_CMD_UNLOCK:
204         case ONENAND_CMD_LOCK:
205         case ONENAND_CMD_LOCK_TIGHT:
206                 block = -1;
207                 page = -1;
208                 break;
209
210         case ONENAND_CMD_ERASE:
211         case ONENAND_CMD_BUFFERRAM:
212                 block = (int) (addr >> this->erase_shift);
213                 page = -1;
214                 break;
215
216         default:
217                 block = (int) (addr >> this->erase_shift);
218                 page = (int) (addr >> this->page_shift);
219                 page &= this->page_mask;
220                 break;
221         }
222
223         /* NOTE: The setting order of the registers is very important! */
224         if (cmd == ONENAND_CMD_BUFFERRAM) {
225                 /* Select DataRAM for DDP */
226                 value = onenand_bufferram_address(this->device_id, block);
227                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
228
229                 /* Switch to the next data buffer */
230                 ONENAND_SET_NEXT_BUFFERRAM(this);
231
232                 return 0;
233         }
234
235         if (block != -1) {
236                 /* Write 'DFS, FBA' of Flash */
237                 value = onenand_block_address(this->device_id, block);
238                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
239         }
240
241         if (page != -1) {
242                 int dataram;
243
244                 switch (cmd) {
245                 case ONENAND_CMD_READ:
246                 case ONENAND_CMD_READOOB:
247                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
248                         readcmd = 1;
249                         break;
250
251                 default:
252                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
253                         break;
254                 }
255
256                 /* Write 'FPA, FSA' of Flash */
257                 value = onenand_page_address(page, sectors);
258                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
259
260                 /* Write 'BSA, BSC' of DataRAM */
261                 value = onenand_buffer_address(dataram, sectors, count);
262                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
263                         
264                 if (readcmd) {
265                         /* Select DataRAM for DDP */
266                         value = onenand_bufferram_address(this->device_id, block);
267                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
268                 }
269         }
270
271         /* Interrupt clear */
272         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
273
274         /* Write command */
275         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
276
277         return 0;
278 }
279
280 /**
281  * onenand_wait - [DEFAULT] wait until the command is done
282  * @param mtd           MTD device structure
283  * @param state         state to select the max. timeout value
284  *
285  * Wait for command done. This applies to all OneNAND command
286  * Read can take up to 30us, erase up to 2ms and program up to 350us
287  * according to general OneNAND specs
288  */
289 static int onenand_wait(struct mtd_info *mtd, int state)
290 {
291         struct onenand_chip * this = mtd->priv;
292         unsigned long timeout;
293         unsigned int flags = ONENAND_INT_MASTER;
294         unsigned int interrupt = 0;
295         unsigned int ctrl, ecc;
296
297         /* The 20 msec is enough */
298         timeout = jiffies + msecs_to_jiffies(20);
299         while (time_before(jiffies, timeout)) {
300                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
301
302                 if (interrupt & flags)
303                         break;
304
305                 if (state != FL_READING)
306                         cond_resched();
307         }
308         /* To get correct interrupt status in timeout case */
309         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
310
311         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
312
313         if (ctrl & ONENAND_CTRL_ERROR) {
314                 /* It maybe occur at initial bad block */
315                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
316                 /* Clear other interrupt bits for preventing ECC error */
317                 interrupt &= ONENAND_INT_MASTER;
318         }
319
320         if (ctrl & ONENAND_CTRL_LOCK) {
321                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error = 0x%04x\n", ctrl);
322                 return -EACCES;
323         }
324
325         if (interrupt & ONENAND_INT_READ) {
326                 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
327                 if (ecc & ONENAND_ECC_2BIT_ALL) {
328                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
329                         return -EBADMSG;
330                 }
331         }
332
333         return 0;
334 }
335
336 /**
337  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
338  * @param mtd           MTD data structure
339  * @param area          BufferRAM area
340  * @return              offset given area
341  *
342  * Return BufferRAM offset given area
343  */
344 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
345 {
346         struct onenand_chip *this = mtd->priv;
347
348         if (ONENAND_CURRENT_BUFFERRAM(this)) {
349                 if (area == ONENAND_DATARAM)
350                         return mtd->oobblock;
351                 if (area == ONENAND_SPARERAM)
352                         return mtd->oobsize;
353         }
354
355         return 0;
356 }
357
358 /**
359  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
360  * @param mtd           MTD data structure
361  * @param area          BufferRAM area
362  * @param buffer        the databuffer to put/get data
363  * @param offset        offset to read from or write to
364  * @param count         number of bytes to read/write
365  *
366  * Read the BufferRAM area
367  */
368 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
369                 unsigned char *buffer, int offset, size_t count)
370 {
371         struct onenand_chip *this = mtd->priv;
372         void __iomem *bufferram;
373
374         bufferram = this->base + area;
375
376         bufferram += onenand_bufferram_offset(mtd, area);
377
378         memcpy(buffer, bufferram + offset, count);
379
380         return 0;
381 }
382
383 /**
384  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
385  * @param mtd           MTD data structure
386  * @param area          BufferRAM area
387  * @param buffer        the databuffer to put/get data
388  * @param offset        offset to read from or write to
389  * @param count         number of bytes to read/write
390  *
391  * Read the BufferRAM area with Sync. Burst Mode
392  */
393 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
394                 unsigned char *buffer, int offset, size_t count)
395 {
396         struct onenand_chip *this = mtd->priv;
397         void __iomem *bufferram;
398
399         bufferram = this->base + area;
400
401         bufferram += onenand_bufferram_offset(mtd, area);
402
403         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
404
405         memcpy(buffer, bufferram + offset, count);
406
407         this->mmcontrol(mtd, 0);
408
409         return 0;
410 }
411
412 /**
413  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
414  * @param mtd           MTD data structure
415  * @param area          BufferRAM area
416  * @param buffer        the databuffer to put/get data
417  * @param offset        offset to read from or write to
418  * @param count         number of bytes to read/write
419  *
420  * Write the BufferRAM area
421  */
422 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
423                 const unsigned char *buffer, int offset, size_t count)
424 {
425         struct onenand_chip *this = mtd->priv;
426         void __iomem *bufferram;
427
428         bufferram = this->base + area;
429
430         bufferram += onenand_bufferram_offset(mtd, area);
431
432         memcpy(bufferram + offset, buffer, count);
433
434         return 0;
435 }
436
437 /**
438  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
439  * @param mtd           MTD data structure
440  * @param addr          address to check
441  * @return              1 if there are valid data, otherwise 0 
442  *
443  * Check bufferram if there is data we required
444  */
445 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
446 {
447         struct onenand_chip *this = mtd->priv;
448         int block, page;
449         int i;
450         
451         block = (int) (addr >> this->erase_shift);
452         page = (int) (addr >> this->page_shift);
453         page &= this->page_mask;
454
455         i = ONENAND_CURRENT_BUFFERRAM(this);
456
457         /* Is there valid data? */
458         if (this->bufferram[i].block == block &&
459             this->bufferram[i].page == page &&
460             this->bufferram[i].valid)
461                 return 1;
462
463         return 0;
464 }
465
466 /**
467  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
468  * @param mtd           MTD data structure
469  * @param addr          address to update
470  * @param valid         valid flag
471  *
472  * Update BufferRAM information
473  */
474 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
475                 int valid)
476 {
477         struct onenand_chip *this = mtd->priv;
478         int block, page;
479         int i;
480         
481         block = (int) (addr >> this->erase_shift);
482         page = (int) (addr >> this->page_shift);
483         page &= this->page_mask;
484
485         /* Invalidate BufferRAM */
486         for (i = 0; i < MAX_BUFFERRAM; i++) {
487                 if (this->bufferram[i].block == block &&
488                     this->bufferram[i].page == page)
489                         this->bufferram[i].valid = 0;
490         }
491
492         /* Update BufferRAM */
493         i = ONENAND_CURRENT_BUFFERRAM(this);
494         this->bufferram[i].block = block;
495         this->bufferram[i].page = page;
496         this->bufferram[i].valid = valid;
497
498         return 0;
499 }
500
501 /**
502  * onenand_get_device - [GENERIC] Get chip for selected access
503  * @param mtd           MTD device structure
504  * @param new_state     the state which is requested
505  *
506  * Get the device and lock it for exclusive access
507  */
508 static void onenand_get_device(struct mtd_info *mtd, int new_state)
509 {
510         struct onenand_chip *this = mtd->priv;
511         DECLARE_WAITQUEUE(wait, current);
512
513         /*
514          * Grab the lock and see if the device is available
515          */
516         while (1) {
517                 spin_lock(&this->chip_lock);
518                 if (this->state == FL_READY) {
519                         this->state = new_state;
520                         spin_unlock(&this->chip_lock);
521                         break;
522                 }
523                 set_current_state(TASK_UNINTERRUPTIBLE);
524                 add_wait_queue(&this->wq, &wait);
525                 spin_unlock(&this->chip_lock);
526                 schedule();
527                 remove_wait_queue(&this->wq, &wait);
528         }
529 }
530
531 /**
532  * onenand_release_device - [GENERIC] release chip
533  * @param mtd           MTD device structure
534  *
535  * Deselect, release chip lock and wake up anyone waiting on the device
536  */
537 static void onenand_release_device(struct mtd_info *mtd)
538 {
539         struct onenand_chip *this = mtd->priv;
540
541         /* Release the chip */
542         spin_lock(&this->chip_lock);
543         this->state = FL_READY;
544         wake_up(&this->wq);
545         spin_unlock(&this->chip_lock);
546 }
547
548 /**
549  * onenand_read_ecc - [MTD Interface] Read data with ECC
550  * @param mtd           MTD device structure
551  * @param from          offset to read from
552  * @param len           number of bytes to read
553  * @param retlen        pointer to variable to store the number of read bytes
554  * @param buf           the databuffer to put data
555  * @param oob_buf       filesystem supplied oob data buffer
556  * @param oobsel        oob selection structure
557  *
558  * OneNAND read with ECC
559  */
560 static int onenand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
561         size_t *retlen, u_char *buf,
562         u_char *oob_buf, struct nand_oobinfo *oobsel)
563 {
564         struct onenand_chip *this = mtd->priv;
565         int read = 0, column;
566         int thislen;
567         int ret = 0;
568
569         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
570
571         /* Do not allow reads past end of device */
572         if ((from + len) > mtd->size) {
573                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_ecc: Attempt read beyond end of device\n");
574                 *retlen = 0;
575                 return -EINVAL;
576         }
577
578         /* Grab the lock and see if the device is available */
579         onenand_get_device(mtd, FL_READING);
580
581         /* TODO handling oob */
582
583         while (read < len) {
584                 thislen = min_t(int, mtd->oobblock, len - read);
585
586                 column = from & (mtd->oobblock - 1);
587                 if (column + thislen > mtd->oobblock)
588                         thislen = mtd->oobblock - column;
589
590                 if (!onenand_check_bufferram(mtd, from)) {
591                         this->command(mtd, ONENAND_CMD_READ, from, mtd->oobblock);
592
593                         ret = this->wait(mtd, FL_READING);
594                         /* First copy data and check return value for ECC handling */
595                         onenand_update_bufferram(mtd, from, 1);
596                 }
597
598                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
599
600                 read += thislen;
601
602                 if (read == len)
603                         break;
604
605                 if (ret) {
606                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_ecc: read failed = %d\n", ret);
607                         goto out;
608                 }
609
610                 from += thislen;
611                 buf += thislen;
612         }
613
614 out:
615         /* Deselect and wake up anyone waiting on the device */
616         onenand_release_device(mtd);
617
618         /*
619          * Return success, if no ECC failures, else -EBADMSG
620          * fs driver will take care of that, because
621          * retlen == desired len and result == -EBADMSG
622          */
623         *retlen = read;
624         return ret;
625 }
626
627 /**
628  * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc
629  * @param mtd           MTD device structure
630  * @param from          offset to read from
631  * @param len           number of bytes to read
632  * @param retlen        pointer to variable to store the number of read bytes
633  * @param buf           the databuffer to put data
634  *
635  * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL
636 */
637 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
638         size_t *retlen, u_char *buf)
639 {
640         return onenand_read_ecc(mtd, from, len, retlen, buf, NULL, NULL);
641 }
642
643 /**
644  * onenand_read_oob - [MTD Interface] OneNAND read out-of-band
645  * @param mtd           MTD device structure
646  * @param from          offset to read from
647  * @param len           number of bytes to read
648  * @param retlen        pointer to variable to store the number of read bytes
649  * @param buf           the databuffer to put data
650  *
651  * OneNAND read out-of-band data from the spare area
652  */
653 static int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
654         size_t *retlen, u_char *buf)
655 {
656         struct onenand_chip *this = mtd->priv;
657         int read = 0, thislen, column;
658         int ret = 0;
659
660         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
661
662         /* Initialize return length value */
663         *retlen = 0;
664
665         /* Do not allow reads past end of device */
666         if (unlikely((from + len) > mtd->size)) {
667                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
668                 return -EINVAL;
669         }
670
671         /* Grab the lock and see if the device is available */
672         onenand_get_device(mtd, FL_READING);
673
674         column = from & (mtd->oobsize - 1);
675
676         while (read < len) {
677                 thislen = mtd->oobsize - column;
678                 thislen = min_t(int, thislen, len);
679
680                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
681
682                 onenand_update_bufferram(mtd, from, 0);
683
684                 ret = this->wait(mtd, FL_READING);
685                 /* First copy data and check return value for ECC handling */
686
687                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
688
689                 read += thislen;
690
691                 if (read == len)
692                         break;
693
694                 if (ret) {
695                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = %d\n", ret);
696                         goto out;
697                 }
698
699                 buf += thislen;
700
701                 /* Read more? */
702                 if (read < len) {
703                         /* Page size */
704                         from += mtd->oobblock;
705                         column = 0;
706                 }
707         }
708
709 out:
710         /* Deselect and wake up anyone waiting on the device */
711         onenand_release_device(mtd);
712
713         *retlen = read;
714         return ret;
715 }
716
717 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
718 /**
719  * onenand_verify_page - [GENERIC] verify the chip contents after a write
720  * @param mtd           MTD device structure
721  * @param buf           the databuffer to verify
722  *
723  * Check DataRAM area directly
724  */
725 static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr)
726 {
727         struct onenand_chip *this = mtd->priv;
728         void __iomem *dataram0, *dataram1;
729         int ret = 0;
730
731         this->command(mtd, ONENAND_CMD_READ, addr, mtd->oobblock);
732
733         ret = this->wait(mtd, FL_READING);
734         if (ret)
735                 return ret;
736
737         onenand_update_bufferram(mtd, addr, 1);
738
739         /* Check, if the two dataram areas are same */
740         dataram0 = this->base + ONENAND_DATARAM;
741         dataram1 = dataram0 + mtd->oobblock;
742
743         if (memcmp(dataram0, dataram1, mtd->oobblock))
744                 return -EBADMSG;
745         
746         return 0;
747 }
748 #else
749 #define onenand_verify_page(...)        (0)
750 #endif
751
752 #define NOTALIGNED(x)   ((x & (mtd->oobblock - 1)) != 0)
753
754 /**
755  * onenand_write_ecc - [MTD Interface] OneNAND write with ECC
756  * @param mtd           MTD device structure
757  * @param to            offset to write to
758  * @param len           number of bytes to write
759  * @param retlen        pointer to variable to store the number of written bytes
760  * @param buf           the data to write
761  * @param eccbuf        filesystem supplied oob data buffer
762  * @param oobsel        oob selection structure
763  *
764  * OneNAND write with ECC
765  */
766 static int onenand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
767         size_t *retlen, const u_char *buf,
768         u_char *eccbuf, struct nand_oobinfo *oobsel)
769 {
770         struct onenand_chip *this = mtd->priv;
771         int written = 0;
772         int ret = 0;
773
774         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
775
776         /* Initialize retlen, in case of early exit */
777         *retlen = 0;
778
779         /* Do not allow writes past end of device */
780         if (unlikely((to + len) > mtd->size)) {
781                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: Attempt write to past end of device\n");
782                 return -EINVAL;
783         }
784
785         /* Reject writes, which are not page aligned */
786         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
787                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: Attempt to write not page aligned data\n");
788                 return -EINVAL;
789         }
790
791         /* Grab the lock and see if the device is available */
792         onenand_get_device(mtd, FL_WRITING);
793
794         /* Loop until all data write */
795         while (written < len) {
796                 int thislen = min_t(int, mtd->oobblock, len - written);
797
798                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock);
799
800                 this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
801                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
802
803                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock);
804
805                 onenand_update_bufferram(mtd, to, 1);
806
807                 ret = this->wait(mtd, FL_WRITING);
808                 if (ret) {
809                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: write filaed %d\n", ret);
810                         goto out;
811                 }
812
813                 written += thislen;
814
815                 /* Only check verify write turn on */
816                 ret = onenand_verify_page(mtd, (u_char *) buf, to);
817                 if (ret) {
818                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: verify failed %d\n", ret);
819                         goto out;
820                 }
821
822                 if (written == len)
823                         break;
824
825                 to += thislen;
826                 buf += thislen;
827         }
828
829 out:
830         /* Deselect and wake up anyone waiting on the device */
831         onenand_release_device(mtd);
832
833         *retlen = written;
834         
835         return ret;
836 }
837
838 /**
839  * onenand_write - [MTD Interface] compability function for onenand_write_ecc
840  * @param mtd           MTD device structure
841  * @param to            offset to write to
842  * @param len           number of bytes to write
843  * @param retlen        pointer to variable to store the number of written bytes
844  * @param buf           the data to write
845  *
846  * This function simply calls onenand_write_ecc
847  * with oob buffer and oobsel = NULL
848  */
849 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
850         size_t *retlen, const u_char *buf)
851 {
852         return onenand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL);
853 }
854
855 /**
856  * onenand_write_oob - [MTD Interface] OneNAND write out-of-band
857  * @param mtd           MTD device structure
858  * @param to            offset to write to
859  * @param len           number of bytes to write
860  * @param retlen        pointer to variable to store the number of written bytes
861  * @param buf           the data to write
862  *
863  * OneNAND write out-of-band
864  */
865 static int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
866         size_t *retlen, const u_char *buf)
867 {
868         struct onenand_chip *this = mtd->priv;
869         int column, status;
870         int written = 0;
871
872         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
873
874         /* Initialize retlen, in case of early exit */
875         *retlen = 0;
876
877         /* Do not allow writes past end of device */
878         if (unlikely((to + len) > mtd->size)) {
879                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
880                 return -EINVAL;
881         }
882
883         /* Grab the lock and see if the device is available */
884         onenand_get_device(mtd, FL_WRITING);
885
886         /* Loop until all data write */
887         while (written < len) {
888                 int thislen = min_t(int, mtd->oobsize, len - written);
889
890                 column = to & (mtd->oobsize - 1);
891
892                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
893
894                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
895                 this->write_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
896
897                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
898
899                 onenand_update_bufferram(mtd, to, 0);
900
901                 status = this->wait(mtd, FL_WRITING);
902                 if (status)
903                         goto out;
904
905                 written += thislen;
906
907                 if (written == len)
908                         break;
909
910                 to += thislen;
911                 buf += thislen;
912         }
913
914 out:
915         /* Deselect and wake up anyone waiting on the device */
916         onenand_release_device(mtd);
917
918         *retlen = written;
919         
920         return 0;
921 }
922
923 /**
924  * onenand_writev_ecc - [MTD Interface] write with iovec with ecc
925  * @param mtd           MTD device structure
926  * @param vecs          the iovectors to write
927  * @param count         number of vectors
928  * @param to            offset to write to
929  * @param retlen        pointer to variable to store the number of written bytes
930  * @param eccbuf        filesystem supplied oob data buffer
931  * @param oobsel        oob selection structure
932  *
933  * OneNAND write with iovec with ecc
934  */
935 static int onenand_writev_ecc(struct mtd_info *mtd, const struct kvec *vecs,
936         unsigned long count, loff_t to, size_t *retlen,
937         u_char *eccbuf, struct nand_oobinfo *oobsel)
938 {
939         struct onenand_chip *this = mtd->priv;
940         unsigned char buffer[MAX_ONENAND_PAGESIZE], *pbuf;
941         size_t total_len, len;
942         int i, written = 0;
943         int ret = 0;
944
945         /* Preset written len for early exit */
946         *retlen = 0;
947
948         /* Calculate total length of data */
949         total_len = 0;
950         for (i = 0; i < count; i++)
951                 total_len += vecs[i].iov_len;
952
953         DEBUG(MTD_DEBUG_LEVEL3, "onenand_writev_ecc: to = 0x%08x, len = %i, count = %ld\n", (unsigned int) to, (unsigned int) total_len, count);
954
955         /* Do not allow write past end of the device */
956         if (unlikely((to + total_len) > mtd->size)) {
957                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: Attempted write past end of device\n");
958                 return -EINVAL;
959         }
960
961         /* Reject writes, which are not page aligned */
962         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(total_len))) {
963                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: Attempt to write not page aligned data\n");
964                 return -EINVAL;
965         }
966
967         /* Grab the lock and see if the device is available */
968         onenand_get_device(mtd, FL_WRITING);
969
970         /* TODO handling oob */
971         
972         /* Loop until all keve's data has been written */
973         len = 0;
974         while (count) {
975                 pbuf = buffer;
976                 /* 
977                  * If the given tuple is >= pagesize then
978                  * write it out from the iov
979                  */
980                 if ((vecs->iov_len - len) >= mtd->oobblock) {
981                         pbuf = vecs->iov_base + len;
982
983                         len += mtd->oobblock;
984
985                         /* Check, if we have to switch to the next tuple */
986                         if (len >= (int) vecs->iov_len) {
987                                 vecs++;
988                                 len = 0;
989                                 count--;
990                         }
991                 } else {
992                         int cnt = 0, thislen;
993                         while (cnt < mtd->oobblock) {
994                                 thislen = min_t(int, mtd->oobblock - cnt, vecs->iov_len - len);
995                                 memcpy(buffer + cnt, vecs->iov_base + len, thislen);
996                                 cnt += thislen;
997                                 len += thislen;
998
999                                 /* Check, if we have to switch to the next tuple */
1000                                 if (len >= (int) vecs->iov_len) {
1001                                         vecs++;
1002                                         len = 0;
1003                                         count--;
1004                                 }
1005                         }
1006                 }
1007
1008                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock);
1009
1010                 this->write_bufferram(mtd, ONENAND_DATARAM, pbuf, 0, mtd->oobblock);
1011                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1012
1013                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock);
1014
1015                 onenand_update_bufferram(mtd, to, 1);
1016
1017                 ret = this->wait(mtd, FL_WRITING);
1018                 if (ret) {
1019                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: write failed %d\n", ret);
1020                         goto out;
1021                 }
1022
1023
1024                 /* Only check verify write turn on */
1025                 ret = onenand_verify_page(mtd, (u_char *) pbuf, to);
1026                 if (ret) {
1027                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: verify failed %d\n", ret);
1028                         goto out;
1029                 }
1030
1031                 written += mtd->oobblock;
1032
1033                 to += mtd->oobblock;
1034         }
1035
1036 out:
1037         /* Deselect and wakt up anyone waiting on the device */
1038         onenand_release_device(mtd);
1039
1040         *retlen = written;
1041
1042         return 0;
1043 }
1044
1045 /**
1046  * onenand_writev - [MTD Interface] compabilty function for onenand_writev_ecc
1047  * @param mtd           MTD device structure
1048  * @param vecs          the iovectors to write
1049  * @param count         number of vectors
1050  * @param to            offset to write to
1051  * @param retlen        pointer to variable to store the number of written bytes
1052  *
1053  * OneNAND write with kvec. This just calls the ecc function
1054  */
1055 static int onenand_writev(struct mtd_info *mtd, const struct kvec *vecs,
1056         unsigned long count, loff_t to, size_t *retlen)
1057 {
1058         return onenand_writev_ecc(mtd, vecs, count, to, retlen, NULL, NULL);
1059 }
1060
1061 /**
1062  * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1063  * @param mtd           MTD device structure
1064  * @param ofs           offset from device start
1065  * @param getchip       0, if the chip is already selected
1066  * @param allowbbt      1, if its allowed to access the bbt area
1067  *
1068  * Check, if the block is bad. Either by reading the bad block table or
1069  * calling of the scan function.
1070  */
1071 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1072 {
1073         struct onenand_chip *this = mtd->priv;
1074         struct bbm_info *bbm = this->bbm;
1075
1076         /* Return info from the table */
1077         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1078 }
1079
1080 /**
1081  * onenand_erase - [MTD Interface] erase block(s)
1082  * @param mtd           MTD device structure
1083  * @param instr         erase instruction
1084  *
1085  * Erase one ore more blocks
1086  */
1087 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1088 {
1089         struct onenand_chip *this = mtd->priv;
1090         unsigned int block_size;
1091         loff_t addr;
1092         int len;
1093         int ret = 0;
1094
1095         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1096
1097         block_size = (1 << this->erase_shift);
1098
1099         /* Start address must align on block boundary */
1100         if (unlikely(instr->addr & (block_size - 1))) {
1101                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1102                 return -EINVAL;
1103         }
1104
1105         /* Length must align on block boundary */
1106         if (unlikely(instr->len & (block_size - 1))) {
1107                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1108                 return -EINVAL;
1109         }
1110
1111         /* Do not allow erase past end of device */
1112         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1113                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1114                 return -EINVAL;
1115         }
1116
1117         instr->fail_addr = 0xffffffff;
1118
1119         /* Grab the lock and see if the device is available */
1120         onenand_get_device(mtd, FL_ERASING);
1121
1122         /* Loop throught the pages */
1123         len = instr->len;
1124         addr = instr->addr;
1125
1126         instr->state = MTD_ERASING;
1127
1128         while (len) {
1129
1130                 /* Check if we have a bad block, we do not erase bad blocks */
1131                 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1132                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1133                         instr->state = MTD_ERASE_FAILED;
1134                         goto erase_exit;
1135                 }
1136
1137                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1138
1139                 ret = this->wait(mtd, FL_ERASING);
1140                 /* Check, if it is write protected */
1141                 if (ret) {
1142                         if (ret == -EPERM)
1143                                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Device is write protected!!!\n");
1144                         else
1145                                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1146                         instr->state = MTD_ERASE_FAILED;
1147                         instr->fail_addr = addr;
1148                         goto erase_exit;
1149                 }
1150
1151                 len -= block_size;
1152                 addr += block_size;
1153         }
1154
1155         instr->state = MTD_ERASE_DONE;
1156
1157 erase_exit:
1158
1159         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1160         /* Do call back function */
1161         if (!ret)
1162                 mtd_erase_callback(instr);
1163
1164         /* Deselect and wake up anyone waiting on the device */
1165         onenand_release_device(mtd);
1166
1167         return ret;
1168 }
1169
1170 /**
1171  * onenand_sync - [MTD Interface] sync
1172  * @param mtd           MTD device structure
1173  *
1174  * Sync is actually a wait for chip ready function
1175  */
1176 static void onenand_sync(struct mtd_info *mtd)
1177 {
1178         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1179
1180         /* Grab the lock and see if the device is available */
1181         onenand_get_device(mtd, FL_SYNCING);
1182
1183         /* Release it and go back */
1184         onenand_release_device(mtd);
1185 }
1186
1187
1188 /**
1189  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1190  * @param mtd           MTD device structure
1191  * @param ofs           offset relative to mtd start
1192  *
1193  * Check whether the block is bad
1194  */
1195 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1196 {
1197         /* Check for invalid offset */
1198         if (ofs > mtd->size)
1199                 return -EINVAL;
1200
1201         return onenand_block_checkbad(mtd, ofs, 1, 0);
1202 }
1203
1204 /**
1205  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1206  * @param mtd           MTD device structure
1207  * @param ofs           offset from device start
1208  *
1209  * This is the default implementation, which can be overridden by
1210  * a hardware specific driver.
1211  */
1212 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1213 {
1214         struct onenand_chip *this = mtd->priv;
1215         struct bbm_info *bbm = this->bbm;
1216         u_char buf[2] = {0, 0};
1217         size_t retlen;
1218         int block;
1219
1220         /* Get block number */
1221         block = ((int) ofs) >> bbm->bbt_erase_shift;
1222         if (bbm->bbt)
1223                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1224
1225         /* We write two bytes, so we dont have to mess with 16 bit access */
1226         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1227         return mtd->write_oob(mtd, ofs , 2, &retlen, buf);
1228 }
1229
1230 /**
1231  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1232  * @param mtd           MTD device structure
1233  * @param ofs           offset relative to mtd start
1234  *
1235  * Mark the block as bad
1236  */
1237 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1238 {
1239         struct onenand_chip *this = mtd->priv;
1240         int ret;
1241
1242         ret = onenand_block_isbad(mtd, ofs);
1243         if (ret) {
1244                 /* If it was bad already, return success and do nothing */
1245                 if (ret > 0)
1246                         return 0;
1247                 return ret;
1248         }
1249
1250         return this->block_markbad(mtd, ofs);
1251 }
1252
1253 /**
1254  * onenand_unlock - [MTD Interface] Unlock block(s)
1255  * @param mtd           MTD device structure
1256  * @param ofs           offset relative to mtd start
1257  * @param len           number of bytes to unlock
1258  *
1259  * Unlock one or more blocks
1260  */
1261 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1262 {
1263         struct onenand_chip *this = mtd->priv;
1264         int start, end, block, value, status;
1265
1266         start = ofs >> this->erase_shift;
1267         end = len >> this->erase_shift;
1268
1269         /* Continuous lock scheme */
1270         if (this->options & ONENAND_CONT_LOCK) {
1271                 /* Set start block address */
1272                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1273                 /* Set end block address */
1274                 this->write_word(end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1275                 /* Write unlock command */
1276                 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1277
1278                 /* There's no return value */
1279                 this->wait(mtd, FL_UNLOCKING);
1280
1281                 /* Sanity check */
1282                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1283                     & ONENAND_CTRL_ONGO)
1284                         continue;
1285
1286                 /* Check lock status */
1287                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1288                 if (!(status & ONENAND_WP_US))
1289                         printk(KERN_ERR "wp status = 0x%x\n", status);
1290
1291                 return 0;
1292         }
1293
1294         /* Block lock scheme */
1295         for (block = start; block < end; block++) {
1296                 /* Set start block address */
1297                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1298                 /* Write unlock command */
1299                 this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0);
1300
1301                 /* There's no return value */
1302                 this->wait(mtd, FL_UNLOCKING);
1303
1304                 /* Sanity check */
1305                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1306                     & ONENAND_CTRL_ONGO)
1307                         continue;
1308
1309                 /* Set block address for read block status */
1310                 value = onenand_block_address(this->device_id, block);
1311                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1312
1313                 /* Check lock status */
1314                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1315                 if (!(status & ONENAND_WP_US))
1316                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1317         }
1318         
1319         return 0;
1320 }
1321
1322 /**
1323  * onenand_print_device_info - Print device ID
1324  * @param device        device ID
1325  *
1326  * Print device ID
1327  */
1328 static void onenand_print_device_info(int device)
1329 {
1330         int vcc, demuxed, ddp, density;
1331
1332         vcc = device & ONENAND_DEVICE_VCC_MASK;
1333         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1334         ddp = device & ONENAND_DEVICE_IS_DDP;
1335         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1336         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1337                 demuxed ? "" : "Muxed ",
1338                 ddp ? "(DDP)" : "",
1339                 (16 << density),
1340                 vcc ? "2.65/3.3" : "1.8",
1341                 device);
1342 }
1343
1344 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1345         {ONENAND_MFR_SAMSUNG, "Samsung"},
1346         {ONENAND_MFR_UNKNOWN, "Unknown"}
1347 };
1348
1349 /**
1350  * onenand_check_maf - Check manufacturer ID
1351  * @param manuf         manufacturer ID
1352  *
1353  * Check manufacturer ID
1354  */
1355 static int onenand_check_maf(int manuf)
1356 {
1357         int i;
1358
1359         for (i = 0; onenand_manuf_ids[i].id; i++) {
1360                 if (manuf == onenand_manuf_ids[i].id)
1361                         break;
1362         }
1363
1364         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n",
1365                 onenand_manuf_ids[i].name, manuf);
1366
1367         return (i != ONENAND_MFR_UNKNOWN);
1368 }
1369
1370 /**
1371  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1372  * @param mtd           MTD device structure
1373  *
1374  * OneNAND detection method:
1375  *   Compare the the values from command with ones from register
1376  */
1377 static int onenand_probe(struct mtd_info *mtd)
1378 {
1379         struct onenand_chip *this = mtd->priv;
1380         int bram_maf_id, bram_dev_id, maf_id, dev_id;
1381         int version_id;
1382         int density;
1383
1384         /* Send the command for reading device ID from BootRAM */
1385         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1386
1387         /* Read manufacturer and device IDs from BootRAM */
1388         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1389         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1390
1391         /* Check manufacturer ID */
1392         if (onenand_check_maf(bram_maf_id))
1393                 return -ENXIO;
1394
1395         /* Reset OneNAND to read default register values */
1396         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1397
1398         /* Read manufacturer and device IDs from Register */
1399         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1400         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1401
1402         /* Check OneNAND device */
1403         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1404                 return -ENXIO;
1405
1406         /* Flash device information */
1407         onenand_print_device_info(dev_id);
1408         this->device_id = dev_id;
1409
1410         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1411         this->chipsize = (16 << density) << 20;
1412
1413         /* OneNAND page size & block size */
1414         /* The data buffer size is equal to page size */
1415         mtd->oobblock = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1416         mtd->oobsize = mtd->oobblock >> 5;
1417         /* Pagers per block is always 64 in OneNAND */
1418         mtd->erasesize = mtd->oobblock << 6;
1419
1420         this->erase_shift = ffs(mtd->erasesize) - 1;
1421         this->page_shift = ffs(mtd->oobblock) - 1;
1422         this->ppb_shift = (this->erase_shift - this->page_shift);
1423         this->page_mask = (mtd->erasesize / mtd->oobblock) - 1;
1424
1425         /* REVIST: Multichip handling */
1426
1427         mtd->size = this->chipsize;
1428
1429         /* Version ID */
1430         version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1431         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id);
1432
1433         /* Lock scheme */
1434         if (density <= ONENAND_DEVICE_DENSITY_512Mb &&
1435             !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) {
1436                 printk(KERN_INFO "Lock scheme is Continues Lock\n");
1437                 this->options |= ONENAND_CONT_LOCK;
1438         }
1439         
1440         return 0;
1441 }
1442
1443
1444 /**
1445  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1446  * @param mtd           MTD device structure
1447  * @param maxchips      Number of chips to scan for
1448  *
1449  * This fills out all the not initialized function pointers
1450  * with the defaults.
1451  * The flash ID is read and the mtd/chip structures are
1452  * filled with the appropriate values.
1453  */
1454 int onenand_scan(struct mtd_info *mtd, int maxchips)
1455 {
1456         struct onenand_chip *this = mtd->priv;
1457
1458         if (!this->read_word)
1459                 this->read_word = onenand_readw;
1460         if (!this->write_word)
1461                 this->write_word = onenand_writew;
1462
1463         if (!this->command)
1464                 this->command = onenand_command;
1465         if (!this->wait)
1466                 this->wait = onenand_wait;
1467
1468         if (!this->read_bufferram)
1469                 this->read_bufferram = onenand_read_bufferram;
1470         if (!this->write_bufferram)
1471                 this->write_bufferram = onenand_write_bufferram;
1472
1473         if (!this->block_markbad)
1474                 this->block_markbad = onenand_default_block_markbad;
1475         if (!this->scan_bbt)
1476                 this->scan_bbt = onenand_default_bbt;
1477
1478         if (onenand_probe(mtd))
1479                 return -ENXIO;
1480
1481         /* Set Sync. Burst Read after probing */
1482         if (this->mmcontrol) {
1483                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
1484                 this->read_bufferram = onenand_sync_read_bufferram;
1485         }
1486
1487         this->state = FL_READY;
1488         init_waitqueue_head(&this->wq);
1489         spin_lock_init(&this->chip_lock);
1490
1491         switch (mtd->oobsize) {
1492         case 64:
1493                 this->autooob = &onenand_oob_64;
1494                 break;
1495
1496         case 32:
1497                 this->autooob = &onenand_oob_32;
1498                 break;
1499
1500         default:
1501                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
1502                         mtd->oobsize);
1503                 /* To prevent kernel oops */
1504                 this->autooob = &onenand_oob_32;
1505                 break;
1506         }
1507
1508         memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo));
1509         
1510         /* Fill in remaining MTD driver data */
1511         mtd->type = MTD_NANDFLASH;
1512         mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC;
1513         mtd->ecctype = MTD_ECC_SW;
1514         mtd->erase = onenand_erase;
1515         mtd->point = NULL;
1516         mtd->unpoint = NULL;
1517         mtd->read = onenand_read;
1518         mtd->write = onenand_write;
1519         mtd->read_ecc = onenand_read_ecc;
1520         mtd->write_ecc = onenand_write_ecc;
1521         mtd->read_oob = onenand_read_oob;
1522         mtd->write_oob = onenand_write_oob;
1523         mtd->readv = NULL;
1524         mtd->readv_ecc = NULL;
1525         mtd->writev = onenand_writev;
1526         mtd->writev_ecc = onenand_writev_ecc;
1527         mtd->sync = onenand_sync;
1528         mtd->lock = NULL;
1529         mtd->unlock = onenand_unlock;
1530         mtd->suspend = NULL;
1531         mtd->resume = NULL;
1532         mtd->block_isbad = onenand_block_isbad;
1533         mtd->block_markbad = onenand_block_markbad;
1534         mtd->owner = THIS_MODULE;
1535
1536         /* Unlock whole block */
1537         mtd->unlock(mtd, 0x0, this->chipsize);
1538
1539         return this->scan_bbt(mtd);
1540 }
1541
1542 /**
1543  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
1544  * @param mtd           MTD device structure
1545  */
1546 void onenand_release(struct mtd_info *mtd)
1547 {
1548 #ifdef CONFIG_MTD_PARTITIONS
1549         /* Deregister partitions */
1550         del_mtd_partitions (mtd);
1551 #endif
1552         /* Deregister the device */
1553         del_mtd_device (mtd);
1554 }
1555
1556 EXPORT_SYMBOL_GPL(onenand_scan);
1557 EXPORT_SYMBOL_GPL(onenand_release);
1558
1559 MODULE_LICENSE("GPL");
1560 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
1561 MODULE_DESCRIPTION("Generic OneNAND flash driver code");