Merge tag 'for-linus-20130301' of git://git.infradead.org/linux-mtd
[linux-3.10.git] / drivers / mtd / nand / nandsim.c
1 /*
2  * NAND flash simulator.
3  *
4  * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org>
5  *
6  * Copyright (C) 2004 Nokia Corporation
7  *
8  * Note: NS means "NAND Simulator".
9  * Note: Input means input TO flash chip, output means output FROM chip.
10  *
11  * This program is free software; you can redistribute it and/or modify it
12  * under the terms of the GNU General Public License as published by the
13  * Free Software Foundation; either version 2, or (at your option) any later
14  * version.
15  *
16  * This program is distributed in the hope that it will be useful, but
17  * WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
19  * Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
24  */
25
26 #include <linux/init.h>
27 #include <linux/types.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/vmalloc.h>
31 #include <linux/math64.h>
32 #include <linux/slab.h>
33 #include <linux/errno.h>
34 #include <linux/string.h>
35 #include <linux/mtd/mtd.h>
36 #include <linux/mtd/nand.h>
37 #include <linux/mtd/nand_bch.h>
38 #include <linux/mtd/partitions.h>
39 #include <linux/delay.h>
40 #include <linux/list.h>
41 #include <linux/random.h>
42 #include <linux/sched.h>
43 #include <linux/fs.h>
44 #include <linux/pagemap.h>
45 #include <linux/seq_file.h>
46 #include <linux/debugfs.h>
47
48 /* Default simulator parameters values */
49 #if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE)  || \
50     !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \
51     !defined(CONFIG_NANDSIM_THIRD_ID_BYTE)  || \
52     !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE)
53 #define CONFIG_NANDSIM_FIRST_ID_BYTE  0x98
54 #define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39
55 #define CONFIG_NANDSIM_THIRD_ID_BYTE  0xFF /* No byte */
56 #define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */
57 #endif
58
59 #ifndef CONFIG_NANDSIM_ACCESS_DELAY
60 #define CONFIG_NANDSIM_ACCESS_DELAY 25
61 #endif
62 #ifndef CONFIG_NANDSIM_PROGRAMM_DELAY
63 #define CONFIG_NANDSIM_PROGRAMM_DELAY 200
64 #endif
65 #ifndef CONFIG_NANDSIM_ERASE_DELAY
66 #define CONFIG_NANDSIM_ERASE_DELAY 2
67 #endif
68 #ifndef CONFIG_NANDSIM_OUTPUT_CYCLE
69 #define CONFIG_NANDSIM_OUTPUT_CYCLE 40
70 #endif
71 #ifndef CONFIG_NANDSIM_INPUT_CYCLE
72 #define CONFIG_NANDSIM_INPUT_CYCLE  50
73 #endif
74 #ifndef CONFIG_NANDSIM_BUS_WIDTH
75 #define CONFIG_NANDSIM_BUS_WIDTH  8
76 #endif
77 #ifndef CONFIG_NANDSIM_DO_DELAYS
78 #define CONFIG_NANDSIM_DO_DELAYS  0
79 #endif
80 #ifndef CONFIG_NANDSIM_LOG
81 #define CONFIG_NANDSIM_LOG        0
82 #endif
83 #ifndef CONFIG_NANDSIM_DBG
84 #define CONFIG_NANDSIM_DBG        0
85 #endif
86 #ifndef CONFIG_NANDSIM_MAX_PARTS
87 #define CONFIG_NANDSIM_MAX_PARTS  32
88 #endif
89
90 static uint first_id_byte  = CONFIG_NANDSIM_FIRST_ID_BYTE;
91 static uint second_id_byte = CONFIG_NANDSIM_SECOND_ID_BYTE;
92 static uint third_id_byte  = CONFIG_NANDSIM_THIRD_ID_BYTE;
93 static uint fourth_id_byte = CONFIG_NANDSIM_FOURTH_ID_BYTE;
94 static uint access_delay   = CONFIG_NANDSIM_ACCESS_DELAY;
95 static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY;
96 static uint erase_delay    = CONFIG_NANDSIM_ERASE_DELAY;
97 static uint output_cycle   = CONFIG_NANDSIM_OUTPUT_CYCLE;
98 static uint input_cycle    = CONFIG_NANDSIM_INPUT_CYCLE;
99 static uint bus_width      = CONFIG_NANDSIM_BUS_WIDTH;
100 static uint do_delays      = CONFIG_NANDSIM_DO_DELAYS;
101 static uint log            = CONFIG_NANDSIM_LOG;
102 static uint dbg            = CONFIG_NANDSIM_DBG;
103 static unsigned long parts[CONFIG_NANDSIM_MAX_PARTS];
104 static unsigned int parts_num;
105 static char *badblocks = NULL;
106 static char *weakblocks = NULL;
107 static char *weakpages = NULL;
108 static unsigned int bitflips = 0;
109 static char *gravepages = NULL;
110 static unsigned int overridesize = 0;
111 static char *cache_file = NULL;
112 static unsigned int bbt;
113 static unsigned int bch;
114
115 module_param(first_id_byte,  uint, 0400);
116 module_param(second_id_byte, uint, 0400);
117 module_param(third_id_byte,  uint, 0400);
118 module_param(fourth_id_byte, uint, 0400);
119 module_param(access_delay,   uint, 0400);
120 module_param(programm_delay, uint, 0400);
121 module_param(erase_delay,    uint, 0400);
122 module_param(output_cycle,   uint, 0400);
123 module_param(input_cycle,    uint, 0400);
124 module_param(bus_width,      uint, 0400);
125 module_param(do_delays,      uint, 0400);
126 module_param(log,            uint, 0400);
127 module_param(dbg,            uint, 0400);
128 module_param_array(parts, ulong, &parts_num, 0400);
129 module_param(badblocks,      charp, 0400);
130 module_param(weakblocks,     charp, 0400);
131 module_param(weakpages,      charp, 0400);
132 module_param(bitflips,       uint, 0400);
133 module_param(gravepages,     charp, 0400);
134 module_param(overridesize,   uint, 0400);
135 module_param(cache_file,     charp, 0400);
136 module_param(bbt,            uint, 0400);
137 module_param(bch,            uint, 0400);
138
139 MODULE_PARM_DESC(first_id_byte,  "The first byte returned by NAND Flash 'read ID' command (manufacturer ID)");
140 MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID)");
141 MODULE_PARM_DESC(third_id_byte,  "The third byte returned by NAND Flash 'read ID' command");
142 MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command");
143 MODULE_PARM_DESC(access_delay,   "Initial page access delay (microseconds)");
144 MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds");
145 MODULE_PARM_DESC(erase_delay,    "Sector erase delay (milliseconds)");
146 MODULE_PARM_DESC(output_cycle,   "Word output (from flash) time (nanoseconds)");
147 MODULE_PARM_DESC(input_cycle,    "Word input (to flash) time (nanoseconds)");
148 MODULE_PARM_DESC(bus_width,      "Chip's bus width (8- or 16-bit)");
149 MODULE_PARM_DESC(do_delays,      "Simulate NAND delays using busy-waits if not zero");
150 MODULE_PARM_DESC(log,            "Perform logging if not zero");
151 MODULE_PARM_DESC(dbg,            "Output debug information if not zero");
152 MODULE_PARM_DESC(parts,          "Partition sizes (in erase blocks) separated by commas");
153 /* Page and erase block positions for the following parameters are independent of any partitions */
154 MODULE_PARM_DESC(badblocks,      "Erase blocks that are initially marked bad, separated by commas");
155 MODULE_PARM_DESC(weakblocks,     "Weak erase blocks [: remaining erase cycles (defaults to 3)]"
156                                  " separated by commas e.g. 113:2 means eb 113"
157                                  " can be erased only twice before failing");
158 MODULE_PARM_DESC(weakpages,      "Weak pages [: maximum writes (defaults to 3)]"
159                                  " separated by commas e.g. 1401:2 means page 1401"
160                                  " can be written only twice before failing");
161 MODULE_PARM_DESC(bitflips,       "Maximum number of random bit flips per page (zero by default)");
162 MODULE_PARM_DESC(gravepages,     "Pages that lose data [: maximum reads (defaults to 3)]"
163                                  " separated by commas e.g. 1401:2 means page 1401"
164                                  " can be read only twice before failing");
165 MODULE_PARM_DESC(overridesize,   "Specifies the NAND Flash size overriding the ID bytes. "
166                                  "The size is specified in erase blocks and as the exponent of a power of two"
167                                  " e.g. 5 means a size of 32 erase blocks");
168 MODULE_PARM_DESC(cache_file,     "File to use to cache nand pages instead of memory");
169 MODULE_PARM_DESC(bbt,            "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in data area");
170 MODULE_PARM_DESC(bch,            "Enable BCH ecc and set how many bits should "
171                                  "be correctable in 512-byte blocks");
172
173 /* The largest possible page size */
174 #define NS_LARGEST_PAGE_SIZE    4096
175
176 /* The prefix for simulator output */
177 #define NS_OUTPUT_PREFIX "[nandsim]"
178
179 /* Simulator's output macros (logging, debugging, warning, error) */
180 #define NS_LOG(args...) \
181         do { if (log) printk(KERN_DEBUG NS_OUTPUT_PREFIX " log: " args); } while(0)
182 #define NS_DBG(args...) \
183         do { if (dbg) printk(KERN_DEBUG NS_OUTPUT_PREFIX " debug: " args); } while(0)
184 #define NS_WARN(args...) \
185         do { printk(KERN_WARNING NS_OUTPUT_PREFIX " warning: " args); } while(0)
186 #define NS_ERR(args...) \
187         do { printk(KERN_ERR NS_OUTPUT_PREFIX " error: " args); } while(0)
188 #define NS_INFO(args...) \
189         do { printk(KERN_INFO NS_OUTPUT_PREFIX " " args); } while(0)
190
191 /* Busy-wait delay macros (microseconds, milliseconds) */
192 #define NS_UDELAY(us) \
193         do { if (do_delays) udelay(us); } while(0)
194 #define NS_MDELAY(us) \
195         do { if (do_delays) mdelay(us); } while(0)
196
197 /* Is the nandsim structure initialized ? */
198 #define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0)
199
200 /* Good operation completion status */
201 #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
202
203 /* Operation failed completion status */
204 #define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns))
205
206 /* Calculate the page offset in flash RAM image by (row, column) address */
207 #define NS_RAW_OFFSET(ns) \
208         (((ns)->regs.row << (ns)->geom.pgshift) + ((ns)->regs.row * (ns)->geom.oobsz) + (ns)->regs.column)
209
210 /* Calculate the OOB offset in flash RAM image by (row, column) address */
211 #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
212
213 /* After a command is input, the simulator goes to one of the following states */
214 #define STATE_CMD_READ0        0x00000001 /* read data from the beginning of page */
215 #define STATE_CMD_READ1        0x00000002 /* read data from the second half of page */
216 #define STATE_CMD_READSTART    0x00000003 /* read data second command (large page devices) */
217 #define STATE_CMD_PAGEPROG     0x00000004 /* start page program */
218 #define STATE_CMD_READOOB      0x00000005 /* read OOB area */
219 #define STATE_CMD_ERASE1       0x00000006 /* sector erase first command */
220 #define STATE_CMD_STATUS       0x00000007 /* read status */
221 #define STATE_CMD_STATUS_M     0x00000008 /* read multi-plane status (isn't implemented) */
222 #define STATE_CMD_SEQIN        0x00000009 /* sequential data input */
223 #define STATE_CMD_READID       0x0000000A /* read ID */
224 #define STATE_CMD_ERASE2       0x0000000B /* sector erase second command */
225 #define STATE_CMD_RESET        0x0000000C /* reset */
226 #define STATE_CMD_RNDOUT       0x0000000D /* random output command */
227 #define STATE_CMD_RNDOUTSTART  0x0000000E /* random output start command */
228 #define STATE_CMD_MASK         0x0000000F /* command states mask */
229
230 /* After an address is input, the simulator goes to one of these states */
231 #define STATE_ADDR_PAGE        0x00000010 /* full (row, column) address is accepted */
232 #define STATE_ADDR_SEC         0x00000020 /* sector address was accepted */
233 #define STATE_ADDR_COLUMN      0x00000030 /* column address was accepted */
234 #define STATE_ADDR_ZERO        0x00000040 /* one byte zero address was accepted */
235 #define STATE_ADDR_MASK        0x00000070 /* address states mask */
236
237 /* During data input/output the simulator is in these states */
238 #define STATE_DATAIN           0x00000100 /* waiting for data input */
239 #define STATE_DATAIN_MASK      0x00000100 /* data input states mask */
240
241 #define STATE_DATAOUT          0x00001000 /* waiting for page data output */
242 #define STATE_DATAOUT_ID       0x00002000 /* waiting for ID bytes output */
243 #define STATE_DATAOUT_STATUS   0x00003000 /* waiting for status output */
244 #define STATE_DATAOUT_STATUS_M 0x00004000 /* waiting for multi-plane status output */
245 #define STATE_DATAOUT_MASK     0x00007000 /* data output states mask */
246
247 /* Previous operation is done, ready to accept new requests */
248 #define STATE_READY            0x00000000
249
250 /* This state is used to mark that the next state isn't known yet */
251 #define STATE_UNKNOWN          0x10000000
252
253 /* Simulator's actions bit masks */
254 #define ACTION_CPY       0x00100000 /* copy page/OOB to the internal buffer */
255 #define ACTION_PRGPAGE   0x00200000 /* program the internal buffer to flash */
256 #define ACTION_SECERASE  0x00300000 /* erase sector */
257 #define ACTION_ZEROOFF   0x00400000 /* don't add any offset to address */
258 #define ACTION_HALFOFF   0x00500000 /* add to address half of page */
259 #define ACTION_OOBOFF    0x00600000 /* add to address OOB offset */
260 #define ACTION_MASK      0x00700000 /* action mask */
261
262 #define NS_OPER_NUM      13 /* Number of operations supported by the simulator */
263 #define NS_OPER_STATES   6  /* Maximum number of states in operation */
264
265 #define OPT_ANY          0xFFFFFFFF /* any chip supports this operation */
266 #define OPT_PAGE256      0x00000001 /* 256-byte  page chips */
267 #define OPT_PAGE512      0x00000002 /* 512-byte  page chips */
268 #define OPT_PAGE2048     0x00000008 /* 2048-byte page chips */
269 #define OPT_SMARTMEDIA   0x00000010 /* SmartMedia technology chips */
270 #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
271 #define OPT_PAGE4096     0x00000080 /* 4096-byte page chips */
272 #define OPT_LARGEPAGE    (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */
273 #define OPT_SMALLPAGE    (OPT_PAGE256  | OPT_PAGE512)  /* 256 and 512-byte page chips */
274
275 /* Remove action bits from state */
276 #define NS_STATE(x) ((x) & ~ACTION_MASK)
277
278 /*
279  * Maximum previous states which need to be saved. Currently saving is
280  * only needed for page program operation with preceded read command
281  * (which is only valid for 512-byte pages).
282  */
283 #define NS_MAX_PREVSTATES 1
284
285 /* Maximum page cache pages needed to read or write a NAND page to the cache_file */
286 #define NS_MAX_HELD_PAGES 16
287
288 struct nandsim_debug_info {
289         struct dentry *dfs_root;
290         struct dentry *dfs_wear_report;
291 };
292
293 /*
294  * A union to represent flash memory contents and flash buffer.
295  */
296 union ns_mem {
297         u_char *byte;    /* for byte access */
298         uint16_t *word;  /* for 16-bit word access */
299 };
300
301 /*
302  * The structure which describes all the internal simulator data.
303  */
304 struct nandsim {
305         struct mtd_partition partitions[CONFIG_NANDSIM_MAX_PARTS];
306         unsigned int nbparts;
307
308         uint busw;              /* flash chip bus width (8 or 16) */
309         u_char ids[4];          /* chip's ID bytes */
310         uint32_t options;       /* chip's characteristic bits */
311         uint32_t state;         /* current chip state */
312         uint32_t nxstate;       /* next expected state */
313
314         uint32_t *op;           /* current operation, NULL operations isn't known yet  */
315         uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
316         uint16_t npstates;      /* number of previous states saved */
317         uint16_t stateidx;      /* current state index */
318
319         /* The simulated NAND flash pages array */
320         union ns_mem *pages;
321
322         /* Slab allocator for nand pages */
323         struct kmem_cache *nand_pages_slab;
324
325         /* Internal buffer of page + OOB size bytes */
326         union ns_mem buf;
327
328         /* NAND flash "geometry" */
329         struct {
330                 uint64_t totsz;     /* total flash size, bytes */
331                 uint32_t secsz;     /* flash sector (erase block) size, bytes */
332                 uint pgsz;          /* NAND flash page size, bytes */
333                 uint oobsz;         /* page OOB area size, bytes */
334                 uint64_t totszoob;  /* total flash size including OOB, bytes */
335                 uint pgszoob;       /* page size including OOB , bytes*/
336                 uint secszoob;      /* sector size including OOB, bytes */
337                 uint pgnum;         /* total number of pages */
338                 uint pgsec;         /* number of pages per sector */
339                 uint secshift;      /* bits number in sector size */
340                 uint pgshift;       /* bits number in page size */
341                 uint oobshift;      /* bits number in OOB size */
342                 uint pgaddrbytes;   /* bytes per page address */
343                 uint secaddrbytes;  /* bytes per sector address */
344                 uint idbytes;       /* the number ID bytes that this chip outputs */
345         } geom;
346
347         /* NAND flash internal registers */
348         struct {
349                 unsigned command; /* the command register */
350                 u_char   status;  /* the status register */
351                 uint     row;     /* the page number */
352                 uint     column;  /* the offset within page */
353                 uint     count;   /* internal counter */
354                 uint     num;     /* number of bytes which must be processed */
355                 uint     off;     /* fixed page offset */
356         } regs;
357
358         /* NAND flash lines state */
359         struct {
360                 int ce;  /* chip Enable */
361                 int cle; /* command Latch Enable */
362                 int ale; /* address Latch Enable */
363                 int wp;  /* write Protect */
364         } lines;
365
366         /* Fields needed when using a cache file */
367         struct file *cfile; /* Open file */
368         unsigned char *pages_written; /* Which pages have been written */
369         void *file_buf;
370         struct page *held_pages[NS_MAX_HELD_PAGES];
371         int held_cnt;
372
373         struct nandsim_debug_info dbg;
374 };
375
376 /*
377  * Operations array. To perform any operation the simulator must pass
378  * through the correspondent states chain.
379  */
380 static struct nandsim_operations {
381         uint32_t reqopts;  /* options which are required to perform the operation */
382         uint32_t states[NS_OPER_STATES]; /* operation's states */
383 } ops[NS_OPER_NUM] = {
384         /* Read page + OOB from the beginning */
385         {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY,
386                         STATE_DATAOUT, STATE_READY}},
387         /* Read page + OOB from the second half */
388         {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY,
389                         STATE_DATAOUT, STATE_READY}},
390         /* Read OOB */
391         {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
392                         STATE_DATAOUT, STATE_READY}},
393         /* Program page starting from the beginning */
394         {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
395                         STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
396         /* Program page starting from the beginning */
397         {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
398                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
399         /* Program page starting from the second half */
400         {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
401                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
402         /* Program OOB */
403         {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
404                               STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
405         /* Erase sector */
406         {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}},
407         /* Read status */
408         {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}},
409         /* Read multi-plane status */
410         {OPT_SMARTMEDIA, {STATE_CMD_STATUS_M, STATE_DATAOUT_STATUS_M, STATE_READY}},
411         /* Read ID */
412         {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}},
413         /* Large page devices read page */
414         {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY,
415                                STATE_DATAOUT, STATE_READY}},
416         /* Large page devices random page read */
417         {OPT_LARGEPAGE, {STATE_CMD_RNDOUT, STATE_ADDR_COLUMN, STATE_CMD_RNDOUTSTART | ACTION_CPY,
418                                STATE_DATAOUT, STATE_READY}},
419 };
420
421 struct weak_block {
422         struct list_head list;
423         unsigned int erase_block_no;
424         unsigned int max_erases;
425         unsigned int erases_done;
426 };
427
428 static LIST_HEAD(weak_blocks);
429
430 struct weak_page {
431         struct list_head list;
432         unsigned int page_no;
433         unsigned int max_writes;
434         unsigned int writes_done;
435 };
436
437 static LIST_HEAD(weak_pages);
438
439 struct grave_page {
440         struct list_head list;
441         unsigned int page_no;
442         unsigned int max_reads;
443         unsigned int reads_done;
444 };
445
446 static LIST_HEAD(grave_pages);
447
448 static unsigned long *erase_block_wear = NULL;
449 static unsigned int wear_eb_count = 0;
450 static unsigned long total_wear = 0;
451
452 /* MTD structure for NAND controller */
453 static struct mtd_info *nsmtd;
454
455 static int nandsim_debugfs_show(struct seq_file *m, void *private)
456 {
457         unsigned long wmin = -1, wmax = 0, avg;
458         unsigned long deciles[10], decile_max[10], tot = 0;
459         unsigned int i;
460
461         /* Calc wear stats */
462         for (i = 0; i < wear_eb_count; ++i) {
463                 unsigned long wear = erase_block_wear[i];
464                 if (wear < wmin)
465                         wmin = wear;
466                 if (wear > wmax)
467                         wmax = wear;
468                 tot += wear;
469         }
470
471         for (i = 0; i < 9; ++i) {
472                 deciles[i] = 0;
473                 decile_max[i] = (wmax * (i + 1) + 5) / 10;
474         }
475         deciles[9] = 0;
476         decile_max[9] = wmax;
477         for (i = 0; i < wear_eb_count; ++i) {
478                 int d;
479                 unsigned long wear = erase_block_wear[i];
480                 for (d = 0; d < 10; ++d)
481                         if (wear <= decile_max[d]) {
482                                 deciles[d] += 1;
483                                 break;
484                         }
485         }
486         avg = tot / wear_eb_count;
487
488         /* Output wear report */
489         seq_printf(m, "Total numbers of erases:  %lu\n", tot);
490         seq_printf(m, "Number of erase blocks:   %u\n", wear_eb_count);
491         seq_printf(m, "Average number of erases: %lu\n", avg);
492         seq_printf(m, "Maximum number of erases: %lu\n", wmax);
493         seq_printf(m, "Minimum number of erases: %lu\n", wmin);
494         for (i = 0; i < 10; ++i) {
495                 unsigned long from = (i ? decile_max[i - 1] + 1 : 0);
496                 if (from > decile_max[i])
497                         continue;
498                 seq_printf(m, "Number of ebs with erase counts from %lu to %lu : %lu\n",
499                         from,
500                         decile_max[i],
501                         deciles[i]);
502         }
503
504         return 0;
505 }
506
507 static int nandsim_debugfs_open(struct inode *inode, struct file *file)
508 {
509         return single_open(file, nandsim_debugfs_show, inode->i_private);
510 }
511
512 static const struct file_operations dfs_fops = {
513         .open           = nandsim_debugfs_open,
514         .read           = seq_read,
515         .llseek         = seq_lseek,
516         .release        = single_release,
517 };
518
519 /**
520  * nandsim_debugfs_create - initialize debugfs
521  * @dev: nandsim device description object
522  *
523  * This function creates all debugfs files for UBI device @ubi. Returns zero in
524  * case of success and a negative error code in case of failure.
525  */
526 static int nandsim_debugfs_create(struct nandsim *dev)
527 {
528         struct nandsim_debug_info *dbg = &dev->dbg;
529         struct dentry *dent;
530         int err;
531
532         if (!IS_ENABLED(CONFIG_DEBUG_FS))
533                 return 0;
534
535         dent = debugfs_create_dir("nandsim", NULL);
536         if (IS_ERR_OR_NULL(dent)) {
537                 int err = dent ? -ENODEV : PTR_ERR(dent);
538
539                 NS_ERR("cannot create \"nandsim\" debugfs directory, err %d\n",
540                         err);
541                 return err;
542         }
543         dbg->dfs_root = dent;
544
545         dent = debugfs_create_file("wear_report", S_IRUSR,
546                                    dbg->dfs_root, dev, &dfs_fops);
547         if (IS_ERR_OR_NULL(dent))
548                 goto out_remove;
549         dbg->dfs_wear_report = dent;
550
551         return 0;
552
553 out_remove:
554         debugfs_remove_recursive(dbg->dfs_root);
555         err = dent ? PTR_ERR(dent) : -ENODEV;
556         return err;
557 }
558
559 /**
560  * nandsim_debugfs_remove - destroy all debugfs files
561  */
562 static void nandsim_debugfs_remove(struct nandsim *ns)
563 {
564         if (IS_ENABLED(CONFIG_DEBUG_FS))
565                 debugfs_remove_recursive(ns->dbg.dfs_root);
566 }
567
568 /*
569  * Allocate array of page pointers, create slab allocation for an array
570  * and initialize the array by NULL pointers.
571  *
572  * RETURNS: 0 if success, -ENOMEM if memory alloc fails.
573  */
574 static int alloc_device(struct nandsim *ns)
575 {
576         struct file *cfile;
577         int i, err;
578
579         if (cache_file) {
580                 cfile = filp_open(cache_file, O_CREAT | O_RDWR | O_LARGEFILE, 0600);
581                 if (IS_ERR(cfile))
582                         return PTR_ERR(cfile);
583                 if (!cfile->f_op || (!cfile->f_op->read && !cfile->f_op->aio_read)) {
584                         NS_ERR("alloc_device: cache file not readable\n");
585                         err = -EINVAL;
586                         goto err_close;
587                 }
588                 if (!cfile->f_op->write && !cfile->f_op->aio_write) {
589                         NS_ERR("alloc_device: cache file not writeable\n");
590                         err = -EINVAL;
591                         goto err_close;
592                 }
593                 ns->pages_written = vzalloc(ns->geom.pgnum);
594                 if (!ns->pages_written) {
595                         NS_ERR("alloc_device: unable to allocate pages written array\n");
596                         err = -ENOMEM;
597                         goto err_close;
598                 }
599                 ns->file_buf = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
600                 if (!ns->file_buf) {
601                         NS_ERR("alloc_device: unable to allocate file buf\n");
602                         err = -ENOMEM;
603                         goto err_free;
604                 }
605                 ns->cfile = cfile;
606                 return 0;
607         }
608
609         ns->pages = vmalloc(ns->geom.pgnum * sizeof(union ns_mem));
610         if (!ns->pages) {
611                 NS_ERR("alloc_device: unable to allocate page array\n");
612                 return -ENOMEM;
613         }
614         for (i = 0; i < ns->geom.pgnum; i++) {
615                 ns->pages[i].byte = NULL;
616         }
617         ns->nand_pages_slab = kmem_cache_create("nandsim",
618                                                 ns->geom.pgszoob, 0, 0, NULL);
619         if (!ns->nand_pages_slab) {
620                 NS_ERR("cache_create: unable to create kmem_cache\n");
621                 return -ENOMEM;
622         }
623
624         return 0;
625
626 err_free:
627         vfree(ns->pages_written);
628 err_close:
629         filp_close(cfile, NULL);
630         return err;
631 }
632
633 /*
634  * Free any allocated pages, and free the array of page pointers.
635  */
636 static void free_device(struct nandsim *ns)
637 {
638         int i;
639
640         if (ns->cfile) {
641                 kfree(ns->file_buf);
642                 vfree(ns->pages_written);
643                 filp_close(ns->cfile, NULL);
644                 return;
645         }
646
647         if (ns->pages) {
648                 for (i = 0; i < ns->geom.pgnum; i++) {
649                         if (ns->pages[i].byte)
650                                 kmem_cache_free(ns->nand_pages_slab,
651                                                 ns->pages[i].byte);
652                 }
653                 kmem_cache_destroy(ns->nand_pages_slab);
654                 vfree(ns->pages);
655         }
656 }
657
658 static char *get_partition_name(int i)
659 {
660         char buf[64];
661         sprintf(buf, "NAND simulator partition %d", i);
662         return kstrdup(buf, GFP_KERNEL);
663 }
664
665 /*
666  * Initialize the nandsim structure.
667  *
668  * RETURNS: 0 if success, -ERRNO if failure.
669  */
670 static int init_nandsim(struct mtd_info *mtd)
671 {
672         struct nand_chip *chip = mtd->priv;
673         struct nandsim   *ns   = chip->priv;
674         int i, ret = 0;
675         uint64_t remains;
676         uint64_t next_offset;
677
678         if (NS_IS_INITIALIZED(ns)) {
679                 NS_ERR("init_nandsim: nandsim is already initialized\n");
680                 return -EIO;
681         }
682
683         /* Force mtd to not do delays */
684         chip->chip_delay = 0;
685
686         /* Initialize the NAND flash parameters */
687         ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
688         ns->geom.totsz    = mtd->size;
689         ns->geom.pgsz     = mtd->writesize;
690         ns->geom.oobsz    = mtd->oobsize;
691         ns->geom.secsz    = mtd->erasesize;
692         ns->geom.pgszoob  = ns->geom.pgsz + ns->geom.oobsz;
693         ns->geom.pgnum    = div_u64(ns->geom.totsz, ns->geom.pgsz);
694         ns->geom.totszoob = ns->geom.totsz + (uint64_t)ns->geom.pgnum * ns->geom.oobsz;
695         ns->geom.secshift = ffs(ns->geom.secsz) - 1;
696         ns->geom.pgshift  = chip->page_shift;
697         ns->geom.oobshift = ffs(ns->geom.oobsz) - 1;
698         ns->geom.pgsec    = ns->geom.secsz / ns->geom.pgsz;
699         ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec;
700         ns->options = 0;
701
702         if (ns->geom.pgsz == 256) {
703                 ns->options |= OPT_PAGE256;
704         }
705         else if (ns->geom.pgsz == 512) {
706                 ns->options |= OPT_PAGE512;
707                 if (ns->busw == 8)
708                         ns->options |= OPT_PAGE512_8BIT;
709         } else if (ns->geom.pgsz == 2048) {
710                 ns->options |= OPT_PAGE2048;
711         } else if (ns->geom.pgsz == 4096) {
712                 ns->options |= OPT_PAGE4096;
713         } else {
714                 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz);
715                 return -EIO;
716         }
717
718         if (ns->options & OPT_SMALLPAGE) {
719                 if (ns->geom.totsz <= (32 << 20)) {
720                         ns->geom.pgaddrbytes  = 3;
721                         ns->geom.secaddrbytes = 2;
722                 } else {
723                         ns->geom.pgaddrbytes  = 4;
724                         ns->geom.secaddrbytes = 3;
725                 }
726         } else {
727                 if (ns->geom.totsz <= (128 << 20)) {
728                         ns->geom.pgaddrbytes  = 4;
729                         ns->geom.secaddrbytes = 2;
730                 } else {
731                         ns->geom.pgaddrbytes  = 5;
732                         ns->geom.secaddrbytes = 3;
733                 }
734         }
735
736         /* Fill the partition_info structure */
737         if (parts_num > ARRAY_SIZE(ns->partitions)) {
738                 NS_ERR("too many partitions.\n");
739                 ret = -EINVAL;
740                 goto error;
741         }
742         remains = ns->geom.totsz;
743         next_offset = 0;
744         for (i = 0; i < parts_num; ++i) {
745                 uint64_t part_sz = (uint64_t)parts[i] * ns->geom.secsz;
746
747                 if (!part_sz || part_sz > remains) {
748                         NS_ERR("bad partition size.\n");
749                         ret = -EINVAL;
750                         goto error;
751                 }
752                 ns->partitions[i].name   = get_partition_name(i);
753                 ns->partitions[i].offset = next_offset;
754                 ns->partitions[i].size   = part_sz;
755                 next_offset += ns->partitions[i].size;
756                 remains -= ns->partitions[i].size;
757         }
758         ns->nbparts = parts_num;
759         if (remains) {
760                 if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) {
761                         NS_ERR("too many partitions.\n");
762                         ret = -EINVAL;
763                         goto error;
764                 }
765                 ns->partitions[i].name   = get_partition_name(i);
766                 ns->partitions[i].offset = next_offset;
767                 ns->partitions[i].size   = remains;
768                 ns->nbparts += 1;
769         }
770
771         /* Detect how many ID bytes the NAND chip outputs */
772         for (i = 0; nand_flash_ids[i].name != NULL; i++) {
773                 if (second_id_byte != nand_flash_ids[i].id)
774                         continue;
775         }
776
777         if (ns->busw == 16)
778                 NS_WARN("16-bit flashes support wasn't tested\n");
779
780         printk("flash size: %llu MiB\n",
781                         (unsigned long long)ns->geom.totsz >> 20);
782         printk("page size: %u bytes\n",         ns->geom.pgsz);
783         printk("OOB area size: %u bytes\n",     ns->geom.oobsz);
784         printk("sector size: %u KiB\n",         ns->geom.secsz >> 10);
785         printk("pages number: %u\n",            ns->geom.pgnum);
786         printk("pages per sector: %u\n",        ns->geom.pgsec);
787         printk("bus width: %u\n",               ns->busw);
788         printk("bits in sector size: %u\n",     ns->geom.secshift);
789         printk("bits in page size: %u\n",       ns->geom.pgshift);
790         printk("bits in OOB size: %u\n",        ns->geom.oobshift);
791         printk("flash size with OOB: %llu KiB\n",
792                         (unsigned long long)ns->geom.totszoob >> 10);
793         printk("page address bytes: %u\n",      ns->geom.pgaddrbytes);
794         printk("sector address bytes: %u\n",    ns->geom.secaddrbytes);
795         printk("options: %#x\n",                ns->options);
796
797         if ((ret = alloc_device(ns)) != 0)
798                 goto error;
799
800         /* Allocate / initialize the internal buffer */
801         ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
802         if (!ns->buf.byte) {
803                 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n",
804                         ns->geom.pgszoob);
805                 ret = -ENOMEM;
806                 goto error;
807         }
808         memset(ns->buf.byte, 0xFF, ns->geom.pgszoob);
809
810         return 0;
811
812 error:
813         free_device(ns);
814
815         return ret;
816 }
817
818 /*
819  * Free the nandsim structure.
820  */
821 static void free_nandsim(struct nandsim *ns)
822 {
823         kfree(ns->buf.byte);
824         free_device(ns);
825
826         return;
827 }
828
829 static int parse_badblocks(struct nandsim *ns, struct mtd_info *mtd)
830 {
831         char *w;
832         int zero_ok;
833         unsigned int erase_block_no;
834         loff_t offset;
835
836         if (!badblocks)
837                 return 0;
838         w = badblocks;
839         do {
840                 zero_ok = (*w == '0' ? 1 : 0);
841                 erase_block_no = simple_strtoul(w, &w, 0);
842                 if (!zero_ok && !erase_block_no) {
843                         NS_ERR("invalid badblocks.\n");
844                         return -EINVAL;
845                 }
846                 offset = erase_block_no * ns->geom.secsz;
847                 if (mtd_block_markbad(mtd, offset)) {
848                         NS_ERR("invalid badblocks.\n");
849                         return -EINVAL;
850                 }
851                 if (*w == ',')
852                         w += 1;
853         } while (*w);
854         return 0;
855 }
856
857 static int parse_weakblocks(void)
858 {
859         char *w;
860         int zero_ok;
861         unsigned int erase_block_no;
862         unsigned int max_erases;
863         struct weak_block *wb;
864
865         if (!weakblocks)
866                 return 0;
867         w = weakblocks;
868         do {
869                 zero_ok = (*w == '0' ? 1 : 0);
870                 erase_block_no = simple_strtoul(w, &w, 0);
871                 if (!zero_ok && !erase_block_no) {
872                         NS_ERR("invalid weakblocks.\n");
873                         return -EINVAL;
874                 }
875                 max_erases = 3;
876                 if (*w == ':') {
877                         w += 1;
878                         max_erases = simple_strtoul(w, &w, 0);
879                 }
880                 if (*w == ',')
881                         w += 1;
882                 wb = kzalloc(sizeof(*wb), GFP_KERNEL);
883                 if (!wb) {
884                         NS_ERR("unable to allocate memory.\n");
885                         return -ENOMEM;
886                 }
887                 wb->erase_block_no = erase_block_no;
888                 wb->max_erases = max_erases;
889                 list_add(&wb->list, &weak_blocks);
890         } while (*w);
891         return 0;
892 }
893
894 static int erase_error(unsigned int erase_block_no)
895 {
896         struct weak_block *wb;
897
898         list_for_each_entry(wb, &weak_blocks, list)
899                 if (wb->erase_block_no == erase_block_no) {
900                         if (wb->erases_done >= wb->max_erases)
901                                 return 1;
902                         wb->erases_done += 1;
903                         return 0;
904                 }
905         return 0;
906 }
907
908 static int parse_weakpages(void)
909 {
910         char *w;
911         int zero_ok;
912         unsigned int page_no;
913         unsigned int max_writes;
914         struct weak_page *wp;
915
916         if (!weakpages)
917                 return 0;
918         w = weakpages;
919         do {
920                 zero_ok = (*w == '0' ? 1 : 0);
921                 page_no = simple_strtoul(w, &w, 0);
922                 if (!zero_ok && !page_no) {
923                         NS_ERR("invalid weakpagess.\n");
924                         return -EINVAL;
925                 }
926                 max_writes = 3;
927                 if (*w == ':') {
928                         w += 1;
929                         max_writes = simple_strtoul(w, &w, 0);
930                 }
931                 if (*w == ',')
932                         w += 1;
933                 wp = kzalloc(sizeof(*wp), GFP_KERNEL);
934                 if (!wp) {
935                         NS_ERR("unable to allocate memory.\n");
936                         return -ENOMEM;
937                 }
938                 wp->page_no = page_no;
939                 wp->max_writes = max_writes;
940                 list_add(&wp->list, &weak_pages);
941         } while (*w);
942         return 0;
943 }
944
945 static int write_error(unsigned int page_no)
946 {
947         struct weak_page *wp;
948
949         list_for_each_entry(wp, &weak_pages, list)
950                 if (wp->page_no == page_no) {
951                         if (wp->writes_done >= wp->max_writes)
952                                 return 1;
953                         wp->writes_done += 1;
954                         return 0;
955                 }
956         return 0;
957 }
958
959 static int parse_gravepages(void)
960 {
961         char *g;
962         int zero_ok;
963         unsigned int page_no;
964         unsigned int max_reads;
965         struct grave_page *gp;
966
967         if (!gravepages)
968                 return 0;
969         g = gravepages;
970         do {
971                 zero_ok = (*g == '0' ? 1 : 0);
972                 page_no = simple_strtoul(g, &g, 0);
973                 if (!zero_ok && !page_no) {
974                         NS_ERR("invalid gravepagess.\n");
975                         return -EINVAL;
976                 }
977                 max_reads = 3;
978                 if (*g == ':') {
979                         g += 1;
980                         max_reads = simple_strtoul(g, &g, 0);
981                 }
982                 if (*g == ',')
983                         g += 1;
984                 gp = kzalloc(sizeof(*gp), GFP_KERNEL);
985                 if (!gp) {
986                         NS_ERR("unable to allocate memory.\n");
987                         return -ENOMEM;
988                 }
989                 gp->page_no = page_no;
990                 gp->max_reads = max_reads;
991                 list_add(&gp->list, &grave_pages);
992         } while (*g);
993         return 0;
994 }
995
996 static int read_error(unsigned int page_no)
997 {
998         struct grave_page *gp;
999
1000         list_for_each_entry(gp, &grave_pages, list)
1001                 if (gp->page_no == page_no) {
1002                         if (gp->reads_done >= gp->max_reads)
1003                                 return 1;
1004                         gp->reads_done += 1;
1005                         return 0;
1006                 }
1007         return 0;
1008 }
1009
1010 static void free_lists(void)
1011 {
1012         struct list_head *pos, *n;
1013         list_for_each_safe(pos, n, &weak_blocks) {
1014                 list_del(pos);
1015                 kfree(list_entry(pos, struct weak_block, list));
1016         }
1017         list_for_each_safe(pos, n, &weak_pages) {
1018                 list_del(pos);
1019                 kfree(list_entry(pos, struct weak_page, list));
1020         }
1021         list_for_each_safe(pos, n, &grave_pages) {
1022                 list_del(pos);
1023                 kfree(list_entry(pos, struct grave_page, list));
1024         }
1025         kfree(erase_block_wear);
1026 }
1027
1028 static int setup_wear_reporting(struct mtd_info *mtd)
1029 {
1030         size_t mem;
1031
1032         wear_eb_count = div_u64(mtd->size, mtd->erasesize);
1033         mem = wear_eb_count * sizeof(unsigned long);
1034         if (mem / sizeof(unsigned long) != wear_eb_count) {
1035                 NS_ERR("Too many erase blocks for wear reporting\n");
1036                 return -ENOMEM;
1037         }
1038         erase_block_wear = kzalloc(mem, GFP_KERNEL);
1039         if (!erase_block_wear) {
1040                 NS_ERR("Too many erase blocks for wear reporting\n");
1041                 return -ENOMEM;
1042         }
1043         return 0;
1044 }
1045
1046 static void update_wear(unsigned int erase_block_no)
1047 {
1048         if (!erase_block_wear)
1049                 return;
1050         total_wear += 1;
1051         /*
1052          * TODO: Notify this through a debugfs entry,
1053          * instead of showing an error message.
1054          */
1055         if (total_wear == 0)
1056                 NS_ERR("Erase counter total overflow\n");
1057         erase_block_wear[erase_block_no] += 1;
1058         if (erase_block_wear[erase_block_no] == 0)
1059                 NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no);
1060 }
1061
1062 /*
1063  * Returns the string representation of 'state' state.
1064  */
1065 static char *get_state_name(uint32_t state)
1066 {
1067         switch (NS_STATE(state)) {
1068                 case STATE_CMD_READ0:
1069                         return "STATE_CMD_READ0";
1070                 case STATE_CMD_READ1:
1071                         return "STATE_CMD_READ1";
1072                 case STATE_CMD_PAGEPROG:
1073                         return "STATE_CMD_PAGEPROG";
1074                 case STATE_CMD_READOOB:
1075                         return "STATE_CMD_READOOB";
1076                 case STATE_CMD_READSTART:
1077                         return "STATE_CMD_READSTART";
1078                 case STATE_CMD_ERASE1:
1079                         return "STATE_CMD_ERASE1";
1080                 case STATE_CMD_STATUS:
1081                         return "STATE_CMD_STATUS";
1082                 case STATE_CMD_STATUS_M:
1083                         return "STATE_CMD_STATUS_M";
1084                 case STATE_CMD_SEQIN:
1085                         return "STATE_CMD_SEQIN";
1086                 case STATE_CMD_READID:
1087                         return "STATE_CMD_READID";
1088                 case STATE_CMD_ERASE2:
1089                         return "STATE_CMD_ERASE2";
1090                 case STATE_CMD_RESET:
1091                         return "STATE_CMD_RESET";
1092                 case STATE_CMD_RNDOUT:
1093                         return "STATE_CMD_RNDOUT";
1094                 case STATE_CMD_RNDOUTSTART:
1095                         return "STATE_CMD_RNDOUTSTART";
1096                 case STATE_ADDR_PAGE:
1097                         return "STATE_ADDR_PAGE";
1098                 case STATE_ADDR_SEC:
1099                         return "STATE_ADDR_SEC";
1100                 case STATE_ADDR_ZERO:
1101                         return "STATE_ADDR_ZERO";
1102                 case STATE_ADDR_COLUMN:
1103                         return "STATE_ADDR_COLUMN";
1104                 case STATE_DATAIN:
1105                         return "STATE_DATAIN";
1106                 case STATE_DATAOUT:
1107                         return "STATE_DATAOUT";
1108                 case STATE_DATAOUT_ID:
1109                         return "STATE_DATAOUT_ID";
1110                 case STATE_DATAOUT_STATUS:
1111                         return "STATE_DATAOUT_STATUS";
1112                 case STATE_DATAOUT_STATUS_M:
1113                         return "STATE_DATAOUT_STATUS_M";
1114                 case STATE_READY:
1115                         return "STATE_READY";
1116                 case STATE_UNKNOWN:
1117                         return "STATE_UNKNOWN";
1118         }
1119
1120         NS_ERR("get_state_name: unknown state, BUG\n");
1121         return NULL;
1122 }
1123
1124 /*
1125  * Check if command is valid.
1126  *
1127  * RETURNS: 1 if wrong command, 0 if right.
1128  */
1129 static int check_command(int cmd)
1130 {
1131         switch (cmd) {
1132
1133         case NAND_CMD_READ0:
1134         case NAND_CMD_READ1:
1135         case NAND_CMD_READSTART:
1136         case NAND_CMD_PAGEPROG:
1137         case NAND_CMD_READOOB:
1138         case NAND_CMD_ERASE1:
1139         case NAND_CMD_STATUS:
1140         case NAND_CMD_SEQIN:
1141         case NAND_CMD_READID:
1142         case NAND_CMD_ERASE2:
1143         case NAND_CMD_RESET:
1144         case NAND_CMD_RNDOUT:
1145         case NAND_CMD_RNDOUTSTART:
1146                 return 0;
1147
1148         case NAND_CMD_STATUS_MULTI:
1149         default:
1150                 return 1;
1151         }
1152 }
1153
1154 /*
1155  * Returns state after command is accepted by command number.
1156  */
1157 static uint32_t get_state_by_command(unsigned command)
1158 {
1159         switch (command) {
1160                 case NAND_CMD_READ0:
1161                         return STATE_CMD_READ0;
1162                 case NAND_CMD_READ1:
1163                         return STATE_CMD_READ1;
1164                 case NAND_CMD_PAGEPROG:
1165                         return STATE_CMD_PAGEPROG;
1166                 case NAND_CMD_READSTART:
1167                         return STATE_CMD_READSTART;
1168                 case NAND_CMD_READOOB:
1169                         return STATE_CMD_READOOB;
1170                 case NAND_CMD_ERASE1:
1171                         return STATE_CMD_ERASE1;
1172                 case NAND_CMD_STATUS:
1173                         return STATE_CMD_STATUS;
1174                 case NAND_CMD_STATUS_MULTI:
1175                         return STATE_CMD_STATUS_M;
1176                 case NAND_CMD_SEQIN:
1177                         return STATE_CMD_SEQIN;
1178                 case NAND_CMD_READID:
1179                         return STATE_CMD_READID;
1180                 case NAND_CMD_ERASE2:
1181                         return STATE_CMD_ERASE2;
1182                 case NAND_CMD_RESET:
1183                         return STATE_CMD_RESET;
1184                 case NAND_CMD_RNDOUT:
1185                         return STATE_CMD_RNDOUT;
1186                 case NAND_CMD_RNDOUTSTART:
1187                         return STATE_CMD_RNDOUTSTART;
1188         }
1189
1190         NS_ERR("get_state_by_command: unknown command, BUG\n");
1191         return 0;
1192 }
1193
1194 /*
1195  * Move an address byte to the correspondent internal register.
1196  */
1197 static inline void accept_addr_byte(struct nandsim *ns, u_char bt)
1198 {
1199         uint byte = (uint)bt;
1200
1201         if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes))
1202                 ns->regs.column |= (byte << 8 * ns->regs.count);
1203         else {
1204                 ns->regs.row |= (byte << 8 * (ns->regs.count -
1205                                                 ns->geom.pgaddrbytes +
1206                                                 ns->geom.secaddrbytes));
1207         }
1208
1209         return;
1210 }
1211
1212 /*
1213  * Switch to STATE_READY state.
1214  */
1215 static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1216 {
1217         NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY));
1218
1219         ns->state       = STATE_READY;
1220         ns->nxstate     = STATE_UNKNOWN;
1221         ns->op          = NULL;
1222         ns->npstates    = 0;
1223         ns->stateidx    = 0;
1224         ns->regs.num    = 0;
1225         ns->regs.count  = 0;
1226         ns->regs.off    = 0;
1227         ns->regs.row    = 0;
1228         ns->regs.column = 0;
1229         ns->regs.status = status;
1230 }
1231
1232 /*
1233  * If the operation isn't known yet, try to find it in the global array
1234  * of supported operations.
1235  *
1236  * Operation can be unknown because of the following.
1237  *   1. New command was accepted and this is the first call to find the
1238  *      correspondent states chain. In this case ns->npstates = 0;
1239  *   2. There are several operations which begin with the same command(s)
1240  *      (for example program from the second half and read from the
1241  *      second half operations both begin with the READ1 command). In this
1242  *      case the ns->pstates[] array contains previous states.
1243  *
1244  * Thus, the function tries to find operation containing the following
1245  * states (if the 'flag' parameter is 0):
1246  *    ns->pstates[0], ... ns->pstates[ns->npstates], ns->state
1247  *
1248  * If (one and only one) matching operation is found, it is accepted (
1249  * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1250  * zeroed).
1251  *
1252  * If there are several matches, the current state is pushed to the
1253  * ns->pstates.
1254  *
1255  * The operation can be unknown only while commands are input to the chip.
1256  * As soon as address command is accepted, the operation must be known.
1257  * In such situation the function is called with 'flag' != 0, and the
1258  * operation is searched using the following pattern:
1259  *     ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
1260  *
1261  * It is supposed that this pattern must either match one operation or
1262  * none. There can't be ambiguity in that case.
1263  *
1264  * If no matches found, the function does the following:
1265  *   1. if there are saved states present, try to ignore them and search
1266  *      again only using the last command. If nothing was found, switch
1267  *      to the STATE_READY state.
1268  *   2. if there are no saved states, switch to the STATE_READY state.
1269  *
1270  * RETURNS: -2 - no matched operations found.
1271  *          -1 - several matches.
1272  *           0 - operation is found.
1273  */
1274 static int find_operation(struct nandsim *ns, uint32_t flag)
1275 {
1276         int opsfound = 0;
1277         int i, j, idx = 0;
1278
1279         for (i = 0; i < NS_OPER_NUM; i++) {
1280
1281                 int found = 1;
1282
1283                 if (!(ns->options & ops[i].reqopts))
1284                         /* Ignore operations we can't perform */
1285                         continue;
1286
1287                 if (flag) {
1288                         if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK))
1289                                 continue;
1290                 } else {
1291                         if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates]))
1292                                 continue;
1293                 }
1294
1295                 for (j = 0; j < ns->npstates; j++)
1296                         if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j])
1297                                 && (ns->options & ops[idx].reqopts)) {
1298                                 found = 0;
1299                                 break;
1300                         }
1301
1302                 if (found) {
1303                         idx = i;
1304                         opsfound += 1;
1305                 }
1306         }
1307
1308         if (opsfound == 1) {
1309                 /* Exact match */
1310                 ns->op = &ops[idx].states[0];
1311                 if (flag) {
1312                         /*
1313                          * In this case the find_operation function was
1314                          * called when address has just began input. But it isn't
1315                          * yet fully input and the current state must
1316                          * not be one of STATE_ADDR_*, but the STATE_ADDR_*
1317                          * state must be the next state (ns->nxstate).
1318                          */
1319                         ns->stateidx = ns->npstates - 1;
1320                 } else {
1321                         ns->stateidx = ns->npstates;
1322                 }
1323                 ns->npstates = 0;
1324                 ns->state = ns->op[ns->stateidx];
1325                 ns->nxstate = ns->op[ns->stateidx + 1];
1326                 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n",
1327                                 idx, get_state_name(ns->state), get_state_name(ns->nxstate));
1328                 return 0;
1329         }
1330
1331         if (opsfound == 0) {
1332                 /* Nothing was found. Try to ignore previous commands (if any) and search again */
1333                 if (ns->npstates != 0) {
1334                         NS_DBG("find_operation: no operation found, try again with state %s\n",
1335                                         get_state_name(ns->state));
1336                         ns->npstates = 0;
1337                         return find_operation(ns, 0);
1338
1339                 }
1340                 NS_DBG("find_operation: no operations found\n");
1341                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1342                 return -2;
1343         }
1344
1345         if (flag) {
1346                 /* This shouldn't happen */
1347                 NS_DBG("find_operation: BUG, operation must be known if address is input\n");
1348                 return -2;
1349         }
1350
1351         NS_DBG("find_operation: there is still ambiguity\n");
1352
1353         ns->pstates[ns->npstates++] = ns->state;
1354
1355         return -1;
1356 }
1357
1358 static void put_pages(struct nandsim *ns)
1359 {
1360         int i;
1361
1362         for (i = 0; i < ns->held_cnt; i++)
1363                 page_cache_release(ns->held_pages[i]);
1364 }
1365
1366 /* Get page cache pages in advance to provide NOFS memory allocation */
1367 static int get_pages(struct nandsim *ns, struct file *file, size_t count, loff_t pos)
1368 {
1369         pgoff_t index, start_index, end_index;
1370         struct page *page;
1371         struct address_space *mapping = file->f_mapping;
1372
1373         start_index = pos >> PAGE_CACHE_SHIFT;
1374         end_index = (pos + count - 1) >> PAGE_CACHE_SHIFT;
1375         if (end_index - start_index + 1 > NS_MAX_HELD_PAGES)
1376                 return -EINVAL;
1377         ns->held_cnt = 0;
1378         for (index = start_index; index <= end_index; index++) {
1379                 page = find_get_page(mapping, index);
1380                 if (page == NULL) {
1381                         page = find_or_create_page(mapping, index, GFP_NOFS);
1382                         if (page == NULL) {
1383                                 write_inode_now(mapping->host, 1);
1384                                 page = find_or_create_page(mapping, index, GFP_NOFS);
1385                         }
1386                         if (page == NULL) {
1387                                 put_pages(ns);
1388                                 return -ENOMEM;
1389                         }
1390                         unlock_page(page);
1391                 }
1392                 ns->held_pages[ns->held_cnt++] = page;
1393         }
1394         return 0;
1395 }
1396
1397 static int set_memalloc(void)
1398 {
1399         if (current->flags & PF_MEMALLOC)
1400                 return 0;
1401         current->flags |= PF_MEMALLOC;
1402         return 1;
1403 }
1404
1405 static void clear_memalloc(int memalloc)
1406 {
1407         if (memalloc)
1408                 current->flags &= ~PF_MEMALLOC;
1409 }
1410
1411 static ssize_t read_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t pos)
1412 {
1413         ssize_t tx;
1414         int err, memalloc;
1415
1416         err = get_pages(ns, file, count, pos);
1417         if (err)
1418                 return err;
1419         memalloc = set_memalloc();
1420         tx = kernel_read(file, pos, buf, count);
1421         clear_memalloc(memalloc);
1422         put_pages(ns);
1423         return tx;
1424 }
1425
1426 static ssize_t write_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t pos)
1427 {
1428         ssize_t tx;
1429         int err, memalloc;
1430
1431         err = get_pages(ns, file, count, pos);
1432         if (err)
1433                 return err;
1434         memalloc = set_memalloc();
1435         tx = kernel_write(file, buf, count, pos);
1436         clear_memalloc(memalloc);
1437         put_pages(ns);
1438         return tx;
1439 }
1440
1441 /*
1442  * Returns a pointer to the current page.
1443  */
1444 static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns)
1445 {
1446         return &(ns->pages[ns->regs.row]);
1447 }
1448
1449 /*
1450  * Retuns a pointer to the current byte, within the current page.
1451  */
1452 static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns)
1453 {
1454         return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off;
1455 }
1456
1457 int do_read_error(struct nandsim *ns, int num)
1458 {
1459         unsigned int page_no = ns->regs.row;
1460
1461         if (read_error(page_no)) {
1462                 prandom_bytes(ns->buf.byte, num);
1463                 NS_WARN("simulating read error in page %u\n", page_no);
1464                 return 1;
1465         }
1466         return 0;
1467 }
1468
1469 void do_bit_flips(struct nandsim *ns, int num)
1470 {
1471         if (bitflips && prandom_u32() < (1 << 22)) {
1472                 int flips = 1;
1473                 if (bitflips > 1)
1474                         flips = (prandom_u32() % (int) bitflips) + 1;
1475                 while (flips--) {
1476                         int pos = prandom_u32() % (num * 8);
1477                         ns->buf.byte[pos / 8] ^= (1 << (pos % 8));
1478                         NS_WARN("read_page: flipping bit %d in page %d "
1479                                 "reading from %d ecc: corrected=%u failed=%u\n",
1480                                 pos, ns->regs.row, ns->regs.column + ns->regs.off,
1481                                 nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed);
1482                 }
1483         }
1484 }
1485
1486 /*
1487  * Fill the NAND buffer with data read from the specified page.
1488  */
1489 static void read_page(struct nandsim *ns, int num)
1490 {
1491         union ns_mem *mypage;
1492
1493         if (ns->cfile) {
1494                 if (!ns->pages_written[ns->regs.row]) {
1495                         NS_DBG("read_page: page %d not written\n", ns->regs.row);
1496                         memset(ns->buf.byte, 0xFF, num);
1497                 } else {
1498                         loff_t pos;
1499                         ssize_t tx;
1500
1501                         NS_DBG("read_page: page %d written, reading from %d\n",
1502                                 ns->regs.row, ns->regs.column + ns->regs.off);
1503                         if (do_read_error(ns, num))
1504                                 return;
1505                         pos = (loff_t)ns->regs.row * ns->geom.pgszoob + ns->regs.column + ns->regs.off;
1506                         tx = read_file(ns, ns->cfile, ns->buf.byte, num, pos);
1507                         if (tx != num) {
1508                                 NS_ERR("read_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1509                                 return;
1510                         }
1511                         do_bit_flips(ns, num);
1512                 }
1513                 return;
1514         }
1515
1516         mypage = NS_GET_PAGE(ns);
1517         if (mypage->byte == NULL) {
1518                 NS_DBG("read_page: page %d not allocated\n", ns->regs.row);
1519                 memset(ns->buf.byte, 0xFF, num);
1520         } else {
1521                 NS_DBG("read_page: page %d allocated, reading from %d\n",
1522                         ns->regs.row, ns->regs.column + ns->regs.off);
1523                 if (do_read_error(ns, num))
1524                         return;
1525                 memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num);
1526                 do_bit_flips(ns, num);
1527         }
1528 }
1529
1530 /*
1531  * Erase all pages in the specified sector.
1532  */
1533 static void erase_sector(struct nandsim *ns)
1534 {
1535         union ns_mem *mypage;
1536         int i;
1537
1538         if (ns->cfile) {
1539                 for (i = 0; i < ns->geom.pgsec; i++)
1540                         if (ns->pages_written[ns->regs.row + i]) {
1541                                 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row + i);
1542                                 ns->pages_written[ns->regs.row + i] = 0;
1543                         }
1544                 return;
1545         }
1546
1547         mypage = NS_GET_PAGE(ns);
1548         for (i = 0; i < ns->geom.pgsec; i++) {
1549                 if (mypage->byte != NULL) {
1550                         NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i);
1551                         kmem_cache_free(ns->nand_pages_slab, mypage->byte);
1552                         mypage->byte = NULL;
1553                 }
1554                 mypage++;
1555         }
1556 }
1557
1558 /*
1559  * Program the specified page with the contents from the NAND buffer.
1560  */
1561 static int prog_page(struct nandsim *ns, int num)
1562 {
1563         int i;
1564         union ns_mem *mypage;
1565         u_char *pg_off;
1566
1567         if (ns->cfile) {
1568                 loff_t off;
1569                 ssize_t tx;
1570                 int all;
1571
1572                 NS_DBG("prog_page: writing page %d\n", ns->regs.row);
1573                 pg_off = ns->file_buf + ns->regs.column + ns->regs.off;
1574                 off = (loff_t)ns->regs.row * ns->geom.pgszoob + ns->regs.column + ns->regs.off;
1575                 if (!ns->pages_written[ns->regs.row]) {
1576                         all = 1;
1577                         memset(ns->file_buf, 0xff, ns->geom.pgszoob);
1578                 } else {
1579                         all = 0;
1580                         tx = read_file(ns, ns->cfile, pg_off, num, off);
1581                         if (tx != num) {
1582                                 NS_ERR("prog_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1583                                 return -1;
1584                         }
1585                 }
1586                 for (i = 0; i < num; i++)
1587                         pg_off[i] &= ns->buf.byte[i];
1588                 if (all) {
1589                         loff_t pos = (loff_t)ns->regs.row * ns->geom.pgszoob;
1590                         tx = write_file(ns, ns->cfile, ns->file_buf, ns->geom.pgszoob, pos);
1591                         if (tx != ns->geom.pgszoob) {
1592                                 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1593                                 return -1;
1594                         }
1595                         ns->pages_written[ns->regs.row] = 1;
1596                 } else {
1597                         tx = write_file(ns, ns->cfile, pg_off, num, off);
1598                         if (tx != num) {
1599                                 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1600                                 return -1;
1601                         }
1602                 }
1603                 return 0;
1604         }
1605
1606         mypage = NS_GET_PAGE(ns);
1607         if (mypage->byte == NULL) {
1608                 NS_DBG("prog_page: allocating page %d\n", ns->regs.row);
1609                 /*
1610                  * We allocate memory with GFP_NOFS because a flash FS may
1611                  * utilize this. If it is holding an FS lock, then gets here,
1612                  * then kernel memory alloc runs writeback which goes to the FS
1613                  * again and deadlocks. This was seen in practice.
1614                  */
1615                 mypage->byte = kmem_cache_alloc(ns->nand_pages_slab, GFP_NOFS);
1616                 if (mypage->byte == NULL) {
1617                         NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row);
1618                         return -1;
1619                 }
1620                 memset(mypage->byte, 0xFF, ns->geom.pgszoob);
1621         }
1622
1623         pg_off = NS_PAGE_BYTE_OFF(ns);
1624         for (i = 0; i < num; i++)
1625                 pg_off[i] &= ns->buf.byte[i];
1626
1627         return 0;
1628 }
1629
1630 /*
1631  * If state has any action bit, perform this action.
1632  *
1633  * RETURNS: 0 if success, -1 if error.
1634  */
1635 static int do_state_action(struct nandsim *ns, uint32_t action)
1636 {
1637         int num;
1638         int busdiv = ns->busw == 8 ? 1 : 2;
1639         unsigned int erase_block_no, page_no;
1640
1641         action &= ACTION_MASK;
1642
1643         /* Check that page address input is correct */
1644         if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) {
1645                 NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row);
1646                 return -1;
1647         }
1648
1649         switch (action) {
1650
1651         case ACTION_CPY:
1652                 /*
1653                  * Copy page data to the internal buffer.
1654                  */
1655
1656                 /* Column shouldn't be very large */
1657                 if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) {
1658                         NS_ERR("do_state_action: column number is too large\n");
1659                         break;
1660                 }
1661                 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1662                 read_page(ns, num);
1663
1664                 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n",
1665                         num, NS_RAW_OFFSET(ns) + ns->regs.off);
1666
1667                 if (ns->regs.off == 0)
1668                         NS_LOG("read page %d\n", ns->regs.row);
1669                 else if (ns->regs.off < ns->geom.pgsz)
1670                         NS_LOG("read page %d (second half)\n", ns->regs.row);
1671                 else
1672                         NS_LOG("read OOB of page %d\n", ns->regs.row);
1673
1674                 NS_UDELAY(access_delay);
1675                 NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv);
1676
1677                 break;
1678
1679         case ACTION_SECERASE:
1680                 /*
1681                  * Erase sector.
1682                  */
1683
1684                 if (ns->lines.wp) {
1685                         NS_ERR("do_state_action: device is write-protected, ignore sector erase\n");
1686                         return -1;
1687                 }
1688
1689                 if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec
1690                         || (ns->regs.row & ~(ns->geom.secsz - 1))) {
1691                         NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row);
1692                         return -1;
1693                 }
1694
1695                 ns->regs.row = (ns->regs.row <<
1696                                 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column;
1697                 ns->regs.column = 0;
1698
1699                 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift);
1700
1701                 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n",
1702                                 ns->regs.row, NS_RAW_OFFSET(ns));
1703                 NS_LOG("erase sector %u\n", erase_block_no);
1704
1705                 erase_sector(ns);
1706
1707                 NS_MDELAY(erase_delay);
1708
1709                 if (erase_block_wear)
1710                         update_wear(erase_block_no);
1711
1712                 if (erase_error(erase_block_no)) {
1713                         NS_WARN("simulating erase failure in erase block %u\n", erase_block_no);
1714                         return -1;
1715                 }
1716
1717                 break;
1718
1719         case ACTION_PRGPAGE:
1720                 /*
1721                  * Program page - move internal buffer data to the page.
1722                  */
1723
1724                 if (ns->lines.wp) {
1725                         NS_WARN("do_state_action: device is write-protected, programm\n");
1726                         return -1;
1727                 }
1728
1729                 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1730                 if (num != ns->regs.count) {
1731                         NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n",
1732                                         ns->regs.count, num);
1733                         return -1;
1734                 }
1735
1736                 if (prog_page(ns, num) == -1)
1737                         return -1;
1738
1739                 page_no = ns->regs.row;
1740
1741                 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n",
1742                         num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off);
1743                 NS_LOG("programm page %d\n", ns->regs.row);
1744
1745                 NS_UDELAY(programm_delay);
1746                 NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv);
1747
1748                 if (write_error(page_no)) {
1749                         NS_WARN("simulating write failure in page %u\n", page_no);
1750                         return -1;
1751                 }
1752
1753                 break;
1754
1755         case ACTION_ZEROOFF:
1756                 NS_DBG("do_state_action: set internal offset to 0\n");
1757                 ns->regs.off = 0;
1758                 break;
1759
1760         case ACTION_HALFOFF:
1761                 if (!(ns->options & OPT_PAGE512_8BIT)) {
1762                         NS_ERR("do_state_action: BUG! can't skip half of page for non-512"
1763                                 "byte page size 8x chips\n");
1764                         return -1;
1765                 }
1766                 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2);
1767                 ns->regs.off = ns->geom.pgsz/2;
1768                 break;
1769
1770         case ACTION_OOBOFF:
1771                 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz);
1772                 ns->regs.off = ns->geom.pgsz;
1773                 break;
1774
1775         default:
1776                 NS_DBG("do_state_action: BUG! unknown action\n");
1777         }
1778
1779         return 0;
1780 }
1781
1782 /*
1783  * Switch simulator's state.
1784  */
1785 static void switch_state(struct nandsim *ns)
1786 {
1787         if (ns->op) {
1788                 /*
1789                  * The current operation have already been identified.
1790                  * Just follow the states chain.
1791                  */
1792
1793                 ns->stateidx += 1;
1794                 ns->state = ns->nxstate;
1795                 ns->nxstate = ns->op[ns->stateidx + 1];
1796
1797                 NS_DBG("switch_state: operation is known, switch to the next state, "
1798                         "state: %s, nxstate: %s\n",
1799                         get_state_name(ns->state), get_state_name(ns->nxstate));
1800
1801                 /* See, whether we need to do some action */
1802                 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1803                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1804                         return;
1805                 }
1806
1807         } else {
1808                 /*
1809                  * We don't yet know which operation we perform.
1810                  * Try to identify it.
1811                  */
1812
1813                 /*
1814                  *  The only event causing the switch_state function to
1815                  *  be called with yet unknown operation is new command.
1816                  */
1817                 ns->state = get_state_by_command(ns->regs.command);
1818
1819                 NS_DBG("switch_state: operation is unknown, try to find it\n");
1820
1821                 if (find_operation(ns, 0) != 0)
1822                         return;
1823
1824                 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1825                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1826                         return;
1827                 }
1828         }
1829
1830         /* For 16x devices column means the page offset in words */
1831         if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) {
1832                 NS_DBG("switch_state: double the column number for 16x device\n");
1833                 ns->regs.column <<= 1;
1834         }
1835
1836         if (NS_STATE(ns->nxstate) == STATE_READY) {
1837                 /*
1838                  * The current state is the last. Return to STATE_READY
1839                  */
1840
1841                 u_char status = NS_STATUS_OK(ns);
1842
1843                 /* In case of data states, see if all bytes were input/output */
1844                 if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK))
1845                         && ns->regs.count != ns->regs.num) {
1846                         NS_WARN("switch_state: not all bytes were processed, %d left\n",
1847                                         ns->regs.num - ns->regs.count);
1848                         status = NS_STATUS_FAILED(ns);
1849                 }
1850
1851                 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n");
1852
1853                 switch_to_ready_state(ns, status);
1854
1855                 return;
1856         } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) {
1857                 /*
1858                  * If the next state is data input/output, switch to it now
1859                  */
1860
1861                 ns->state      = ns->nxstate;
1862                 ns->nxstate    = ns->op[++ns->stateidx + 1];
1863                 ns->regs.num   = ns->regs.count = 0;
1864
1865                 NS_DBG("switch_state: the next state is data I/O, switch, "
1866                         "state: %s, nxstate: %s\n",
1867                         get_state_name(ns->state), get_state_name(ns->nxstate));
1868
1869                 /*
1870                  * Set the internal register to the count of bytes which
1871                  * are expected to be input or output
1872                  */
1873                 switch (NS_STATE(ns->state)) {
1874                         case STATE_DATAIN:
1875                         case STATE_DATAOUT:
1876                                 ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1877                                 break;
1878
1879                         case STATE_DATAOUT_ID:
1880                                 ns->regs.num = ns->geom.idbytes;
1881                                 break;
1882
1883                         case STATE_DATAOUT_STATUS:
1884                         case STATE_DATAOUT_STATUS_M:
1885                                 ns->regs.count = ns->regs.num = 0;
1886                                 break;
1887
1888                         default:
1889                                 NS_ERR("switch_state: BUG! unknown data state\n");
1890                 }
1891
1892         } else if (ns->nxstate & STATE_ADDR_MASK) {
1893                 /*
1894                  * If the next state is address input, set the internal
1895                  * register to the number of expected address bytes
1896                  */
1897
1898                 ns->regs.count = 0;
1899
1900                 switch (NS_STATE(ns->nxstate)) {
1901                         case STATE_ADDR_PAGE:
1902                                 ns->regs.num = ns->geom.pgaddrbytes;
1903
1904                                 break;
1905                         case STATE_ADDR_SEC:
1906                                 ns->regs.num = ns->geom.secaddrbytes;
1907                                 break;
1908
1909                         case STATE_ADDR_ZERO:
1910                                 ns->regs.num = 1;
1911                                 break;
1912
1913                         case STATE_ADDR_COLUMN:
1914                                 /* Column address is always 2 bytes */
1915                                 ns->regs.num = ns->geom.pgaddrbytes - ns->geom.secaddrbytes;
1916                                 break;
1917
1918                         default:
1919                                 NS_ERR("switch_state: BUG! unknown address state\n");
1920                 }
1921         } else {
1922                 /*
1923                  * Just reset internal counters.
1924                  */
1925
1926                 ns->regs.num = 0;
1927                 ns->regs.count = 0;
1928         }
1929 }
1930
1931 static u_char ns_nand_read_byte(struct mtd_info *mtd)
1932 {
1933         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1934         u_char outb = 0x00;
1935
1936         /* Sanity and correctness checks */
1937         if (!ns->lines.ce) {
1938                 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb);
1939                 return outb;
1940         }
1941         if (ns->lines.ale || ns->lines.cle) {
1942                 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb);
1943                 return outb;
1944         }
1945         if (!(ns->state & STATE_DATAOUT_MASK)) {
1946                 NS_WARN("read_byte: unexpected data output cycle, state is %s "
1947                         "return %#x\n", get_state_name(ns->state), (uint)outb);
1948                 return outb;
1949         }
1950
1951         /* Status register may be read as many times as it is wanted */
1952         if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) {
1953                 NS_DBG("read_byte: return %#x status\n", ns->regs.status);
1954                 return ns->regs.status;
1955         }
1956
1957         /* Check if there is any data in the internal buffer which may be read */
1958         if (ns->regs.count == ns->regs.num) {
1959                 NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb);
1960                 return outb;
1961         }
1962
1963         switch (NS_STATE(ns->state)) {
1964                 case STATE_DATAOUT:
1965                         if (ns->busw == 8) {
1966                                 outb = ns->buf.byte[ns->regs.count];
1967                                 ns->regs.count += 1;
1968                         } else {
1969                                 outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]);
1970                                 ns->regs.count += 2;
1971                         }
1972                         break;
1973                 case STATE_DATAOUT_ID:
1974                         NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num);
1975                         outb = ns->ids[ns->regs.count];
1976                         ns->regs.count += 1;
1977                         break;
1978                 default:
1979                         BUG();
1980         }
1981
1982         if (ns->regs.count == ns->regs.num) {
1983                 NS_DBG("read_byte: all bytes were read\n");
1984
1985                 if (NS_STATE(ns->nxstate) == STATE_READY)
1986                         switch_state(ns);
1987         }
1988
1989         return outb;
1990 }
1991
1992 static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte)
1993 {
1994         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1995
1996         /* Sanity and correctness checks */
1997         if (!ns->lines.ce) {
1998                 NS_ERR("write_byte: chip is disabled, ignore write\n");
1999                 return;
2000         }
2001         if (ns->lines.ale && ns->lines.cle) {
2002                 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n");
2003                 return;
2004         }
2005
2006         if (ns->lines.cle == 1) {
2007                 /*
2008                  * The byte written is a command.
2009                  */
2010
2011                 if (byte == NAND_CMD_RESET) {
2012                         NS_LOG("reset chip\n");
2013                         switch_to_ready_state(ns, NS_STATUS_OK(ns));
2014                         return;
2015                 }
2016
2017                 /* Check that the command byte is correct */
2018                 if (check_command(byte)) {
2019                         NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
2020                         return;
2021                 }
2022
2023                 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS
2024                         || NS_STATE(ns->state) == STATE_DATAOUT_STATUS_M
2025                         || NS_STATE(ns->state) == STATE_DATAOUT) {
2026                         int row = ns->regs.row;
2027
2028                         switch_state(ns);
2029                         if (byte == NAND_CMD_RNDOUT)
2030                                 ns->regs.row = row;
2031                 }
2032
2033                 /* Check if chip is expecting command */
2034                 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) {
2035                         /* Do not warn if only 2 id bytes are read */
2036                         if (!(ns->regs.command == NAND_CMD_READID &&
2037                             NS_STATE(ns->state) == STATE_DATAOUT_ID && ns->regs.count == 2)) {
2038                                 /*
2039                                  * We are in situation when something else (not command)
2040                                  * was expected but command was input. In this case ignore
2041                                  * previous command(s)/state(s) and accept the last one.
2042                                  */
2043                                 NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, "
2044                                         "ignore previous states\n", (uint)byte, get_state_name(ns->nxstate));
2045                         }
2046                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2047                 }
2048
2049                 NS_DBG("command byte corresponding to %s state accepted\n",
2050                         get_state_name(get_state_by_command(byte)));
2051                 ns->regs.command = byte;
2052                 switch_state(ns);
2053
2054         } else if (ns->lines.ale == 1) {
2055                 /*
2056                  * The byte written is an address.
2057                  */
2058
2059                 if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) {
2060
2061                         NS_DBG("write_byte: operation isn't known yet, identify it\n");
2062
2063                         if (find_operation(ns, 1) < 0)
2064                                 return;
2065
2066                         if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
2067                                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2068                                 return;
2069                         }
2070
2071                         ns->regs.count = 0;
2072                         switch (NS_STATE(ns->nxstate)) {
2073                                 case STATE_ADDR_PAGE:
2074                                         ns->regs.num = ns->geom.pgaddrbytes;
2075                                         break;
2076                                 case STATE_ADDR_SEC:
2077                                         ns->regs.num = ns->geom.secaddrbytes;
2078                                         break;
2079                                 case STATE_ADDR_ZERO:
2080                                         ns->regs.num = 1;
2081                                         break;
2082                                 default:
2083                                         BUG();
2084                         }
2085                 }
2086
2087                 /* Check that chip is expecting address */
2088                 if (!(ns->nxstate & STATE_ADDR_MASK)) {
2089                         NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, "
2090                                 "switch to STATE_READY\n", (uint)byte, get_state_name(ns->nxstate));
2091                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2092                         return;
2093                 }
2094
2095                 /* Check if this is expected byte */
2096                 if (ns->regs.count == ns->regs.num) {
2097                         NS_ERR("write_byte: no more address bytes expected\n");
2098                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2099                         return;
2100                 }
2101
2102                 accept_addr_byte(ns, byte);
2103
2104                 ns->regs.count += 1;
2105
2106                 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n",
2107                                 (uint)byte, ns->regs.count, ns->regs.num);
2108
2109                 if (ns->regs.count == ns->regs.num) {
2110                         NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column);
2111                         switch_state(ns);
2112                 }
2113
2114         } else {
2115                 /*
2116                  * The byte written is an input data.
2117                  */
2118
2119                 /* Check that chip is expecting data input */
2120                 if (!(ns->state & STATE_DATAIN_MASK)) {
2121                         NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, "
2122                                 "switch to %s\n", (uint)byte,
2123                                 get_state_name(ns->state), get_state_name(STATE_READY));
2124                         switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2125                         return;
2126                 }
2127
2128                 /* Check if this is expected byte */
2129                 if (ns->regs.count == ns->regs.num) {
2130                         NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n",
2131                                         ns->regs.num);
2132                         return;
2133                 }
2134
2135                 if (ns->busw == 8) {
2136                         ns->buf.byte[ns->regs.count] = byte;
2137                         ns->regs.count += 1;
2138                 } else {
2139                         ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte);
2140                         ns->regs.count += 2;
2141                 }
2142         }
2143
2144         return;
2145 }
2146
2147 static void ns_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int bitmask)
2148 {
2149         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2150
2151         ns->lines.cle = bitmask & NAND_CLE ? 1 : 0;
2152         ns->lines.ale = bitmask & NAND_ALE ? 1 : 0;
2153         ns->lines.ce = bitmask & NAND_NCE ? 1 : 0;
2154
2155         if (cmd != NAND_CMD_NONE)
2156                 ns_nand_write_byte(mtd, cmd);
2157 }
2158
2159 static int ns_device_ready(struct mtd_info *mtd)
2160 {
2161         NS_DBG("device_ready\n");
2162         return 1;
2163 }
2164
2165 static uint16_t ns_nand_read_word(struct mtd_info *mtd)
2166 {
2167         struct nand_chip *chip = (struct nand_chip *)mtd->priv;
2168
2169         NS_DBG("read_word\n");
2170
2171         return chip->read_byte(mtd) | (chip->read_byte(mtd) << 8);
2172 }
2173
2174 static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
2175 {
2176         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2177
2178         /* Check that chip is expecting data input */
2179         if (!(ns->state & STATE_DATAIN_MASK)) {
2180                 NS_ERR("write_buf: data input isn't expected, state is %s, "
2181                         "switch to STATE_READY\n", get_state_name(ns->state));
2182                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2183                 return;
2184         }
2185
2186         /* Check if these are expected bytes */
2187         if (ns->regs.count + len > ns->regs.num) {
2188                 NS_ERR("write_buf: too many input bytes\n");
2189                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2190                 return;
2191         }
2192
2193         memcpy(ns->buf.byte + ns->regs.count, buf, len);
2194         ns->regs.count += len;
2195
2196         if (ns->regs.count == ns->regs.num) {
2197                 NS_DBG("write_buf: %d bytes were written\n", ns->regs.count);
2198         }
2199 }
2200
2201 static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
2202 {
2203         struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2204
2205         /* Sanity and correctness checks */
2206         if (!ns->lines.ce) {
2207                 NS_ERR("read_buf: chip is disabled\n");
2208                 return;
2209         }
2210         if (ns->lines.ale || ns->lines.cle) {
2211                 NS_ERR("read_buf: ALE or CLE pin is high\n");
2212                 return;
2213         }
2214         if (!(ns->state & STATE_DATAOUT_MASK)) {
2215                 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n",
2216                         get_state_name(ns->state));
2217                 return;
2218         }
2219
2220         if (NS_STATE(ns->state) != STATE_DATAOUT) {
2221                 int i;
2222
2223                 for (i = 0; i < len; i++)
2224                         buf[i] = ((struct nand_chip *)mtd->priv)->read_byte(mtd);
2225
2226                 return;
2227         }
2228
2229         /* Check if these are expected bytes */
2230         if (ns->regs.count + len > ns->regs.num) {
2231                 NS_ERR("read_buf: too many bytes to read\n");
2232                 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2233                 return;
2234         }
2235
2236         memcpy(buf, ns->buf.byte + ns->regs.count, len);
2237         ns->regs.count += len;
2238
2239         if (ns->regs.count == ns->regs.num) {
2240                 if (NS_STATE(ns->nxstate) == STATE_READY)
2241                         switch_state(ns);
2242         }
2243
2244         return;
2245 }
2246
2247 /*
2248  * Module initialization function
2249  */
2250 static int __init ns_init_module(void)
2251 {
2252         struct nand_chip *chip;
2253         struct nandsim *nand;
2254         int retval = -ENOMEM, i;
2255
2256         if (bus_width != 8 && bus_width != 16) {
2257                 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width);
2258                 return -EINVAL;
2259         }
2260
2261         /* Allocate and initialize mtd_info, nand_chip and nandsim structures */
2262         nsmtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip)
2263                                 + sizeof(struct nandsim), GFP_KERNEL);
2264         if (!nsmtd) {
2265                 NS_ERR("unable to allocate core structures.\n");
2266                 return -ENOMEM;
2267         }
2268         chip        = (struct nand_chip *)(nsmtd + 1);
2269         nsmtd->priv = (void *)chip;
2270         nand        = (struct nandsim *)(chip + 1);
2271         chip->priv  = (void *)nand;
2272
2273         /*
2274          * Register simulator's callbacks.
2275          */
2276         chip->cmd_ctrl   = ns_hwcontrol;
2277         chip->read_byte  = ns_nand_read_byte;
2278         chip->dev_ready  = ns_device_ready;
2279         chip->write_buf  = ns_nand_write_buf;
2280         chip->read_buf   = ns_nand_read_buf;
2281         chip->read_word  = ns_nand_read_word;
2282         chip->ecc.mode   = NAND_ECC_SOFT;
2283         /* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
2284         /* and 'badblocks' parameters to work */
2285         chip->options   |= NAND_SKIP_BBTSCAN;
2286
2287         switch (bbt) {
2288         case 2:
2289                  chip->bbt_options |= NAND_BBT_NO_OOB;
2290         case 1:
2291                  chip->bbt_options |= NAND_BBT_USE_FLASH;
2292         case 0:
2293                 break;
2294         default:
2295                 NS_ERR("bbt has to be 0..2\n");
2296                 retval = -EINVAL;
2297                 goto error;
2298         }
2299         /*
2300          * Perform minimum nandsim structure initialization to handle
2301          * the initial ID read command correctly
2302          */
2303         if (third_id_byte != 0xFF || fourth_id_byte != 0xFF)
2304                 nand->geom.idbytes = 4;
2305         else
2306                 nand->geom.idbytes = 2;
2307         nand->regs.status = NS_STATUS_OK(nand);
2308         nand->nxstate = STATE_UNKNOWN;
2309         nand->options |= OPT_PAGE256; /* temporary value */
2310         nand->ids[0] = first_id_byte;
2311         nand->ids[1] = second_id_byte;
2312         nand->ids[2] = third_id_byte;
2313         nand->ids[3] = fourth_id_byte;
2314         if (bus_width == 16) {
2315                 nand->busw = 16;
2316                 chip->options |= NAND_BUSWIDTH_16;
2317         }
2318
2319         nsmtd->owner = THIS_MODULE;
2320
2321         if ((retval = parse_weakblocks()) != 0)
2322                 goto error;
2323
2324         if ((retval = parse_weakpages()) != 0)
2325                 goto error;
2326
2327         if ((retval = parse_gravepages()) != 0)
2328                 goto error;
2329
2330         retval = nand_scan_ident(nsmtd, 1, NULL);
2331         if (retval) {
2332                 NS_ERR("cannot scan NAND Simulator device\n");
2333                 if (retval > 0)
2334                         retval = -ENXIO;
2335                 goto error;
2336         }
2337
2338         if (bch) {
2339                 unsigned int eccsteps, eccbytes;
2340                 if (!mtd_nand_has_bch()) {
2341                         NS_ERR("BCH ECC support is disabled\n");
2342                         retval = -EINVAL;
2343                         goto error;
2344                 }
2345                 /* use 512-byte ecc blocks */
2346                 eccsteps = nsmtd->writesize/512;
2347                 eccbytes = (bch*13+7)/8;
2348                 /* do not bother supporting small page devices */
2349                 if ((nsmtd->oobsize < 64) || !eccsteps) {
2350                         NS_ERR("bch not available on small page devices\n");
2351                         retval = -EINVAL;
2352                         goto error;
2353                 }
2354                 if ((eccbytes*eccsteps+2) > nsmtd->oobsize) {
2355                         NS_ERR("invalid bch value %u\n", bch);
2356                         retval = -EINVAL;
2357                         goto error;
2358                 }
2359                 chip->ecc.mode = NAND_ECC_SOFT_BCH;
2360                 chip->ecc.size = 512;
2361                 chip->ecc.bytes = eccbytes;
2362                 NS_INFO("using %u-bit/%u bytes BCH ECC\n", bch, chip->ecc.size);
2363         }
2364
2365         retval = nand_scan_tail(nsmtd);
2366         if (retval) {
2367                 NS_ERR("can't register NAND Simulator\n");
2368                 if (retval > 0)
2369                         retval = -ENXIO;
2370                 goto error;
2371         }
2372
2373         if (overridesize) {
2374                 uint64_t new_size = (uint64_t)nsmtd->erasesize << overridesize;
2375                 if (new_size >> overridesize != nsmtd->erasesize) {
2376                         NS_ERR("overridesize is too big\n");
2377                         retval = -EINVAL;
2378                         goto err_exit;
2379                 }
2380                 /* N.B. This relies on nand_scan not doing anything with the size before we change it */
2381                 nsmtd->size = new_size;
2382                 chip->chipsize = new_size;
2383                 chip->chip_shift = ffs(nsmtd->erasesize) + overridesize - 1;
2384                 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
2385         }
2386
2387         if ((retval = setup_wear_reporting(nsmtd)) != 0)
2388                 goto err_exit;
2389
2390         if ((retval = nandsim_debugfs_create(nand)) != 0)
2391                 goto err_exit;
2392
2393         if ((retval = init_nandsim(nsmtd)) != 0)
2394                 goto err_exit;
2395
2396         if ((retval = nand_default_bbt(nsmtd)) != 0)
2397                 goto err_exit;
2398
2399         if ((retval = parse_badblocks(nand, nsmtd)) != 0)
2400                 goto err_exit;
2401
2402         /* Register NAND partitions */
2403         retval = mtd_device_register(nsmtd, &nand->partitions[0],
2404                                      nand->nbparts);
2405         if (retval != 0)
2406                 goto err_exit;
2407
2408         return 0;
2409
2410 err_exit:
2411         free_nandsim(nand);
2412         nand_release(nsmtd);
2413         for (i = 0;i < ARRAY_SIZE(nand->partitions); ++i)
2414                 kfree(nand->partitions[i].name);
2415 error:
2416         kfree(nsmtd);
2417         free_lists();
2418
2419         return retval;
2420 }
2421
2422 module_init(ns_init_module);
2423
2424 /*
2425  * Module clean-up function
2426  */
2427 static void __exit ns_cleanup_module(void)
2428 {
2429         struct nandsim *ns = ((struct nand_chip *)nsmtd->priv)->priv;
2430         int i;
2431
2432         nandsim_debugfs_remove(ns);
2433         free_nandsim(ns);    /* Free nandsim private resources */
2434         nand_release(nsmtd); /* Unregister driver */
2435         for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i)
2436                 kfree(ns->partitions[i].name);
2437         kfree(nsmtd);        /* Free other structures */
2438         free_lists();
2439 }
2440
2441 module_exit(ns_cleanup_module);
2442
2443 MODULE_LICENSE ("GPL");
2444 MODULE_AUTHOR ("Artem B. Bityuckiy");
2445 MODULE_DESCRIPTION ("The NAND flash simulator");