power: reset: palmas: add DT support
[linux-3.10.git] / drivers / mfd / palmas.c
1 /*
2  * TI Palmas MFD Driver
3  *
4  * Copyright 2011-2012 Texas Instruments Inc.
5  * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
6  *
7  * Author: Graeme Gregory <gg@slimlogic.co.uk>
8  *
9  *  This program is free software; you can redistribute it and/or modify it
10  *  under  the terms of the GNU General  Public License as published by the
11  *  Free Software Foundation;  either version 2 of the License, or (at your
12  *  option) any later version.
13  *
14  */
15
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <linux/init.h>
19 #include <linux/slab.h>
20 #include <linux/i2c.h>
21 #include <linux/interrupt.h>
22 #include <linux/irq.h>
23 #include <linux/irqdomain.h>
24 #include <linux/regmap.h>
25 #include <linux/err.h>
26 #include <linux/mfd/core.h>
27 #include <linux/mfd/palmas.h>
28 #include <linux/of.h>
29 #include <linux/of_device.h>
30 #include <linux/of_platform.h>
31
32 #define EXT_PWR_REQ (PALMAS_EXT_CONTROL_ENABLE1 |       \
33                         PALMAS_EXT_CONTROL_ENABLE2 |    \
34                         PALMAS_EXT_CONTROL_NSLEEP)
35
36 static const struct resource charger_resource[] = {
37         {
38                 .name = "PALMAS-CHARGER",
39                 .start = PALMAS_CHARGER_IRQ,
40                 .end = PALMAS_CHARGER_IRQ,
41                 .flags = IORESOURCE_IRQ,
42         },
43 };
44
45 static const struct resource thermal_resource[] = {
46         {
47                 .name = "palmas-junction-temp",
48                 .start = PALMAS_HOTDIE_IRQ,
49                 .end = PALMAS_HOTDIE_IRQ,
50                 .flags = IORESOURCE_IRQ,
51         },
52 };
53
54 enum palmas_ids {
55         PALMAS_PIN_MUX_ID = 0,
56         PALMAS_PMIC_ID,
57         PALMAS_GPIO_ID,
58         PALMAS_LEDS_ID,
59         PALMAS_WDT_ID,
60         PALMAS_RTC_ID,
61         PALMAS_PWRBUTTON_ID,
62         PALMAS_GPADC_ID,
63         PALMAS_RESOURCE_ID,
64         PALMAS_CLK_ID,
65         PALMAS_PWM_ID,
66         PALMAS_USB_ID,
67         PALMAS_EXTCON_ID,
68         PALMAS_BATTERY_GAUGE_ID,
69         PALMAS_CHARGER_ID,
70         PALMAS_SIM_ID,
71         PALMAS_PM_ID,
72         PALMAS_THERM_ID,
73 };
74
75 static struct resource palmas_rtc_resources[] = {
76         {
77                 .start  = PALMAS_RTC_ALARM_IRQ,
78                 .end    = PALMAS_RTC_ALARM_IRQ,
79                 .flags  = IORESOURCE_IRQ,
80         },
81 };
82
83 #define TPS65913_SUB_MODULE     (BIT(PALMAS_PIN_MUX_ID) |               \
84                 BIT(PALMAS_PMIC_ID) | BIT(PALMAS_GPIO_ID) |             \
85                 BIT(PALMAS_LEDS_ID) | BIT(PALMAS_WDT_ID) |              \
86                 BIT(PALMAS_RTC_ID) | BIT(PALMAS_PWRBUTTON_ID) |         \
87                 BIT(PALMAS_GPADC_ID) |  BIT(PALMAS_RESOURCE_ID) |       \
88                 BIT(PALMAS_CLK_ID) | BIT(PALMAS_PWM_ID)         |       \
89                 BIT(PALMAS_USB_ID) | BIT(PALMAS_EXTCON_ID)      |       \
90                 BIT(PALMAS_PM_ID) | BIT(PALMAS_THERM_ID))
91
92 #define TPS80036_SUB_MODULE     (TPS65913_SUB_MODULE |                  \
93                 BIT(PALMAS_BATTERY_GAUGE_ID) | BIT(PALMAS_CHARGER_ID) | \
94                 BIT(PALMAS_SIM_ID))
95
96 static unsigned int submodule_lists[PALMAS_MAX_CHIP_ID] = {
97         [PALMAS]        = TPS65913_SUB_MODULE,
98         [TWL6035]       = TPS65913_SUB_MODULE,
99         [TWL6037]       = TPS65913_SUB_MODULE,
100         [TPS65913]      = TPS65913_SUB_MODULE,
101         [TPS80036]      = TPS80036_SUB_MODULE,
102 };
103
104 static const struct mfd_cell palmas_children[] = {
105         {
106                 .name = "palmas-pinctrl",
107                 .id = PALMAS_PIN_MUX_ID,
108         },
109         {
110                 .name = "palmas-pmic",
111                 .id = PALMAS_PMIC_ID,
112         },
113         {
114                 .name = "palmas-gpio",
115                 .id = PALMAS_GPIO_ID,
116         },
117         {
118                 .name = "palmas-leds",
119                 .id = PALMAS_LEDS_ID,
120         },
121         {
122                 .name = "palmas-wdt",
123                 .id = PALMAS_WDT_ID,
124         },
125         {
126                 .name = "palmas-rtc",
127                 .id = PALMAS_RTC_ID,
128                 .resources = &palmas_rtc_resources[0],
129                 .num_resources = ARRAY_SIZE(palmas_rtc_resources),
130         },
131         {
132                 .name = "palmas-pwrbutton",
133                 .id = PALMAS_PWRBUTTON_ID,
134         },
135         {
136                 .name = "palmas-gpadc",
137                 .id = PALMAS_GPADC_ID,
138         },
139         {
140                 .name = "palmas-resource",
141                 .id = PALMAS_RESOURCE_ID,
142         },
143         {
144                 .name = "palmas-clk",
145                 .id = PALMAS_CLK_ID,
146         },
147         {
148                 .name = "palmas-pwm",
149                 .id = PALMAS_PWM_ID,
150         },
151         {
152                 .name = "palmas-usb",
153                 .id = PALMAS_USB_ID,
154         },
155         {
156                 .name = "palmas-extcon",
157                 .id = PALMAS_EXTCON_ID,
158         },
159         {
160                 .name = "palmas-battery-gauge",
161                 .id = PALMAS_BATTERY_GAUGE_ID,
162         },
163         {
164                 .name = "palmas-charger",
165                 .id = PALMAS_CHARGER_ID,
166                 .num_resources = ARRAY_SIZE(charger_resource),
167                 .resources = charger_resource,
168         },
169         {
170                 .name = "palmas-sim",
171                 .id = PALMAS_SIM_ID,
172         },
173         {
174                 .name = "palmas-pm",
175                 .id = PALMAS_PM_ID,
176         },
177         {
178                 .name = "palmas-thermal",
179                 .num_resources = ARRAY_SIZE(thermal_resource),
180                 .resources = thermal_resource,
181                 .id = PALMAS_THERM_ID,
182         },
183 };
184
185 static bool is_volatile_palma_func_reg(struct device *dev, unsigned int reg)
186 {
187         if ((reg >= (PALMAS_SMPS12_CTRL + 0x20)) &&
188                         (reg <= (PALMAS_SMPS9_VOLTAGE + 0x20)))
189                 return false;
190         return true;
191 }
192
193 static const struct regmap_config palmas_regmap_config[PALMAS_NUM_CLIENTS] = {
194         {
195                 .reg_bits = 8,
196                 .val_bits = 8,
197                 .max_register = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
198                                         PALMAS_PRIMARY_SECONDARY_PAD4),
199                 .volatile_reg = is_volatile_palma_func_reg,
200                 .cache_type  = REGCACHE_RBTREE,
201         },
202         {
203                 .reg_bits = 8,
204                 .val_bits = 8,
205                 .max_register = PALMAS_BASE_TO_REG(PALMAS_GPADC_BASE,
206                                         PALMAS_GPADC_SMPS_VSEL_MONITORING),
207         },
208         {
209                 .reg_bits = 8,
210                 .val_bits = 8,
211                 .max_register = PALMAS_BASE_TO_REG(PALMAS_TRIM_GPADC_BASE,
212                                         PALMAS_GPADC_TRIM16),
213         },
214         {
215                 .reg_bits = 8,
216                 .val_bits = 8,
217                 .max_register = PALMAS_BASE_TO_REG(PALMAS_CHARGER_BASE,
218                                         PALMAS_CHARGER_REG10),
219         },
220 };
221
222 static const int palmas_i2c_ids[PALMAS_NUM_CLIENTS] = {
223         0x58,
224         0x59,
225         0x5a,
226         0x6a,
227 };
228
229 struct palmas_regs {
230         int reg_base;
231         int reg_add;
232 };
233
234 struct palmas_irq_regs {
235         struct palmas_regs mask_reg[PALMAS_MAX_INTERRUPT_MASK_REG];
236         struct palmas_regs status_reg[PALMAS_MAX_INTERRUPT_MASK_REG];
237         struct palmas_regs edge_reg[PALMAS_MAX_INTERRUPT_EDGE_REG];
238 };
239
240 #define PALMAS_REGS(base, add)  { .reg_base = base, .reg_add = add, }
241 static struct palmas_irq_regs palmas_irq_regs = {
242         .mask_reg = {
243                 PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT1_MASK),
244                 PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT2_MASK),
245                 PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT3_MASK),
246                 PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT4_MASK),
247                 PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT5_MASK),
248                 PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT6_MASK),
249         },
250         .status_reg = {
251                 PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT1_STATUS),
252                 PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT2_STATUS),
253                 PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT3_STATUS),
254                 PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT4_STATUS),
255                 PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT5_STATUS),
256                 PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT6_STATUS),
257         },
258         .edge_reg = {
259                 PALMAS_REGS(PALMAS_INTERRUPT_BASE,
260                                         PALMAS_INT1_EDGE_DETECT1_RESERVED),
261                 PALMAS_REGS(PALMAS_INTERRUPT_BASE,
262                                         PALMAS_INT1_EDGE_DETECT2_RESERVED),
263                 PALMAS_REGS(PALMAS_INTERRUPT_BASE,
264                                         PALMAS_INT2_EDGE_DETECT1_RESERVED),
265                 PALMAS_REGS(PALMAS_INTERRUPT_BASE,
266                                         PALMAS_INT2_EDGE_DETECT2_RESERVED),
267                 PALMAS_REGS(PALMAS_INTERRUPT_BASE,
268                                         PALMAS_INT3_EDGE_DETECT1_RESERVED),
269                 PALMAS_REGS(PALMAS_INTERRUPT_BASE,
270                                         PALMAS_INT3_EDGE_DETECT2_RESERVED),
271                 PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT4_EDGE_DETECT1),
272                 PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT4_EDGE_DETECT2),
273                 PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT5_EDGE_DETECT1),
274                 PALMAS_REGS(PALMAS_INTERRUPT_BASE, PALMAS_INT5_EDGE_DETECT2),
275                 PALMAS_REGS(PALMAS_INTERRUPT_BASE,
276                                         PALMAS_INT6_EDGE_DETECT1_RESERVED),
277                 PALMAS_REGS(PALMAS_INTERRUPT_BASE,
278                                         PALMAS_INT6_EDGE_DETECT2_RESERVED),
279         },
280 };
281
282 struct palmas_irq {
283         unsigned int    interrupt_mask;
284         unsigned int    rising_mask;
285         unsigned int    falling_mask;
286         unsigned int    edge_mask;
287         unsigned int    mask_reg_index;
288         unsigned int    edge_reg_index;
289 };
290
291 #define PALMAS_IRQ(_nr, _imask, _mrindex, _rmask, _fmask, _erindex)     \
292 [PALMAS_##_nr] = {                                                      \
293                         .interrupt_mask = PALMAS_##_imask,              \
294                         .mask_reg_index = _mrindex,                     \
295                         .rising_mask = _rmask,                          \
296                         .falling_mask = _fmask,                         \
297                         .edge_mask = _rmask | _fmask,                   \
298                         .edge_reg_index = _erindex                      \
299                 }
300
301 static struct palmas_irq palmas_irqs[] = {
302         /* INT1 IRQs */
303         PALMAS_IRQ(CHARG_DET_N_VBUS_OVV_IRQ,
304                         INT1_STATUS_CHARG_DET_N_VBUS_OVV, 0, 0, 0, 0),
305         PALMAS_IRQ(PWRON_IRQ, INT1_STATUS_PWRON, 0, 0, 0, 0),
306         PALMAS_IRQ(LONG_PRESS_KEY_IRQ, INT1_STATUS_LONG_PRESS_KEY, 0, 0, 0, 0),
307         PALMAS_IRQ(RPWRON_IRQ, INT1_STATUS_RPWRON, 0, 0, 0, 0),
308         PALMAS_IRQ(PWRDOWN_IRQ, INT1_STATUS_PWRDOWN, 0, 0, 0, 0),
309         PALMAS_IRQ(HOTDIE_IRQ, INT1_STATUS_HOTDIE, 0, 0, 0, 0),
310         PALMAS_IRQ(VSYS_MON_IRQ, INT1_STATUS_VSYS_MON, 0, 0, 0, 0),
311         PALMAS_IRQ(VBAT_MON_IRQ, INT1_STATUS_VBAT_MON, 0, 0, 0, 0),
312         /* INT2 IRQs */
313         PALMAS_IRQ(RTC_ALARM_IRQ, INT2_STATUS_RTC_ALARM, 1, 0, 0, 0),
314         PALMAS_IRQ(RTC_TIMER_IRQ, INT2_STATUS_RTC_TIMER, 1, 0, 0, 0),
315         PALMAS_IRQ(WDT_IRQ, INT2_STATUS_WDT, 1, 0, 0, 0),
316         PALMAS_IRQ(BATREMOVAL_IRQ, INT2_STATUS_BATREMOVAL, 1, 0, 0, 0),
317         PALMAS_IRQ(RESET_IN_IRQ, INT2_STATUS_RESET_IN, 1, 0, 0, 0),
318         PALMAS_IRQ(FBI_BB_IRQ, INT2_STATUS_FBI_BB, 1, 0, 0, 0),
319         PALMAS_IRQ(SHORT_IRQ, INT2_STATUS_SHORT, 1, 0, 0, 0),
320         PALMAS_IRQ(VAC_ACOK_IRQ, INT2_STATUS_VAC_ACOK, 1, 0, 0, 0),
321         /* INT3 IRQs */
322         PALMAS_IRQ(GPADC_AUTO_0_IRQ, INT3_STATUS_GPADC_AUTO_0, 2, 0, 0, 0),
323         PALMAS_IRQ(GPADC_AUTO_1_IRQ, INT3_STATUS_GPADC_AUTO_1, 2, 0, 0, 0),
324         PALMAS_IRQ(GPADC_EOC_SW_IRQ, INT3_STATUS_GPADC_EOC_SW, 2, 0, 0, 0),
325         PALMAS_IRQ(GPADC_EOC_RT_IRQ, INT3_STATUS_GPADC_EOC_RT, 2, 0, 0, 0),
326         PALMAS_IRQ(ID_OTG_IRQ, INT3_STATUS_ID_OTG, 2, 0, 0, 0),
327         PALMAS_IRQ(ID_IRQ, INT3_STATUS_ID, 2, 0, 0, 0),
328         PALMAS_IRQ(VBUS_OTG_IRQ, INT3_STATUS_VBUS_OTG, 2, 0, 0, 0),
329         PALMAS_IRQ(VBUS_IRQ, INT3_STATUS_VBUS, 2, 0, 0, 0),
330         /* INT4 IRQs */
331         PALMAS_IRQ(GPIO_0_IRQ, INT4_STATUS_GPIO_0, 3,
332                         PALMAS_INT4_EDGE_DETECT1_GPIO_0_RISING,
333                         PALMAS_INT4_EDGE_DETECT1_GPIO_0_FALLING, 6),
334         PALMAS_IRQ(GPIO_1_IRQ, INT4_STATUS_GPIO_1, 3,
335                         PALMAS_INT4_EDGE_DETECT1_GPIO_1_RISING,
336                         PALMAS_INT4_EDGE_DETECT1_GPIO_1_FALLING, 6),
337         PALMAS_IRQ(GPIO_2_IRQ, INT4_STATUS_GPIO_2, 3,
338                         PALMAS_INT4_EDGE_DETECT1_GPIO_2_RISING,
339                         PALMAS_INT4_EDGE_DETECT1_GPIO_2_FALLING, 6),
340         PALMAS_IRQ(GPIO_3_IRQ, INT4_STATUS_GPIO_3, 3,
341                         PALMAS_INT4_EDGE_DETECT1_GPIO_3_RISING,
342                         PALMAS_INT4_EDGE_DETECT1_GPIO_3_FALLING, 6),
343         PALMAS_IRQ(GPIO_4_IRQ, INT4_STATUS_GPIO_4, 3,
344                         PALMAS_INT4_EDGE_DETECT2_GPIO_4_RISING,
345                         PALMAS_INT4_EDGE_DETECT2_GPIO_4_FALLING, 7),
346         PALMAS_IRQ(GPIO_5_IRQ, INT4_STATUS_GPIO_5, 3,
347                         PALMAS_INT4_EDGE_DETECT2_GPIO_5_RISING,
348                         PALMAS_INT4_EDGE_DETECT2_GPIO_5_FALLING, 7),
349         PALMAS_IRQ(GPIO_6_IRQ, INT4_STATUS_GPIO_6, 3,
350                         PALMAS_INT4_EDGE_DETECT2_GPIO_6_RISING,
351                         PALMAS_INT4_EDGE_DETECT2_GPIO_6_FALLING, 7),
352         PALMAS_IRQ(GPIO_7_IRQ, INT4_STATUS_GPIO_7, 3,
353                         PALMAS_INT4_EDGE_DETECT2_GPIO_7_RISING,
354                         PALMAS_INT4_EDGE_DETECT2_GPIO_7_FALLING, 7),
355         /* INT5 IRQs */
356         PALMAS_IRQ(GPIO_8_IRQ, INT5_STATUS_GPIO_8, 4,
357                         PALMAS_INT5_EDGE_DETECT1_GPIO_8_RISING,
358                         PALMAS_INT5_EDGE_DETECT1_GPIO_8_FALLING, 8),
359         PALMAS_IRQ(GPIO_9_IRQ, INT5_STATUS_GPIO_9, 4,
360                         PALMAS_INT5_EDGE_DETECT1_GPIO_9_RISING,
361                         PALMAS_INT5_EDGE_DETECT1_GPIO_9_FALLING, 8),
362         PALMAS_IRQ(GPIO_10_IRQ, INT5_STATUS_GPIO_10, 4,
363                         PALMAS_INT5_EDGE_DETECT1_GPIO_10_RISING,
364                         PALMAS_INT5_EDGE_DETECT1_GPIO_10_FALLING, 8),
365         PALMAS_IRQ(GPIO_11_IRQ, INT5_STATUS_GPIO_11, 4,
366                         PALMAS_INT5_EDGE_DETECT1_GPIO_11_RISING,
367                         PALMAS_INT5_EDGE_DETECT1_GPIO_11_FALLING, 8),
368         PALMAS_IRQ(GPIO_12_IRQ, INT5_STATUS_GPIO_12, 4,
369                         PALMAS_INT5_EDGE_DETECT2_GPIO_12_RISING,
370                         PALMAS_INT5_EDGE_DETECT2_GPIO_12_FALLING, 9),
371         PALMAS_IRQ(GPIO_13_IRQ, INT5_STATUS_GPIO_13, 4,
372                         PALMAS_INT5_EDGE_DETECT2_GPIO_13_RISING,
373                         PALMAS_INT5_EDGE_DETECT2_GPIO_13_FALLING, 9),
374         PALMAS_IRQ(GPIO_14_IRQ, INT5_STATUS_GPIO_14, 4,
375                         PALMAS_INT5_EDGE_DETECT2_GPIO_14_RISING,
376                         PALMAS_INT5_EDGE_DETECT2_GPIO_14_FALLING, 9),
377         PALMAS_IRQ(GPIO_15_IRQ, INT5_STATUS_GPIO_15, 4,
378                         PALMAS_INT5_EDGE_DETECT2_GPIO_15_RISING,
379                         PALMAS_INT5_EDGE_DETECT2_GPIO_15_FALLING, 9),
380         /* INT6 IRQs */
381         PALMAS_IRQ(SIM1_IRQ, INT6_STATUS_SIM1, 5, 0, 0, 0),
382         PALMAS_IRQ(SIM2_IRQ, INT6_STATUS_SIM2, 5, 0, 0, 0),
383 };
384
385 struct palmas_irq_chip_data {
386         struct palmas           *palmas;
387         int                     irq_base;
388         int                     irq;
389         struct mutex            irq_lock;
390         struct irq_chip         irq_chip;
391         struct irq_domain       *domain;
392
393         struct palmas_irq_regs  *irq_regs;
394         struct palmas_irq       *irqs;
395         int                     num_irqs;
396         unsigned int            mask_value[PALMAS_MAX_INTERRUPT_MASK_REG];
397         unsigned int            status_value[PALMAS_MAX_INTERRUPT_MASK_REG];
398         unsigned int            edge_value[PALMAS_MAX_INTERRUPT_EDGE_REG];
399         unsigned int            mask_def_value[PALMAS_MAX_INTERRUPT_MASK_REG];
400         unsigned int            edge_def_value[PALMAS_MAX_INTERRUPT_EDGE_REG];
401         int                     num_mask_regs;
402         int                     num_edge_regs;
403         int                     wake_count;
404 };
405
406 static inline const struct palmas_irq *irq_to_palmas_irq(
407         struct palmas_irq_chip_data *data, int irq)
408 {
409         return &data->irqs[irq];
410 }
411
412 static void palmas_irq_lock(struct irq_data *data)
413 {
414         struct palmas_irq_chip_data *d = irq_data_get_irq_chip_data(data);
415
416         mutex_lock(&d->irq_lock);
417 }
418
419 static void palmas_irq_sync_unlock(struct irq_data *data)
420 {
421         struct palmas_irq_chip_data *d = irq_data_get_irq_chip_data(data);
422         int i, ret;
423
424         for (i = 0; i < d->num_mask_regs; i++) {
425                 ret = palmas_update_bits(d->palmas,
426                                 d->irq_regs->mask_reg[i].reg_base,
427                                 d->irq_regs->mask_reg[i].reg_add,
428                                 d->mask_def_value[i], d->mask_value[i]);
429                 if (ret < 0)
430                         dev_err(d->palmas->dev, "Failed to sync masks in %x\n",
431                                         d->irq_regs->mask_reg[i].reg_add);
432         }
433
434         for (i = 0; i < d->num_edge_regs; i++) {
435                 if (!d->edge_def_value[i])
436                         continue;
437
438                 ret = palmas_update_bits(d->palmas,
439                                 d->irq_regs->edge_reg[i].reg_base,
440                                 d->irq_regs->edge_reg[i].reg_add,
441                                 d->edge_def_value[i], d->edge_value[i]);
442                 if (ret < 0)
443                         dev_err(d->palmas->dev, "Failed to sync edge in %x\n",
444                                         d->irq_regs->edge_reg[i].reg_add);
445         }
446
447         /* If we've changed our wakeup count propagate it to the parent */
448         if (d->wake_count < 0)
449                 for (i = d->wake_count; i < 0; i++)
450                         irq_set_irq_wake(d->irq, 0);
451         else if (d->wake_count > 0)
452                 for (i = 0; i < d->wake_count; i++)
453                         irq_set_irq_wake(d->irq, 1);
454
455         d->wake_count = 0;
456
457         mutex_unlock(&d->irq_lock);
458 }
459
460 static void palmas_irq_enable(struct irq_data *data)
461 {
462         struct palmas_irq_chip_data *d = irq_data_get_irq_chip_data(data);
463         const struct palmas_irq *irq_data = irq_to_palmas_irq(d, data->hwirq);
464
465         d->mask_value[irq_data->mask_reg_index] &= ~irq_data->interrupt_mask;
466 }
467
468 static void palmas_irq_disable(struct irq_data *data)
469 {
470         struct palmas_irq_chip_data *d = irq_data_get_irq_chip_data(data);
471         const struct palmas_irq *irq_data = irq_to_palmas_irq(d, data->hwirq);
472
473         d->mask_value[irq_data->mask_reg_index] |= irq_data->interrupt_mask;
474 }
475
476 static int palmas_irq_set_type(struct irq_data *data, unsigned int type)
477 {
478         struct palmas_irq_chip_data *d = irq_data_get_irq_chip_data(data);
479         const struct palmas_irq *irq_data = irq_to_palmas_irq(d, data->hwirq);
480         unsigned int reg = irq_data->edge_reg_index;
481
482         if (!irq_data->edge_mask)
483                 return 0;
484
485         d->edge_value[reg] &= ~irq_data->edge_mask;
486         switch (type) {
487         case IRQ_TYPE_EDGE_FALLING:
488                 d->edge_value[reg] |= irq_data->falling_mask;
489                 break;
490
491         case IRQ_TYPE_EDGE_RISING:
492                 d->edge_value[reg] |= irq_data->rising_mask;
493                 break;
494
495         case IRQ_TYPE_EDGE_BOTH:
496                 d->edge_value[reg] |= irq_data->edge_mask;
497                 break;
498
499         default:
500                 return -EINVAL;
501         }
502         return 0;
503 }
504
505 static int palmas_irq_set_wake(struct irq_data *data, unsigned int on)
506 {
507         struct palmas_irq_chip_data *d = irq_data_get_irq_chip_data(data);
508
509         if (on)
510                 d->wake_count++;
511         else
512                 d->wake_count--;
513
514         return 0;
515 }
516
517 static const struct irq_chip palmas_irq_chip = {
518         .irq_bus_lock           = palmas_irq_lock,
519         .irq_bus_sync_unlock    = palmas_irq_sync_unlock,
520         .irq_disable            = palmas_irq_disable,
521         .irq_enable             = palmas_irq_enable,
522         .irq_set_type           = palmas_irq_set_type,
523         .irq_set_wake           = palmas_irq_set_wake,
524 };
525
526 static irqreturn_t palmas_irq_thread(int irq, void *data)
527 {
528         struct palmas_irq_chip_data *d = data;
529         int ret, i;
530         bool handled = false;
531
532         for (i = 0; i < d->num_mask_regs; i++) {
533                 ret = palmas_read(d->palmas,
534                                 d->irq_regs->status_reg[i].reg_base,
535                                 d->irq_regs->status_reg[i].reg_add,
536                                 &d->status_value[i]);
537
538                 if (ret != 0) {
539                         dev_err(d->palmas->dev,
540                                 "Failed to read IRQ status: %d\n", ret);
541                         return IRQ_NONE;
542                 }
543                 d->status_value[i] &= ~d->mask_value[i];
544         }
545
546         for (i = 0; i < d->num_irqs; i++) {
547                 if (d->status_value[d->irqs[i].mask_reg_index] &
548                                 d->irqs[i].interrupt_mask) {
549                         handle_nested_irq(irq_find_mapping(d->domain, i));
550                         handled = true;
551                 }
552         }
553
554         if (handled)
555                 return IRQ_HANDLED;
556         else
557                 return IRQ_NONE;
558 }
559
560 static int palmas_irq_map(struct irq_domain *h, unsigned int virq,
561                           irq_hw_number_t hw)
562 {
563         struct palmas_irq_chip_data *data = h->host_data;
564
565         irq_set_chip_data(virq, data);
566         irq_set_chip(virq, &data->irq_chip);
567         irq_set_nested_thread(virq, 1);
568
569         /* ARM needs us to explicitly flag the IRQ as valid
570          * and will set them noprobe when we do so. */
571 #ifdef CONFIG_ARM
572         set_irq_flags(virq, IRQF_VALID);
573 #else
574         irq_set_noprobe(virq);
575 #endif
576
577         return 0;
578 }
579
580 static struct irq_domain_ops palmas_domain_ops = {
581         .map    = palmas_irq_map,
582         .xlate  = irq_domain_xlate_twocell,
583 };
584
585 static int palmas_add_irq_chip(struct palmas *palmas, int irq, int irq_flags,
586                         int irq_base, struct palmas_irq_chip_data **data)
587 {
588         struct palmas_irq_chip_data *d;
589         int i;
590         int ret;
591         unsigned int status_value;
592         int num_irqs = ARRAY_SIZE(palmas_irqs);
593
594         if (irq_base) {
595                 irq_base = irq_alloc_descs(irq_base, 0, num_irqs, 0);
596                 if (irq_base < 0) {
597                         dev_warn(palmas->dev, "Failed to allocate IRQs: %d\n",
598                                  irq_base);
599                         return irq_base;
600                 }
601         }
602
603         d = devm_kzalloc(palmas->dev, sizeof(*d), GFP_KERNEL);
604         if (!d) {
605                 dev_err(palmas->dev, "mem alloc for d failed\n");
606                 return -ENOMEM;
607         }
608
609         d->palmas = palmas;
610         d->irq = irq;
611         d->irq_base = irq_base;
612         mutex_init(&d->irq_lock);
613         d->irq_chip = palmas_irq_chip;
614         d->irq_chip.name = dev_name(palmas->dev);
615         d->irq_regs = &palmas_irq_regs;
616
617         d->irqs = palmas_irqs;
618         d->num_mask_regs = PALMAS_MAX_INTERRUPT_MASK_REG;
619         d->num_edge_regs = PALMAS_MAX_INTERRUPT_EDGE_REG;
620
621         if (palmas->id != TPS80036) {
622                 d->num_mask_regs = 4;
623                 d->num_edge_regs = 8;
624                 num_irqs = num_irqs - 8;
625         }
626
627         d->num_irqs = num_irqs;
628         d->wake_count = 0;
629         *data = d;
630
631         for (i = 0; i < d->num_irqs; i++) {
632                 d->mask_def_value[d->irqs[i].mask_reg_index] |=
633                                                 d->irqs[i].interrupt_mask;
634                 d->edge_def_value[d->irqs[i].edge_reg_index] |=
635                                                 d->irqs[i].edge_mask;
636         }
637
638         /* Mask all interrupts */
639         for (i = 0; i < d->num_mask_regs; i++) {
640                 d->mask_value[i] = d->mask_def_value[i];
641                 ret = palmas_update_bits(d->palmas,
642                                 d->irq_regs->mask_reg[i].reg_base,
643                                 d->irq_regs->mask_reg[i].reg_add,
644                                 d->mask_def_value[i], d->mask_value[i]);
645                 if (ret < 0)
646                         dev_err(d->palmas->dev, "Failed to update masks in %x\n",
647                                         d->irq_regs->mask_reg[i].reg_add);
648         }
649
650         /* Set edge registers */
651         for (i = 0; i < d->num_edge_regs; i++) {
652                 if (!d->edge_def_value[i])
653                         continue;
654
655                 ret = palmas_update_bits(d->palmas,
656                                 d->irq_regs->edge_reg[i].reg_base,
657                                 d->irq_regs->edge_reg[i].reg_add,
658                                 d->edge_def_value[i], 0);
659                 if (ret < 0)
660                         dev_err(palmas->dev, "Failed to sync edge in %x\n",
661                                         d->irq_regs->edge_reg[i].reg_add);
662         }
663
664         /* Clear all interrupts */
665         for (i = 0; i < d->num_mask_regs; i++) {
666                 ret = palmas_read(d->palmas,
667                                 d->irq_regs->status_reg[i].reg_base,
668                                 d->irq_regs->status_reg[i].reg_add,
669                                 &status_value);
670
671                 if (ret != 0) {
672                         dev_err(palmas->dev, "Failed to read status %x\n",
673                                 d->irq_regs->status_reg[i].reg_add);
674                 }
675         }
676
677         if (irq_base)
678                 d->domain = irq_domain_add_legacy(palmas->dev->of_node,
679                                                   num_irqs, irq_base, 0,
680                                                   &palmas_domain_ops, d);
681         else
682                 d->domain = irq_domain_add_linear(palmas->dev->of_node,
683                                                   num_irqs,
684                                                   &palmas_domain_ops, d);
685         if (!d->domain) {
686                 dev_err(palmas->dev, "Failed to create IRQ domain\n");
687                 return -ENOMEM;
688         }
689
690         ret = request_threaded_irq(irq, NULL, palmas_irq_thread, irq_flags,
691                                    dev_name(palmas->dev), d);
692         if (ret != 0) {
693                 dev_err(palmas->dev,
694                         "Failed to request IRQ %d: %d\n", irq, ret);
695                 return ret;
696         }
697
698         return 0;
699 }
700
701 static void palmas_del_irq_chip(int irq, struct palmas_irq_chip_data *d)
702 {
703         if (d)
704                 free_irq(irq, d);
705 }
706
707 int palmas_irq_get_virq(struct palmas *palmas, int irq)
708 {
709         struct palmas_irq_chip_data *data = palmas->irq_chip_data;
710
711         if (!data->irqs[irq].interrupt_mask)
712                 return -EINVAL;
713
714         return irq_create_mapping(data->domain, irq);
715 }
716 EXPORT_SYMBOL_GPL(palmas_irq_get_virq);
717
718 struct palmas_sleep_requestor_info {
719         int id;
720         int reg_offset;
721         int bit_pos;
722 };
723
724 #define SLEEP_REQUESTOR(_id, _offset, _pos)             \
725         [PALMAS_SLEEP_REQSTR_ID_##_id] = {              \
726                 .id = PALMAS_SLEEP_REQSTR_ID_##_id,     \
727                 .reg_offset = _offset,                  \
728                 .bit_pos = _pos,                        \
729         }
730
731 static struct palmas_sleep_requestor_info sleep_reqt_info[] = {
732         SLEEP_REQUESTOR(REGEN1, 0, 0),
733         SLEEP_REQUESTOR(REGEN2, 0, 1),
734         SLEEP_REQUESTOR(SYSEN1, 0, 2),
735         SLEEP_REQUESTOR(SYSEN2, 0, 3),
736         SLEEP_REQUESTOR(CLK32KG, 0, 4),
737         SLEEP_REQUESTOR(CLK32KGAUDIO, 0, 5),
738         SLEEP_REQUESTOR(REGEN3, 0, 6),
739         SLEEP_REQUESTOR(SMPS12, 1, 0),
740         SLEEP_REQUESTOR(SMPS3, 1, 1),
741         SLEEP_REQUESTOR(SMPS45, 1, 2),
742         SLEEP_REQUESTOR(SMPS6, 1, 3),
743         SLEEP_REQUESTOR(SMPS7, 1, 4),
744         SLEEP_REQUESTOR(SMPS8, 1, 5),
745         SLEEP_REQUESTOR(SMPS9, 1, 6),
746         SLEEP_REQUESTOR(SMPS10, 1, 7),
747         SLEEP_REQUESTOR(LDO1, 2, 0),
748         SLEEP_REQUESTOR(LDO2, 2, 1),
749         SLEEP_REQUESTOR(LDO3, 2, 2),
750         SLEEP_REQUESTOR(LDO4, 2, 3),
751         SLEEP_REQUESTOR(LDO5, 2, 4),
752         SLEEP_REQUESTOR(LDO6, 2, 5),
753         SLEEP_REQUESTOR(LDO7, 2, 6),
754         SLEEP_REQUESTOR(LDO8, 2, 7),
755         SLEEP_REQUESTOR(LDO9, 3, 0),
756         SLEEP_REQUESTOR(LDOLN, 3, 1),
757         SLEEP_REQUESTOR(LDOUSB, 3, 2),
758         SLEEP_REQUESTOR(LDO10, 3, 3),
759         SLEEP_REQUESTOR(LDO11, 3, 4),
760         SLEEP_REQUESTOR(LDO12, 3, 5),
761         SLEEP_REQUESTOR(LDO13, 3, 6),
762         SLEEP_REQUESTOR(LDO14, 3, 7),
763         SLEEP_REQUESTOR(REGEN4, 0, 7),
764         SLEEP_REQUESTOR(REGEN5, 18, 0),
765         SLEEP_REQUESTOR(REGEN7, 18, 2),
766 };
767
768 struct palmas_clk32k_info {
769         unsigned int control_reg;
770         unsigned int sleep_reqstr_id;
771 };
772
773 static struct palmas_clk32k_info palmas_clk32k_info[] = {
774         {
775                 .control_reg = PALMAS_CLK32KG_CTRL,
776                 .sleep_reqstr_id = PALMAS_SLEEP_REQSTR_ID_CLK32KG,
777         }, {
778                 .control_reg = PALMAS_CLK32KGAUDIO_CTRL,
779                 .sleep_reqstr_id = PALMAS_SLEEP_REQSTR_ID_CLK32KGAUDIO,
780         },
781 };
782
783 static int palmas_resource_write(struct palmas *palmas, unsigned int reg,
784         unsigned int value)
785 {
786         unsigned int addr = PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE, reg);
787
788         return regmap_write(palmas->regmap[0], addr, value);
789 }
790
791 static int palmas_resource_update(struct palmas *palmas, unsigned int reg,
792         unsigned int mask, unsigned int value)
793 {
794         unsigned int addr = PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE, reg);
795
796         return regmap_update_bits(palmas->regmap[0], addr, mask, value);
797 }
798
799 static int palmas_control_update(struct palmas *palmas, unsigned int reg,
800         unsigned int mask, unsigned int value)
801 {
802         unsigned int addr = PALMAS_BASE_TO_REG(PALMAS_PMU_CONTROL_BASE, reg);
803
804         return regmap_update_bits(palmas->regmap[0], addr, mask, value);
805 }
806
807 int palmas_ext_power_req_config(struct palmas *palmas,
808                 int id, int ext_pwr_ctrl, bool enable)
809 {
810         int preq_mask_bit = 0;
811         int ret;
812         int base_reg = 0;
813         int bit_pos;
814
815         if (!(ext_pwr_ctrl & EXT_PWR_REQ))
816                 return 0;
817
818         if (id >= PALMAS_SLEEP_REQSTR_ID_MAX)
819                 return 0;
820
821         if (palmas->id == TPS80036 && id == PALMAS_SLEEP_REQSTR_ID_REGEN3)
822                 return 0;
823
824         if (palmas->id != TPS80036 && id > PALMAS_SLEEP_REQSTR_ID_LDO14)
825                 return 0;
826
827         if (ext_pwr_ctrl & PALMAS_EXT_CONTROL_NSLEEP) {
828                 if (id <= PALMAS_SLEEP_REQSTR_ID_REGEN4)
829                         base_reg = PALMAS_NSLEEP_RES_ASSIGN;
830                 else
831                         base_reg = PALMAS_NSLEEP_RES_ASSIGN2;
832                 preq_mask_bit = 0;
833         } else if (ext_pwr_ctrl & PALMAS_EXT_CONTROL_ENABLE1) {
834                 if (id <= PALMAS_SLEEP_REQSTR_ID_REGEN4)
835                         base_reg = PALMAS_ENABLE1_RES_ASSIGN;
836                 else
837                         base_reg = PALMAS_ENABLE1_RES_ASSIGN2;
838                 preq_mask_bit = 1;
839         } else if (ext_pwr_ctrl & PALMAS_EXT_CONTROL_ENABLE2) {
840                 if (id <= PALMAS_SLEEP_REQSTR_ID_REGEN4)
841                         base_reg = PALMAS_ENABLE2_RES_ASSIGN;
842                 else
843                         base_reg = PALMAS_ENABLE2_RES_ASSIGN2;
844                 preq_mask_bit = 2;
845         }
846
847         bit_pos = sleep_reqt_info[id].bit_pos;
848         base_reg += sleep_reqt_info[id].reg_offset;
849         if (enable)
850                 ret = palmas_resource_update(palmas, base_reg,
851                                 BIT(bit_pos), BIT(bit_pos));
852         else
853                 ret = palmas_resource_update(palmas, base_reg,
854                                 BIT(bit_pos), 0);
855         if (ret < 0) {
856                 dev_err(palmas->dev, "Update on resource reg failed\n");
857                 return ret;
858         }
859
860         /* Unmask the PREQ */
861         ret = palmas_control_update(palmas, PALMAS_POWER_CTRL,
862                                 BIT(preq_mask_bit), 0);
863         if (ret < 0) {
864                 dev_err(palmas->dev, "Power control register update fails\n");
865                 return ret;
866         }
867
868         return ret;
869 }
870 EXPORT_SYMBOL_GPL(palmas_ext_power_req_config);
871
872 static void palmas_init_ext_control(struct palmas *palmas)
873 {
874         int ret;
875         int i;
876
877         /* Clear all external control for this rail */
878         for (i = 0; i < 12; ++i) {
879                 ret = palmas_resource_write(palmas,
880                                 PALMAS_NSLEEP_RES_ASSIGN + i, 0);
881                 if (ret < 0)
882                         dev_err(palmas->dev,
883                                 "Error in clearing res assign register\n");
884         }
885
886         /* Mask the PREQ */
887         ret = palmas_control_update(palmas, PALMAS_POWER_CTRL, 0x7, 0x7);
888         if (ret < 0)
889                 dev_err(palmas->dev, "Power control reg write failed\n");
890 }
891
892 static void palmas_clk32k_init(struct palmas *palmas,
893         struct palmas_platform_data *pdata)
894 {
895         int ret;
896         struct palmas_clk32k_init_data *clk32_idata = pdata->clk32k_init_data;
897         int data_size = pdata->clk32k_init_data_size;
898         unsigned int reg;
899         int i;
900         int id;
901
902         if (!clk32_idata || !data_size)
903                 return;
904
905         for (i = 0; i < data_size; ++i) {
906                 struct palmas_clk32k_init_data *clk32_pd =  &clk32_idata[i];
907
908                 reg = palmas_clk32k_info[clk32_pd->clk32k_id].control_reg;
909                 if (clk32_pd->enable)
910                         ret = palmas_resource_update(palmas, reg,
911                                         PALMAS_CLK32KG_CTRL_MODE_ACTIVE,
912                                         PALMAS_CLK32KG_CTRL_MODE_ACTIVE);
913                 else
914                         ret = palmas_resource_update(palmas, reg,
915                                         PALMAS_CLK32KG_CTRL_MODE_ACTIVE, 0);
916                 if (ret < 0) {
917                         dev_err(palmas->dev, "Error in updating clk reg\n");
918                         return;
919                 }
920
921                 /* Sleep control */
922                 id = palmas_clk32k_info[clk32_pd->clk32k_id].sleep_reqstr_id;
923                 if (clk32_pd->sleep_control) {
924                         ret = palmas_ext_power_req_config(palmas, id,
925                                         clk32_pd->sleep_control, true);
926                         if (ret < 0) {
927                                 dev_err(palmas->dev,
928                                         "Error in ext power control reg\n");
929                                 return;
930                         }
931
932                         ret = palmas_resource_update(palmas, reg,
933                                         PALMAS_CLK32KG_CTRL_MODE_SLEEP,
934                                         PALMAS_CLK32KG_CTRL_MODE_SLEEP);
935                         if (ret < 0) {
936                                 dev_err(palmas->dev,
937                                         "Error in updating clk reg\n");
938                                 return;
939                         }
940                 } else {
941
942                         ret = palmas_resource_update(palmas, reg,
943                                         PALMAS_CLK32KG_CTRL_MODE_SLEEP, 0);
944                         if (ret < 0) {
945                                 dev_err(palmas->dev,
946                                         "Error in updating clk reg\n");
947                                 return;
948                         }
949                 }
950         }
951 }
952
953 static int palmas_set_pdata_irq_flag(struct i2c_client *i2c,
954                 struct palmas_platform_data *pdata)
955 {
956         struct irq_data *irq_data = irq_get_irq_data(i2c->irq);
957         if (!irq_data) {
958                 dev_err(&i2c->dev, "Invalid IRQ: %d\n", i2c->irq);
959                 return -EINVAL;
960         }
961
962         pdata->irq_flags = irqd_get_trigger_type(irq_data);
963         dev_info(&i2c->dev, "Irq flag is 0x%08x\n", pdata->irq_flags);
964         return 0;
965 }
966
967 static int palmas_read_version_information(struct palmas *palmas)
968 {
969         unsigned int sw_rev, des_rev;
970         int ret;
971
972         ret = palmas_read(palmas, PALMAS_PMU_CONTROL_BASE,
973                                 PALMAS_SW_REVISION, &sw_rev);
974         if (ret < 0) {
975                 dev_err(palmas->dev, "SW_REVISION read failed: %d\n", ret);
976                 return ret;
977         }
978
979         ret = palmas_read(palmas, PALMAS_PAGE3_BASE,
980                                 PALMAS_INTERNAL_DESIGNREV, &des_rev);
981         if (ret < 0) {
982                 dev_err(palmas->dev,
983                         "INTERNAL_DESIGNREV read failed: %d\n", ret);
984                 return ret;
985         }
986
987         palmas->sw_otp_version = sw_rev;
988
989         dev_info(palmas->dev, "Internal DesignRev 0x%02X, SWRev 0x%02X\n",
990                         des_rev, sw_rev);
991         des_rev = PALMAS_INTERNAL_DESIGNREV_DESIGNREV(des_rev);
992         switch (des_rev) {
993         case 0:
994                 palmas->es_major_version = 1;
995                 palmas->es_minor_version = 0;
996                 palmas->design_revision = 0xA0;
997                 break;
998         case 1:
999                 palmas->es_major_version = 2;
1000                 palmas->es_minor_version = 0;
1001                 palmas->design_revision = 0xB0;
1002                 break;
1003         case 2:
1004                 palmas->es_major_version = 2;
1005                 palmas->es_minor_version = 1;
1006                 palmas->design_revision = 0xB1;
1007                 break;
1008         case 3:
1009                 palmas->es_major_version = 2;
1010                 palmas->es_minor_version = 2;
1011                 palmas->design_revision = 0xB2;
1012                 break;
1013         default:
1014                 dev_err(palmas->dev, "Invalid design revision\n");
1015                 return -EINVAL;
1016         }
1017
1018         dev_info(palmas->dev, "ES version %d.%d: ChipRevision 0x%02X%02X\n",
1019                 palmas->es_major_version, palmas->es_minor_version,
1020                 palmas->design_revision, palmas->sw_otp_version);
1021         return 0;
1022 }
1023
1024 static void palmas_dt_to_pdata(struct i2c_client *i2c,
1025                 struct palmas_platform_data *pdata)
1026 {
1027         if (i2c->irq)
1028                 palmas_set_pdata_irq_flag(i2c, pdata);
1029 }
1030
1031 static const struct of_device_id of_palmas_match_tbl[] = {
1032         { .compatible = "ti,palmas", .data = (void *)PALMAS, },
1033         { .compatible = "ti,tps80036", .data = (void *)TPS80036, },
1034         { .compatible = "ti,twl6035", .data = (void *)TWL6035, },
1035         { .compatible = "ti,twl6037", .data = (void *)TWL6037, },
1036         { .compatible = "ti,tps65913", .data = (void *)TPS65913, },
1037         { },
1038 };
1039 MODULE_DEVICE_TABLE(of, of_palmas_match_tbl);
1040
1041 static int palmas_i2c_probe(struct i2c_client *i2c,
1042                             const struct i2c_device_id *id)
1043 {
1044         struct palmas *palmas;
1045         struct palmas_platform_data *pdata;
1046         struct device_node *node = i2c->dev.of_node;
1047         int ret = 0, i;
1048         unsigned int reg, addr;
1049         int slave;
1050         struct mfd_cell *children;
1051         int child_count;
1052         const struct of_device_id *match;
1053
1054         pdata = dev_get_platdata(&i2c->dev);
1055
1056         if (node && !pdata) {
1057                 pdata = devm_kzalloc(&i2c->dev, sizeof(*pdata), GFP_KERNEL);
1058
1059                 if (!pdata)
1060                         return -ENOMEM;
1061
1062                 palmas_dt_to_pdata(i2c, pdata);
1063         }
1064
1065         if (!pdata)
1066                 return -EINVAL;
1067
1068         palmas = devm_kzalloc(&i2c->dev, sizeof(struct palmas), GFP_KERNEL);
1069         if (palmas == NULL)
1070                 return -ENOMEM;
1071
1072         i2c_set_clientdata(i2c, palmas);
1073         palmas->dev = &i2c->dev;
1074         palmas->irq = i2c->irq;
1075
1076         if (node) {
1077                 match = of_match_device(of_match_ptr(of_palmas_match_tbl),
1078                                 &i2c->dev);
1079                 if (!match)
1080                         return -ENODATA;
1081                 palmas->id = (unsigned int)match->data;
1082         } else {
1083                 palmas->id = id->driver_data;
1084         }
1085
1086         palmas->submodule_lists = submodule_lists[palmas->id];
1087
1088         for (i = 0; i < PALMAS_NUM_CLIENTS; i++) {
1089                 if (i == 0)
1090                         palmas->i2c_clients[i] = i2c;
1091                 else {
1092                         palmas->i2c_clients[i] =
1093                                         i2c_new_dummy(i2c->adapter,
1094                                                 palmas_i2c_ids[i]);
1095                         if (!palmas->i2c_clients[i]) {
1096                                 dev_err(palmas->dev,
1097                                         "can't attach client %d\n", i);
1098                                 ret = -ENOMEM;
1099                                 goto free_i2c_client;
1100                         }
1101                         if (node)
1102                                 palmas->i2c_clients[i]->dev.of_node = of_node_get(node);
1103                 }
1104                 palmas->regmap[i] = devm_regmap_init_i2c(palmas->i2c_clients[i],
1105                                 &palmas_regmap_config[i]);
1106                 if (IS_ERR(palmas->regmap[i])) {
1107                         ret = PTR_ERR(palmas->regmap[i]);
1108                         dev_err(palmas->dev,
1109                                 "Failed to allocate regmap %d, err: %d\n",
1110                                 i, ret);
1111                         goto free_i2c_client;
1112                 }
1113         }
1114
1115         ret = palmas_read_version_information(palmas);
1116         if (ret < 0)
1117                 goto free_i2c_client;
1118
1119         /* Change interrupt line output polarity */
1120         if (pdata->irq_flags & IRQ_TYPE_LEVEL_HIGH)
1121                 reg = PALMAS_POLARITY_CTRL_INT_POLARITY;
1122         else
1123                 reg = 0;
1124         ret = palmas_update_bits(palmas, PALMAS_PU_PD_OD_BASE,
1125                         PALMAS_POLARITY_CTRL, PALMAS_POLARITY_CTRL_INT_POLARITY,
1126                         reg);
1127         if (ret < 0) {
1128                 dev_err(palmas->dev, "POLARITY_CTRL updat failed: %d\n", ret);
1129                 goto free_i2c_client;
1130         }
1131
1132         /* Change IRQ into clear on read mode for efficiency */
1133         slave = PALMAS_BASE_TO_SLAVE(PALMAS_INTERRUPT_BASE);
1134         addr = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, PALMAS_INT_CTRL);
1135         reg = PALMAS_INT_CTRL_INT_CLEAR;
1136
1137         regmap_write(palmas->regmap[slave], addr, reg);
1138
1139         ret = palmas_add_irq_chip(palmas, palmas->irq,
1140                         IRQF_ONESHOT | pdata->irq_flags, pdata->irq_base,
1141                         &palmas->irq_chip_data);
1142         if (ret < 0)
1143                 goto free_i2c_client;
1144
1145         if (palmas->id != TPS80036)
1146                 palmas->ngpio = 8;
1147         else
1148                 palmas->ngpio = 16;
1149
1150         reg = pdata->power_ctrl;
1151
1152         slave = PALMAS_BASE_TO_SLAVE(PALMAS_PMU_CONTROL_BASE);
1153         addr = PALMAS_BASE_TO_REG(PALMAS_PMU_CONTROL_BASE, PALMAS_POWER_CTRL);
1154
1155         ret = regmap_write(palmas->regmap[slave], addr, reg);
1156         if (ret)
1157                 goto free_irq;
1158
1159         /*
1160          * If we are probing with DT do this the DT way and return here
1161          * otherwise continue and add devices using mfd helpers.
1162          */
1163         if (node) {
1164                 ret = of_platform_populate(node, NULL, NULL, &i2c->dev);
1165                 if (ret < 0)
1166                         goto free_irq;
1167                 else
1168                         return ret;
1169         }
1170
1171         /*
1172          * Programming the Long-Press shutdown delay register.
1173          * Using "slave" from previous assignment as this register
1174          * too belongs to PALMAS_PMU_CONTROL_BASE block.
1175          */
1176         if (pdata->long_press_delay != PALMAS_LONG_PRESS_KEY_TIME_DEFAULT) {
1177                 ret = palmas_update_bits(palmas, PALMAS_PMU_CONTROL_BASE,
1178                                         PALMAS_LONG_PRESS_KEY,
1179                                         PALMAS_LONG_PRESS_KEY_LPK_TIME_MASK,
1180                                         pdata->long_press_delay <<
1181                                         PALMAS_LONG_PRESS_KEY_LPK_TIME_SHIFT);
1182                 if (ret) {
1183                         dev_err(palmas->dev,
1184                                 "Failed to update palmas long press delay"
1185                                 "(hard shutdown delay), err: %d\n", ret);
1186                         goto free_irq;
1187                 }
1188         }
1189
1190         palmas_init_ext_control(palmas);
1191
1192         palmas_clk32k_init(palmas, pdata);
1193
1194         /*
1195          * If we are probing with DT do this the DT way and return here
1196          * otherwise continue and add devices using mfd helpers.
1197          */
1198         if (node) {
1199                 ret = of_platform_populate(node, NULL, NULL, &i2c->dev);
1200                 if (ret < 0) {
1201                         dev_err(palmas->dev,
1202                                 "Couldn't populate Palmas devices, %d\n", ret);
1203                         goto free_irq;
1204                 }
1205         } else {
1206                 children = kzalloc(sizeof(*children) * ARRAY_SIZE(palmas_children),
1207                                 GFP_KERNEL);
1208                 if (!children) {
1209                         ret = -ENOMEM;
1210                         goto free_irq;
1211                 }
1212
1213                 child_count = 0;
1214                 for (i = 0; i< ARRAY_SIZE(palmas_children); ++i) {
1215                         if (palmas->submodule_lists & BIT(palmas_children[i].id))
1216                                 children[child_count++] = palmas_children[i];
1217                 }
1218
1219                 children[PALMAS_PMIC_ID].platform_data = pdata->pmic_pdata;
1220                 children[PALMAS_PMIC_ID].pdata_size = sizeof(*pdata->pmic_pdata);
1221
1222                 children[PALMAS_GPADC_ID].platform_data = pdata->gpadc_pdata;
1223                 children[PALMAS_GPADC_ID].pdata_size = sizeof(*pdata->gpadc_pdata);
1224
1225                 children[PALMAS_RESOURCE_ID].platform_data = pdata->resource_pdata;
1226                 children[PALMAS_RESOURCE_ID].pdata_size =
1227                                 sizeof(*pdata->resource_pdata);
1228
1229                 children[PALMAS_USB_ID].platform_data = pdata->usb_pdata;
1230                 children[PALMAS_USB_ID].pdata_size = sizeof(*pdata->usb_pdata);
1231
1232                 children[PALMAS_CLK_ID].platform_data = pdata->clk_pdata;
1233                 children[PALMAS_CLK_ID].pdata_size = sizeof(*pdata->clk_pdata);
1234
1235                 ret = mfd_add_devices(palmas->dev, -1,
1236                                           children, child_count,
1237                                           NULL, palmas->irq_chip_data->irq_base,
1238                                           palmas->irq_chip_data->domain);
1239                 kfree(children);
1240
1241                 if (ret < 0)
1242                         goto free_irq;
1243         }
1244
1245         if (pdata->auto_ldousb_en)
1246                 /* VBUS detection enables the LDOUSB */
1247                 palmas_control_update(palmas, PALMAS_EXT_CHRG_CTRL, 1,
1248                                         PALMAS_EXT_CHRG_CTRL_AUTO_LDOUSB_EN);
1249
1250         return 0;
1251
1252 free_irq:
1253                 palmas_del_irq_chip(palmas->irq, palmas->irq_chip_data);
1254 free_i2c_client:
1255                 for (i = 1; i < PALMAS_NUM_CLIENTS; i++) {
1256                 if (palmas->i2c_clients[i])
1257                         i2c_unregister_device(palmas->i2c_clients[i]);
1258         }
1259         return ret;
1260 }
1261
1262 static int palmas_i2c_remove(struct i2c_client *i2c)
1263 {
1264         struct palmas *palmas = i2c_get_clientdata(i2c);
1265         int i;
1266
1267         if (!i2c->dev.of_node)
1268                 mfd_remove_devices(palmas->dev);
1269
1270         palmas_del_irq_chip(palmas->irq, palmas->irq_chip_data);
1271
1272         for (i = 1; i < PALMAS_NUM_CLIENTS; i++) {
1273                 if (palmas->i2c_clients[i])
1274                         i2c_unregister_device(palmas->i2c_clients[i]);
1275         }
1276
1277         return 0;
1278 }
1279
1280 static const struct i2c_device_id palmas_i2c_id[] = {
1281         { "palmas", PALMAS},
1282         { "twl6035", TWL6035},
1283         { "twl6037", TWL6037},
1284         { "tps65913", TPS65913},
1285         { "tps80036", TPS80036},
1286         { /* end */ }
1287 };
1288 MODULE_DEVICE_TABLE(i2c, palmas_i2c_id);
1289
1290 static struct i2c_driver palmas_i2c_driver = {
1291         .driver = {
1292                    .name = "palmas",
1293                    .of_match_table = of_palmas_match_tbl,
1294                    .owner = THIS_MODULE,
1295         },
1296         .probe = palmas_i2c_probe,
1297         .remove = palmas_i2c_remove,
1298         .id_table = palmas_i2c_id,
1299 };
1300
1301 static int __init palmas_i2c_init(void)
1302 {
1303         return i2c_add_driver(&palmas_i2c_driver);
1304 }
1305 /* init early so consumer devices can complete system boot */
1306 subsys_initcall(palmas_i2c_init);
1307
1308 static void __exit palmas_i2c_exit(void)
1309 {
1310         i2c_del_driver(&palmas_i2c_driver);
1311 }
1312 module_exit(palmas_i2c_exit);
1313
1314 MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1315 MODULE_DESCRIPTION("Palmas chip family multi-function driver");
1316 MODULE_LICENSE("GPL");