2 * imx091.c - imx091 sensor driver
4 * Copyright (c) 2012-2014, NVIDIA Corporation. All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/i2c.h>
21 #include <linux/clk.h>
22 #include <linux/miscdevice.h>
23 #include <linux/slab.h>
24 #include <linux/delay.h>
25 #include <linux/uaccess.h>
26 #include <linux/atomic.h>
27 #include <linux/gpio.h>
28 #include <linux/regulator/consumer.h>
29 #include <linux/module.h>
30 #include <linux/list.h>
31 #include <media/imx091.h>
33 #include <linux/of_device.h>
34 #include <linux/of_gpio.h>
35 #include <linux/tegra-soc.h>
37 #include "nvc_utilities.h"
39 #ifdef CONFIG_DEBUG_FS
40 #include <media/nvc_debugfs.h>
44 #define MAX(a, b) (((a) > (b)) ? (a) : (b))
47 #define IMX091_ID 0x0091
48 #define IMX091_ID_ADDRESS 0x0000
49 #define IMX091_STREAM_CONTROL_REG 0x0100
50 #define IMX091_STREAM_ENABLE 0x01
51 #define IMX091_STREAM_DISABLE 0x00
52 #define IMX091_SENSOR_TYPE NVC_IMAGER_TYPE_RAW
53 #define IMX091_STARTUP_DELAY_MS 50
54 #define IMX091_RES_CHG_WAIT_TIME_MS 100
55 #define IMX091_SIZEOF_I2C_BUF 16
56 #define IMX091_TABLE_WAIT_MS 0
57 #define IMX091_TABLE_END 1
58 #define IMX091_NUM_MODES_MAX MAX(ARRAY_SIZE(imx091_mode_table_non_fpga)\
59 , ARRAY_SIZE(imx091_mode_table_fpga))
60 /*#define IMX091_MODE_UNKNOWN (IMX091_NUM_MODES + 1)*/
61 #define IMX091_LENS_MAX_APERTURE 0 /* / _INT2FLOAT_DIVISOR */
62 #define IMX091_LENS_FNUMBER 0 /* / _INT2FLOAT_DIVISOR */
63 #define IMX091_LENS_FOCAL_LENGTH 4760 /* / _INT2FLOAT_DIVISOR */
64 #define IMX091_LENS_VIEW_ANGLE_H 60400 /* / _INT2FLOAT_DIVISOR */
65 #define IMX091_LENS_VIEW_ANGLE_V 60400 /* / _INT2FLOAT_DIVISOR */
66 #define IMX091_WAIT_MS 3
67 #define IMX091_I2C_TABLE_MAX_ENTRIES 400
68 #define IMX091_FUSE_ID_SIZE 8
70 static u16 imx091_ids[] = {
74 static struct nvc_gpio_init imx091_gpios[] = {
75 {IMX091_GPIO_RESET, GPIOF_OUT_INIT_LOW, "reset", false, true},
76 {IMX091_GPIO_PWDN, GPIOF_OUT_INIT_LOW, "pwdn", false, true},
77 {IMX091_GPIO_GP1, 0, "gp1", false, false},
80 static struct nvc_regulator_init imx091_vregs[] = {
81 { IMX091_VREG_DVDD, "vdig", },
82 { IMX091_VREG_AVDD, "vana", },
83 { IMX091_VREG_IOVDD, "vif", },
89 struct i2c_client *i2c_client;
90 struct imx091_platform_data *pdata;
91 struct nvc_imager_cap *cap;
92 struct miscdevice miscdev;
93 struct list_head list;
95 struct nvc_gpio gpio[ARRAY_SIZE(imx091_gpios)];
96 struct nvc_regulator vreg[ARRAY_SIZE(imx091_vregs)];
100 struct imx091_info *s_info;
105 unsigned test_pattern;
106 struct nvc_imager_static_nvc sdata;
107 struct regulator *imx091_ext_reg_vcm_vdd;
108 struct regulator *imx091_ext_reg_i2c_vdd;
109 u8 i2c_buf[IMX091_SIZEOF_I2C_BUF];
111 #ifdef CONFIG_DEBUG_FS
112 struct nvc_debugfs_info debugfs_info;
114 struct nvc_fuseid fuse_id;
123 struct imx091_mode_data {
124 struct nvc_imager_mode sensor_mode;
125 struct nvc_imager_dynamic_nvc sensor_dnvc;
126 struct imx091_reg *p_mode_i2c;
129 static struct nvc_imager_cap imx091_dflt_cap = {
130 .identifier = "IMX091",
131 .sensor_nvc_interface = 3,
132 .pixel_types[0] = 0x100,
135 .initial_clock_rate_khz = 6000,
136 .clock_profiles[0] = {
137 .external_clock_khz = 24000,
138 .clock_multiplier = 8500000, /* value / 1,000,000 */
140 .clock_profiles[1] = {
141 .external_clock_khz = 0,
142 .clock_multiplier = 0,
149 .virtual_channel_id = 0,
150 .discontinuous_clk_mode = 1,
151 .cil_threshold_settle = 0x0,
152 .min_blank_time_width = 16,
153 .min_blank_time_height = 16,
154 .preferred_mode_index = 1,
155 .focuser_guid = NVC_FOCUS_GUID(0),
156 .torch_guid = NVC_TORCH_GUID(0),
157 .cap_version = NVC_IMAGER_CAPABILITIES_VERSION2,
160 static struct imx091_platform_data imx091_dflt_pdata = {
164 .dev_name = "camera",
165 .cap = &imx091_dflt_cap,
168 /* NOTE: static vs dynamic
169 * If a member in the nvc_imager_static_nvc structure is not actually
170 * static data, then leave blank and add the parameter to the parameter
171 * read function that dynamically reads the data. The NVC user driver
172 * will call the parameter read for the data if the member data is 0.
173 * If the dynamic data becomes static during probe (a one time read
174 * such as device ID) then add the dynamic read to the _sdata_init
177 static struct nvc_imager_static_nvc imx091_dflt_sdata = {
178 .api_version = NVC_IMAGER_API_STATIC_VER,
179 .sensor_type = IMX091_SENSOR_TYPE,
180 .bits_per_pixel = 10,
181 .sensor_id = IMX091_ID,
182 .sensor_id_minor = 0,
183 .focal_len = IMX091_LENS_FOCAL_LENGTH,
184 .max_aperture = IMX091_LENS_MAX_APERTURE,
185 .fnumber = IMX091_LENS_FNUMBER,
186 .view_angle_h = IMX091_LENS_VIEW_ANGLE_H,
187 .view_angle_v = IMX091_LENS_VIEW_ANGLE_V,
188 .res_chg_wait_time = IMX091_RES_CHG_WAIT_TIME_MS,
191 static LIST_HEAD(imx091_info_list);
192 static DEFINE_SPINLOCK(imx091_spinlock);
195 static struct imx091_reg tp_none_seq[] = {
196 {IMX091_TABLE_END, 0x0000}
199 static struct imx091_reg tp_cbars_seq[] = {
200 {IMX091_TABLE_END, 0x0000}
203 static struct imx091_reg tp_checker_seq[] = {
204 {IMX091_TABLE_END, 0x0000}
207 static struct imx091_reg *test_patterns[] = {
213 static int imx091_power_on(struct nvc_regulator *vreg);
214 static int imx091_power_off(struct nvc_regulator *vreg);
216 #define IMX091_WAIT_1000_MS 1000
217 /* The setting is for 1-lane mode.
218 * THS time is different as well. They are set
219 * in the VI programming layer
221 static struct imx091_reg imx091_FPGA_4160x3120_i2c[] = {
223 {IMX091_TABLE_WAIT_MS, IMX091_WAIT_MS},
318 {IMX091_TABLE_WAIT_MS, 5000},
319 {IMX091_TABLE_END, 0x00}
322 static struct imx091_reg imx091_FPGA_1052x1560_i2c[] = {
325 {IMX091_TABLE_WAIT_MS, IMX091_WAIT_MS},
327 /* global settings */
349 * Previously, this was calibrated for a 24MHz system, which has
350 * PREPLLCLK_DIV of 2 (1/2), RGPLTD of 2 (1/1), and PLL_MPY of 47.
351 * In the standard setting, this is set to 564MHz.
352 * In the 13MHz (FPGA) setting, set for a PREPLLCLK_DIV of 1 (1/1),
353 * a PLL_MPY of 43, and a RGPLTD of 2 (1/1), for an output PLL frequency
356 {0x0305, 0x01}, /* PREPLLCLK_DIV */
357 {0x0307, 0x18}, /* PLL_MPY */
358 {0x30A4, 0x01}, /* RGPLTD */
359 {0x303C, 0x28}, /* PLSTATIM */
362 {0x0112, 0x0A}, /* RAW 10 */
364 {0x0340, 0x07}, /* FrameLength 0x700 = 1792 */
366 {0x0342, 0x12}, /* LineLength = 0x120C = 4620 */
369 /* Imaging Area Determination */
370 {0x0344, 0x00}, /* ReadOut start horizontal position = 8 */
372 {0x0346, 0x00}, /* ReadOut start vertical position = 0x30 = 48 */
374 {0x0348, 0x10}, /* ReadOut end horizontal position = 0x1077 */
376 {0x034A, 0x0C}, /* ReadOut end vertical position = 0xc5f */
378 {0x034C, 0x04}, /* ReadOut size horizontal position = 0x041C = 1052 */
380 {0x034E, 0x06}, /* ReadOut size vertical position = 0x0618 = 1560 */
386 {0x3033, 0x00}, /* HD mode off */
387 {0x303D, 0x10}, /* standby end immediate */
389 {0x3040, 0x08}, /* OPB start and end address vert */
391 {0x3048, 0x01}, /* vertical addition enabled */
392 {0x304C, 0x7F}, /* readout pixels set to 0x04_78 */
418 {0x3301, 0x03}, /* 4 Lane */
434 {0x0600, 0x00}, /* colorbar fade-to-gray */
436 {0x0101, 0x00}, /* image orientation */
439 {IMX091_TABLE_WAIT_MS, IMX091_WAIT_MS},
440 {IMX091_TABLE_END, 0x00}
443 static struct imx091_reg imx091_4208x3120_i2c[] = {
446 {IMX091_TABLE_WAIT_MS, IMX091_WAIT_MS},
448 /* global settings */
465 /* black level setting */
470 {0x0307, 0x2A}, /* PLL Multipiler = 42 */
546 {IMX091_TABLE_END, 0x00}
549 static struct imx091_reg imx091_1948x1096_i2c[] = {
552 {IMX091_TABLE_WAIT_MS, IMX091_WAIT_MS},
554 /* global settings */
571 /* black level setting */
652 {IMX091_TABLE_END, 0x00}
655 static struct imx091_reg imx091_1308x736_i2c[] = {
658 {IMX091_TABLE_WAIT_MS, IMX091_WAIT_MS},
660 /* global settings */
677 /* black level setting */
758 {IMX091_TABLE_END, 0x00}
761 static struct imx091_reg imx091_2104x1560_i2c[] = {
764 {IMX091_TABLE_WAIT_MS, IMX091_WAIT_MS},
766 /* global settings */
783 /* black level setting */
865 {IMX091_TABLE_WAIT_MS, IMX091_WAIT_MS},
866 {IMX091_TABLE_END, 0x00}
869 static struct imx091_reg imx091_524X390_i2c[] = {
872 {IMX091_TABLE_WAIT_MS, IMX091_WAIT_MS},
874 /* global settings */
891 /* black level setting */
972 {IMX091_TABLE_END, 0x00}
975 /* Each resolution requires the below data table setup and the corresponding
977 * If more NVC data is needed for the NVC driver, be sure and modify the
978 * nvc_imager_nvc structure in nvc_imager.h
979 * If more data sets are needed per resolution, they can be added to the
980 * table format below with the imx091_mode_data structure. New data sets
981 * should conform to an already defined NVC structure. If it's data for the
982 * NVC driver, then it should be added to the nvc_imager_nvc structure.
983 * Steps to add a resolution:
984 * 1. Add I2C data table
985 * 2. Add imx091_mode_data table
986 * 3. Add entry to the imx091_mode_table_non_fpga and/or imx091_mode_table_fpga
988 static struct imx091_mode_data imx091_FPGA_4160x3120 = {
994 .peak_frame_rate = 30000, /* / _INT2FLOAT_DIVISOR */
995 .pixel_aspect_ratio = 1000, /* / _INT2FLOAT_DIVISOR */
996 .pll_multiplier = 5000, /* / _INT2FLOAT_DIVISOR */
997 .crop_mode = NVC_IMAGER_CROPMODE_NONE,
1000 .api_version = NVC_IMAGER_API_DYNAMIC_VER,
1001 .region_start_x = 0,
1002 .region_start_y = 0,
1007 .init_intra_frame_skip = 0,
1008 .ss_intra_frame_skip = 2,
1009 .ss_frame_number = 3,
1010 .coarse_time = 0x06FB,
1011 .max_coarse_diff = 5,
1012 .min_exposure_course = 2,
1013 .max_exposure_course = 0xFFFC,
1014 .diff_integration_time = 110, /* / _INT2FLOAT_DIVISOR */
1015 .line_length = 0x120C,
1016 .frame_length = 0x0c58,
1017 .min_frame_length = 0x0c58,
1018 .max_frame_length = 0xFFFF,
1019 .min_gain = 1, /* / _INT2FLOAT_DIVISOR */
1020 .max_gain = 16000, /* / _INT2FLOAT_DIVISOR */
1021 .inherent_gain = 1000, /* / _INT2FLOAT_DIVISOR */
1022 .inherent_gain_bin_en = 1000, /* / _INT2FLOAT_DIVISOR */
1023 .support_bin_control = 0,
1024 .support_fast_mode = 0,
1028 .p_mode_i2c = imx091_FPGA_4160x3120_i2c,
1031 static struct imx091_mode_data imx091_FPGA_1052x1560 = {
1035 .active_start_x = 0,
1036 .active_stary_y = 0,
1037 .peak_frame_rate = 30000, /* / _INT2FLOAT_DIVISOR */
1038 .pixel_aspect_ratio = 1000, /* / _INT2FLOAT_DIVISOR */
1039 .pll_multiplier = 5000, /* / _INT2FLOAT_DIVISOR */
1040 .crop_mode = NVC_IMAGER_CROPMODE_NONE,
1043 .api_version = NVC_IMAGER_API_DYNAMIC_VER,
1044 .region_start_x = 0,
1045 .region_start_y = 0,
1050 .init_intra_frame_skip = 0,
1051 .ss_intra_frame_skip = 2,
1052 .ss_frame_number = 3,
1053 .coarse_time = 0x06FB,
1054 .max_coarse_diff = 5,
1055 .min_exposure_course = 2,
1056 .max_exposure_course = 0xFFFC,
1057 .diff_integration_time = 110, /* / _INT2FLOAT_DIVISOR */
1058 .line_length = 0x120C,
1059 .frame_length = 0x0700,
1060 .min_frame_length = 0x0700,
1061 .max_frame_length = 0xFFFF,
1062 .min_gain = 1, /* / _INT2FLOAT_DIVISOR */
1063 .max_gain = 16000, /* / _INT2FLOAT_DIVISOR */
1064 .inherent_gain = 1000, /* / _INT2FLOAT_DIVISOR */
1065 .inherent_gain_bin_en = 1000, /* / _INT2FLOAT_DIVISOR */
1066 .support_bin_control = 0,
1067 .support_fast_mode = 0,
1071 .p_mode_i2c = imx091_FPGA_1052x1560_i2c,
1074 static struct imx091_mode_data imx091_4208x3120 = {
1078 .active_start_x = 0,
1079 .active_stary_y = 0,
1080 .peak_frame_rate = 15000, /* / _INT2FLOAT_DIVISOR */
1081 .pixel_aspect_ratio = 1000, /* / _INT2FLOAT_DIVISOR */
1082 .pll_multiplier = 10000, /* / _INT2FLOAT_DIVISOR */
1083 .crop_mode = NVC_IMAGER_CROPMODE_NONE,
1086 .api_version = NVC_IMAGER_API_DYNAMIC_VER,
1087 .region_start_x = 0,
1088 .region_start_y = 0,
1093 .init_intra_frame_skip = 0,
1094 .ss_intra_frame_skip = 2,
1095 .ss_frame_number = 3,
1096 .coarse_time = 0x0C53,
1097 .max_coarse_diff = 5,
1098 .min_exposure_course = 2,
1099 .max_exposure_course = 0xFFFC,
1100 .diff_integration_time = 110, /* / _INT2FLOAT_DIVISOR */
1101 .line_length = 0x120C,
1102 .frame_length = 0x0C58,
1103 .min_frame_length = 0x0C58,
1104 .max_frame_length = 0xFFFF,
1105 .min_gain = 1, /* / _INT2FLOAT_DIVISOR */
1106 .max_gain = 16000, /* / _INT2FLOAT_DIVISOR */
1107 .inherent_gain = 1000, /* / _INT2FLOAT_DIVISOR */
1108 .inherent_gain_bin_en = 1000, /* / _INT2FLOAT_DIVISOR */
1109 .support_bin_control = 0,
1110 .support_fast_mode = 0,
1114 .p_mode_i2c = imx091_4208x3120_i2c,
1117 static struct imx091_mode_data imx091_1948x1096 = {
1121 .active_start_x = 0,
1122 .active_stary_y = 0,
1123 .peak_frame_rate = 30000, /* / _INT2FLOAT_DIVISOR */
1124 .pixel_aspect_ratio = 1000, /* / _INT2FLOAT_DIVISOR */
1125 .pll_multiplier = 7000, /* / _INT2FLOAT_DIVISOR */
1126 .crop_mode = NVC_IMAGER_CROPMODE_PARTIAL,
1129 .api_version = NVC_IMAGER_API_DYNAMIC_VER,
1130 .region_start_x = 0,
1131 .region_start_y = 0,
1136 .init_intra_frame_skip = 0,
1137 .ss_intra_frame_skip = 2,
1138 .ss_frame_number = 3,
1139 .coarse_time = 0x08A1,
1140 .max_coarse_diff = 5,
1141 .min_exposure_course = 2,
1142 .max_exposure_course = 0xFFFC,
1143 .diff_integration_time = 110, /* / _INT2FLOAT_DIVISOR */
1144 .line_length = 0x0906,
1145 .frame_length = 0x08A6,
1146 .min_frame_length = 0x08A6,
1147 .max_frame_length = 0xFFFF,
1148 .min_gain = 1, /* / _INT2FLOAT_DIVISOR */
1149 .max_gain = 16000, /* / _INT2FLOAT_DIVISOR */
1150 .inherent_gain = 1000, /* / _INT2FLOAT_DIVISOR */
1151 .inherent_gain_bin_en = 1000, /* / _INT2FLOAT_DIVISOR */
1152 .support_bin_control = 0,
1153 .support_fast_mode = 0,
1157 .p_mode_i2c = imx091_1948x1096_i2c,
1160 static struct imx091_mode_data imx091_1308x736 = {
1164 .active_start_x = 0,
1165 .active_stary_y = 0,
1166 .peak_frame_rate = 30000, /* / _INT2FLOAT_DIVISOR */
1167 .pixel_aspect_ratio = 1000, /* / _INT2FLOAT_DIVISOR */
1168 .pll_multiplier = 5000, /* / _INT2FLOAT_DIVISOR */
1169 .crop_mode = NVC_IMAGER_CROPMODE_PARTIAL,
1172 .api_version = NVC_IMAGER_API_DYNAMIC_VER,
1173 .region_start_x = 0,
1174 .region_start_y = 0,
1179 .init_intra_frame_skip = 0,
1180 .ss_intra_frame_skip = 2,
1181 .ss_frame_number = 3,
1182 .coarse_time = 0x0448,
1183 .max_coarse_diff = 5,
1184 .min_exposure_course = 2,
1185 .max_exposure_course = 0xFFFC,
1186 .diff_integration_time = 110, /* / _INT2FLOAT_DIVISOR */
1187 .line_length = 0x120C,
1188 .frame_length = 0x044e,
1189 .min_frame_length = 0x044e,
1190 .max_frame_length = 0xFFFF,
1191 .min_gain = 1, /* / _INT2FLOAT_DIVISOR */
1192 .max_gain = 16000, /* / _INT2FLOAT_DIVISOR */
1193 .inherent_gain = 1000, /* / _INT2FLOAT_DIVISOR */
1194 .inherent_gain_bin_en = 1000, /* / _INT2FLOAT_DIVISOR */
1195 .support_bin_control = 0,
1196 .support_fast_mode = 0,
1200 .p_mode_i2c = imx091_1308x736_i2c,
1203 static struct imx091_mode_data imx091_2104x1560 = {
1207 .active_start_x = 0,
1208 .active_stary_y = 0,
1209 .peak_frame_rate = 30000, /* / _INT2FLOAT_DIVISOR */
1210 .pixel_aspect_ratio = 1000, /* / _INT2FLOAT_DIVISOR */
1211 .pll_multiplier = 6000, /* / _INT2FLOAT_DIVISOR */
1212 .crop_mode = NVC_IMAGER_CROPMODE_NONE,
1215 .api_version = NVC_IMAGER_API_DYNAMIC_VER,
1216 .region_start_x = 0,
1217 .region_start_y = 0,
1222 .init_intra_frame_skip = 0,
1223 .ss_intra_frame_skip = 2,
1224 .ss_frame_number = 3,
1225 .coarse_time = 0x0653,
1226 .max_coarse_diff = 5,
1227 .min_exposure_course = 2,
1228 .max_exposure_course = 0xFFFC,
1229 .diff_integration_time = 110, /* / _INT2FLOAT_DIVISOR */
1230 .line_length = 0x120C,
1231 .frame_length = 0x0658,
1232 .min_frame_length = 0x0658,
1233 .max_frame_length = 0xFFFF,
1234 .min_gain = 1, /* / _INT2FLOAT_DIVISOR */
1235 .max_gain = 16000, /* / _INT2FLOAT_DIVISOR */
1236 .inherent_gain = 1000, /* / _INT2FLOAT_DIVISOR */
1237 .inherent_gain_bin_en = 1000, /* / _INT2FLOAT_DIVISOR */
1238 .support_bin_control = 0,
1239 .support_fast_mode = 0,
1243 .p_mode_i2c = imx091_2104x1560_i2c,
1246 static struct imx091_mode_data imx091_524x390 = {
1250 .active_start_x = 0,
1251 .active_stary_y = 0,
1252 .peak_frame_rate = 120000, /* / _INT2FLOAT_DIVISOR */
1253 .pixel_aspect_ratio = 1000, /* / _INT2FLOAT_DIVISOR */
1254 .pll_multiplier = 5000, /* / _INT2FLOAT_DIVISOR */
1255 .crop_mode = NVC_IMAGER_CROPMODE_PARTIAL,
1258 .api_version = NVC_IMAGER_API_DYNAMIC_VER,
1259 .region_start_x = 0,
1260 .region_start_y = 0,
1265 .init_intra_frame_skip = 0,
1266 .ss_intra_frame_skip = 2,
1267 .ss_frame_number = 3,
1268 .coarse_time = 0x0191,
1269 .max_coarse_diff = 5,
1270 .min_exposure_course = 2,
1271 .max_exposure_course = 0xFFFC,
1272 .diff_integration_time = 110, /* / _INT2FLOAT_DIVISOR */
1273 .line_length = 0x120C,
1274 .frame_length = 0x0196,
1275 .min_frame_length = 0x0196,
1276 .max_frame_length = 0xFFFF,
1277 .min_gain = 1, /* / _INT2FLOAT_DIVISOR */
1278 .max_gain = 16000, /* / _INT2FLOAT_DIVISOR */
1279 .inherent_gain = 1000, /* / _INT2FLOAT_DIVISOR */
1280 .inherent_gain_bin_en = 1000, /* / _INT2FLOAT_DIVISOR */
1281 .support_bin_control = 0,
1282 .support_fast_mode = 0,
1286 .p_mode_i2c = imx091_524X390_i2c,
1289 static struct imx091_mode_data **imx091_mode_table;
1290 static unsigned int imx091_num_modes;
1292 static struct imx091_mode_data *imx091_mode_table_fpga[] = {
1293 &imx091_FPGA_1052x1560,
1294 &imx091_FPGA_4160x3120,
1297 static struct imx091_mode_data *imx091_mode_table_non_fpga[] = {
1305 static int imx091_i2c_rd8(struct i2c_client *client, u16 reg, u8 *val)
1307 struct i2c_msg msg[2];
1310 buf[0] = (reg >> 8);
1311 buf[1] = (reg & 0x00FF);
1312 msg[0].addr = client->addr;
1315 msg[0].buf = &buf[0];
1316 msg[1].addr = client->addr;
1317 msg[1].flags = I2C_M_RD;
1319 msg[1].buf = &buf[2];
1321 if (i2c_transfer(client->adapter, msg, 2) != 2)
1328 static int imx091_i2c_rd16(struct i2c_client *client, u16 reg, u16 *val)
1330 struct i2c_msg msg[2];
1333 buf[0] = (reg >> 8);
1334 buf[1] = (reg & 0x00FF);
1335 msg[0].addr = client->addr;
1338 msg[0].buf = &buf[0];
1339 msg[1].addr = client->addr;
1340 msg[1].flags = I2C_M_RD;
1342 msg[1].buf = &buf[2];
1344 if (i2c_transfer(client->adapter, msg, 2) != 2)
1347 *val = (((u16)buf[2] << 8) | (u16)buf[3]);
1351 static int imx091_i2c_wr8(struct i2c_client *client, u16 reg, u8 val)
1356 buf[0] = (reg >> 8);
1357 buf[1] = (reg & 0x00FF);
1359 msg.addr = client->addr;
1363 if (i2c_transfer(client->adapter, &msg, 1) != 1)
1369 static int imx091_i2c_wr16(struct i2c_client *client, u16 reg, u16 val)
1374 buf[0] = (reg >> 8);
1375 buf[1] = (reg & 0x00FF);
1376 buf[2] = (val & 0x00FF);
1377 buf[3] = (val >> 8);
1378 msg.addr = client->addr;
1382 if (i2c_transfer(client->adapter, &msg, 1) != 1)
1388 static int imx091_i2c_rd_table(struct imx091_info *info,
1389 struct imx091_reg table[])
1391 struct imx091_reg *p_table = table;
1395 while (p_table->addr != IMX091_TABLE_END) {
1396 err = imx091_i2c_rd8(info->i2c_client, p_table->addr, &val);
1400 p_table->val = (u16)val;
1407 static int imx091_i2c_wr_blk(struct imx091_info *info, u8 *buf, int len)
1411 msg.addr = info->i2c_client->addr;
1415 if (i2c_transfer(info->i2c_client->adapter, &msg, 1) != 1)
1421 static int imx091_i2c_wr_table(struct imx091_info *info,
1422 struct imx091_reg table[])
1425 const struct imx091_reg *next;
1426 const struct imx091_reg *n_next;
1427 u8 *b_ptr = info->i2c_buf;
1430 for (next = table; next->addr != IMX091_TABLE_END; next++) {
1431 if (next->addr == IMX091_TABLE_WAIT_MS) {
1437 b_ptr = info->i2c_buf;
1438 *b_ptr++ = next->addr >> 8;
1439 *b_ptr++ = next->addr & 0xFF;
1442 *b_ptr++ = next->val;
1445 if (n_next->addr == next->addr + 1 &&
1446 n_next->addr != IMX091_TABLE_WAIT_MS &&
1447 buf_count < IMX091_SIZEOF_I2C_BUF &&
1448 n_next->addr != IMX091_TABLE_END)
1451 err = imx091_i2c_wr_blk(info, info->i2c_buf, buf_count);
1461 static inline void imx091_frame_length_reg(struct imx091_reg *regs,
1464 regs->addr = 0x0340;
1465 regs->val = (frame_length >> 8) & 0xFF;
1466 (regs + 1)->addr = 0x0341;
1467 (regs + 1)->val = (frame_length) & 0xFF;
1470 static inline void imx091_coarse_time_reg(struct imx091_reg *regs,
1473 regs->addr = 0x0202;
1474 regs->val = (coarse_time >> 8) & 0xFF;
1475 (regs + 1)->addr = 0x0203;
1476 (regs + 1)->val = (coarse_time) & 0xFF;
1479 static inline void imx091_gain_reg(struct imx091_reg *regs, u32 gain)
1481 regs->addr = 0x0205;
1482 regs->val = gain & 0xFF;
1485 static int imx091_bin_wr(struct imx091_info *info, u8 enable)
1489 if (enable == info->bin_en)
1492 if (!info->mode_valid || !imx091_mode_table[info->mode_index]->
1493 sensor_dnvc.support_bin_control)
1497 info->bin_en = enable;
1498 dev_dbg(&info->i2c_client->dev, "%s bin_en=%x err=%d\n",
1499 __func__, info->bin_en, err);
1503 static int imx091_exposure_wr(struct imx091_info *info,
1504 struct nvc_imager_bayer *mode)
1506 struct imx091_reg reg_list[8];
1509 reg_list[0].addr = 0x0104;
1510 reg_list[0].val = 0x01;
1511 imx091_frame_length_reg(reg_list+1, mode->frame_length);
1512 imx091_coarse_time_reg(reg_list + 3, mode->coarse_time);
1513 imx091_gain_reg(reg_list + 5, mode->gain);
1514 reg_list[6].addr = 0x0104;
1515 reg_list[6].val = 0x00;
1516 reg_list[7].addr = IMX091_TABLE_END;
1517 err = imx091_i2c_wr_table(info, reg_list);
1519 err = imx091_bin_wr(info, mode->bin_en);
1523 static int imx091_gain_wr(struct imx091_info *info, u32 gain)
1528 err = imx091_i2c_wr16(info->i2c_client, 0x0205, (u16)gain);
1532 static int imx091_gain_rd(struct imx091_info *info, u32 *gain)
1537 err = imx091_i2c_rd8(info->i2c_client, 0x0205, (u8 *)gain);
1541 static int imx091_group_hold_wr(struct imx091_info *info,
1542 struct nvc_imager_ae *ae)
1545 bool groupHoldEnable;
1546 struct imx091_reg reg_list[6];
1549 groupHoldEnable = ae->gain_enable |
1550 ae->frame_length_enable |
1551 ae->coarse_time_enable;
1553 if (groupHoldEnable) {
1554 err = imx091_i2c_wr8(info->i2c_client, 0x104, 1);
1556 dev_err(&info->i2c_client->dev,
1557 "Error: %s fail to enable grouphold\n",
1563 if (ae->gain_enable) {
1564 imx091_gain_reg(reg_list + count, ae->gain);
1567 if (ae->coarse_time_enable) {
1568 imx091_coarse_time_reg(reg_list + count, ae->coarse_time);
1571 if (ae->frame_length_enable) {
1572 imx091_frame_length_reg(reg_list + count, ae->frame_length);
1575 reg_list[count].addr = IMX091_TABLE_END;
1576 err = imx091_i2c_wr_table(info, reg_list);
1578 dev_err(&info->i2c_client->dev, "Error: %s i2c wr_table fail\n",
1582 if (groupHoldEnable) {
1583 err = imx091_i2c_wr8(info->i2c_client, 0x104, 0);
1585 dev_err(&info->i2c_client->dev,
1586 "Error: %s fail to release grouphold\n",
1593 static int imx091_test_pattern_wr(struct imx091_info *info, unsigned pattern)
1595 if (pattern >= ARRAY_SIZE(test_patterns))
1598 return imx091_i2c_wr_table(info, test_patterns[pattern]);
1601 static int imx091_set_flash_output(struct imx091_info *info)
1603 struct imx091_flash_config *fcfg;
1610 fcfg = &info->pdata->flash_cap;
1611 if (fcfg->xvs_trigger_enabled)
1613 if (fcfg->sdo_trigger_enabled)
1615 dev_dbg(&info->i2c_client->dev, "%s: %02x\n", __func__, val);
1616 /* disable all flash pulse output */
1617 ret = imx091_i2c_wr8(info->i2c_client, 0x304A, 0);
1618 /* config XVS/SDO pin output mode */
1619 ret |= imx091_i2c_wr8(info->i2c_client, 0x3240, val);
1620 /* set the control pulse width settings - Gain + Step
1621 * Pulse width(sec) = 64 * 2^(Gain) * (Step + 1) / Logic Clk
1622 * Logic Clk = ExtClk * PLL Multipiler / Pre_Div / Post_Div
1623 * / Logic Clk Division Ratio
1624 * Logic Clk Division Ratio = 5 @4lane, 10 @2lane, 20 @1lane
1626 ret |= imx091_i2c_wr8(info->i2c_client, 0x307C, 0x07);
1627 ret |= imx091_i2c_wr8(info->i2c_client, 0x307D, 0x3F);
1631 static void imx091_get_flash_cap(struct imx091_info *info)
1633 struct nvc_imager_cap *fcap = info->cap;
1634 struct imx091_flash_config *fcfg;
1639 fcfg = &info->pdata->flash_cap;
1640 fcap->flash_control_enabled =
1641 fcfg->xvs_trigger_enabled | fcfg->sdo_trigger_enabled;
1642 fcap->adjustable_flash_timing = fcfg->adjustable_flash_timing;
1645 static int imx091_flash_control(
1646 struct imx091_info *info, union nvc_imager_flash_control *fm)
1655 ret = imx091_i2c_wr8(info->i2c_client, 0x304A, 0);
1658 if (fm->settings.enable) {
1659 if (fm->settings.edge_trig_en) {
1661 if (fm->settings.start_edge)
1663 if (fm->settings.repeat)
1665 f_tim |= fm->settings.delay_frm & 0x03;
1669 ret |= imx091_i2c_wr8(info->i2c_client, 0x307B, f_tim);
1670 ret |= imx091_i2c_wr8(info->i2c_client, 0x304A, f_cntl);
1672 dev_dbg(&info->i2c_client->dev,
1673 "%s: %04x %02x %02x\n", __func__, fm->mode, f_tim, f_cntl);
1677 static int imx091_gpio_rd(struct imx091_info *info,
1682 if (info->gpio[i].flag) {
1683 val = gpio_get_value_cansleep(info->gpio[i].gpio);
1686 dev_dbg(&info->i2c_client->dev, "%s %u %d\n",
1687 __func__, info->gpio[i].gpio, val);
1688 if (!info->gpio[i].active_high)
1692 return val; /* return read value or error */
1695 static int imx091_gpio_wr(struct imx091_info *info,
1697 int val) /* val: 0=deassert, 1=assert */
1701 if (info->gpio[i].flag) {
1704 if (!info->gpio[i].active_high)
1708 gpio_set_value_cansleep(info->gpio[i].gpio, val);
1709 dev_dbg(&info->i2c_client->dev, "%s %u %d\n",
1710 __func__, info->gpio[i].gpio, val);
1712 return err; /* return value written or error */
1715 static int imx091_gpio_pwrdn(struct imx091_info *info, int val)
1719 prev_val = imx091_gpio_rd(info, IMX091_GPIO_PWDN);
1721 return 1; /* assume PWRDN hardwired deasserted */
1723 if (val == prev_val)
1724 return 0; /* no change */
1726 imx091_gpio_wr(info, IMX091_GPIO_PWDN, val);
1727 return 1; /* return state change */
1730 static int imx091_gpio_reset(struct imx091_info *info, int val)
1735 if (!info->reset_flag) {
1736 info->reset_flag = true;
1737 err = imx091_gpio_wr(info, IMX091_GPIO_RESET, 1);
1739 return 0; /* flag no reset */
1741 usleep_range(1000, 1500);
1742 imx091_gpio_wr(info, IMX091_GPIO_RESET, 0);
1743 msleep(IMX091_STARTUP_DELAY_MS); /* startup delay */
1744 err = 1; /* flag that a reset was done */
1747 info->reset_flag = false;
1752 static void imx091_gpio_able(struct imx091_info *info, int val)
1755 imx091_gpio_wr(info, IMX091_GPIO_GP1, val);
1757 imx091_gpio_wr(info, IMX091_GPIO_GP1, val);
1760 static void imx091_gpio_exit(struct imx091_info *info)
1764 for (i = 0; i < ARRAY_SIZE(imx091_gpios); i++) {
1765 if (info->gpio[i].flag && info->gpio[i].own) {
1766 gpio_free(info->gpio[i].gpio);
1767 info->gpio[i].own = false;
1772 static void imx091_gpio_init(struct imx091_info *info)
1775 unsigned long flags;
1781 for (i = 0; i < ARRAY_SIZE(imx091_gpios); i++)
1782 info->gpio[i].flag = false;
1783 if (!info->pdata->gpio_count || !info->pdata->gpio)
1786 for (i = 0; i < ARRAY_SIZE(imx091_gpios); i++) {
1787 type = imx091_gpios[i].gpio_type;
1788 for (j = 0; j < info->pdata->gpio_count; j++) {
1789 if (type == info->pdata->gpio[j].gpio_type)
1792 if (j == info->pdata->gpio_count)
1795 info->gpio[type].gpio = info->pdata->gpio[j].gpio;
1796 info->gpio[type].flag = true;
1797 if (imx091_gpios[i].use_flags) {
1798 flags = imx091_gpios[i].flags;
1799 info->gpio[type].active_high =
1800 imx091_gpios[i].active_high;
1802 info->gpio[type].active_high =
1803 info->pdata->gpio[j].active_high;
1804 if (info->gpio[type].active_high)
1805 flags = GPIOF_OUT_INIT_LOW;
1807 flags = GPIOF_OUT_INIT_HIGH;
1809 if (!info->pdata->gpio[j].init_en)
1812 snprintf(label, sizeof(label), "imx091_%u_%s",
1813 info->pdata->num, imx091_gpios[i].label);
1814 err = gpio_request_one(info->gpio[type].gpio, flags, label);
1816 dev_err(&info->i2c_client->dev, "%s ERR %s %u\n",
1817 __func__, label, info->gpio[type].gpio);
1819 info->gpio[type].own = true;
1820 dev_dbg(&info->i2c_client->dev, "%s %s %u\n",
1821 __func__, label, info->gpio[type].gpio);
1826 static void imx091_mclk_disable(struct imx091_info *info)
1828 dev_dbg(&info->i2c_client->dev, "%s: disable MCLK\n", __func__);
1829 clk_disable_unprepare(info->mclk);
1832 static int imx091_mclk_enable(struct imx091_info *info)
1835 unsigned long mclk_init_rate =
1836 nvc_imager_get_mclk(info->cap, &imx091_dflt_cap, 0);
1838 dev_dbg(&info->i2c_client->dev, "%s: enable MCLK with %lu Hz\n",
1839 __func__, mclk_init_rate);
1841 err = clk_set_rate(info->mclk, mclk_init_rate);
1843 err = clk_prepare_enable(info->mclk);
1848 static int imx091_vreg_dis_all(struct imx091_info *info)
1852 if (!info->pdata || !info->pdata->power_off)
1855 err = info->pdata->power_off(info->vreg);
1857 imx091_mclk_disable(info);
1862 static int imx091_vreg_en_all(struct imx091_info *info)
1866 if (!info->pdata || !info->pdata->power_on)
1869 err = imx091_mclk_enable(info);
1873 err = info->pdata->power_on(info->vreg);
1875 imx091_mclk_disable(info);
1880 static void imx091_vreg_exit(struct imx091_info *info)
1884 for (i = 0; i < ARRAY_SIZE(imx091_vregs); i++) {
1885 if (info->vreg[i].vreg)
1886 regulator_put(info->vreg[i].vreg);
1887 info->vreg[i].vreg = NULL;
1890 if (likely(info->imx091_ext_reg_vcm_vdd))
1891 regulator_put(info->imx091_ext_reg_vcm_vdd);
1892 info->imx091_ext_reg_vcm_vdd = NULL;
1894 if (likely(info->imx091_ext_reg_i2c_vdd))
1895 regulator_put(info->imx091_ext_reg_i2c_vdd);
1896 info->imx091_ext_reg_i2c_vdd = NULL;
1899 static int imx091_vreg_init(struct imx091_info *info)
1905 for (i = 0; i < ARRAY_SIZE(imx091_vregs); i++) {
1906 j = imx091_vregs[i].vreg_num;
1907 info->vreg[j].vreg_name = imx091_vregs[i].vreg_name;
1908 info->vreg[j].vreg_flag = false;
1909 info->vreg[j].vreg = regulator_get(&info->i2c_client->dev,
1910 info->vreg[j].vreg_name);
1911 if (IS_ERR(info->vreg[j].vreg)) {
1912 dev_dbg(&info->i2c_client->dev, "%s %s ERR: %p\n",
1913 __func__, info->vreg[j].vreg_name,
1914 info->vreg[j].vreg);
1915 err |= PTR_ERR(info->vreg[j].vreg);
1916 info->vreg[j].vreg = NULL;
1918 dev_dbg(&info->i2c_client->dev, "%s: %s\n",
1919 __func__, info->vreg[j].vreg_name);
1925 static int imx091_pm_wr(struct imx091_info *info, int pwr)
1931 if ((info->pdata->cfg & (NVC_CFG_OFF2STDBY | NVC_CFG_BOOT_INIT)) &&
1932 (pwr == NVC_PWR_OFF ||
1933 pwr == NVC_PWR_STDBY_OFF))
1934 pwr = NVC_PWR_STDBY;
1935 if (pwr == info->pwr_dev)
1939 case NVC_PWR_OFF_FORCE:
1941 case NVC_PWR_STDBY_OFF:
1942 imx091_gpio_pwrdn(info, 1);
1943 err = imx091_vreg_dis_all(info);
1944 imx091_gpio_able(info, 0);
1945 imx091_gpio_reset(info, 0);
1946 info->mode_valid = false;
1951 imx091_gpio_pwrdn(info, 1);
1952 err = imx091_vreg_en_all(info);
1953 imx091_gpio_able(info, 1);
1958 if (info->pwr_dev != NVC_PWR_ON &&
1959 info->pwr_dev != NVC_PWR_COMM)
1960 imx091_gpio_pwrdn(info, 1);
1961 err = imx091_vreg_en_all(info);
1962 imx091_gpio_able(info, 1);
1963 ret = imx091_gpio_pwrdn(info, 0);
1964 ret &= !imx091_gpio_reset(info, 1);
1965 if (ret) /* if no reset && pwrdn changed states then delay */
1966 msleep(IMX091_STARTUP_DELAY_MS);
1968 err = imx091_i2c_rd16(info->i2c_client,
1969 IMX091_ID_ADDRESS, &val);
1978 dev_err(&info->i2c_client->dev, "%s err %d\n", __func__, err);
1981 info->pwr_dev = pwr;
1982 dev_dbg(&info->i2c_client->dev, "%s pwr_dev=%d\n",
1983 __func__, info->pwr_dev);
1990 static int imx091_pm_wr_s(struct imx091_info *info, int pwr)
1995 if ((info->s_mode == NVC_SYNC_OFF) ||
1996 (info->s_mode == NVC_SYNC_MASTER) ||
1997 (info->s_mode == NVC_SYNC_STEREO))
1998 err1 = imx091_pm_wr(info, pwr);
1999 if ((info->s_mode == NVC_SYNC_SLAVE) ||
2000 (info->s_mode == NVC_SYNC_STEREO))
2001 err2 = imx091_pm_wr(info->s_info, pwr);
2005 static int imx091_pm_api_wr(struct imx091_info *info, int pwr)
2009 if (!pwr || (pwr > NVC_PWR_ON))
2012 if (pwr > info->pwr_dev)
2013 err = imx091_pm_wr_s(info, pwr);
2015 info->pwr_api = pwr;
2017 info->pwr_api = NVC_PWR_ERR;
2018 if (info->pdata->cfg & NVC_CFG_NOERR)
2024 static int imx091_pm_dev_wr(struct imx091_info *info, int pwr)
2026 if (pwr < info->pwr_api)
2027 pwr = info->pwr_api;
2028 if (info->mode_enable)
2030 return imx091_pm_wr(info, pwr);
2033 static void imx091_pm_exit(struct imx091_info *info)
2035 imx091_pm_dev_wr(info, NVC_PWR_OFF_FORCE);
2036 imx091_vreg_exit(info);
2037 imx091_gpio_exit(info);
2040 static void imx091_pm_init(struct imx091_info *info)
2042 imx091_gpio_init(info);
2043 imx091_vreg_init(info);
2046 static int imx091_reset(struct imx091_info *info, u32 level)
2050 if (level == NVC_RESET_SOFT) {
2051 err = imx091_pm_wr(info, NVC_PWR_COMM);
2053 err |= imx091_i2c_wr8(info->i2c_client, 0x0103, 0x01);
2055 err = imx091_pm_wr(info, NVC_PWR_OFF_FORCE);
2057 err |= imx091_pm_wr(info, info->pwr_api);
2061 static int imx091_dev_id(struct imx091_info *info)
2067 dev_dbg(&info->i2c_client->dev, "%s +++++\n",
2069 imx091_pm_dev_wr(info, NVC_PWR_COMM);
2070 dev_dbg(&info->i2c_client->dev, "DUCK:%s:%d\n",
2071 __func__, __LINE__);
2072 err = imx091_i2c_rd16(info->i2c_client, IMX091_ID_ADDRESS, &val);
2074 dev_dbg(&info->i2c_client->dev, "%s found devId: %x\n",
2076 info->sdata.sensor_id_minor = 0;
2077 for (i = 0; i < ARRAY_SIZE(imx091_ids); i++) {
2078 if (val == imx091_ids[i]) {
2079 info->sdata.sensor_id_minor = val;
2083 if (!info->sdata.sensor_id_minor) {
2085 dev_dbg(&info->i2c_client->dev, "%s No devId match\n",
2089 imx091_pm_dev_wr(info, NVC_PWR_OFF);
2090 dev_dbg(&info->i2c_client->dev, "%s -----\n",
2095 static int imx091_mode_enable(struct imx091_info *info, bool mode_enable)
2101 val = IMX091_STREAM_ENABLE;
2103 val = IMX091_STREAM_DISABLE;
2104 err = imx091_i2c_wr8(info->i2c_client, IMX091_STREAM_CONTROL_REG, val);
2106 info->mode_enable = mode_enable;
2107 dev_dbg(&info->i2c_client->dev, "%s streaming=%x\n",
2108 __func__, info->mode_enable);
2110 imx091_pm_dev_wr(info, NVC_PWR_OFF);
2112 msleep(IMX091_WAIT_MS);
2116 static int imx091_mode_rd(struct imx091_info *info,
2123 if (!res_x && !res_y) {
2124 *index = info->cap->preferred_mode_index;
2128 for (i = 0; i < imx091_num_modes; i++) {
2129 if ((res_x == imx091_mode_table[i]->sensor_mode.res_x) &&
2130 (res_y == imx091_mode_table[i]->sensor_mode.res_y)) {
2135 if (i == imx091_num_modes) {
2136 dev_err(&info->i2c_client->dev,
2137 "%s invalid resolution: %dx%d\n",
2138 __func__, res_x, res_y);
2146 static int imx091_mode_wr_full(struct imx091_info *info, u32 mode_index)
2150 imx091_pm_dev_wr(info, NVC_PWR_ON);
2151 imx091_bin_wr(info, 0);
2152 err = imx091_i2c_wr_table(info,
2153 imx091_mode_table[mode_index]->p_mode_i2c);
2155 info->mode_index = mode_index;
2156 info->mode_valid = true;
2158 info->mode_valid = false;
2164 static int imx091_mode_wr(struct imx091_info *info,
2165 struct nvc_imager_bayer *mode)
2170 err = imx091_mode_rd(info, mode->res_x, mode->res_y, &mode_index);
2174 if (!mode->res_x && !mode->res_y) {
2175 if (mode->frame_length || mode->coarse_time || mode->gain) {
2176 /* write exposure only */
2177 err = imx091_exposure_wr(info, mode);
2180 /* turn off streaming */
2181 err = imx091_mode_enable(info, false);
2186 if (!info->mode_valid || (info->mode_index != mode_index))
2187 err = imx091_mode_wr_full(info, mode_index);
2189 dev_dbg(&info->i2c_client->dev, "%s short mode\n", __func__);
2190 err |= imx091_exposure_wr(info, mode);
2192 info->mode_valid = false;
2193 goto imx091_mode_wr_err;
2196 err = imx091_set_flash_output(info);
2198 err |= imx091_mode_enable(info, true);
2200 goto imx091_mode_wr_err;
2205 if (!info->mode_enable)
2206 imx091_pm_dev_wr(info, NVC_PWR_STDBY);
2211 static int imx091_param_rd(struct imx091_info *info, unsigned long arg)
2213 struct nvc_param params;
2214 struct imx091_reg *p_i2c_table;
2215 const void *data_ptr;
2220 if (copy_from_user(¶ms,
2221 (const void __user *)arg,
2222 sizeof(struct nvc_param))) {
2223 dev_err(&info->i2c_client->dev,
2224 "%s copy_from_user err line %d\n", __func__, __LINE__);
2228 if (info->s_mode == NVC_SYNC_SLAVE)
2229 info = info->s_info;
2231 switch (params.param) {
2232 case NVC_PARAM_GAIN:
2233 imx091_pm_dev_wr(info, NVC_PWR_COMM);
2234 err = imx091_gain_rd(info, &u32val);
2235 imx091_pm_dev_wr(info, NVC_PWR_OFF);
2236 dev_dbg(&info->i2c_client->dev, "%s GAIN: %u err: %d\n",
2237 __func__, u32val, err);
2242 data_size = sizeof(u32val);
2245 case NVC_PARAM_STEREO_CAP:
2246 if (info->s_info != NULL)
2250 dev_dbg(&info->i2c_client->dev, "%s STEREO_CAP: %d\n",
2253 data_size = sizeof(err);
2256 case NVC_PARAM_STEREO:
2257 dev_dbg(&info->i2c_client->dev, "%s STEREO: %d\n",
2258 __func__, info->s_mode);
2259 data_ptr = &info->s_mode;
2260 data_size = sizeof(info->s_mode);
2264 err = imx091_dev_id(info);
2265 dev_dbg(&info->i2c_client->dev, "%s STS: %d\n",
2268 data_size = sizeof(err);
2271 case NVC_PARAM_DEV_ID:
2272 if (!info->sdata.sensor_id_minor)
2273 imx091_dev_id(info);
2274 data_ptr = &info->sdata.sensor_id;
2275 data_size = sizeof(info->sdata.sensor_id) * 2;
2276 dev_dbg(&info->i2c_client->dev, "%s DEV_ID: %x-%x\n",
2277 __func__, info->sdata.sensor_id,
2278 info->sdata.sensor_id_minor);
2281 case NVC_PARAM_SENSOR_TYPE:
2282 data_ptr = &info->sdata.sensor_type;
2283 data_size = sizeof(info->sdata.sensor_type);
2284 dev_dbg(&info->i2c_client->dev, "%s SENSOR_TYPE: %d\n",
2285 __func__, info->sdata.sensor_type);
2288 case NVC_PARAM_FOCAL_LEN:
2289 data_ptr = &info->sdata.focal_len;
2290 data_size = sizeof(info->sdata.focal_len);
2291 dev_dbg(&info->i2c_client->dev, "%s FOCAL_LEN: %u\n",
2292 __func__, info->sdata.focal_len);
2295 case NVC_PARAM_MAX_APERTURE:
2296 data_ptr = &info->sdata.max_aperture;
2297 data_size = sizeof(info->sdata.max_aperture);
2298 dev_dbg(&info->i2c_client->dev, "%s MAX_APERTURE: %u\n",
2299 __func__, info->sdata.max_aperture);
2302 case NVC_PARAM_FNUMBER:
2303 data_ptr = &info->sdata.fnumber;
2304 data_size = sizeof(info->sdata.fnumber);
2305 dev_dbg(&info->i2c_client->dev, "%s FNUMBER: %u\n",
2306 __func__, info->sdata.fnumber);
2309 case NVC_PARAM_VIEW_ANGLE_H:
2310 data_ptr = &info->sdata.view_angle_h;
2311 data_size = sizeof(info->sdata.view_angle_h);
2312 dev_dbg(&info->i2c_client->dev, "%s VIEW_ANGLE_H: %u\n",
2313 __func__, info->sdata.view_angle_h);
2316 case NVC_PARAM_VIEW_ANGLE_V:
2317 data_ptr = &info->sdata.view_angle_v;
2318 data_size = sizeof(info->sdata.view_angle_v);
2319 dev_dbg(&info->i2c_client->dev, "%s VIEW_ANGLE_V: %u\n",
2320 __func__, info->sdata.view_angle_v);
2324 dev_dbg(&info->i2c_client->dev, "%s I2C\n", __func__);
2325 if (params.sizeofvalue > IMX091_I2C_TABLE_MAX_ENTRIES) {
2326 dev_err(&info->i2c_client->dev,
2327 "%s NVC_PARAM_I2C request size too large\n",
2331 p_i2c_table = kzalloc(sizeof(params.sizeofvalue), GFP_KERNEL);
2332 if (p_i2c_table == NULL) {
2333 pr_err("%s: kzalloc error\n", __func__);
2337 if (copy_from_user(p_i2c_table,
2338 (const void __user *)(uintptr_t)params.p_value,
2339 params.sizeofvalue)) {
2340 dev_err(&info->i2c_client->dev,
2341 "%s copy_from_user err line %d\n",
2342 __func__, __LINE__);
2347 imx091_pm_dev_wr(info, NVC_PWR_COMM);
2348 err = imx091_i2c_rd_table(info, p_i2c_table);
2349 imx091_pm_dev_wr(info, NVC_PWR_OFF);
2350 if (copy_to_user((void __user *)(uintptr_t)params.p_value,
2352 params.sizeofvalue)) {
2353 dev_err(&info->i2c_client->dev,
2354 "%s copy_to_user err line %d\n",
2355 __func__, __LINE__);
2361 dev_dbg(&info->i2c_client->dev,
2362 "%s unsupported parameter: %d\n",
2363 __func__, params.param);
2367 if (params.sizeofvalue < data_size) {
2368 dev_err(&info->i2c_client->dev,
2369 "%s data size mismatch %d != %d Param: %d\n",
2370 __func__, params.sizeofvalue, data_size, params.param);
2374 if (copy_to_user((void __user *)(uintptr_t)params.p_value,
2375 data_ptr, data_size)) {
2376 dev_err(&info->i2c_client->dev,
2377 "%s copy_to_user err line %d\n", __func__, __LINE__);
2384 static int imx091_param_wr_s(struct imx091_info *info,
2385 struct nvc_param *params,
2388 struct imx091_reg *p_i2c_table;
2393 switch (params->param) {
2394 case NVC_PARAM_GAIN:
2395 dev_dbg(&info->i2c_client->dev, "%s GAIN: %u\n",
2397 imx091_pm_dev_wr(info, NVC_PWR_COMM);
2398 err = imx091_gain_wr(info, u32val);
2400 dev_err(&info->i2c_client->dev,
2401 "Error: %s SET GAIN ERR",
2404 imx091_pm_dev_wr(info, NVC_PWR_STDBY);
2407 case NVC_PARAM_RESET:
2408 err = imx091_reset(info, u32val);
2409 dev_dbg(&info->i2c_client->dev, "%s RESET=%d err=%d\n",
2410 __func__, u32val, err);
2413 case NVC_PARAM_TESTMODE:
2414 dev_dbg(&info->i2c_client->dev, "%s TESTMODE: %u\n",
2415 __func__, (unsigned)u8val);
2417 u32val = info->test_pattern;
2420 imx091_pm_dev_wr(info, NVC_PWR_ON);
2421 err = imx091_test_pattern_wr(info, u32val);
2423 imx091_pm_dev_wr(info, NVC_PWR_OFF);
2426 case NVC_PARAM_TEST_PATTERN:
2427 dev_dbg(&info->i2c_client->dev, "%s TEST_PATTERN: %d\n",
2429 info->test_pattern = u32val;
2432 case NVC_PARAM_SELF_TEST:
2433 err = imx091_dev_id(info);
2434 dev_dbg(&info->i2c_client->dev, "%s SELF_TEST: %d\n",
2439 dev_dbg(&info->i2c_client->dev, "%s I2C\n", __func__);
2440 if (params->sizeofvalue > IMX091_I2C_TABLE_MAX_ENTRIES) {
2441 dev_err(&info->i2c_client->dev,
2442 "%s NVC_PARAM_I2C request size too large\n",
2446 p_i2c_table = kzalloc(sizeof(params->sizeofvalue), GFP_KERNEL);
2447 if (p_i2c_table == NULL) {
2448 dev_err(&info->i2c_client->dev,
2449 "%s kzalloc err line %d\n",
2450 __func__, __LINE__);
2454 if (copy_from_user(p_i2c_table,
2455 (const void __user *)(uintptr_t)params->p_value,
2456 params->sizeofvalue)) {
2457 dev_err(&info->i2c_client->dev,
2458 "%s copy_from_user err line %d\n",
2459 __func__, __LINE__);
2464 imx091_pm_dev_wr(info, NVC_PWR_ON);
2465 err = imx091_i2c_wr_table(info, p_i2c_table);
2469 case NVC_PARAM_SET_SENSOR_FLASH_MODE:
2471 union nvc_imager_flash_control fm;
2472 if (copy_from_user(&fm,
2473 (const void __user *)(uintptr_t)params->p_value,
2475 pr_info("%s:fail set flash mode.\n", __func__);
2478 return imx091_flash_control(info, &fm);
2482 dev_dbg(&info->i2c_client->dev,
2483 "%s unsupported parameter: %d\n",
2484 __func__, params->param);
2489 static int imx091_param_wr(struct imx091_info *info, unsigned long arg)
2491 struct nvc_param params;
2496 if (copy_from_user(¶ms, (const void __user *)arg,
2497 sizeof(struct nvc_param))) {
2498 dev_err(&info->i2c_client->dev,
2499 "%s copy_from_user err line %d\n", __func__, __LINE__);
2503 if (copy_from_user(&u32val,
2504 (const void __user *)(uintptr_t)params.p_value,
2506 dev_err(&info->i2c_client->dev, "%s %d copy_from_user err\n",
2507 __func__, __LINE__);
2512 /* parameters independent of sync mode */
2513 switch (params.param) {
2514 case NVC_PARAM_STEREO:
2515 dev_dbg(&info->i2c_client->dev, "%s STEREO: %d\n",
2517 if (u8val == info->s_mode)
2522 info->s_mode = u8val;
2523 if (info->s_info != NULL) {
2524 info->s_info->s_mode = u8val;
2525 imx091_pm_wr(info->s_info, NVC_PWR_OFF);
2529 case NVC_SYNC_MASTER:
2530 info->s_mode = u8val;
2531 if (info->s_info != NULL)
2532 info->s_info->s_mode = u8val;
2535 case NVC_SYNC_SLAVE:
2536 if (info->s_info != NULL) {
2538 info->s_info->pwr_api = info->pwr_api;
2539 err = imx091_pm_wr(info->s_info,
2542 info->s_mode = u8val;
2543 info->s_info->s_mode = u8val;
2545 if (info->s_mode != NVC_SYNC_STEREO)
2546 imx091_pm_wr(info->s_info,
2555 case NVC_SYNC_STEREO:
2556 if (info->s_info != NULL) {
2558 info->s_info->pwr_api = info->pwr_api;
2559 err = imx091_pm_wr(info->s_info,
2562 info->s_mode = u8val;
2563 info->s_info->s_mode = u8val;
2565 if (info->s_mode != NVC_SYNC_SLAVE)
2566 imx091_pm_wr(info->s_info,
2578 if (info->pdata->cfg & NVC_CFG_NOERR)
2583 case NVC_PARAM_GROUP_HOLD:
2585 struct nvc_imager_ae ae;
2586 dev_dbg(&info->i2c_client->dev, "%s GROUP_HOLD\n",
2588 if (copy_from_user(&ae,
2589 (const void __user *)(uintptr_t)params.p_value,
2590 sizeof(struct nvc_imager_ae))) {
2591 dev_err(&info->i2c_client->dev,
2592 "Error: %s %d copy_from_user err\n",
2593 __func__, __LINE__);
2596 imx091_pm_dev_wr(info, NVC_PWR_COMM);
2597 err = imx091_group_hold_wr(info, &ae);
2598 imx091_pm_dev_wr(info, NVC_PWR_STDBY);
2603 /* parameters dependent on sync mode */
2604 switch (info->s_mode) {
2606 case NVC_SYNC_MASTER:
2607 return imx091_param_wr_s(info, ¶ms, u32val);
2609 case NVC_SYNC_SLAVE:
2610 return imx091_param_wr_s(info->s_info, ¶ms,
2613 case NVC_SYNC_STEREO:
2614 err = imx091_param_wr_s(info, ¶ms, u32val);
2615 if (!(info->pdata->cfg & NVC_CFG_SYNC_I2C_MUX))
2616 err |= imx091_param_wr_s(info->s_info,
2621 dev_err(&info->i2c_client->dev, "%s %d internal err\n",
2622 __func__, __LINE__);
2628 static int imx091_get_fuse_id(struct imx091_info *info)
2632 if (info->fuse_id.size)
2635 ret = imx091_i2c_wr8(info->i2c_client, 0x34C9, 0x10);
2637 for (i = 0; i < IMX091_FUSE_ID_SIZE ; i++) {
2638 ret |= imx091_i2c_rd8(info->i2c_client,
2640 &info->fuse_id.data[i]);
2644 info->fuse_id.size = i;
2649 static long imx091_ioctl(struct file *file,
2653 struct imx091_info *info = file->private_data;
2654 struct nvc_imager_bayer mode;
2655 struct nvc_imager_mode_list mode_list;
2656 struct nvc_imager_mode mode_table[IMX091_NUM_MODES_MAX];
2657 struct nvc_imager_dnvc dnvc;
2658 unsigned int mode_table_size;
2659 const void *data_ptr;
2665 if (tegra_platform_is_fpga()) {
2666 imx091_mode_table = imx091_mode_table_fpga;
2667 imx091_num_modes = ARRAY_SIZE(imx091_mode_table_fpga);
2670 imx091_mode_table = imx091_mode_table_non_fpga;
2671 imx091_num_modes = ARRAY_SIZE(imx091_mode_table_non_fpga);
2674 mode_table_size = sizeof(struct nvc_imager_mode) * imx091_num_modes;
2676 switch (_IOC_NR(cmd)) {
2677 case _IOC_NR(NVC_IOCTL_FUSE_ID):
2678 err = imx091_get_fuse_id(info);
2681 pr_err("%s %d %d\n", __func__, __LINE__, err);
2684 if (copy_to_user((void __user *)arg,
2686 sizeof(struct nvc_fuseid))) {
2687 pr_err("%s: %d: fail copy fuse id to user space\n",
2688 __func__, __LINE__);
2693 case _IOC_NR(NVC_IOCTL_PARAM_WR):
2694 err = imx091_param_wr(info, arg);
2697 case _IOC_NR(NVC_IOCTL_PARAM_RD):
2698 err = imx091_param_rd(info, arg);
2701 case _IOC_NR(NVC_IOCTL_DYNAMIC_RD):
2702 if (copy_from_user(&dnvc, (const void __user *)arg,
2703 sizeof(struct nvc_imager_dnvc))) {
2704 dev_err(&info->i2c_client->dev,
2705 "%s copy_from_user err line %d\n",
2706 __func__, __LINE__);
2710 dev_dbg(&info->i2c_client->dev, "%s DYNAMIC_RD x=%d y=%d\n",
2711 __func__, dnvc.res_x, dnvc.res_y);
2712 err = imx091_mode_rd(info, dnvc.res_x, dnvc.res_y, &i);
2717 if (copy_to_user((void __user *)dnvc.p_mode,
2718 &imx091_mode_table[i]->sensor_mode,
2719 sizeof(struct nvc_imager_mode))) {
2720 dev_err(&info->i2c_client->dev,
2721 "%s copy_to_user err line %d\n",
2722 __func__, __LINE__);
2728 if (copy_to_user((void __user *)dnvc.p_dnvc,
2729 &imx091_mode_table[i]->sensor_dnvc,
2730 sizeof(struct nvc_imager_dynamic_nvc))) {
2731 dev_err(&info->i2c_client->dev,
2732 "%s copy_to_user err line %d\n",
2733 __func__, __LINE__);
2740 case _IOC_NR(NVC_IOCTL_MODE_WR):
2741 if (copy_from_user(&mode, (const void __user *)arg,
2742 sizeof(struct nvc_imager_bayer))) {
2743 dev_err(&info->i2c_client->dev,
2744 "%s copy_from_user err line %d\n",
2745 __func__, __LINE__);
2749 dev_info(&info->i2c_client->dev,
2750 "%s MODE_WR x=%d y=%d coarse=%u frame=%u gain=%u\n",
2751 __func__, mode.res_x, mode.res_y,
2752 mode.coarse_time, mode.frame_length, mode.gain);
2753 err = imx091_mode_wr(info, &mode);
2756 case _IOC_NR(NVC_IOCTL_MODE_RD):
2758 * Return a list of modes that sensor bayer supports.
2759 * If called with a NULL ptr to pModes,
2760 * then it just returns the count.
2762 dev_dbg(&info->i2c_client->dev, "%s MODE_RD n=%d\n",
2763 __func__, imx091_num_modes);
2764 if (copy_from_user(&mode_list, (const void __user *)arg,
2765 sizeof(struct nvc_imager_mode_list))) {
2766 dev_err(&info->i2c_client->dev,
2767 "%s copy_from_user err line %d\n",
2768 __func__, __LINE__);
2772 num_modes = imx091_num_modes;
2773 if (mode_list.p_num_mode != NULL) {
2774 if (copy_to_user((void __user *)mode_list.p_num_mode,
2775 &num_modes, sizeof(num_modes))) {
2776 dev_err(&info->i2c_client->dev,
2777 "%s copy_to_user err line %d\n",
2778 __func__, __LINE__);
2783 if (mode_list.p_modes != NULL) {
2784 for (i = 0; i < imx091_num_modes; i++) {
2786 imx091_mode_table[i]->sensor_mode;
2788 if (copy_to_user((void __user *)mode_list.p_modes,
2789 (const void *)&mode_table,
2791 dev_err(&info->i2c_client->dev,
2792 "%s copy_to_user err line %d\n",
2793 __func__, __LINE__);
2800 case _IOC_NR(NVC_IOCTL_PWR_WR):
2801 /* This is a Guaranteed Level of Service (GLOS) call */
2803 dev_dbg(&info->i2c_client->dev, "%s PWR_WR: %d\n",
2805 err = imx091_pm_api_wr(info, pwr);
2808 case _IOC_NR(NVC_IOCTL_PWR_RD):
2809 if (info->s_mode == NVC_SYNC_SLAVE)
2810 pwr = info->s_info->pwr_api / 2;
2812 pwr = info->pwr_api / 2;
2813 dev_dbg(&info->i2c_client->dev, "%s PWR_RD: %d\n",
2815 if (copy_to_user((void __user *)arg, (const void *)&pwr,
2817 dev_err(&info->i2c_client->dev,
2818 "%s copy_to_user err line %d\n",
2819 __func__, __LINE__);
2825 case _IOC_NR(NVC_IOCTL_CAPS_RD):
2826 dev_dbg(&info->i2c_client->dev, "%s CAPS_RD n=%zd\n",
2827 __func__, sizeof(imx091_dflt_cap));
2828 data_ptr = info->cap;
2829 if (copy_to_user((void __user *)arg,
2831 sizeof(imx091_dflt_cap))) {
2832 dev_err(&info->i2c_client->dev,
2833 "%s copy_to_user err line %d\n",
2834 __func__, __LINE__);
2840 case _IOC_NR(NVC_IOCTL_STATIC_RD):
2841 dev_dbg(&info->i2c_client->dev, "%s STATIC_RD n=%lu\n",
2843 (unsigned long)sizeof(struct nvc_imager_static_nvc));
2844 data_ptr = &info->sdata;
2845 if (copy_to_user((void __user *)arg,
2847 sizeof(struct nvc_imager_static_nvc))) {
2848 dev_err(&info->i2c_client->dev,
2849 "%s copy_to_user err line %d\n",
2850 __func__, __LINE__);
2857 dev_dbg(&info->i2c_client->dev, "%s unsupported ioctl: %x\n",
2864 static void imx091_sdata_init(struct imx091_info *info)
2866 if (info->pdata->cap)
2867 info->cap = info->pdata->cap;
2869 info->cap = &imx091_dflt_cap;
2870 memcpy(&info->sdata, &imx091_dflt_sdata, sizeof(info->sdata));
2871 if (info->pdata->lens_focal_length)
2872 info->sdata.focal_len = info->pdata->lens_focal_length;
2873 if (info->pdata->lens_max_aperture)
2874 info->sdata.max_aperture = info->pdata->lens_max_aperture;
2875 if (info->pdata->lens_fnumber)
2876 info->sdata.fnumber = info->pdata->lens_fnumber;
2877 if (info->pdata->lens_view_angle_h)
2878 info->sdata.view_angle_h = info->pdata->lens_view_angle_h;
2879 if (info->pdata->lens_view_angle_v)
2880 info->sdata.view_angle_v = info->pdata->lens_view_angle_v;
2883 static int imx091_sync_en(unsigned num, unsigned sync)
2885 struct imx091_info *master = NULL;
2886 struct imx091_info *slave = NULL;
2887 struct imx091_info *pos = NULL;
2890 list_for_each_entry_rcu(pos, &imx091_info_list, list) {
2891 if (pos->pdata->num == num) {
2897 list_for_each_entry_rcu(pos, &imx091_info_list, list) {
2898 if (pos->pdata->num == sync) {
2905 master->s_info = NULL;
2907 slave->s_info = NULL;
2909 return 0; /* no err if sync disabled */
2912 return -EINVAL; /* err if sync instance is itself */
2914 if ((master != NULL) && (slave != NULL)) {
2915 master->s_info = slave;
2916 slave->s_info = master;
2921 static int imx091_sync_dis(struct imx091_info *info)
2923 if (info->s_info != NULL) {
2924 info->s_info->s_mode = 0;
2925 info->s_info->s_info = NULL;
2927 info->s_info = NULL;
2934 static int imx091_open(struct inode *inode, struct file *file)
2936 struct imx091_info *info = NULL;
2937 struct imx091_info *pos = NULL;
2942 list_for_each_entry_rcu(pos, &imx091_info_list, list) {
2943 if (pos->miscdev.minor == iminor(inode)) {
2950 pr_err("%s err @%d info is null\n", __func__, __LINE__);
2954 dev_dbg(&info->i2c_client->dev, "%s +++++\n", __func__);
2955 err = imx091_sync_en(info->pdata->num, info->pdata->sync);
2957 dev_err(&info->i2c_client->dev,
2958 "%s err: invalid num (%u) and sync (%u) instance\n",
2959 __func__, info->pdata->num, info->pdata->sync);
2960 if (atomic_xchg(&info->in_use, 1)) {
2961 dev_err(&info->i2c_client->dev, "%s err @%d device is busy\n",
2962 __func__, __LINE__);
2965 if (info->s_info != NULL) {
2966 if (atomic_xchg(&info->s_info->in_use, 1)) {
2967 dev_err(&info->i2c_client->dev,
2968 "%s err @%d sync device is busy\n",
2969 __func__, __LINE__);
2972 info->sdata.stereo_cap = 1;
2975 file->private_data = info;
2976 dev_dbg(&info->i2c_client->dev, "%s -----\n", __func__);
2980 static int imx091_release(struct inode *inode, struct file *file)
2982 struct imx091_info *info = file->private_data;
2984 dev_dbg(&info->i2c_client->dev, "%s +++++\n", __func__);
2985 imx091_pm_wr_s(info, NVC_PWR_OFF);
2986 file->private_data = NULL;
2987 WARN_ON(!atomic_xchg(&info->in_use, 0));
2988 if (info->s_info != NULL)
2989 WARN_ON(!atomic_xchg(&info->s_info->in_use, 0));
2990 imx091_sync_dis(info);
2991 dev_dbg(&info->i2c_client->dev, "%s -----\n", __func__);
2995 static const struct file_operations imx091_fileops = {
2996 .owner = THIS_MODULE,
2997 .open = imx091_open,
2998 .unlocked_ioctl = imx091_ioctl,
2999 #ifdef CONFIG_COMPAT
3000 .compat_ioctl = imx091_ioctl,
3002 .release = imx091_release,
3005 static void imx091_del(struct imx091_info *info)
3007 imx091_pm_exit(info);
3008 if ((info->s_mode == NVC_SYNC_SLAVE) ||
3009 (info->s_mode == NVC_SYNC_STEREO))
3010 imx091_pm_exit(info->s_info);
3011 imx091_sync_dis(info);
3012 spin_lock(&imx091_spinlock);
3013 list_del_rcu(&info->list);
3014 spin_unlock(&imx091_spinlock);
3018 static int imx091_remove(struct i2c_client *client)
3020 struct imx091_info *info = i2c_get_clientdata(client);
3022 dev_dbg(&info->i2c_client->dev, "%s\n", __func__);
3023 #ifdef CONFIG_DEBUG_FS
3024 nvc_debugfs_remove(&info->debugfs_info);
3026 misc_deregister(&info->miscdev);
3031 static struct of_device_id imx091_of_match[] = {
3032 { .compatible = "nvidia,imx091", },
3036 MODULE_DEVICE_TABLE(of, imx091_of_match);
3038 static int imx091_get_extra_regulators(struct imx091_info *info)
3040 if (info->pdata->vcm_vdd && !info->imx091_ext_reg_vcm_vdd) {
3041 info->imx091_ext_reg_vcm_vdd = regulator_get(NULL,
3043 if (WARN_ON(IS_ERR(info->imx091_ext_reg_vcm_vdd))) {
3044 pr_err("%s: imx091_ext_reg_vcm_vdd get failed %ld\n",
3046 PTR_ERR(info->imx091_ext_reg_vcm_vdd));
3047 info->imx091_ext_reg_vcm_vdd = NULL;
3052 if (info->pdata->i2c_vdd && !info->imx091_ext_reg_i2c_vdd) {
3053 info->imx091_ext_reg_i2c_vdd = regulator_get(NULL,
3055 if (unlikely(WARN_ON(IS_ERR(info->imx091_ext_reg_i2c_vdd)))) {
3056 pr_err("%s: imx091_ext_reg_i2c_vdd get failed %ld\n",
3058 PTR_ERR(info->imx091_ext_reg_i2c_vdd));
3059 info->imx091_ext_reg_i2c_vdd = NULL;
3060 if (info->pdata->vcm_vdd)
3061 regulator_put(info->imx091_ext_reg_vcm_vdd);
3062 info->imx091_ext_reg_vcm_vdd = NULL;
3070 static int imx091_power_on(struct nvc_regulator *vreg)
3073 struct imx091_info *info = container_of(vreg, struct imx091_info,
3076 if (unlikely(WARN_ON(!info)))
3079 if (imx091_get_extra_regulators(info))
3080 goto imx091_poweron_fail;
3082 if (info->pdata->vcm_vdd) {
3083 err = regulator_enable(info->imx091_ext_reg_vcm_vdd);
3085 goto imx091_vcm_fail;
3088 if (info->pdata->i2c_vdd) {
3089 err = regulator_enable(info->imx091_ext_reg_i2c_vdd);
3091 goto imx091_i2c_fail;
3094 imx091_gpio_wr(info, IMX091_GPIO_PWDN, 0);
3095 usleep_range(10, 20);
3097 if (vreg[IMX091_VREG_AVDD].vreg) {
3098 err = regulator_enable(vreg[IMX091_VREG_AVDD].vreg);
3100 goto imx091_avdd_fail;
3103 if (vreg[IMX091_VREG_DVDD].vreg) {
3104 err = regulator_enable(vreg[IMX091_VREG_DVDD].vreg);
3106 goto imx091_dvdd_fail;
3109 if (vreg[IMX091_VREG_IOVDD].vreg) {
3110 err = regulator_enable(vreg[IMX091_VREG_IOVDD].vreg);
3112 goto imx091_iovdd_fail;
3116 imx091_gpio_wr(info, IMX091_GPIO_PWDN, 1);
3117 usleep_range(300, 310);
3122 if (vreg[IMX091_VREG_DVDD].vreg)
3123 regulator_disable(vreg[IMX091_VREG_DVDD].vreg);
3126 if (vreg[IMX091_VREG_AVDD].vreg)
3127 regulator_disable(vreg[IMX091_VREG_AVDD].vreg);
3130 imx091_gpio_wr(info, IMX091_GPIO_PWDN, 0);
3131 if (info->pdata->i2c_vdd)
3132 regulator_disable(info->imx091_ext_reg_i2c_vdd);
3134 if (info->pdata->vcm_vdd)
3135 regulator_disable(info->imx091_ext_reg_vcm_vdd);
3137 imx091_poweron_fail:
3138 pr_err("%s FAILED\n", __func__);
3143 static int imx091_power_off(struct nvc_regulator *vreg)
3145 struct imx091_info *info = container_of(vreg, struct imx091_info,
3148 if (unlikely(WARN_ON(!info)))
3152 imx091_gpio_wr(info, IMX091_GPIO_PWDN, 0);
3155 if (vreg[IMX091_VREG_IOVDD].vreg)
3156 regulator_disable(vreg[IMX091_VREG_IOVDD].vreg);
3157 if (vreg[IMX091_VREG_DVDD].vreg)
3158 regulator_disable(vreg[IMX091_VREG_DVDD].vreg);
3159 if (vreg[IMX091_VREG_AVDD].vreg)
3160 regulator_disable(vreg[IMX091_VREG_AVDD].vreg);
3162 if (info->pdata->i2c_vdd)
3163 regulator_disable(info->imx091_ext_reg_i2c_vdd);
3164 if (info->pdata->vcm_vdd)
3165 regulator_disable(info->imx091_ext_reg_vcm_vdd);
3170 static int imx091_parse_dt_gpio(struct device_node *np, const char *name,
3171 enum imx091_gpio type,
3172 struct nvc_gpio_pdata *pdata)
3174 enum of_gpio_flags gpio_flags;
3176 if (of_find_property(np, name, NULL)) {
3177 pdata->gpio = of_get_named_gpio_flags(np, name, 0, &gpio_flags);
3178 pdata->gpio_type = type;
3179 pdata->init_en = true;
3180 pdata->active_high = !(gpio_flags & OF_GPIO_ACTIVE_LOW);
3186 static struct imx091_platform_data *imx091_parse_dt(struct i2c_client *client)
3188 struct device_node *np = client->dev.of_node;
3189 struct imx091_platform_data *board_info_pdata;
3190 const struct of_device_id *match;
3191 struct nvc_gpio_pdata *gpio_pdata = NULL;
3192 struct nvc_imager_cap *imx091_cap = NULL;
3193 u32 temp_prop_read = 0;
3195 match = of_match_device(imx091_of_match, &client->dev);
3197 dev_err(&client->dev, "Failed to find matching dt id\n");
3201 board_info_pdata = devm_kzalloc(&client->dev, sizeof(*board_info_pdata),
3203 if (!board_info_pdata) {
3204 dev_err(&client->dev, "Failed to allocate pdata\n");
3205 return ERR_PTR(-ENOMEM);
3208 gpio_pdata = devm_kzalloc(&client->dev,
3209 sizeof(*gpio_pdata) * ARRAY_SIZE(imx091_gpios),
3212 dev_err(&client->dev, "cannot allocate gpio data memory\n");
3213 return ERR_PTR(-ENOMEM);
3216 imx091_cap = devm_kzalloc(&client->dev,
3217 sizeof(*imx091_cap),
3220 dev_err(&client->dev, "cannot allocate imx091_cap memory\n");
3221 return ERR_PTR(-ENOMEM);
3224 /* init with default platform data values */
3225 memcpy(board_info_pdata, &imx091_dflt_pdata, sizeof(*board_info_pdata));
3227 /* extra regulators info */
3228 board_info_pdata->vcm_vdd = of_property_read_bool(np, "nvidia,vcm_vdd");
3229 board_info_pdata->i2c_vdd = of_property_read_bool(np, "nvidia,i2c_vdd");
3231 /* MCLK clock info */
3232 of_property_read_string(np, "nvidia,mclk_name",
3233 &board_info_pdata->mclk_name);
3236 of_property_read_u32(np, "nvidia,num", &board_info_pdata->num);
3237 of_property_read_u32(np, "nvidia,cfg", &board_info_pdata->cfg);
3238 of_property_read_u32(np, "nvidia,sync", &board_info_pdata->sync);
3239 of_property_read_string(np, "nvidia,dev_name",
3240 &board_info_pdata->dev_name);
3243 board_info_pdata->gpio_count = 0;
3244 board_info_pdata->gpio_count += imx091_parse_dt_gpio(np,
3245 "reset-gpios", IMX091_GPIO_RESET,
3246 &gpio_pdata[board_info_pdata->gpio_count]);
3247 board_info_pdata->gpio_count += imx091_parse_dt_gpio(np,
3248 "power-gpios", IMX091_GPIO_PWDN,
3249 &gpio_pdata[board_info_pdata->gpio_count]);
3250 board_info_pdata->gpio_count += imx091_parse_dt_gpio(np,
3251 "gp1-gpios", IMX091_GPIO_GP1,
3252 &gpio_pdata[board_info_pdata->gpio_count]);
3253 board_info_pdata->gpio = gpio_pdata;
3256 nvc_imager_parse_caps(np, imx091_cap, NULL);
3257 imx091_cap->focuser_guid = NVC_FOCUS_GUID(0);
3258 imx091_cap->torch_guid = NVC_TORCH_GUID(0);
3259 imx091_cap->cap_version = NVC_IMAGER_CAPABILITIES_VERSION2;
3261 board_info_pdata->cap = imx091_cap;
3263 /* imx091 flash caps */
3264 board_info_pdata->flash_cap.xvs_trigger_enabled =
3265 of_property_read_bool(np, "nvidia,xvs_trigger_enabled");
3266 board_info_pdata->flash_cap.sdo_trigger_enabled =
3267 of_property_read_bool(np, "nvidia,sdo_trigger_enabled");
3268 board_info_pdata->flash_cap.adjustable_flash_timing =
3269 of_property_read_bool(np, "nvidia,adjustable_flash_timing");
3270 of_property_read_u32(np, "nvidia,pulse_width_uS",
3272 board_info_pdata->flash_cap.pulse_width_uS = (u16)temp_prop_read;
3274 /* imx091 power functions */
3275 board_info_pdata->power_on = imx091_power_on;
3276 board_info_pdata->power_off = imx091_power_off;
3278 return board_info_pdata;
3281 static int imx091_probe(
3282 struct i2c_client *client,
3283 const struct i2c_device_id *id)
3285 struct imx091_info *info;
3286 unsigned long clock_probe_rate;
3288 const char *mclk_name;
3290 if (tegra_platform_is_fpga()) {
3291 imx091_dflt_cap.discontinuous_clk_mode = 0;
3292 imx091_dflt_cap.cil_threshold_settle = 0xd;
3293 imx091_dflt_cap.focuser_guid = 0;
3294 imx091_dflt_cap.torch_guid = 0;
3297 dev_dbg(&client->dev, "%s +++++\n", __func__);
3298 info = devm_kzalloc(&client->dev, sizeof(*info), GFP_KERNEL);
3300 dev_err(&client->dev, "%s: kzalloc error\n", __func__);
3304 info->i2c_client = client;
3306 if (client->dev.of_node) {
3307 info->pdata = imx091_parse_dt(client);
3308 } else if (client->dev.platform_data) {
3309 info->pdata = client->dev.platform_data;
3311 info->pdata = &imx091_dflt_pdata;
3312 dev_dbg(&client->dev,
3313 "%s No platform data. Using defaults.\n", __func__);
3317 dev_err(&client->dev, "%s: Platform data error.\n", __func__);
3321 mclk_name = info->pdata->mclk_name ?
3322 info->pdata->mclk_name : "default_mclk";
3323 info->mclk = devm_clk_get(&client->dev, mclk_name);
3324 if (IS_ERR(info->mclk)) {
3325 dev_err(&client->dev, "%s: unable to get clock %s\n",
3326 __func__, mclk_name);
3327 return PTR_ERR(info->mclk);
3330 i2c_set_clientdata(client, info);
3331 INIT_LIST_HEAD(&info->list);
3332 spin_lock(&imx091_spinlock);
3333 list_add_rcu(&info->list, &imx091_info_list);
3334 spin_unlock(&imx091_spinlock);
3335 imx091_pm_init(info);
3336 imx091_sdata_init(info);
3337 imx091_get_flash_cap(info);
3338 info->pwr_api = NVC_PWR_OFF;
3339 if (info->pdata->cfg & (NVC_CFG_NODEV | NVC_CFG_BOOT_INIT)) {
3340 if (info->pdata->probe_clock) {
3341 if (info->cap->initial_clock_rate_khz)
3342 clock_probe_rate = info->cap->
3343 initial_clock_rate_khz;
3345 clock_probe_rate = imx091_dflt_cap.
3346 initial_clock_rate_khz;
3347 clock_probe_rate *= 1000;
3348 info->pdata->probe_clock(clock_probe_rate);
3350 err = imx091_dev_id(info);
3352 if (info->pdata->cfg & NVC_CFG_NODEV) {
3354 if (info->pdata->probe_clock)
3355 info->pdata->probe_clock(0);
3358 dev_err(&client->dev, "%s device not found\n",
3362 dev_dbg(&client->dev, "%s device found\n", __func__);
3363 if (info->pdata->cfg & NVC_CFG_BOOT_INIT)
3364 imx091_mode_wr_full(info, info->cap->
3365 preferred_mode_index);
3366 info->dev_id = info->sdata.sensor_id_minor;
3368 imx091_pm_dev_wr(info, NVC_PWR_OFF);
3369 if (info->pdata->probe_clock)
3370 info->pdata->probe_clock(0);
3373 if (info->pdata->dev_name != NULL)
3374 strncpy(info->devname, info->pdata->dev_name,
3375 sizeof(info->devname) - 1);
3377 strncpy(info->devname, "imx091", sizeof(info->devname) - 1);
3379 if (info->pdata->num)
3380 snprintf(info->devname, sizeof(info->devname), "%s.%u",
3381 info->devname, info->pdata->num);
3382 info->miscdev.name = info->devname;
3383 info->miscdev.fops = &imx091_fileops;
3384 info->miscdev.minor = MISC_DYNAMIC_MINOR;
3385 if (misc_register(&info->miscdev)) {
3386 dev_err(&client->dev, "%s unable to register misc device %s\n",
3387 __func__, info->devname);
3392 #ifdef CONFIG_DEBUG_FS
3393 info->debugfs_info.name = info->devname;
3394 info->debugfs_info.i2c_client = info->i2c_client;
3395 info->debugfs_info.i2c_addr_limit = 0xFFFF;
3396 info->debugfs_info.i2c_rd8 = imx091_i2c_rd8;
3397 info->debugfs_info.i2c_wr8 = imx091_i2c_wr8;
3398 nvc_debugfs_init(&info->debugfs_info);
3400 dev_dbg(&client->dev, "%s -----\n", __func__);
3404 static const struct i2c_device_id imx091_id[] = {
3409 MODULE_DEVICE_TABLE(i2c, imx091_id);
3411 static struct i2c_driver imx091_i2c_driver = {
3414 .owner = THIS_MODULE,
3416 .id_table = imx091_id,
3417 .probe = imx091_probe,
3418 .remove = imx091_remove,
3421 module_i2c_driver(imx091_i2c_driver);
3422 MODULE_LICENSE("GPL v2");