IB/ipath: Update copyright dates
[linux-3.10.git] / drivers / infiniband / hw / ipath / ipath_init_chip.c
1 /*
2  * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
4  *
5  * This software is available to you under a choice of one of two
6  * licenses.  You may choose to be licensed under the terms of the GNU
7  * General Public License (GPL) Version 2, available from the file
8  * COPYING in the main directory of this source tree, or the
9  * OpenIB.org BSD license below:
10  *
11  *     Redistribution and use in source and binary forms, with or
12  *     without modification, are permitted provided that the following
13  *     conditions are met:
14  *
15  *      - Redistributions of source code must retain the above
16  *        copyright notice, this list of conditions and the following
17  *        disclaimer.
18  *
19  *      - Redistributions in binary form must reproduce the above
20  *        copyright notice, this list of conditions and the following
21  *        disclaimer in the documentation and/or other materials
22  *        provided with the distribution.
23  *
24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31  * SOFTWARE.
32  */
33
34 #include <linux/pci.h>
35 #include <linux/netdevice.h>
36 #include <linux/vmalloc.h>
37
38 #include "ipath_kernel.h"
39 #include "ipath_common.h"
40
41 /*
42  * min buffers we want to have per port, after driver
43  */
44 #define IPATH_MIN_USER_PORT_BUFCNT 8
45
46 /*
47  * Number of ports we are configured to use (to allow for more pio
48  * buffers per port, etc.)  Zero means use chip value.
49  */
50 static ushort ipath_cfgports;
51
52 module_param_named(cfgports, ipath_cfgports, ushort, S_IRUGO);
53 MODULE_PARM_DESC(cfgports, "Set max number of ports to use");
54
55 /*
56  * Number of buffers reserved for driver (verbs and layered drivers.)
57  * Reserved at end of buffer list.   Initialized based on
58  * number of PIO buffers if not set via module interface.
59  * The problem with this is that it's global, but we'll use different
60  * numbers for different chip types.  So the default value is not
61  * very useful.  I've redefined it for the 1.3 release so that it's
62  * zero unless set by the user to something else, in which case we
63  * try to respect it.
64  */
65 static ushort ipath_kpiobufs;
66
67 static int ipath_set_kpiobufs(const char *val, struct kernel_param *kp);
68
69 module_param_call(kpiobufs, ipath_set_kpiobufs, param_get_ushort,
70                   &ipath_kpiobufs, S_IWUSR | S_IRUGO);
71 MODULE_PARM_DESC(kpiobufs, "Set number of PIO buffers for driver");
72
73 /**
74  * create_port0_egr - allocate the eager TID buffers
75  * @dd: the infinipath device
76  *
77  * This code is now quite different for user and kernel, because
78  * the kernel uses skb's, for the accelerated network performance.
79  * This is the kernel (port0) version.
80  *
81  * Allocate the eager TID buffers and program them into infinipath.
82  * We use the network layer alloc_skb() allocator to allocate the
83  * memory, and either use the buffers as is for things like verbs
84  * packets, or pass the buffers up to the ipath layered driver and
85  * thence the network layer, replacing them as we do so (see
86  * ipath_rcv_layer()).
87  */
88 static int create_port0_egr(struct ipath_devdata *dd)
89 {
90         unsigned e, egrcnt;
91         struct ipath_skbinfo *skbinfo;
92         int ret;
93
94         egrcnt = dd->ipath_rcvegrcnt;
95
96         skbinfo = vmalloc(sizeof(*dd->ipath_port0_skbinfo) * egrcnt);
97         if (skbinfo == NULL) {
98                 ipath_dev_err(dd, "allocation error for eager TID "
99                               "skb array\n");
100                 ret = -ENOMEM;
101                 goto bail;
102         }
103         for (e = 0; e < egrcnt; e++) {
104                 /*
105                  * This is a bit tricky in that we allocate extra
106                  * space for 2 bytes of the 14 byte ethernet header.
107                  * These two bytes are passed in the ipath header so
108                  * the rest of the data is word aligned.  We allocate
109                  * 4 bytes so that the data buffer stays word aligned.
110                  * See ipath_kreceive() for more details.
111                  */
112                 skbinfo[e].skb = ipath_alloc_skb(dd, GFP_KERNEL);
113                 if (!skbinfo[e].skb) {
114                         ipath_dev_err(dd, "SKB allocation error for "
115                                       "eager TID %u\n", e);
116                         while (e != 0)
117                                 dev_kfree_skb(skbinfo[--e].skb);
118                         vfree(skbinfo);
119                         ret = -ENOMEM;
120                         goto bail;
121                 }
122         }
123         /*
124          * After loop above, so we can test non-NULL to see if ready
125          * to use at receive, etc.
126          */
127         dd->ipath_port0_skbinfo = skbinfo;
128
129         for (e = 0; e < egrcnt; e++) {
130                 dd->ipath_port0_skbinfo[e].phys =
131                   ipath_map_single(dd->pcidev,
132                                    dd->ipath_port0_skbinfo[e].skb->data,
133                                    dd->ipath_ibmaxlen, PCI_DMA_FROMDEVICE);
134                 dd->ipath_f_put_tid(dd, e + (u64 __iomem *)
135                                     ((char __iomem *) dd->ipath_kregbase +
136                                      dd->ipath_rcvegrbase),
137                                     RCVHQ_RCV_TYPE_EAGER,
138                                     dd->ipath_port0_skbinfo[e].phys);
139         }
140
141         ret = 0;
142
143 bail:
144         return ret;
145 }
146
147 static int bringup_link(struct ipath_devdata *dd)
148 {
149         u64 val, ibc;
150         int ret = 0;
151
152         /* hold IBC in reset */
153         dd->ipath_control &= ~INFINIPATH_C_LINKENABLE;
154         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
155                          dd->ipath_control);
156
157         /*
158          * Note that prior to try 14 or 15 of IB, the credit scaling
159          * wasn't working, because it was swapped for writes with the
160          * 1 bit default linkstate field
161          */
162
163         /* ignore pbc and align word */
164         val = dd->ipath_piosize2k - 2 * sizeof(u32);
165         /*
166          * for ICRC, which we only send in diag test pkt mode, and we
167          * don't need to worry about that for mtu
168          */
169         val += 1;
170         /*
171          * Set the IBC maxpktlength to the size of our pio buffers the
172          * maxpktlength is in words.  This is *not* the IB data MTU.
173          */
174         ibc = (val / sizeof(u32)) << INFINIPATH_IBCC_MAXPKTLEN_SHIFT;
175         /* in KB */
176         ibc |= 0x5ULL << INFINIPATH_IBCC_FLOWCTRLWATERMARK_SHIFT;
177         /*
178          * How often flowctrl sent.  More or less in usecs; balance against
179          * watermark value, so that in theory senders always get a flow
180          * control update in time to not let the IB link go idle.
181          */
182         ibc |= 0x3ULL << INFINIPATH_IBCC_FLOWCTRLPERIOD_SHIFT;
183         /* max error tolerance */
184         ibc |= 0xfULL << INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT;
185         /* use "real" buffer space for */
186         ibc |= 4ULL << INFINIPATH_IBCC_CREDITSCALE_SHIFT;
187         /* IB credit flow control. */
188         ibc |= 0xfULL << INFINIPATH_IBCC_OVERRUNTHRESHOLD_SHIFT;
189         /* initially come up waiting for TS1, without sending anything. */
190         dd->ipath_ibcctrl = ibc;
191         /*
192          * Want to start out with both LINKCMD and LINKINITCMD in NOP
193          * (0 and 0).  Don't put linkinitcmd in ipath_ibcctrl, want that
194          * to stay a NOP
195          */
196         ibc |= INFINIPATH_IBCC_LINKINITCMD_DISABLE <<
197                 INFINIPATH_IBCC_LINKINITCMD_SHIFT;
198         ipath_cdbg(VERBOSE, "Writing 0x%llx to ibcctrl\n",
199                    (unsigned long long) ibc);
200         ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl, ibc);
201
202         // be sure chip saw it
203         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
204
205         ret = dd->ipath_f_bringup_serdes(dd);
206
207         if (ret)
208                 dev_info(&dd->pcidev->dev, "Could not initialize SerDes, "
209                          "not usable\n");
210         else {
211                 /* enable IBC */
212                 dd->ipath_control |= INFINIPATH_C_LINKENABLE;
213                 ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
214                                  dd->ipath_control);
215         }
216
217         return ret;
218 }
219
220 static struct ipath_portdata *create_portdata0(struct ipath_devdata *dd)
221 {
222         struct ipath_portdata *pd = NULL;
223
224         pd = kzalloc(sizeof(*pd), GFP_KERNEL);
225         if (pd) {
226                 pd->port_dd = dd;
227                 pd->port_cnt = 1;
228                 /* The port 0 pkey table is used by the layer interface. */
229                 pd->port_pkeys[0] = IPATH_DEFAULT_P_KEY;
230         }
231         return pd;
232 }
233
234 static int init_chip_first(struct ipath_devdata *dd,
235                            struct ipath_portdata **pdp)
236 {
237         struct ipath_portdata *pd = NULL;
238         int ret = 0;
239         u64 val;
240
241         /*
242          * skip cfgports stuff because we are not allocating memory,
243          * and we don't want problems if the portcnt changed due to
244          * cfgports.  We do still check and report a difference, if
245          * not same (should be impossible).
246          */
247         dd->ipath_portcnt =
248                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_portcnt);
249         if (!ipath_cfgports)
250                 dd->ipath_cfgports = dd->ipath_portcnt;
251         else if (ipath_cfgports <= dd->ipath_portcnt) {
252                 dd->ipath_cfgports = ipath_cfgports;
253                 ipath_dbg("Configured to use %u ports out of %u in chip\n",
254                           dd->ipath_cfgports, dd->ipath_portcnt);
255         } else {
256                 dd->ipath_cfgports = dd->ipath_portcnt;
257                 ipath_dbg("Tried to configured to use %u ports; chip "
258                           "only supports %u\n", ipath_cfgports,
259                           dd->ipath_portcnt);
260         }
261         /*
262          * Allocate full portcnt array, rather than just cfgports, because
263          * cleanup iterates across all possible ports.
264          */
265         dd->ipath_pd = kzalloc(sizeof(*dd->ipath_pd) * dd->ipath_portcnt,
266                                GFP_KERNEL);
267
268         if (!dd->ipath_pd) {
269                 ipath_dev_err(dd, "Unable to allocate portdata array, "
270                               "failing\n");
271                 ret = -ENOMEM;
272                 goto done;
273         }
274
275         dd->ipath_lastegrheads = kzalloc(sizeof(*dd->ipath_lastegrheads)
276                                          * dd->ipath_cfgports,
277                                          GFP_KERNEL);
278         dd->ipath_lastrcvhdrqtails =
279                 kzalloc(sizeof(*dd->ipath_lastrcvhdrqtails)
280                         * dd->ipath_cfgports, GFP_KERNEL);
281
282         if (!dd->ipath_lastegrheads || !dd->ipath_lastrcvhdrqtails) {
283                 ipath_dev_err(dd, "Unable to allocate head arrays, "
284                               "failing\n");
285                 ret = -ENOMEM;
286                 goto done;
287         }
288
289         pd = create_portdata0(dd);
290
291         if (!pd) {
292                 ipath_dev_err(dd, "Unable to allocate portdata for port "
293                               "0, failing\n");
294                 ret = -ENOMEM;
295                 goto done;
296         }
297         dd->ipath_pd[0] = pd;
298
299         dd->ipath_rcvtidcnt =
300                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidcnt);
301         dd->ipath_rcvtidbase =
302                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidbase);
303         dd->ipath_rcvegrcnt =
304                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrcnt);
305         dd->ipath_rcvegrbase =
306                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrbase);
307         dd->ipath_palign =
308                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_pagealign);
309         dd->ipath_piobufbase =
310                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiobufbase);
311         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiosize);
312         dd->ipath_piosize2k = val & ~0U;
313         dd->ipath_piosize4k = val >> 32;
314         /*
315          * Note: the chips support a maximum MTU of 4096, but the driver
316          * hasn't implemented this feature yet, so set the initial value
317          * to 2048.
318          */
319         dd->ipath_ibmtu = 2048;
320         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiobufcnt);
321         dd->ipath_piobcnt2k = val & ~0U;
322         dd->ipath_piobcnt4k = val >> 32;
323         dd->ipath_pio2kbase =
324                 (u32 __iomem *) (((char __iomem *) dd->ipath_kregbase) +
325                                  (dd->ipath_piobufbase & 0xffffffff));
326         if (dd->ipath_piobcnt4k) {
327                 dd->ipath_pio4kbase = (u32 __iomem *)
328                         (((char __iomem *) dd->ipath_kregbase) +
329                          (dd->ipath_piobufbase >> 32));
330                 /*
331                  * 4K buffers take 2 pages; we use roundup just to be
332                  * paranoid; we calculate it once here, rather than on
333                  * ever buf allocate
334                  */
335                 dd->ipath_4kalign = ALIGN(dd->ipath_piosize4k,
336                                           dd->ipath_palign);
337                 ipath_dbg("%u 2k(%x) piobufs @ %p, %u 4k(%x) @ %p "
338                           "(%x aligned)\n",
339                           dd->ipath_piobcnt2k, dd->ipath_piosize2k,
340                           dd->ipath_pio2kbase, dd->ipath_piobcnt4k,
341                           dd->ipath_piosize4k, dd->ipath_pio4kbase,
342                           dd->ipath_4kalign);
343         }
344         else ipath_dbg("%u 2k piobufs @ %p\n",
345                        dd->ipath_piobcnt2k, dd->ipath_pio2kbase);
346
347         spin_lock_init(&dd->ipath_tid_lock);
348
349         spin_lock_init(&dd->ipath_gpio_lock);
350         spin_lock_init(&dd->ipath_eep_st_lock);
351         sema_init(&dd->ipath_eep_sem, 1);
352
353 done:
354         *pdp = pd;
355         return ret;
356 }
357
358 /**
359  * init_chip_reset - re-initialize after a reset, or enable
360  * @dd: the infinipath device
361  * @pdp: output for port data
362  *
363  * sanity check at least some of the values after reset, and
364  * ensure no receive or transmit (explictly, in case reset
365  * failed
366  */
367 static int init_chip_reset(struct ipath_devdata *dd,
368                            struct ipath_portdata **pdp)
369 {
370         u32 rtmp;
371
372         *pdp = dd->ipath_pd[0];
373         /* ensure chip does no sends or receives while we re-initialize */
374         dd->ipath_control = dd->ipath_sendctrl = dd->ipath_rcvctrl = 0U;
375         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl, 0);
376         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, 0);
377         ipath_write_kreg(dd, dd->ipath_kregs->kr_control, 0);
378
379         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_portcnt);
380         if (dd->ipath_portcnt != rtmp)
381                 dev_info(&dd->pcidev->dev, "portcnt was %u before "
382                          "reset, now %u, using original\n",
383                          dd->ipath_portcnt, rtmp);
384         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidcnt);
385         if (rtmp != dd->ipath_rcvtidcnt)
386                 dev_info(&dd->pcidev->dev, "tidcnt was %u before "
387                          "reset, now %u, using original\n",
388                          dd->ipath_rcvtidcnt, rtmp);
389         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidbase);
390         if (rtmp != dd->ipath_rcvtidbase)
391                 dev_info(&dd->pcidev->dev, "tidbase was %u before "
392                          "reset, now %u, using original\n",
393                          dd->ipath_rcvtidbase, rtmp);
394         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrcnt);
395         if (rtmp != dd->ipath_rcvegrcnt)
396                 dev_info(&dd->pcidev->dev, "egrcnt was %u before "
397                          "reset, now %u, using original\n",
398                          dd->ipath_rcvegrcnt, rtmp);
399         rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrbase);
400         if (rtmp != dd->ipath_rcvegrbase)
401                 dev_info(&dd->pcidev->dev, "egrbase was %u before "
402                          "reset, now %u, using original\n",
403                          dd->ipath_rcvegrbase, rtmp);
404
405         return 0;
406 }
407
408 static int init_pioavailregs(struct ipath_devdata *dd)
409 {
410         int ret;
411
412         dd->ipath_pioavailregs_dma = dma_alloc_coherent(
413                 &dd->pcidev->dev, PAGE_SIZE, &dd->ipath_pioavailregs_phys,
414                 GFP_KERNEL);
415         if (!dd->ipath_pioavailregs_dma) {
416                 ipath_dev_err(dd, "failed to allocate PIOavail reg area "
417                               "in memory\n");
418                 ret = -ENOMEM;
419                 goto done;
420         }
421
422         /*
423          * we really want L2 cache aligned, but for current CPUs of
424          * interest, they are the same.
425          */
426         dd->ipath_statusp = (u64 *)
427                 ((char *)dd->ipath_pioavailregs_dma +
428                  ((2 * L1_CACHE_BYTES +
429                    dd->ipath_pioavregs * sizeof(u64)) & ~L1_CACHE_BYTES));
430         /* copy the current value now that it's really allocated */
431         *dd->ipath_statusp = dd->_ipath_status;
432         /*
433          * setup buffer to hold freeze msg, accessible to apps,
434          * following statusp
435          */
436         dd->ipath_freezemsg = (char *)&dd->ipath_statusp[1];
437         /* and its length */
438         dd->ipath_freezelen = L1_CACHE_BYTES - sizeof(dd->ipath_statusp[0]);
439
440         ret = 0;
441
442 done:
443         return ret;
444 }
445
446 /**
447  * init_shadow_tids - allocate the shadow TID array
448  * @dd: the infinipath device
449  *
450  * allocate the shadow TID array, so we can ipath_munlock previous
451  * entries.  It may make more sense to move the pageshadow to the
452  * port data structure, so we only allocate memory for ports actually
453  * in use, since we at 8k per port, now.
454  */
455 static void init_shadow_tids(struct ipath_devdata *dd)
456 {
457         struct page **pages;
458         dma_addr_t *addrs;
459
460         pages = vmalloc(dd->ipath_cfgports * dd->ipath_rcvtidcnt *
461                         sizeof(struct page *));
462         if (!pages) {
463                 ipath_dev_err(dd, "failed to allocate shadow page * "
464                               "array, no expected sends!\n");
465                 dd->ipath_pageshadow = NULL;
466                 return;
467         }
468
469         addrs = vmalloc(dd->ipath_cfgports * dd->ipath_rcvtidcnt *
470                         sizeof(dma_addr_t));
471         if (!addrs) {
472                 ipath_dev_err(dd, "failed to allocate shadow dma handle "
473                               "array, no expected sends!\n");
474                 vfree(dd->ipath_pageshadow);
475                 dd->ipath_pageshadow = NULL;
476                 return;
477         }
478
479         memset(pages, 0, dd->ipath_cfgports * dd->ipath_rcvtidcnt *
480                sizeof(struct page *));
481
482         dd->ipath_pageshadow = pages;
483         dd->ipath_physshadow = addrs;
484 }
485
486 static void enable_chip(struct ipath_devdata *dd,
487                         struct ipath_portdata *pd, int reinit)
488 {
489         u32 val;
490         int i;
491
492         if (!reinit)
493                 init_waitqueue_head(&ipath_state_wait);
494
495         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
496                          dd->ipath_rcvctrl);
497
498         /* Enable PIO send, and update of PIOavail regs to memory. */
499         dd->ipath_sendctrl = INFINIPATH_S_PIOENABLE |
500                 INFINIPATH_S_PIOBUFAVAILUPD;
501         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
502                          dd->ipath_sendctrl);
503
504         /*
505          * enable port 0 receive, and receive interrupt.  other ports
506          * done as user opens and inits them.
507          */
508         dd->ipath_rcvctrl = INFINIPATH_R_TAILUPD |
509                 (1ULL << INFINIPATH_R_PORTENABLE_SHIFT) |
510                 (1ULL << INFINIPATH_R_INTRAVAIL_SHIFT);
511         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
512                          dd->ipath_rcvctrl);
513
514         /*
515          * now ready for use.  this should be cleared whenever we
516          * detect a reset, or initiate one.
517          */
518         dd->ipath_flags |= IPATH_INITTED;
519
520         /*
521          * init our shadow copies of head from tail values, and write
522          * head values to match.
523          */
524         val = ipath_read_ureg32(dd, ur_rcvegrindextail, 0);
525         (void)ipath_write_ureg(dd, ur_rcvegrindexhead, val, 0);
526         dd->ipath_port0head = ipath_read_ureg32(dd, ur_rcvhdrtail, 0);
527
528         /* Initialize so we interrupt on next packet received */
529         (void)ipath_write_ureg(dd, ur_rcvhdrhead,
530                                dd->ipath_rhdrhead_intr_off |
531                                dd->ipath_port0head, 0);
532
533         /*
534          * by now pioavail updates to memory should have occurred, so
535          * copy them into our working/shadow registers; this is in
536          * case something went wrong with abort, but mostly to get the
537          * initial values of the generation bit correct.
538          */
539         for (i = 0; i < dd->ipath_pioavregs; i++) {
540                 __le64 val;
541
542                 /*
543                  * Chip Errata bug 6641; even and odd qwords>3 are swapped.
544                  */
545                 if (i > 3) {
546                         if (i & 1)
547                                 val = dd->ipath_pioavailregs_dma[i - 1];
548                         else
549                                 val = dd->ipath_pioavailregs_dma[i + 1];
550                 }
551                 else
552                         val = dd->ipath_pioavailregs_dma[i];
553                 dd->ipath_pioavailshadow[i] = le64_to_cpu(val);
554         }
555         /* can get counters, stats, etc. */
556         dd->ipath_flags |= IPATH_PRESENT;
557 }
558
559 static int init_housekeeping(struct ipath_devdata *dd,
560                              struct ipath_portdata **pdp, int reinit)
561 {
562         char boardn[32];
563         int ret = 0;
564
565         /*
566          * have to clear shadow copies of registers at init that are
567          * not otherwise set here, or all kinds of bizarre things
568          * happen with driver on chip reset
569          */
570         dd->ipath_rcvhdrsize = 0;
571
572         /*
573          * Don't clear ipath_flags as 8bit mode was set before
574          * entering this func. However, we do set the linkstate to
575          * unknown, so we can watch for a transition.
576          * PRESENT is set because we want register reads to work,
577          * and the kernel infrastructure saw it in config space;
578          * We clear it if we have failures.
579          */
580         dd->ipath_flags |= IPATH_LINKUNK | IPATH_PRESENT;
581         dd->ipath_flags &= ~(IPATH_LINKACTIVE | IPATH_LINKARMED |
582                              IPATH_LINKDOWN | IPATH_LINKINIT);
583
584         ipath_cdbg(VERBOSE, "Try to read spc chip revision\n");
585         dd->ipath_revision =
586                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_revision);
587
588         /*
589          * set up fundamental info we need to use the chip; we assume
590          * if the revision reg and these regs are OK, we don't need to
591          * special case the rest
592          */
593         dd->ipath_sregbase =
594                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_sendregbase);
595         dd->ipath_cregbase =
596                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_counterregbase);
597         dd->ipath_uregbase =
598                 ipath_read_kreg32(dd, dd->ipath_kregs->kr_userregbase);
599         ipath_cdbg(VERBOSE, "ipath_kregbase %p, sendbase %x usrbase %x, "
600                    "cntrbase %x\n", dd->ipath_kregbase, dd->ipath_sregbase,
601                    dd->ipath_uregbase, dd->ipath_cregbase);
602         if ((dd->ipath_revision & 0xffffffff) == 0xffffffff
603             || (dd->ipath_sregbase & 0xffffffff) == 0xffffffff
604             || (dd->ipath_cregbase & 0xffffffff) == 0xffffffff
605             || (dd->ipath_uregbase & 0xffffffff) == 0xffffffff) {
606                 ipath_dev_err(dd, "Register read failures from chip, "
607                               "giving up initialization\n");
608                 dd->ipath_flags &= ~IPATH_PRESENT;
609                 ret = -ENODEV;
610                 goto done;
611         }
612
613
614         /* clear diagctrl register, in case diags were running and crashed */
615         ipath_write_kreg (dd, dd->ipath_kregs->kr_hwdiagctrl, 0);
616
617         /* clear the initial reset flag, in case first driver load */
618         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear,
619                          INFINIPATH_E_RESET);
620
621         if (reinit)
622                 ret = init_chip_reset(dd, pdp);
623         else
624                 ret = init_chip_first(dd, pdp);
625
626         if (ret)
627                 goto done;
628
629         ipath_cdbg(VERBOSE, "Revision %llx (PCI %x), %u ports, %u tids, "
630                    "%u egrtids\n", (unsigned long long) dd->ipath_revision,
631                    dd->ipath_pcirev, dd->ipath_portcnt, dd->ipath_rcvtidcnt,
632                    dd->ipath_rcvegrcnt);
633
634         if (((dd->ipath_revision >> INFINIPATH_R_SOFTWARE_SHIFT) &
635              INFINIPATH_R_SOFTWARE_MASK) != IPATH_CHIP_SWVERSION) {
636                 ipath_dev_err(dd, "Driver only handles version %d, "
637                               "chip swversion is %d (%llx), failng\n",
638                               IPATH_CHIP_SWVERSION,
639                               (int)(dd->ipath_revision >>
640                                     INFINIPATH_R_SOFTWARE_SHIFT) &
641                               INFINIPATH_R_SOFTWARE_MASK,
642                               (unsigned long long) dd->ipath_revision);
643                 ret = -ENOSYS;
644                 goto done;
645         }
646         dd->ipath_majrev = (u8) ((dd->ipath_revision >>
647                                   INFINIPATH_R_CHIPREVMAJOR_SHIFT) &
648                                  INFINIPATH_R_CHIPREVMAJOR_MASK);
649         dd->ipath_minrev = (u8) ((dd->ipath_revision >>
650                                   INFINIPATH_R_CHIPREVMINOR_SHIFT) &
651                                  INFINIPATH_R_CHIPREVMINOR_MASK);
652         dd->ipath_boardrev = (u8) ((dd->ipath_revision >>
653                                     INFINIPATH_R_BOARDID_SHIFT) &
654                                    INFINIPATH_R_BOARDID_MASK);
655
656         ret = dd->ipath_f_get_boardname(dd, boardn, sizeof boardn);
657
658         snprintf(dd->ipath_boardversion, sizeof(dd->ipath_boardversion),
659                  "Driver %u.%u, %s, InfiniPath%u %u.%u, PCI %u, "
660                  "SW Compat %u\n",
661                  IPATH_CHIP_VERS_MAJ, IPATH_CHIP_VERS_MIN, boardn,
662                  (unsigned)(dd->ipath_revision >> INFINIPATH_R_ARCH_SHIFT) &
663                  INFINIPATH_R_ARCH_MASK,
664                  dd->ipath_majrev, dd->ipath_minrev, dd->ipath_pcirev,
665                  (unsigned)(dd->ipath_revision >>
666                             INFINIPATH_R_SOFTWARE_SHIFT) &
667                  INFINIPATH_R_SOFTWARE_MASK);
668
669         ipath_dbg("%s", dd->ipath_boardversion);
670
671 done:
672         return ret;
673 }
674
675
676 /**
677  * ipath_init_chip - do the actual initialization sequence on the chip
678  * @dd: the infinipath device
679  * @reinit: reinitializing, so don't allocate new memory
680  *
681  * Do the actual initialization sequence on the chip.  This is done
682  * both from the init routine called from the PCI infrastructure, and
683  * when we reset the chip, or detect that it was reset internally,
684  * or it's administratively re-enabled.
685  *
686  * Memory allocation here and in called routines is only done in
687  * the first case (reinit == 0).  We have to be careful, because even
688  * without memory allocation, we need to re-write all the chip registers
689  * TIDs, etc. after the reset or enable has completed.
690  */
691 int ipath_init_chip(struct ipath_devdata *dd, int reinit)
692 {
693         int ret = 0, i;
694         u32 val32, kpiobufs;
695         u32 piobufs, uports;
696         u64 val;
697         struct ipath_portdata *pd = NULL; /* keep gcc4 happy */
698         gfp_t gfp_flags = GFP_USER | __GFP_COMP;
699
700         ret = init_housekeeping(dd, &pd, reinit);
701         if (ret)
702                 goto done;
703
704         /*
705          * we ignore most issues after reporting them, but have to specially
706          * handle hardware-disabled chips.
707          */
708         if (ret == 2) {
709                 /* unique error, known to ipath_init_one */
710                 ret = -EPERM;
711                 goto done;
712         }
713
714         /*
715          * We could bump this to allow for full rcvegrcnt + rcvtidcnt,
716          * but then it no longer nicely fits power of two, and since
717          * we now use routines that backend onto __get_free_pages, the
718          * rest would be wasted.
719          */
720         dd->ipath_rcvhdrcnt = dd->ipath_rcvegrcnt;
721         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrcnt,
722                          dd->ipath_rcvhdrcnt);
723
724         /*
725          * Set up the shadow copies of the piobufavail registers,
726          * which we compare against the chip registers for now, and
727          * the in memory DMA'ed copies of the registers.  This has to
728          * be done early, before we calculate lastport, etc.
729          */
730         piobufs = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k;
731         /*
732          * calc number of pioavail registers, and save it; we have 2
733          * bits per buffer.
734          */
735         dd->ipath_pioavregs = ALIGN(piobufs, sizeof(u64) * BITS_PER_BYTE / 2)
736                 / (sizeof(u64) * BITS_PER_BYTE / 2);
737         uports = dd->ipath_cfgports ? dd->ipath_cfgports - 1 : 0;
738         if (ipath_kpiobufs == 0) {
739                 /* not set by user (this is default) */
740                 if (piobufs >= (uports * IPATH_MIN_USER_PORT_BUFCNT) + 32)
741                         kpiobufs = 32;
742                 else
743                         kpiobufs = 16;
744         }
745         else
746                 kpiobufs = ipath_kpiobufs;
747
748         if (kpiobufs + (uports * IPATH_MIN_USER_PORT_BUFCNT) > piobufs) {
749                 i = (int) piobufs -
750                         (int) (uports * IPATH_MIN_USER_PORT_BUFCNT);
751                 if (i < 0)
752                         i = 0;
753                 dev_info(&dd->pcidev->dev, "Allocating %d PIO bufs of "
754                          "%d for kernel leaves too few for %d user ports "
755                          "(%d each); using %u\n", kpiobufs,
756                          piobufs, uports, IPATH_MIN_USER_PORT_BUFCNT, i);
757                 /*
758                  * shouldn't change ipath_kpiobufs, because could be
759                  * different for different devices...
760                  */
761                 kpiobufs = i;
762         }
763         dd->ipath_lastport_piobuf = piobufs - kpiobufs;
764         dd->ipath_pbufsport =
765                 uports ? dd->ipath_lastport_piobuf / uports : 0;
766         val32 = dd->ipath_lastport_piobuf - (dd->ipath_pbufsport * uports);
767         if (val32 > 0) {
768                 ipath_dbg("allocating %u pbufs/port leaves %u unused, "
769                           "add to kernel\n", dd->ipath_pbufsport, val32);
770                 dd->ipath_lastport_piobuf -= val32;
771                 ipath_dbg("%u pbufs/port leaves %u unused, add to kernel\n",
772                           dd->ipath_pbufsport, val32);
773         }
774         dd->ipath_lastpioindex = dd->ipath_lastport_piobuf;
775         ipath_cdbg(VERBOSE, "%d PIO bufs for kernel out of %d total %u "
776                    "each for %u user ports\n", kpiobufs,
777                    piobufs, dd->ipath_pbufsport, uports);
778
779         dd->ipath_f_early_init(dd);
780         /*
781          * cancel any possible active sends from early driver load.
782          * Follows early_init because some chips have to initialize
783          * PIO buffers in early_init to avoid false parity errors.
784          */
785         ipath_cancel_sends(dd);
786
787         /* early_init sets rcvhdrentsize and rcvhdrsize, so this must be
788          * done after early_init */
789         dd->ipath_hdrqlast =
790                 dd->ipath_rcvhdrentsize * (dd->ipath_rcvhdrcnt - 1);
791         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrentsize,
792                          dd->ipath_rcvhdrentsize);
793         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrsize,
794                          dd->ipath_rcvhdrsize);
795
796         if (!reinit) {
797                 ret = init_pioavailregs(dd);
798                 init_shadow_tids(dd);
799                 if (ret)
800                         goto done;
801         }
802
803         (void)ipath_write_kreg(dd, dd->ipath_kregs->kr_sendpioavailaddr,
804                                dd->ipath_pioavailregs_phys);
805         /*
806          * this is to detect s/w errors, which the h/w works around by
807          * ignoring the low 6 bits of address, if it wasn't aligned.
808          */
809         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpioavailaddr);
810         if (val != dd->ipath_pioavailregs_phys) {
811                 ipath_dev_err(dd, "Catastrophic software error, "
812                               "SendPIOAvailAddr written as %lx, "
813                               "read back as %llx\n",
814                               (unsigned long) dd->ipath_pioavailregs_phys,
815                               (unsigned long long) val);
816                 ret = -EINVAL;
817                 goto done;
818         }
819
820         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvbthqp, IPATH_KD_QP);
821
822         /*
823          * make sure we are not in freeze, and PIO send enabled, so
824          * writes to pbc happen
825          */
826         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask, 0ULL);
827         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
828                          ~0ULL&~INFINIPATH_HWE_MEMBISTFAILED);
829         ipath_write_kreg(dd, dd->ipath_kregs->kr_control, 0ULL);
830         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
831                          INFINIPATH_S_PIOENABLE);
832
833         /*
834          * before error clears, since we expect serdes pll errors during
835          * this, the first time after reset
836          */
837         if (bringup_link(dd)) {
838                 dev_info(&dd->pcidev->dev, "Failed to bringup IB link\n");
839                 ret = -ENETDOWN;
840                 goto done;
841         }
842
843         /*
844          * clear any "expected" hwerrs from reset and/or initialization
845          * clear any that aren't enabled (at least this once), and then
846          * set the enable mask
847          */
848         dd->ipath_f_init_hwerrors(dd);
849         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
850                          ~0ULL&~INFINIPATH_HWE_MEMBISTFAILED);
851         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask,
852                          dd->ipath_hwerrmask);
853
854         dd->ipath_maskederrs = dd->ipath_ignorederrs;
855         /* clear all */
856         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, -1LL);
857         /* enable errors that are masked, at least this first time. */
858         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
859                          ~dd->ipath_maskederrs);
860         /* clear any interrups up to this point (ints still not enabled) */
861         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, -1LL);
862
863         /*
864          * Set up the port 0 (kernel) rcvhdr q and egr TIDs.  If doing
865          * re-init, the simplest way to handle this is to free
866          * existing, and re-allocate.
867          * Need to re-create rest of port 0 portdata as well.
868          */
869         if (reinit) {
870                 /* Alloc and init new ipath_portdata for port0,
871                  * Then free old pd. Could lead to fragmentation, but also
872                  * makes later support for hot-swap easier.
873                  */
874                 struct ipath_portdata *npd;
875                 npd = create_portdata0(dd);
876                 if (npd) {
877                         ipath_free_pddata(dd, pd);
878                         dd->ipath_pd[0] = pd = npd;
879                 } else {
880                         ipath_dev_err(dd, "Unable to allocate portdata for"
881                                       "  port 0, failing\n");
882                         ret = -ENOMEM;
883                         goto done;
884                 }
885         }
886         dd->ipath_f_tidtemplate(dd);
887         ret = ipath_create_rcvhdrq(dd, pd);
888         if (!ret) {
889                 dd->ipath_hdrqtailptr =
890                         (volatile __le64 *)pd->port_rcvhdrtail_kvaddr;
891                 ret = create_port0_egr(dd);
892         }
893         if (ret)
894                 ipath_dev_err(dd, "failed to allocate port 0 (kernel) "
895                               "rcvhdrq and/or egr bufs\n");
896         else
897                 enable_chip(dd, pd, reinit);
898
899
900         if (!ret && !reinit) {
901             /* used when we close a port, for DMA already in flight at close */
902                 dd->ipath_dummy_hdrq = dma_alloc_coherent(
903                         &dd->pcidev->dev, pd->port_rcvhdrq_size,
904                         &dd->ipath_dummy_hdrq_phys,
905                         gfp_flags);
906                 if (!dd->ipath_dummy_hdrq ) {
907                         dev_info(&dd->pcidev->dev,
908                                 "Couldn't allocate 0x%lx bytes for dummy hdrq\n",
909                                 pd->port_rcvhdrq_size);
910                         /* fallback to just 0'ing */
911                         dd->ipath_dummy_hdrq_phys = 0UL;
912                 }
913         }
914
915         /*
916          * cause retrigger of pending interrupts ignored during init,
917          * even if we had errors
918          */
919         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, 0ULL);
920
921         if(!dd->ipath_stats_timer_active) {
922                 /*
923                  * first init, or after an admin disable/enable
924                  * set up stats retrieval timer, even if we had errors
925                  * in last portion of setup
926                  */
927                 init_timer(&dd->ipath_stats_timer);
928                 dd->ipath_stats_timer.function = ipath_get_faststats;
929                 dd->ipath_stats_timer.data = (unsigned long) dd;
930                 /* every 5 seconds; */
931                 dd->ipath_stats_timer.expires = jiffies + 5 * HZ;
932                 /* takes ~16 seconds to overflow at full IB 4x bandwdith */
933                 add_timer(&dd->ipath_stats_timer);
934                 dd->ipath_stats_timer_active = 1;
935         }
936
937 done:
938         if (!ret) {
939                 *dd->ipath_statusp |= IPATH_STATUS_CHIP_PRESENT;
940                 if (!dd->ipath_f_intrsetup(dd)) {
941                         /* now we can enable all interrupts from the chip */
942                         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask,
943                                          -1LL);
944                         /* force re-interrupt of any pending interrupts. */
945                         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear,
946                                          0ULL);
947                         /* chip is usable; mark it as initialized */
948                         *dd->ipath_statusp |= IPATH_STATUS_INITTED;
949                 } else
950                         ipath_dev_err(dd, "No interrupts enabled, couldn't "
951                                       "setup interrupt address\n");
952
953                 if (dd->ipath_cfgports > ipath_stats.sps_nports)
954                         /*
955                          * sps_nports is a global, so, we set it to
956                          * the highest number of ports of any of the
957                          * chips we find; we never decrement it, at
958                          * least for now.  Since this might have changed
959                          * over disable/enable or prior to reset, always
960                          * do the check and potentially adjust.
961                          */
962                         ipath_stats.sps_nports = dd->ipath_cfgports;
963         } else
964                 ipath_dbg("Failed (%d) to initialize chip\n", ret);
965
966         /* if ret is non-zero, we probably should do some cleanup
967            here... */
968         return ret;
969 }
970
971 static int ipath_set_kpiobufs(const char *str, struct kernel_param *kp)
972 {
973         struct ipath_devdata *dd;
974         unsigned long flags;
975         unsigned short val;
976         int ret;
977
978         ret = ipath_parse_ushort(str, &val);
979
980         spin_lock_irqsave(&ipath_devs_lock, flags);
981
982         if (ret < 0)
983                 goto bail;
984
985         if (val == 0) {
986                 ret = -EINVAL;
987                 goto bail;
988         }
989
990         list_for_each_entry(dd, &ipath_dev_list, ipath_list) {
991                 if (dd->ipath_kregbase)
992                         continue;
993                 if (val > (dd->ipath_piobcnt2k + dd->ipath_piobcnt4k -
994                            (dd->ipath_cfgports *
995                             IPATH_MIN_USER_PORT_BUFCNT)))
996                 {
997                         ipath_dev_err(
998                                 dd,
999                                 "Allocating %d PIO bufs for kernel leaves "
1000                                 "too few for %d user ports (%d each)\n",
1001                                 val, dd->ipath_cfgports - 1,
1002                                 IPATH_MIN_USER_PORT_BUFCNT);
1003                         ret = -EINVAL;
1004                         goto bail;
1005                 }
1006                 dd->ipath_lastport_piobuf =
1007                         dd->ipath_piobcnt2k + dd->ipath_piobcnt4k - val;
1008         }
1009
1010         ipath_kpiobufs = val;
1011         ret = 0;
1012 bail:
1013         spin_unlock_irqrestore(&ipath_devs_lock, flags);
1014
1015         return ret;
1016 }