828d50710c4b732718b0bab564a3be12fab2b0c7
[linux-3.10.git] / drivers / iio / light / nvs_cm3218.c
1 /* Copyright (c) 2014-2015, NVIDIA CORPORATION.  All rights reserved.
2  *
3  * This software is licensed under the terms of the GNU General Public
4  * License version 2, as published by the Free Software Foundation, and
5  * may be copied, distributed, and modified under those terms.
6  *
7  * This program is distributed in the hope that it will be useful,
8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10  * GNU General Public License for more details.
11  */
12
13 /* The NVS = NVidia Sensor framework */
14 /* See nvs_iio.c and nvs.h for documentation */
15 /* See nvs_light.c and nvs_light.h for documentation */
16
17
18 #include <linux/i2c.h>
19 #include <linux/module.h>
20 #include <linux/slab.h>
21 #include <linux/err.h>
22 #include <linux/delay.h>
23 #include <linux/ktime.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/workqueue.h>
26 #include <linux/interrupt.h>
27 #include <linux/gpio.h>
28 #include <linux/of_gpio.h>
29 #include <linux/of.h>
30 #include <linux/nvs.h>
31 #include <linux/nvs_light.h>
32
33 #define CM_DRIVER_VERSION               (300)
34 #define CM_VENDOR                       "Capella Microsystems, Inc."
35 #define CM_NAME                         "cm3218x"
36 #define CM_NAME_CM3218                  "cm3218"
37 #define CM_NAME_CM32180                 "cm32180"
38 #define CM_NAME_CM32181                 "cm32181"
39 #define CM_DEVID_CM3218                 (0x01)
40 #define CM_DEVID_CM32180                (0x02)
41 #define CM_DEVID_CM32181                (0x03)
42 #define CM_HW_DELAY_MS                  (10)
43 #define CM_ALS_CFG_DFLT                 (0x0800)
44 #define CM_ALS_PSM_DFLT                 (0x07)
45 #define CM_R_SET_DFLT                   (604)
46 #define CM_LIGHT_VERSION                (1)
47 #define CM_LIGHT_SCALE_IVAL             (0)
48 #define CM_LIGHT_SCALE_MICRO            (10000)
49 #define CM_LIGHT_THRESHOLD_LO           (10)
50 #define CM_LIGHT_THRESHOLD_HI           (10)
51 #define CM_POLL_DLY_MS_MAX              (4000)
52 /* HW registers */
53 #define CM_REG_CFG                      (0x00)
54 #define CM_REG_CFG_ALS_SM               (11)
55 #define CM_REG_CFG_ALS_IT               (6)
56 #define CM_REG_CFG_ALS_PERS             (4)
57 #define CM_REG_CFG_RSRV_ID              (2)
58 #define CM_REG_CFG_ALS_INT_EN           (1)
59 #define CM_REG_CFG_ALS_SD               (0)
60 #define CM_REG_CFG_USER_MSK_CM3218      (0x08F0)
61 #define CM_REG_CFG_USER_MSK_CM32180     (0x18F0)
62 #define CM_REG_CFG_USER_MSK_CM32181     (0x1BF0)
63 #define CM_REG_WH                       (0x01)
64 #define CM_REG_WL                       (0x02)
65 #define CM_REG_PSM                      (0x03)
66 #define CM_REG_PSM_PSM                  (1)
67 #define CM_REG_PSM_EN                   (0)
68 #define CM_REG_PSM_MASK                 (0x07)
69 #define CM_REG_ALS                      (0x04)
70 #define CM_REG_ALS_IF                   (0x06)
71 #define CM_REG_ALS_IF_L                 (15)
72 #define CM_REG_ALS_IF_H                 (14)
73 #define CM_REG_N                        (8)
74 /* the CM3218 & CM32180 device uses the CM_I2C_ARA to clear the INT pin */
75 #define CM_I2C_ARA                      (0x0C) /* I2C Alert Response Address */
76
77 enum CM_DBG {
78         CM_DBG_STS = 0,
79         /* skip sequence to "hide" debug features */
80         CM_DBG_CFG = 2,
81         CM_DBG_PSM,
82         CM_DBG_REG,
83         CM_DBG_ARA,
84         CM_DBG_RD,
85 };
86
87
88 /* regulator names in order of powering on */
89 static char *cm_vregs[] = {
90         "vdd",
91 };
92
93 static unsigned short cm_i2c_addrs[] = {
94         0x10,
95         0x48,
96 };
97
98 static struct nvs_light_dynamic cm3218_nld_tbl[] = {
99         { {0, 3571},  {234,  25485},  {0, 130000}, 1000, 0x08C4 },
100         { {0, 7140},  {467,  919900}, {0, 130000}, 500,  0x0884 },
101         { {0, 14280}, {935,  839800}, {0, 130000}, 250,  0x0844 },
102         { {0, 28570}, {1872, 334950}, {0, 130000}, 125,  0x0804 }
103 };
104
105 static struct nvs_light_dynamic cm32180_nld_tbl[] = {
106         { {0, 3571},  {234,  25485},  {0, 130000}, 1000, 0x08C4 },
107         { {0, 7140},  {467,  919900}, {0, 130000}, 500,  0x0884 },
108         { {0, 14280}, {935,  839800}, {0, 130000}, 250,  0x0844 },
109         { {0, 28570}, {1872, 334950}, {0, 130000}, 125,  0x0804 }
110 };
111
112 static struct nvs_light_dynamic cm32181_nld_tbl[] = {
113         { {0, 5000},   {327,   675000}, {0, 35000}, 800, 0x00C0 },
114         { {0, 10000},  {655,   350000}, {0, 35000}, 400, 0x0080 },
115         { {0, 21000},  {13762, 350000}, {0, 35000}, 200, 0x0040 },
116         { {0, 42000},  {27524, 700000}, {0, 35000}, 100, 0x0000 },
117         { {0, 84000},  {55049, 400000}, {0, 35000}, 50,  0x0200 },
118         { {0, 167000}, {10944, 345000}, {0, 35000}, 25,  0x0300 }
119 };
120
121 struct cm_psm {
122         unsigned int ms;
123         struct nvs_float milliamp;
124 };
125
126 static struct cm_psm cm_psm_tbl[] = {
127         { 500,  {0, 21000} },
128         { 1000, {0, 15000} },
129         { 2000, {0, 10000} },
130         { 4000, {0, 6000} }
131 };
132
133 struct cm_state {
134         struct i2c_client *i2c;
135         struct i2c_client *ara;
136         struct nvs_fn_if *nvs;
137         struct sensor_cfg cfg;
138         struct delayed_work dw;
139         struct regulator_bulk_data vreg[ARRAY_SIZE(cm_vregs)];
140         struct nvs_light light;
141         struct nvs_light_dynamic nld_tbl[ARRAY_SIZE(cm32181_nld_tbl)];
142         unsigned int sts;               /* debug flags */
143         unsigned int errs;              /* error count */
144         unsigned int enabled;           /* enable status */
145         int gpio_irq;                   /* interrupt GPIO */
146         u16 i2c_addr;                   /* I2C address */
147         u8 dev_id;                      /* device ID */
148         u16 als_cfg_mask;               /* ALS register 0 user mask */
149         u16 als_cfg;                    /* ALS register 0 user settings */
150         u16 als_psm;                    /* ALS Power Save Mode */
151         u32 r_set;                      /* Rset resistor value */
152         u16 rc[CM_REG_N];               /* register cache for reg dump */
153 };
154
155
156 static s64 cm_get_time_ns(void)
157 {
158         struct timespec ts;
159
160         ktime_get_ts(&ts);
161         return timespec_to_ns(&ts);
162 }
163
164 static void cm_err(struct cm_state *st)
165 {
166         st->errs++;
167         if (!st->errs)
168                 st->errs--;
169 }
170
171 /* CM3218 & CM32180 don't respond to I2C until the IRQ is ACK'd with the ARA.
172  * The problem is that ARA may be needed regardless of whether the IRQ is
173  * enabled or not so we test the IRQ GPIO before each I2C transaction as a WAR.
174  */
175 static int cm_irq_ack(struct cm_state *st, bool force)
176 {
177         int gpio_sts;
178         int ret = 0;
179
180         if (st->ara && st->gpio_irq >= 0) {
181                 if (!force)
182                         gpio_sts = gpio_get_value(st->gpio_irq);
183                 else
184                         gpio_sts = false;
185                 if (!gpio_sts)
186                         ret = i2c_smbus_read_byte(st->ara);
187                 if (st->sts & NVS_STS_SPEW_IRQ)
188                         dev_info(&st->i2c->dev, "%s GPIO ARA %d=%d ret=%d\n",
189                                  __func__, st->gpio_irq, gpio_sts, ret);
190         }
191         /* ret < 0: error
192          * ret = 0: no action
193          * ret > 0: ACK
194          */
195         return ret;
196 }
197
198 static int cm_i2c_rd(struct cm_state *st, u8 reg, u16 *val)
199 {
200         struct i2c_msg msg[2];
201         int ret;
202
203         cm_irq_ack(st, false);
204         msg[0].addr = st->i2c_addr;
205         msg[0].flags = 0;
206         msg[0].len = 1;
207         msg[0].buf = &reg;
208         msg[1].addr = st->i2c_addr;
209         msg[1].flags = I2C_M_RD;
210         msg[1].len = 2;
211         msg[1].buf = (__u8 *)val;
212         ret = i2c_transfer(st->i2c->adapter, msg, 2);
213         if (ret != 2 && st->ara) {
214                 cm_irq_ack(st, true);
215                 ret = i2c_transfer(st->i2c->adapter, msg, 2);
216         }
217         if (ret == 2) {
218                 *val = le16_to_cpup(val);
219                 ret = 0;
220         } else {
221                 cm_err(st);
222                 ret = -EIO;
223         }
224         if (st->sts & NVS_STS_SPEW_MSG)
225                 dev_info(&st->i2c->dev, "%s reg=%hhx val=%hx err=%d\n",
226                          __func__, reg, *val, ret);
227         return ret;
228 }
229
230 static int cm_i2c_wr(struct cm_state *st, u8 reg, u16 val)
231 {
232         struct i2c_msg msg;
233         u8 buf[3];
234         int ret = 0;
235
236         if (st->i2c_addr) {
237                 cm_irq_ack(st, false);
238                 buf[0] = reg;
239                 val = cpu_to_le16(val);
240                 buf[1] = val & 0xFF;
241                 buf[2] = val >> 8;
242                 msg.addr = st->i2c_addr;
243                 msg.flags = 0;
244                 msg.len = sizeof(buf);
245                 msg.buf = buf;
246                 ret = i2c_transfer(st->i2c->adapter, &msg, 1);
247                 if (ret != 1 && st->ara) {
248                         cm_irq_ack(st, true);
249                         ret = i2c_transfer(st->i2c->adapter, &msg, 1);
250                 }
251                 if (ret == 1) {
252                         st->rc[reg] = val;
253                         ret = 0;
254                 } else {
255                         cm_err(st);
256                         ret = -EIO;
257                 }
258                 if (st->sts & NVS_STS_SPEW_MSG)
259                         dev_info(&st->i2c->dev, "%s reg=%hhx val=%hx err=%d\n",
260                                  __func__, reg, val, ret);
261         }
262         return ret;
263 }
264
265 static int cm_pm(struct cm_state *st, bool enable)
266 {
267         int ret;
268
269         if (enable) {
270                 ret = nvs_vregs_enable(&st->i2c->dev, st->vreg,
271                                        ARRAY_SIZE(cm_vregs));
272                 if (ret)
273                         mdelay(CM_HW_DELAY_MS);
274                 if (st->dev_id == CM_DEVID_CM32181)
275                         cm_i2c_wr(st, CM_REG_PSM, st->als_psm);
276         } else {
277                 ret = nvs_vregs_sts(st->vreg, ARRAY_SIZE(cm_vregs));
278                 if ((ret < 0) || (ret == ARRAY_SIZE(cm_vregs))) {
279                         ret = cm_i2c_wr(st, CM_REG_CFG, st->rc[CM_REG_CFG] |
280                                         1 << CM_REG_CFG_ALS_SD);
281                 } else if (ret > 0) {
282                         nvs_vregs_enable(&st->i2c->dev, st->vreg,
283                                          ARRAY_SIZE(cm_vregs));
284                         mdelay(CM_HW_DELAY_MS);
285                         ret = cm_i2c_wr(st, CM_REG_CFG, st->rc[CM_REG_CFG] |
286                                         1 << CM_REG_CFG_ALS_SD);
287                 }
288                 ret |= nvs_vregs_disable(&st->i2c->dev, st->vreg,
289                                          ARRAY_SIZE(cm_vregs));
290         }
291         if (ret > 0)
292                 ret = 0;
293         if (ret) {
294                 dev_err(&st->i2c->dev, "%s pwr=%x ERR=%d\n",
295                         __func__, enable, ret);
296         } else {
297                 if (st->sts & NVS_STS_SPEW_MSG)
298                         dev_info(&st->i2c->dev, "%s pwr=%x\n",
299                                  __func__, enable);
300         }
301         return ret;
302 }
303
304 static void cm_pm_exit(struct cm_state *st)
305 {
306         cm_pm(st, false);
307         nvs_vregs_exit(&st->i2c->dev, st->vreg, ARRAY_SIZE(cm_vregs));
308 }
309
310 static int cm_pm_init(struct cm_state *st)
311 {
312         int ret;
313
314         st->enabled = 0;
315         nvs_vregs_init(&st->i2c->dev,
316                        st->vreg, ARRAY_SIZE(cm_vregs), cm_vregs);
317         ret = cm_pm(st, true);
318         return ret;
319 }
320
321 static int cm_cmd_wr(struct cm_state *st, bool irq_en)
322 {
323         u16 als_cfg;
324         int ret = 0;
325
326         als_cfg = st->als_cfg;
327         als_cfg |= st->nld_tbl[st->light.nld_i].driver_data;
328         cm_i2c_wr(st, CM_REG_CFG, als_cfg); /* disable IRQ */
329         if (irq_en && st->i2c->irq) {
330                 ret = cm_i2c_wr(st, CM_REG_WL, st->light.hw_thresh_lo);
331                 ret |= cm_i2c_wr(st, CM_REG_WH, st->light.hw_thresh_hi);
332                 if (!ret) {
333                         als_cfg |= (1 << CM_REG_CFG_ALS_INT_EN);
334                         ret = cm_i2c_wr(st, CM_REG_CFG, als_cfg);
335                         if (!ret)
336                                 ret = RET_HW_UPDATE; /* flag IRQ enabled */
337                 }
338         }
339         return ret;
340 }
341
342 static int cm_rd(struct cm_state *st)
343 {
344         u16 hw;
345         s64 ts;
346         int ret = 0;
347
348         /* spec is vague so one of these should clear the IRQ for CM32181 */
349         if (st->dev_id == CM_DEVID_CM32181)
350                 ret = cm_i2c_rd(st, CM_REG_ALS_IF, &hw);
351         ret |= cm_i2c_rd(st, CM_REG_ALS, &hw);
352         if (ret)
353                 return ret;
354
355         ts = cm_get_time_ns();
356         if (st->sts & NVS_STS_SPEW_DATA)
357                 dev_info(&st->i2c->dev,
358                          "poll light hw %hu %lld  diff=%d %lldns  index=%u\n",
359                          hw, ts, hw - st->light.hw, ts - st->light.timestamp,
360                          st->light.nld_i);
361         st->light.hw = hw;
362         st->light.timestamp = ts;
363         ret = nvs_light_read(&st->light);
364         switch (ret) {
365         case RET_POLL_NEXT:
366                 if (st->light.nld_i_change)
367                         ret = cm_cmd_wr(st, false);
368                 break;
369
370         case RET_NO_CHANGE:
371                 if (st->i2c->irq)
372                         ret = RET_HW_UPDATE;
373                 break;
374
375         case RET_HW_UPDATE:
376                 ret = cm_cmd_wr(st, true);
377                 break;
378
379         default:
380                 break;
381         }
382
383         return ret;
384 }
385
386 static void cm_read(struct cm_state *st)
387 {
388         int ret;
389
390         st->nvs->nvs_mutex_lock(st->light.nvs_st);
391         if (st->enabled) {
392                 ret = cm_rd(st);
393                 if (ret < RET_HW_UPDATE) {
394                         schedule_delayed_work(&st->dw,
395                                     msecs_to_jiffies(st->light.poll_delay_ms));
396                         if (st->sts & NVS_STS_SPEW_MSG)
397                                 dev_info(&st->i2c->dev, "%s poll delay=%ums\n",
398                                          __func__, st->light.poll_delay_ms);
399                 }
400         }
401         st->nvs->nvs_mutex_unlock(st->light.nvs_st);
402 }
403
404 static void cm_work(struct work_struct *ws)
405 {
406         struct cm_state *st = container_of((struct delayed_work *)ws,
407                                            struct cm_state, dw);
408
409         cm_read(st);
410 }
411
412 static irqreturn_t cm_irq_thread(int irq, void *dev_id)
413 {
414         struct cm_state *st = (struct cm_state *)dev_id;
415
416         if (st->sts & NVS_STS_SPEW_IRQ)
417                 dev_info(&st->i2c->dev, "%s\n", __func__);
418         cm_read(st);
419         return IRQ_HANDLED;
420 }
421
422 static int cm_disable(struct cm_state *st)
423 {
424         int ret;
425
426         cancel_delayed_work(&st->dw);
427         ret = cm_pm(st, false);
428         if (!ret)
429                 st->enabled = 0;
430         return ret;
431 }
432
433 static int cm_enable(void *client, int snsr_id, int enable)
434 {
435         struct cm_state *st = (struct cm_state *)client;
436         unsigned int ms;
437         int ret;
438
439         if (enable < 0)
440                 return st->enabled;
441
442         if (enable) {
443                 ret = cm_pm(st, true);
444                 if (!ret) {
445                         nvs_light_enable(&st->light);
446                         ret = cm_cmd_wr(st, false);
447                         if (ret) {
448                                 cm_disable(st);
449                         } else {
450                                 st->enabled = enable;
451                                 ms = st->light.poll_delay_ms;
452                                 schedule_delayed_work(&st->dw,
453                                                       msecs_to_jiffies(ms));
454                         }
455                 }
456         } else {
457                 ret = cm_disable(st);
458         }
459         return ret;
460 }
461
462 static int cm_batch(void *client, int snsr_id, int flags,
463                     unsigned int period, unsigned int timeout)
464 {
465         struct cm_state *st = (struct cm_state *)client;
466
467         if (timeout)
468                 /* timeout not supported (no HW FIFO) */
469                 return -EINVAL;
470
471         st->light.delay_us = period;
472         return 0;
473 }
474
475 static int cm_thresh_lo(void *client, int snsr_id, int thresh_lo)
476 {
477         struct cm_state *st = (struct cm_state *)client;
478
479         nvs_light_threshold_calibrate_lo(&st->light, thresh_lo);
480         return 0;
481 }
482
483 static int cm_thresh_hi(void *client, int snsr_id, int thresh_hi)
484 {
485         struct cm_state *st = (struct cm_state *)client;
486
487         nvs_light_threshold_calibrate_hi(&st->light, thresh_hi);
488         return 0;
489 }
490
491 static int cm_regs(void *client, int snsr_id, char *buf)
492 {
493         struct cm_state *st = (struct cm_state *)client;
494         ssize_t t;
495         u16 val;
496         u8 i;
497         u8 n;
498         int ret;
499
500         if (st->dev_id == CM_DEVID_CM32181)
501                 n = CM_REG_ALS_IF;
502         else
503                 n = CM_REG_ALS;
504         t = sprintf(buf, "registers:\n");
505         for (i = 0; i < CM_REG_ALS; i++)
506                 t += sprintf(buf + t, "%#2x=%#4x\n", i, st->rc[i]);
507         for (; i <= n; i++) {
508                 ret = cm_i2c_rd(st, i, &val);
509                 if (ret)
510                         t += sprintf(buf + t, "%#2x=ERR: %d\n", i, ret);
511                 else
512                         t += sprintf(buf + t, "%#2x=%#4x\n", i, val);
513         }
514         return t;
515 }
516
517 static int cm_nvs_write(void *client, int snsr_id, unsigned int nvs)
518 {
519         struct cm_state *st = (struct cm_state *)client;
520         u16 val;
521         u8 reg;
522         int ret;
523
524         switch (nvs & 0xFF) {
525         case CM_DBG_STS:
526                 return 0;
527
528         case CM_DBG_CFG:
529                 st->als_cfg = (nvs >> 8) & st->als_cfg_mask;
530                 dev_info(&st->i2c->dev, "%s als_cfg=%hx\n",
531                          __func__, st->als_cfg);
532                 return 0;
533
534         case CM_DBG_PSM:
535                 if (st->dev_id == CM_DEVID_CM32181) {
536                         st->als_psm = (nvs >> 8) & CM_REG_PSM_MASK;
537                         dev_info(&st->i2c->dev,
538                                  "%s als_psm=%hx (applied when enabled)\n",
539                                  __func__, st->als_psm);
540                 } else {
541                         dev_info(&st->i2c->dev, "%s N/A\n", __func__);
542                 }
543                 return 0;
544
545         case CM_DBG_REG:
546                 reg = (nvs >> 24) & 0xFF;
547                 val = (nvs >> 8) & 0xFFFF;
548                 st->nvs->nvs_mutex_lock(st->light.nvs_st);
549                 ret = cm_i2c_wr(st, reg, val);
550                 st->nvs->nvs_mutex_unlock(st->light.nvs_st);
551                 dev_info(&st->i2c->dev, "%s %hx=>%hhx  err=%d\n",
552                          __func__, val, reg, ret);
553                 return ret;
554
555         case CM_DBG_ARA:
556                 if (st->ara) {
557                         st->nvs->nvs_mutex_lock(st->light.nvs_st);
558                         ret = i2c_smbus_read_byte(st->ara);
559                         st->nvs->nvs_mutex_unlock(st->light.nvs_st);
560                         dev_info(&st->i2c->dev, "%s ARA=%d\n", __func__, ret);
561                 } else {
562                         dev_info(&st->i2c->dev, "%s N/A\n", __func__);
563                 }
564                 return 0;
565
566         case CM_DBG_RD:
567                 cm_read(st);
568                 dev_info(&st->i2c->dev, "%s cm_read done\n", __func__);
569                 return 0;
570
571         default:
572                 ret = -EINVAL;
573                 break;
574         }
575
576         return ret;
577 }
578
579 static int cm_nvs_read(void *client, int snsr_id, char *buf)
580 {
581         struct cm_state *st = (struct cm_state *)client;
582         ssize_t t;
583         int ret;
584
585         t = sprintf(buf, "driver v. %u\n", CM_DRIVER_VERSION);
586         if (st->ara && st->gpio_irq >= 0) {
587                 ret = gpio_get_value(st->gpio_irq);
588                 t += sprintf(buf + t, "gpio_irq %d=%d\n", st->gpio_irq, ret);
589         }
590         t += sprintf(buf + t, "irq=%d\n", st->i2c->irq);
591         t += sprintf(buf + t, "als_cfg=%hx\n", st->als_cfg);
592         if (st->dev_id == CM_DEVID_CM32181)
593                 t += sprintf(buf + t, "als_psm=%hx\n", st->als_psm);
594         return t;
595 }
596
597 static struct nvs_fn_dev cm_fn_dev = {
598         .enable                         = cm_enable,
599         .batch                          = cm_batch,
600         .thresh_lo                      = cm_thresh_lo,
601         .thresh_hi                      = cm_thresh_hi,
602         .regs                           = cm_regs,
603         .nvs_write                      = cm_nvs_write,
604         .nvs_read                       = cm_nvs_read,
605 };
606
607 static int cm_suspend(struct device *dev)
608 {
609         struct i2c_client *client = to_i2c_client(dev);
610         struct cm_state *st = i2c_get_clientdata(client);
611         int ret = 0;
612
613         if (st->nvs && st->light.nvs_st)
614                 ret = st->nvs->suspend(st->light.nvs_st);
615         if (st->sts & NVS_STS_SPEW_MSG)
616                 dev_info(&client->dev, "%s\n", __func__);
617         return ret;
618 }
619
620 static int cm_resume(struct device *dev)
621 {
622         struct i2c_client *client = to_i2c_client(dev);
623         struct cm_state *st = i2c_get_clientdata(client);
624         int ret = 0;
625
626         if (st->nvs && st->light.nvs_st)
627                 ret = st->nvs->resume(st->light.nvs_st);
628         if (st->sts & NVS_STS_SPEW_MSG)
629                 dev_info(&client->dev, "%s\n", __func__);
630         return ret;
631 }
632
633 static SIMPLE_DEV_PM_OPS(cm_pm_ops, cm_suspend, cm_resume);
634
635 static void cm_shutdown(struct i2c_client *client)
636 {
637         struct cm_state *st = i2c_get_clientdata(client);
638
639         if (st->nvs && st->light.nvs_st)
640                 st->nvs->shutdown(st->light.nvs_st);
641         if (st->sts & NVS_STS_SPEW_MSG)
642                 dev_info(&client->dev, "%s\n", __func__);
643 }
644
645 static int cm_remove(struct i2c_client *client)
646 {
647         struct cm_state *st = i2c_get_clientdata(client);
648
649         if (st != NULL) {
650                 cm_shutdown(client);
651                 if (st->nvs && st->light.nvs_st)
652                         st->nvs->remove(st->light.nvs_st);
653                 if (st->dw.wq)
654                         destroy_workqueue(st->dw.wq);
655                 cm_pm_exit(st);
656                 if (st->ara)
657                         i2c_unregister_device(st->ara);
658         }
659         dev_info(&client->dev, "%s\n", __func__);
660         return 0;
661 }
662
663 static int cm_id_dev(struct cm_state *st, const char *name)
664 {
665         u16 val = 0;
666         bool ara = false;
667         unsigned int i;
668         unsigned int j;
669         int ret = 1;
670
671         if (!strcmp(name, CM_NAME_CM3218))
672                 st->dev_id = CM_DEVID_CM3218;
673         else if (!strcmp(name, CM_NAME_CM32180))
674                 st->dev_id = CM_DEVID_CM32180;
675         else if (!strcmp(name, CM_NAME_CM32181))
676                 st->dev_id = CM_DEVID_CM32181;
677         if (!st->dev_id) {
678                 ret = cm_i2c_rd(st, CM_REG_CFG, &val);
679                 if (ret) {
680                         return ret;
681                 } else {
682                         if (val & (1 << CM_REG_CFG_RSRV_ID)) {
683                                 if (st->i2c_addr == 0x10)
684                                         st->dev_id = CM_DEVID_CM3218;
685                                 else
686                                         /* st->i2c_addr == 0x48 */
687                                         st->dev_id = CM_DEVID_CM32180;
688                         } else {
689                                 st->dev_id = CM_DEVID_CM32181;
690                         }
691                 }
692         }
693         switch (st->dev_id) {
694         case CM_DEVID_CM3218:
695                 st->cfg.part = CM_NAME_CM3218;
696                 st->als_cfg_mask = CM_REG_CFG_USER_MSK_CM3218;
697                 memcpy(&st->nld_tbl, &cm3218_nld_tbl, sizeof(cm3218_nld_tbl));
698                 i = ARRAY_SIZE(cm3218_nld_tbl) - 1;
699                 if (st->light.nld_i_hi > i)
700                         st->light.nld_i_hi = i;
701                 if (st->light.nld_i_lo > i)
702                         st->light.nld_i_lo = i;
703                 ara = true;
704                 break;
705
706         case CM_DEVID_CM32180:
707                 st->cfg.part = CM_NAME_CM32180;
708                 st->als_cfg_mask = CM_REG_CFG_USER_MSK_CM32180;
709                 memcpy(&st->nld_tbl, &cm32180_nld_tbl,
710                        sizeof(cm32180_nld_tbl));
711                 i = ARRAY_SIZE(cm32180_nld_tbl) - 1;
712                 if (st->light.nld_i_hi > i)
713                         st->light.nld_i_hi = i;
714                 if (st->light.nld_i_lo > i)
715                         st->light.nld_i_lo = i;
716                 ara = true;
717                 break;
718
719         case CM_DEVID_CM32181:
720                 st->cfg.part = CM_NAME_CM32181;
721                 st->als_cfg_mask = CM_REG_CFG_USER_MSK_CM32181;
722                 memcpy(&st->nld_tbl, &cm32181_nld_tbl, sizeof(st->nld_tbl));
723                 if (st->als_psm & (1 << CM_REG_PSM_EN)) {
724                         j = st->als_psm >> 1;
725                         for (i = 0; i < ARRAY_SIZE(cm32181_nld_tbl); i++) {
726                                 st->nld_tbl[i].delay_min_ms +=
727                                                               cm_psm_tbl[j].ms;
728                                 st->nld_tbl[i].milliamp.ival =
729                                                    cm_psm_tbl[j].milliamp.ival;
730                                 st->nld_tbl[i].milliamp.fval =
731                                                    cm_psm_tbl[j].milliamp.fval;
732                         }
733                 }
734                 break;
735         }
736
737         st->als_cfg &= st->als_cfg_mask;
738         if (ara) {
739                 st->ara = i2c_new_dummy(st->i2c->adapter, CM_I2C_ARA);
740                 if (!st->ara) {
741                         /* must have ARA control for IRQ acknowledge */
742                         dev_err(&st->i2c->dev,
743                                 "%s ERR: i2c_new_dummy\n",
744                                 __func__);
745                         return -ENODEV;
746                 }
747         } else {
748                 st->ara = NULL;
749         }
750         if (ret != 1)
751                 dev_info(&st->i2c->dev, "%s found %s\n",
752                          __func__, st->cfg.part);
753         i = st->light.nld_i_lo;
754         st->cfg.resolution.ival = st->nld_tbl[i].resolution.ival;
755         st->cfg.resolution.fval = st->nld_tbl[i].resolution.fval;
756         i = st->light.nld_i_hi;
757         st->cfg.max_range.ival = st->nld_tbl[i].max_range.ival;
758         st->cfg.max_range.fval = st->nld_tbl[i].max_range.fval;
759         st->cfg.milliamp.ival = st->nld_tbl[i].milliamp.ival;
760         st->cfg.milliamp.fval = st->nld_tbl[i].milliamp.fval;
761         st->cfg.delay_us_min = st->nld_tbl[i].delay_min_ms * 1000;
762         return 0;
763 }
764
765 static int cm_id_i2c(struct cm_state *st, const char *name)
766 {
767         int i;
768         int ret;
769
770         for (i = 0; i < ARRAY_SIZE(cm_i2c_addrs); i++) {
771                 if (st->i2c->addr == cm_i2c_addrs[i])
772                         break;
773         }
774
775         if (i < ARRAY_SIZE(cm_i2c_addrs)) {
776                 st->i2c_addr = st->i2c->addr;
777                 ret = cm_id_dev(st, name);
778         } else {
779                 name = CM_NAME;
780                 for (i = 0; i < ARRAY_SIZE(cm_i2c_addrs); i++) {
781                         st->i2c_addr = cm_i2c_addrs[i];
782                         ret = cm_id_dev(st, name);
783                         if (!ret)
784                                 break;
785                 }
786         }
787         if (ret)
788                 st->i2c_addr = 0;
789         return ret;
790 }
791
792 static struct sensor_cfg cm_cfg_dflt = {
793         .name                   = NVS_LIGHT_STRING,
794         .ch_n                   = 1,
795         .ch_sz                  = 4,
796         .part                   = CM_NAME,
797         .vendor                 = CM_VENDOR,
798         .version                = CM_LIGHT_VERSION,
799         .delay_us_max           = CM_POLL_DLY_MS_MAX * 1000,
800         .flags                  = SENSOR_FLAG_ON_CHANGE_MODE,
801         .scale                  = {
802                 .ival           = CM_LIGHT_SCALE_IVAL,
803                 .fval           = CM_LIGHT_SCALE_MICRO,
804         },
805         .thresh_lo              = CM_LIGHT_THRESHOLD_LO,
806         .thresh_hi              = CM_LIGHT_THRESHOLD_HI,
807 };
808
809 static int cm_of_dt(struct cm_state *st, struct device_node *dn)
810 {
811         int ret;
812
813         /* default device specific parameters */
814         st->als_cfg = CM_ALS_CFG_DFLT;
815         st->als_psm = CM_ALS_PSM_DFLT;
816         st->r_set = CM_R_SET_DFLT;
817         /* default NVS ALS programmable parameters */
818         memcpy(&st->cfg, &cm_cfg_dflt, sizeof(st->cfg));
819         st->light.cfg = &st->cfg;
820         st->light.hw_mask = 0xFFFF;
821         st->light.nld_tbl = st->nld_tbl;
822         st->gpio_irq = -1;
823         /* device tree parameters */
824         if (dn) {
825                 /* common NVS parameters */
826                 ret = nvs_of_dt(dn, &st->cfg, NULL);
827                 if (ret == -ENODEV)
828                         return -ENODEV;
829
830                 /* device specific parameters */
831                 of_property_read_u16(dn, "als_cfg", &st->als_cfg);
832                 of_property_read_u16(dn, "als_psm", &st->als_psm);
833                 st->als_psm &= CM_REG_PSM_MASK;
834                 of_property_read_u32(dn, "Rset", &st->r_set);
835                 st->gpio_irq = of_get_named_gpio(dn, "gpio_irq", 0);
836         }
837
838         if (st->gpio_irq >= 0) {
839                 if (gpio_is_valid(st->gpio_irq)) {
840                         ret = gpio_request(st->gpio_irq, CM_NAME);
841                         if (ret) {
842                                 dev_err(&st->i2c->dev,
843                                         "%s gpio_request(%d %s) ERR:%d\n",
844                                         __func__, st->gpio_irq, CM_NAME, ret);
845                                 return -EPROBE_DEFER;
846                         } else {
847                                 ret = gpio_direction_input(st->gpio_irq);
848                                 if (ret < 0) {
849                                         dev_err(&st->i2c->dev,
850                                                 "%s gpio_dir_inp(%d) ERR:%d\n",
851                                                 __func__, st->gpio_irq, ret);
852                                         return -ENODEV;
853                                 }
854                         }
855                 } else {
856                         return -EPROBE_DEFER;
857                 }
858         }
859
860         /* this device supports these programmable parameters */
861         if (nvs_light_of_dt(&st->light, dn, NULL)) {
862                 st->light.nld_i_lo = 0;
863                 st->light.nld_i_hi = ARRAY_SIZE(cm32181_nld_tbl) - 1;
864         }
865         return 0;
866 }
867
868 static int cm_probe(struct i2c_client *client,
869                     const struct i2c_device_id *id)
870 {
871         struct cm_state *st;
872         int ret;
873
874         dev_info(&client->dev, "%s\n", __func__);
875         st = devm_kzalloc(&client->dev, sizeof(*st), GFP_KERNEL);
876         if (st == NULL) {
877                 dev_err(&client->dev, "%s devm_kzalloc ERR\n", __func__);
878                 return -ENOMEM;
879         }
880
881         i2c_set_clientdata(client, st);
882         st->i2c = client;
883         ret = cm_of_dt(st, client->dev.of_node);
884         if (ret) {
885                 if (ret == -ENODEV) {
886                         dev_info(&client->dev, "%s DT disabled\n", __func__);
887                 } else {
888                         dev_err(&client->dev, "%s _of_dt ERR\n", __func__);
889                         ret = -ENODEV;
890                 }
891                 goto cm_probe_exit;
892         }
893
894         cm_pm_init(st);
895         ret = cm_id_i2c(st, id->name);
896         if (ret) {
897                 dev_err(&client->dev, "%s _id_i2c ERR\n", __func__);
898                 ret = -ENODEV;
899                 goto cm_probe_exit;
900         }
901
902         cm_pm(st, false);
903         cm_fn_dev.errs = &st->errs;
904         cm_fn_dev.sts = &st->sts;
905         st->nvs = nvs_iio();
906         if (st->nvs == NULL) {
907                 dev_err(&client->dev, "%s nvs_iio ERR\n", __func__);
908                 ret = -ENODEV;
909                 goto cm_probe_exit;
910         }
911
912         st->light.handler = st->nvs->handler;
913         ret = st->nvs->probe(&st->light.nvs_st, st, &client->dev,
914                              &cm_fn_dev, &st->cfg);
915         if (ret) {
916                 dev_err(&client->dev, "%s nvs_probe ERR\n", __func__);
917                 ret = -ENODEV;
918                 goto cm_probe_exit;
919         }
920
921         INIT_DELAYED_WORK(&st->dw, cm_work);
922         if (st->gpio_irq >= 0 && !client->irq)
923                 client->irq = gpio_to_irq(st->gpio_irq);
924         if (client->irq) {
925                 ret = request_threaded_irq(client->irq, NULL, cm_irq_thread,
926                                            IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
927                                            CM_NAME, st);
928                 if (ret) {
929                         dev_err(&client->dev, "%s req_threaded_irq ERR %d\n",
930                                 __func__, ret);
931                         ret = -ENOMEM;
932                         goto cm_probe_exit;
933                 }
934         }
935
936         dev_info(&client->dev, "%s done\n", __func__);
937         return 0;
938
939 cm_probe_exit:
940         cm_remove(client);
941         return ret;
942 }
943
944 static const struct i2c_device_id cm_i2c_device_id[] = {
945         { CM_NAME, 0 },
946         { CM_NAME_CM3218, 0 },
947         { CM_NAME_CM32180, 0 },
948         { CM_NAME_CM32181, 0 },
949         {}
950 };
951
952 MODULE_DEVICE_TABLE(i2c, cm_i2c_device_id);
953
954 static const struct of_device_id cm_of_match[] = {
955         { .compatible = "capella,cm3218x", },
956         { .compatible = "capella,cm3218", },
957         { .compatible = "capella,cm32180", },
958         { .compatible = "capella,cm32181", },
959         {},
960 };
961
962 MODULE_DEVICE_TABLE(of, cm_of_match);
963
964 static struct i2c_driver cm_driver = {
965         .class          = I2C_CLASS_HWMON,
966         .probe          = cm_probe,
967         .remove         = cm_remove,
968         .shutdown       = cm_shutdown,
969         .driver = {
970                 .name           = CM_NAME,
971                 .owner          = THIS_MODULE,
972                 .of_match_table = of_match_ptr(cm_of_match),
973                 .pm             = &cm_pm_ops,
974         },
975         .id_table       = cm_i2c_device_id,
976 };
977 module_i2c_driver(cm_driver);
978
979 MODULE_LICENSE("GPL");
980 MODULE_DESCRIPTION("CM3218x driver");
981 MODULE_AUTHOR("NVIDIA Corporation");