iio: common: NVS v209 common timestamps
[linux-3.10.git] / drivers / iio / light / nvs_cm3218.c
1 /* Copyright (c) 2014-2015, NVIDIA CORPORATION.  All rights reserved.
2  *
3  * This software is licensed under the terms of the GNU General Public
4  * License version 2, as published by the Free Software Foundation, and
5  * may be copied, distributed, and modified under those terms.
6  *
7  * This program is distributed in the hope that it will be useful,
8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10  * GNU General Public License for more details.
11  */
12
13 /* The NVS = NVidia Sensor framework */
14 /* See nvs_iio.c and nvs.h for documentation */
15 /* See nvs_light.c and nvs_light.h for documentation */
16
17
18 #include <linux/i2c.h>
19 #include <linux/module.h>
20 #include <linux/slab.h>
21 #include <linux/err.h>
22 #include <linux/delay.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/workqueue.h>
25 #include <linux/interrupt.h>
26 #include <linux/gpio.h>
27 #include <linux/of_gpio.h>
28 #include <linux/of.h>
29 #include <linux/nvs.h>
30 #include <linux/nvs_light.h>
31
32 #define CM_DRIVER_VERSION               (300)
33 #define CM_VENDOR                       "Capella Microsystems, Inc."
34 #define CM_NAME                         "cm3218x"
35 #define CM_NAME_CM3218                  "cm3218"
36 #define CM_NAME_CM32180                 "cm32180"
37 #define CM_NAME_CM32181                 "cm32181"
38 #define CM_DEVID_CM3218                 (0x01)
39 #define CM_DEVID_CM32180                (0x02)
40 #define CM_DEVID_CM32181                (0x03)
41 #define CM_HW_DELAY_MS                  (10)
42 #define CM_ALS_CFG_DFLT                 (0x0800)
43 #define CM_ALS_PSM_DFLT                 (0x07)
44 #define CM_R_SET_DFLT                   (604)
45 #define CM_LIGHT_VERSION                (1)
46 #define CM_LIGHT_SCALE_IVAL             (0)
47 #define CM_LIGHT_SCALE_MICRO            (10000)
48 #define CM_LIGHT_THRESHOLD_LO           (10)
49 #define CM_LIGHT_THRESHOLD_HI           (10)
50 #define CM_POLL_DLY_MS_MAX              (4000)
51 /* HW registers */
52 #define CM_REG_CFG                      (0x00)
53 #define CM_REG_CFG_ALS_SM               (11)
54 #define CM_REG_CFG_ALS_IT               (6)
55 #define CM_REG_CFG_ALS_PERS             (4)
56 #define CM_REG_CFG_RSRV_ID              (2)
57 #define CM_REG_CFG_ALS_INT_EN           (1)
58 #define CM_REG_CFG_ALS_SD               (0)
59 #define CM_REG_CFG_USER_MSK_CM3218      (0x08F0)
60 #define CM_REG_CFG_USER_MSK_CM32180     (0x18F0)
61 #define CM_REG_CFG_USER_MSK_CM32181     (0x1BF0)
62 #define CM_REG_WH                       (0x01)
63 #define CM_REG_WL                       (0x02)
64 #define CM_REG_PSM                      (0x03)
65 #define CM_REG_PSM_PSM                  (1)
66 #define CM_REG_PSM_EN                   (0)
67 #define CM_REG_PSM_MASK                 (0x07)
68 #define CM_REG_ALS                      (0x04)
69 #define CM_REG_ALS_IF                   (0x06)
70 #define CM_REG_ALS_IF_L                 (15)
71 #define CM_REG_ALS_IF_H                 (14)
72 #define CM_REG_N                        (8)
73 /* the CM3218 & CM32180 device uses the CM_I2C_ARA to clear the INT pin */
74 #define CM_I2C_ARA                      (0x0C) /* I2C Alert Response Address */
75
76 enum CM_DBG {
77         CM_DBG_STS = 0,
78         /* skip sequence to "hide" debug features */
79         CM_DBG_CFG = 2,
80         CM_DBG_PSM,
81         CM_DBG_REG,
82         CM_DBG_ARA,
83         CM_DBG_RD,
84 };
85
86
87 /* regulator names in order of powering on */
88 static char *cm_vregs[] = {
89         "vdd",
90 };
91
92 static unsigned short cm_i2c_addrs[] = {
93         0x10,
94         0x48,
95 };
96
97 static struct nvs_light_dynamic cm3218_nld_tbl[] = {
98         { {0, 3571},  {234,  25485},  {0, 130000}, 1000, 0x08C4 },
99         { {0, 7140},  {467,  919900}, {0, 130000}, 500,  0x0884 },
100         { {0, 14280}, {935,  839800}, {0, 130000}, 250,  0x0844 },
101         { {0, 28570}, {1872, 334950}, {0, 130000}, 125,  0x0804 }
102 };
103
104 static struct nvs_light_dynamic cm32180_nld_tbl[] = {
105         { {0, 3571},  {234,  25485},  {0, 130000}, 1000, 0x08C4 },
106         { {0, 7140},  {467,  919900}, {0, 130000}, 500,  0x0884 },
107         { {0, 14280}, {935,  839800}, {0, 130000}, 250,  0x0844 },
108         { {0, 28570}, {1872, 334950}, {0, 130000}, 125,  0x0804 }
109 };
110
111 static struct nvs_light_dynamic cm32181_nld_tbl[] = {
112         { {0, 5000},   {327,   675000}, {0, 35000}, 800, 0x00C0 },
113         { {0, 10000},  {655,   350000}, {0, 35000}, 400, 0x0080 },
114         { {0, 21000},  {13762, 350000}, {0, 35000}, 200, 0x0040 },
115         { {0, 42000},  {27524, 700000}, {0, 35000}, 100, 0x0000 },
116         { {0, 84000},  {55049, 400000}, {0, 35000}, 50,  0x0200 },
117         { {0, 167000}, {10944, 345000}, {0, 35000}, 25,  0x0300 }
118 };
119
120 struct cm_psm {
121         unsigned int ms;
122         struct nvs_float milliamp;
123 };
124
125 static struct cm_psm cm_psm_tbl[] = {
126         { 500,  {0, 21000} },
127         { 1000, {0, 15000} },
128         { 2000, {0, 10000} },
129         { 4000, {0, 6000} }
130 };
131
132 struct cm_state {
133         struct i2c_client *i2c;
134         struct i2c_client *ara;
135         struct nvs_fn_if *nvs;
136         struct sensor_cfg cfg;
137         struct delayed_work dw;
138         struct regulator_bulk_data vreg[ARRAY_SIZE(cm_vregs)];
139         struct nvs_light light;
140         struct nvs_light_dynamic nld_tbl[ARRAY_SIZE(cm32181_nld_tbl)];
141         unsigned int sts;               /* debug flags */
142         unsigned int errs;              /* error count */
143         unsigned int enabled;           /* enable status */
144         int gpio_irq;                   /* interrupt GPIO */
145         u16 i2c_addr;                   /* I2C address */
146         u8 dev_id;                      /* device ID */
147         u16 als_cfg_mask;               /* ALS register 0 user mask */
148         u16 als_cfg;                    /* ALS register 0 user settings */
149         u16 als_psm;                    /* ALS Power Save Mode */
150         u32 r_set;                      /* Rset resistor value */
151         u16 rc[CM_REG_N];               /* register cache for reg dump */
152 };
153
154
155 static void cm_err(struct cm_state *st)
156 {
157         st->errs++;
158         if (!st->errs)
159                 st->errs--;
160 }
161
162 /* CM3218 & CM32180 don't respond to I2C until the IRQ is ACK'd with the ARA.
163  * The problem is that ARA may be needed regardless of whether the IRQ is
164  * enabled or not so we test the IRQ GPIO before each I2C transaction as a WAR.
165  */
166 static int cm_irq_ack(struct cm_state *st, bool force)
167 {
168         int gpio_sts;
169         int ret = 0;
170
171         if (st->ara && st->gpio_irq >= 0) {
172                 if (!force)
173                         gpio_sts = gpio_get_value(st->gpio_irq);
174                 else
175                         gpio_sts = false;
176                 if (!gpio_sts)
177                         ret = i2c_smbus_read_byte(st->ara);
178                 if (st->sts & NVS_STS_SPEW_IRQ)
179                         dev_info(&st->i2c->dev, "%s GPIO ARA %d=%d ret=%d\n",
180                                  __func__, st->gpio_irq, gpio_sts, ret);
181         }
182         /* ret < 0: error
183          * ret = 0: no action
184          * ret > 0: ACK
185          */
186         return ret;
187 }
188
189 static int cm_i2c_rd(struct cm_state *st, u8 reg, u16 *val)
190 {
191         struct i2c_msg msg[2];
192         int ret;
193
194         cm_irq_ack(st, false);
195         msg[0].addr = st->i2c_addr;
196         msg[0].flags = 0;
197         msg[0].len = 1;
198         msg[0].buf = &reg;
199         msg[1].addr = st->i2c_addr;
200         msg[1].flags = I2C_M_RD;
201         msg[1].len = 2;
202         msg[1].buf = (__u8 *)val;
203         ret = i2c_transfer(st->i2c->adapter, msg, 2);
204         if (ret != 2 && st->ara) {
205                 cm_irq_ack(st, true);
206                 ret = i2c_transfer(st->i2c->adapter, msg, 2);
207         }
208         if (ret == 2) {
209                 *val = le16_to_cpup(val);
210                 ret = 0;
211         } else {
212                 cm_err(st);
213                 ret = -EIO;
214         }
215         if (st->sts & NVS_STS_SPEW_MSG)
216                 dev_info(&st->i2c->dev, "%s reg=%hhx val=%hx err=%d\n",
217                          __func__, reg, *val, ret);
218         return ret;
219 }
220
221 static int cm_i2c_wr(struct cm_state *st, u8 reg, u16 val)
222 {
223         struct i2c_msg msg;
224         u8 buf[3];
225         int ret = 0;
226
227         if (st->i2c_addr) {
228                 cm_irq_ack(st, false);
229                 buf[0] = reg;
230                 val = cpu_to_le16(val);
231                 buf[1] = val & 0xFF;
232                 buf[2] = val >> 8;
233                 msg.addr = st->i2c_addr;
234                 msg.flags = 0;
235                 msg.len = sizeof(buf);
236                 msg.buf = buf;
237                 ret = i2c_transfer(st->i2c->adapter, &msg, 1);
238                 if (ret != 1 && st->ara) {
239                         cm_irq_ack(st, true);
240                         ret = i2c_transfer(st->i2c->adapter, &msg, 1);
241                 }
242                 if (ret == 1) {
243                         st->rc[reg] = val;
244                         ret = 0;
245                 } else {
246                         cm_err(st);
247                         ret = -EIO;
248                 }
249                 if (st->sts & NVS_STS_SPEW_MSG)
250                         dev_info(&st->i2c->dev, "%s reg=%hhx val=%hx err=%d\n",
251                                  __func__, reg, val, ret);
252         }
253         return ret;
254 }
255
256 static int cm_pm(struct cm_state *st, bool enable)
257 {
258         int ret;
259
260         if (enable) {
261                 ret = nvs_vregs_enable(&st->i2c->dev, st->vreg,
262                                        ARRAY_SIZE(cm_vregs));
263                 if (ret)
264                         mdelay(CM_HW_DELAY_MS);
265                 if (st->dev_id == CM_DEVID_CM32181)
266                         cm_i2c_wr(st, CM_REG_PSM, st->als_psm);
267         } else {
268                 ret = nvs_vregs_sts(st->vreg, ARRAY_SIZE(cm_vregs));
269                 if ((ret < 0) || (ret == ARRAY_SIZE(cm_vregs))) {
270                         ret = cm_i2c_wr(st, CM_REG_CFG, st->rc[CM_REG_CFG] |
271                                         1 << CM_REG_CFG_ALS_SD);
272                 } else if (ret > 0) {
273                         nvs_vregs_enable(&st->i2c->dev, st->vreg,
274                                          ARRAY_SIZE(cm_vregs));
275                         mdelay(CM_HW_DELAY_MS);
276                         ret = cm_i2c_wr(st, CM_REG_CFG, st->rc[CM_REG_CFG] |
277                                         1 << CM_REG_CFG_ALS_SD);
278                 }
279                 ret |= nvs_vregs_disable(&st->i2c->dev, st->vreg,
280                                          ARRAY_SIZE(cm_vregs));
281         }
282         if (ret > 0)
283                 ret = 0;
284         if (ret) {
285                 dev_err(&st->i2c->dev, "%s pwr=%x ERR=%d\n",
286                         __func__, enable, ret);
287         } else {
288                 if (st->sts & NVS_STS_SPEW_MSG)
289                         dev_info(&st->i2c->dev, "%s pwr=%x\n",
290                                  __func__, enable);
291         }
292         return ret;
293 }
294
295 static void cm_pm_exit(struct cm_state *st)
296 {
297         cm_pm(st, false);
298         nvs_vregs_exit(&st->i2c->dev, st->vreg, ARRAY_SIZE(cm_vregs));
299 }
300
301 static int cm_pm_init(struct cm_state *st)
302 {
303         int ret;
304
305         st->enabled = 0;
306         nvs_vregs_init(&st->i2c->dev,
307                        st->vreg, ARRAY_SIZE(cm_vregs), cm_vregs);
308         ret = cm_pm(st, true);
309         return ret;
310 }
311
312 static int cm_cmd_wr(struct cm_state *st, bool irq_en)
313 {
314         u16 als_cfg;
315         int ret = 0;
316
317         als_cfg = st->als_cfg;
318         als_cfg |= st->nld_tbl[st->light.nld_i].driver_data;
319         cm_i2c_wr(st, CM_REG_CFG, als_cfg); /* disable IRQ */
320         if (irq_en && st->i2c->irq) {
321                 ret = cm_i2c_wr(st, CM_REG_WL, st->light.hw_thresh_lo);
322                 ret |= cm_i2c_wr(st, CM_REG_WH, st->light.hw_thresh_hi);
323                 if (!ret) {
324                         als_cfg |= (1 << CM_REG_CFG_ALS_INT_EN);
325                         ret = cm_i2c_wr(st, CM_REG_CFG, als_cfg);
326                         if (!ret)
327                                 ret = RET_HW_UPDATE; /* flag IRQ enabled */
328                 }
329         }
330         return ret;
331 }
332
333 static int cm_rd(struct cm_state *st)
334 {
335         u16 hw;
336         s64 ts;
337         int ret = 0;
338
339         /* spec is vague so one of these should clear the IRQ for CM32181 */
340         if (st->dev_id == CM_DEVID_CM32181)
341                 ret = cm_i2c_rd(st, CM_REG_ALS_IF, &hw);
342         ret |= cm_i2c_rd(st, CM_REG_ALS, &hw);
343         if (ret)
344                 return ret;
345
346         ts = nvs_timestamp();
347         if (st->sts & NVS_STS_SPEW_DATA)
348                 dev_info(&st->i2c->dev,
349                          "poll light hw %hu %lld  diff=%d %lldns  index=%u\n",
350                          hw, ts, hw - st->light.hw, ts - st->light.timestamp,
351                          st->light.nld_i);
352         st->light.hw = hw;
353         st->light.timestamp = ts;
354         ret = nvs_light_read(&st->light);
355         switch (ret) {
356         case RET_POLL_NEXT:
357                 if (st->light.nld_i_change)
358                         ret = cm_cmd_wr(st, false);
359                 break;
360
361         case RET_NO_CHANGE:
362                 if (st->i2c->irq)
363                         ret = RET_HW_UPDATE;
364                 break;
365
366         case RET_HW_UPDATE:
367                 ret = cm_cmd_wr(st, true);
368                 break;
369
370         default:
371                 break;
372         }
373
374         return ret;
375 }
376
377 static void cm_read(struct cm_state *st)
378 {
379         int ret;
380
381         st->nvs->nvs_mutex_lock(st->light.nvs_st);
382         if (st->enabled) {
383                 ret = cm_rd(st);
384                 if (ret < RET_HW_UPDATE) {
385                         schedule_delayed_work(&st->dw,
386                                     msecs_to_jiffies(st->light.poll_delay_ms));
387                         if (st->sts & NVS_STS_SPEW_MSG)
388                                 dev_info(&st->i2c->dev, "%s poll delay=%ums\n",
389                                          __func__, st->light.poll_delay_ms);
390                 }
391         }
392         st->nvs->nvs_mutex_unlock(st->light.nvs_st);
393 }
394
395 static void cm_work(struct work_struct *ws)
396 {
397         struct cm_state *st = container_of((struct delayed_work *)ws,
398                                            struct cm_state, dw);
399
400         cm_read(st);
401 }
402
403 static irqreturn_t cm_irq_thread(int irq, void *dev_id)
404 {
405         struct cm_state *st = (struct cm_state *)dev_id;
406
407         if (st->sts & NVS_STS_SPEW_IRQ)
408                 dev_info(&st->i2c->dev, "%s\n", __func__);
409         cm_read(st);
410         return IRQ_HANDLED;
411 }
412
413 static int cm_disable(struct cm_state *st)
414 {
415         int ret;
416
417         cancel_delayed_work(&st->dw);
418         ret = cm_pm(st, false);
419         if (!ret)
420                 st->enabled = 0;
421         return ret;
422 }
423
424 static int cm_enable(void *client, int snsr_id, int enable)
425 {
426         struct cm_state *st = (struct cm_state *)client;
427         unsigned int ms;
428         int ret;
429
430         if (enable < 0)
431                 return st->enabled;
432
433         if (enable) {
434                 ret = cm_pm(st, true);
435                 if (!ret) {
436                         nvs_light_enable(&st->light);
437                         ret = cm_cmd_wr(st, false);
438                         if (ret) {
439                                 cm_disable(st);
440                         } else {
441                                 st->enabled = enable;
442                                 ms = st->light.poll_delay_ms;
443                                 schedule_delayed_work(&st->dw,
444                                                       msecs_to_jiffies(ms));
445                         }
446                 }
447         } else {
448                 ret = cm_disable(st);
449         }
450         return ret;
451 }
452
453 static int cm_batch(void *client, int snsr_id, int flags,
454                     unsigned int period, unsigned int timeout)
455 {
456         struct cm_state *st = (struct cm_state *)client;
457
458         if (timeout)
459                 /* timeout not supported (no HW FIFO) */
460                 return -EINVAL;
461
462         st->light.delay_us = period;
463         return 0;
464 }
465
466 static int cm_thresh_lo(void *client, int snsr_id, int thresh_lo)
467 {
468         struct cm_state *st = (struct cm_state *)client;
469
470         nvs_light_threshold_calibrate_lo(&st->light, thresh_lo);
471         return 0;
472 }
473
474 static int cm_thresh_hi(void *client, int snsr_id, int thresh_hi)
475 {
476         struct cm_state *st = (struct cm_state *)client;
477
478         nvs_light_threshold_calibrate_hi(&st->light, thresh_hi);
479         return 0;
480 }
481
482 static int cm_regs(void *client, int snsr_id, char *buf)
483 {
484         struct cm_state *st = (struct cm_state *)client;
485         ssize_t t;
486         u16 val;
487         u8 i;
488         u8 n;
489         int ret;
490
491         if (st->dev_id == CM_DEVID_CM32181)
492                 n = CM_REG_ALS_IF;
493         else
494                 n = CM_REG_ALS;
495         t = sprintf(buf, "registers:\n");
496         for (i = 0; i < CM_REG_ALS; i++)
497                 t += sprintf(buf + t, "%#2x=%#4x\n", i, st->rc[i]);
498         for (; i <= n; i++) {
499                 ret = cm_i2c_rd(st, i, &val);
500                 if (ret)
501                         t += sprintf(buf + t, "%#2x=ERR: %d\n", i, ret);
502                 else
503                         t += sprintf(buf + t, "%#2x=%#4x\n", i, val);
504         }
505         return t;
506 }
507
508 static int cm_nvs_write(void *client, int snsr_id, unsigned int nvs)
509 {
510         struct cm_state *st = (struct cm_state *)client;
511         u16 val;
512         u8 reg;
513         int ret;
514
515         switch (nvs & 0xFF) {
516         case CM_DBG_STS:
517                 return 0;
518
519         case CM_DBG_CFG:
520                 st->als_cfg = (nvs >> 8) & st->als_cfg_mask;
521                 dev_info(&st->i2c->dev, "%s als_cfg=%hx\n",
522                          __func__, st->als_cfg);
523                 return 0;
524
525         case CM_DBG_PSM:
526                 if (st->dev_id == CM_DEVID_CM32181) {
527                         st->als_psm = (nvs >> 8) & CM_REG_PSM_MASK;
528                         dev_info(&st->i2c->dev,
529                                  "%s als_psm=%hx (applied when enabled)\n",
530                                  __func__, st->als_psm);
531                 } else {
532                         dev_info(&st->i2c->dev, "%s N/A\n", __func__);
533                 }
534                 return 0;
535
536         case CM_DBG_REG:
537                 reg = (nvs >> 24) & 0xFF;
538                 val = (nvs >> 8) & 0xFFFF;
539                 st->nvs->nvs_mutex_lock(st->light.nvs_st);
540                 ret = cm_i2c_wr(st, reg, val);
541                 st->nvs->nvs_mutex_unlock(st->light.nvs_st);
542                 dev_info(&st->i2c->dev, "%s %hx=>%hhx  err=%d\n",
543                          __func__, val, reg, ret);
544                 return ret;
545
546         case CM_DBG_ARA:
547                 if (st->ara) {
548                         st->nvs->nvs_mutex_lock(st->light.nvs_st);
549                         ret = i2c_smbus_read_byte(st->ara);
550                         st->nvs->nvs_mutex_unlock(st->light.nvs_st);
551                         dev_info(&st->i2c->dev, "%s ARA=%d\n", __func__, ret);
552                 } else {
553                         dev_info(&st->i2c->dev, "%s N/A\n", __func__);
554                 }
555                 return 0;
556
557         case CM_DBG_RD:
558                 cm_read(st);
559                 dev_info(&st->i2c->dev, "%s cm_read done\n", __func__);
560                 return 0;
561
562         default:
563                 ret = -EINVAL;
564                 break;
565         }
566
567         return ret;
568 }
569
570 static int cm_nvs_read(void *client, int snsr_id, char *buf)
571 {
572         struct cm_state *st = (struct cm_state *)client;
573         ssize_t t;
574         int ret;
575
576         t = sprintf(buf, "driver v. %u\n", CM_DRIVER_VERSION);
577         if (st->ara && st->gpio_irq >= 0) {
578                 ret = gpio_get_value(st->gpio_irq);
579                 t += sprintf(buf + t, "gpio_irq %d=%d\n", st->gpio_irq, ret);
580         }
581         t += sprintf(buf + t, "irq=%d\n", st->i2c->irq);
582         t += sprintf(buf + t, "als_cfg=%hx\n", st->als_cfg);
583         if (st->dev_id == CM_DEVID_CM32181)
584                 t += sprintf(buf + t, "als_psm=%hx\n", st->als_psm);
585         return t;
586 }
587
588 static struct nvs_fn_dev cm_fn_dev = {
589         .enable                         = cm_enable,
590         .batch                          = cm_batch,
591         .thresh_lo                      = cm_thresh_lo,
592         .thresh_hi                      = cm_thresh_hi,
593         .regs                           = cm_regs,
594         .nvs_write                      = cm_nvs_write,
595         .nvs_read                       = cm_nvs_read,
596 };
597
598 static int cm_suspend(struct device *dev)
599 {
600         struct i2c_client *client = to_i2c_client(dev);
601         struct cm_state *st = i2c_get_clientdata(client);
602         int ret = 0;
603
604         if (st->nvs && st->light.nvs_st)
605                 ret = st->nvs->suspend(st->light.nvs_st);
606         if (st->sts & NVS_STS_SPEW_MSG)
607                 dev_info(&client->dev, "%s\n", __func__);
608         return ret;
609 }
610
611 static int cm_resume(struct device *dev)
612 {
613         struct i2c_client *client = to_i2c_client(dev);
614         struct cm_state *st = i2c_get_clientdata(client);
615         int ret = 0;
616
617         if (st->nvs && st->light.nvs_st)
618                 ret = st->nvs->resume(st->light.nvs_st);
619         if (st->sts & NVS_STS_SPEW_MSG)
620                 dev_info(&client->dev, "%s\n", __func__);
621         return ret;
622 }
623
624 static SIMPLE_DEV_PM_OPS(cm_pm_ops, cm_suspend, cm_resume);
625
626 static void cm_shutdown(struct i2c_client *client)
627 {
628         struct cm_state *st = i2c_get_clientdata(client);
629
630         if (st->nvs && st->light.nvs_st)
631                 st->nvs->shutdown(st->light.nvs_st);
632         if (st->sts & NVS_STS_SPEW_MSG)
633                 dev_info(&client->dev, "%s\n", __func__);
634 }
635
636 static int cm_remove(struct i2c_client *client)
637 {
638         struct cm_state *st = i2c_get_clientdata(client);
639
640         if (st != NULL) {
641                 cm_shutdown(client);
642                 if (st->nvs && st->light.nvs_st)
643                         st->nvs->remove(st->light.nvs_st);
644                 if (st->dw.wq)
645                         destroy_workqueue(st->dw.wq);
646                 cm_pm_exit(st);
647                 if (st->ara)
648                         i2c_unregister_device(st->ara);
649         }
650         dev_info(&client->dev, "%s\n", __func__);
651         return 0;
652 }
653
654 static int cm_id_dev(struct cm_state *st, const char *name)
655 {
656         u16 val = 0;
657         bool ara = false;
658         unsigned int i;
659         unsigned int j;
660         int ret = 1;
661
662         if (!strcmp(name, CM_NAME_CM3218))
663                 st->dev_id = CM_DEVID_CM3218;
664         else if (!strcmp(name, CM_NAME_CM32180))
665                 st->dev_id = CM_DEVID_CM32180;
666         else if (!strcmp(name, CM_NAME_CM32181))
667                 st->dev_id = CM_DEVID_CM32181;
668         if (!st->dev_id) {
669                 ret = cm_i2c_rd(st, CM_REG_CFG, &val);
670                 if (ret) {
671                         return ret;
672                 } else {
673                         if (val & (1 << CM_REG_CFG_RSRV_ID)) {
674                                 if (st->i2c_addr == 0x10)
675                                         st->dev_id = CM_DEVID_CM3218;
676                                 else
677                                         /* st->i2c_addr == 0x48 */
678                                         st->dev_id = CM_DEVID_CM32180;
679                         } else {
680                                 st->dev_id = CM_DEVID_CM32181;
681                         }
682                 }
683         }
684         switch (st->dev_id) {
685         case CM_DEVID_CM3218:
686                 st->cfg.part = CM_NAME_CM3218;
687                 st->als_cfg_mask = CM_REG_CFG_USER_MSK_CM3218;
688                 memcpy(&st->nld_tbl, &cm3218_nld_tbl, sizeof(cm3218_nld_tbl));
689                 i = ARRAY_SIZE(cm3218_nld_tbl) - 1;
690                 if (st->light.nld_i_hi > i)
691                         st->light.nld_i_hi = i;
692                 if (st->light.nld_i_lo > i)
693                         st->light.nld_i_lo = i;
694                 ara = true;
695                 break;
696
697         case CM_DEVID_CM32180:
698                 st->cfg.part = CM_NAME_CM32180;
699                 st->als_cfg_mask = CM_REG_CFG_USER_MSK_CM32180;
700                 memcpy(&st->nld_tbl, &cm32180_nld_tbl,
701                        sizeof(cm32180_nld_tbl));
702                 i = ARRAY_SIZE(cm32180_nld_tbl) - 1;
703                 if (st->light.nld_i_hi > i)
704                         st->light.nld_i_hi = i;
705                 if (st->light.nld_i_lo > i)
706                         st->light.nld_i_lo = i;
707                 ara = true;
708                 break;
709
710         case CM_DEVID_CM32181:
711                 st->cfg.part = CM_NAME_CM32181;
712                 st->als_cfg_mask = CM_REG_CFG_USER_MSK_CM32181;
713                 memcpy(&st->nld_tbl, &cm32181_nld_tbl, sizeof(st->nld_tbl));
714                 if (st->als_psm & (1 << CM_REG_PSM_EN)) {
715                         j = st->als_psm >> 1;
716                         for (i = 0; i < ARRAY_SIZE(cm32181_nld_tbl); i++) {
717                                 st->nld_tbl[i].delay_min_ms +=
718                                                               cm_psm_tbl[j].ms;
719                                 st->nld_tbl[i].milliamp.ival =
720                                                    cm_psm_tbl[j].milliamp.ival;
721                                 st->nld_tbl[i].milliamp.fval =
722                                                    cm_psm_tbl[j].milliamp.fval;
723                         }
724                 }
725                 break;
726         }
727
728         st->als_cfg &= st->als_cfg_mask;
729         if (ara) {
730                 st->ara = i2c_new_dummy(st->i2c->adapter, CM_I2C_ARA);
731                 if (!st->ara) {
732                         /* must have ARA control for IRQ acknowledge */
733                         dev_err(&st->i2c->dev,
734                                 "%s ERR: i2c_new_dummy\n",
735                                 __func__);
736                         return -ENODEV;
737                 }
738         } else {
739                 st->ara = NULL;
740         }
741         if (ret != 1)
742                 dev_info(&st->i2c->dev, "%s found %s\n",
743                          __func__, st->cfg.part);
744         i = st->light.nld_i_lo;
745         st->cfg.resolution.ival = st->nld_tbl[i].resolution.ival;
746         st->cfg.resolution.fval = st->nld_tbl[i].resolution.fval;
747         i = st->light.nld_i_hi;
748         st->cfg.max_range.ival = st->nld_tbl[i].max_range.ival;
749         st->cfg.max_range.fval = st->nld_tbl[i].max_range.fval;
750         st->cfg.milliamp.ival = st->nld_tbl[i].milliamp.ival;
751         st->cfg.milliamp.fval = st->nld_tbl[i].milliamp.fval;
752         st->cfg.delay_us_min = st->nld_tbl[i].delay_min_ms * 1000;
753         return 0;
754 }
755
756 static int cm_id_i2c(struct cm_state *st, const char *name)
757 {
758         int i;
759         int ret;
760
761         for (i = 0; i < ARRAY_SIZE(cm_i2c_addrs); i++) {
762                 if (st->i2c->addr == cm_i2c_addrs[i])
763                         break;
764         }
765
766         if (i < ARRAY_SIZE(cm_i2c_addrs)) {
767                 st->i2c_addr = st->i2c->addr;
768                 ret = cm_id_dev(st, name);
769         } else {
770                 name = CM_NAME;
771                 for (i = 0; i < ARRAY_SIZE(cm_i2c_addrs); i++) {
772                         st->i2c_addr = cm_i2c_addrs[i];
773                         ret = cm_id_dev(st, name);
774                         if (!ret)
775                                 break;
776                 }
777         }
778         if (ret)
779                 st->i2c_addr = 0;
780         return ret;
781 }
782
783 static struct sensor_cfg cm_cfg_dflt = {
784         .name                   = NVS_LIGHT_STRING,
785         .ch_n                   = 1,
786         .ch_sz                  = 4,
787         .part                   = CM_NAME,
788         .vendor                 = CM_VENDOR,
789         .version                = CM_LIGHT_VERSION,
790         .delay_us_max           = CM_POLL_DLY_MS_MAX * 1000,
791         .flags                  = SENSOR_FLAG_ON_CHANGE_MODE,
792         .scale                  = {
793                 .ival           = CM_LIGHT_SCALE_IVAL,
794                 .fval           = CM_LIGHT_SCALE_MICRO,
795         },
796         .thresh_lo              = CM_LIGHT_THRESHOLD_LO,
797         .thresh_hi              = CM_LIGHT_THRESHOLD_HI,
798 };
799
800 static int cm_of_dt(struct cm_state *st, struct device_node *dn)
801 {
802         int ret;
803
804         /* default device specific parameters */
805         st->als_cfg = CM_ALS_CFG_DFLT;
806         st->als_psm = CM_ALS_PSM_DFLT;
807         st->r_set = CM_R_SET_DFLT;
808         /* default NVS ALS programmable parameters */
809         memcpy(&st->cfg, &cm_cfg_dflt, sizeof(st->cfg));
810         st->light.cfg = &st->cfg;
811         st->light.hw_mask = 0xFFFF;
812         st->light.nld_tbl = st->nld_tbl;
813         st->gpio_irq = -1;
814         /* device tree parameters */
815         if (dn) {
816                 /* common NVS parameters */
817                 ret = nvs_of_dt(dn, &st->cfg, NULL);
818                 if (ret == -ENODEV)
819                         return -ENODEV;
820
821                 /* device specific parameters */
822                 of_property_read_u16(dn, "als_cfg", &st->als_cfg);
823                 of_property_read_u16(dn, "als_psm", &st->als_psm);
824                 st->als_psm &= CM_REG_PSM_MASK;
825                 of_property_read_u32(dn, "Rset", &st->r_set);
826                 st->gpio_irq = of_get_named_gpio(dn, "gpio_irq", 0);
827         }
828
829         if (st->gpio_irq >= 0) {
830                 if (gpio_is_valid(st->gpio_irq)) {
831                         ret = gpio_request(st->gpio_irq, CM_NAME);
832                         if (ret) {
833                                 dev_err(&st->i2c->dev,
834                                         "%s gpio_request(%d %s) ERR:%d\n",
835                                         __func__, st->gpio_irq, CM_NAME, ret);
836                                 return -EPROBE_DEFER;
837                         } else {
838                                 ret = gpio_direction_input(st->gpio_irq);
839                                 if (ret < 0) {
840                                         dev_err(&st->i2c->dev,
841                                                 "%s gpio_dir_inp(%d) ERR:%d\n",
842                                                 __func__, st->gpio_irq, ret);
843                                         return -ENODEV;
844                                 }
845                         }
846                 } else {
847                         return -EPROBE_DEFER;
848                 }
849         }
850
851         /* this device supports these programmable parameters */
852         if (nvs_light_of_dt(&st->light, dn, NULL)) {
853                 st->light.nld_i_lo = 0;
854                 st->light.nld_i_hi = ARRAY_SIZE(cm32181_nld_tbl) - 1;
855         }
856         return 0;
857 }
858
859 static int cm_probe(struct i2c_client *client,
860                     const struct i2c_device_id *id)
861 {
862         struct cm_state *st;
863         int ret;
864
865         dev_info(&client->dev, "%s\n", __func__);
866         st = devm_kzalloc(&client->dev, sizeof(*st), GFP_KERNEL);
867         if (st == NULL) {
868                 dev_err(&client->dev, "%s devm_kzalloc ERR\n", __func__);
869                 return -ENOMEM;
870         }
871
872         i2c_set_clientdata(client, st);
873         st->i2c = client;
874         ret = cm_of_dt(st, client->dev.of_node);
875         if (ret) {
876                 if (ret == -ENODEV) {
877                         dev_info(&client->dev, "%s DT disabled\n", __func__);
878                 } else {
879                         dev_err(&client->dev, "%s _of_dt ERR\n", __func__);
880                         ret = -ENODEV;
881                 }
882                 goto cm_probe_exit;
883         }
884
885         cm_pm_init(st);
886         ret = cm_id_i2c(st, id->name);
887         if (ret) {
888                 dev_err(&client->dev, "%s _id_i2c ERR\n", __func__);
889                 ret = -ENODEV;
890                 goto cm_probe_exit;
891         }
892
893         cm_pm(st, false);
894         cm_fn_dev.errs = &st->errs;
895         cm_fn_dev.sts = &st->sts;
896         st->nvs = nvs_iio();
897         if (st->nvs == NULL) {
898                 dev_err(&client->dev, "%s nvs_iio ERR\n", __func__);
899                 ret = -ENODEV;
900                 goto cm_probe_exit;
901         }
902
903         st->light.handler = st->nvs->handler;
904         ret = st->nvs->probe(&st->light.nvs_st, st, &client->dev,
905                              &cm_fn_dev, &st->cfg);
906         if (ret) {
907                 dev_err(&client->dev, "%s nvs_probe ERR\n", __func__);
908                 ret = -ENODEV;
909                 goto cm_probe_exit;
910         }
911
912         INIT_DELAYED_WORK(&st->dw, cm_work);
913         if (st->gpio_irq >= 0 && !client->irq)
914                 client->irq = gpio_to_irq(st->gpio_irq);
915         if (client->irq) {
916                 ret = request_threaded_irq(client->irq, NULL, cm_irq_thread,
917                                            IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
918                                            CM_NAME, st);
919                 if (ret) {
920                         dev_err(&client->dev, "%s req_threaded_irq ERR %d\n",
921                                 __func__, ret);
922                         ret = -ENOMEM;
923                         goto cm_probe_exit;
924                 }
925         }
926
927         dev_info(&client->dev, "%s done\n", __func__);
928         return 0;
929
930 cm_probe_exit:
931         cm_remove(client);
932         return ret;
933 }
934
935 static const struct i2c_device_id cm_i2c_device_id[] = {
936         { CM_NAME, 0 },
937         { CM_NAME_CM3218, 0 },
938         { CM_NAME_CM32180, 0 },
939         { CM_NAME_CM32181, 0 },
940         {}
941 };
942
943 MODULE_DEVICE_TABLE(i2c, cm_i2c_device_id);
944
945 static const struct of_device_id cm_of_match[] = {
946         { .compatible = "capella,cm3218x", },
947         { .compatible = "capella,cm3218", },
948         { .compatible = "capella,cm32180", },
949         { .compatible = "capella,cm32181", },
950         {},
951 };
952
953 MODULE_DEVICE_TABLE(of, cm_of_match);
954
955 static struct i2c_driver cm_driver = {
956         .class          = I2C_CLASS_HWMON,
957         .probe          = cm_probe,
958         .remove         = cm_remove,
959         .shutdown       = cm_shutdown,
960         .driver = {
961                 .name           = CM_NAME,
962                 .owner          = THIS_MODULE,
963                 .of_match_table = of_match_ptr(cm_of_match),
964                 .pm             = &cm_pm_ops,
965         },
966         .id_table       = cm_i2c_device_id,
967 };
968 module_i2c_driver(cm_driver);
969
970 MODULE_LICENSE("GPL");
971 MODULE_DESCRIPTION("CM3218x driver");
972 MODULE_AUTHOR("NVIDIA Corporation");