drm: Add GEM ("graphics execution manager") to i915 driver.
[linux-3.10.git] / drivers / gpu / drm / i915 / i915_irq.c
1 /* i915_irq.c -- IRQ support for the I915 -*- linux-c -*-
2  */
3 /*
4  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
5  * All Rights Reserved.
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a
8  * copy of this software and associated documentation files (the
9  * "Software"), to deal in the Software without restriction, including
10  * without limitation the rights to use, copy, modify, merge, publish,
11  * distribute, sub license, and/or sell copies of the Software, and to
12  * permit persons to whom the Software is furnished to do so, subject to
13  * the following conditions:
14  *
15  * The above copyright notice and this permission notice (including the
16  * next paragraph) shall be included in all copies or substantial portions
17  * of the Software.
18  *
19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26  *
27  */
28
29 #include "drmP.h"
30 #include "drm.h"
31 #include "i915_drm.h"
32 #include "i915_drv.h"
33
34 #define MAX_NOPID ((u32)~0)
35
36 /** These are the interrupts used by the driver */
37 #define I915_INTERRUPT_ENABLE_MASK (I915_USER_INTERRUPT |               \
38                                     I915_ASLE_INTERRUPT |               \
39                                     I915_DISPLAY_PIPE_A_EVENT_INTERRUPT | \
40                                     I915_DISPLAY_PIPE_B_EVENT_INTERRUPT)
41
42 void
43 i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask)
44 {
45         if ((dev_priv->irq_mask_reg & mask) != 0) {
46                 dev_priv->irq_mask_reg &= ~mask;
47                 I915_WRITE(IMR, dev_priv->irq_mask_reg);
48                 (void) I915_READ(IMR);
49         }
50 }
51
52 static inline void
53 i915_disable_irq(drm_i915_private_t *dev_priv, u32 mask)
54 {
55         if ((dev_priv->irq_mask_reg & mask) != mask) {
56                 dev_priv->irq_mask_reg |= mask;
57                 I915_WRITE(IMR, dev_priv->irq_mask_reg);
58                 (void) I915_READ(IMR);
59         }
60 }
61
62 /**
63  * i915_get_pipe - return the the pipe associated with a given plane
64  * @dev: DRM device
65  * @plane: plane to look for
66  *
67  * The Intel Mesa & 2D drivers call the vblank routines with a plane number
68  * rather than a pipe number, since they may not always be equal.  This routine
69  * maps the given @plane back to a pipe number.
70  */
71 static int
72 i915_get_pipe(struct drm_device *dev, int plane)
73 {
74         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
75         u32 dspcntr;
76
77         dspcntr = plane ? I915_READ(DSPBCNTR) : I915_READ(DSPACNTR);
78
79         return dspcntr & DISPPLANE_SEL_PIPE_MASK ? 1 : 0;
80 }
81
82 /**
83  * i915_get_plane - return the the plane associated with a given pipe
84  * @dev: DRM device
85  * @pipe: pipe to look for
86  *
87  * The Intel Mesa & 2D drivers call the vblank routines with a plane number
88  * rather than a plane number, since they may not always be equal.  This routine
89  * maps the given @pipe back to a plane number.
90  */
91 static int
92 i915_get_plane(struct drm_device *dev, int pipe)
93 {
94         if (i915_get_pipe(dev, 0) == pipe)
95                 return 0;
96         return 1;
97 }
98
99 /**
100  * i915_pipe_enabled - check if a pipe is enabled
101  * @dev: DRM device
102  * @pipe: pipe to check
103  *
104  * Reading certain registers when the pipe is disabled can hang the chip.
105  * Use this routine to make sure the PLL is running and the pipe is active
106  * before reading such registers if unsure.
107  */
108 static int
109 i915_pipe_enabled(struct drm_device *dev, int pipe)
110 {
111         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
112         unsigned long pipeconf = pipe ? PIPEBCONF : PIPEACONF;
113
114         if (I915_READ(pipeconf) & PIPEACONF_ENABLE)
115                 return 1;
116
117         return 0;
118 }
119
120 /**
121  * Emit blits for scheduled buffer swaps.
122  *
123  * This function will be called with the HW lock held.
124  */
125 static void i915_vblank_tasklet(struct drm_device *dev)
126 {
127         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
128         unsigned long irqflags;
129         struct list_head *list, *tmp, hits, *hit;
130         int nhits, nrects, slice[2], upper[2], lower[2], i;
131         unsigned counter[2];
132         struct drm_drawable_info *drw;
133         drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv;
134         u32 cpp = dev_priv->cpp;
135         u32 cmd = (cpp == 4) ? (XY_SRC_COPY_BLT_CMD |
136                                 XY_SRC_COPY_BLT_WRITE_ALPHA |
137                                 XY_SRC_COPY_BLT_WRITE_RGB)
138                              : XY_SRC_COPY_BLT_CMD;
139         u32 src_pitch = sarea_priv->pitch * cpp;
140         u32 dst_pitch = sarea_priv->pitch * cpp;
141         u32 ropcpp = (0xcc << 16) | ((cpp - 1) << 24);
142         RING_LOCALS;
143
144         if (IS_I965G(dev) && sarea_priv->front_tiled) {
145                 cmd |= XY_SRC_COPY_BLT_DST_TILED;
146                 dst_pitch >>= 2;
147         }
148         if (IS_I965G(dev) && sarea_priv->back_tiled) {
149                 cmd |= XY_SRC_COPY_BLT_SRC_TILED;
150                 src_pitch >>= 2;
151         }
152
153         counter[0] = drm_vblank_count(dev, 0);
154         counter[1] = drm_vblank_count(dev, 1);
155
156         DRM_DEBUG("\n");
157
158         INIT_LIST_HEAD(&hits);
159
160         nhits = nrects = 0;
161
162         spin_lock_irqsave(&dev_priv->swaps_lock, irqflags);
163
164         /* Find buffer swaps scheduled for this vertical blank */
165         list_for_each_safe(list, tmp, &dev_priv->vbl_swaps.head) {
166                 drm_i915_vbl_swap_t *vbl_swap =
167                         list_entry(list, drm_i915_vbl_swap_t, head);
168                 int pipe = i915_get_pipe(dev, vbl_swap->plane);
169
170                 if ((counter[pipe] - vbl_swap->sequence) > (1<<23))
171                         continue;
172
173                 list_del(list);
174                 dev_priv->swaps_pending--;
175                 drm_vblank_put(dev, pipe);
176
177                 spin_unlock(&dev_priv->swaps_lock);
178                 spin_lock(&dev->drw_lock);
179
180                 drw = drm_get_drawable_info(dev, vbl_swap->drw_id);
181
182                 if (!drw) {
183                         spin_unlock(&dev->drw_lock);
184                         drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
185                         spin_lock(&dev_priv->swaps_lock);
186                         continue;
187                 }
188
189                 list_for_each(hit, &hits) {
190                         drm_i915_vbl_swap_t *swap_cmp =
191                                 list_entry(hit, drm_i915_vbl_swap_t, head);
192                         struct drm_drawable_info *drw_cmp =
193                                 drm_get_drawable_info(dev, swap_cmp->drw_id);
194
195                         if (drw_cmp &&
196                             drw_cmp->rects[0].y1 > drw->rects[0].y1) {
197                                 list_add_tail(list, hit);
198                                 break;
199                         }
200                 }
201
202                 spin_unlock(&dev->drw_lock);
203
204                 /* List of hits was empty, or we reached the end of it */
205                 if (hit == &hits)
206                         list_add_tail(list, hits.prev);
207
208                 nhits++;
209
210                 spin_lock(&dev_priv->swaps_lock);
211         }
212
213         if (nhits == 0) {
214                 spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags);
215                 return;
216         }
217
218         spin_unlock(&dev_priv->swaps_lock);
219
220         i915_kernel_lost_context(dev);
221
222         if (IS_I965G(dev)) {
223                 BEGIN_LP_RING(4);
224
225                 OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
226                 OUT_RING(0);
227                 OUT_RING(((sarea_priv->width - 1) & 0xffff) | ((sarea_priv->height - 1) << 16));
228                 OUT_RING(0);
229                 ADVANCE_LP_RING();
230         } else {
231                 BEGIN_LP_RING(6);
232
233                 OUT_RING(GFX_OP_DRAWRECT_INFO);
234                 OUT_RING(0);
235                 OUT_RING(0);
236                 OUT_RING(sarea_priv->width | sarea_priv->height << 16);
237                 OUT_RING(sarea_priv->width | sarea_priv->height << 16);
238                 OUT_RING(0);
239
240                 ADVANCE_LP_RING();
241         }
242
243         sarea_priv->ctxOwner = DRM_KERNEL_CONTEXT;
244
245         upper[0] = upper[1] = 0;
246         slice[0] = max(sarea_priv->pipeA_h / nhits, 1);
247         slice[1] = max(sarea_priv->pipeB_h / nhits, 1);
248         lower[0] = sarea_priv->pipeA_y + slice[0];
249         lower[1] = sarea_priv->pipeB_y + slice[0];
250
251         spin_lock(&dev->drw_lock);
252
253         /* Emit blits for buffer swaps, partitioning both outputs into as many
254          * slices as there are buffer swaps scheduled in order to avoid tearing
255          * (based on the assumption that a single buffer swap would always
256          * complete before scanout starts).
257          */
258         for (i = 0; i++ < nhits;
259              upper[0] = lower[0], lower[0] += slice[0],
260              upper[1] = lower[1], lower[1] += slice[1]) {
261                 if (i == nhits)
262                         lower[0] = lower[1] = sarea_priv->height;
263
264                 list_for_each(hit, &hits) {
265                         drm_i915_vbl_swap_t *swap_hit =
266                                 list_entry(hit, drm_i915_vbl_swap_t, head);
267                         struct drm_clip_rect *rect;
268                         int num_rects, plane;
269                         unsigned short top, bottom;
270
271                         drw = drm_get_drawable_info(dev, swap_hit->drw_id);
272
273                         if (!drw)
274                                 continue;
275
276                         rect = drw->rects;
277                         plane = swap_hit->plane;
278                         top = upper[plane];
279                         bottom = lower[plane];
280
281                         for (num_rects = drw->num_rects; num_rects--; rect++) {
282                                 int y1 = max(rect->y1, top);
283                                 int y2 = min(rect->y2, bottom);
284
285                                 if (y1 >= y2)
286                                         continue;
287
288                                 BEGIN_LP_RING(8);
289
290                                 OUT_RING(cmd);
291                                 OUT_RING(ropcpp | dst_pitch);
292                                 OUT_RING((y1 << 16) | rect->x1);
293                                 OUT_RING((y2 << 16) | rect->x2);
294                                 OUT_RING(sarea_priv->front_offset);
295                                 OUT_RING((y1 << 16) | rect->x1);
296                                 OUT_RING(src_pitch);
297                                 OUT_RING(sarea_priv->back_offset);
298
299                                 ADVANCE_LP_RING();
300                         }
301                 }
302         }
303
304         spin_unlock_irqrestore(&dev->drw_lock, irqflags);
305
306         list_for_each_safe(hit, tmp, &hits) {
307                 drm_i915_vbl_swap_t *swap_hit =
308                         list_entry(hit, drm_i915_vbl_swap_t, head);
309
310                 list_del(hit);
311
312                 drm_free(swap_hit, sizeof(*swap_hit), DRM_MEM_DRIVER);
313         }
314 }
315
316 u32 i915_get_vblank_counter(struct drm_device *dev, int plane)
317 {
318         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
319         unsigned long high_frame;
320         unsigned long low_frame;
321         u32 high1, high2, low, count;
322         int pipe;
323
324         pipe = i915_get_pipe(dev, plane);
325         high_frame = pipe ? PIPEBFRAMEHIGH : PIPEAFRAMEHIGH;
326         low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL;
327
328         if (!i915_pipe_enabled(dev, pipe)) {
329                 DRM_ERROR("trying to get vblank count for disabled pipe %d\n", pipe);
330                 return 0;
331         }
332
333         /*
334          * High & low register fields aren't synchronized, so make sure
335          * we get a low value that's stable across two reads of the high
336          * register.
337          */
338         do {
339                 high1 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
340                          PIPE_FRAME_HIGH_SHIFT);
341                 low =  ((I915_READ(low_frame) & PIPE_FRAME_LOW_MASK) >>
342                         PIPE_FRAME_LOW_SHIFT);
343                 high2 = ((I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK) >>
344                          PIPE_FRAME_HIGH_SHIFT);
345         } while (high1 != high2);
346
347         count = (high1 << 8) | low;
348
349         return count;
350 }
351
352 irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
353 {
354         struct drm_device *dev = (struct drm_device *) arg;
355         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
356         u32 iir;
357         u32 pipea_stats, pipeb_stats;
358         int vblank = 0;
359
360         if (dev->pdev->msi_enabled)
361                 I915_WRITE(IMR, ~0);
362         iir = I915_READ(IIR);
363
364         if (iir == 0) {
365                 if (dev->pdev->msi_enabled) {
366                         I915_WRITE(IMR, dev_priv->irq_mask_reg);
367                         (void) I915_READ(IMR);
368                 }
369                 return IRQ_NONE;
370         }
371
372         /*
373          * Clear the PIPE(A|B)STAT regs before the IIR otherwise
374          * we may get extra interrupts.
375          */
376         if (iir & I915_DISPLAY_PIPE_A_EVENT_INTERRUPT) {
377                 pipea_stats = I915_READ(PIPEASTAT);
378                 if (!(dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_A))
379                         pipea_stats &= ~(PIPE_START_VBLANK_INTERRUPT_ENABLE |
380                                          PIPE_VBLANK_INTERRUPT_ENABLE);
381                 else if (pipea_stats & (PIPE_START_VBLANK_INTERRUPT_STATUS|
382                                         PIPE_VBLANK_INTERRUPT_STATUS)) {
383                         vblank++;
384                         drm_handle_vblank(dev, i915_get_plane(dev, 0));
385                 }
386
387                 I915_WRITE(PIPEASTAT, pipea_stats);
388         }
389         if (iir & I915_DISPLAY_PIPE_B_EVENT_INTERRUPT) {
390                 pipeb_stats = I915_READ(PIPEBSTAT);
391                 /* Ack the event */
392                 I915_WRITE(PIPEBSTAT, pipeb_stats);
393
394                 /* The vblank interrupt gets enabled even if we didn't ask for
395                    it, so make sure it's shut down again */
396                 if (!(dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B))
397                         pipeb_stats &= ~(PIPE_START_VBLANK_INTERRUPT_ENABLE |
398                                          PIPE_VBLANK_INTERRUPT_ENABLE);
399                 else if (pipeb_stats & (PIPE_START_VBLANK_INTERRUPT_STATUS|
400                                         PIPE_VBLANK_INTERRUPT_STATUS)) {
401                         vblank++;
402                         drm_handle_vblank(dev, i915_get_plane(dev, 1));
403                 }
404
405                 if (pipeb_stats & I915_LEGACY_BLC_EVENT_STATUS)
406                         opregion_asle_intr(dev);
407                 I915_WRITE(PIPEBSTAT, pipeb_stats);
408         }
409
410         I915_WRITE(IIR, iir);
411         if (dev->pdev->msi_enabled)
412                 I915_WRITE(IMR, dev_priv->irq_mask_reg);
413         (void) I915_READ(IIR); /* Flush posted writes */
414
415         dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
416
417         if (iir & I915_USER_INTERRUPT) {
418                 dev_priv->mm.irq_gem_seqno = i915_get_gem_seqno(dev);
419                 DRM_WAKEUP(&dev_priv->irq_queue);
420         }
421
422         if (iir & I915_ASLE_INTERRUPT)
423                 opregion_asle_intr(dev);
424
425         if (vblank && dev_priv->swaps_pending > 0)
426                 drm_locked_tasklet(dev, i915_vblank_tasklet);
427
428         return IRQ_HANDLED;
429 }
430
431 static int i915_emit_irq(struct drm_device * dev)
432 {
433         drm_i915_private_t *dev_priv = dev->dev_private;
434         RING_LOCALS;
435
436         i915_kernel_lost_context(dev);
437
438         DRM_DEBUG("\n");
439
440         dev_priv->sarea_priv->last_enqueue = ++dev_priv->counter;
441
442         if (dev_priv->counter > 0x7FFFFFFFUL)
443                 dev_priv->sarea_priv->last_enqueue = dev_priv->counter = 1;
444
445         BEGIN_LP_RING(6);
446         OUT_RING(MI_STORE_DWORD_INDEX);
447         OUT_RING(5 << MI_STORE_DWORD_INDEX_SHIFT);
448         OUT_RING(dev_priv->counter);
449         OUT_RING(0);
450         OUT_RING(0);
451         OUT_RING(MI_USER_INTERRUPT);
452         ADVANCE_LP_RING();
453
454         return dev_priv->counter;
455 }
456
457 void i915_user_irq_get(struct drm_device *dev)
458 {
459         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
460
461         spin_lock(&dev_priv->user_irq_lock);
462         if (dev->irq_enabled && (++dev_priv->user_irq_refcount == 1))
463                 i915_enable_irq(dev_priv, I915_USER_INTERRUPT);
464         spin_unlock(&dev_priv->user_irq_lock);
465 }
466
467 void i915_user_irq_put(struct drm_device *dev)
468 {
469         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
470
471         spin_lock(&dev_priv->user_irq_lock);
472         BUG_ON(dev->irq_enabled && dev_priv->user_irq_refcount <= 0);
473         if (dev->irq_enabled && (--dev_priv->user_irq_refcount == 0))
474                 i915_disable_irq(dev_priv, I915_USER_INTERRUPT);
475         spin_unlock(&dev_priv->user_irq_lock);
476 }
477
478 static int i915_wait_irq(struct drm_device * dev, int irq_nr)
479 {
480         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
481         int ret = 0;
482
483         DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr,
484                   READ_BREADCRUMB(dev_priv));
485
486         if (READ_BREADCRUMB(dev_priv) >= irq_nr) {
487                 dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
488                 return 0;
489         }
490
491         dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
492
493         i915_user_irq_get(dev);
494         DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
495                     READ_BREADCRUMB(dev_priv) >= irq_nr);
496         i915_user_irq_put(dev);
497
498         if (ret == -EBUSY) {
499                 DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
500                           READ_BREADCRUMB(dev_priv), (int)dev_priv->counter);
501         }
502
503         dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
504
505         return ret;
506 }
507
508 /* Needs the lock as it touches the ring.
509  */
510 int i915_irq_emit(struct drm_device *dev, void *data,
511                          struct drm_file *file_priv)
512 {
513         drm_i915_private_t *dev_priv = dev->dev_private;
514         drm_i915_irq_emit_t *emit = data;
515         int result;
516
517         LOCK_TEST_WITH_RETURN(dev, file_priv);
518
519         if (!dev_priv) {
520                 DRM_ERROR("called with no initialization\n");
521                 return -EINVAL;
522         }
523
524         result = i915_emit_irq(dev);
525
526         if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
527                 DRM_ERROR("copy_to_user\n");
528                 return -EFAULT;
529         }
530
531         return 0;
532 }
533
534 /* Doesn't need the hardware lock.
535  */
536 int i915_irq_wait(struct drm_device *dev, void *data,
537                          struct drm_file *file_priv)
538 {
539         drm_i915_private_t *dev_priv = dev->dev_private;
540         drm_i915_irq_wait_t *irqwait = data;
541
542         if (!dev_priv) {
543                 DRM_ERROR("called with no initialization\n");
544                 return -EINVAL;
545         }
546
547         return i915_wait_irq(dev, irqwait->irq_seq);
548 }
549
550 int i915_enable_vblank(struct drm_device *dev, int plane)
551 {
552         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
553         int pipe = i915_get_pipe(dev, plane);
554         u32     pipestat_reg = 0;
555         u32     pipestat;
556
557         switch (pipe) {
558         case 0:
559                 pipestat_reg = PIPEASTAT;
560                 i915_enable_irq(dev_priv, I915_DISPLAY_PIPE_A_EVENT_INTERRUPT);
561                 break;
562         case 1:
563                 pipestat_reg = PIPEBSTAT;
564                 i915_enable_irq(dev_priv, I915_DISPLAY_PIPE_B_EVENT_INTERRUPT);
565                 break;
566         default:
567                 DRM_ERROR("tried to enable vblank on non-existent pipe %d\n",
568                           pipe);
569                 break;
570         }
571
572         if (pipestat_reg) {
573                 pipestat = I915_READ(pipestat_reg);
574                 if (IS_I965G(dev))
575                         pipestat |= PIPE_START_VBLANK_INTERRUPT_ENABLE;
576                 else
577                         pipestat |= PIPE_VBLANK_INTERRUPT_ENABLE;
578                 /* Clear any stale interrupt status */
579                 pipestat |= (PIPE_START_VBLANK_INTERRUPT_STATUS |
580                              PIPE_VBLANK_INTERRUPT_STATUS);
581                 I915_WRITE(pipestat_reg, pipestat);
582         }
583
584         return 0;
585 }
586
587 void i915_disable_vblank(struct drm_device *dev, int plane)
588 {
589         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
590         int pipe = i915_get_pipe(dev, plane);
591         u32     pipestat_reg = 0;
592         u32     pipestat;
593
594         switch (pipe) {
595         case 0:
596                 pipestat_reg = PIPEASTAT;
597                 i915_disable_irq(dev_priv, I915_DISPLAY_PIPE_A_EVENT_INTERRUPT);
598                 break;
599         case 1:
600                 pipestat_reg = PIPEBSTAT;
601                 i915_disable_irq(dev_priv, I915_DISPLAY_PIPE_B_EVENT_INTERRUPT);
602                 break;
603         default:
604                 DRM_ERROR("tried to disable vblank on non-existent pipe %d\n",
605                           pipe);
606                 break;
607         }
608
609         if (pipestat_reg) {
610                 pipestat = I915_READ(pipestat_reg);
611                 pipestat &= ~(PIPE_START_VBLANK_INTERRUPT_ENABLE |
612                               PIPE_VBLANK_INTERRUPT_ENABLE);
613                 /* Clear any stale interrupt status */
614                 pipestat |= (PIPE_START_VBLANK_INTERRUPT_STATUS |
615                              PIPE_VBLANK_INTERRUPT_STATUS);
616                 I915_WRITE(pipestat_reg, pipestat);
617         }
618 }
619
620 /* Set the vblank monitor pipe
621  */
622 int i915_vblank_pipe_set(struct drm_device *dev, void *data,
623                          struct drm_file *file_priv)
624 {
625         drm_i915_private_t *dev_priv = dev->dev_private;
626
627         if (!dev_priv) {
628                 DRM_ERROR("called with no initialization\n");
629                 return -EINVAL;
630         }
631
632         return 0;
633 }
634
635 int i915_vblank_pipe_get(struct drm_device *dev, void *data,
636                          struct drm_file *file_priv)
637 {
638         drm_i915_private_t *dev_priv = dev->dev_private;
639         drm_i915_vblank_pipe_t *pipe = data;
640
641         if (!dev_priv) {
642                 DRM_ERROR("called with no initialization\n");
643                 return -EINVAL;
644         }
645
646         pipe->pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
647
648         return 0;
649 }
650
651 /**
652  * Schedule buffer swap at given vertical blank.
653  */
654 int i915_vblank_swap(struct drm_device *dev, void *data,
655                      struct drm_file *file_priv)
656 {
657         drm_i915_private_t *dev_priv = dev->dev_private;
658         drm_i915_vblank_swap_t *swap = data;
659         drm_i915_vbl_swap_t *vbl_swap;
660         unsigned int pipe, seqtype, curseq, plane;
661         unsigned long irqflags;
662         struct list_head *list;
663         int ret;
664
665         if (!dev_priv) {
666                 DRM_ERROR("%s called with no initialization\n", __func__);
667                 return -EINVAL;
668         }
669
670         if (dev_priv->sarea_priv->rotation) {
671                 DRM_DEBUG("Rotation not supported\n");
672                 return -EINVAL;
673         }
674
675         if (swap->seqtype & ~(_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE |
676                              _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS)) {
677                 DRM_ERROR("Invalid sequence type 0x%x\n", swap->seqtype);
678                 return -EINVAL;
679         }
680
681         plane = (swap->seqtype & _DRM_VBLANK_SECONDARY) ? 1 : 0;
682         pipe = i915_get_pipe(dev, plane);
683
684         seqtype = swap->seqtype & (_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE);
685
686         if (!(dev_priv->vblank_pipe & (1 << pipe))) {
687                 DRM_ERROR("Invalid pipe %d\n", pipe);
688                 return -EINVAL;
689         }
690
691         spin_lock_irqsave(&dev->drw_lock, irqflags);
692
693         if (!drm_get_drawable_info(dev, swap->drawable)) {
694                 spin_unlock_irqrestore(&dev->drw_lock, irqflags);
695                 DRM_DEBUG("Invalid drawable ID %d\n", swap->drawable);
696                 return -EINVAL;
697         }
698
699         spin_unlock_irqrestore(&dev->drw_lock, irqflags);
700
701         /*
702          * We take the ref here and put it when the swap actually completes
703          * in the tasklet.
704          */
705         ret = drm_vblank_get(dev, pipe);
706         if (ret)
707                 return ret;
708         curseq = drm_vblank_count(dev, pipe);
709
710         if (seqtype == _DRM_VBLANK_RELATIVE)
711                 swap->sequence += curseq;
712
713         if ((curseq - swap->sequence) <= (1<<23)) {
714                 if (swap->seqtype & _DRM_VBLANK_NEXTONMISS) {
715                         swap->sequence = curseq + 1;
716                 } else {
717                         DRM_DEBUG("Missed target sequence\n");
718                         drm_vblank_put(dev, pipe);
719                         return -EINVAL;
720                 }
721         }
722
723         spin_lock_irqsave(&dev_priv->swaps_lock, irqflags);
724
725         list_for_each(list, &dev_priv->vbl_swaps.head) {
726                 vbl_swap = list_entry(list, drm_i915_vbl_swap_t, head);
727
728                 if (vbl_swap->drw_id == swap->drawable &&
729                     vbl_swap->plane == plane &&
730                     vbl_swap->sequence == swap->sequence) {
731                         spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags);
732                         DRM_DEBUG("Already scheduled\n");
733                         return 0;
734                 }
735         }
736
737         spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags);
738
739         if (dev_priv->swaps_pending >= 100) {
740                 DRM_DEBUG("Too many swaps queued\n");
741                 drm_vblank_put(dev, pipe);
742                 return -EBUSY;
743         }
744
745         vbl_swap = drm_calloc(1, sizeof(*vbl_swap), DRM_MEM_DRIVER);
746
747         if (!vbl_swap) {
748                 DRM_ERROR("Failed to allocate memory to queue swap\n");
749                 drm_vblank_put(dev, pipe);
750                 return -ENOMEM;
751         }
752
753         DRM_DEBUG("\n");
754
755         vbl_swap->drw_id = swap->drawable;
756         vbl_swap->plane = plane;
757         vbl_swap->sequence = swap->sequence;
758
759         spin_lock_irqsave(&dev_priv->swaps_lock, irqflags);
760
761         list_add_tail(&vbl_swap->head, &dev_priv->vbl_swaps.head);
762         dev_priv->swaps_pending++;
763
764         spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags);
765
766         return 0;
767 }
768
769 /* drm_dma.h hooks
770 */
771 void i915_driver_irq_preinstall(struct drm_device * dev)
772 {
773         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
774
775         I915_WRITE(HWSTAM, 0xeffe);
776         I915_WRITE(IMR, 0xffffffff);
777         I915_WRITE(IER, 0x0);
778 }
779
780 int i915_driver_irq_postinstall(struct drm_device *dev)
781 {
782         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
783         int ret, num_pipes = 2;
784
785         spin_lock_init(&dev_priv->swaps_lock);
786         INIT_LIST_HEAD(&dev_priv->vbl_swaps.head);
787         dev_priv->swaps_pending = 0;
788
789         /* Set initial unmasked IRQs to just the selected vblank pipes. */
790         dev_priv->irq_mask_reg = ~0;
791
792         ret = drm_vblank_init(dev, num_pipes);
793         if (ret)
794                 return ret;
795
796         dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
797         dev_priv->irq_mask_reg &= ~I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT;
798         dev_priv->irq_mask_reg &= ~I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
799
800         dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
801
802         dev_priv->irq_mask_reg &= I915_INTERRUPT_ENABLE_MASK;
803
804         I915_WRITE(IMR, dev_priv->irq_mask_reg);
805         I915_WRITE(IER, I915_INTERRUPT_ENABLE_MASK);
806         (void) I915_READ(IER);
807
808         opregion_enable_asle(dev);
809         DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
810
811         return 0;
812 }
813
814 void i915_driver_irq_uninstall(struct drm_device * dev)
815 {
816         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
817         u32 temp;
818
819         if (!dev_priv)
820                 return;
821
822         dev_priv->vblank_pipe = 0;
823
824         I915_WRITE(HWSTAM, 0xffffffff);
825         I915_WRITE(IMR, 0xffffffff);
826         I915_WRITE(IER, 0x0);
827
828         temp = I915_READ(PIPEASTAT);
829         I915_WRITE(PIPEASTAT, temp);
830         temp = I915_READ(PIPEBSTAT);
831         I915_WRITE(PIPEBSTAT, temp);
832         temp = I915_READ(IIR);
833         I915_WRITE(IIR, temp);
834 }