block_device_operations->release() should return void
[linux-3.10.git] / drivers / block / cciss.c
1 /*
2  *    Disk Array driver for HP Smart Array controllers.
3  *    (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
4  *
5  *    This program is free software; you can redistribute it and/or modify
6  *    it under the terms of the GNU General Public License as published by
7  *    the Free Software Foundation; version 2 of the License.
8  *
9  *    This program is distributed in the hope that it will be useful,
10  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
11  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12  *    General Public License for more details.
13  *
14  *    You should have received a copy of the GNU General Public License
15  *    along with this program; if not, write to the Free Software
16  *    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17  *    02111-1307, USA.
18  *
19  *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
20  *
21  */
22
23 #include <linux/module.h>
24 #include <linux/interrupt.h>
25 #include <linux/types.h>
26 #include <linux/pci.h>
27 #include <linux/pci-aspm.h>
28 #include <linux/kernel.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/major.h>
32 #include <linux/fs.h>
33 #include <linux/bio.h>
34 #include <linux/blkpg.h>
35 #include <linux/timer.h>
36 #include <linux/proc_fs.h>
37 #include <linux/seq_file.h>
38 #include <linux/init.h>
39 #include <linux/jiffies.h>
40 #include <linux/hdreg.h>
41 #include <linux/spinlock.h>
42 #include <linux/compat.h>
43 #include <linux/mutex.h>
44 #include <linux/bitmap.h>
45 #include <linux/io.h>
46 #include <asm/uaccess.h>
47
48 #include <linux/dma-mapping.h>
49 #include <linux/blkdev.h>
50 #include <linux/genhd.h>
51 #include <linux/completion.h>
52 #include <scsi/scsi.h>
53 #include <scsi/sg.h>
54 #include <scsi/scsi_ioctl.h>
55 #include <linux/cdrom.h>
56 #include <linux/scatterlist.h>
57 #include <linux/kthread.h>
58
59 #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
60 #define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
61 #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
62
63 /* Embedded module documentation macros - see modules.h */
64 MODULE_AUTHOR("Hewlett-Packard Company");
65 MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
66 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
67 MODULE_VERSION("3.6.26");
68 MODULE_LICENSE("GPL");
69 static int cciss_tape_cmds = 6;
70 module_param(cciss_tape_cmds, int, 0644);
71 MODULE_PARM_DESC(cciss_tape_cmds,
72         "number of commands to allocate for tape devices (default: 6)");
73 static int cciss_simple_mode;
74 module_param(cciss_simple_mode, int, S_IRUGO|S_IWUSR);
75 MODULE_PARM_DESC(cciss_simple_mode,
76         "Use 'simple mode' rather than 'performant mode'");
77
78 static DEFINE_MUTEX(cciss_mutex);
79 static struct proc_dir_entry *proc_cciss;
80
81 #include "cciss_cmd.h"
82 #include "cciss.h"
83 #include <linux/cciss_ioctl.h>
84
85 /* define the PCI info for the cards we can control */
86 static const struct pci_device_id cciss_pci_device_id[] = {
87         {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS,  0x0E11, 0x4070},
88         {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
89         {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
90         {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
91         {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
92         {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
93         {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
94         {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
95         {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
96         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSA,     0x103C, 0x3225},
97         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSC,     0x103C, 0x3223},
98         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSC,     0x103C, 0x3234},
99         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSC,     0x103C, 0x3235},
100         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSD,     0x103C, 0x3211},
101         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSD,     0x103C, 0x3212},
102         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSD,     0x103C, 0x3213},
103         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSD,     0x103C, 0x3214},
104         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSD,     0x103C, 0x3215},
105         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSC,     0x103C, 0x3237},
106         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSC,     0x103C, 0x323D},
107         {0,}
108 };
109
110 MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
111
112 /*  board_id = Subsystem Device ID & Vendor ID
113  *  product = Marketing Name for the board
114  *  access = Address of the struct of function pointers
115  */
116 static struct board_type products[] = {
117         {0x40700E11, "Smart Array 5300", &SA5_access},
118         {0x40800E11, "Smart Array 5i", &SA5B_access},
119         {0x40820E11, "Smart Array 532", &SA5B_access},
120         {0x40830E11, "Smart Array 5312", &SA5B_access},
121         {0x409A0E11, "Smart Array 641", &SA5_access},
122         {0x409B0E11, "Smart Array 642", &SA5_access},
123         {0x409C0E11, "Smart Array 6400", &SA5_access},
124         {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
125         {0x40910E11, "Smart Array 6i", &SA5_access},
126         {0x3225103C, "Smart Array P600", &SA5_access},
127         {0x3223103C, "Smart Array P800", &SA5_access},
128         {0x3234103C, "Smart Array P400", &SA5_access},
129         {0x3235103C, "Smart Array P400i", &SA5_access},
130         {0x3211103C, "Smart Array E200i", &SA5_access},
131         {0x3212103C, "Smart Array E200", &SA5_access},
132         {0x3213103C, "Smart Array E200i", &SA5_access},
133         {0x3214103C, "Smart Array E200i", &SA5_access},
134         {0x3215103C, "Smart Array E200i", &SA5_access},
135         {0x3237103C, "Smart Array E500", &SA5_access},
136         {0x3223103C, "Smart Array P800", &SA5_access},
137         {0x3234103C, "Smart Array P400", &SA5_access},
138         {0x323D103C, "Smart Array P700m", &SA5_access},
139 };
140
141 /* How long to wait (in milliseconds) for board to go into simple mode */
142 #define MAX_CONFIG_WAIT 30000
143 #define MAX_IOCTL_CONFIG_WAIT 1000
144
145 /*define how many times we will try a command because of bus resets */
146 #define MAX_CMD_RETRIES 3
147
148 #define MAX_CTLR        32
149
150 /* Originally cciss driver only supports 8 major numbers */
151 #define MAX_CTLR_ORIG   8
152
153 static ctlr_info_t *hba[MAX_CTLR];
154
155 static struct task_struct *cciss_scan_thread;
156 static DEFINE_MUTEX(scan_mutex);
157 static LIST_HEAD(scan_q);
158
159 static void do_cciss_request(struct request_queue *q);
160 static irqreturn_t do_cciss_intx(int irq, void *dev_id);
161 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
162 static int cciss_open(struct block_device *bdev, fmode_t mode);
163 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
164 static void cciss_release(struct gendisk *disk, fmode_t mode);
165 static int do_ioctl(struct block_device *bdev, fmode_t mode,
166                     unsigned int cmd, unsigned long arg);
167 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
168                        unsigned int cmd, unsigned long arg);
169 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
170
171 static int cciss_revalidate(struct gendisk *disk);
172 static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
173 static int deregister_disk(ctlr_info_t *h, int drv_index,
174                            int clear_all, int via_ioctl);
175
176 static void cciss_read_capacity(ctlr_info_t *h, int logvol,
177                         sector_t *total_size, unsigned int *block_size);
178 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
179                         sector_t *total_size, unsigned int *block_size);
180 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
181                         sector_t total_size,
182                         unsigned int block_size, InquiryData_struct *inq_buff,
183                                    drive_info_struct *drv);
184 static void cciss_interrupt_mode(ctlr_info_t *);
185 static int cciss_enter_simple_mode(struct ctlr_info *h);
186 static void start_io(ctlr_info_t *h);
187 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
188                         __u8 page_code, unsigned char scsi3addr[],
189                         int cmd_type);
190 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
191         int attempt_retry);
192 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
193
194 static int add_to_scan_list(struct ctlr_info *h);
195 static int scan_thread(void *data);
196 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
197 static void cciss_hba_release(struct device *dev);
198 static void cciss_device_release(struct device *dev);
199 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
200 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
201 static inline u32 next_command(ctlr_info_t *h);
202 static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
203                                 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
204                                 u64 *cfg_offset);
205 static int cciss_pci_find_memory_BAR(struct pci_dev *pdev,
206                                      unsigned long *memory_bar);
207 static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag);
208 static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable);
209
210 /* performant mode helper functions */
211 static void  calc_bucket_map(int *bucket, int num_buckets, int nsgs,
212                                 int *bucket_map);
213 static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
214
215 #ifdef CONFIG_PROC_FS
216 static void cciss_procinit(ctlr_info_t *h);
217 #else
218 static void cciss_procinit(ctlr_info_t *h)
219 {
220 }
221 #endif                          /* CONFIG_PROC_FS */
222
223 #ifdef CONFIG_COMPAT
224 static int cciss_compat_ioctl(struct block_device *, fmode_t,
225                               unsigned, unsigned long);
226 #endif
227
228 static const struct block_device_operations cciss_fops = {
229         .owner = THIS_MODULE,
230         .open = cciss_unlocked_open,
231         .release = cciss_release,
232         .ioctl = do_ioctl,
233         .getgeo = cciss_getgeo,
234 #ifdef CONFIG_COMPAT
235         .compat_ioctl = cciss_compat_ioctl,
236 #endif
237         .revalidate_disk = cciss_revalidate,
238 };
239
240 /* set_performant_mode: Modify the tag for cciss performant
241  * set bit 0 for pull model, bits 3-1 for block fetch
242  * register number
243  */
244 static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
245 {
246         if (likely(h->transMethod & CFGTBL_Trans_Performant))
247                 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
248 }
249
250 /*
251  * Enqueuing and dequeuing functions for cmdlists.
252  */
253 static inline void addQ(struct list_head *list, CommandList_struct *c)
254 {
255         list_add_tail(&c->list, list);
256 }
257
258 static inline void removeQ(CommandList_struct *c)
259 {
260         /*
261          * After kexec/dump some commands might still
262          * be in flight, which the firmware will try
263          * to complete. Resetting the firmware doesn't work
264          * with old fw revisions, so we have to mark
265          * them off as 'stale' to prevent the driver from
266          * falling over.
267          */
268         if (WARN_ON(list_empty(&c->list))) {
269                 c->cmd_type = CMD_MSG_STALE;
270                 return;
271         }
272
273         list_del_init(&c->list);
274 }
275
276 static void enqueue_cmd_and_start_io(ctlr_info_t *h,
277         CommandList_struct *c)
278 {
279         unsigned long flags;
280         set_performant_mode(h, c);
281         spin_lock_irqsave(&h->lock, flags);
282         addQ(&h->reqQ, c);
283         h->Qdepth++;
284         if (h->Qdepth > h->maxQsinceinit)
285                 h->maxQsinceinit = h->Qdepth;
286         start_io(h);
287         spin_unlock_irqrestore(&h->lock, flags);
288 }
289
290 static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
291         int nr_cmds)
292 {
293         int i;
294
295         if (!cmd_sg_list)
296                 return;
297         for (i = 0; i < nr_cmds; i++) {
298                 kfree(cmd_sg_list[i]);
299                 cmd_sg_list[i] = NULL;
300         }
301         kfree(cmd_sg_list);
302 }
303
304 static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
305         ctlr_info_t *h, int chainsize, int nr_cmds)
306 {
307         int j;
308         SGDescriptor_struct **cmd_sg_list;
309
310         if (chainsize <= 0)
311                 return NULL;
312
313         cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
314         if (!cmd_sg_list)
315                 return NULL;
316
317         /* Build up chain blocks for each command */
318         for (j = 0; j < nr_cmds; j++) {
319                 /* Need a block of chainsized s/g elements. */
320                 cmd_sg_list[j] = kmalloc((chainsize *
321                         sizeof(*cmd_sg_list[j])), GFP_KERNEL);
322                 if (!cmd_sg_list[j]) {
323                         dev_err(&h->pdev->dev, "Cannot get memory "
324                                 "for s/g chains.\n");
325                         goto clean;
326                 }
327         }
328         return cmd_sg_list;
329 clean:
330         cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
331         return NULL;
332 }
333
334 static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
335 {
336         SGDescriptor_struct *chain_sg;
337         u64bit temp64;
338
339         if (c->Header.SGTotal <= h->max_cmd_sgentries)
340                 return;
341
342         chain_sg = &c->SG[h->max_cmd_sgentries - 1];
343         temp64.val32.lower = chain_sg->Addr.lower;
344         temp64.val32.upper = chain_sg->Addr.upper;
345         pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
346 }
347
348 static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
349         SGDescriptor_struct *chain_block, int len)
350 {
351         SGDescriptor_struct *chain_sg;
352         u64bit temp64;
353
354         chain_sg = &c->SG[h->max_cmd_sgentries - 1];
355         chain_sg->Ext = CCISS_SG_CHAIN;
356         chain_sg->Len = len;
357         temp64.val = pci_map_single(h->pdev, chain_block, len,
358                                 PCI_DMA_TODEVICE);
359         chain_sg->Addr.lower = temp64.val32.lower;
360         chain_sg->Addr.upper = temp64.val32.upper;
361 }
362
363 #include "cciss_scsi.c"         /* For SCSI tape support */
364
365 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
366         "UNKNOWN"
367 };
368 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
369
370 #ifdef CONFIG_PROC_FS
371
372 /*
373  * Report information about this controller.
374  */
375 #define ENG_GIG 1000000000
376 #define ENG_GIG_FACTOR (ENG_GIG/512)
377 #define ENGAGE_SCSI     "engage scsi"
378
379 static void cciss_seq_show_header(struct seq_file *seq)
380 {
381         ctlr_info_t *h = seq->private;
382
383         seq_printf(seq, "%s: HP %s Controller\n"
384                 "Board ID: 0x%08lx\n"
385                 "Firmware Version: %c%c%c%c\n"
386                 "IRQ: %d\n"
387                 "Logical drives: %d\n"
388                 "Current Q depth: %d\n"
389                 "Current # commands on controller: %d\n"
390                 "Max Q depth since init: %d\n"
391                 "Max # commands on controller since init: %d\n"
392                 "Max SG entries since init: %d\n",
393                 h->devname,
394                 h->product_name,
395                 (unsigned long)h->board_id,
396                 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
397                 h->firm_ver[3], (unsigned int)h->intr[h->intr_mode],
398                 h->num_luns,
399                 h->Qdepth, h->commands_outstanding,
400                 h->maxQsinceinit, h->max_outstanding, h->maxSG);
401
402 #ifdef CONFIG_CISS_SCSI_TAPE
403         cciss_seq_tape_report(seq, h);
404 #endif /* CONFIG_CISS_SCSI_TAPE */
405 }
406
407 static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
408 {
409         ctlr_info_t *h = seq->private;
410         unsigned long flags;
411
412         /* prevent displaying bogus info during configuration
413          * or deconfiguration of a logical volume
414          */
415         spin_lock_irqsave(&h->lock, flags);
416         if (h->busy_configuring) {
417                 spin_unlock_irqrestore(&h->lock, flags);
418                 return ERR_PTR(-EBUSY);
419         }
420         h->busy_configuring = 1;
421         spin_unlock_irqrestore(&h->lock, flags);
422
423         if (*pos == 0)
424                 cciss_seq_show_header(seq);
425
426         return pos;
427 }
428
429 static int cciss_seq_show(struct seq_file *seq, void *v)
430 {
431         sector_t vol_sz, vol_sz_frac;
432         ctlr_info_t *h = seq->private;
433         unsigned ctlr = h->ctlr;
434         loff_t *pos = v;
435         drive_info_struct *drv = h->drv[*pos];
436
437         if (*pos > h->highest_lun)
438                 return 0;
439
440         if (drv == NULL) /* it's possible for h->drv[] to have holes. */
441                 return 0;
442
443         if (drv->heads == 0)
444                 return 0;
445
446         vol_sz = drv->nr_blocks;
447         vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
448         vol_sz_frac *= 100;
449         sector_div(vol_sz_frac, ENG_GIG_FACTOR);
450
451         if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
452                 drv->raid_level = RAID_UNKNOWN;
453         seq_printf(seq, "cciss/c%dd%d:"
454                         "\t%4u.%02uGB\tRAID %s\n",
455                         ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
456                         raid_label[drv->raid_level]);
457         return 0;
458 }
459
460 static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
461 {
462         ctlr_info_t *h = seq->private;
463
464         if (*pos > h->highest_lun)
465                 return NULL;
466         *pos += 1;
467
468         return pos;
469 }
470
471 static void cciss_seq_stop(struct seq_file *seq, void *v)
472 {
473         ctlr_info_t *h = seq->private;
474
475         /* Only reset h->busy_configuring if we succeeded in setting
476          * it during cciss_seq_start. */
477         if (v == ERR_PTR(-EBUSY))
478                 return;
479
480         h->busy_configuring = 0;
481 }
482
483 static const struct seq_operations cciss_seq_ops = {
484         .start = cciss_seq_start,
485         .show  = cciss_seq_show,
486         .next  = cciss_seq_next,
487         .stop  = cciss_seq_stop,
488 };
489
490 static int cciss_seq_open(struct inode *inode, struct file *file)
491 {
492         int ret = seq_open(file, &cciss_seq_ops);
493         struct seq_file *seq = file->private_data;
494
495         if (!ret)
496                 seq->private = PDE_DATA(inode);
497
498         return ret;
499 }
500
501 static ssize_t
502 cciss_proc_write(struct file *file, const char __user *buf,
503                  size_t length, loff_t *ppos)
504 {
505         int err;
506         char *buffer;
507
508 #ifndef CONFIG_CISS_SCSI_TAPE
509         return -EINVAL;
510 #endif
511
512         if (!buf || length > PAGE_SIZE - 1)
513                 return -EINVAL;
514
515         buffer = (char *)__get_free_page(GFP_KERNEL);
516         if (!buffer)
517                 return -ENOMEM;
518
519         err = -EFAULT;
520         if (copy_from_user(buffer, buf, length))
521                 goto out;
522         buffer[length] = '\0';
523
524 #ifdef CONFIG_CISS_SCSI_TAPE
525         if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
526                 struct seq_file *seq = file->private_data;
527                 ctlr_info_t *h = seq->private;
528
529                 err = cciss_engage_scsi(h);
530                 if (err == 0)
531                         err = length;
532         } else
533 #endif /* CONFIG_CISS_SCSI_TAPE */
534                 err = -EINVAL;
535         /* might be nice to have "disengage" too, but it's not
536            safely possible. (only 1 module use count, lock issues.) */
537
538 out:
539         free_page((unsigned long)buffer);
540         return err;
541 }
542
543 static const struct file_operations cciss_proc_fops = {
544         .owner   = THIS_MODULE,
545         .open    = cciss_seq_open,
546         .read    = seq_read,
547         .llseek  = seq_lseek,
548         .release = seq_release,
549         .write   = cciss_proc_write,
550 };
551
552 static void cciss_procinit(ctlr_info_t *h)
553 {
554         struct proc_dir_entry *pde;
555
556         if (proc_cciss == NULL)
557                 proc_cciss = proc_mkdir("driver/cciss", NULL);
558         if (!proc_cciss)
559                 return;
560         pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
561                                         S_IROTH, proc_cciss,
562                                         &cciss_proc_fops, h);
563 }
564 #endif                          /* CONFIG_PROC_FS */
565
566 #define MAX_PRODUCT_NAME_LEN 19
567
568 #define to_hba(n) container_of(n, struct ctlr_info, dev)
569 #define to_drv(n) container_of(n, drive_info_struct, dev)
570
571 /* List of controllers which cannot be hard reset on kexec with reset_devices */
572 static u32 unresettable_controller[] = {
573         0x324a103C, /* Smart Array P712m */
574         0x324b103C, /* SmartArray P711m */
575         0x3223103C, /* Smart Array P800 */
576         0x3234103C, /* Smart Array P400 */
577         0x3235103C, /* Smart Array P400i */
578         0x3211103C, /* Smart Array E200i */
579         0x3212103C, /* Smart Array E200 */
580         0x3213103C, /* Smart Array E200i */
581         0x3214103C, /* Smart Array E200i */
582         0x3215103C, /* Smart Array E200i */
583         0x3237103C, /* Smart Array E500 */
584         0x323D103C, /* Smart Array P700m */
585         0x409C0E11, /* Smart Array 6400 */
586         0x409D0E11, /* Smart Array 6400 EM */
587 };
588
589 /* List of controllers which cannot even be soft reset */
590 static u32 soft_unresettable_controller[] = {
591         0x409C0E11, /* Smart Array 6400 */
592         0x409D0E11, /* Smart Array 6400 EM */
593 };
594
595 static int ctlr_is_hard_resettable(u32 board_id)
596 {
597         int i;
598
599         for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
600                 if (unresettable_controller[i] == board_id)
601                         return 0;
602         return 1;
603 }
604
605 static int ctlr_is_soft_resettable(u32 board_id)
606 {
607         int i;
608
609         for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
610                 if (soft_unresettable_controller[i] == board_id)
611                         return 0;
612         return 1;
613 }
614
615 static int ctlr_is_resettable(u32 board_id)
616 {
617         return ctlr_is_hard_resettable(board_id) ||
618                 ctlr_is_soft_resettable(board_id);
619 }
620
621 static ssize_t host_show_resettable(struct device *dev,
622                                     struct device_attribute *attr,
623                                     char *buf)
624 {
625         struct ctlr_info *h = to_hba(dev);
626
627         return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
628 }
629 static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL);
630
631 static ssize_t host_store_rescan(struct device *dev,
632                                  struct device_attribute *attr,
633                                  const char *buf, size_t count)
634 {
635         struct ctlr_info *h = to_hba(dev);
636
637         add_to_scan_list(h);
638         wake_up_process(cciss_scan_thread);
639         wait_for_completion_interruptible(&h->scan_wait);
640
641         return count;
642 }
643 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
644
645 static ssize_t host_show_transport_mode(struct device *dev,
646                                  struct device_attribute *attr,
647                                  char *buf)
648 {
649         struct ctlr_info *h = to_hba(dev);
650
651         return snprintf(buf, 20, "%s\n",
652                 h->transMethod & CFGTBL_Trans_Performant ?
653                         "performant" : "simple");
654 }
655 static DEVICE_ATTR(transport_mode, S_IRUGO, host_show_transport_mode, NULL);
656
657 static ssize_t dev_show_unique_id(struct device *dev,
658                                  struct device_attribute *attr,
659                                  char *buf)
660 {
661         drive_info_struct *drv = to_drv(dev);
662         struct ctlr_info *h = to_hba(drv->dev.parent);
663         __u8 sn[16];
664         unsigned long flags;
665         int ret = 0;
666
667         spin_lock_irqsave(&h->lock, flags);
668         if (h->busy_configuring)
669                 ret = -EBUSY;
670         else
671                 memcpy(sn, drv->serial_no, sizeof(sn));
672         spin_unlock_irqrestore(&h->lock, flags);
673
674         if (ret)
675                 return ret;
676         else
677                 return snprintf(buf, 16 * 2 + 2,
678                                 "%02X%02X%02X%02X%02X%02X%02X%02X"
679                                 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
680                                 sn[0], sn[1], sn[2], sn[3],
681                                 sn[4], sn[5], sn[6], sn[7],
682                                 sn[8], sn[9], sn[10], sn[11],
683                                 sn[12], sn[13], sn[14], sn[15]);
684 }
685 static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
686
687 static ssize_t dev_show_vendor(struct device *dev,
688                                struct device_attribute *attr,
689                                char *buf)
690 {
691         drive_info_struct *drv = to_drv(dev);
692         struct ctlr_info *h = to_hba(drv->dev.parent);
693         char vendor[VENDOR_LEN + 1];
694         unsigned long flags;
695         int ret = 0;
696
697         spin_lock_irqsave(&h->lock, flags);
698         if (h->busy_configuring)
699                 ret = -EBUSY;
700         else
701                 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
702         spin_unlock_irqrestore(&h->lock, flags);
703
704         if (ret)
705                 return ret;
706         else
707                 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
708 }
709 static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
710
711 static ssize_t dev_show_model(struct device *dev,
712                               struct device_attribute *attr,
713                               char *buf)
714 {
715         drive_info_struct *drv = to_drv(dev);
716         struct ctlr_info *h = to_hba(drv->dev.parent);
717         char model[MODEL_LEN + 1];
718         unsigned long flags;
719         int ret = 0;
720
721         spin_lock_irqsave(&h->lock, flags);
722         if (h->busy_configuring)
723                 ret = -EBUSY;
724         else
725                 memcpy(model, drv->model, MODEL_LEN + 1);
726         spin_unlock_irqrestore(&h->lock, flags);
727
728         if (ret)
729                 return ret;
730         else
731                 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
732 }
733 static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
734
735 static ssize_t dev_show_rev(struct device *dev,
736                             struct device_attribute *attr,
737                             char *buf)
738 {
739         drive_info_struct *drv = to_drv(dev);
740         struct ctlr_info *h = to_hba(drv->dev.parent);
741         char rev[REV_LEN + 1];
742         unsigned long flags;
743         int ret = 0;
744
745         spin_lock_irqsave(&h->lock, flags);
746         if (h->busy_configuring)
747                 ret = -EBUSY;
748         else
749                 memcpy(rev, drv->rev, REV_LEN + 1);
750         spin_unlock_irqrestore(&h->lock, flags);
751
752         if (ret)
753                 return ret;
754         else
755                 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
756 }
757 static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
758
759 static ssize_t cciss_show_lunid(struct device *dev,
760                                 struct device_attribute *attr, char *buf)
761 {
762         drive_info_struct *drv = to_drv(dev);
763         struct ctlr_info *h = to_hba(drv->dev.parent);
764         unsigned long flags;
765         unsigned char lunid[8];
766
767         spin_lock_irqsave(&h->lock, flags);
768         if (h->busy_configuring) {
769                 spin_unlock_irqrestore(&h->lock, flags);
770                 return -EBUSY;
771         }
772         if (!drv->heads) {
773                 spin_unlock_irqrestore(&h->lock, flags);
774                 return -ENOTTY;
775         }
776         memcpy(lunid, drv->LunID, sizeof(lunid));
777         spin_unlock_irqrestore(&h->lock, flags);
778         return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
779                 lunid[0], lunid[1], lunid[2], lunid[3],
780                 lunid[4], lunid[5], lunid[6], lunid[7]);
781 }
782 static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
783
784 static ssize_t cciss_show_raid_level(struct device *dev,
785                                      struct device_attribute *attr, char *buf)
786 {
787         drive_info_struct *drv = to_drv(dev);
788         struct ctlr_info *h = to_hba(drv->dev.parent);
789         int raid;
790         unsigned long flags;
791
792         spin_lock_irqsave(&h->lock, flags);
793         if (h->busy_configuring) {
794                 spin_unlock_irqrestore(&h->lock, flags);
795                 return -EBUSY;
796         }
797         raid = drv->raid_level;
798         spin_unlock_irqrestore(&h->lock, flags);
799         if (raid < 0 || raid > RAID_UNKNOWN)
800                 raid = RAID_UNKNOWN;
801
802         return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
803                         raid_label[raid]);
804 }
805 static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
806
807 static ssize_t cciss_show_usage_count(struct device *dev,
808                                       struct device_attribute *attr, char *buf)
809 {
810         drive_info_struct *drv = to_drv(dev);
811         struct ctlr_info *h = to_hba(drv->dev.parent);
812         unsigned long flags;
813         int count;
814
815         spin_lock_irqsave(&h->lock, flags);
816         if (h->busy_configuring) {
817                 spin_unlock_irqrestore(&h->lock, flags);
818                 return -EBUSY;
819         }
820         count = drv->usage_count;
821         spin_unlock_irqrestore(&h->lock, flags);
822         return snprintf(buf, 20, "%d\n", count);
823 }
824 static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
825
826 static struct attribute *cciss_host_attrs[] = {
827         &dev_attr_rescan.attr,
828         &dev_attr_resettable.attr,
829         &dev_attr_transport_mode.attr,
830         NULL
831 };
832
833 static struct attribute_group cciss_host_attr_group = {
834         .attrs = cciss_host_attrs,
835 };
836
837 static const struct attribute_group *cciss_host_attr_groups[] = {
838         &cciss_host_attr_group,
839         NULL
840 };
841
842 static struct device_type cciss_host_type = {
843         .name           = "cciss_host",
844         .groups         = cciss_host_attr_groups,
845         .release        = cciss_hba_release,
846 };
847
848 static struct attribute *cciss_dev_attrs[] = {
849         &dev_attr_unique_id.attr,
850         &dev_attr_model.attr,
851         &dev_attr_vendor.attr,
852         &dev_attr_rev.attr,
853         &dev_attr_lunid.attr,
854         &dev_attr_raid_level.attr,
855         &dev_attr_usage_count.attr,
856         NULL
857 };
858
859 static struct attribute_group cciss_dev_attr_group = {
860         .attrs = cciss_dev_attrs,
861 };
862
863 static const struct attribute_group *cciss_dev_attr_groups[] = {
864         &cciss_dev_attr_group,
865         NULL
866 };
867
868 static struct device_type cciss_dev_type = {
869         .name           = "cciss_device",
870         .groups         = cciss_dev_attr_groups,
871         .release        = cciss_device_release,
872 };
873
874 static struct bus_type cciss_bus_type = {
875         .name           = "cciss",
876 };
877
878 /*
879  * cciss_hba_release is called when the reference count
880  * of h->dev goes to zero.
881  */
882 static void cciss_hba_release(struct device *dev)
883 {
884         /*
885          * nothing to do, but need this to avoid a warning
886          * about not having a release handler from lib/kref.c.
887          */
888 }
889
890 /*
891  * Initialize sysfs entry for each controller.  This sets up and registers
892  * the 'cciss#' directory for each individual controller under
893  * /sys/bus/pci/devices/<dev>/.
894  */
895 static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
896 {
897         device_initialize(&h->dev);
898         h->dev.type = &cciss_host_type;
899         h->dev.bus = &cciss_bus_type;
900         dev_set_name(&h->dev, "%s", h->devname);
901         h->dev.parent = &h->pdev->dev;
902
903         return device_add(&h->dev);
904 }
905
906 /*
907  * Remove sysfs entries for an hba.
908  */
909 static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
910 {
911         device_del(&h->dev);
912         put_device(&h->dev); /* final put. */
913 }
914
915 /* cciss_device_release is called when the reference count
916  * of h->drv[x]dev goes to zero.
917  */
918 static void cciss_device_release(struct device *dev)
919 {
920         drive_info_struct *drv = to_drv(dev);
921         kfree(drv);
922 }
923
924 /*
925  * Initialize sysfs for each logical drive.  This sets up and registers
926  * the 'c#d#' directory for each individual logical drive under
927  * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
928  * /sys/block/cciss!c#d# to this entry.
929  */
930 static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
931                                        int drv_index)
932 {
933         struct device *dev;
934
935         if (h->drv[drv_index]->device_initialized)
936                 return 0;
937
938         dev = &h->drv[drv_index]->dev;
939         device_initialize(dev);
940         dev->type = &cciss_dev_type;
941         dev->bus = &cciss_bus_type;
942         dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
943         dev->parent = &h->dev;
944         h->drv[drv_index]->device_initialized = 1;
945         return device_add(dev);
946 }
947
948 /*
949  * Remove sysfs entries for a logical drive.
950  */
951 static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
952         int ctlr_exiting)
953 {
954         struct device *dev = &h->drv[drv_index]->dev;
955
956         /* special case for c*d0, we only destroy it on controller exit */
957         if (drv_index == 0 && !ctlr_exiting)
958                 return;
959
960         device_del(dev);
961         put_device(dev); /* the "final" put. */
962         h->drv[drv_index] = NULL;
963 }
964
965 /*
966  * For operations that cannot sleep, a command block is allocated at init,
967  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
968  * which ones are free or in use.
969  */
970 static CommandList_struct *cmd_alloc(ctlr_info_t *h)
971 {
972         CommandList_struct *c;
973         int i;
974         u64bit temp64;
975         dma_addr_t cmd_dma_handle, err_dma_handle;
976
977         do {
978                 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
979                 if (i == h->nr_cmds)
980                         return NULL;
981         } while (test_and_set_bit(i, h->cmd_pool_bits) != 0);
982         c = h->cmd_pool + i;
983         memset(c, 0, sizeof(CommandList_struct));
984         cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
985         c->err_info = h->errinfo_pool + i;
986         memset(c->err_info, 0, sizeof(ErrorInfo_struct));
987         err_dma_handle = h->errinfo_pool_dhandle
988             + i * sizeof(ErrorInfo_struct);
989         h->nr_allocs++;
990
991         c->cmdindex = i;
992
993         INIT_LIST_HEAD(&c->list);
994         c->busaddr = (__u32) cmd_dma_handle;
995         temp64.val = (__u64) err_dma_handle;
996         c->ErrDesc.Addr.lower = temp64.val32.lower;
997         c->ErrDesc.Addr.upper = temp64.val32.upper;
998         c->ErrDesc.Len = sizeof(ErrorInfo_struct);
999
1000         c->ctlr = h->ctlr;
1001         return c;
1002 }
1003
1004 /* allocate a command using pci_alloc_consistent, used for ioctls,
1005  * etc., not for the main i/o path.
1006  */
1007 static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
1008 {
1009         CommandList_struct *c;
1010         u64bit temp64;
1011         dma_addr_t cmd_dma_handle, err_dma_handle;
1012
1013         c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
1014                 sizeof(CommandList_struct), &cmd_dma_handle);
1015         if (c == NULL)
1016                 return NULL;
1017         memset(c, 0, sizeof(CommandList_struct));
1018
1019         c->cmdindex = -1;
1020
1021         c->err_info = (ErrorInfo_struct *)
1022             pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
1023                     &err_dma_handle);
1024
1025         if (c->err_info == NULL) {
1026                 pci_free_consistent(h->pdev,
1027                         sizeof(CommandList_struct), c, cmd_dma_handle);
1028                 return NULL;
1029         }
1030         memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1031
1032         INIT_LIST_HEAD(&c->list);
1033         c->busaddr = (__u32) cmd_dma_handle;
1034         temp64.val = (__u64) err_dma_handle;
1035         c->ErrDesc.Addr.lower = temp64.val32.lower;
1036         c->ErrDesc.Addr.upper = temp64.val32.upper;
1037         c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1038
1039         c->ctlr = h->ctlr;
1040         return c;
1041 }
1042
1043 static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1044 {
1045         int i;
1046
1047         i = c - h->cmd_pool;
1048         clear_bit(i, h->cmd_pool_bits);
1049         h->nr_frees++;
1050 }
1051
1052 static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
1053 {
1054         u64bit temp64;
1055
1056         temp64.val32.lower = c->ErrDesc.Addr.lower;
1057         temp64.val32.upper = c->ErrDesc.Addr.upper;
1058         pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1059                             c->err_info, (dma_addr_t) temp64.val);
1060         pci_free_consistent(h->pdev, sizeof(CommandList_struct), c,
1061                 (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr));
1062 }
1063
1064 static inline ctlr_info_t *get_host(struct gendisk *disk)
1065 {
1066         return disk->queue->queuedata;
1067 }
1068
1069 static inline drive_info_struct *get_drv(struct gendisk *disk)
1070 {
1071         return disk->private_data;
1072 }
1073
1074 /*
1075  * Open.  Make sure the device is really there.
1076  */
1077 static int cciss_open(struct block_device *bdev, fmode_t mode)
1078 {
1079         ctlr_info_t *h = get_host(bdev->bd_disk);
1080         drive_info_struct *drv = get_drv(bdev->bd_disk);
1081
1082         dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
1083         if (drv->busy_configuring)
1084                 return -EBUSY;
1085         /*
1086          * Root is allowed to open raw volume zero even if it's not configured
1087          * so array config can still work. Root is also allowed to open any
1088          * volume that has a LUN ID, so it can issue IOCTL to reread the
1089          * disk information.  I don't think I really like this
1090          * but I'm already using way to many device nodes to claim another one
1091          * for "raw controller".
1092          */
1093         if (drv->heads == 0) {
1094                 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1095                         /* if not node 0 make sure it is a partition = 0 */
1096                         if (MINOR(bdev->bd_dev) & 0x0f) {
1097                                 return -ENXIO;
1098                                 /* if it is, make sure we have a LUN ID */
1099                         } else if (memcmp(drv->LunID, CTLR_LUNID,
1100                                 sizeof(drv->LunID))) {
1101                                 return -ENXIO;
1102                         }
1103                 }
1104                 if (!capable(CAP_SYS_ADMIN))
1105                         return -EPERM;
1106         }
1107         drv->usage_count++;
1108         h->usage_count++;
1109         return 0;
1110 }
1111
1112 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1113 {
1114         int ret;
1115
1116         mutex_lock(&cciss_mutex);
1117         ret = cciss_open(bdev, mode);
1118         mutex_unlock(&cciss_mutex);
1119
1120         return ret;
1121 }
1122
1123 /*
1124  * Close.  Sync first.
1125  */
1126 static void cciss_release(struct gendisk *disk, fmode_t mode)
1127 {
1128         ctlr_info_t *h;
1129         drive_info_struct *drv;
1130
1131         mutex_lock(&cciss_mutex);
1132         h = get_host(disk);
1133         drv = get_drv(disk);
1134         dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1135         drv->usage_count--;
1136         h->usage_count--;
1137         mutex_unlock(&cciss_mutex);
1138 }
1139
1140 static int do_ioctl(struct block_device *bdev, fmode_t mode,
1141                     unsigned cmd, unsigned long arg)
1142 {
1143         int ret;
1144         mutex_lock(&cciss_mutex);
1145         ret = cciss_ioctl(bdev, mode, cmd, arg);
1146         mutex_unlock(&cciss_mutex);
1147         return ret;
1148 }
1149
1150 #ifdef CONFIG_COMPAT
1151
1152 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1153                                   unsigned cmd, unsigned long arg);
1154 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1155                                       unsigned cmd, unsigned long arg);
1156
1157 static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1158                               unsigned cmd, unsigned long arg)
1159 {
1160         switch (cmd) {
1161         case CCISS_GETPCIINFO:
1162         case CCISS_GETINTINFO:
1163         case CCISS_SETINTINFO:
1164         case CCISS_GETNODENAME:
1165         case CCISS_SETNODENAME:
1166         case CCISS_GETHEARTBEAT:
1167         case CCISS_GETBUSTYPES:
1168         case CCISS_GETFIRMVER:
1169         case CCISS_GETDRIVVER:
1170         case CCISS_REVALIDVOLS:
1171         case CCISS_DEREGDISK:
1172         case CCISS_REGNEWDISK:
1173         case CCISS_REGNEWD:
1174         case CCISS_RESCANDISK:
1175         case CCISS_GETLUNINFO:
1176                 return do_ioctl(bdev, mode, cmd, arg);
1177
1178         case CCISS_PASSTHRU32:
1179                 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1180         case CCISS_BIG_PASSTHRU32:
1181                 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1182
1183         default:
1184                 return -ENOIOCTLCMD;
1185         }
1186 }
1187
1188 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1189                                   unsigned cmd, unsigned long arg)
1190 {
1191         IOCTL32_Command_struct __user *arg32 =
1192             (IOCTL32_Command_struct __user *) arg;
1193         IOCTL_Command_struct arg64;
1194         IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1195         int err;
1196         u32 cp;
1197
1198         err = 0;
1199         err |=
1200             copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1201                            sizeof(arg64.LUN_info));
1202         err |=
1203             copy_from_user(&arg64.Request, &arg32->Request,
1204                            sizeof(arg64.Request));
1205         err |=
1206             copy_from_user(&arg64.error_info, &arg32->error_info,
1207                            sizeof(arg64.error_info));
1208         err |= get_user(arg64.buf_size, &arg32->buf_size);
1209         err |= get_user(cp, &arg32->buf);
1210         arg64.buf = compat_ptr(cp);
1211         err |= copy_to_user(p, &arg64, sizeof(arg64));
1212
1213         if (err)
1214                 return -EFAULT;
1215
1216         err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1217         if (err)
1218                 return err;
1219         err |=
1220             copy_in_user(&arg32->error_info, &p->error_info,
1221                          sizeof(arg32->error_info));
1222         if (err)
1223                 return -EFAULT;
1224         return err;
1225 }
1226
1227 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1228                                       unsigned cmd, unsigned long arg)
1229 {
1230         BIG_IOCTL32_Command_struct __user *arg32 =
1231             (BIG_IOCTL32_Command_struct __user *) arg;
1232         BIG_IOCTL_Command_struct arg64;
1233         BIG_IOCTL_Command_struct __user *p =
1234             compat_alloc_user_space(sizeof(arg64));
1235         int err;
1236         u32 cp;
1237
1238         memset(&arg64, 0, sizeof(arg64));
1239         err = 0;
1240         err |=
1241             copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1242                            sizeof(arg64.LUN_info));
1243         err |=
1244             copy_from_user(&arg64.Request, &arg32->Request,
1245                            sizeof(arg64.Request));
1246         err |=
1247             copy_from_user(&arg64.error_info, &arg32->error_info,
1248                            sizeof(arg64.error_info));
1249         err |= get_user(arg64.buf_size, &arg32->buf_size);
1250         err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1251         err |= get_user(cp, &arg32->buf);
1252         arg64.buf = compat_ptr(cp);
1253         err |= copy_to_user(p, &arg64, sizeof(arg64));
1254
1255         if (err)
1256                 return -EFAULT;
1257
1258         err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1259         if (err)
1260                 return err;
1261         err |=
1262             copy_in_user(&arg32->error_info, &p->error_info,
1263                          sizeof(arg32->error_info));
1264         if (err)
1265                 return -EFAULT;
1266         return err;
1267 }
1268 #endif
1269
1270 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1271 {
1272         drive_info_struct *drv = get_drv(bdev->bd_disk);
1273
1274         if (!drv->cylinders)
1275                 return -ENXIO;
1276
1277         geo->heads = drv->heads;
1278         geo->sectors = drv->sectors;
1279         geo->cylinders = drv->cylinders;
1280         return 0;
1281 }
1282
1283 static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
1284 {
1285         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1286                         c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
1287                 (void)check_for_unit_attention(h, c);
1288 }
1289
1290 static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1291 {
1292         cciss_pci_info_struct pciinfo;
1293
1294         if (!argp)
1295                 return -EINVAL;
1296         pciinfo.domain = pci_domain_nr(h->pdev->bus);
1297         pciinfo.bus = h->pdev->bus->number;
1298         pciinfo.dev_fn = h->pdev->devfn;
1299         pciinfo.board_id = h->board_id;
1300         if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1301                 return -EFAULT;
1302         return 0;
1303 }
1304
1305 static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1306 {
1307         cciss_coalint_struct intinfo;
1308
1309         if (!argp)
1310                 return -EINVAL;
1311         intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1312         intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1313         if (copy_to_user
1314             (argp, &intinfo, sizeof(cciss_coalint_struct)))
1315                 return -EFAULT;
1316         return 0;
1317 }
1318
1319 static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1320 {
1321         cciss_coalint_struct intinfo;
1322         unsigned long flags;
1323         int i;
1324
1325         if (!argp)
1326                 return -EINVAL;
1327         if (!capable(CAP_SYS_ADMIN))
1328                 return -EPERM;
1329         if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1330                 return -EFAULT;
1331         if ((intinfo.delay == 0) && (intinfo.count == 0))
1332                 return -EINVAL;
1333         spin_lock_irqsave(&h->lock, flags);
1334         /* Update the field, and then ring the doorbell */
1335         writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1336         writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1337         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1338
1339         for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1340                 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1341                         break;
1342                 udelay(1000); /* delay and try again */
1343         }
1344         spin_unlock_irqrestore(&h->lock, flags);
1345         if (i >= MAX_IOCTL_CONFIG_WAIT)
1346                 return -EAGAIN;
1347         return 0;
1348 }
1349
1350 static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1351 {
1352         NodeName_type NodeName;
1353         int i;
1354
1355         if (!argp)
1356                 return -EINVAL;
1357         for (i = 0; i < 16; i++)
1358                 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1359         if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1360                 return -EFAULT;
1361         return 0;
1362 }
1363
1364 static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1365 {
1366         NodeName_type NodeName;
1367         unsigned long flags;
1368         int i;
1369
1370         if (!argp)
1371                 return -EINVAL;
1372         if (!capable(CAP_SYS_ADMIN))
1373                 return -EPERM;
1374         if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1375                 return -EFAULT;
1376         spin_lock_irqsave(&h->lock, flags);
1377         /* Update the field, and then ring the doorbell */
1378         for (i = 0; i < 16; i++)
1379                 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1380         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1381         for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1382                 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1383                         break;
1384                 udelay(1000); /* delay and try again */
1385         }
1386         spin_unlock_irqrestore(&h->lock, flags);
1387         if (i >= MAX_IOCTL_CONFIG_WAIT)
1388                 return -EAGAIN;
1389         return 0;
1390 }
1391
1392 static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1393 {
1394         Heartbeat_type heartbeat;
1395
1396         if (!argp)
1397                 return -EINVAL;
1398         heartbeat = readl(&h->cfgtable->HeartBeat);
1399         if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1400                 return -EFAULT;
1401         return 0;
1402 }
1403
1404 static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1405 {
1406         BusTypes_type BusTypes;
1407
1408         if (!argp)
1409                 return -EINVAL;
1410         BusTypes = readl(&h->cfgtable->BusTypes);
1411         if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1412                 return -EFAULT;
1413         return 0;
1414 }
1415
1416 static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1417 {
1418         FirmwareVer_type firmware;
1419
1420         if (!argp)
1421                 return -EINVAL;
1422         memcpy(firmware, h->firm_ver, 4);
1423
1424         if (copy_to_user
1425             (argp, firmware, sizeof(FirmwareVer_type)))
1426                 return -EFAULT;
1427         return 0;
1428 }
1429
1430 static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1431 {
1432         DriverVer_type DriverVer = DRIVER_VERSION;
1433
1434         if (!argp)
1435                 return -EINVAL;
1436         if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1437                 return -EFAULT;
1438         return 0;
1439 }
1440
1441 static int cciss_getluninfo(ctlr_info_t *h,
1442         struct gendisk *disk, void __user *argp)
1443 {
1444         LogvolInfo_struct luninfo;
1445         drive_info_struct *drv = get_drv(disk);
1446
1447         if (!argp)
1448                 return -EINVAL;
1449         memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1450         luninfo.num_opens = drv->usage_count;
1451         luninfo.num_parts = 0;
1452         if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1453                 return -EFAULT;
1454         return 0;
1455 }
1456
1457 static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1458 {
1459         IOCTL_Command_struct iocommand;
1460         CommandList_struct *c;
1461         char *buff = NULL;
1462         u64bit temp64;
1463         DECLARE_COMPLETION_ONSTACK(wait);
1464
1465         if (!argp)
1466                 return -EINVAL;
1467
1468         if (!capable(CAP_SYS_RAWIO))
1469                 return -EPERM;
1470
1471         if (copy_from_user
1472             (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1473                 return -EFAULT;
1474         if ((iocommand.buf_size < 1) &&
1475             (iocommand.Request.Type.Direction != XFER_NONE)) {
1476                 return -EINVAL;
1477         }
1478         if (iocommand.buf_size > 0) {
1479                 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1480                 if (buff == NULL)
1481                         return -EFAULT;
1482         }
1483         if (iocommand.Request.Type.Direction == XFER_WRITE) {
1484                 /* Copy the data into the buffer we created */
1485                 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1486                         kfree(buff);
1487                         return -EFAULT;
1488                 }
1489         } else {
1490                 memset(buff, 0, iocommand.buf_size);
1491         }
1492         c = cmd_special_alloc(h);
1493         if (!c) {
1494                 kfree(buff);
1495                 return -ENOMEM;
1496         }
1497         /* Fill in the command type */
1498         c->cmd_type = CMD_IOCTL_PEND;
1499         /* Fill in Command Header */
1500         c->Header.ReplyQueue = 0;   /* unused in simple mode */
1501         if (iocommand.buf_size > 0) { /* buffer to fill */
1502                 c->Header.SGList = 1;
1503                 c->Header.SGTotal = 1;
1504         } else { /* no buffers to fill */
1505                 c->Header.SGList = 0;
1506                 c->Header.SGTotal = 0;
1507         }
1508         c->Header.LUN = iocommand.LUN_info;
1509         /* use the kernel address the cmd block for tag */
1510         c->Header.Tag.lower = c->busaddr;
1511
1512         /* Fill in Request block */
1513         c->Request = iocommand.Request;
1514
1515         /* Fill in the scatter gather information */
1516         if (iocommand.buf_size > 0) {
1517                 temp64.val = pci_map_single(h->pdev, buff,
1518                         iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1519                 c->SG[0].Addr.lower = temp64.val32.lower;
1520                 c->SG[0].Addr.upper = temp64.val32.upper;
1521                 c->SG[0].Len = iocommand.buf_size;
1522                 c->SG[0].Ext = 0;  /* we are not chaining */
1523         }
1524         c->waiting = &wait;
1525
1526         enqueue_cmd_and_start_io(h, c);
1527         wait_for_completion(&wait);
1528
1529         /* unlock the buffers from DMA */
1530         temp64.val32.lower = c->SG[0].Addr.lower;
1531         temp64.val32.upper = c->SG[0].Addr.upper;
1532         pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1533                          PCI_DMA_BIDIRECTIONAL);
1534         check_ioctl_unit_attention(h, c);
1535
1536         /* Copy the error information out */
1537         iocommand.error_info = *(c->err_info);
1538         if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1539                 kfree(buff);
1540                 cmd_special_free(h, c);
1541                 return -EFAULT;
1542         }
1543
1544         if (iocommand.Request.Type.Direction == XFER_READ) {
1545                 /* Copy the data out of the buffer we created */
1546                 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
1547                         kfree(buff);
1548                         cmd_special_free(h, c);
1549                         return -EFAULT;
1550                 }
1551         }
1552         kfree(buff);
1553         cmd_special_free(h, c);
1554         return 0;
1555 }
1556
1557 static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1558 {
1559         BIG_IOCTL_Command_struct *ioc;
1560         CommandList_struct *c;
1561         unsigned char **buff = NULL;
1562         int *buff_size = NULL;
1563         u64bit temp64;
1564         BYTE sg_used = 0;
1565         int status = 0;
1566         int i;
1567         DECLARE_COMPLETION_ONSTACK(wait);
1568         __u32 left;
1569         __u32 sz;
1570         BYTE __user *data_ptr;
1571
1572         if (!argp)
1573                 return -EINVAL;
1574         if (!capable(CAP_SYS_RAWIO))
1575                 return -EPERM;
1576         ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
1577         if (!ioc) {
1578                 status = -ENOMEM;
1579                 goto cleanup1;
1580         }
1581         if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1582                 status = -EFAULT;
1583                 goto cleanup1;
1584         }
1585         if ((ioc->buf_size < 1) &&
1586             (ioc->Request.Type.Direction != XFER_NONE)) {
1587                 status = -EINVAL;
1588                 goto cleanup1;
1589         }
1590         /* Check kmalloc limits  using all SGs */
1591         if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1592                 status = -EINVAL;
1593                 goto cleanup1;
1594         }
1595         if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1596                 status = -EINVAL;
1597                 goto cleanup1;
1598         }
1599         buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1600         if (!buff) {
1601                 status = -ENOMEM;
1602                 goto cleanup1;
1603         }
1604         buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1605         if (!buff_size) {
1606                 status = -ENOMEM;
1607                 goto cleanup1;
1608         }
1609         left = ioc->buf_size;
1610         data_ptr = ioc->buf;
1611         while (left) {
1612                 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1613                 buff_size[sg_used] = sz;
1614                 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1615                 if (buff[sg_used] == NULL) {
1616                         status = -ENOMEM;
1617                         goto cleanup1;
1618                 }
1619                 if (ioc->Request.Type.Direction == XFER_WRITE) {
1620                         if (copy_from_user(buff[sg_used], data_ptr, sz)) {
1621                                 status = -EFAULT;
1622                                 goto cleanup1;
1623                         }
1624                 } else {
1625                         memset(buff[sg_used], 0, sz);
1626                 }
1627                 left -= sz;
1628                 data_ptr += sz;
1629                 sg_used++;
1630         }
1631         c = cmd_special_alloc(h);
1632         if (!c) {
1633                 status = -ENOMEM;
1634                 goto cleanup1;
1635         }
1636         c->cmd_type = CMD_IOCTL_PEND;
1637         c->Header.ReplyQueue = 0;
1638         c->Header.SGList = sg_used;
1639         c->Header.SGTotal = sg_used;
1640         c->Header.LUN = ioc->LUN_info;
1641         c->Header.Tag.lower = c->busaddr;
1642
1643         c->Request = ioc->Request;
1644         for (i = 0; i < sg_used; i++) {
1645                 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
1646                                     PCI_DMA_BIDIRECTIONAL);
1647                 c->SG[i].Addr.lower = temp64.val32.lower;
1648                 c->SG[i].Addr.upper = temp64.val32.upper;
1649                 c->SG[i].Len = buff_size[i];
1650                 c->SG[i].Ext = 0;       /* we are not chaining */
1651         }
1652         c->waiting = &wait;
1653         enqueue_cmd_and_start_io(h, c);
1654         wait_for_completion(&wait);
1655         /* unlock the buffers from DMA */
1656         for (i = 0; i < sg_used; i++) {
1657                 temp64.val32.lower = c->SG[i].Addr.lower;
1658                 temp64.val32.upper = c->SG[i].Addr.upper;
1659                 pci_unmap_single(h->pdev,
1660                         (dma_addr_t) temp64.val, buff_size[i],
1661                         PCI_DMA_BIDIRECTIONAL);
1662         }
1663         check_ioctl_unit_attention(h, c);
1664         /* Copy the error information out */
1665         ioc->error_info = *(c->err_info);
1666         if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1667                 cmd_special_free(h, c);
1668                 status = -EFAULT;
1669                 goto cleanup1;
1670         }
1671         if (ioc->Request.Type.Direction == XFER_READ) {
1672                 /* Copy the data out of the buffer we created */
1673                 BYTE __user *ptr = ioc->buf;
1674                 for (i = 0; i < sg_used; i++) {
1675                         if (copy_to_user(ptr, buff[i], buff_size[i])) {
1676                                 cmd_special_free(h, c);
1677                                 status = -EFAULT;
1678                                 goto cleanup1;
1679                         }
1680                         ptr += buff_size[i];
1681                 }
1682         }
1683         cmd_special_free(h, c);
1684         status = 0;
1685 cleanup1:
1686         if (buff) {
1687                 for (i = 0; i < sg_used; i++)
1688                         kfree(buff[i]);
1689                 kfree(buff);
1690         }
1691         kfree(buff_size);
1692         kfree(ioc);
1693         return status;
1694 }
1695
1696 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
1697         unsigned int cmd, unsigned long arg)
1698 {
1699         struct gendisk *disk = bdev->bd_disk;
1700         ctlr_info_t *h = get_host(disk);
1701         void __user *argp = (void __user *)arg;
1702
1703         dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1704                 cmd, arg);
1705         switch (cmd) {
1706         case CCISS_GETPCIINFO:
1707                 return cciss_getpciinfo(h, argp);
1708         case CCISS_GETINTINFO:
1709                 return cciss_getintinfo(h, argp);
1710         case CCISS_SETINTINFO:
1711                 return cciss_setintinfo(h, argp);
1712         case CCISS_GETNODENAME:
1713                 return cciss_getnodename(h, argp);
1714         case CCISS_SETNODENAME:
1715                 return cciss_setnodename(h, argp);
1716         case CCISS_GETHEARTBEAT:
1717                 return cciss_getheartbeat(h, argp);
1718         case CCISS_GETBUSTYPES:
1719                 return cciss_getbustypes(h, argp);
1720         case CCISS_GETFIRMVER:
1721                 return cciss_getfirmver(h, argp);
1722         case CCISS_GETDRIVVER:
1723                 return cciss_getdrivver(h, argp);
1724         case CCISS_DEREGDISK:
1725         case CCISS_REGNEWD:
1726         case CCISS_REVALIDVOLS:
1727                 return rebuild_lun_table(h, 0, 1);
1728         case CCISS_GETLUNINFO:
1729                 return cciss_getluninfo(h, disk, argp);
1730         case CCISS_PASSTHRU:
1731                 return cciss_passthru(h, argp);
1732         case CCISS_BIG_PASSTHRU:
1733                 return cciss_bigpassthru(h, argp);
1734
1735         /* scsi_cmd_blk_ioctl handles these, below, though some are not */
1736         /* very meaningful for cciss.  SG_IO is the main one people want. */
1737
1738         case SG_GET_VERSION_NUM:
1739         case SG_SET_TIMEOUT:
1740         case SG_GET_TIMEOUT:
1741         case SG_GET_RESERVED_SIZE:
1742         case SG_SET_RESERVED_SIZE:
1743         case SG_EMULATED_HOST:
1744         case SG_IO:
1745         case SCSI_IOCTL_SEND_COMMAND:
1746                 return scsi_cmd_blk_ioctl(bdev, mode, cmd, argp);
1747
1748         /* scsi_cmd_blk_ioctl would normally handle these, below, but */
1749         /* they aren't a good fit for cciss, as CD-ROMs are */
1750         /* not supported, and we don't have any bus/target/lun */
1751         /* which we present to the kernel. */
1752
1753         case CDROM_SEND_PACKET:
1754         case CDROMCLOSETRAY:
1755         case CDROMEJECT:
1756         case SCSI_IOCTL_GET_IDLUN:
1757         case SCSI_IOCTL_GET_BUS_NUMBER:
1758         default:
1759                 return -ENOTTY;
1760         }
1761 }
1762
1763 static void cciss_check_queues(ctlr_info_t *h)
1764 {
1765         int start_queue = h->next_to_run;
1766         int i;
1767
1768         /* check to see if we have maxed out the number of commands that can
1769          * be placed on the queue.  If so then exit.  We do this check here
1770          * in case the interrupt we serviced was from an ioctl and did not
1771          * free any new commands.
1772          */
1773         if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
1774                 return;
1775
1776         /* We have room on the queue for more commands.  Now we need to queue
1777          * them up.  We will also keep track of the next queue to run so
1778          * that every queue gets a chance to be started first.
1779          */
1780         for (i = 0; i < h->highest_lun + 1; i++) {
1781                 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1782                 /* make sure the disk has been added and the drive is real
1783                  * because this can be called from the middle of init_one.
1784                  */
1785                 if (!h->drv[curr_queue])
1786                         continue;
1787                 if (!(h->drv[curr_queue]->queue) ||
1788                         !(h->drv[curr_queue]->heads))
1789                         continue;
1790                 blk_start_queue(h->gendisk[curr_queue]->queue);
1791
1792                 /* check to see if we have maxed out the number of commands
1793                  * that can be placed on the queue.
1794                  */
1795                 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
1796                         if (curr_queue == start_queue) {
1797                                 h->next_to_run =
1798                                     (start_queue + 1) % (h->highest_lun + 1);
1799                                 break;
1800                         } else {
1801                                 h->next_to_run = curr_queue;
1802                                 break;
1803                         }
1804                 }
1805         }
1806 }
1807
1808 static void cciss_softirq_done(struct request *rq)
1809 {
1810         CommandList_struct *c = rq->completion_data;
1811         ctlr_info_t *h = hba[c->ctlr];
1812         SGDescriptor_struct *curr_sg = c->SG;
1813         u64bit temp64;
1814         unsigned long flags;
1815         int i, ddir;
1816         int sg_index = 0;
1817
1818         if (c->Request.Type.Direction == XFER_READ)
1819                 ddir = PCI_DMA_FROMDEVICE;
1820         else
1821                 ddir = PCI_DMA_TODEVICE;
1822
1823         /* command did not need to be retried */
1824         /* unmap the DMA mapping for all the scatter gather elements */
1825         for (i = 0; i < c->Header.SGList; i++) {
1826                 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
1827                         cciss_unmap_sg_chain_block(h, c);
1828                         /* Point to the next block */
1829                         curr_sg = h->cmd_sg_list[c->cmdindex];
1830                         sg_index = 0;
1831                 }
1832                 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1833                 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1834                 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1835                                 ddir);
1836                 ++sg_index;
1837         }
1838
1839         dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
1840
1841         /* set the residual count for pc requests */
1842         if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
1843                 rq->resid_len = c->err_info->ResidualCnt;
1844
1845         blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
1846
1847         spin_lock_irqsave(&h->lock, flags);
1848         cmd_free(h, c);
1849         cciss_check_queues(h);
1850         spin_unlock_irqrestore(&h->lock, flags);
1851 }
1852
1853 static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1854         unsigned char scsi3addr[], uint32_t log_unit)
1855 {
1856         memcpy(scsi3addr, h->drv[log_unit]->LunID,
1857                 sizeof(h->drv[log_unit]->LunID));
1858 }
1859
1860 /* This function gets the SCSI vendor, model, and revision of a logical drive
1861  * via the inquiry page 0.  Model, vendor, and rev are set to empty strings if
1862  * they cannot be read.
1863  */
1864 static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
1865                                    char *vendor, char *model, char *rev)
1866 {
1867         int rc;
1868         InquiryData_struct *inq_buf;
1869         unsigned char scsi3addr[8];
1870
1871         *vendor = '\0';
1872         *model = '\0';
1873         *rev = '\0';
1874
1875         inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1876         if (!inq_buf)
1877                 return;
1878
1879         log_unit_to_scsi3addr(h, scsi3addr, logvol);
1880         rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
1881                         scsi3addr, TYPE_CMD);
1882         if (rc == IO_OK) {
1883                 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1884                 vendor[VENDOR_LEN] = '\0';
1885                 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1886                 model[MODEL_LEN] = '\0';
1887                 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1888                 rev[REV_LEN] = '\0';
1889         }
1890
1891         kfree(inq_buf);
1892         return;
1893 }
1894
1895 /* This function gets the serial number of a logical drive via
1896  * inquiry page 0x83.  Serial no. is 16 bytes.  If the serial
1897  * number cannot be had, for whatever reason, 16 bytes of 0xff
1898  * are returned instead.
1899  */
1900 static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
1901                                 unsigned char *serial_no, int buflen)
1902 {
1903 #define PAGE_83_INQ_BYTES 64
1904         int rc;
1905         unsigned char *buf;
1906         unsigned char scsi3addr[8];
1907
1908         if (buflen > 16)
1909                 buflen = 16;
1910         memset(serial_no, 0xff, buflen);
1911         buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1912         if (!buf)
1913                 return;
1914         memset(serial_no, 0, buflen);
1915         log_unit_to_scsi3addr(h, scsi3addr, logvol);
1916         rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
1917                 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
1918         if (rc == IO_OK)
1919                 memcpy(serial_no, &buf[8], buflen);
1920         kfree(buf);
1921         return;
1922 }
1923
1924 /*
1925  * cciss_add_disk sets up the block device queue for a logical drive
1926  */
1927 static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
1928                                 int drv_index)
1929 {
1930         disk->queue = blk_init_queue(do_cciss_request, &h->lock);
1931         if (!disk->queue)
1932                 goto init_queue_failure;
1933         sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1934         disk->major = h->major;
1935         disk->first_minor = drv_index << NWD_SHIFT;
1936         disk->fops = &cciss_fops;
1937         if (cciss_create_ld_sysfs_entry(h, drv_index))
1938                 goto cleanup_queue;
1939         disk->private_data = h->drv[drv_index];
1940         disk->driverfs_dev = &h->drv[drv_index]->dev;
1941
1942         /* Set up queue information */
1943         blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1944
1945         /* This is a hardware imposed limit. */
1946         blk_queue_max_segments(disk->queue, h->maxsgentries);
1947
1948         blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
1949
1950         blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1951
1952         disk->queue->queuedata = h;
1953
1954         blk_queue_logical_block_size(disk->queue,
1955                                      h->drv[drv_index]->block_size);
1956
1957         /* Make sure all queue data is written out before */
1958         /* setting h->drv[drv_index]->queue, as setting this */
1959         /* allows the interrupt handler to start the queue */
1960         wmb();
1961         h->drv[drv_index]->queue = disk->queue;
1962         add_disk(disk);
1963         return 0;
1964
1965 cleanup_queue:
1966         blk_cleanup_queue(disk->queue);
1967         disk->queue = NULL;
1968 init_queue_failure:
1969         return -1;
1970 }
1971
1972 /* This function will check the usage_count of the drive to be updated/added.
1973  * If the usage_count is zero and it is a heretofore unknown drive, or,
1974  * the drive's capacity, geometry, or serial number has changed,
1975  * then the drive information will be updated and the disk will be
1976  * re-registered with the kernel.  If these conditions don't hold,
1977  * then it will be left alone for the next reboot.  The exception to this
1978  * is disk 0 which will always be left registered with the kernel since it
1979  * is also the controller node.  Any changes to disk 0 will show up on
1980  * the next reboot.
1981  */
1982 static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1983         int first_time, int via_ioctl)
1984 {
1985         struct gendisk *disk;
1986         InquiryData_struct *inq_buff = NULL;
1987         unsigned int block_size;
1988         sector_t total_size;
1989         unsigned long flags = 0;
1990         int ret = 0;
1991         drive_info_struct *drvinfo;
1992
1993         /* Get information about the disk and modify the driver structure */
1994         inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1995         drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
1996         if (inq_buff == NULL || drvinfo == NULL)
1997                 goto mem_msg;
1998
1999         /* testing to see if 16-byte CDBs are already being used */
2000         if (h->cciss_read == CCISS_READ_16) {
2001                 cciss_read_capacity_16(h, drv_index,
2002                         &total_size, &block_size);
2003
2004         } else {
2005                 cciss_read_capacity(h, drv_index, &total_size, &block_size);
2006                 /* if read_capacity returns all F's this volume is >2TB */
2007                 /* in size so we switch to 16-byte CDB's for all */
2008                 /* read/write ops */
2009                 if (total_size == 0xFFFFFFFFULL) {
2010                         cciss_read_capacity_16(h, drv_index,
2011                         &total_size, &block_size);
2012                         h->cciss_read = CCISS_READ_16;
2013                         h->cciss_write = CCISS_WRITE_16;
2014                 } else {
2015                         h->cciss_read = CCISS_READ_10;
2016                         h->cciss_write = CCISS_WRITE_10;
2017                 }
2018         }
2019
2020         cciss_geometry_inquiry(h, drv_index, total_size, block_size,
2021                                inq_buff, drvinfo);
2022         drvinfo->block_size = block_size;
2023         drvinfo->nr_blocks = total_size + 1;
2024
2025         cciss_get_device_descr(h, drv_index, drvinfo->vendor,
2026                                 drvinfo->model, drvinfo->rev);
2027         cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
2028                         sizeof(drvinfo->serial_no));
2029         /* Save the lunid in case we deregister the disk, below. */
2030         memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
2031                 sizeof(drvinfo->LunID));
2032
2033         /* Is it the same disk we already know, and nothing's changed? */
2034         if (h->drv[drv_index]->raid_level != -1 &&
2035                 ((memcmp(drvinfo->serial_no,
2036                                 h->drv[drv_index]->serial_no, 16) == 0) &&
2037                 drvinfo->block_size == h->drv[drv_index]->block_size &&
2038                 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
2039                 drvinfo->heads == h->drv[drv_index]->heads &&
2040                 drvinfo->sectors == h->drv[drv_index]->sectors &&
2041                 drvinfo->cylinders == h->drv[drv_index]->cylinders))
2042                         /* The disk is unchanged, nothing to update */
2043                         goto freeret;
2044
2045         /* If we get here it's not the same disk, or something's changed,
2046          * so we need to * deregister it, and re-register it, if it's not
2047          * in use.
2048          * If the disk already exists then deregister it before proceeding
2049          * (unless it's the first disk (for the controller node).
2050          */
2051         if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
2052                 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
2053                 spin_lock_irqsave(&h->lock, flags);
2054                 h->drv[drv_index]->busy_configuring = 1;
2055                 spin_unlock_irqrestore(&h->lock, flags);
2056
2057                 /* deregister_disk sets h->drv[drv_index]->queue = NULL
2058                  * which keeps the interrupt handler from starting
2059                  * the queue.
2060                  */
2061                 ret = deregister_disk(h, drv_index, 0, via_ioctl);
2062         }
2063
2064         /* If the disk is in use return */
2065         if (ret)
2066                 goto freeret;
2067
2068         /* Save the new information from cciss_geometry_inquiry
2069          * and serial number inquiry.  If the disk was deregistered
2070          * above, then h->drv[drv_index] will be NULL.
2071          */
2072         if (h->drv[drv_index] == NULL) {
2073                 drvinfo->device_initialized = 0;
2074                 h->drv[drv_index] = drvinfo;
2075                 drvinfo = NULL; /* so it won't be freed below. */
2076         } else {
2077                 /* special case for cxd0 */
2078                 h->drv[drv_index]->block_size = drvinfo->block_size;
2079                 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2080                 h->drv[drv_index]->heads = drvinfo->heads;
2081                 h->drv[drv_index]->sectors = drvinfo->sectors;
2082                 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2083                 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2084                 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2085                 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2086                         VENDOR_LEN + 1);
2087                 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2088                 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2089         }
2090
2091         ++h->num_luns;
2092         disk = h->gendisk[drv_index];
2093         set_capacity(disk, h->drv[drv_index]->nr_blocks);
2094
2095         /* If it's not disk 0 (drv_index != 0)
2096          * or if it was disk 0, but there was previously
2097          * no actual corresponding configured logical drive
2098          * (raid_leve == -1) then we want to update the
2099          * logical drive's information.
2100          */
2101         if (drv_index || first_time) {
2102                 if (cciss_add_disk(h, disk, drv_index) != 0) {
2103                         cciss_free_gendisk(h, drv_index);
2104                         cciss_free_drive_info(h, drv_index);
2105                         dev_warn(&h->pdev->dev, "could not update disk %d\n",
2106                                 drv_index);
2107                         --h->num_luns;
2108                 }
2109         }
2110
2111 freeret:
2112         kfree(inq_buff);
2113         kfree(drvinfo);
2114         return;
2115 mem_msg:
2116         dev_err(&h->pdev->dev, "out of memory\n");
2117         goto freeret;
2118 }
2119
2120 /* This function will find the first index of the controllers drive array
2121  * that has a null drv pointer and allocate the drive info struct and
2122  * will return that index   This is where new drives will be added.
2123  * If the index to be returned is greater than the highest_lun index for
2124  * the controller then highest_lun is set * to this new index.
2125  * If there are no available indexes or if tha allocation fails, then -1
2126  * is returned.  * "controller_node" is used to know if this is a real
2127  * logical drive, or just the controller node, which determines if this
2128  * counts towards highest_lun.
2129  */
2130 static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
2131 {
2132         int i;
2133         drive_info_struct *drv;
2134
2135         /* Search for an empty slot for our drive info */
2136         for (i = 0; i < CISS_MAX_LUN; i++) {
2137
2138                 /* if not cxd0 case, and it's occupied, skip it. */
2139                 if (h->drv[i] && i != 0)
2140                         continue;
2141                 /*
2142                  * If it's cxd0 case, and drv is alloc'ed already, and a
2143                  * disk is configured there, skip it.
2144                  */
2145                 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2146                         continue;
2147
2148                 /*
2149                  * We've found an empty slot.  Update highest_lun
2150                  * provided this isn't just the fake cxd0 controller node.
2151                  */
2152                 if (i > h->highest_lun && !controller_node)
2153                         h->highest_lun = i;
2154
2155                 /* If adding a real disk at cxd0, and it's already alloc'ed */
2156                 if (i == 0 && h->drv[i] != NULL)
2157                         return i;
2158
2159                 /*
2160                  * Found an empty slot, not already alloc'ed.  Allocate it.
2161                  * Mark it with raid_level == -1, so we know it's new later on.
2162                  */
2163                 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2164                 if (!drv)
2165                         return -1;
2166                 drv->raid_level = -1; /* so we know it's new */
2167                 h->drv[i] = drv;
2168                 return i;
2169         }
2170         return -1;
2171 }
2172
2173 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2174 {
2175         kfree(h->drv[drv_index]);
2176         h->drv[drv_index] = NULL;
2177 }
2178
2179 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2180 {
2181         put_disk(h->gendisk[drv_index]);
2182         h->gendisk[drv_index] = NULL;
2183 }
2184
2185 /* cciss_add_gendisk finds a free hba[]->drv structure
2186  * and allocates a gendisk if needed, and sets the lunid
2187  * in the drvinfo structure.   It returns the index into
2188  * the ->drv[] array, or -1 if none are free.
2189  * is_controller_node indicates whether highest_lun should
2190  * count this disk, or if it's only being added to provide
2191  * a means to talk to the controller in case no logical
2192  * drives have yet been configured.
2193  */
2194 static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2195         int controller_node)
2196 {
2197         int drv_index;
2198
2199         drv_index = cciss_alloc_drive_info(h, controller_node);
2200         if (drv_index == -1)
2201                 return -1;
2202
2203         /*Check if the gendisk needs to be allocated */
2204         if (!h->gendisk[drv_index]) {
2205                 h->gendisk[drv_index] =
2206                         alloc_disk(1 << NWD_SHIFT);
2207                 if (!h->gendisk[drv_index]) {
2208                         dev_err(&h->pdev->dev,
2209                                 "could not allocate a new disk %d\n",
2210                                 drv_index);
2211                         goto err_free_drive_info;
2212                 }
2213         }
2214         memcpy(h->drv[drv_index]->LunID, lunid,
2215                 sizeof(h->drv[drv_index]->LunID));
2216         if (cciss_create_ld_sysfs_entry(h, drv_index))
2217                 goto err_free_disk;
2218         /* Don't need to mark this busy because nobody */
2219         /* else knows about this disk yet to contend */
2220         /* for access to it. */
2221         h->drv[drv_index]->busy_configuring = 0;
2222         wmb();
2223         return drv_index;
2224
2225 err_free_disk:
2226         cciss_free_gendisk(h, drv_index);
2227 err_free_drive_info:
2228         cciss_free_drive_info(h, drv_index);
2229         return -1;
2230 }
2231
2232 /* This is for the special case of a controller which
2233  * has no logical drives.  In this case, we still need
2234  * to register a disk so the controller can be accessed
2235  * by the Array Config Utility.
2236  */
2237 static void cciss_add_controller_node(ctlr_info_t *h)
2238 {
2239         struct gendisk *disk;
2240         int drv_index;
2241
2242         if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2243                 return;
2244
2245         drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
2246         if (drv_index == -1)
2247                 goto error;
2248         h->drv[drv_index]->block_size = 512;
2249         h->drv[drv_index]->nr_blocks = 0;
2250         h->drv[drv_index]->heads = 0;
2251         h->drv[drv_index]->sectors = 0;
2252         h->drv[drv_index]->cylinders = 0;
2253         h->drv[drv_index]->raid_level = -1;
2254         memset(h->drv[drv_index]->serial_no, 0, 16);
2255         disk = h->gendisk[drv_index];
2256         if (cciss_add_disk(h, disk, drv_index) == 0)
2257                 return;
2258         cciss_free_gendisk(h, drv_index);
2259         cciss_free_drive_info(h, drv_index);
2260 error:
2261         dev_warn(&h->pdev->dev, "could not add disk 0.\n");
2262         return;
2263 }
2264
2265 /* This function will add and remove logical drives from the Logical
2266  * drive array of the controller and maintain persistency of ordering
2267  * so that mount points are preserved until the next reboot.  This allows
2268  * for the removal of logical drives in the middle of the drive array
2269  * without a re-ordering of those drives.
2270  * INPUT
2271  * h            = The controller to perform the operations on
2272  */
2273 static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2274         int via_ioctl)
2275 {
2276         int num_luns;
2277         ReportLunData_struct *ld_buff = NULL;
2278         int return_code;
2279         int listlength = 0;
2280         int i;
2281         int drv_found;
2282         int drv_index = 0;
2283         unsigned char lunid[8] = CTLR_LUNID;
2284         unsigned long flags;
2285
2286         if (!capable(CAP_SYS_RAWIO))
2287                 return -EPERM;
2288
2289         /* Set busy_configuring flag for this operation */
2290         spin_lock_irqsave(&h->lock, flags);
2291         if (h->busy_configuring) {
2292                 spin_unlock_irqrestore(&h->lock, flags);
2293                 return -EBUSY;
2294         }
2295         h->busy_configuring = 1;
2296         spin_unlock_irqrestore(&h->lock, flags);
2297
2298         ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2299         if (ld_buff == NULL)
2300                 goto mem_msg;
2301
2302         return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
2303                                       sizeof(ReportLunData_struct),
2304                                       0, CTLR_LUNID, TYPE_CMD);
2305
2306         if (return_code == IO_OK)
2307                 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2308         else {  /* reading number of logical volumes failed */
2309                 dev_warn(&h->pdev->dev,
2310                         "report logical volume command failed\n");
2311                 listlength = 0;
2312                 goto freeret;
2313         }
2314
2315         num_luns = listlength / 8;      /* 8 bytes per entry */
2316         if (num_luns > CISS_MAX_LUN) {
2317                 num_luns = CISS_MAX_LUN;
2318                 dev_warn(&h->pdev->dev, "more luns configured"
2319                        " on controller than can be handled by"
2320                        " this driver.\n");
2321         }
2322
2323         if (num_luns == 0)
2324                 cciss_add_controller_node(h);
2325
2326         /* Compare controller drive array to driver's drive array
2327          * to see if any drives are missing on the controller due
2328          * to action of Array Config Utility (user deletes drive)
2329          * and deregister logical drives which have disappeared.
2330          */
2331         for (i = 0; i <= h->highest_lun; i++) {
2332                 int j;
2333                 drv_found = 0;
2334
2335                 /* skip holes in the array from already deleted drives */
2336                 if (h->drv[i] == NULL)
2337                         continue;
2338
2339                 for (j = 0; j < num_luns; j++) {
2340                         memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
2341                         if (memcmp(h->drv[i]->LunID, lunid,
2342                                 sizeof(lunid)) == 0) {
2343                                 drv_found = 1;
2344                                 break;
2345                         }
2346                 }
2347                 if (!drv_found) {
2348                         /* Deregister it from the OS, it's gone. */
2349                         spin_lock_irqsave(&h->lock, flags);
2350                         h->drv[i]->busy_configuring = 1;
2351                         spin_unlock_irqrestore(&h->lock, flags);
2352                         return_code = deregister_disk(h, i, 1, via_ioctl);
2353                         if (h->drv[i] != NULL)
2354                                 h->drv[i]->busy_configuring = 0;
2355                 }
2356         }
2357
2358         /* Compare controller drive array to driver's drive array.
2359          * Check for updates in the drive information and any new drives
2360          * on the controller due to ACU adding logical drives, or changing
2361          * a logical drive's size, etc.  Reregister any new/changed drives
2362          */
2363         for (i = 0; i < num_luns; i++) {
2364                 int j;
2365
2366                 drv_found = 0;
2367
2368                 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
2369                 /* Find if the LUN is already in the drive array
2370                  * of the driver.  If so then update its info
2371                  * if not in use.  If it does not exist then find
2372                  * the first free index and add it.
2373                  */
2374                 for (j = 0; j <= h->highest_lun; j++) {
2375                         if (h->drv[j] != NULL &&
2376                                 memcmp(h->drv[j]->LunID, lunid,
2377                                         sizeof(h->drv[j]->LunID)) == 0) {
2378                                 drv_index = j;
2379                                 drv_found = 1;
2380                                 break;
2381                         }
2382                 }
2383
2384                 /* check if the drive was found already in the array */
2385                 if (!drv_found) {
2386                         drv_index = cciss_add_gendisk(h, lunid, 0);
2387                         if (drv_index == -1)
2388                                 goto freeret;
2389                 }
2390                 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
2391         }               /* end for */
2392
2393 freeret:
2394         kfree(ld_buff);
2395         h->busy_configuring = 0;
2396         /* We return -1 here to tell the ACU that we have registered/updated
2397          * all of the drives that we can and to keep it from calling us
2398          * additional times.
2399          */
2400         return -1;
2401 mem_msg:
2402         dev_err(&h->pdev->dev, "out of memory\n");
2403         h->busy_configuring = 0;
2404         goto freeret;
2405 }
2406
2407 static void cciss_clear_drive_info(drive_info_struct *drive_info)
2408 {
2409         /* zero out the disk size info */
2410         drive_info->nr_blocks = 0;
2411         drive_info->block_size = 0;
2412         drive_info->heads = 0;
2413         drive_info->sectors = 0;
2414         drive_info->cylinders = 0;
2415         drive_info->raid_level = -1;
2416         memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2417         memset(drive_info->model, 0, sizeof(drive_info->model));
2418         memset(drive_info->rev, 0, sizeof(drive_info->rev));
2419         memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2420         /*
2421          * don't clear the LUNID though, we need to remember which
2422          * one this one is.
2423          */
2424 }
2425
2426 /* This function will deregister the disk and it's queue from the
2427  * kernel.  It must be called with the controller lock held and the
2428  * drv structures busy_configuring flag set.  It's parameters are:
2429  *
2430  * disk = This is the disk to be deregistered
2431  * drv  = This is the drive_info_struct associated with the disk to be
2432  *        deregistered.  It contains information about the disk used
2433  *        by the driver.
2434  * clear_all = This flag determines whether or not the disk information
2435  *             is going to be completely cleared out and the highest_lun
2436  *             reset.  Sometimes we want to clear out information about
2437  *             the disk in preparation for re-adding it.  In this case
2438  *             the highest_lun should be left unchanged and the LunID
2439  *             should not be cleared.
2440  * via_ioctl
2441  *    This indicates whether we've reached this path via ioctl.
2442  *    This affects the maximum usage count allowed for c0d0 to be messed with.
2443  *    If this path is reached via ioctl(), then the max_usage_count will
2444  *    be 1, as the process calling ioctl() has got to have the device open.
2445  *    If we get here via sysfs, then the max usage count will be zero.
2446 */
2447 static int deregister_disk(ctlr_info_t *h, int drv_index,
2448                            int clear_all, int via_ioctl)
2449 {
2450         int i;
2451         struct gendisk *disk;
2452         drive_info_struct *drv;
2453         int recalculate_highest_lun;
2454
2455         if (!capable(CAP_SYS_RAWIO))
2456                 return -EPERM;
2457
2458         drv = h->drv[drv_index];
2459         disk = h->gendisk[drv_index];
2460
2461         /* make sure logical volume is NOT is use */
2462         if (clear_all || (h->gendisk[0] == disk)) {
2463                 if (drv->usage_count > via_ioctl)
2464                         return -EBUSY;
2465         } else if (drv->usage_count > 0)
2466                 return -EBUSY;
2467
2468         recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2469
2470         /* invalidate the devices and deregister the disk.  If it is disk
2471          * zero do not deregister it but just zero out it's values.  This
2472          * allows us to delete disk zero but keep the controller registered.
2473          */
2474         if (h->gendisk[0] != disk) {
2475                 struct request_queue *q = disk->queue;
2476                 if (disk->flags & GENHD_FL_UP) {
2477                         cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
2478                         del_gendisk(disk);
2479                 }
2480                 if (q)
2481                         blk_cleanup_queue(q);
2482                 /* If clear_all is set then we are deleting the logical
2483                  * drive, not just refreshing its info.  For drives
2484                  * other than disk 0 we will call put_disk.  We do not
2485                  * do this for disk 0 as we need it to be able to
2486                  * configure the controller.
2487                  */
2488                 if (clear_all){
2489                         /* This isn't pretty, but we need to find the
2490                          * disk in our array and NULL our the pointer.
2491                          * This is so that we will call alloc_disk if
2492                          * this index is used again later.
2493                          */
2494                         for (i=0; i < CISS_MAX_LUN; i++){
2495                                 if (h->gendisk[i] == disk) {
2496                                         h->gendisk[i] = NULL;
2497                                         break;
2498                                 }
2499                         }
2500                         put_disk(disk);
2501                 }
2502         } else {
2503                 set_capacity(disk, 0);
2504                 cciss_clear_drive_info(drv);
2505         }
2506
2507         --h->num_luns;
2508
2509         /* if it was the last disk, find the new hightest lun */
2510         if (clear_all && recalculate_highest_lun) {
2511                 int newhighest = -1;
2512                 for (i = 0; i <= h->highest_lun; i++) {
2513                         /* if the disk has size > 0, it is available */
2514                         if (h->drv[i] && h->drv[i]->heads)
2515                                 newhighest = i;
2516                 }
2517                 h->highest_lun = newhighest;
2518         }
2519         return 0;
2520 }
2521
2522 static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
2523                 size_t size, __u8 page_code, unsigned char *scsi3addr,
2524                 int cmd_type)
2525 {
2526         u64bit buff_dma_handle;
2527         int status = IO_OK;
2528
2529         c->cmd_type = CMD_IOCTL_PEND;
2530         c->Header.ReplyQueue = 0;
2531         if (buff != NULL) {
2532                 c->Header.SGList = 1;
2533                 c->Header.SGTotal = 1;
2534         } else {
2535                 c->Header.SGList = 0;
2536                 c->Header.SGTotal = 0;
2537         }
2538         c->Header.Tag.lower = c->busaddr;
2539         memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2540
2541         c->Request.Type.Type = cmd_type;
2542         if (cmd_type == TYPE_CMD) {
2543                 switch (cmd) {
2544                 case CISS_INQUIRY:
2545                         /* are we trying to read a vital product page */
2546                         if (page_code != 0) {
2547                                 c->Request.CDB[1] = 0x01;
2548                                 c->Request.CDB[2] = page_code;
2549                         }
2550                         c->Request.CDBLen = 6;
2551                         c->Request.Type.Attribute = ATTR_SIMPLE;
2552                         c->Request.Type.Direction = XFER_READ;
2553                         c->Request.Timeout = 0;
2554                         c->Request.CDB[0] = CISS_INQUIRY;
2555                         c->Request.CDB[4] = size & 0xFF;
2556                         break;
2557                 case CISS_REPORT_LOG:
2558                 case CISS_REPORT_PHYS:
2559                         /* Talking to controller so It's a physical command
2560                            mode = 00 target = 0.  Nothing to write.
2561                          */
2562                         c->Request.CDBLen = 12;
2563                         c->Request.Type.Attribute = ATTR_SIMPLE;
2564                         c->Request.Type.Direction = XFER_READ;
2565                         c->Request.Timeout = 0;
2566                         c->Request.CDB[0] = cmd;
2567                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2568                         c->Request.CDB[7] = (size >> 16) & 0xFF;
2569                         c->Request.CDB[8] = (size >> 8) & 0xFF;
2570                         c->Request.CDB[9] = size & 0xFF;
2571                         break;
2572
2573                 case CCISS_READ_CAPACITY:
2574                         c->Request.CDBLen = 10;
2575                         c->Request.Type.Attribute = ATTR_SIMPLE;
2576                         c->Request.Type.Direction = XFER_READ;
2577                         c->Request.Timeout = 0;
2578                         c->Request.CDB[0] = cmd;
2579                         break;
2580                 case CCISS_READ_CAPACITY_16:
2581                         c->Request.CDBLen = 16;
2582                         c->Request.Type.Attribute = ATTR_SIMPLE;
2583                         c->Request.Type.Direction = XFER_READ;
2584                         c->Request.Timeout = 0;
2585                         c->Request.CDB[0] = cmd;
2586                         c->Request.CDB[1] = 0x10;
2587                         c->Request.CDB[10] = (size >> 24) & 0xFF;
2588                         c->Request.CDB[11] = (size >> 16) & 0xFF;
2589                         c->Request.CDB[12] = (size >> 8) & 0xFF;
2590                         c->Request.CDB[13] = size & 0xFF;
2591                         c->Request.Timeout = 0;
2592                         c->Request.CDB[0] = cmd;
2593                         break;
2594                 case CCISS_CACHE_FLUSH:
2595                         c->Request.CDBLen = 12;
2596                         c->Request.Type.Attribute = ATTR_SIMPLE;
2597                         c->Request.Type.Direction = XFER_WRITE;
2598                         c->Request.Timeout = 0;
2599                         c->Request.CDB[0] = BMIC_WRITE;
2600                         c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2601                         c->Request.CDB[7] = (size >> 8) & 0xFF;
2602                         c->Request.CDB[8] = size & 0xFF;
2603                         break;
2604                 case TEST_UNIT_READY:
2605                         c->Request.CDBLen = 6;
2606                         c->Request.Type.Attribute = ATTR_SIMPLE;
2607                         c->Request.Type.Direction = XFER_NONE;
2608                         c->Request.Timeout = 0;
2609                         break;
2610                 default:
2611                         dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
2612                         return IO_ERROR;
2613                 }
2614         } else if (cmd_type == TYPE_MSG) {
2615                 switch (cmd) {
2616                 case CCISS_ABORT_MSG:
2617                         c->Request.CDBLen = 12;
2618                         c->Request.Type.Attribute = ATTR_SIMPLE;
2619                         c->Request.Type.Direction = XFER_WRITE;
2620                         c->Request.Timeout = 0;
2621                         c->Request.CDB[0] = cmd;        /* abort */
2622                         c->Request.CDB[1] = 0;  /* abort a command */
2623                         /* buff contains the tag of the command to abort */
2624                         memcpy(&c->Request.CDB[4], buff, 8);
2625                         break;
2626                 case CCISS_RESET_MSG:
2627                         c->Request.CDBLen = 16;
2628                         c->Request.Type.Attribute = ATTR_SIMPLE;
2629                         c->Request.Type.Direction = XFER_NONE;
2630                         c->Request.Timeout = 0;
2631                         memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2632                         c->Request.CDB[0] = cmd;        /* reset */
2633                         c->Request.CDB[1] = CCISS_RESET_TYPE_TARGET;
2634                         break;
2635                 case CCISS_NOOP_MSG:
2636                         c->Request.CDBLen = 1;
2637                         c->Request.Type.Attribute = ATTR_SIMPLE;
2638                         c->Request.Type.Direction = XFER_WRITE;
2639                         c->Request.Timeout = 0;
2640                         c->Request.CDB[0] = cmd;
2641                         break;
2642                 default:
2643                         dev_warn(&h->pdev->dev,
2644                                 "unknown message type %d\n", cmd);
2645                         return IO_ERROR;
2646                 }
2647         } else {
2648                 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2649                 return IO_ERROR;
2650         }
2651         /* Fill in the scatter gather information */
2652         if (size > 0) {
2653                 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
2654                                                              buff, size,
2655                                                              PCI_DMA_BIDIRECTIONAL);
2656                 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2657                 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2658                 c->SG[0].Len = size;
2659                 c->SG[0].Ext = 0;       /* we are not chaining */
2660         }
2661         return status;
2662 }
2663
2664 static int cciss_send_reset(ctlr_info_t *h, unsigned char *scsi3addr,
2665                             u8 reset_type)
2666 {
2667         CommandList_struct *c;
2668         int return_status;
2669
2670         c = cmd_alloc(h);
2671         if (!c)
2672                 return -ENOMEM;
2673         return_status = fill_cmd(h, c, CCISS_RESET_MSG, NULL, 0, 0,
2674                 CTLR_LUNID, TYPE_MSG);
2675         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2676         if (return_status != IO_OK) {
2677                 cmd_special_free(h, c);
2678                 return return_status;
2679         }
2680         c->waiting = NULL;
2681         enqueue_cmd_and_start_io(h, c);
2682         /* Don't wait for completion, the reset won't complete.  Don't free
2683          * the command either.  This is the last command we will send before
2684          * re-initializing everything, so it doesn't matter and won't leak.
2685          */
2686         return 0;
2687 }
2688
2689 static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2690 {
2691         switch (c->err_info->ScsiStatus) {
2692         case SAM_STAT_GOOD:
2693                 return IO_OK;
2694         case SAM_STAT_CHECK_CONDITION:
2695                 switch (0xf & c->err_info->SenseInfo[2]) {
2696                 case 0: return IO_OK; /* no sense */
2697                 case 1: return IO_OK; /* recovered error */
2698                 default:
2699                         if (check_for_unit_attention(h, c))
2700                                 return IO_NEEDS_RETRY;
2701                         dev_warn(&h->pdev->dev, "cmd 0x%02x "
2702                                 "check condition, sense key = 0x%02x\n",
2703                                 c->Request.CDB[0], c->err_info->SenseInfo[2]);
2704                 }
2705                 break;
2706         default:
2707                 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2708                         "scsi status = 0x%02x\n",
2709                         c->Request.CDB[0], c->err_info->ScsiStatus);
2710                 break;
2711         }
2712         return IO_ERROR;
2713 }
2714
2715 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
2716 {
2717         int return_status = IO_OK;
2718
2719         if (c->err_info->CommandStatus == CMD_SUCCESS)
2720                 return IO_OK;
2721
2722         switch (c->err_info->CommandStatus) {
2723         case CMD_TARGET_STATUS:
2724                 return_status = check_target_status(h, c);
2725                 break;
2726         case CMD_DATA_UNDERRUN:
2727         case CMD_DATA_OVERRUN:
2728                 /* expected for inquiry and report lun commands */
2729                 break;
2730         case CMD_INVALID:
2731                 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
2732                        "reported invalid\n", c->Request.CDB[0]);
2733                 return_status = IO_ERROR;
2734                 break;
2735         case CMD_PROTOCOL_ERR:
2736                 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2737                        "protocol error\n", c->Request.CDB[0]);
2738                 return_status = IO_ERROR;
2739                 break;
2740         case CMD_HARDWARE_ERR:
2741                 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2742                        " hardware error\n", c->Request.CDB[0]);
2743                 return_status = IO_ERROR;
2744                 break;
2745         case CMD_CONNECTION_LOST:
2746                 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2747                        "connection lost\n", c->Request.CDB[0]);
2748                 return_status = IO_ERROR;
2749                 break;
2750         case CMD_ABORTED:
2751                 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
2752                        "aborted\n", c->Request.CDB[0]);
2753                 return_status = IO_ERROR;
2754                 break;
2755         case CMD_ABORT_FAILED:
2756                 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
2757                        "abort failed\n", c->Request.CDB[0]);
2758                 return_status = IO_ERROR;
2759                 break;
2760         case CMD_UNSOLICITED_ABORT:
2761                 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
2762                         c->Request.CDB[0]);
2763                 return_status = IO_NEEDS_RETRY;
2764                 break;
2765         case CMD_UNABORTABLE:
2766                 dev_warn(&h->pdev->dev, "cmd unabortable\n");
2767                 return_status = IO_ERROR;
2768                 break;
2769         default:
2770                 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
2771                        "unknown status %x\n", c->Request.CDB[0],
2772                        c->err_info->CommandStatus);
2773                 return_status = IO_ERROR;
2774         }
2775         return return_status;
2776 }
2777
2778 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2779         int attempt_retry)
2780 {
2781         DECLARE_COMPLETION_ONSTACK(wait);
2782         u64bit buff_dma_handle;
2783         int return_status = IO_OK;
2784
2785 resend_cmd2:
2786         c->waiting = &wait;
2787         enqueue_cmd_and_start_io(h, c);
2788
2789         wait_for_completion(&wait);
2790
2791         if (c->err_info->CommandStatus == 0 || !attempt_retry)
2792                 goto command_done;
2793
2794         return_status = process_sendcmd_error(h, c);
2795
2796         if (return_status == IO_NEEDS_RETRY &&
2797                 c->retry_count < MAX_CMD_RETRIES) {
2798                 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
2799                         c->Request.CDB[0]);
2800                 c->retry_count++;
2801                 /* erase the old error information */
2802                 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2803                 return_status = IO_OK;
2804                 INIT_COMPLETION(wait);
2805                 goto resend_cmd2;
2806         }
2807
2808 command_done:
2809         /* unlock the buffers from DMA */
2810         buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2811         buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
2812         pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2813                          c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
2814         return return_status;
2815 }
2816
2817 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
2818                            __u8 page_code, unsigned char scsi3addr[],
2819                         int cmd_type)
2820 {
2821         CommandList_struct *c;
2822         int return_status;
2823
2824         c = cmd_special_alloc(h);
2825         if (!c)
2826                 return -ENOMEM;
2827         return_status = fill_cmd(h, c, cmd, buff, size, page_code,
2828                 scsi3addr, cmd_type);
2829         if (return_status == IO_OK)
2830                 return_status = sendcmd_withirq_core(h, c, 1);
2831
2832         cmd_special_free(h, c);
2833         return return_status;
2834 }
2835
2836 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
2837                                    sector_t total_size,
2838                                    unsigned int block_size,
2839                                    InquiryData_struct *inq_buff,
2840                                    drive_info_struct *drv)
2841 {
2842         int return_code;
2843         unsigned long t;
2844         unsigned char scsi3addr[8];
2845
2846         memset(inq_buff, 0, sizeof(InquiryData_struct));
2847         log_unit_to_scsi3addr(h, scsi3addr, logvol);
2848         return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
2849                         sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
2850         if (return_code == IO_OK) {
2851                 if (inq_buff->data_byte[8] == 0xFF) {
2852                         dev_warn(&h->pdev->dev,
2853                                "reading geometry failed, volume "
2854                                "does not support reading geometry\n");
2855                         drv->heads = 255;
2856                         drv->sectors = 32;      /* Sectors per track */
2857                         drv->cylinders = total_size + 1;
2858                         drv->raid_level = RAID_UNKNOWN;
2859                 } else {
2860                         drv->heads = inq_buff->data_byte[6];
2861                         drv->sectors = inq_buff->data_byte[7];
2862                         drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2863                         drv->cylinders += inq_buff->data_byte[5];
2864                         drv->raid_level = inq_buff->data_byte[8];
2865                 }
2866                 drv->block_size = block_size;
2867                 drv->nr_blocks = total_size + 1;
2868                 t = drv->heads * drv->sectors;
2869                 if (t > 1) {
2870                         sector_t real_size = total_size + 1;
2871                         unsigned long rem = sector_div(real_size, t);
2872                         if (rem)
2873                                 real_size++;
2874                         drv->cylinders = real_size;
2875                 }
2876         } else {                /* Get geometry failed */
2877                 dev_warn(&h->pdev->dev, "reading geometry failed\n");
2878         }
2879 }
2880
2881 static void
2882 cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
2883                     unsigned int *block_size)
2884 {
2885         ReadCapdata_struct *buf;
2886         int return_code;
2887         unsigned char scsi3addr[8];
2888
2889         buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2890         if (!buf) {
2891                 dev_warn(&h->pdev->dev, "out of memory\n");
2892                 return;
2893         }
2894
2895         log_unit_to_scsi3addr(h, scsi3addr, logvol);
2896         return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
2897                 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
2898         if (return_code == IO_OK) {
2899                 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2900                 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2901         } else {                /* read capacity command failed */
2902                 dev_warn(&h->pdev->dev, "read capacity failed\n");
2903                 *total_size = 0;
2904                 *block_size = BLOCK_SIZE;
2905         }
2906         kfree(buf);
2907 }
2908
2909 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
2910         sector_t *total_size, unsigned int *block_size)
2911 {
2912         ReadCapdata_struct_16 *buf;
2913         int return_code;
2914         unsigned char scsi3addr[8];
2915
2916         buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2917         if (!buf) {
2918                 dev_warn(&h->pdev->dev, "out of memory\n");
2919                 return;
2920         }
2921
2922         log_unit_to_scsi3addr(h, scsi3addr, logvol);
2923         return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2924                 buf, sizeof(ReadCapdata_struct_16),
2925                         0, scsi3addr, TYPE_CMD);
2926         if (return_code == IO_OK) {
2927                 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2928                 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2929         } else {                /* read capacity command failed */
2930                 dev_warn(&h->pdev->dev, "read capacity failed\n");
2931                 *total_size = 0;
2932                 *block_size = BLOCK_SIZE;
2933         }
2934         dev_info(&h->pdev->dev, "      blocks= %llu block_size= %d\n",
2935                (unsigned long long)*total_size+1, *block_size);
2936         kfree(buf);
2937 }
2938
2939 static int cciss_revalidate(struct gendisk *disk)
2940 {
2941         ctlr_info_t *h = get_host(disk);
2942         drive_info_struct *drv = get_drv(disk);
2943         int logvol;
2944         int FOUND = 0;
2945         unsigned int block_size;
2946         sector_t total_size;
2947         InquiryData_struct *inq_buff = NULL;
2948
2949         for (logvol = 0; logvol <= h->highest_lun; logvol++) {
2950                 if (!h->drv[logvol])
2951                         continue;
2952                 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
2953                         sizeof(drv->LunID)) == 0) {
2954                         FOUND = 1;
2955                         break;
2956                 }
2957         }
2958
2959         if (!FOUND)
2960                 return 1;
2961
2962         inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2963         if (inq_buff == NULL) {
2964                 dev_warn(&h->pdev->dev, "out of memory\n");
2965                 return 1;
2966         }
2967         if (h->cciss_read == CCISS_READ_10) {
2968                 cciss_read_capacity(h, logvol,
2969                                         &total_size, &block_size);
2970         } else {
2971                 cciss_read_capacity_16(h, logvol,
2972                                         &total_size, &block_size);
2973         }
2974         cciss_geometry_inquiry(h, logvol, total_size, block_size,
2975                                inq_buff, drv);
2976
2977         blk_queue_logical_block_size(drv->queue, drv->block_size);
2978         set_capacity(disk, drv->nr_blocks);
2979
2980         kfree(inq_buff);
2981         return 0;
2982 }
2983
2984 /*
2985  * Map (physical) PCI mem into (virtual) kernel space
2986  */
2987 static void __iomem *remap_pci_mem(ulong base, ulong size)
2988 {
2989         ulong page_base = ((ulong) base) & PAGE_MASK;
2990         ulong page_offs = ((ulong) base) - page_base;
2991         void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2992
2993         return page_remapped ? (page_remapped + page_offs) : NULL;
2994 }
2995
2996 /*
2997  * Takes jobs of the Q and sends them to the hardware, then puts it on
2998  * the Q to wait for completion.
2999  */
3000 static void start_io(ctlr_info_t *h)
3001 {
3002         CommandList_struct *c;
3003
3004         while (!list_empty(&h->reqQ)) {
3005                 c = list_entry(h->reqQ.next, CommandList_struct, list);
3006                 /* can't do anything if fifo is full */
3007                 if ((h->access.fifo_full(h))) {
3008                         dev_warn(&h->pdev->dev, "fifo full\n");
3009                         break;
3010                 }
3011
3012                 /* Get the first entry from the Request Q */
3013                 removeQ(c);
3014                 h->Qdepth--;
3015
3016                 /* Tell the controller execute command */
3017                 h->access.submit_command(h, c);
3018
3019                 /* Put job onto the completed Q */
3020                 addQ(&h->cmpQ, c);
3021         }
3022 }
3023
3024 /* Assumes that h->lock is held. */
3025 /* Zeros out the error record and then resends the command back */
3026 /* to the controller */
3027 static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
3028 {
3029         /* erase the old error information */
3030         memset(c->err_info, 0, sizeof(ErrorInfo_struct));
3031
3032         /* add it to software queue and then send it to the controller */
3033         addQ(&h->reqQ, c);
3034         h->Qdepth++;
3035         if (h->Qdepth > h->maxQsinceinit)
3036                 h->maxQsinceinit = h->Qdepth;
3037
3038         start_io(h);
3039 }
3040
3041 static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
3042         unsigned int msg_byte, unsigned int host_byte,
3043         unsigned int driver_byte)
3044 {
3045         /* inverse of macros in scsi.h */
3046         return (scsi_status_byte & 0xff) |
3047                 ((msg_byte & 0xff) << 8) |
3048                 ((host_byte & 0xff) << 16) |
3049                 ((driver_byte & 0xff) << 24);
3050 }
3051
3052 static inline int evaluate_target_status(ctlr_info_t *h,
3053                         CommandList_struct *cmd, int *retry_cmd)
3054 {
3055         unsigned char sense_key;
3056         unsigned char status_byte, msg_byte, host_byte, driver_byte;
3057         int error_value;
3058
3059         *retry_cmd = 0;
3060         /* If we get in here, it means we got "target status", that is, scsi status */
3061         status_byte = cmd->err_info->ScsiStatus;
3062         driver_byte = DRIVER_OK;
3063         msg_byte = cmd->err_info->CommandStatus; /* correct?  seems too device specific */
3064
3065         if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
3066                 host_byte = DID_PASSTHROUGH;
3067         else
3068                 host_byte = DID_OK;
3069
3070         error_value = make_status_bytes(status_byte, msg_byte,
3071                 host_byte, driver_byte);
3072
3073         if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
3074                 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
3075                         dev_warn(&h->pdev->dev, "cmd %p "
3076                                "has SCSI Status 0x%x\n",
3077                                cmd, cmd->err_info->ScsiStatus);
3078                 return error_value;
3079         }
3080
3081         /* check the sense key */
3082         sense_key = 0xf & cmd->err_info->SenseInfo[2];
3083         /* no status or recovered error */
3084         if (((sense_key == 0x0) || (sense_key == 0x1)) &&
3085             (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
3086                 error_value = 0;
3087
3088         if (check_for_unit_attention(h, cmd)) {
3089                 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
3090                 return 0;
3091         }
3092
3093         /* Not SG_IO or similar? */
3094         if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
3095                 if (error_value != 0)
3096                         dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
3097                                " sense key = 0x%x\n", cmd, sense_key);
3098                 return error_value;
3099         }
3100
3101         /* SG_IO or similar, copy sense data back */
3102         if (cmd->rq->sense) {
3103                 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3104                         cmd->rq->sense_len = cmd->err_info->SenseLen;
3105                 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3106                         cmd->rq->sense_len);
3107         } else
3108                 cmd->rq->sense_len = 0;
3109
3110         return error_value;
3111 }
3112
3113 /* checks the status of the job and calls complete buffers to mark all
3114  * buffers for the completed job. Note that this function does not need
3115  * to hold the hba/queue lock.
3116  */
3117 static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3118                                     int timeout)
3119 {
3120         int retry_cmd = 0;
3121         struct request *rq = cmd->rq;
3122
3123         rq->errors = 0;
3124
3125         if (timeout)
3126                 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
3127
3128         if (cmd->err_info->CommandStatus == 0)  /* no error has occurred */
3129                 goto after_error_processing;
3130
3131         switch (cmd->err_info->CommandStatus) {
3132         case CMD_TARGET_STATUS:
3133                 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
3134                 break;
3135         case CMD_DATA_UNDERRUN:
3136                 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
3137                         dev_warn(&h->pdev->dev, "cmd %p has"
3138                                " completed with data underrun "
3139                                "reported\n", cmd);
3140                         cmd->rq->resid_len = cmd->err_info->ResidualCnt;
3141                 }
3142                 break;
3143         case CMD_DATA_OVERRUN:
3144                 if (cmd->rq->cmd_type == REQ_TYPE_FS)
3145                         dev_warn(&h->pdev->dev, "cciss: cmd %p has"
3146                                " completed with data overrun "
3147                                "reported\n", cmd);
3148                 break;
3149         case CMD_INVALID:
3150                 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
3151                        "reported invalid\n", cmd);
3152                 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3153                         cmd->err_info->CommandStatus, DRIVER_OK,
3154                         (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3155                                 DID_PASSTHROUGH : DID_ERROR);
3156                 break;
3157         case CMD_PROTOCOL_ERR:
3158                 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3159                        "protocol error\n", cmd);
3160                 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3161                         cmd->err_info->CommandStatus, DRIVER_OK,
3162                         (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3163                                 DID_PASSTHROUGH : DID_ERROR);
3164                 break;
3165         case CMD_HARDWARE_ERR:
3166                 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3167                        " hardware error\n", cmd);
3168                 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3169                         cmd->err_info->CommandStatus, DRIVER_OK,
3170                         (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3171                                 DID_PASSTHROUGH : DID_ERROR);
3172                 break;
3173         case CMD_CONNECTION_LOST:
3174                 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3175                        "connection lost\n", cmd);
3176                 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3177                         cmd->err_info->CommandStatus, DRIVER_OK,
3178                         (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3179                                 DID_PASSTHROUGH : DID_ERROR);
3180                 break;
3181         case CMD_ABORTED:
3182                 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
3183                        "aborted\n", cmd);
3184                 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3185                         cmd->err_info->CommandStatus, DRIVER_OK,
3186                         (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3187                                 DID_PASSTHROUGH : DID_ABORT);
3188                 break;
3189         case CMD_ABORT_FAILED:
3190                 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
3191                        "abort failed\n", cmd);
3192                 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3193                         cmd->err_info->CommandStatus, DRIVER_OK,
3194                         (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3195                                 DID_PASSTHROUGH : DID_ERROR);
3196                 break;
3197         case CMD_UNSOLICITED_ABORT:
3198                 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
3199                        "abort %p\n", h->ctlr, cmd);
3200                 if (cmd->retry_count < MAX_CMD_RETRIES) {
3201                         retry_cmd = 1;
3202                         dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
3203                         cmd->retry_count++;
3204                 } else
3205                         dev_warn(&h->pdev->dev,
3206                                 "%p retried too many times\n", cmd);
3207                 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3208                         cmd->err_info->CommandStatus, DRIVER_OK,
3209                         (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3210                                 DID_PASSTHROUGH : DID_ABORT);
3211                 break;
3212         case CMD_TIMEOUT:
3213                 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
3214                 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3215                         cmd->err_info->CommandStatus, DRIVER_OK,
3216                         (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3217                                 DID_PASSTHROUGH : DID_ERROR);
3218                 break;
3219         case CMD_UNABORTABLE:
3220                 dev_warn(&h->pdev->dev, "cmd %p unabortable\n", cmd);
3221                 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3222                         cmd->err_info->CommandStatus, DRIVER_OK,
3223                         cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC ?
3224                                 DID_PASSTHROUGH : DID_ERROR);
3225                 break;
3226         default:
3227                 dev_warn(&h->pdev->dev, "cmd %p returned "
3228                        "unknown status %x\n", cmd,
3229                        cmd->err_info->CommandStatus);
3230                 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3231                         cmd->err_info->CommandStatus, DRIVER_OK,
3232                         (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3233                                 DID_PASSTHROUGH : DID_ERROR);
3234         }
3235
3236 after_error_processing:
3237
3238         /* We need to return this command */
3239         if (retry_cmd) {
3240                 resend_cciss_cmd(h, cmd);
3241                 return;
3242         }
3243         cmd->rq->completion_data = cmd;
3244         blk_complete_request(cmd->rq);
3245 }
3246
3247 static inline u32 cciss_tag_contains_index(u32 tag)
3248 {
3249 #define DIRECT_LOOKUP_BIT 0x10
3250         return tag & DIRECT_LOOKUP_BIT;
3251 }
3252
3253 static inline u32 cciss_tag_to_index(u32 tag)
3254 {
3255 #define DIRECT_LOOKUP_SHIFT 5
3256         return tag >> DIRECT_LOOKUP_SHIFT;
3257 }
3258
3259 static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag)
3260 {
3261 #define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3262 #define CCISS_SIMPLE_ERROR_BITS 0x03
3263         if (likely(h->transMethod & CFGTBL_Trans_Performant))
3264                 return tag & ~CCISS_PERF_ERROR_BITS;
3265         return tag & ~CCISS_SIMPLE_ERROR_BITS;
3266 }
3267
3268 static inline void cciss_mark_tag_indexed(u32 *tag)
3269 {
3270         *tag |= DIRECT_LOOKUP_BIT;
3271 }
3272
3273 static inline void cciss_set_tag_index(u32 *tag, u32 index)
3274 {
3275         *tag |= (index << DIRECT_LOOKUP_SHIFT);
3276 }
3277
3278 /*
3279  * Get a request and submit it to the controller.
3280  */
3281 static void do_cciss_request(struct request_queue *q)
3282 {
3283         ctlr_info_t *h = q->queuedata;
3284         CommandList_struct *c;
3285         sector_t start_blk;
3286         int seg;
3287         struct request *creq;
3288         u64bit temp64;
3289         struct scatterlist *tmp_sg;
3290         SGDescriptor_struct *curr_sg;
3291         drive_info_struct *drv;
3292         int i, dir;
3293         int sg_index = 0;
3294         int chained = 0;
3295
3296       queue:
3297         creq = blk_peek_request(q);
3298         if (!creq)
3299                 goto startio;
3300
3301         BUG_ON(creq->nr_phys_segments > h->maxsgentries);
3302
3303         c = cmd_alloc(h);
3304         if (!c)
3305                 goto full;
3306
3307         blk_start_request(creq);
3308
3309         tmp_sg = h->scatter_list[c->cmdindex];
3310         spin_unlock_irq(q->queue_lock);
3311
3312         c->cmd_type = CMD_RWREQ;
3313         c->rq = creq;
3314
3315         /* fill in the request */
3316         drv = creq->rq_disk->private_data;
3317         c->Header.ReplyQueue = 0;       /* unused in simple mode */
3318         /* got command from pool, so use the command block index instead */
3319         /* for direct lookups. */
3320         /* The first 2 bits are reserved for controller error reporting. */
3321         cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3322         cciss_mark_tag_indexed(&c->Header.Tag.lower);
3323         memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
3324         c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3325         c->Request.Type.Type = TYPE_CMD;        /* It is a command. */
3326         c->Request.Type.Attribute = ATTR_SIMPLE;
3327         c->Request.Type.Direction =
3328             (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
3329         c->Request.Timeout = 0; /* Don't time out */
3330         c->Request.CDB[0] =
3331             (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
3332         start_blk = blk_rq_pos(creq);
3333         dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
3334                (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
3335         sg_init_table(tmp_sg, h->maxsgentries);
3336         seg = blk_rq_map_sg(q, creq, tmp_sg);
3337
3338         /* get the DMA records for the setup */
3339         if (c->Request.Type.Direction == XFER_READ)
3340                 dir = PCI_DMA_FROMDEVICE;
3341         else
3342                 dir = PCI_DMA_TODEVICE;
3343
3344         curr_sg = c->SG;
3345         sg_index = 0;
3346         chained = 0;
3347
3348         for (i = 0; i < seg; i++) {
3349                 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3350                         !chained && ((seg - i) > 1)) {
3351                         /* Point to next chain block. */
3352                         curr_sg = h->cmd_sg_list[c->cmdindex];
3353                         sg_index = 0;
3354                         chained = 1;
3355                 }
3356                 curr_sg[sg_index].Len = tmp_sg[i].length;
3357                 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
3358                                                 tmp_sg[i].offset,
3359                                                 tmp_sg[i].length, dir);
3360                 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3361                 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3362                 curr_sg[sg_index].Ext = 0;  /* we are not chaining */
3363                 ++sg_index;
3364         }
3365         if (chained)
3366                 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3367                         (seg - (h->max_cmd_sgentries - 1)) *
3368                                 sizeof(SGDescriptor_struct));
3369
3370         /* track how many SG entries we are using */
3371         if (seg > h->maxSG)
3372                 h->maxSG = seg;
3373
3374         dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
3375                         "chained[%d]\n",
3376                         blk_rq_sectors(creq), seg, chained);
3377
3378         c->Header.SGTotal = seg + chained;
3379         if (seg <= h->max_cmd_sgentries)
3380                 c->Header.SGList = c->Header.SGTotal;
3381         else
3382                 c->Header.SGList = h->max_cmd_sgentries;
3383         set_performant_mode(h, c);
3384
3385         if (likely(creq->cmd_type == REQ_TYPE_FS)) {
3386                 if(h->cciss_read == CCISS_READ_10) {
3387                         c->Request.CDB[1] = 0;
3388                         c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
3389                         c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3390                         c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3391                         c->Request.CDB[5] = start_blk & 0xff;
3392                         c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
3393                         c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3394                         c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
3395                         c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3396                 } else {
3397                         u32 upper32 = upper_32_bits(start_blk);
3398
3399                         c->Request.CDBLen = 16;
3400                         c->Request.CDB[1]= 0;
3401                         c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
3402                         c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3403                         c->Request.CDB[4]= (upper32 >>  8) & 0xff;
3404                         c->Request.CDB[5]= upper32 & 0xff;
3405                         c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3406                         c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3407                         c->Request.CDB[8]= (start_blk >>  8) & 0xff;
3408                         c->Request.CDB[9]= start_blk & 0xff;
3409                         c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3410                         c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3411                         c->Request.CDB[12]= (blk_rq_sectors(creq) >>  8) & 0xff;
3412                         c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
3413                         c->Request.CDB[14] = c->Request.CDB[15] = 0;
3414                 }
3415         } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
3416                 c->Request.CDBLen = creq->cmd_len;
3417                 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
3418         } else {
3419                 dev_warn(&h->pdev->dev, "bad request type %d\n",
3420                         creq->cmd_type);
3421                 BUG();
3422         }
3423
3424         spin_lock_irq(q->queue_lock);
3425
3426         addQ(&h->reqQ, c);
3427         h->Qdepth++;
3428         if (h->Qdepth > h->maxQsinceinit)
3429                 h->maxQsinceinit = h->Qdepth;
3430
3431         goto queue;
3432 full:
3433         blk_stop_queue(q);
3434 startio:
3435         /* We will already have the driver lock here so not need
3436          * to lock it.
3437          */
3438         start_io(h);
3439 }
3440
3441 static inline unsigned long get_next_completion(ctlr_info_t *h)
3442 {
3443         return h->access.command_completed(h);
3444 }
3445
3446 static inline int interrupt_pending(ctlr_info_t *h)
3447 {
3448         return h->access.intr_pending(h);
3449 }
3450
3451 static inline long interrupt_not_for_us(ctlr_info_t *h)
3452 {
3453         return ((h->access.intr_pending(h) == 0) ||
3454                 (h->interrupts_enabled == 0));
3455 }
3456
3457 static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3458                         u32 raw_tag)
3459 {
3460         if (unlikely(tag_index >= h->nr_cmds)) {
3461                 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3462                 return 1;
3463         }
3464         return 0;
3465 }
3466
3467 static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3468                                 u32 raw_tag)
3469 {
3470         removeQ(c);
3471         if (likely(c->cmd_type == CMD_RWREQ))
3472                 complete_command(h, c, 0);
3473         else if (c->cmd_type == CMD_IOCTL_PEND)
3474                 complete(c->waiting);
3475 #ifdef CONFIG_CISS_SCSI_TAPE
3476         else if (c->cmd_type == CMD_SCSI)
3477                 complete_scsi_command(c, 0, raw_tag);
3478 #endif
3479 }
3480
3481 static inline u32 next_command(ctlr_info_t *h)
3482 {
3483         u32 a;
3484
3485         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
3486                 return h->access.command_completed(h);
3487
3488         if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3489                 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3490                 (h->reply_pool_head)++;
3491                 h->commands_outstanding--;
3492         } else {
3493                 a = FIFO_EMPTY;
3494         }
3495         /* Check for wraparound */
3496         if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3497                 h->reply_pool_head = h->reply_pool;
3498                 h->reply_pool_wraparound ^= 1;
3499         }
3500         return a;
3501 }
3502
3503 /* process completion of an indexed ("direct lookup") command */
3504 static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3505 {
3506         u32 tag_index;
3507         CommandList_struct *c;
3508
3509         tag_index = cciss_tag_to_index(raw_tag);
3510         if (bad_tag(h, tag_index, raw_tag))
3511                 return next_command(h);
3512         c = h->cmd_pool + tag_index;
3513         finish_cmd(h, c, raw_tag);
3514         return next_command(h);
3515 }
3516
3517 /* process completion of a non-indexed command */
3518 static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3519 {
3520         CommandList_struct *c = NULL;
3521         __u32 busaddr_masked, tag_masked;
3522
3523         tag_masked = cciss_tag_discard_error_bits(h, raw_tag);
3524         list_for_each_entry(c, &h->cmpQ, list) {
3525                 busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr);
3526                 if (busaddr_masked == tag_masked) {
3527                         finish_cmd(h, c, raw_tag);
3528                         return next_command(h);
3529                 }
3530         }
3531         bad_tag(h, h->nr_cmds + 1, raw_tag);
3532         return next_command(h);
3533 }
3534
3535 /* Some controllers, like p400, will give us one interrupt
3536  * after a soft reset, even if we turned interrupts off.
3537  * Only need to check for this in the cciss_xxx_discard_completions
3538  * functions.
3539  */
3540 static int ignore_bogus_interrupt(ctlr_info_t *h)
3541 {
3542         if (likely(!reset_devices))
3543                 return 0;
3544
3545         if (likely(h->interrupts_enabled))
3546                 return 0;
3547
3548         dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3549                 "(known firmware bug.)  Ignoring.\n");
3550
3551         return 1;
3552 }
3553
3554 static irqreturn_t cciss_intx_discard_completions(int irq, void *dev_id)
3555 {
3556         ctlr_info_t *h = dev_id;
3557         unsigned long flags;
3558         u32 raw_tag;
3559
3560         if (ignore_bogus_interrupt(h))
3561                 return IRQ_NONE;
3562
3563         if (interrupt_not_for_us(h))
3564                 return IRQ_NONE;
3565         spin_lock_irqsave(&h->lock, flags);
3566         while (interrupt_pending(h)) {
3567                 raw_tag = get_next_completion(h);
3568                 while (raw_tag != FIFO_EMPTY)
3569                         raw_tag = next_command(h);
3570         }
3571         spin_unlock_irqrestore(&h->lock, flags);
3572         return IRQ_HANDLED;
3573 }
3574
3575 static irqreturn_t cciss_msix_discard_completions(int irq, void *dev_id)
3576 {
3577         ctlr_info_t *h = dev_id;
3578         unsigned long flags;
3579         u32 raw_tag;
3580
3581         if (ignore_bogus_interrupt(h))
3582                 return IRQ_NONE;
3583
3584         spin_lock_irqsave(&h->lock, flags);
3585         raw_tag = get_next_completion(h);
3586         while (raw_tag != FIFO_EMPTY)
3587                 raw_tag = next_command(h);
3588         spin_unlock_irqrestore(&h->lock, flags);
3589         return IRQ_HANDLED;
3590 }
3591
3592 static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3593 {
3594         ctlr_info_t *h = dev_id;
3595         unsigned long flags;
3596         u32 raw_tag;
3597
3598         if (interrupt_not_for_us(h))
3599                 return IRQ_NONE;
3600         spin_lock_irqsave(&h->lock, flags);
3601         while (interrupt_pending(h)) {
3602                 raw_tag = get_next_completion(h);
3603                 while (raw_tag != FIFO_EMPTY) {
3604                         if (cciss_tag_contains_index(raw_tag))
3605                                 raw_tag = process_indexed_cmd(h, raw_tag);
3606                         else
3607                                 raw_tag = process_nonindexed_cmd(h, raw_tag);
3608                 }
3609         }
3610         spin_unlock_irqrestore(&h->lock, flags);
3611         return IRQ_HANDLED;
3612 }
3613
3614 /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3615  * check the interrupt pending register because it is not set.
3616  */
3617 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3618 {
3619         ctlr_info_t *h = dev_id;
3620         unsigned long flags;
3621         u32 raw_tag;
3622
3623         spin_lock_irqsave(&h->lock, flags);
3624         raw_tag = get_next_completion(h);
3625         while (raw_tag != FIFO_EMPTY) {
3626                 if (cciss_tag_contains_index(raw_tag))
3627                         raw_tag = process_indexed_cmd(h, raw_tag);
3628                 else
3629                         raw_tag = process_nonindexed_cmd(h, raw_tag);
3630         }
3631         spin_unlock_irqrestore(&h->lock, flags);
3632         return IRQ_HANDLED;
3633 }
3634
3635 /**
3636  * add_to_scan_list() - add controller to rescan queue
3637  * @h:                Pointer to the controller.
3638  *
3639  * Adds the controller to the rescan queue if not already on the queue.
3640  *
3641  * returns 1 if added to the queue, 0 if skipped (could be on the
3642  * queue already, or the controller could be initializing or shutting
3643  * down).
3644  **/
3645 static int add_to_scan_list(struct ctlr_info *h)
3646 {
3647         struct ctlr_info *test_h;
3648         int found = 0;
3649         int ret = 0;
3650
3651         if (h->busy_initializing)
3652                 return 0;
3653
3654         if (!mutex_trylock(&h->busy_shutting_down))
3655                 return 0;
3656
3657         mutex_lock(&scan_mutex);
3658         list_for_each_entry(test_h, &scan_q, scan_list) {
3659                 if (test_h == h) {
3660                         found = 1;
3661                         break;
3662                 }
3663         }
3664         if (!found && !h->busy_scanning) {
3665                 INIT_COMPLETION(h->scan_wait);
3666                 list_add_tail(&h->scan_list, &scan_q);
3667                 ret = 1;
3668         }
3669         mutex_unlock(&scan_mutex);
3670         mutex_unlock(&h->busy_shutting_down);
3671
3672         return ret;
3673 }
3674
3675 /**
3676  * remove_from_scan_list() - remove controller from rescan queue
3677  * @h:                     Pointer to the controller.
3678  *
3679  * Removes the controller from the rescan queue if present. Blocks if
3680  * the controller is currently conducting a rescan.  The controller
3681  * can be in one of three states:
3682  * 1. Doesn't need a scan
3683  * 2. On the scan list, but not scanning yet (we remove it)
3684  * 3. Busy scanning (and not on the list). In this case we want to wait for
3685  *    the scan to complete to make sure the scanning thread for this
3686  *    controller is completely idle.
3687  **/
3688 static void remove_from_scan_list(struct ctlr_info *h)
3689 {
3690         struct ctlr_info *test_h, *tmp_h;
3691
3692         mutex_lock(&scan_mutex);
3693         list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
3694                 if (test_h == h) { /* state 2. */
3695                         list_del(&h->scan_list);
3696                         complete_all(&h->scan_wait);
3697                         mutex_unlock(&scan_mutex);
3698                         return;
3699                 }
3700         }
3701         if (h->busy_scanning) { /* state 3. */
3702                 mutex_unlock(&scan_mutex);
3703                 wait_for_completion(&h->scan_wait);
3704         } else { /* state 1, nothing to do. */
3705                 mutex_unlock(&scan_mutex);
3706         }
3707 }
3708
3709 /**
3710  * scan_thread() - kernel thread used to rescan controllers
3711  * @data:        Ignored.
3712  *
3713  * A kernel thread used scan for drive topology changes on
3714  * controllers. The thread processes only one controller at a time
3715  * using a queue.  Controllers are added to the queue using
3716  * add_to_scan_list() and removed from the queue either after done
3717  * processing or using remove_from_scan_list().
3718  *
3719  * returns 0.
3720  **/
3721 static int scan_thread(void *data)
3722 {
3723         struct ctlr_info *h;
3724
3725         while (1) {
3726                 set_current_state(TASK_INTERRUPTIBLE);
3727                 schedule();
3728                 if (kthread_should_stop())
3729                         break;
3730
3731                 while (1) {
3732                         mutex_lock(&scan_mutex);
3733                         if (list_empty(&scan_q)) {
3734                                 mutex_unlock(&scan_mutex);
3735                                 break;
3736                         }
3737
3738                         h = list_entry(scan_q.next,
3739                                        struct ctlr_info,
3740                                        scan_list);
3741                         list_del(&h->scan_list);
3742                         h->busy_scanning = 1;
3743                         mutex_unlock(&scan_mutex);
3744
3745                         rebuild_lun_table(h, 0, 0);
3746                         complete_all(&h->scan_wait);
3747                         mutex_lock(&scan_mutex);
3748                         h->busy_scanning = 0;
3749                         mutex_unlock(&scan_mutex);
3750                 }
3751         }
3752
3753         return 0;
3754 }
3755
3756 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3757 {
3758         if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3759                 return 0;
3760
3761         switch (c->err_info->SenseInfo[12]) {
3762         case STATE_CHANGED:
3763                 dev_warn(&h->pdev->dev, "a state change "
3764                         "detected, command retried\n");
3765                 return 1;
3766         break;
3767         case LUN_FAILED:
3768                 dev_warn(&h->pdev->dev, "LUN failure "
3769                         "detected, action required\n");
3770                 return 1;
3771         break;
3772         case REPORT_LUNS_CHANGED:
3773                 dev_warn(&h->pdev->dev, "report LUN data changed\n");
3774         /*
3775          * Here, we could call add_to_scan_list and wake up the scan thread,
3776          * except that it's quite likely that we will get more than one
3777          * REPORT_LUNS_CHANGED condition in quick succession, which means
3778          * that those which occur after the first one will likely happen
3779          * *during* the scan_thread's rescan.  And the rescan code is not
3780          * robust enough to restart in the middle, undoing what it has already
3781          * done, and it's not clear that it's even possible to do this, since
3782          * part of what it does is notify the block layer, which starts
3783          * doing it's own i/o to read partition tables and so on, and the
3784          * driver doesn't have visibility to know what might need undoing.
3785          * In any event, if possible, it is horribly complicated to get right
3786          * so we just don't do it for now.
3787          *
3788          * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3789          */
3790                 return 1;
3791         break;
3792         case POWER_OR_RESET:
3793                 dev_warn(&h->pdev->dev,
3794                         "a power on or device reset detected\n");
3795                 return 1;
3796         break;
3797         case UNIT_ATTENTION_CLEARED:
3798                 dev_warn(&h->pdev->dev,
3799                         "unit attention cleared by another initiator\n");
3800                 return 1;
3801         break;
3802         default:
3803                 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3804                 return 1;
3805         }
3806 }
3807
3808 /*
3809  *  We cannot read the structure directly, for portability we must use
3810  *   the io functions.
3811  *   This is for debug only.
3812  */
3813 static void print_cfg_table(ctlr_info_t *h)
3814 {
3815         int i;
3816         char temp_name[17];
3817         CfgTable_struct *tb = h->cfgtable;
3818
3819         dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3820         dev_dbg(&h->pdev->dev, "------------------------------------\n");
3821         for (i = 0; i < 4; i++)
3822                 temp_name[i] = readb(&(tb->Signature[i]));
3823         temp_name[4] = '\0';
3824         dev_dbg(&h->pdev->dev, "   Signature = %s\n", temp_name);
3825         dev_dbg(&h->pdev->dev, "   Spec Number = %d\n",
3826                 readl(&(tb->SpecValence)));
3827         dev_dbg(&h->pdev->dev, "   Transport methods supported = 0x%x\n",
3828                readl(&(tb->TransportSupport)));
3829         dev_dbg(&h->pdev->dev, "   Transport methods active = 0x%x\n",
3830                readl(&(tb->TransportActive)));
3831         dev_dbg(&h->pdev->dev, "   Requested transport Method = 0x%x\n",
3832                readl(&(tb->HostWrite.TransportRequest)));
3833         dev_dbg(&h->pdev->dev, "   Coalesce Interrupt Delay = 0x%x\n",
3834                readl(&(tb->HostWrite.CoalIntDelay)));
3835         dev_dbg(&h->pdev->dev, "   Coalesce Interrupt Count = 0x%x\n",
3836                readl(&(tb->HostWrite.CoalIntCount)));
3837         dev_dbg(&h->pdev->dev, "   Max outstanding commands = 0x%d\n",
3838                readl(&(tb->CmdsOutMax)));
3839         dev_dbg(&h->pdev->dev, "   Bus Types = 0x%x\n",
3840                 readl(&(tb->BusTypes)));
3841         for (i = 0; i < 16; i++)
3842                 temp_name[i] = readb(&(tb->ServerName[i]));
3843         temp_name[16] = '\0';
3844         dev_dbg(&h->pdev->dev, "   Server Name = %s\n", temp_name);
3845         dev_dbg(&h->pdev->dev, "   Heartbeat Counter = 0x%x\n\n\n",
3846                 readl(&(tb->HeartBeat)));
3847 }
3848
3849 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3850 {
3851         int i, offset, mem_type, bar_type;
3852         if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3853                 return 0;
3854         offset = 0;
3855         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3856                 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3857                 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3858                         offset += 4;
3859                 else {
3860                         mem_type = pci_resource_flags(pdev, i) &
3861                             PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3862                         switch (mem_type) {
3863                         case PCI_BASE_ADDRESS_MEM_TYPE_32:
3864                         case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3865                                 offset += 4;    /* 32 bit */
3866                                 break;
3867                         case PCI_BASE_ADDRESS_MEM_TYPE_64:
3868                                 offset += 8;
3869                                 break;
3870                         default:        /* reserved in PCI 2.2 */
3871                                 dev_warn(&pdev->dev,
3872                                        "Base address is invalid\n");
3873                                 return -1;
3874                                 break;
3875                         }
3876                 }
3877                 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3878                         return i + 1;
3879         }
3880         return -1;
3881 }
3882
3883 /* Fill in bucket_map[], given nsgs (the max number of
3884  * scatter gather elements supported) and bucket[],
3885  * which is an array of 8 integers.  The bucket[] array
3886  * contains 8 different DMA transfer sizes (in 16
3887  * byte increments) which the controller uses to fetch
3888  * commands.  This function fills in bucket_map[], which
3889  * maps a given number of scatter gather elements to one of
3890  * the 8 DMA transfer sizes.  The point of it is to allow the
3891  * controller to only do as much DMA as needed to fetch the
3892  * command, with the DMA transfer size encoded in the lower
3893  * bits of the command address.
3894  */
3895 static void  calc_bucket_map(int bucket[], int num_buckets,
3896         int nsgs, int *bucket_map)
3897 {
3898         int i, j, b, size;
3899
3900         /* even a command with 0 SGs requires 4 blocks */
3901 #define MINIMUM_TRANSFER_BLOCKS 4
3902 #define NUM_BUCKETS 8
3903         /* Note, bucket_map must have nsgs+1 entries. */
3904         for (i = 0; i <= nsgs; i++) {
3905                 /* Compute size of a command with i SG entries */
3906                 size = i + MINIMUM_TRANSFER_BLOCKS;
3907                 b = num_buckets; /* Assume the biggest bucket */
3908                 /* Find the bucket that is just big enough */
3909                 for (j = 0; j < 8; j++) {
3910                         if (bucket[j] >= size) {
3911                                 b = j;
3912                                 break;
3913                         }
3914                 }
3915                 /* for a command with i SG entries, use bucket b. */
3916                 bucket_map[i] = b;
3917         }
3918 }
3919
3920 static void cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3921 {
3922         int i;
3923
3924         /* under certain very rare conditions, this can take awhile.
3925          * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3926          * as we enter this code.) */
3927         for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3928                 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3929                         break;
3930                 usleep_range(10000, 20000);
3931         }
3932 }
3933
3934 static void cciss_enter_performant_mode(ctlr_info_t *h, u32 use_short_tags)
3935 {
3936         /* This is a bit complicated.  There are 8 registers on
3937          * the controller which we write to to tell it 8 different
3938          * sizes of commands which there may be.  It's a way of
3939          * reducing the DMA done to fetch each command.  Encoded into
3940          * each command's tag are 3 bits which communicate to the controller
3941          * which of the eight sizes that command fits within.  The size of
3942          * each command depends on how many scatter gather entries there are.
3943          * Each SG entry requires 16 bytes.  The eight registers are programmed
3944          * with the number of 16-byte blocks a command of that size requires.
3945          * The smallest command possible requires 5 such 16 byte blocks.
3946          * the largest command possible requires MAXSGENTRIES + 4 16-byte
3947          * blocks.  Note, this only extends to the SG entries contained
3948          * within the command block, and does not extend to chained blocks
3949          * of SG elements.   bft[] contains the eight values we write to
3950          * the registers.  They are not evenly distributed, but have more
3951          * sizes for small commands, and fewer sizes for larger commands.
3952          */
3953         __u32 trans_offset;
3954         int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
3955                         /*
3956                          *  5 = 1 s/g entry or 4k
3957                          *  6 = 2 s/g entry or 8k
3958                          *  8 = 4 s/g entry or 16k
3959                          * 10 = 6 s/g entry or 24k
3960                          */
3961         unsigned long register_value;
3962         BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3963
3964         h->reply_pool_wraparound = 1; /* spec: init to 1 */
3965
3966         /* Controller spec: zero out this buffer. */
3967         memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3968         h->reply_pool_head = h->reply_pool;
3969
3970         trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3971         calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3972                                 h->blockFetchTable);
3973         writel(bft[0], &h->transtable->BlockFetch0);
3974         writel(bft[1], &h->transtable->BlockFetch1);
3975         writel(bft[2], &h->transtable->BlockFetch2);
3976         writel(bft[3], &h->transtable->BlockFetch3);
3977         writel(bft[4], &h->transtable->BlockFetch4);
3978         writel(bft[5], &h->transtable->BlockFetch5);
3979         writel(bft[6], &h->transtable->BlockFetch6);
3980         writel(bft[7], &h->transtable->BlockFetch7);
3981
3982         /* size of controller ring buffer */
3983         writel(h->max_commands, &h->transtable->RepQSize);
3984         writel(1, &h->transtable->RepQCount);
3985         writel(0, &h->transtable->RepQCtrAddrLow32);
3986         writel(0, &h->transtable->RepQCtrAddrHigh32);
3987         writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3988         writel(0, &h->transtable->RepQAddr0High32);
3989         writel(CFGTBL_Trans_Performant | use_short_tags,
3990                         &(h->cfgtable->HostWrite.TransportRequest));
3991
3992         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3993         cciss_wait_for_mode_change_ack(h);
3994         register_value = readl(&(h->cfgtable->TransportActive));
3995         if (!(register_value & CFGTBL_Trans_Performant))
3996                 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
3997                                         " performant mode\n");
3998 }
3999
4000 static void cciss_put_controller_into_performant_mode(ctlr_info_t *h)
4001 {
4002         __u32 trans_support;
4003
4004         if (cciss_simple_mode)
4005                 return;
4006
4007         dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
4008         /* Attempt to put controller into performant mode if supported */
4009         /* Does board support performant mode? */
4010         trans_support = readl(&(h->cfgtable->TransportSupport));
4011         if (!(trans_support & PERFORMANT_MODE))
4012                 return;
4013
4014         dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
4015         /* Performant mode demands commands on a 32 byte boundary
4016          * pci_alloc_consistent aligns on page boundarys already.
4017          * Just need to check if divisible by 32
4018          */
4019         if ((sizeof(CommandList_struct) % 32) != 0) {
4020                 dev_warn(&h->pdev->dev, "%s %d %s\n",
4021                         "cciss info: command size[",
4022                         (int)sizeof(CommandList_struct),
4023                         "] not divisible by 32, no performant mode..\n");
4024                 return;
4025         }
4026
4027         /* Performant mode ring buffer and supporting data structures */
4028         h->reply_pool = (__u64 *)pci_alloc_consistent(
4029                 h->pdev, h->max_commands * sizeof(__u64),
4030                 &(h->reply_pool_dhandle));
4031
4032         /* Need a block fetch table for performant mode */
4033         h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
4034                 sizeof(__u32)), GFP_KERNEL);
4035
4036         if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
4037                 goto clean_up;
4038
4039         cciss_enter_performant_mode(h,
4040                 trans_support & CFGTBL_Trans_use_short_tags);
4041
4042         /* Change the access methods to the performant access methods */
4043         h->access = SA5_performant_access;
4044         h->transMethod = CFGTBL_Trans_Performant;
4045
4046         return;
4047 clean_up:
4048         kfree(h->blockFetchTable);
4049         if (h->reply_pool)
4050                 pci_free_consistent(h->pdev,
4051                                 h->max_commands * sizeof(__u64),
4052                                 h->reply_pool,
4053                                 h->reply_pool_dhandle);
4054         return;
4055
4056 } /* cciss_put_controller_into_performant_mode */
4057
4058 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
4059  * controllers that are capable. If not, we use IO-APIC mode.
4060  */
4061
4062 static void cciss_interrupt_mode(ctlr_info_t *h)
4063 {
4064 #ifdef CONFIG_PCI_MSI
4065         int err;
4066         struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
4067         {0, 2}, {0, 3}
4068         };
4069
4070         /* Some boards advertise MSI but don't really support it */
4071         if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4072             (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
4073                 goto default_int_mode;
4074
4075         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
4076                 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
4077                 if (!err) {
4078                         h->intr[0] = cciss_msix_entries[0].vector;
4079                         h->intr[1] = cciss_msix_entries[1].vector;
4080                         h->intr[2] = cciss_msix_entries[2].vector;
4081                         h->intr[3] = cciss_msix_entries[3].vector;
4082                         h->msix_vector = 1;
4083                         return;
4084                 }
4085                 if (err > 0) {
4086                         dev_warn(&h->pdev->dev,
4087                                 "only %d MSI-X vectors available\n", err);
4088                         goto default_int_mode;
4089                 } else {
4090                         dev_warn(&h->pdev->dev,
4091                                 "MSI-X init failed %d\n", err);
4092                         goto default_int_mode;
4093                 }
4094         }
4095         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4096                 if (!pci_enable_msi(h->pdev))
4097                         h->msi_vector = 1;
4098                 else
4099                         dev_warn(&h->pdev->dev, "MSI init failed\n");
4100         }
4101 default_int_mode:
4102 #endif                          /* CONFIG_PCI_MSI */
4103         /* if we get here we're going to use the default interrupt mode */
4104         h->intr[h->intr_mode] = h->pdev->irq;
4105         return;
4106 }
4107
4108 static int cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
4109 {
4110         int i;
4111         u32 subsystem_vendor_id, subsystem_device_id;
4112
4113         subsystem_vendor_id = pdev->subsystem_vendor;
4114         subsystem_device_id = pdev->subsystem_device;
4115         *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4116                         subsystem_vendor_id;
4117
4118         for (i = 0; i < ARRAY_SIZE(products); i++)
4119                 if (*board_id == products[i].board_id)
4120                         return i;
4121         dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
4122                 *board_id);
4123         return -ENODEV;
4124 }
4125
4126 static inline bool cciss_board_disabled(ctlr_info_t *h)
4127 {
4128         u16 command;
4129
4130         (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
4131         return ((command & PCI_COMMAND_MEMORY) == 0);
4132 }
4133
4134 static int cciss_pci_find_memory_BAR(struct pci_dev *pdev,
4135                                      unsigned long *memory_bar)
4136 {
4137         int i;
4138
4139         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4140                 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4141                         /* addressing mode bits already removed */
4142                         *memory_bar = pci_resource_start(pdev, i);
4143                         dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4144                                 *memory_bar);
4145                         return 0;
4146                 }
4147         dev_warn(&pdev->dev, "no memory BAR found\n");
4148         return -ENODEV;
4149 }
4150
4151 static int cciss_wait_for_board_state(struct pci_dev *pdev,
4152                                       void __iomem *vaddr, int wait_for_ready)
4153 #define BOARD_READY 1
4154 #define BOARD_NOT_READY 0
4155 {
4156         int i, iterations;
4157         u32 scratchpad;
4158
4159         if (wait_for_ready)
4160                 iterations = CCISS_BOARD_READY_ITERATIONS;
4161         else
4162                 iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
4163
4164         for (i = 0; i < iterations; i++) {
4165                 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4166                 if (wait_for_ready) {
4167                         if (scratchpad == CCISS_FIRMWARE_READY)
4168                                 return 0;
4169                 } else {
4170                         if (scratchpad != CCISS_FIRMWARE_READY)
4171                                 return 0;
4172                 }
4173                 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
4174         }
4175         dev_warn(&pdev->dev, "board not ready, timed out.\n");
4176         return -ENODEV;
4177 }
4178
4179 static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
4180                                 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4181                                 u64 *cfg_offset)
4182 {
4183         *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4184         *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4185         *cfg_base_addr &= (u32) 0x0000ffff;
4186         *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4187         if (*cfg_base_addr_index == -1) {
4188                 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4189                         "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4190                 return -ENODEV;
4191         }
4192         return 0;
4193 }
4194
4195 static int cciss_find_cfgtables(ctlr_info_t *h)
4196 {
4197         u64 cfg_offset;
4198         u32 cfg_base_addr;
4199         u64 cfg_base_addr_index;
4200         u32 trans_offset;
4201         int rc;
4202
4203         rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4204                 &cfg_base_addr_index, &cfg_offset);
4205         if (rc)
4206                 return rc;
4207         h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
4208                 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
4209         if (!h->cfgtable)
4210                 return -ENOMEM;
4211         rc = write_driver_ver_to_cfgtable(h->cfgtable);
4212         if (rc)
4213                 return rc;
4214         /* Find performant mode table. */
4215         trans_offset = readl(&h->cfgtable->TransMethodOffset);
4216         h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4217                                 cfg_base_addr_index)+cfg_offset+trans_offset,
4218                                 sizeof(*h->transtable));
4219         if (!h->transtable)
4220                 return -ENOMEM;
4221         return 0;
4222 }
4223
4224 static void cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4225 {
4226         h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4227
4228         /* Limit commands in memory limited kdump scenario. */
4229         if (reset_devices && h->max_commands > 32)
4230                 h->max_commands = 32;
4231
4232         if (h->max_commands < 16) {
4233                 dev_warn(&h->pdev->dev, "Controller reports "
4234                         "max supported commands of %d, an obvious lie. "
4235                         "Using 16.  Ensure that firmware is up to date.\n",
4236                         h->max_commands);
4237                 h->max_commands = 16;
4238         }
4239 }
4240
4241 /* Interrogate the hardware for some limits:
4242  * max commands, max SG elements without chaining, and with chaining,
4243  * SG chain block size, etc.
4244  */
4245 static void cciss_find_board_params(ctlr_info_t *h)
4246 {
4247         cciss_get_max_perf_mode_cmds(h);
4248         h->nr_cmds = h->max_commands - 4 - cciss_tape_cmds;
4249         h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
4250         /*
4251          * Limit in-command s/g elements to 32 save dma'able memory.
4252          * Howvever spec says if 0, use 31
4253          */
4254         h->max_cmd_sgentries = 31;
4255         if (h->maxsgentries > 512) {
4256                 h->max_cmd_sgentries = 32;
4257                 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4258                 h->maxsgentries--; /* save one for chain pointer */
4259         } else {
4260                 h->maxsgentries = 31; /* default to traditional values */
4261                 h->chainsize = 0;
4262         }
4263 }
4264
4265 static inline bool CISS_signature_present(ctlr_info_t *h)
4266 {
4267         if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
4268                 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4269                 return false;
4270         }
4271         return true;
4272 }
4273
4274 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
4275 static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4276 {
4277 #ifdef CONFIG_X86
4278         u32 prefetch;
4279
4280         prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4281         prefetch |= 0x100;
4282         writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4283 #endif
4284 }
4285
4286 /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
4287  * in a prefetch beyond physical memory.
4288  */
4289 static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4290 {
4291         u32 dma_prefetch;
4292         __u32 dma_refetch;
4293
4294         if (h->board_id != 0x3225103C)
4295                 return;
4296         dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4297         dma_prefetch |= 0x8000;
4298         writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4299         pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4300         dma_refetch |= 0x1;
4301         pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4302 }
4303
4304 static int cciss_pci_init(ctlr_info_t *h)
4305 {
4306         int prod_index, err;
4307
4308         prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
4309         if (prod_index < 0)
4310                 return -ENODEV;
4311         h->product_name = products[prod_index].product_name;
4312         h->access = *(products[prod_index].access);
4313
4314         if (cciss_board_disabled(h)) {
4315                 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
4316                 return -ENODEV;
4317         }
4318
4319         pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4320                                 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4321
4322         err = pci_enable_device(h->pdev);
4323         if (err) {
4324                 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
4325                 return err;
4326         }
4327
4328         err = pci_request_regions(h->pdev, "cciss");
4329         if (err) {
4330                 dev_warn(&h->pdev->dev,
4331                         "Cannot obtain PCI resources, aborting\n");
4332                 return err;
4333         }
4334
4335         dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4336         dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
4337
4338 /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4339  * else we use the IO-APIC interrupt assigned to us by system ROM.
4340  */
4341         cciss_interrupt_mode(h);
4342         err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
4343         if (err)
4344                 goto err_out_free_res;
4345         h->vaddr = remap_pci_mem(h->paddr, 0x250);
4346         if (!h->vaddr) {
4347                 err = -ENOMEM;
4348                 goto err_out_free_res;
4349         }
4350         err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
4351         if (err)
4352                 goto err_out_free_res;
4353         err = cciss_find_cfgtables(h);
4354         if (err)
4355                 goto err_out_free_res;
4356         print_cfg_table(h);
4357         cciss_find_board_params(h);
4358
4359         if (!CISS_signature_present(h)) {
4360                 err = -ENODEV;
4361                 goto err_out_free_res;
4362         }
4363         cciss_enable_scsi_prefetch(h);
4364         cciss_p600_dma_prefetch_quirk(h);
4365         err = cciss_enter_simple_mode(h);
4366         if (err)
4367                 goto err_out_free_res;
4368         cciss_put_controller_into_performant_mode(h);
4369         return 0;
4370
4371 err_out_free_res:
4372         /*
4373          * Deliberately omit pci_disable_device(): it does something nasty to
4374          * Smart Array controllers that pci_enable_device does not undo
4375          */
4376         if (h->transtable)
4377                 iounmap(h->transtable);
4378         if (h->cfgtable)
4379                 iounmap(h->cfgtable);
4380         if (h->vaddr)
4381                 iounmap(h->vaddr);
4382         pci_release_regions(h->pdev);
4383         return err;
4384 }
4385
4386 /* Function to find the first free pointer into our hba[] array
4387  * Returns -1 if no free entries are left.
4388  */
4389 static int alloc_cciss_hba(struct pci_dev *pdev)
4390 {
4391         int i;
4392
4393         for (i = 0; i < MAX_CTLR; i++) {
4394                 if (!hba[i]) {
4395                         ctlr_info_t *h;
4396
4397                         h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4398                         if (!h)
4399                                 goto Enomem;
4400                         hba[i] = h;
4401                         return i;
4402                 }
4403         }
4404         dev_warn(&pdev->dev, "This driver supports a maximum"
4405                " of %d controllers.\n", MAX_CTLR);
4406         return -1;
4407 Enomem:
4408         dev_warn(&pdev->dev, "out of memory.\n");
4409         return -1;
4410 }
4411
4412 static void free_hba(ctlr_info_t *h)
4413 {
4414         int i;
4415
4416         hba[h->ctlr] = NULL;
4417         for (i = 0; i < h->highest_lun + 1; i++)
4418                 if (h->gendisk[i] != NULL)
4419                         put_disk(h->gendisk[i]);
4420         kfree(h);
4421 }
4422
4423 /* Send a message CDB to the firmware. */
4424 static int cciss_message(struct pci_dev *pdev, unsigned char opcode,
4425                          unsigned char type)
4426 {
4427         typedef struct {
4428                 CommandListHeader_struct CommandHeader;
4429                 RequestBlock_struct Request;
4430                 ErrDescriptor_struct ErrorDescriptor;
4431         } Command;
4432         static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4433         Command *cmd;
4434         dma_addr_t paddr64;
4435         uint32_t paddr32, tag;
4436         void __iomem *vaddr;
4437         int i, err;
4438
4439         vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4440         if (vaddr == NULL)
4441                 return -ENOMEM;
4442
4443         /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4444            CCISS commands, so they must be allocated from the lower 4GiB of
4445            memory. */
4446         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4447         if (err) {
4448                 iounmap(vaddr);
4449                 return -ENOMEM;
4450         }
4451
4452         cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4453         if (cmd == NULL) {
4454                 iounmap(vaddr);
4455                 return -ENOMEM;
4456         }
4457
4458         /* This must fit, because of the 32-bit consistent DMA mask.  Also,
4459            although there's no guarantee, we assume that the address is at
4460            least 4-byte aligned (most likely, it's page-aligned). */
4461         paddr32 = paddr64;
4462
4463         cmd->CommandHeader.ReplyQueue = 0;
4464         cmd->CommandHeader.SGList = 0;
4465         cmd->CommandHeader.SGTotal = 0;
4466         cmd->CommandHeader.Tag.lower = paddr32;
4467         cmd->CommandHeader.Tag.upper = 0;
4468         memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4469
4470         cmd->Request.CDBLen = 16;
4471         cmd->Request.Type.Type = TYPE_MSG;
4472         cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4473         cmd->Request.Type.Direction = XFER_NONE;
4474         cmd->Request.Timeout = 0; /* Don't time out */
4475         cmd->Request.CDB[0] = opcode;
4476         cmd->Request.CDB[1] = type;
4477         memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4478
4479         cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4480         cmd->ErrorDescriptor.Addr.upper = 0;
4481         cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4482
4483         writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4484
4485         for (i = 0; i < 10; i++) {
4486                 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4487                 if ((tag & ~3) == paddr32)
4488                         break;
4489                 msleep(CCISS_POST_RESET_NOOP_TIMEOUT_MSECS);
4490         }
4491
4492         iounmap(vaddr);
4493
4494         /* we leak the DMA buffer here ... no choice since the controller could
4495            still complete the command. */
4496         if (i == 10) {
4497                 dev_err(&pdev->dev,
4498                         "controller message %02x:%02x timed out\n",
4499                         opcode, type);
4500                 return -ETIMEDOUT;
4501         }
4502
4503         pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4504
4505         if (tag & 2) {
4506                 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
4507                         opcode, type);
4508                 return -EIO;
4509         }
4510
4511         dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
4512                 opcode, type);
4513         return 0;
4514 }
4515
4516 #define cciss_noop(p) cciss_message(p, 3, 0)
4517
4518 static int cciss_controller_hard_reset(struct pci_dev *pdev,
4519         void * __iomem vaddr, u32 use_doorbell)
4520 {
4521         u16 pmcsr;
4522         int pos;
4523
4524         if (use_doorbell) {
4525                 /* For everything after the P600, the PCI power state method
4526                  * of resetting the controller doesn't work, so we have this
4527                  * other way using the doorbell register.
4528                  */
4529                 dev_info(&pdev->dev, "using doorbell to reset controller\n");
4530                 writel(use_doorbell, vaddr + SA5_DOORBELL);
4531         } else { /* Try to do it the PCI power state way */
4532
4533                 /* Quoting from the Open CISS Specification: "The Power
4534                  * Management Control/Status Register (CSR) controls the power
4535                  * state of the device.  The normal operating state is D0,
4536                  * CSR=00h.  The software off state is D3, CSR=03h.  To reset
4537                  * the controller, place the interface device in D3 then to D0,
4538                  * this causes a secondary PCI reset which will reset the
4539                  * controller." */
4540
4541                 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4542                 if (pos == 0) {
4543                         dev_err(&pdev->dev,
4544                                 "cciss_controller_hard_reset: "
4545                                 "PCI PM not supported\n");
4546                         return -ENODEV;
4547                 }
4548                 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4549                 /* enter the D3hot power management state */
4550                 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4551                 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4552                 pmcsr |= PCI_D3hot;
4553                 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4554
4555                 msleep(500);
4556
4557                 /* enter the D0 power management state */
4558                 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4559                 pmcsr |= PCI_D0;
4560                 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4561
4562                 /*
4563                  * The P600 requires a small delay when changing states.
4564                  * Otherwise we may think the board did not reset and we bail.
4565                  * This for kdump only and is particular to the P600.
4566                  */
4567                 msleep(500);
4568         }
4569         return 0;
4570 }
4571
4572 static void init_driver_version(char *driver_version, int len)
4573 {
4574         memset(driver_version, 0, len);
4575         strncpy(driver_version, "cciss " DRIVER_NAME, len - 1);
4576 }
4577
4578 static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable)
4579 {
4580         char *driver_version;
4581         int i, size = sizeof(cfgtable->driver_version);
4582
4583         driver_version = kmalloc(size, GFP_KERNEL);
4584         if (!driver_version)
4585                 return -ENOMEM;
4586
4587         init_driver_version(driver_version, size);
4588         for (i = 0; i < size; i++)
4589                 writeb(driver_version[i], &cfgtable->driver_version[i]);
4590         kfree(driver_version);
4591         return 0;
4592 }
4593
4594 static void read_driver_ver_from_cfgtable(CfgTable_struct __iomem *cfgtable,
4595                                           unsigned char *driver_ver)
4596 {
4597         int i;
4598
4599         for (i = 0; i < sizeof(cfgtable->driver_version); i++)
4600                 driver_ver[i] = readb(&cfgtable->driver_version[i]);
4601 }
4602
4603 static int controller_reset_failed(CfgTable_struct __iomem *cfgtable)
4604 {
4605
4606         char *driver_ver, *old_driver_ver;
4607         int rc, size = sizeof(cfgtable->driver_version);
4608
4609         old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
4610         if (!old_driver_ver)
4611                 return -ENOMEM;
4612         driver_ver = old_driver_ver + size;
4613
4614         /* After a reset, the 32 bytes of "driver version" in the cfgtable
4615          * should have been changed, otherwise we know the reset failed.
4616          */
4617         init_driver_version(old_driver_ver, size);
4618         read_driver_ver_from_cfgtable(cfgtable, driver_ver);
4619         rc = !memcmp(driver_ver, old_driver_ver, size);
4620         kfree(old_driver_ver);
4621         return rc;
4622 }
4623
4624 /* This does a hard reset of the controller using PCI power management
4625  * states or using the doorbell register. */
4626 static int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4627 {
4628         u64 cfg_offset;
4629         u32 cfg_base_addr;
4630         u64 cfg_base_addr_index;
4631         void __iomem *vaddr;
4632         unsigned long paddr;
4633         u32 misc_fw_support;
4634         int rc;
4635         CfgTable_struct __iomem *cfgtable;
4636         u32 use_doorbell;
4637         u32 board_id;
4638         u16 command_register;
4639
4640         /* For controllers as old a the p600, this is very nearly
4641          * the same thing as
4642          *
4643          * pci_save_state(pci_dev);
4644          * pci_set_power_state(pci_dev, PCI_D3hot);
4645          * pci_set_power_state(pci_dev, PCI_D0);
4646          * pci_restore_state(pci_dev);
4647          *
4648          * For controllers newer than the P600, the pci power state
4649          * method of resetting doesn't work so we have another way
4650          * using the doorbell register.
4651          */
4652
4653         /* Exclude 640x boards.  These are two pci devices in one slot
4654          * which share a battery backed cache module.  One controls the
4655          * cache, the other accesses the cache through the one that controls
4656          * it.  If we reset the one controlling the cache, the other will
4657          * likely not be happy.  Just forbid resetting this conjoined mess.
4658          */
4659         cciss_lookup_board_id(pdev, &board_id);
4660         if (!ctlr_is_resettable(board_id)) {
4661                 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4662                                 "due to shared cache module.");
4663                 return -ENODEV;
4664         }
4665
4666         /* if controller is soft- but not hard resettable... */
4667         if (!ctlr_is_hard_resettable(board_id))
4668                 return -ENOTSUPP; /* try soft reset later. */
4669
4670         /* Save the PCI command register */
4671         pci_read_config_word(pdev, 4, &command_register);
4672         /* Turn the board off.  This is so that later pci_restore_state()
4673          * won't turn the board on before the rest of config space is ready.
4674          */
4675         pci_disable_device(pdev);
4676         pci_save_state(pdev);
4677
4678         /* find the first memory BAR, so we can find the cfg table */
4679         rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4680         if (rc)
4681                 return rc;
4682         vaddr = remap_pci_mem(paddr, 0x250);
4683         if (!vaddr)
4684                 return -ENOMEM;
4685
4686         /* find cfgtable in order to check if reset via doorbell is supported */
4687         rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4688                                         &cfg_base_addr_index, &cfg_offset);
4689         if (rc)
4690                 goto unmap_vaddr;
4691         cfgtable = remap_pci_mem(pci_resource_start(pdev,
4692                        cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4693         if (!cfgtable) {
4694                 rc = -ENOMEM;
4695                 goto unmap_vaddr;
4696         }
4697         rc = write_driver_ver_to_cfgtable(cfgtable);
4698         if (rc)
4699                 goto unmap_vaddr;
4700
4701         /* If reset via doorbell register is supported, use that.
4702          * There are two such methods.  Favor the newest method.
4703          */
4704         misc_fw_support = readl(&cfgtable->misc_fw_support);
4705         use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
4706         if (use_doorbell) {
4707                 use_doorbell = DOORBELL_CTLR_RESET2;
4708         } else {
4709                 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
4710                 if (use_doorbell) {
4711                         dev_warn(&pdev->dev, "Controller claims that "
4712                                 "'Bit 2 doorbell reset' is "
4713                                 "supported, but not 'bit 5 doorbell reset'.  "
4714                                 "Firmware update is recommended.\n");
4715                         rc = -ENOTSUPP; /* use the soft reset */
4716                         goto unmap_cfgtable;
4717                 }
4718         }
4719
4720         rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4721         if (rc)
4722                 goto unmap_cfgtable;
4723         pci_restore_state(pdev);
4724         rc = pci_enable_device(pdev);
4725         if (rc) {
4726                 dev_warn(&pdev->dev, "failed to enable device.\n");
4727                 goto unmap_cfgtable;
4728         }
4729         pci_write_config_word(pdev, 4, command_register);
4730
4731         /* Some devices (notably the HP Smart Array 5i Controller)
4732            need a little pause here */
4733         msleep(CCISS_POST_RESET_PAUSE_MSECS);
4734
4735         /* Wait for board to become not ready, then ready. */
4736         dev_info(&pdev->dev, "Waiting for board to reset.\n");
4737         rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
4738         if (rc) {
4739                 dev_warn(&pdev->dev, "Failed waiting for board to hard reset."
4740                                 "  Will try soft reset.\n");
4741                 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4742                 goto unmap_cfgtable;
4743         }
4744         rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
4745         if (rc) {
4746                 dev_warn(&pdev->dev,
4747                         "failed waiting for board to become ready "
4748                         "after hard reset\n");
4749                 goto unmap_cfgtable;
4750         }
4751
4752         rc = controller_reset_failed(vaddr);
4753         if (rc < 0)
4754                 goto unmap_cfgtable;
4755         if (rc) {
4756                 dev_warn(&pdev->dev, "Unable to successfully hard reset "
4757                         "controller. Will try soft reset.\n");
4758                 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4759         } else {
4760                 dev_info(&pdev->dev, "Board ready after hard reset.\n");
4761         }
4762
4763 unmap_cfgtable:
4764         iounmap(cfgtable);
4765
4766 unmap_vaddr:
4767         iounmap(vaddr);
4768         return rc;
4769 }
4770
4771 static int cciss_init_reset_devices(struct pci_dev *pdev)
4772 {
4773         int rc, i;
4774
4775         if (!reset_devices)
4776                 return 0;
4777
4778         /* Reset the controller with a PCI power-cycle or via doorbell */
4779         rc = cciss_kdump_hard_reset_controller(pdev);
4780
4781         /* -ENOTSUPP here means we cannot reset the controller
4782          * but it's already (and still) up and running in
4783          * "performant mode".  Or, it might be 640x, which can't reset
4784          * due to concerns about shared bbwc between 6402/6404 pair.
4785          */
4786         if (rc == -ENOTSUPP)
4787                 return rc; /* just try to do the kdump anyhow. */
4788         if (rc)
4789                 return -ENODEV;
4790
4791         /* Now try to get the controller to respond to a no-op */
4792         dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4793         for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4794                 if (cciss_noop(pdev) == 0)
4795                         break;
4796                 else
4797                         dev_warn(&pdev->dev, "no-op failed%s\n",
4798                                 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4799                                         "; re-trying" : ""));
4800                 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4801         }
4802         return 0;
4803 }
4804
4805 static int cciss_allocate_cmd_pool(ctlr_info_t *h)
4806 {
4807         h->cmd_pool_bits = kmalloc(BITS_TO_LONGS(h->nr_cmds) *
4808                 sizeof(unsigned long), GFP_KERNEL);
4809         h->cmd_pool = pci_alloc_consistent(h->pdev,
4810                 h->nr_cmds * sizeof(CommandList_struct),
4811                 &(h->cmd_pool_dhandle));
4812         h->errinfo_pool = pci_alloc_consistent(h->pdev,
4813                 h->nr_cmds * sizeof(ErrorInfo_struct),
4814                 &(h->errinfo_pool_dhandle));
4815         if ((h->cmd_pool_bits == NULL)
4816                 || (h->cmd_pool == NULL)
4817                 || (h->errinfo_pool == NULL)) {
4818                 dev_err(&h->pdev->dev, "out of memory");
4819                 return -ENOMEM;
4820         }
4821         return 0;
4822 }
4823
4824 static int cciss_allocate_scatterlists(ctlr_info_t *h)
4825 {
4826         int i;
4827
4828         /* zero it, so that on free we need not know how many were alloc'ed */
4829         h->scatter_list = kzalloc(h->max_commands *
4830                                 sizeof(struct scatterlist *), GFP_KERNEL);
4831         if (!h->scatter_list)
4832                 return -ENOMEM;
4833
4834         for (i = 0; i < h->nr_cmds; i++) {
4835                 h->scatter_list[i] = kmalloc(sizeof(struct scatterlist) *
4836                                                 h->maxsgentries, GFP_KERNEL);
4837                 if (h->scatter_list[i] == NULL) {
4838                         dev_err(&h->pdev->dev, "could not allocate "
4839                                 "s/g lists\n");
4840                         return -ENOMEM;
4841                 }
4842         }
4843         return 0;
4844 }
4845
4846 static void cciss_free_scatterlists(ctlr_info_t *h)
4847 {
4848         int i;
4849
4850         if (h->scatter_list) {
4851                 for (i = 0; i < h->nr_cmds; i++)
4852                         kfree(h->scatter_list[i]);
4853                 kfree(h->scatter_list);
4854         }
4855 }
4856
4857 static void cciss_free_cmd_pool(ctlr_info_t *h)
4858 {
4859         kfree(h->cmd_pool_bits);
4860         if (h->cmd_pool)
4861                 pci_free_consistent(h->pdev,
4862                         h->nr_cmds * sizeof(CommandList_struct),
4863                         h->cmd_pool, h->cmd_pool_dhandle);
4864         if (h->errinfo_pool)
4865                 pci_free_consistent(h->pdev,
4866                         h->nr_cmds * sizeof(ErrorInfo_struct),
4867                         h->errinfo_pool, h->errinfo_pool_dhandle);
4868 }
4869
4870 static int cciss_request_irq(ctlr_info_t *h,
4871         irqreturn_t (*msixhandler)(int, void *),
4872         irqreturn_t (*intxhandler)(int, void *))
4873 {
4874         if (h->msix_vector || h->msi_vector) {
4875                 if (!request_irq(h->intr[h->intr_mode], msixhandler,
4876                                 0, h->devname, h))
4877                         return 0;
4878                 dev_err(&h->pdev->dev, "Unable to get msi irq %d"
4879                         " for %s\n", h->intr[h->intr_mode],
4880                         h->devname);
4881                 return -1;
4882         }
4883
4884         if (!request_irq(h->intr[h->intr_mode], intxhandler,
4885                         IRQF_SHARED, h->devname, h))
4886                 return 0;
4887         dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
4888                 h->intr[h->intr_mode], h->devname);
4889         return -1;
4890 }
4891
4892 static int cciss_kdump_soft_reset(ctlr_info_t *h)
4893 {
4894         if (cciss_send_reset(h, CTLR_LUNID, CCISS_RESET_TYPE_CONTROLLER)) {
4895                 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4896                 return -EIO;
4897         }
4898
4899         dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4900         if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4901                 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4902                 return -1;
4903         }
4904
4905         dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4906         if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4907                 dev_warn(&h->pdev->dev, "Board failed to become ready "
4908                         "after soft reset.\n");
4909                 return -1;
4910         }
4911
4912         return 0;
4913 }
4914
4915 static void cciss_undo_allocations_after_kdump_soft_reset(ctlr_info_t *h)
4916 {
4917         int ctlr = h->ctlr;
4918
4919         free_irq(h->intr[h->intr_mode], h);
4920 #ifdef CONFIG_PCI_MSI
4921         if (h->msix_vector)
4922                 pci_disable_msix(h->pdev);
4923         else if (h->msi_vector)
4924                 pci_disable_msi(h->pdev);
4925 #endif /* CONFIG_PCI_MSI */
4926         cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4927         cciss_free_scatterlists(h);
4928         cciss_free_cmd_pool(h);
4929         kfree(h->blockFetchTable);
4930         if (h->reply_pool)
4931                 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
4932                                 h->reply_pool, h->reply_pool_dhandle);
4933         if (h->transtable)
4934                 iounmap(h->transtable);
4935         if (h->cfgtable)
4936                 iounmap(h->cfgtable);
4937         if (h->vaddr)
4938                 iounmap(h->vaddr);
4939         unregister_blkdev(h->major, h->devname);
4940         cciss_destroy_hba_sysfs_entry(h);
4941         pci_release_regions(h->pdev);
4942         kfree(h);
4943         hba[ctlr] = NULL;
4944 }
4945
4946 /*
4947  *  This is it.  Find all the controllers and register them.  I really hate
4948  *  stealing all these major device numbers.
4949  *  returns the number of block devices registered.
4950  */
4951 static int cciss_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
4952 {
4953         int i;
4954         int j = 0;
4955         int rc;
4956         int try_soft_reset = 0;
4957         int dac, return_code;
4958         InquiryData_struct *inq_buff;
4959         ctlr_info_t *h;
4960         unsigned long flags;
4961
4962         rc = cciss_init_reset_devices(pdev);
4963         if (rc) {
4964                 if (rc != -ENOTSUPP)
4965                         return rc;
4966                 /* If the reset fails in a particular way (it has no way to do
4967                  * a proper hard reset, so returns -ENOTSUPP) we can try to do
4968                  * a soft reset once we get the controller configured up to the
4969                  * point that it can accept a command.
4970                  */
4971                 try_soft_reset = 1;
4972                 rc = 0;
4973         }
4974
4975 reinit_after_soft_reset:
4976
4977         i = alloc_cciss_hba(pdev);
4978         if (i < 0)
4979                 return -1;
4980
4981         h = hba[i];
4982         h->pdev = pdev;
4983         h->busy_initializing = 1;
4984         h->intr_mode = cciss_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
4985         INIT_LIST_HEAD(&h->cmpQ);
4986         INIT_LIST_HEAD(&h->reqQ);
4987         mutex_init(&h->busy_shutting_down);
4988
4989         if (cciss_pci_init(h) != 0)
4990                 goto clean_no_release_regions;
4991
4992         sprintf(h->devname, "cciss%d", i);
4993         h->ctlr = i;
4994
4995         if (cciss_tape_cmds < 2)
4996                 cciss_tape_cmds = 2;
4997         if (cciss_tape_cmds > 16)
4998                 cciss_tape_cmds = 16;
4999
5000         init_completion(&h->scan_wait);
5001
5002         if (cciss_create_hba_sysfs_entry(h))
5003                 goto clean0;
5004
5005         /* configure PCI DMA stuff */
5006         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
5007                 dac = 1;
5008         else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
5009                 dac = 0;
5010         else {
5011                 dev_err(&h->pdev->dev, "no suitable DMA available\n");
5012                 goto clean1;
5013         }
5014
5015         /*
5016          * register with the major number, or get a dynamic major number
5017          * by passing 0 as argument.  This is done for greater than
5018          * 8 controller support.
5019          */
5020         if (i < MAX_CTLR_ORIG)
5021                 h->major = COMPAQ_CISS_MAJOR + i;
5022         rc = register_blkdev(h->major, h->devname);
5023         if (rc == -EBUSY || rc == -EINVAL) {
5024                 dev_err(&h->pdev->dev,
5025                        "Unable to get major number %d for %s "
5026                        "on hba %d\n", h->major, h->devname, i);
5027                 goto clean1;
5028         } else {
5029                 if (i >= MAX_CTLR_ORIG)
5030                         h->major = rc;
5031         }
5032
5033         /* make sure the board interrupts are off */
5034         h->access.set_intr_mask(h, CCISS_INTR_OFF);
5035         rc = cciss_request_irq(h, do_cciss_msix_intr, do_cciss_intx);
5036         if (rc)
5037                 goto clean2;
5038
5039         dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
5040                h->devname, pdev->device, pci_name(pdev),
5041                h->intr[h->intr_mode], dac ? "" : " not");
5042
5043         if (cciss_allocate_cmd_pool(h))
5044                 goto clean4;
5045
5046         if (cciss_allocate_scatterlists(h))
5047                 goto clean4;
5048
5049         h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
5050                 h->chainsize, h->nr_cmds);
5051         if (!h->cmd_sg_list && h->chainsize > 0)
5052                 goto clean4;
5053
5054         spin_lock_init(&h->lock);
5055
5056         /* Initialize the pdev driver private data.
5057            have it point to h.  */
5058         pci_set_drvdata(pdev, h);
5059         /* command and error info recs zeroed out before
5060            they are used */
5061         bitmap_zero(h->cmd_pool_bits, h->nr_cmds);
5062
5063         h->num_luns = 0;
5064         h->highest_lun = -1;
5065         for (j = 0; j < CISS_MAX_LUN; j++) {
5066                 h->drv[j] = NULL;
5067                 h->gendisk[j] = NULL;
5068         }
5069
5070         /* At this point, the controller is ready to take commands.
5071          * Now, if reset_devices and the hard reset didn't work, try
5072          * the soft reset and see if that works.
5073          */
5074         if (try_soft_reset) {
5075
5076                 /* This is kind of gross.  We may or may not get a completion
5077                  * from the soft reset command, and if we do, then the value
5078                  * from the fifo may or may not be valid.  So, we wait 10 secs
5079                  * after the reset throwing away any completions we get during
5080                  * that time.  Unregister the interrupt handler and register
5081                  * fake ones to scoop up any residual completions.
5082                  */
5083                 spin_lock_irqsave(&h->lock, flags);
5084                 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5085                 spin_unlock_irqrestore(&h->lock, flags);
5086                 free_irq(h->intr[h->intr_mode], h);
5087                 rc = cciss_request_irq(h, cciss_msix_discard_completions,
5088                                         cciss_intx_discard_completions);
5089                 if (rc) {
5090                         dev_warn(&h->pdev->dev, "Failed to request_irq after "
5091                                 "soft reset.\n");
5092                         goto clean4;
5093                 }
5094
5095                 rc = cciss_kdump_soft_reset(h);
5096                 if (rc) {
5097                         dev_warn(&h->pdev->dev, "Soft reset failed.\n");
5098                         goto clean4;
5099                 }
5100
5101                 dev_info(&h->pdev->dev, "Board READY.\n");
5102                 dev_info(&h->pdev->dev,
5103                         "Waiting for stale completions to drain.\n");
5104                 h->access.set_intr_mask(h, CCISS_INTR_ON);
5105                 msleep(10000);
5106                 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5107
5108                 rc = controller_reset_failed(h->cfgtable);
5109                 if (rc)
5110                         dev_info(&h->pdev->dev,
5111                                 "Soft reset appears to have failed.\n");
5112
5113                 /* since the controller's reset, we have to go back and re-init
5114                  * everything.  Easiest to just forget what we've done and do it
5115                  * all over again.
5116                  */
5117                 cciss_undo_allocations_after_kdump_soft_reset(h);
5118                 try_soft_reset = 0;
5119                 if (rc)
5120                         /* don't go to clean4, we already unallocated */
5121                         return -ENODEV;
5122
5123                 goto reinit_after_soft_reset;
5124         }
5125
5126         cciss_scsi_setup(h);
5127
5128         /* Turn the interrupts on so we can service requests */
5129         h->access.set_intr_mask(h, CCISS_INTR_ON);
5130
5131         /* Get the firmware version */
5132         inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
5133         if (inq_buff == NULL) {
5134                 dev_err(&h->pdev->dev, "out of memory\n");
5135                 goto clean4;
5136         }
5137
5138         return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
5139                 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
5140         if (return_code == IO_OK) {
5141                 h->firm_ver[0] = inq_buff->data_byte[32];
5142                 h->firm_ver[1] = inq_buff->data_byte[33];
5143                 h->firm_ver[2] = inq_buff->data_byte[34];
5144                 h->firm_ver[3] = inq_buff->data_byte[35];
5145         } else {         /* send command failed */
5146                 dev_warn(&h->pdev->dev, "unable to determine firmware"
5147                         " version of controller\n");
5148         }
5149         kfree(inq_buff);
5150
5151         cciss_procinit(h);
5152
5153         h->cciss_max_sectors = 8192;
5154
5155         rebuild_lun_table(h, 1, 0);
5156         cciss_engage_scsi(h);
5157         h->busy_initializing = 0;
5158         return 1;
5159
5160 clean4:
5161         cciss_free_cmd_pool(h);
5162         cciss_free_scatterlists(h);
5163         cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
5164         free_irq(h->intr[h->intr_mode], h);
5165 clean2:
5166         unregister_blkdev(h->major, h->devname);
5167 clean1:
5168         cciss_destroy_hba_sysfs_entry(h);
5169 clean0:
5170         pci_release_regions(pdev);
5171 clean_no_release_regions:
5172         h->busy_initializing = 0;
5173
5174         /*
5175          * Deliberately omit pci_disable_device(): it does something nasty to
5176          * Smart Array controllers that pci_enable_device does not undo
5177          */
5178         pci_set_drvdata(pdev, NULL);
5179         free_hba(h);
5180         return -1;
5181 }
5182
5183 static void cciss_shutdown(struct pci_dev *pdev)
5184 {
5185         ctlr_info_t *h;
5186         char *flush_buf;
5187         int return_code;
5188
5189         h = pci_get_drvdata(pdev);
5190         flush_buf = kzalloc(4, GFP_KERNEL);
5191         if (!flush_buf) {
5192                 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
5193                 return;
5194         }
5195         /* write all data in the battery backed cache to disk */
5196         return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
5197                 4, 0, CTLR_LUNID, TYPE_CMD);
5198         kfree(flush_buf);
5199         if (return_code != IO_OK)
5200                 dev_warn(&h->pdev->dev, "Error flushing cache\n");
5201         h->access.set_intr_mask(h, CCISS_INTR_OFF);
5202         free_irq(h->intr[h->intr_mode], h);
5203 }
5204
5205 static int cciss_enter_simple_mode(struct ctlr_info *h)
5206 {
5207         u32 trans_support;
5208
5209         trans_support = readl(&(h->cfgtable->TransportSupport));
5210         if (!(trans_support & SIMPLE_MODE))
5211                 return -ENOTSUPP;
5212
5213         h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
5214         writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
5215         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
5216         cciss_wait_for_mode_change_ack(h);
5217         print_cfg_table(h);
5218         if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
5219                 dev_warn(&h->pdev->dev, "unable to get board into simple mode\n");
5220                 return -ENODEV;
5221         }
5222         h->transMethod = CFGTBL_Trans_Simple;
5223         return 0;
5224 }
5225
5226
5227 static void cciss_remove_one(struct pci_dev *pdev)
5228 {
5229         ctlr_info_t *h;
5230         int i, j;
5231
5232         if (pci_get_drvdata(pdev) == NULL) {
5233                 dev_err(&pdev->dev, "Unable to remove device\n");
5234                 return;
5235         }
5236
5237         h = pci_get_drvdata(pdev);
5238         i = h->ctlr;
5239         if (hba[i] == NULL) {
5240                 dev_err(&pdev->dev, "device appears to already be removed\n");
5241                 return;
5242         }
5243
5244         mutex_lock(&h->busy_shutting_down);
5245
5246         remove_from_scan_list(h);
5247         remove_proc_entry(h->devname, proc_cciss);
5248         unregister_blkdev(h->major, h->devname);
5249
5250         /* remove it from the disk list */
5251         for (j = 0; j < CISS_MAX_LUN; j++) {
5252                 struct gendisk *disk = h->gendisk[j];
5253                 if (disk) {
5254                         struct request_queue *q = disk->queue;
5255
5256                         if (disk->flags & GENHD_FL_UP) {
5257                                 cciss_destroy_ld_sysfs_entry(h, j, 1);
5258                                 del_gendisk(disk);
5259                         }
5260                         if (q)
5261                                 blk_cleanup_queue(q);
5262                 }
5263         }
5264
5265 #ifdef CONFIG_CISS_SCSI_TAPE
5266         cciss_unregister_scsi(h);       /* unhook from SCSI subsystem */
5267 #endif
5268
5269         cciss_shutdown(pdev);
5270
5271 #ifdef CONFIG_PCI_MSI
5272         if (h->msix_vector)
5273                 pci_disable_msix(h->pdev);
5274         else if (h->msi_vector)
5275                 pci_disable_msi(h->pdev);
5276 #endif                          /* CONFIG_PCI_MSI */
5277
5278         iounmap(h->transtable);
5279         iounmap(h->cfgtable);
5280         iounmap(h->vaddr);
5281
5282         cciss_free_cmd_pool(h);
5283         /* Free up sg elements */
5284         for (j = 0; j < h->nr_cmds; j++)
5285                 kfree(h->scatter_list[j]);
5286         kfree(h->scatter_list);
5287         cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
5288         kfree(h->blockFetchTable);
5289         if (h->reply_pool)
5290                 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
5291                                 h->reply_pool, h->reply_pool_dhandle);
5292         /*
5293          * Deliberately omit pci_disable_device(): it does something nasty to
5294          * Smart Array controllers that pci_enable_device does not undo
5295          */
5296         pci_release_regions(pdev);
5297         pci_set_drvdata(pdev, NULL);
5298         cciss_destroy_hba_sysfs_entry(h);
5299         mutex_unlock(&h->busy_shutting_down);
5300         free_hba(h);
5301 }
5302
5303 static struct pci_driver cciss_pci_driver = {
5304         .name = "cciss",
5305         .probe = cciss_init_one,
5306         .remove = cciss_remove_one,
5307         .id_table = cciss_pci_device_id,        /* id_table */
5308         .shutdown = cciss_shutdown,
5309 };
5310
5311 /*
5312  *  This is it.  Register the PCI driver information for the cards we control
5313  *  the OS will call our registered routines when it finds one of our cards.
5314  */
5315 static int __init cciss_init(void)
5316 {
5317         int err;
5318
5319         /*
5320          * The hardware requires that commands are aligned on a 64-bit
5321          * boundary. Given that we use pci_alloc_consistent() to allocate an
5322          * array of them, the size must be a multiple of 8 bytes.
5323          */
5324         BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
5325         printk(KERN_INFO DRIVER_NAME "\n");
5326
5327         err = bus_register(&cciss_bus_type);
5328         if (err)
5329                 return err;
5330
5331         /* Start the scan thread */
5332         cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
5333         if (IS_ERR(cciss_scan_thread)) {
5334                 err = PTR_ERR(cciss_scan_thread);
5335                 goto err_bus_unregister;
5336         }
5337
5338         /* Register for our PCI devices */
5339         err = pci_register_driver(&cciss_pci_driver);
5340         if (err)
5341                 goto err_thread_stop;
5342
5343         return err;
5344
5345 err_thread_stop:
5346         kthread_stop(cciss_scan_thread);
5347 err_bus_unregister:
5348         bus_unregister(&cciss_bus_type);
5349
5350         return err;
5351 }
5352
5353 static void __exit cciss_cleanup(void)
5354 {
5355         int i;
5356
5357         pci_unregister_driver(&cciss_pci_driver);
5358         /* double check that all controller entrys have been removed */
5359         for (i = 0; i < MAX_CTLR; i++) {
5360                 if (hba[i] != NULL) {
5361                         dev_warn(&hba[i]->pdev->dev,
5362                                 "had to remove controller\n");
5363                         cciss_remove_one(hba[i]->pdev);
5364                 }
5365         }
5366         kthread_stop(cciss_scan_thread);
5367         if (proc_cciss)
5368                 remove_proc_entry("driver/cciss", NULL);
5369         bus_unregister(&cciss_bus_type);
5370 }
5371
5372 module_init(cciss_init);
5373 module_exit(cciss_cleanup);