Merge branch 'for-3.9/drivers' of git://git.kernel.dk/linux-block
[linux-3.10.git] / drivers / block / DAC960.c
1 /*
2
3   Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
4
5   Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
6   Portions Copyright 2002 by Mylex (An IBM Business Unit)
7
8   This program is free software; you may redistribute and/or modify it under
9   the terms of the GNU General Public License Version 2 as published by the
10   Free Software Foundation.
11
12   This program is distributed in the hope that it will be useful, but
13   WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
14   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
15   for complete details.
16
17 */
18
19
20 #define DAC960_DriverVersion                    "2.5.49"
21 #define DAC960_DriverDate                       "21 Aug 2007"
22
23
24 #include <linux/module.h>
25 #include <linux/types.h>
26 #include <linux/miscdevice.h>
27 #include <linux/blkdev.h>
28 #include <linux/bio.h>
29 #include <linux/completion.h>
30 #include <linux/delay.h>
31 #include <linux/genhd.h>
32 #include <linux/hdreg.h>
33 #include <linux/blkpg.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/interrupt.h>
36 #include <linux/ioport.h>
37 #include <linux/mm.h>
38 #include <linux/slab.h>
39 #include <linux/mutex.h>
40 #include <linux/proc_fs.h>
41 #include <linux/seq_file.h>
42 #include <linux/reboot.h>
43 #include <linux/spinlock.h>
44 #include <linux/timer.h>
45 #include <linux/pci.h>
46 #include <linux/init.h>
47 #include <linux/jiffies.h>
48 #include <linux/random.h>
49 #include <linux/scatterlist.h>
50 #include <asm/io.h>
51 #include <asm/uaccess.h>
52 #include "DAC960.h"
53
54 #define DAC960_GAM_MINOR        252
55
56
57 static DEFINE_MUTEX(DAC960_mutex);
58 static DAC960_Controller_T *DAC960_Controllers[DAC960_MaxControllers];
59 static int DAC960_ControllerCount;
60 static struct proc_dir_entry *DAC960_ProcDirectoryEntry;
61
62 static long disk_size(DAC960_Controller_T *p, int drive_nr)
63 {
64         if (p->FirmwareType == DAC960_V1_Controller) {
65                 if (drive_nr >= p->LogicalDriveCount)
66                         return 0;
67                 return p->V1.LogicalDriveInformation[drive_nr].
68                         LogicalDriveSize;
69         } else {
70                 DAC960_V2_LogicalDeviceInfo_T *i =
71                         p->V2.LogicalDeviceInformation[drive_nr];
72                 if (i == NULL)
73                         return 0;
74                 return i->ConfigurableDeviceSize;
75         }
76 }
77
78 static int DAC960_open(struct block_device *bdev, fmode_t mode)
79 {
80         struct gendisk *disk = bdev->bd_disk;
81         DAC960_Controller_T *p = disk->queue->queuedata;
82         int drive_nr = (long)disk->private_data;
83         int ret = -ENXIO;
84
85         mutex_lock(&DAC960_mutex);
86         if (p->FirmwareType == DAC960_V1_Controller) {
87                 if (p->V1.LogicalDriveInformation[drive_nr].
88                     LogicalDriveState == DAC960_V1_LogicalDrive_Offline)
89                         goto out;
90         } else {
91                 DAC960_V2_LogicalDeviceInfo_T *i =
92                         p->V2.LogicalDeviceInformation[drive_nr];
93                 if (!i || i->LogicalDeviceState == DAC960_V2_LogicalDevice_Offline)
94                         goto out;
95         }
96
97         check_disk_change(bdev);
98
99         if (!get_capacity(p->disks[drive_nr]))
100                 goto out;
101         ret = 0;
102 out:
103         mutex_unlock(&DAC960_mutex);
104         return ret;
105 }
106
107 static int DAC960_getgeo(struct block_device *bdev, struct hd_geometry *geo)
108 {
109         struct gendisk *disk = bdev->bd_disk;
110         DAC960_Controller_T *p = disk->queue->queuedata;
111         int drive_nr = (long)disk->private_data;
112
113         if (p->FirmwareType == DAC960_V1_Controller) {
114                 geo->heads = p->V1.GeometryTranslationHeads;
115                 geo->sectors = p->V1.GeometryTranslationSectors;
116                 geo->cylinders = p->V1.LogicalDriveInformation[drive_nr].
117                         LogicalDriveSize / (geo->heads * geo->sectors);
118         } else {
119                 DAC960_V2_LogicalDeviceInfo_T *i =
120                         p->V2.LogicalDeviceInformation[drive_nr];
121                 switch (i->DriveGeometry) {
122                 case DAC960_V2_Geometry_128_32:
123                         geo->heads = 128;
124                         geo->sectors = 32;
125                         break;
126                 case DAC960_V2_Geometry_255_63:
127                         geo->heads = 255;
128                         geo->sectors = 63;
129                         break;
130                 default:
131                         DAC960_Error("Illegal Logical Device Geometry %d\n",
132                                         p, i->DriveGeometry);
133                         return -EINVAL;
134                 }
135
136                 geo->cylinders = i->ConfigurableDeviceSize /
137                         (geo->heads * geo->sectors);
138         }
139         
140         return 0;
141 }
142
143 static unsigned int DAC960_check_events(struct gendisk *disk,
144                                         unsigned int clearing)
145 {
146         DAC960_Controller_T *p = disk->queue->queuedata;
147         int drive_nr = (long)disk->private_data;
148
149         if (!p->LogicalDriveInitiallyAccessible[drive_nr])
150                 return DISK_EVENT_MEDIA_CHANGE;
151         return 0;
152 }
153
154 static int DAC960_revalidate_disk(struct gendisk *disk)
155 {
156         DAC960_Controller_T *p = disk->queue->queuedata;
157         int unit = (long)disk->private_data;
158
159         set_capacity(disk, disk_size(p, unit));
160         return 0;
161 }
162
163 static const struct block_device_operations DAC960_BlockDeviceOperations = {
164         .owner                  = THIS_MODULE,
165         .open                   = DAC960_open,
166         .getgeo                 = DAC960_getgeo,
167         .check_events           = DAC960_check_events,
168         .revalidate_disk        = DAC960_revalidate_disk,
169 };
170
171
172 /*
173   DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name,
174   Copyright Notice, and Electronic Mail Address.
175 */
176
177 static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller)
178 {
179   DAC960_Announce("***** DAC960 RAID Driver Version "
180                   DAC960_DriverVersion " of "
181                   DAC960_DriverDate " *****\n", Controller);
182   DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff "
183                   "<lnz@dandelion.com>\n", Controller);
184 }
185
186
187 /*
188   DAC960_Failure prints a standardized error message, and then returns false.
189 */
190
191 static bool DAC960_Failure(DAC960_Controller_T *Controller,
192                               unsigned char *ErrorMessage)
193 {
194   DAC960_Error("While configuring DAC960 PCI RAID Controller at\n",
195                Controller);
196   if (Controller->IO_Address == 0)
197     DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
198                  "PCI Address 0x%X\n", Controller,
199                  Controller->Bus, Controller->Device,
200                  Controller->Function, Controller->PCI_Address);
201   else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
202                     "0x%X PCI Address 0x%X\n", Controller,
203                     Controller->Bus, Controller->Device,
204                     Controller->Function, Controller->IO_Address,
205                     Controller->PCI_Address);
206   DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage);
207   return false;
208 }
209
210 /*
211   init_dma_loaf() and slice_dma_loaf() are helper functions for
212   aggregating the dma-mapped memory for a well-known collection of
213   data structures that are of different lengths.
214
215   These routines don't guarantee any alignment.  The caller must
216   include any space needed for alignment in the sizes of the structures
217   that are passed in.
218  */
219
220 static bool init_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf,
221                                                                  size_t len)
222 {
223         void *cpu_addr;
224         dma_addr_t dma_handle;
225
226         cpu_addr = pci_alloc_consistent(dev, len, &dma_handle);
227         if (cpu_addr == NULL)
228                 return false;
229         
230         loaf->cpu_free = loaf->cpu_base = cpu_addr;
231         loaf->dma_free =loaf->dma_base = dma_handle;
232         loaf->length = len;
233         memset(cpu_addr, 0, len);
234         return true;
235 }
236
237 static void *slice_dma_loaf(struct dma_loaf *loaf, size_t len,
238                                         dma_addr_t *dma_handle)
239 {
240         void *cpu_end = loaf->cpu_free + len;
241         void *cpu_addr = loaf->cpu_free;
242
243         BUG_ON(cpu_end > loaf->cpu_base + loaf->length);
244         *dma_handle = loaf->dma_free;
245         loaf->cpu_free = cpu_end;
246         loaf->dma_free += len;
247         return cpu_addr;
248 }
249
250 static void free_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf_handle)
251 {
252         if (loaf_handle->cpu_base != NULL)
253                 pci_free_consistent(dev, loaf_handle->length,
254                         loaf_handle->cpu_base, loaf_handle->dma_base);
255 }
256
257
258 /*
259   DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary
260   data structures for Controller.  It returns true on success and false on
261   failure.
262 */
263
264 static bool DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
265 {
266   int CommandAllocationLength, CommandAllocationGroupSize;
267   int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount;
268   void *AllocationPointer = NULL;
269   void *ScatterGatherCPU = NULL;
270   dma_addr_t ScatterGatherDMA;
271   struct pci_pool *ScatterGatherPool;
272   void *RequestSenseCPU = NULL;
273   dma_addr_t RequestSenseDMA;
274   struct pci_pool *RequestSensePool = NULL;
275
276   if (Controller->FirmwareType == DAC960_V1_Controller)
277     {
278       CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
279       CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
280       ScatterGatherPool = pci_pool_create("DAC960_V1_ScatterGather",
281                 Controller->PCIDevice,
282         DAC960_V1_ScatterGatherLimit * sizeof(DAC960_V1_ScatterGatherSegment_T),
283         sizeof(DAC960_V1_ScatterGatherSegment_T), 0);
284       if (ScatterGatherPool == NULL)
285             return DAC960_Failure(Controller,
286                         "AUXILIARY STRUCTURE CREATION (SG)");
287       Controller->ScatterGatherPool = ScatterGatherPool;
288     }
289   else
290     {
291       CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
292       CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
293       ScatterGatherPool = pci_pool_create("DAC960_V2_ScatterGather",
294                 Controller->PCIDevice,
295         DAC960_V2_ScatterGatherLimit * sizeof(DAC960_V2_ScatterGatherSegment_T),
296         sizeof(DAC960_V2_ScatterGatherSegment_T), 0);
297       if (ScatterGatherPool == NULL)
298             return DAC960_Failure(Controller,
299                         "AUXILIARY STRUCTURE CREATION (SG)");
300       RequestSensePool = pci_pool_create("DAC960_V2_RequestSense",
301                 Controller->PCIDevice, sizeof(DAC960_SCSI_RequestSense_T),
302                 sizeof(int), 0);
303       if (RequestSensePool == NULL) {
304             pci_pool_destroy(ScatterGatherPool);
305             return DAC960_Failure(Controller,
306                         "AUXILIARY STRUCTURE CREATION (SG)");
307       }
308       Controller->ScatterGatherPool = ScatterGatherPool;
309       Controller->V2.RequestSensePool = RequestSensePool;
310     }
311   Controller->CommandAllocationGroupSize = CommandAllocationGroupSize;
312   Controller->FreeCommands = NULL;
313   for (CommandIdentifier = 1;
314        CommandIdentifier <= Controller->DriverQueueDepth;
315        CommandIdentifier++)
316     {
317       DAC960_Command_T *Command;
318       if (--CommandsRemaining <= 0)
319         {
320           CommandsRemaining =
321                 Controller->DriverQueueDepth - CommandIdentifier + 1;
322           if (CommandsRemaining > CommandAllocationGroupSize)
323                 CommandsRemaining = CommandAllocationGroupSize;
324           CommandGroupByteCount =
325                 CommandsRemaining * CommandAllocationLength;
326           AllocationPointer = kzalloc(CommandGroupByteCount, GFP_ATOMIC);
327           if (AllocationPointer == NULL)
328                 return DAC960_Failure(Controller,
329                                         "AUXILIARY STRUCTURE CREATION");
330          }
331       Command = (DAC960_Command_T *) AllocationPointer;
332       AllocationPointer += CommandAllocationLength;
333       Command->CommandIdentifier = CommandIdentifier;
334       Command->Controller = Controller;
335       Command->Next = Controller->FreeCommands;
336       Controller->FreeCommands = Command;
337       Controller->Commands[CommandIdentifier-1] = Command;
338       ScatterGatherCPU = pci_pool_alloc(ScatterGatherPool, GFP_ATOMIC,
339                                                         &ScatterGatherDMA);
340       if (ScatterGatherCPU == NULL)
341           return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
342
343       if (RequestSensePool != NULL) {
344           RequestSenseCPU = pci_pool_alloc(RequestSensePool, GFP_ATOMIC,
345                                                 &RequestSenseDMA);
346           if (RequestSenseCPU == NULL) {
347                 pci_pool_free(ScatterGatherPool, ScatterGatherCPU,
348                                 ScatterGatherDMA);
349                 return DAC960_Failure(Controller,
350                                         "AUXILIARY STRUCTURE CREATION");
351           }
352         }
353      if (Controller->FirmwareType == DAC960_V1_Controller) {
354         Command->cmd_sglist = Command->V1.ScatterList;
355         Command->V1.ScatterGatherList =
356                 (DAC960_V1_ScatterGatherSegment_T *)ScatterGatherCPU;
357         Command->V1.ScatterGatherListDMA = ScatterGatherDMA;
358         sg_init_table(Command->cmd_sglist, DAC960_V1_ScatterGatherLimit);
359       } else {
360         Command->cmd_sglist = Command->V2.ScatterList;
361         Command->V2.ScatterGatherList =
362                 (DAC960_V2_ScatterGatherSegment_T *)ScatterGatherCPU;
363         Command->V2.ScatterGatherListDMA = ScatterGatherDMA;
364         Command->V2.RequestSense =
365                                 (DAC960_SCSI_RequestSense_T *)RequestSenseCPU;
366         Command->V2.RequestSenseDMA = RequestSenseDMA;
367         sg_init_table(Command->cmd_sglist, DAC960_V2_ScatterGatherLimit);
368       }
369     }
370   return true;
371 }
372
373
374 /*
375   DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data
376   structures for Controller.
377 */
378
379 static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
380 {
381   int i;
382   struct pci_pool *ScatterGatherPool = Controller->ScatterGatherPool;
383   struct pci_pool *RequestSensePool = NULL;
384   void *ScatterGatherCPU;
385   dma_addr_t ScatterGatherDMA;
386   void *RequestSenseCPU;
387   dma_addr_t RequestSenseDMA;
388   DAC960_Command_T *CommandGroup = NULL;
389   
390
391   if (Controller->FirmwareType == DAC960_V2_Controller)
392         RequestSensePool = Controller->V2.RequestSensePool;
393
394   Controller->FreeCommands = NULL;
395   for (i = 0; i < Controller->DriverQueueDepth; i++)
396     {
397       DAC960_Command_T *Command = Controller->Commands[i];
398
399       if (Command == NULL)
400           continue;
401
402       if (Controller->FirmwareType == DAC960_V1_Controller) {
403           ScatterGatherCPU = (void *)Command->V1.ScatterGatherList;
404           ScatterGatherDMA = Command->V1.ScatterGatherListDMA;
405           RequestSenseCPU = NULL;
406           RequestSenseDMA = (dma_addr_t)0;
407       } else {
408           ScatterGatherCPU = (void *)Command->V2.ScatterGatherList;
409           ScatterGatherDMA = Command->V2.ScatterGatherListDMA;
410           RequestSenseCPU = (void *)Command->V2.RequestSense;
411           RequestSenseDMA = Command->V2.RequestSenseDMA;
412       }
413       if (ScatterGatherCPU != NULL)
414           pci_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA);
415       if (RequestSenseCPU != NULL)
416           pci_pool_free(RequestSensePool, RequestSenseCPU, RequestSenseDMA);
417
418       if ((Command->CommandIdentifier
419            % Controller->CommandAllocationGroupSize) == 1) {
420            /*
421             * We can't free the group of commands until all of the
422             * request sense and scatter gather dma structures are free.
423             * Remember the beginning of the group, but don't free it
424             * until we've reached the beginning of the next group.
425             */
426            kfree(CommandGroup);
427            CommandGroup = Command;
428       }
429       Controller->Commands[i] = NULL;
430     }
431   kfree(CommandGroup);
432
433   if (Controller->CombinedStatusBuffer != NULL)
434     {
435       kfree(Controller->CombinedStatusBuffer);
436       Controller->CombinedStatusBuffer = NULL;
437       Controller->CurrentStatusBuffer = NULL;
438     }
439
440   if (ScatterGatherPool != NULL)
441         pci_pool_destroy(ScatterGatherPool);
442   if (Controller->FirmwareType == DAC960_V1_Controller)
443         return;
444
445   if (RequestSensePool != NULL)
446         pci_pool_destroy(RequestSensePool);
447
448   for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
449         kfree(Controller->V2.LogicalDeviceInformation[i]);
450         Controller->V2.LogicalDeviceInformation[i] = NULL;
451   }
452
453   for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++)
454     {
455       kfree(Controller->V2.PhysicalDeviceInformation[i]);
456       Controller->V2.PhysicalDeviceInformation[i] = NULL;
457       kfree(Controller->V2.InquiryUnitSerialNumber[i]);
458       Controller->V2.InquiryUnitSerialNumber[i] = NULL;
459     }
460 }
461
462
463 /*
464   DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1
465   Firmware Controllers.
466 */
467
468 static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command)
469 {
470   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
471   memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
472   Command->V1.CommandStatus = 0;
473 }
474
475
476 /*
477   DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2
478   Firmware Controllers.
479 */
480
481 static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command)
482 {
483   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
484   memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
485   Command->V2.CommandStatus = 0;
486 }
487
488
489 /*
490   DAC960_AllocateCommand allocates a Command structure from Controller's
491   free list.  During driver initialization, a special initialization command
492   has been placed on the free list to guarantee that command allocation can
493   never fail.
494 */
495
496 static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T
497                                                        *Controller)
498 {
499   DAC960_Command_T *Command = Controller->FreeCommands;
500   if (Command == NULL) return NULL;
501   Controller->FreeCommands = Command->Next;
502   Command->Next = NULL;
503   return Command;
504 }
505
506
507 /*
508   DAC960_DeallocateCommand deallocates Command, returning it to Controller's
509   free list.
510 */
511
512 static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command)
513 {
514   DAC960_Controller_T *Controller = Command->Controller;
515
516   Command->Request = NULL;
517   Command->Next = Controller->FreeCommands;
518   Controller->FreeCommands = Command;
519 }
520
521
522 /*
523   DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue.
524 */
525
526 static void DAC960_WaitForCommand(DAC960_Controller_T *Controller)
527 {
528   spin_unlock_irq(&Controller->queue_lock);
529   __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands);
530   spin_lock_irq(&Controller->queue_lock);
531 }
532
533 /*
534   DAC960_GEM_QueueCommand queues Command for DAC960 GEM Series Controllers.
535 */
536
537 static void DAC960_GEM_QueueCommand(DAC960_Command_T *Command)
538 {
539   DAC960_Controller_T *Controller = Command->Controller;
540   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
541   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
542   DAC960_V2_CommandMailbox_T *NextCommandMailbox =
543       Controller->V2.NextCommandMailbox;
544
545   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
546   DAC960_GEM_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
547
548   if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
549       Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
550       DAC960_GEM_MemoryMailboxNewCommand(ControllerBaseAddress);
551
552   Controller->V2.PreviousCommandMailbox2 =
553       Controller->V2.PreviousCommandMailbox1;
554   Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
555
556   if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
557       NextCommandMailbox = Controller->V2.FirstCommandMailbox;
558
559   Controller->V2.NextCommandMailbox = NextCommandMailbox;
560 }
561
562 /*
563   DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers.
564 */
565
566 static void DAC960_BA_QueueCommand(DAC960_Command_T *Command)
567 {
568   DAC960_Controller_T *Controller = Command->Controller;
569   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
570   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
571   DAC960_V2_CommandMailbox_T *NextCommandMailbox =
572     Controller->V2.NextCommandMailbox;
573   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
574   DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
575   if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
576       Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
577     DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
578   Controller->V2.PreviousCommandMailbox2 =
579     Controller->V2.PreviousCommandMailbox1;
580   Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
581   if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
582     NextCommandMailbox = Controller->V2.FirstCommandMailbox;
583   Controller->V2.NextCommandMailbox = NextCommandMailbox;
584 }
585
586
587 /*
588   DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers.
589 */
590
591 static void DAC960_LP_QueueCommand(DAC960_Command_T *Command)
592 {
593   DAC960_Controller_T *Controller = Command->Controller;
594   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
595   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
596   DAC960_V2_CommandMailbox_T *NextCommandMailbox =
597     Controller->V2.NextCommandMailbox;
598   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
599   DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
600   if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
601       Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
602     DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
603   Controller->V2.PreviousCommandMailbox2 =
604     Controller->V2.PreviousCommandMailbox1;
605   Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
606   if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
607     NextCommandMailbox = Controller->V2.FirstCommandMailbox;
608   Controller->V2.NextCommandMailbox = NextCommandMailbox;
609 }
610
611
612 /*
613   DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series
614   Controllers with Dual Mode Firmware.
615 */
616
617 static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command)
618 {
619   DAC960_Controller_T *Controller = Command->Controller;
620   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
621   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
622   DAC960_V1_CommandMailbox_T *NextCommandMailbox =
623     Controller->V1.NextCommandMailbox;
624   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
625   DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
626   if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
627       Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
628     DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
629   Controller->V1.PreviousCommandMailbox2 =
630     Controller->V1.PreviousCommandMailbox1;
631   Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
632   if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
633     NextCommandMailbox = Controller->V1.FirstCommandMailbox;
634   Controller->V1.NextCommandMailbox = NextCommandMailbox;
635 }
636
637
638 /*
639   DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series
640   Controllers with Single Mode Firmware.
641 */
642
643 static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command)
644 {
645   DAC960_Controller_T *Controller = Command->Controller;
646   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
647   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
648   DAC960_V1_CommandMailbox_T *NextCommandMailbox =
649     Controller->V1.NextCommandMailbox;
650   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
651   DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
652   if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
653       Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
654     DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
655   Controller->V1.PreviousCommandMailbox2 =
656     Controller->V1.PreviousCommandMailbox1;
657   Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
658   if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
659     NextCommandMailbox = Controller->V1.FirstCommandMailbox;
660   Controller->V1.NextCommandMailbox = NextCommandMailbox;
661 }
662
663
664 /*
665   DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series
666   Controllers with Dual Mode Firmware.
667 */
668
669 static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command)
670 {
671   DAC960_Controller_T *Controller = Command->Controller;
672   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
673   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
674   DAC960_V1_CommandMailbox_T *NextCommandMailbox =
675     Controller->V1.NextCommandMailbox;
676   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
677   DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
678   if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
679       Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
680     DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress);
681   Controller->V1.PreviousCommandMailbox2 =
682     Controller->V1.PreviousCommandMailbox1;
683   Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
684   if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
685     NextCommandMailbox = Controller->V1.FirstCommandMailbox;
686   Controller->V1.NextCommandMailbox = NextCommandMailbox;
687 }
688
689
690 /*
691   DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series
692   Controllers with Single Mode Firmware.
693 */
694
695 static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command)
696 {
697   DAC960_Controller_T *Controller = Command->Controller;
698   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
699   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
700   DAC960_V1_CommandMailbox_T *NextCommandMailbox =
701     Controller->V1.NextCommandMailbox;
702   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
703   DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
704   if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
705       Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
706     DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
707   Controller->V1.PreviousCommandMailbox2 =
708     Controller->V1.PreviousCommandMailbox1;
709   Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
710   if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
711     NextCommandMailbox = Controller->V1.FirstCommandMailbox;
712   Controller->V1.NextCommandMailbox = NextCommandMailbox;
713 }
714
715
716 /*
717   DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers.
718 */
719
720 static void DAC960_PD_QueueCommand(DAC960_Command_T *Command)
721 {
722   DAC960_Controller_T *Controller = Command->Controller;
723   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
724   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
725   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
726   while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
727     udelay(1);
728   DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
729   DAC960_PD_NewCommand(ControllerBaseAddress);
730 }
731
732
733 /*
734   DAC960_P_QueueCommand queues Command for DAC960 P Series Controllers.
735 */
736
737 static void DAC960_P_QueueCommand(DAC960_Command_T *Command)
738 {
739   DAC960_Controller_T *Controller = Command->Controller;
740   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
741   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
742   CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
743   switch (CommandMailbox->Common.CommandOpcode)
744     {
745     case DAC960_V1_Enquiry:
746       CommandMailbox->Common.CommandOpcode = DAC960_V1_Enquiry_Old;
747       break;
748     case DAC960_V1_GetDeviceState:
749       CommandMailbox->Common.CommandOpcode = DAC960_V1_GetDeviceState_Old;
750       break;
751     case DAC960_V1_Read:
752       CommandMailbox->Common.CommandOpcode = DAC960_V1_Read_Old;
753       DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
754       break;
755     case DAC960_V1_Write:
756       CommandMailbox->Common.CommandOpcode = DAC960_V1_Write_Old;
757       DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
758       break;
759     case DAC960_V1_ReadWithScatterGather:
760       CommandMailbox->Common.CommandOpcode =
761         DAC960_V1_ReadWithScatterGather_Old;
762       DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
763       break;
764     case DAC960_V1_WriteWithScatterGather:
765       CommandMailbox->Common.CommandOpcode =
766         DAC960_V1_WriteWithScatterGather_Old;
767       DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
768       break;
769     default:
770       break;
771     }
772   while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
773     udelay(1);
774   DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
775   DAC960_PD_NewCommand(ControllerBaseAddress);
776 }
777
778
779 /*
780   DAC960_ExecuteCommand executes Command and waits for completion.
781 */
782
783 static void DAC960_ExecuteCommand(DAC960_Command_T *Command)
784 {
785   DAC960_Controller_T *Controller = Command->Controller;
786   DECLARE_COMPLETION_ONSTACK(Completion);
787   unsigned long flags;
788   Command->Completion = &Completion;
789
790   spin_lock_irqsave(&Controller->queue_lock, flags);
791   DAC960_QueueCommand(Command);
792   spin_unlock_irqrestore(&Controller->queue_lock, flags);
793  
794   if (in_interrupt())
795           return;
796   wait_for_completion(&Completion);
797 }
798
799
800 /*
801   DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3
802   Command and waits for completion.  It returns true on success and false
803   on failure.
804 */
805
806 static bool DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller,
807                                       DAC960_V1_CommandOpcode_T CommandOpcode,
808                                       dma_addr_t DataDMA)
809 {
810   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
811   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
812   DAC960_V1_CommandStatus_T CommandStatus;
813   DAC960_V1_ClearCommand(Command);
814   Command->CommandType = DAC960_ImmediateCommand;
815   CommandMailbox->Type3.CommandOpcode = CommandOpcode;
816   CommandMailbox->Type3.BusAddress = DataDMA;
817   DAC960_ExecuteCommand(Command);
818   CommandStatus = Command->V1.CommandStatus;
819   DAC960_DeallocateCommand(Command);
820   return (CommandStatus == DAC960_V1_NormalCompletion);
821 }
822
823
824 /*
825   DAC960_V1_ExecuteTypeB executes a DAC960 V1 Firmware Controller Type 3B
826   Command and waits for completion.  It returns true on success and false
827   on failure.
828 */
829
830 static bool DAC960_V1_ExecuteType3B(DAC960_Controller_T *Controller,
831                                        DAC960_V1_CommandOpcode_T CommandOpcode,
832                                        unsigned char CommandOpcode2,
833                                        dma_addr_t DataDMA)
834 {
835   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
836   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
837   DAC960_V1_CommandStatus_T CommandStatus;
838   DAC960_V1_ClearCommand(Command);
839   Command->CommandType = DAC960_ImmediateCommand;
840   CommandMailbox->Type3B.CommandOpcode = CommandOpcode;
841   CommandMailbox->Type3B.CommandOpcode2 = CommandOpcode2;
842   CommandMailbox->Type3B.BusAddress = DataDMA;
843   DAC960_ExecuteCommand(Command);
844   CommandStatus = Command->V1.CommandStatus;
845   DAC960_DeallocateCommand(Command);
846   return (CommandStatus == DAC960_V1_NormalCompletion);
847 }
848
849
850 /*
851   DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D
852   Command and waits for completion.  It returns true on success and false
853   on failure.
854 */
855
856 static bool DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller,
857                                        DAC960_V1_CommandOpcode_T CommandOpcode,
858                                        unsigned char Channel,
859                                        unsigned char TargetID,
860                                        dma_addr_t DataDMA)
861 {
862   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
863   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
864   DAC960_V1_CommandStatus_T CommandStatus;
865   DAC960_V1_ClearCommand(Command);
866   Command->CommandType = DAC960_ImmediateCommand;
867   CommandMailbox->Type3D.CommandOpcode = CommandOpcode;
868   CommandMailbox->Type3D.Channel = Channel;
869   CommandMailbox->Type3D.TargetID = TargetID;
870   CommandMailbox->Type3D.BusAddress = DataDMA;
871   DAC960_ExecuteCommand(Command);
872   CommandStatus = Command->V1.CommandStatus;
873   DAC960_DeallocateCommand(Command);
874   return (CommandStatus == DAC960_V1_NormalCompletion);
875 }
876
877
878 /*
879   DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information
880   Reading IOCTL Command and waits for completion.  It returns true on success
881   and false on failure.
882
883   Return data in The controller's HealthStatusBuffer, which is dma-able memory
884 */
885
886 static bool DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller)
887 {
888   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
889   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
890   DAC960_V2_CommandStatus_T CommandStatus;
891   DAC960_V2_ClearCommand(Command);
892   Command->CommandType = DAC960_ImmediateCommand;
893   CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
894   CommandMailbox->Common.CommandControlBits
895                         .DataTransferControllerToHost = true;
896   CommandMailbox->Common.CommandControlBits
897                         .NoAutoRequestSense = true;
898   CommandMailbox->Common.DataTransferSize = sizeof(DAC960_V2_HealthStatusBuffer_T);
899   CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_GetHealthStatus;
900   CommandMailbox->Common.DataTransferMemoryAddress
901                         .ScatterGatherSegments[0]
902                         .SegmentDataPointer =
903     Controller->V2.HealthStatusBufferDMA;
904   CommandMailbox->Common.DataTransferMemoryAddress
905                         .ScatterGatherSegments[0]
906                         .SegmentByteCount =
907     CommandMailbox->Common.DataTransferSize;
908   DAC960_ExecuteCommand(Command);
909   CommandStatus = Command->V2.CommandStatus;
910   DAC960_DeallocateCommand(Command);
911   return (CommandStatus == DAC960_V2_NormalCompletion);
912 }
913
914
915 /*
916   DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller
917   Information Reading IOCTL Command and waits for completion.  It returns
918   true on success and false on failure.
919
920   Data is returned in the controller's V2.NewControllerInformation dma-able
921   memory buffer.
922 */
923
924 static bool DAC960_V2_NewControllerInfo(DAC960_Controller_T *Controller)
925 {
926   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
927   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
928   DAC960_V2_CommandStatus_T CommandStatus;
929   DAC960_V2_ClearCommand(Command);
930   Command->CommandType = DAC960_ImmediateCommand;
931   CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
932   CommandMailbox->ControllerInfo.CommandControlBits
933                                 .DataTransferControllerToHost = true;
934   CommandMailbox->ControllerInfo.CommandControlBits
935                                 .NoAutoRequestSense = true;
936   CommandMailbox->ControllerInfo.DataTransferSize = sizeof(DAC960_V2_ControllerInfo_T);
937   CommandMailbox->ControllerInfo.ControllerNumber = 0;
938   CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
939   CommandMailbox->ControllerInfo.DataTransferMemoryAddress
940                                 .ScatterGatherSegments[0]
941                                 .SegmentDataPointer =
942         Controller->V2.NewControllerInformationDMA;
943   CommandMailbox->ControllerInfo.DataTransferMemoryAddress
944                                 .ScatterGatherSegments[0]
945                                 .SegmentByteCount =
946     CommandMailbox->ControllerInfo.DataTransferSize;
947   DAC960_ExecuteCommand(Command);
948   CommandStatus = Command->V2.CommandStatus;
949   DAC960_DeallocateCommand(Command);
950   return (CommandStatus == DAC960_V2_NormalCompletion);
951 }
952
953
954 /*
955   DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical
956   Device Information Reading IOCTL Command and waits for completion.  It
957   returns true on success and false on failure.
958
959   Data is returned in the controller's V2.NewLogicalDeviceInformation
960 */
961
962 static bool DAC960_V2_NewLogicalDeviceInfo(DAC960_Controller_T *Controller,
963                                            unsigned short LogicalDeviceNumber)
964 {
965   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
966   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
967   DAC960_V2_CommandStatus_T CommandStatus;
968
969   DAC960_V2_ClearCommand(Command);
970   Command->CommandType = DAC960_ImmediateCommand;
971   CommandMailbox->LogicalDeviceInfo.CommandOpcode =
972                                 DAC960_V2_IOCTL;
973   CommandMailbox->LogicalDeviceInfo.CommandControlBits
974                                    .DataTransferControllerToHost = true;
975   CommandMailbox->LogicalDeviceInfo.CommandControlBits
976                                    .NoAutoRequestSense = true;
977   CommandMailbox->LogicalDeviceInfo.DataTransferSize = 
978                                 sizeof(DAC960_V2_LogicalDeviceInfo_T);
979   CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
980     LogicalDeviceNumber;
981   CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = DAC960_V2_GetLogicalDeviceInfoValid;
982   CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
983                                    .ScatterGatherSegments[0]
984                                    .SegmentDataPointer =
985         Controller->V2.NewLogicalDeviceInformationDMA;
986   CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
987                                    .ScatterGatherSegments[0]
988                                    .SegmentByteCount =
989     CommandMailbox->LogicalDeviceInfo.DataTransferSize;
990   DAC960_ExecuteCommand(Command);
991   CommandStatus = Command->V2.CommandStatus;
992   DAC960_DeallocateCommand(Command);
993   return (CommandStatus == DAC960_V2_NormalCompletion);
994 }
995
996
997 /*
998   DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller "Read
999   Physical Device Information" IOCTL Command and waits for completion.  It
1000   returns true on success and false on failure.
1001
1002   The Channel, TargetID, LogicalUnit arguments should be 0 the first time
1003   this function is called for a given controller.  This will return data
1004   for the "first" device on that controller.  The returned data includes a
1005   Channel, TargetID, LogicalUnit that can be passed in to this routine to
1006   get data for the NEXT device on that controller.
1007
1008   Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1009   memory buffer.
1010
1011 */
1012
1013 static bool DAC960_V2_NewPhysicalDeviceInfo(DAC960_Controller_T *Controller,
1014                                             unsigned char Channel,
1015                                             unsigned char TargetID,
1016                                             unsigned char LogicalUnit)
1017 {
1018   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1019   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1020   DAC960_V2_CommandStatus_T CommandStatus;
1021
1022   DAC960_V2_ClearCommand(Command);
1023   Command->CommandType = DAC960_ImmediateCommand;
1024   CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
1025   CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1026                                     .DataTransferControllerToHost = true;
1027   CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1028                                     .NoAutoRequestSense = true;
1029   CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
1030                                 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
1031   CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit;
1032   CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
1033   CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
1034   CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
1035                                         DAC960_V2_GetPhysicalDeviceInfoValid;
1036   CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1037                                     .ScatterGatherSegments[0]
1038                                     .SegmentDataPointer =
1039                                         Controller->V2.NewPhysicalDeviceInformationDMA;
1040   CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1041                                     .ScatterGatherSegments[0]
1042                                     .SegmentByteCount =
1043     CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
1044   DAC960_ExecuteCommand(Command);
1045   CommandStatus = Command->V2.CommandStatus;
1046   DAC960_DeallocateCommand(Command);
1047   return (CommandStatus == DAC960_V2_NormalCompletion);
1048 }
1049
1050
1051 static void DAC960_V2_ConstructNewUnitSerialNumber(
1052         DAC960_Controller_T *Controller,
1053         DAC960_V2_CommandMailbox_T *CommandMailbox, int Channel, int TargetID,
1054         int LogicalUnit)
1055 {
1056       CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru;
1057       CommandMailbox->SCSI_10.CommandControlBits
1058                              .DataTransferControllerToHost = true;
1059       CommandMailbox->SCSI_10.CommandControlBits
1060                              .NoAutoRequestSense = true;
1061       CommandMailbox->SCSI_10.DataTransferSize =
1062         sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1063       CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit;
1064       CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID;
1065       CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel;
1066       CommandMailbox->SCSI_10.CDBLength = 6;
1067       CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */
1068       CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */
1069       CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */
1070       CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */
1071       CommandMailbox->SCSI_10.SCSI_CDB[4] =
1072         sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1073       CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */
1074       CommandMailbox->SCSI_10.DataTransferMemoryAddress
1075                              .ScatterGatherSegments[0]
1076                              .SegmentDataPointer =
1077                 Controller->V2.NewInquiryUnitSerialNumberDMA;
1078       CommandMailbox->SCSI_10.DataTransferMemoryAddress
1079                              .ScatterGatherSegments[0]
1080                              .SegmentByteCount =
1081                 CommandMailbox->SCSI_10.DataTransferSize;
1082 }
1083
1084
1085 /*
1086   DAC960_V2_NewUnitSerialNumber executes an SCSI pass-through
1087   Inquiry command to a SCSI device identified by Channel number,
1088   Target id, Logical Unit Number.  This function Waits for completion
1089   of the command.
1090
1091   The return data includes Unit Serial Number information for the
1092   specified device.
1093
1094   Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1095   memory buffer.
1096 */
1097
1098 static bool DAC960_V2_NewInquiryUnitSerialNumber(DAC960_Controller_T *Controller,
1099                         int Channel, int TargetID, int LogicalUnit)
1100 {
1101       DAC960_Command_T *Command;
1102       DAC960_V2_CommandMailbox_T *CommandMailbox;
1103       DAC960_V2_CommandStatus_T CommandStatus;
1104
1105       Command = DAC960_AllocateCommand(Controller);
1106       CommandMailbox = &Command->V2.CommandMailbox;
1107       DAC960_V2_ClearCommand(Command);
1108       Command->CommandType = DAC960_ImmediateCommand;
1109
1110       DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
1111                         Channel, TargetID, LogicalUnit);
1112
1113       DAC960_ExecuteCommand(Command);
1114       CommandStatus = Command->V2.CommandStatus;
1115       DAC960_DeallocateCommand(Command);
1116       return (CommandStatus == DAC960_V2_NormalCompletion);
1117 }
1118
1119
1120 /*
1121   DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device
1122   Operation IOCTL Command and waits for completion.  It returns true on
1123   success and false on failure.
1124 */
1125
1126 static bool DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller,
1127                                          DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
1128                                          DAC960_V2_OperationDevice_T
1129                                            OperationDevice)
1130 {
1131   DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1132   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1133   DAC960_V2_CommandStatus_T CommandStatus;
1134   DAC960_V2_ClearCommand(Command);
1135   Command->CommandType = DAC960_ImmediateCommand;
1136   CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL;
1137   CommandMailbox->DeviceOperation.CommandControlBits
1138                                  .DataTransferControllerToHost = true;
1139   CommandMailbox->DeviceOperation.CommandControlBits
1140                                  .NoAutoRequestSense = true;
1141   CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode;
1142   CommandMailbox->DeviceOperation.OperationDevice = OperationDevice;
1143   DAC960_ExecuteCommand(Command);
1144   CommandStatus = Command->V2.CommandStatus;
1145   DAC960_DeallocateCommand(Command);
1146   return (CommandStatus == DAC960_V2_NormalCompletion);
1147 }
1148
1149
1150 /*
1151   DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1152   for DAC960 V1 Firmware Controllers.
1153
1154   PD and P controller types have no memory mailbox, but still need the
1155   other dma mapped memory.
1156 */
1157
1158 static bool DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T
1159                                                       *Controller)
1160 {
1161   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1162   DAC960_HardwareType_T hw_type = Controller->HardwareType;
1163   struct pci_dev *PCI_Device = Controller->PCIDevice;
1164   struct dma_loaf *DmaPages = &Controller->DmaPages;
1165   size_t DmaPagesSize;
1166   size_t CommandMailboxesSize;
1167   size_t StatusMailboxesSize;
1168
1169   DAC960_V1_CommandMailbox_T *CommandMailboxesMemory;
1170   dma_addr_t CommandMailboxesMemoryDMA;
1171
1172   DAC960_V1_StatusMailbox_T *StatusMailboxesMemory;
1173   dma_addr_t StatusMailboxesMemoryDMA;
1174
1175   DAC960_V1_CommandMailbox_T CommandMailbox;
1176   DAC960_V1_CommandStatus_T CommandStatus;
1177   int TimeoutCounter;
1178   int i;
1179
1180   memset(&CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
1181
1182   if (pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(32)))
1183         return DAC960_Failure(Controller, "DMA mask out of range");
1184   Controller->BounceBufferLimit = DMA_BIT_MASK(32);
1185
1186   if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) {
1187     CommandMailboxesSize =  0;
1188     StatusMailboxesSize = 0;
1189   } else {
1190     CommandMailboxesSize =  DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T);
1191     StatusMailboxesSize = DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T);
1192   }
1193   DmaPagesSize = CommandMailboxesSize + StatusMailboxesSize + 
1194         sizeof(DAC960_V1_DCDB_T) + sizeof(DAC960_V1_Enquiry_T) +
1195         sizeof(DAC960_V1_ErrorTable_T) + sizeof(DAC960_V1_EventLogEntry_T) +
1196         sizeof(DAC960_V1_RebuildProgress_T) +
1197         sizeof(DAC960_V1_LogicalDriveInformationArray_T) +
1198         sizeof(DAC960_V1_BackgroundInitializationStatus_T) +
1199         sizeof(DAC960_V1_DeviceState_T) + sizeof(DAC960_SCSI_Inquiry_T) +
1200         sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1201
1202   if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize))
1203         return false;
1204
1205
1206   if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) 
1207         goto skip_mailboxes;
1208
1209   CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1210                 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1211   
1212   /* These are the base addresses for the command memory mailbox array */
1213   Controller->V1.FirstCommandMailbox = CommandMailboxesMemory;
1214   Controller->V1.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1215
1216   CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1;
1217   Controller->V1.LastCommandMailbox = CommandMailboxesMemory;
1218   Controller->V1.NextCommandMailbox = Controller->V1.FirstCommandMailbox;
1219   Controller->V1.PreviousCommandMailbox1 = Controller->V1.LastCommandMailbox;
1220   Controller->V1.PreviousCommandMailbox2 =
1221                                         Controller->V1.LastCommandMailbox - 1;
1222
1223   /* These are the base addresses for the status memory mailbox array */
1224   StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1225                 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1226
1227   Controller->V1.FirstStatusMailbox = StatusMailboxesMemory;
1228   Controller->V1.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1229   StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1;
1230   Controller->V1.LastStatusMailbox = StatusMailboxesMemory;
1231   Controller->V1.NextStatusMailbox = Controller->V1.FirstStatusMailbox;
1232
1233 skip_mailboxes:
1234   Controller->V1.MonitoringDCDB = slice_dma_loaf(DmaPages,
1235                 sizeof(DAC960_V1_DCDB_T),
1236                 &Controller->V1.MonitoringDCDB_DMA);
1237
1238   Controller->V1.NewEnquiry = slice_dma_loaf(DmaPages,
1239                 sizeof(DAC960_V1_Enquiry_T),
1240                 &Controller->V1.NewEnquiryDMA);
1241
1242   Controller->V1.NewErrorTable = slice_dma_loaf(DmaPages,
1243                 sizeof(DAC960_V1_ErrorTable_T),
1244                 &Controller->V1.NewErrorTableDMA);
1245
1246   Controller->V1.EventLogEntry = slice_dma_loaf(DmaPages,
1247                 sizeof(DAC960_V1_EventLogEntry_T),
1248                 &Controller->V1.EventLogEntryDMA);
1249
1250   Controller->V1.RebuildProgress = slice_dma_loaf(DmaPages,
1251                 sizeof(DAC960_V1_RebuildProgress_T),
1252                 &Controller->V1.RebuildProgressDMA);
1253
1254   Controller->V1.NewLogicalDriveInformation = slice_dma_loaf(DmaPages,
1255                 sizeof(DAC960_V1_LogicalDriveInformationArray_T),
1256                 &Controller->V1.NewLogicalDriveInformationDMA);
1257
1258   Controller->V1.BackgroundInitializationStatus = slice_dma_loaf(DmaPages,
1259                 sizeof(DAC960_V1_BackgroundInitializationStatus_T),
1260                 &Controller->V1.BackgroundInitializationStatusDMA);
1261
1262   Controller->V1.NewDeviceState = slice_dma_loaf(DmaPages,
1263                 sizeof(DAC960_V1_DeviceState_T),
1264                 &Controller->V1.NewDeviceStateDMA);
1265
1266   Controller->V1.NewInquiryStandardData = slice_dma_loaf(DmaPages,
1267                 sizeof(DAC960_SCSI_Inquiry_T),
1268                 &Controller->V1.NewInquiryStandardDataDMA);
1269
1270   Controller->V1.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1271                 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1272                 &Controller->V1.NewInquiryUnitSerialNumberDMA);
1273
1274   if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1275         return true;
1276  
1277   /* Enable the Memory Mailbox Interface. */
1278   Controller->V1.DualModeMemoryMailboxInterface = true;
1279   CommandMailbox.TypeX.CommandOpcode = 0x2B;
1280   CommandMailbox.TypeX.CommandIdentifier = 0;
1281   CommandMailbox.TypeX.CommandOpcode2 = 0x14;
1282   CommandMailbox.TypeX.CommandMailboxesBusAddress =
1283                                 Controller->V1.FirstCommandMailboxDMA;
1284   CommandMailbox.TypeX.StatusMailboxesBusAddress =
1285                                 Controller->V1.FirstStatusMailboxDMA;
1286 #define TIMEOUT_COUNT 1000000
1287
1288   for (i = 0; i < 2; i++)
1289     switch (Controller->HardwareType)
1290       {
1291       case DAC960_LA_Controller:
1292         TimeoutCounter = TIMEOUT_COUNT;
1293         while (--TimeoutCounter >= 0)
1294           {
1295             if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress))
1296               break;
1297             udelay(10);
1298           }
1299         if (TimeoutCounter < 0) return false;
1300         DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1301         DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
1302         TimeoutCounter = TIMEOUT_COUNT;
1303         while (--TimeoutCounter >= 0)
1304           {
1305             if (DAC960_LA_HardwareMailboxStatusAvailableP(
1306                   ControllerBaseAddress))
1307               break;
1308             udelay(10);
1309           }
1310         if (TimeoutCounter < 0) return false;
1311         CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress);
1312         DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1313         DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1314         if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1315         Controller->V1.DualModeMemoryMailboxInterface = false;
1316         CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1317         break;
1318       case DAC960_PG_Controller:
1319         TimeoutCounter = TIMEOUT_COUNT;
1320         while (--TimeoutCounter >= 0)
1321           {
1322             if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress))
1323               break;
1324             udelay(10);
1325           }
1326         if (TimeoutCounter < 0) return false;
1327         DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1328         DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
1329
1330         TimeoutCounter = TIMEOUT_COUNT;
1331         while (--TimeoutCounter >= 0)
1332           {
1333             if (DAC960_PG_HardwareMailboxStatusAvailableP(
1334                   ControllerBaseAddress))
1335               break;
1336             udelay(10);
1337           }
1338         if (TimeoutCounter < 0) return false;
1339         CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress);
1340         DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1341         DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1342         if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1343         Controller->V1.DualModeMemoryMailboxInterface = false;
1344         CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1345         break;
1346       default:
1347         DAC960_Failure(Controller, "Unknown Controller Type\n");
1348         break;
1349       }
1350   return false;
1351 }
1352
1353
1354 /*
1355   DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1356   for DAC960 V2 Firmware Controllers.
1357
1358   Aggregate the space needed for the controller's memory mailbox and
1359   the other data structures that will be targets of dma transfers with
1360   the controller.  Allocate a dma-mapped region of memory to hold these
1361   structures.  Then, save CPU pointers and dma_addr_t values to reference
1362   the structures that are contained in that region.
1363 */
1364
1365 static bool DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T
1366                                                       *Controller)
1367 {
1368   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1369   struct pci_dev *PCI_Device = Controller->PCIDevice;
1370   struct dma_loaf *DmaPages = &Controller->DmaPages;
1371   size_t DmaPagesSize;
1372   size_t CommandMailboxesSize;
1373   size_t StatusMailboxesSize;
1374
1375   DAC960_V2_CommandMailbox_T *CommandMailboxesMemory;
1376   dma_addr_t CommandMailboxesMemoryDMA;
1377
1378   DAC960_V2_StatusMailbox_T *StatusMailboxesMemory;
1379   dma_addr_t StatusMailboxesMemoryDMA;
1380
1381   DAC960_V2_CommandMailbox_T *CommandMailbox;
1382   dma_addr_t    CommandMailboxDMA;
1383   DAC960_V2_CommandStatus_T CommandStatus;
1384
1385         if (!pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(64)))
1386                 Controller->BounceBufferLimit = DMA_BIT_MASK(64);
1387         else if (!pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(32)))
1388                 Controller->BounceBufferLimit = DMA_BIT_MASK(32);
1389         else
1390                 return DAC960_Failure(Controller, "DMA mask out of range");
1391
1392   /* This is a temporary dma mapping, used only in the scope of this function */
1393   CommandMailbox = pci_alloc_consistent(PCI_Device,
1394                 sizeof(DAC960_V2_CommandMailbox_T), &CommandMailboxDMA);
1395   if (CommandMailbox == NULL)
1396           return false;
1397
1398   CommandMailboxesSize = DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T);
1399   StatusMailboxesSize = DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T);
1400   DmaPagesSize =
1401     CommandMailboxesSize + StatusMailboxesSize +
1402     sizeof(DAC960_V2_HealthStatusBuffer_T) +
1403     sizeof(DAC960_V2_ControllerInfo_T) +
1404     sizeof(DAC960_V2_LogicalDeviceInfo_T) +
1405     sizeof(DAC960_V2_PhysicalDeviceInfo_T) +
1406     sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T) +
1407     sizeof(DAC960_V2_Event_T) +
1408     sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
1409
1410   if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) {
1411         pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1412                                         CommandMailbox, CommandMailboxDMA);
1413         return false;
1414   }
1415
1416   CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1417                 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1418
1419   /* These are the base addresses for the command memory mailbox array */
1420   Controller->V2.FirstCommandMailbox = CommandMailboxesMemory;
1421   Controller->V2.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1422
1423   CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1;
1424   Controller->V2.LastCommandMailbox = CommandMailboxesMemory;
1425   Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox;
1426   Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox;
1427   Controller->V2.PreviousCommandMailbox2 =
1428                                         Controller->V2.LastCommandMailbox - 1;
1429
1430   /* These are the base addresses for the status memory mailbox array */
1431   StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1432                 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1433
1434   Controller->V2.FirstStatusMailbox = StatusMailboxesMemory;
1435   Controller->V2.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1436   StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1;
1437   Controller->V2.LastStatusMailbox = StatusMailboxesMemory;
1438   Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox;
1439
1440   Controller->V2.HealthStatusBuffer = slice_dma_loaf(DmaPages,
1441                 sizeof(DAC960_V2_HealthStatusBuffer_T),
1442                 &Controller->V2.HealthStatusBufferDMA);
1443
1444   Controller->V2.NewControllerInformation = slice_dma_loaf(DmaPages,
1445                 sizeof(DAC960_V2_ControllerInfo_T), 
1446                 &Controller->V2.NewControllerInformationDMA);
1447
1448   Controller->V2.NewLogicalDeviceInformation =  slice_dma_loaf(DmaPages,
1449                 sizeof(DAC960_V2_LogicalDeviceInfo_T),
1450                 &Controller->V2.NewLogicalDeviceInformationDMA);
1451
1452   Controller->V2.NewPhysicalDeviceInformation = slice_dma_loaf(DmaPages,
1453                 sizeof(DAC960_V2_PhysicalDeviceInfo_T),
1454                 &Controller->V2.NewPhysicalDeviceInformationDMA);
1455
1456   Controller->V2.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1457                 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1458                 &Controller->V2.NewInquiryUnitSerialNumberDMA);
1459
1460   Controller->V2.Event = slice_dma_loaf(DmaPages,
1461                 sizeof(DAC960_V2_Event_T),
1462                 &Controller->V2.EventDMA);
1463
1464   Controller->V2.PhysicalToLogicalDevice = slice_dma_loaf(DmaPages,
1465                 sizeof(DAC960_V2_PhysicalToLogicalDevice_T),
1466                 &Controller->V2.PhysicalToLogicalDeviceDMA);
1467
1468   /*
1469     Enable the Memory Mailbox Interface.
1470     
1471     I don't know why we can't just use one of the memory mailboxes
1472     we just allocated to do this, instead of using this temporary one.
1473     Try this change later.
1474   */
1475   memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
1476   CommandMailbox->SetMemoryMailbox.CommandIdentifier = 1;
1477   CommandMailbox->SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL;
1478   CommandMailbox->SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true;
1479   CommandMailbox->SetMemoryMailbox.FirstCommandMailboxSizeKB =
1480     (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10;
1481   CommandMailbox->SetMemoryMailbox.FirstStatusMailboxSizeKB =
1482     (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10;
1483   CommandMailbox->SetMemoryMailbox.SecondCommandMailboxSizeKB = 0;
1484   CommandMailbox->SetMemoryMailbox.SecondStatusMailboxSizeKB = 0;
1485   CommandMailbox->SetMemoryMailbox.RequestSenseSize = 0;
1486   CommandMailbox->SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox;
1487   CommandMailbox->SetMemoryMailbox.HealthStatusBufferSizeKB = 1;
1488   CommandMailbox->SetMemoryMailbox.HealthStatusBufferBusAddress =
1489                                         Controller->V2.HealthStatusBufferDMA;
1490   CommandMailbox->SetMemoryMailbox.FirstCommandMailboxBusAddress =
1491                                         Controller->V2.FirstCommandMailboxDMA;
1492   CommandMailbox->SetMemoryMailbox.FirstStatusMailboxBusAddress =
1493                                         Controller->V2.FirstStatusMailboxDMA;
1494   switch (Controller->HardwareType)
1495     {
1496     case DAC960_GEM_Controller:
1497       while (DAC960_GEM_HardwareMailboxFullP(ControllerBaseAddress))
1498         udelay(1);
1499       DAC960_GEM_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1500       DAC960_GEM_HardwareMailboxNewCommand(ControllerBaseAddress);
1501       while (!DAC960_GEM_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1502         udelay(1);
1503       CommandStatus = DAC960_GEM_ReadCommandStatus(ControllerBaseAddress);
1504       DAC960_GEM_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1505       DAC960_GEM_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1506       break;
1507     case DAC960_BA_Controller:
1508       while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress))
1509         udelay(1);
1510       DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1511       DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress);
1512       while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1513         udelay(1);
1514       CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress);
1515       DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1516       DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1517       break;
1518     case DAC960_LP_Controller:
1519       while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress))
1520         udelay(1);
1521       DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1522       DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress);
1523       while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1524         udelay(1);
1525       CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress);
1526       DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1527       DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1528       break;
1529     default:
1530       DAC960_Failure(Controller, "Unknown Controller Type\n");
1531       CommandStatus = DAC960_V2_AbormalCompletion;
1532       break;
1533     }
1534   pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1535                                         CommandMailbox, CommandMailboxDMA);
1536   return (CommandStatus == DAC960_V2_NormalCompletion);
1537 }
1538
1539
1540 /*
1541   DAC960_V1_ReadControllerConfiguration reads the Configuration Information
1542   from DAC960 V1 Firmware Controllers and initializes the Controller structure.
1543 */
1544
1545 static bool DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T
1546                                                      *Controller)
1547 {
1548   DAC960_V1_Enquiry2_T *Enquiry2;
1549   dma_addr_t Enquiry2DMA;
1550   DAC960_V1_Config2_T *Config2;
1551   dma_addr_t Config2DMA;
1552   int LogicalDriveNumber, Channel, TargetID;
1553   struct dma_loaf local_dma;
1554
1555   if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1556                 sizeof(DAC960_V1_Enquiry2_T) + sizeof(DAC960_V1_Config2_T)))
1557         return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1558
1559   Enquiry2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Enquiry2_T), &Enquiry2DMA);
1560   Config2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Config2_T), &Config2DMA);
1561
1562   if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry,
1563                               Controller->V1.NewEnquiryDMA)) {
1564     free_dma_loaf(Controller->PCIDevice, &local_dma);
1565     return DAC960_Failure(Controller, "ENQUIRY");
1566   }
1567   memcpy(&Controller->V1.Enquiry, Controller->V1.NewEnquiry,
1568                                                 sizeof(DAC960_V1_Enquiry_T));
1569
1570   if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, Enquiry2DMA)) {
1571     free_dma_loaf(Controller->PCIDevice, &local_dma);
1572     return DAC960_Failure(Controller, "ENQUIRY2");
1573   }
1574
1575   if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, Config2DMA)) {
1576     free_dma_loaf(Controller->PCIDevice, &local_dma);
1577     return DAC960_Failure(Controller, "READ CONFIG2");
1578   }
1579
1580   if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation,
1581                               Controller->V1.NewLogicalDriveInformationDMA)) {
1582     free_dma_loaf(Controller->PCIDevice, &local_dma);
1583     return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION");
1584   }
1585   memcpy(&Controller->V1.LogicalDriveInformation,
1586                 Controller->V1.NewLogicalDriveInformation,
1587                 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
1588
1589   for (Channel = 0; Channel < Enquiry2->ActualChannels; Channel++)
1590     for (TargetID = 0; TargetID < Enquiry2->MaxTargets; TargetID++) {
1591       if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState,
1592                                    Channel, TargetID,
1593                                    Controller->V1.NewDeviceStateDMA)) {
1594                 free_dma_loaf(Controller->PCIDevice, &local_dma);
1595                 return DAC960_Failure(Controller, "GET DEVICE STATE");
1596         }
1597         memcpy(&Controller->V1.DeviceState[Channel][TargetID],
1598                 Controller->V1.NewDeviceState, sizeof(DAC960_V1_DeviceState_T));
1599      }
1600   /*
1601     Initialize the Controller Model Name and Full Model Name fields.
1602   */
1603   switch (Enquiry2->HardwareID.SubModel)
1604     {
1605     case DAC960_V1_P_PD_PU:
1606       if (Enquiry2->SCSICapability.BusSpeed == DAC960_V1_Ultra)
1607         strcpy(Controller->ModelName, "DAC960PU");
1608       else strcpy(Controller->ModelName, "DAC960PD");
1609       break;
1610     case DAC960_V1_PL:
1611       strcpy(Controller->ModelName, "DAC960PL");
1612       break;
1613     case DAC960_V1_PG:
1614       strcpy(Controller->ModelName, "DAC960PG");
1615       break;
1616     case DAC960_V1_PJ:
1617       strcpy(Controller->ModelName, "DAC960PJ");
1618       break;
1619     case DAC960_V1_PR:
1620       strcpy(Controller->ModelName, "DAC960PR");
1621       break;
1622     case DAC960_V1_PT:
1623       strcpy(Controller->ModelName, "DAC960PT");
1624       break;
1625     case DAC960_V1_PTL0:
1626       strcpy(Controller->ModelName, "DAC960PTL0");
1627       break;
1628     case DAC960_V1_PRL:
1629       strcpy(Controller->ModelName, "DAC960PRL");
1630       break;
1631     case DAC960_V1_PTL1:
1632       strcpy(Controller->ModelName, "DAC960PTL1");
1633       break;
1634     case DAC960_V1_1164P:
1635       strcpy(Controller->ModelName, "DAC1164P");
1636       break;
1637     default:
1638       free_dma_loaf(Controller->PCIDevice, &local_dma);
1639       return DAC960_Failure(Controller, "MODEL VERIFICATION");
1640     }
1641   strcpy(Controller->FullModelName, "Mylex ");
1642   strcat(Controller->FullModelName, Controller->ModelName);
1643   /*
1644     Initialize the Controller Firmware Version field and verify that it
1645     is a supported firmware version.  The supported firmware versions are:
1646
1647     DAC1164P                5.06 and above
1648     DAC960PTL/PRL/PJ/PG     4.06 and above
1649     DAC960PU/PD/PL          3.51 and above
1650     DAC960PU/PD/PL/P        2.73 and above
1651   */
1652 #if defined(CONFIG_ALPHA)
1653   /*
1654     DEC Alpha machines were often equipped with DAC960 cards that were
1655     OEMed from Mylex, and had their own custom firmware. Version 2.70,
1656     the last custom FW revision to be released by DEC for these older
1657     controllers, appears to work quite well with this driver.
1658
1659     Cards tested successfully were several versions each of the PD and
1660     PU, called by DEC the KZPSC and KZPAC, respectively, and having
1661     the Manufacturer Numbers (from Mylex), usually on a sticker on the
1662     back of the board, of:
1663
1664     KZPSC:  D040347 (1-channel) or D040348 (2-channel) or D040349 (3-channel)
1665     KZPAC:  D040395 (1-channel) or D040396 (2-channel) or D040397 (3-channel)
1666   */
1667 # define FIRMWARE_27X   "2.70"
1668 #else
1669 # define FIRMWARE_27X   "2.73"
1670 #endif
1671
1672   if (Enquiry2->FirmwareID.MajorVersion == 0)
1673     {
1674       Enquiry2->FirmwareID.MajorVersion =
1675         Controller->V1.Enquiry.MajorFirmwareVersion;
1676       Enquiry2->FirmwareID.MinorVersion =
1677         Controller->V1.Enquiry.MinorFirmwareVersion;
1678       Enquiry2->FirmwareID.FirmwareType = '0';
1679       Enquiry2->FirmwareID.TurnID = 0;
1680     }
1681   sprintf(Controller->FirmwareVersion, "%d.%02d-%c-%02d",
1682           Enquiry2->FirmwareID.MajorVersion, Enquiry2->FirmwareID.MinorVersion,
1683           Enquiry2->FirmwareID.FirmwareType, Enquiry2->FirmwareID.TurnID);
1684   if (!((Controller->FirmwareVersion[0] == '5' &&
1685          strcmp(Controller->FirmwareVersion, "5.06") >= 0) ||
1686         (Controller->FirmwareVersion[0] == '4' &&
1687          strcmp(Controller->FirmwareVersion, "4.06") >= 0) ||
1688         (Controller->FirmwareVersion[0] == '3' &&
1689          strcmp(Controller->FirmwareVersion, "3.51") >= 0) ||
1690         (Controller->FirmwareVersion[0] == '2' &&
1691          strcmp(Controller->FirmwareVersion, FIRMWARE_27X) >= 0)))
1692     {
1693       DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION");
1694       DAC960_Error("Firmware Version = '%s'\n", Controller,
1695                    Controller->FirmwareVersion);
1696       free_dma_loaf(Controller->PCIDevice, &local_dma);
1697       return false;
1698     }
1699   /*
1700     Initialize the Controller Channels, Targets, Memory Size, and SAF-TE
1701     Enclosure Management Enabled fields.
1702   */
1703   Controller->Channels = Enquiry2->ActualChannels;
1704   Controller->Targets = Enquiry2->MaxTargets;
1705   Controller->MemorySize = Enquiry2->MemorySize >> 20;
1706   Controller->V1.SAFTE_EnclosureManagementEnabled =
1707     (Enquiry2->FaultManagementType == DAC960_V1_SAFTE);
1708   /*
1709     Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1710     Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1711     Driver Scatter/Gather Limit.  The Driver Queue Depth must be at most one
1712     less than the Controller Queue Depth to allow for an automatic drive
1713     rebuild operation.
1714   */
1715   Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands;
1716   Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1717   if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1718     Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1719   Controller->LogicalDriveCount =
1720     Controller->V1.Enquiry.NumberOfLogicalDrives;
1721   Controller->MaxBlocksPerCommand = Enquiry2->MaxBlocksPerCommand;
1722   Controller->ControllerScatterGatherLimit = Enquiry2->MaxScatterGatherEntries;
1723   Controller->DriverScatterGatherLimit =
1724     Controller->ControllerScatterGatherLimit;
1725   if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit)
1726     Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit;
1727   /*
1728     Initialize the Stripe Size, Segment Size, and Geometry Translation.
1729   */
1730   Controller->V1.StripeSize = Config2->BlocksPerStripe * Config2->BlockFactor
1731                               >> (10 - DAC960_BlockSizeBits);
1732   Controller->V1.SegmentSize = Config2->BlocksPerCacheLine * Config2->BlockFactor
1733                                >> (10 - DAC960_BlockSizeBits);
1734   switch (Config2->DriveGeometry)
1735     {
1736     case DAC960_V1_Geometry_128_32:
1737       Controller->V1.GeometryTranslationHeads = 128;
1738       Controller->V1.GeometryTranslationSectors = 32;
1739       break;
1740     case DAC960_V1_Geometry_255_63:
1741       Controller->V1.GeometryTranslationHeads = 255;
1742       Controller->V1.GeometryTranslationSectors = 63;
1743       break;
1744     default:
1745       free_dma_loaf(Controller->PCIDevice, &local_dma);
1746       return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY");
1747     }
1748   /*
1749     Initialize the Background Initialization Status.
1750   */
1751   if ((Controller->FirmwareVersion[0] == '4' &&
1752       strcmp(Controller->FirmwareVersion, "4.08") >= 0) ||
1753       (Controller->FirmwareVersion[0] == '5' &&
1754        strcmp(Controller->FirmwareVersion, "5.08") >= 0))
1755     {
1756       Controller->V1.BackgroundInitializationStatusSupported = true;
1757       DAC960_V1_ExecuteType3B(Controller,
1758                               DAC960_V1_BackgroundInitializationControl, 0x20,
1759                               Controller->
1760                                V1.BackgroundInitializationStatusDMA);
1761       memcpy(&Controller->V1.LastBackgroundInitializationStatus,
1762                 Controller->V1.BackgroundInitializationStatus,
1763                 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
1764     }
1765   /*
1766     Initialize the Logical Drive Initially Accessible flag.
1767   */
1768   for (LogicalDriveNumber = 0;
1769        LogicalDriveNumber < Controller->LogicalDriveCount;
1770        LogicalDriveNumber++)
1771     if (Controller->V1.LogicalDriveInformation
1772                        [LogicalDriveNumber].LogicalDriveState !=
1773         DAC960_V1_LogicalDrive_Offline)
1774       Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true;
1775   Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress;
1776   free_dma_loaf(Controller->PCIDevice, &local_dma);
1777   return true;
1778 }
1779
1780
1781 /*
1782   DAC960_V2_ReadControllerConfiguration reads the Configuration Information
1783   from DAC960 V2 Firmware Controllers and initializes the Controller structure.
1784 */
1785
1786 static bool DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T
1787                                                      *Controller)
1788 {
1789   DAC960_V2_ControllerInfo_T *ControllerInfo =
1790                 &Controller->V2.ControllerInformation;
1791   unsigned short LogicalDeviceNumber = 0;
1792   int ModelNameLength;
1793
1794   /* Get data into dma-able area, then copy into permanent location */
1795   if (!DAC960_V2_NewControllerInfo(Controller))
1796     return DAC960_Failure(Controller, "GET CONTROLLER INFO");
1797   memcpy(ControllerInfo, Controller->V2.NewControllerInformation,
1798                         sizeof(DAC960_V2_ControllerInfo_T));
1799          
1800   
1801   if (!DAC960_V2_GeneralInfo(Controller))
1802     return DAC960_Failure(Controller, "GET HEALTH STATUS");
1803
1804   /*
1805     Initialize the Controller Model Name and Full Model Name fields.
1806   */
1807   ModelNameLength = sizeof(ControllerInfo->ControllerName);
1808   if (ModelNameLength > sizeof(Controller->ModelName)-1)
1809     ModelNameLength = sizeof(Controller->ModelName)-1;
1810   memcpy(Controller->ModelName, ControllerInfo->ControllerName,
1811          ModelNameLength);
1812   ModelNameLength--;
1813   while (Controller->ModelName[ModelNameLength] == ' ' ||
1814          Controller->ModelName[ModelNameLength] == '\0')
1815     ModelNameLength--;
1816   Controller->ModelName[++ModelNameLength] = '\0';
1817   strcpy(Controller->FullModelName, "Mylex ");
1818   strcat(Controller->FullModelName, Controller->ModelName);
1819   /*
1820     Initialize the Controller Firmware Version field.
1821   */
1822   sprintf(Controller->FirmwareVersion, "%d.%02d-%02d",
1823           ControllerInfo->FirmwareMajorVersion,
1824           ControllerInfo->FirmwareMinorVersion,
1825           ControllerInfo->FirmwareTurnNumber);
1826   if (ControllerInfo->FirmwareMajorVersion == 6 &&
1827       ControllerInfo->FirmwareMinorVersion == 0 &&
1828       ControllerInfo->FirmwareTurnNumber < 1)
1829     {
1830       DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n",
1831                   Controller, Controller->FirmwareVersion);
1832       DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n",
1833                   Controller);
1834       DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n",
1835                   Controller);
1836     }
1837   /*
1838     Initialize the Controller Channels, Targets, and Memory Size.
1839   */
1840   Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent;
1841   Controller->Targets =
1842     ControllerInfo->MaximumTargetsPerChannel
1843                     [ControllerInfo->NumberOfPhysicalChannelsPresent-1];
1844   Controller->MemorySize = ControllerInfo->MemorySizeMB;
1845   /*
1846     Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1847     Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1848     Driver Scatter/Gather Limit.  The Driver Queue Depth must be at most one
1849     less than the Controller Queue Depth to allow for an automatic drive
1850     rebuild operation.
1851   */
1852   Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands;
1853   Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1854   if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1855     Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1856   Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent;
1857   Controller->MaxBlocksPerCommand =
1858     ControllerInfo->MaximumDataTransferSizeInBlocks;
1859   Controller->ControllerScatterGatherLimit =
1860     ControllerInfo->MaximumScatterGatherEntries;
1861   Controller->DriverScatterGatherLimit =
1862     Controller->ControllerScatterGatherLimit;
1863   if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit)
1864     Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit;
1865   /*
1866     Initialize the Logical Device Information.
1867   */
1868   while (true)
1869     {
1870       DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
1871         Controller->V2.NewLogicalDeviceInformation;
1872       DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo;
1873       DAC960_V2_PhysicalDevice_T PhysicalDevice;
1874
1875       if (!DAC960_V2_NewLogicalDeviceInfo(Controller, LogicalDeviceNumber))
1876         break;
1877       LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber;
1878       if (LogicalDeviceNumber >= DAC960_MaxLogicalDrives) {
1879         DAC960_Error("DAC960: Logical Drive Number %d not supported\n",
1880                        Controller, LogicalDeviceNumber);
1881                 break;
1882       }
1883       if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize) {
1884         DAC960_Error("DAC960: Logical Drive Block Size %d not supported\n",
1885               Controller, NewLogicalDeviceInfo->DeviceBlockSizeInBytes);
1886         LogicalDeviceNumber++;
1887         continue;
1888       }
1889       PhysicalDevice.Controller = 0;
1890       PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
1891       PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
1892       PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
1893       Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
1894         PhysicalDevice;
1895       if (NewLogicalDeviceInfo->LogicalDeviceState !=
1896           DAC960_V2_LogicalDevice_Offline)
1897         Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true;
1898       LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
1899                                    GFP_ATOMIC);
1900       if (LogicalDeviceInfo == NULL)
1901         return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1902       Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
1903         LogicalDeviceInfo;
1904       memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
1905              sizeof(DAC960_V2_LogicalDeviceInfo_T));
1906       LogicalDeviceNumber++;
1907     }
1908   return true;
1909 }
1910
1911
1912 /*
1913   DAC960_ReportControllerConfiguration reports the Configuration Information
1914   for Controller.
1915 */
1916
1917 static bool DAC960_ReportControllerConfiguration(DAC960_Controller_T
1918                                                     *Controller)
1919 {
1920   DAC960_Info("Configuring Mylex %s PCI RAID Controller\n",
1921               Controller, Controller->ModelName);
1922   DAC960_Info("  Firmware Version: %s, Channels: %d, Memory Size: %dMB\n",
1923               Controller, Controller->FirmwareVersion,
1924               Controller->Channels, Controller->MemorySize);
1925   DAC960_Info("  PCI Bus: %d, Device: %d, Function: %d, I/O Address: ",
1926               Controller, Controller->Bus,
1927               Controller->Device, Controller->Function);
1928   if (Controller->IO_Address == 0)
1929     DAC960_Info("Unassigned\n", Controller);
1930   else DAC960_Info("0x%X\n", Controller, Controller->IO_Address);
1931   DAC960_Info("  PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n",
1932               Controller, Controller->PCI_Address,
1933               (unsigned long) Controller->BaseAddress,
1934               Controller->IRQ_Channel);
1935   DAC960_Info("  Controller Queue Depth: %d, "
1936               "Maximum Blocks per Command: %d\n",
1937               Controller, Controller->ControllerQueueDepth,
1938               Controller->MaxBlocksPerCommand);
1939   DAC960_Info("  Driver Queue Depth: %d, "
1940               "Scatter/Gather Limit: %d of %d Segments\n",
1941               Controller, Controller->DriverQueueDepth,
1942               Controller->DriverScatterGatherLimit,
1943               Controller->ControllerScatterGatherLimit);
1944   if (Controller->FirmwareType == DAC960_V1_Controller)
1945     {
1946       DAC960_Info("  Stripe Size: %dKB, Segment Size: %dKB, "
1947                   "BIOS Geometry: %d/%d\n", Controller,
1948                   Controller->V1.StripeSize,
1949                   Controller->V1.SegmentSize,
1950                   Controller->V1.GeometryTranslationHeads,
1951                   Controller->V1.GeometryTranslationSectors);
1952       if (Controller->V1.SAFTE_EnclosureManagementEnabled)
1953         DAC960_Info("  SAF-TE Enclosure Management Enabled\n", Controller);
1954     }
1955   return true;
1956 }
1957
1958
1959 /*
1960   DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information
1961   for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI
1962   Inquiry Unit Serial Number information for each device connected to
1963   Controller.
1964 */
1965
1966 static bool DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T
1967                                                  *Controller)
1968 {
1969   struct dma_loaf local_dma;
1970
1971   dma_addr_t DCDBs_dma[DAC960_V1_MaxChannels];
1972   DAC960_V1_DCDB_T *DCDBs_cpu[DAC960_V1_MaxChannels];
1973
1974   dma_addr_t SCSI_Inquiry_dma[DAC960_V1_MaxChannels];
1975   DAC960_SCSI_Inquiry_T *SCSI_Inquiry_cpu[DAC960_V1_MaxChannels];
1976
1977   dma_addr_t SCSI_NewInquiryUnitSerialNumberDMA[DAC960_V1_MaxChannels];
1978   DAC960_SCSI_Inquiry_UnitSerialNumber_T *SCSI_NewInquiryUnitSerialNumberCPU[DAC960_V1_MaxChannels];
1979
1980   struct completion Completions[DAC960_V1_MaxChannels];
1981   unsigned long flags;
1982   int Channel, TargetID;
1983
1984   if (!init_dma_loaf(Controller->PCIDevice, &local_dma, 
1985                 DAC960_V1_MaxChannels*(sizeof(DAC960_V1_DCDB_T) +
1986                         sizeof(DAC960_SCSI_Inquiry_T) +
1987                         sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T))))
1988      return DAC960_Failure(Controller,
1989                         "DMA ALLOCATION FAILED IN ReadDeviceConfiguration"); 
1990    
1991   for (Channel = 0; Channel < Controller->Channels; Channel++) {
1992         DCDBs_cpu[Channel] = slice_dma_loaf(&local_dma,
1993                         sizeof(DAC960_V1_DCDB_T), DCDBs_dma + Channel);
1994         SCSI_Inquiry_cpu[Channel] = slice_dma_loaf(&local_dma,
1995                         sizeof(DAC960_SCSI_Inquiry_T),
1996                         SCSI_Inquiry_dma + Channel);
1997         SCSI_NewInquiryUnitSerialNumberCPU[Channel] = slice_dma_loaf(&local_dma,
1998                         sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1999                         SCSI_NewInquiryUnitSerialNumberDMA + Channel);
2000   }
2001                 
2002   for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2003     {
2004       /*
2005        * For each channel, submit a probe for a device on that channel.
2006        * The timeout interval for a device that is present is 10 seconds.
2007        * With this approach, the timeout periods can elapse in parallel
2008        * on each channel.
2009        */
2010       for (Channel = 0; Channel < Controller->Channels; Channel++)
2011         {
2012           dma_addr_t NewInquiryStandardDataDMA = SCSI_Inquiry_dma[Channel];
2013           DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2014           dma_addr_t DCDB_dma = DCDBs_dma[Channel];
2015           DAC960_Command_T *Command = Controller->Commands[Channel];
2016           struct completion *Completion = &Completions[Channel];
2017
2018           init_completion(Completion);
2019           DAC960_V1_ClearCommand(Command);
2020           Command->CommandType = DAC960_ImmediateCommand;
2021           Command->Completion = Completion;
2022           Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
2023           Command->V1.CommandMailbox.Type3.BusAddress = DCDB_dma;
2024           DCDB->Channel = Channel;
2025           DCDB->TargetID = TargetID;
2026           DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
2027           DCDB->EarlyStatus = false;
2028           DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
2029           DCDB->NoAutomaticRequestSense = false;
2030           DCDB->DisconnectPermitted = true;
2031           DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
2032           DCDB->BusAddress = NewInquiryStandardDataDMA;
2033           DCDB->CDBLength = 6;
2034           DCDB->TransferLengthHigh4 = 0;
2035           DCDB->SenseLength = sizeof(DCDB->SenseData);
2036           DCDB->CDB[0] = 0x12; /* INQUIRY */
2037           DCDB->CDB[1] = 0; /* EVPD = 0 */
2038           DCDB->CDB[2] = 0; /* Page Code */
2039           DCDB->CDB[3] = 0; /* Reserved */
2040           DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
2041           DCDB->CDB[5] = 0; /* Control */
2042
2043           spin_lock_irqsave(&Controller->queue_lock, flags);
2044           DAC960_QueueCommand(Command);
2045           spin_unlock_irqrestore(&Controller->queue_lock, flags);
2046         }
2047       /*
2048        * Wait for the problems submitted in the previous loop
2049        * to complete.  On the probes that are successful, 
2050        * get the serial number of the device that was found.
2051        */
2052       for (Channel = 0; Channel < Controller->Channels; Channel++)
2053         {
2054           DAC960_SCSI_Inquiry_T *InquiryStandardData =
2055             &Controller->V1.InquiryStandardData[Channel][TargetID];
2056           DAC960_SCSI_Inquiry_T *NewInquiryStandardData = SCSI_Inquiry_cpu[Channel];
2057           dma_addr_t NewInquiryUnitSerialNumberDMA =
2058                         SCSI_NewInquiryUnitSerialNumberDMA[Channel];
2059           DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2060                         SCSI_NewInquiryUnitSerialNumberCPU[Channel];
2061           DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2062             &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2063           DAC960_Command_T *Command = Controller->Commands[Channel];
2064           DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2065           struct completion *Completion = &Completions[Channel];
2066
2067           wait_for_completion(Completion);
2068
2069           if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2070             memset(InquiryStandardData, 0, sizeof(DAC960_SCSI_Inquiry_T));
2071             InquiryStandardData->PeripheralDeviceType = 0x1F;
2072             continue;
2073           } else
2074             memcpy(InquiryStandardData, NewInquiryStandardData, sizeof(DAC960_SCSI_Inquiry_T));
2075         
2076           /* Preserve Channel and TargetID values from the previous loop */
2077           Command->Completion = Completion;
2078           DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2079           DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
2080           DCDB->SenseLength = sizeof(DCDB->SenseData);
2081           DCDB->CDB[0] = 0x12; /* INQUIRY */
2082           DCDB->CDB[1] = 1; /* EVPD = 1 */
2083           DCDB->CDB[2] = 0x80; /* Page Code */
2084           DCDB->CDB[3] = 0; /* Reserved */
2085           DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2086           DCDB->CDB[5] = 0; /* Control */
2087
2088           spin_lock_irqsave(&Controller->queue_lock, flags);
2089           DAC960_QueueCommand(Command);
2090           spin_unlock_irqrestore(&Controller->queue_lock, flags);
2091           wait_for_completion(Completion);
2092
2093           if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2094                 memset(InquiryUnitSerialNumber, 0,
2095                         sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2096                 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2097           } else
2098                 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2099                         sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2100         }
2101     }
2102     free_dma_loaf(Controller->PCIDevice, &local_dma);
2103   return true;
2104 }
2105
2106
2107 /*
2108   DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information
2109   for DAC960 V2 Firmware Controllers by requesting the Physical Device
2110   Information and SCSI Inquiry Unit Serial Number information for each
2111   device connected to Controller.
2112 */
2113
2114 static bool DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T
2115                                                  *Controller)
2116 {
2117   unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0;
2118   unsigned short PhysicalDeviceIndex = 0;
2119
2120   while (true)
2121     {
2122       DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
2123                 Controller->V2.NewPhysicalDeviceInformation;
2124       DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo;
2125       DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2126                 Controller->V2.NewInquiryUnitSerialNumber;
2127       DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber;
2128
2129       if (!DAC960_V2_NewPhysicalDeviceInfo(Controller, Channel, TargetID, LogicalUnit))
2130           break;
2131
2132       PhysicalDeviceInfo = kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T),
2133                                     GFP_ATOMIC);
2134       if (PhysicalDeviceInfo == NULL)
2135                 return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION");
2136       Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] =
2137                 PhysicalDeviceInfo;
2138       memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
2139                 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
2140
2141       InquiryUnitSerialNumber = kmalloc(
2142               sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC);
2143       if (InquiryUnitSerialNumber == NULL) {
2144         kfree(PhysicalDeviceInfo);
2145         return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION");
2146       }
2147       Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] =
2148                 InquiryUnitSerialNumber;
2149
2150       Channel = NewPhysicalDeviceInfo->Channel;
2151       TargetID = NewPhysicalDeviceInfo->TargetID;
2152       LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit;
2153
2154       /*
2155          Some devices do NOT have Unit Serial Numbers.
2156          This command fails for them.  But, we still want to
2157          remember those devices are there.  Construct a
2158          UnitSerialNumber structure for the failure case.
2159       */
2160       if (!DAC960_V2_NewInquiryUnitSerialNumber(Controller, Channel, TargetID, LogicalUnit)) {
2161         memset(InquiryUnitSerialNumber, 0,
2162              sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2163         InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2164       } else
2165         memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2166                 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2167
2168       PhysicalDeviceIndex++;
2169       LogicalUnit++;
2170     }
2171   return true;
2172 }
2173
2174
2175 /*
2176   DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and
2177   Product Serial Number fields of the Inquiry Standard Data and Inquiry
2178   Unit Serial Number structures.
2179 */
2180
2181 static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T
2182                                          *InquiryStandardData,
2183                                        DAC960_SCSI_Inquiry_UnitSerialNumber_T
2184                                          *InquiryUnitSerialNumber,
2185                                        unsigned char *Vendor,
2186                                        unsigned char *Model,
2187                                        unsigned char *Revision,
2188                                        unsigned char *SerialNumber)
2189 {
2190   int SerialNumberLength, i;
2191   if (InquiryStandardData->PeripheralDeviceType == 0x1F) return;
2192   for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++)
2193     {
2194       unsigned char VendorCharacter =
2195         InquiryStandardData->VendorIdentification[i];
2196       Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~'
2197                    ? VendorCharacter : ' ');
2198     }
2199   Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0';
2200   for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++)
2201     {
2202       unsigned char ModelCharacter =
2203         InquiryStandardData->ProductIdentification[i];
2204       Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~'
2205                   ? ModelCharacter : ' ');
2206     }
2207   Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0';
2208   for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++)
2209     {
2210       unsigned char RevisionCharacter =
2211         InquiryStandardData->ProductRevisionLevel[i];
2212       Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~'
2213                      ? RevisionCharacter : ' ');
2214     }
2215   Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0';
2216   if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return;
2217   SerialNumberLength = InquiryUnitSerialNumber->PageLength;
2218   if (SerialNumberLength >
2219       sizeof(InquiryUnitSerialNumber->ProductSerialNumber))
2220     SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber);
2221   for (i = 0; i < SerialNumberLength; i++)
2222     {
2223       unsigned char SerialNumberCharacter =
2224         InquiryUnitSerialNumber->ProductSerialNumber[i];
2225       SerialNumber[i] =
2226         (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~'
2227          ? SerialNumberCharacter : ' ');
2228     }
2229   SerialNumber[SerialNumberLength] = '\0';
2230 }
2231
2232
2233 /*
2234   DAC960_V1_ReportDeviceConfiguration reports the Device Configuration
2235   Information for DAC960 V1 Firmware Controllers.
2236 */
2237
2238 static bool DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T
2239                                                    *Controller)
2240 {
2241   int LogicalDriveNumber, Channel, TargetID;
2242   DAC960_Info("  Physical Devices:\n", Controller);
2243   for (Channel = 0; Channel < Controller->Channels; Channel++)
2244     for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2245       {
2246         DAC960_SCSI_Inquiry_T *InquiryStandardData =
2247           &Controller->V1.InquiryStandardData[Channel][TargetID];
2248         DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2249           &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2250         DAC960_V1_DeviceState_T *DeviceState =
2251           &Controller->V1.DeviceState[Channel][TargetID];
2252         DAC960_V1_ErrorTableEntry_T *ErrorEntry =
2253           &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID];
2254         char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2255         char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2256         char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2257         char SerialNumber[1+sizeof(InquiryUnitSerialNumber
2258                                    ->ProductSerialNumber)];
2259         if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue;
2260         DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2261                                    Vendor, Model, Revision, SerialNumber);
2262         DAC960_Info("    %d:%d%s Vendor: %s  Model: %s  Revision: %s\n",
2263                     Controller, Channel, TargetID, (TargetID < 10 ? " " : ""),
2264                     Vendor, Model, Revision);
2265         if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2266           DAC960_Info("         Serial Number: %s\n", Controller, SerialNumber);
2267         if (DeviceState->Present &&
2268             DeviceState->DeviceType == DAC960_V1_DiskType)
2269           {
2270             if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0)
2271               DAC960_Info("         Disk Status: %s, %u blocks, %d resets\n",
2272                           Controller,
2273                           (DeviceState->DeviceState == DAC960_V1_Device_Dead
2274                            ? "Dead"
2275                            : DeviceState->DeviceState
2276                              == DAC960_V1_Device_WriteOnly
2277                              ? "Write-Only"
2278                              : DeviceState->DeviceState
2279                                == DAC960_V1_Device_Online
2280                                ? "Online" : "Standby"),
2281                           DeviceState->DiskSize,
2282                           Controller->V1.DeviceResetCount[Channel][TargetID]);
2283             else
2284               DAC960_Info("         Disk Status: %s, %u blocks\n", Controller,
2285                           (DeviceState->DeviceState == DAC960_V1_Device_Dead
2286                            ? "Dead"
2287                            : DeviceState->DeviceState
2288                              == DAC960_V1_Device_WriteOnly
2289                              ? "Write-Only"
2290                              : DeviceState->DeviceState
2291                                == DAC960_V1_Device_Online
2292                                ? "Online" : "Standby"),
2293                           DeviceState->DiskSize);
2294           }
2295         if (ErrorEntry->ParityErrorCount > 0 ||
2296             ErrorEntry->SoftErrorCount > 0 ||
2297             ErrorEntry->HardErrorCount > 0 ||
2298             ErrorEntry->MiscErrorCount > 0)
2299           DAC960_Info("         Errors - Parity: %d, Soft: %d, "
2300                       "Hard: %d, Misc: %d\n", Controller,
2301                       ErrorEntry->ParityErrorCount,
2302                       ErrorEntry->SoftErrorCount,
2303                       ErrorEntry->HardErrorCount,
2304                       ErrorEntry->MiscErrorCount);
2305       }
2306   DAC960_Info("  Logical Drives:\n", Controller);
2307   for (LogicalDriveNumber = 0;
2308        LogicalDriveNumber < Controller->LogicalDriveCount;
2309        LogicalDriveNumber++)
2310     {
2311       DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation =
2312         &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
2313       DAC960_Info("    /dev/rd/c%dd%d: RAID-%d, %s, %u blocks, %s\n",
2314                   Controller, Controller->ControllerNumber, LogicalDriveNumber,
2315                   LogicalDriveInformation->RAIDLevel,
2316                   (LogicalDriveInformation->LogicalDriveState
2317                    == DAC960_V1_LogicalDrive_Online
2318                    ? "Online"
2319                    : LogicalDriveInformation->LogicalDriveState
2320                      == DAC960_V1_LogicalDrive_Critical
2321                      ? "Critical" : "Offline"),
2322                   LogicalDriveInformation->LogicalDriveSize,
2323                   (LogicalDriveInformation->WriteBack
2324                    ? "Write Back" : "Write Thru"));
2325     }
2326   return true;
2327 }
2328
2329
2330 /*
2331   DAC960_V2_ReportDeviceConfiguration reports the Device Configuration
2332   Information for DAC960 V2 Firmware Controllers.
2333 */
2334
2335 static bool DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T
2336                                                    *Controller)
2337 {
2338   int PhysicalDeviceIndex, LogicalDriveNumber;
2339   DAC960_Info("  Physical Devices:\n", Controller);
2340   for (PhysicalDeviceIndex = 0;
2341        PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices;
2342        PhysicalDeviceIndex++)
2343     {
2344       DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
2345         Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
2346       DAC960_SCSI_Inquiry_T *InquiryStandardData =
2347         (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData;
2348       DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2349         Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
2350       char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2351       char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2352       char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2353       char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)];
2354       if (PhysicalDeviceInfo == NULL) break;
2355       DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2356                                  Vendor, Model, Revision, SerialNumber);
2357       DAC960_Info("    %d:%d%s Vendor: %s  Model: %s  Revision: %s\n",
2358                   Controller,
2359                   PhysicalDeviceInfo->Channel,
2360                   PhysicalDeviceInfo->TargetID,
2361                   (PhysicalDeviceInfo->TargetID < 10 ? " " : ""),
2362                   Vendor, Model, Revision);
2363       if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0)
2364         DAC960_Info("         %sAsynchronous\n", Controller,
2365                     (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2366                      ? "Wide " :""));
2367       else
2368         DAC960_Info("         %sSynchronous at %d MB/sec\n", Controller,
2369                     (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2370                      ? "Wide " :""),
2371                     (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers
2372                      * PhysicalDeviceInfo->NegotiatedDataWidthBits/8));
2373       if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2374         DAC960_Info("         Serial Number: %s\n", Controller, SerialNumber);
2375       if (PhysicalDeviceInfo->PhysicalDeviceState ==
2376           DAC960_V2_Device_Unconfigured)
2377         continue;
2378       DAC960_Info("         Disk Status: %s, %u blocks\n", Controller,
2379                   (PhysicalDeviceInfo->PhysicalDeviceState
2380                    == DAC960_V2_Device_Online
2381                    ? "Online"
2382                    : PhysicalDeviceInfo->PhysicalDeviceState
2383                      == DAC960_V2_Device_Rebuild
2384                      ? "Rebuild"
2385                      : PhysicalDeviceInfo->PhysicalDeviceState
2386                        == DAC960_V2_Device_Missing
2387                        ? "Missing"
2388                        : PhysicalDeviceInfo->PhysicalDeviceState
2389                          == DAC960_V2_Device_Critical
2390                          ? "Critical"
2391                          : PhysicalDeviceInfo->PhysicalDeviceState
2392                            == DAC960_V2_Device_Dead
2393                            ? "Dead"
2394                            : PhysicalDeviceInfo->PhysicalDeviceState
2395                              == DAC960_V2_Device_SuspectedDead
2396                              ? "Suspected-Dead"
2397                              : PhysicalDeviceInfo->PhysicalDeviceState
2398                                == DAC960_V2_Device_CommandedOffline
2399                                ? "Commanded-Offline"
2400                                : PhysicalDeviceInfo->PhysicalDeviceState
2401                                  == DAC960_V2_Device_Standby
2402                                  ? "Standby" : "Unknown"),
2403                   PhysicalDeviceInfo->ConfigurableDeviceSize);
2404       if (PhysicalDeviceInfo->ParityErrors == 0 &&
2405           PhysicalDeviceInfo->SoftErrors == 0 &&
2406           PhysicalDeviceInfo->HardErrors == 0 &&
2407           PhysicalDeviceInfo->MiscellaneousErrors == 0 &&
2408           PhysicalDeviceInfo->CommandTimeouts == 0 &&
2409           PhysicalDeviceInfo->Retries == 0 &&
2410           PhysicalDeviceInfo->Aborts == 0 &&
2411           PhysicalDeviceInfo->PredictedFailuresDetected == 0)
2412         continue;
2413       DAC960_Info("         Errors - Parity: %d, Soft: %d, "
2414                   "Hard: %d, Misc: %d\n", Controller,
2415                   PhysicalDeviceInfo->ParityErrors,
2416                   PhysicalDeviceInfo->SoftErrors,
2417                   PhysicalDeviceInfo->HardErrors,
2418                   PhysicalDeviceInfo->MiscellaneousErrors);
2419       DAC960_Info("                  Timeouts: %d, Retries: %d, "
2420                   "Aborts: %d, Predicted: %d\n", Controller,
2421                   PhysicalDeviceInfo->CommandTimeouts,
2422                   PhysicalDeviceInfo->Retries,
2423                   PhysicalDeviceInfo->Aborts,
2424                   PhysicalDeviceInfo->PredictedFailuresDetected);
2425     }
2426   DAC960_Info("  Logical Drives:\n", Controller);
2427   for (LogicalDriveNumber = 0;
2428        LogicalDriveNumber < DAC960_MaxLogicalDrives;
2429        LogicalDriveNumber++)
2430     {
2431       DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
2432         Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
2433       unsigned char *ReadCacheStatus[] = { "Read Cache Disabled",
2434                                            "Read Cache Enabled",
2435                                            "Read Ahead Enabled",
2436                                            "Intelligent Read Ahead Enabled",
2437                                            "-", "-", "-", "-" };
2438       unsigned char *WriteCacheStatus[] = { "Write Cache Disabled",
2439                                             "Logical Device Read Only",
2440                                             "Write Cache Enabled",
2441                                             "Intelligent Write Cache Enabled",
2442                                             "-", "-", "-", "-" };
2443       unsigned char *GeometryTranslation;
2444       if (LogicalDeviceInfo == NULL) continue;
2445       switch (LogicalDeviceInfo->DriveGeometry)
2446         {
2447         case DAC960_V2_Geometry_128_32:
2448           GeometryTranslation = "128/32";
2449           break;
2450         case DAC960_V2_Geometry_255_63:
2451           GeometryTranslation = "255/63";
2452           break;
2453         default:
2454           GeometryTranslation = "Invalid";
2455           DAC960_Error("Illegal Logical Device Geometry %d\n",
2456                        Controller, LogicalDeviceInfo->DriveGeometry);
2457           break;
2458         }
2459       DAC960_Info("    /dev/rd/c%dd%d: RAID-%d, %s, %u blocks\n",
2460                   Controller, Controller->ControllerNumber, LogicalDriveNumber,
2461                   LogicalDeviceInfo->RAIDLevel,
2462                   (LogicalDeviceInfo->LogicalDeviceState
2463                    == DAC960_V2_LogicalDevice_Online
2464                    ? "Online"
2465                    : LogicalDeviceInfo->LogicalDeviceState
2466                      == DAC960_V2_LogicalDevice_Critical
2467                      ? "Critical" : "Offline"),
2468                   LogicalDeviceInfo->ConfigurableDeviceSize);
2469       DAC960_Info("                  Logical Device %s, BIOS Geometry: %s\n",
2470                   Controller,
2471                   (LogicalDeviceInfo->LogicalDeviceControl
2472                                      .LogicalDeviceInitialized
2473                    ? "Initialized" : "Uninitialized"),
2474                   GeometryTranslation);
2475       if (LogicalDeviceInfo->StripeSize == 0)
2476         {
2477           if (LogicalDeviceInfo->CacheLineSize == 0)
2478             DAC960_Info("                  Stripe Size: N/A, "
2479                         "Segment Size: N/A\n", Controller);
2480           else
2481             DAC960_Info("                  Stripe Size: N/A, "
2482                         "Segment Size: %dKB\n", Controller,
2483                         1 << (LogicalDeviceInfo->CacheLineSize - 2));
2484         }
2485       else
2486         {
2487           if (LogicalDeviceInfo->CacheLineSize == 0)
2488             DAC960_Info("                  Stripe Size: %dKB, "
2489                         "Segment Size: N/A\n", Controller,
2490                         1 << (LogicalDeviceInfo->StripeSize - 2));
2491           else
2492             DAC960_Info("                  Stripe Size: %dKB, "
2493                         "Segment Size: %dKB\n", Controller,
2494                         1 << (LogicalDeviceInfo->StripeSize - 2),
2495                         1 << (LogicalDeviceInfo->CacheLineSize - 2));
2496         }
2497       DAC960_Info("                  %s, %s\n", Controller,
2498                   ReadCacheStatus[
2499                     LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
2500                   WriteCacheStatus[
2501                     LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
2502       if (LogicalDeviceInfo->SoftErrors > 0 ||
2503           LogicalDeviceInfo->CommandsFailed > 0 ||
2504           LogicalDeviceInfo->DeferredWriteErrors)
2505         DAC960_Info("                  Errors - Soft: %d, Failed: %d, "
2506                     "Deferred Write: %d\n", Controller,
2507                     LogicalDeviceInfo->SoftErrors,
2508                     LogicalDeviceInfo->CommandsFailed,
2509                     LogicalDeviceInfo->DeferredWriteErrors);
2510
2511     }
2512   return true;
2513 }
2514
2515 /*
2516   DAC960_RegisterBlockDevice registers the Block Device structures
2517   associated with Controller.
2518 */
2519
2520 static bool DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
2521 {
2522   int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2523   int n;
2524
2525   /*
2526     Register the Block Device Major Number for this DAC960 Controller.
2527   */
2528   if (register_blkdev(MajorNumber, "dac960") < 0)
2529       return false;
2530
2531   for (n = 0; n < DAC960_MaxLogicalDrives; n++) {
2532         struct gendisk *disk = Controller->disks[n];
2533         struct request_queue *RequestQueue;
2534
2535         /* for now, let all request queues share controller's lock */
2536         RequestQueue = blk_init_queue(DAC960_RequestFunction,&Controller->queue_lock);
2537         if (!RequestQueue) {
2538                 printk("DAC960: failure to allocate request queue\n");
2539                 continue;
2540         }
2541         Controller->RequestQueue[n] = RequestQueue;
2542         blk_queue_bounce_limit(RequestQueue, Controller->BounceBufferLimit);
2543         RequestQueue->queuedata = Controller;
2544         blk_queue_max_segments(RequestQueue, Controller->DriverScatterGatherLimit);
2545         blk_queue_max_hw_sectors(RequestQueue, Controller->MaxBlocksPerCommand);
2546         disk->queue = RequestQueue;
2547         sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n);
2548         disk->major = MajorNumber;
2549         disk->first_minor = n << DAC960_MaxPartitionsBits;
2550         disk->fops = &DAC960_BlockDeviceOperations;
2551    }
2552   /*
2553     Indicate the Block Device Registration completed successfully,
2554   */
2555   return true;
2556 }
2557
2558
2559 /*
2560   DAC960_UnregisterBlockDevice unregisters the Block Device structures
2561   associated with Controller.
2562 */
2563
2564 static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
2565 {
2566   int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2567   int disk;
2568
2569   /* does order matter when deleting gendisk and cleanup in request queue? */
2570   for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
2571         del_gendisk(Controller->disks[disk]);
2572         blk_cleanup_queue(Controller->RequestQueue[disk]);
2573         Controller->RequestQueue[disk] = NULL;
2574   }
2575
2576   /*
2577     Unregister the Block Device Major Number for this DAC960 Controller.
2578   */
2579   unregister_blkdev(MajorNumber, "dac960");
2580 }
2581
2582 /*
2583   DAC960_ComputeGenericDiskInfo computes the values for the Generic Disk
2584   Information Partition Sector Counts and Block Sizes.
2585 */
2586
2587 static void DAC960_ComputeGenericDiskInfo(DAC960_Controller_T *Controller)
2588 {
2589         int disk;
2590         for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++)
2591                 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
2592 }
2593
2594 /*
2595   DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
2596   the Error Status Register when the driver performs the BIOS handshaking.
2597   It returns true for fatal errors and false otherwise.
2598 */
2599
2600 static bool DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
2601                                         unsigned char ErrorStatus,
2602                                         unsigned char Parameter0,
2603                                         unsigned char Parameter1)
2604 {
2605   switch (ErrorStatus)
2606     {
2607     case 0x00:
2608       DAC960_Notice("Physical Device %d:%d Not Responding\n",
2609                     Controller, Parameter1, Parameter0);
2610       break;
2611     case 0x08:
2612       if (Controller->DriveSpinUpMessageDisplayed) break;
2613       DAC960_Notice("Spinning Up Drives\n", Controller);
2614       Controller->DriveSpinUpMessageDisplayed = true;
2615       break;
2616     case 0x30:
2617       DAC960_Notice("Configuration Checksum Error\n", Controller);
2618       break;
2619     case 0x60:
2620       DAC960_Notice("Mirror Race Recovery Failed\n", Controller);
2621       break;
2622     case 0x70:
2623       DAC960_Notice("Mirror Race Recovery In Progress\n", Controller);
2624       break;
2625     case 0x90:
2626       DAC960_Notice("Physical Device %d:%d COD Mismatch\n",
2627                     Controller, Parameter1, Parameter0);
2628       break;
2629     case 0xA0:
2630       DAC960_Notice("Logical Drive Installation Aborted\n", Controller);
2631       break;
2632     case 0xB0:
2633       DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller);
2634       break;
2635     case 0xD0:
2636       DAC960_Notice("New Controller Configuration Found\n", Controller);
2637       break;
2638     case 0xF0:
2639       DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller);
2640       return true;
2641     default:
2642       DAC960_Error("Unknown Initialization Error %02X for Controller at\n",
2643                    Controller, ErrorStatus);
2644       return true;
2645     }
2646   return false;
2647 }
2648
2649
2650 /*
2651  * DAC960_DetectCleanup releases the resources that were allocated
2652  * during DAC960_DetectController().  DAC960_DetectController can
2653  * has several internal failure points, so not ALL resources may 
2654  * have been allocated.  It's important to free only
2655  * resources that HAVE been allocated.  The code below always
2656  * tests that the resource has been allocated before attempting to
2657  * free it.
2658  */
2659 static void DAC960_DetectCleanup(DAC960_Controller_T *Controller)
2660 {
2661   int i;
2662
2663   /* Free the memory mailbox, status, and related structures */
2664   free_dma_loaf(Controller->PCIDevice, &Controller->DmaPages);
2665   if (Controller->MemoryMappedAddress) {
2666         switch(Controller->HardwareType)
2667         {
2668                 case DAC960_GEM_Controller:
2669                         DAC960_GEM_DisableInterrupts(Controller->BaseAddress);
2670                         break;
2671                 case DAC960_BA_Controller:
2672                         DAC960_BA_DisableInterrupts(Controller->BaseAddress);
2673                         break;
2674                 case DAC960_LP_Controller:
2675                         DAC960_LP_DisableInterrupts(Controller->BaseAddress);
2676                         break;
2677                 case DAC960_LA_Controller:
2678                         DAC960_LA_DisableInterrupts(Controller->BaseAddress);
2679                         break;
2680                 case DAC960_PG_Controller:
2681                         DAC960_PG_DisableInterrupts(Controller->BaseAddress);
2682                         break;
2683                 case DAC960_PD_Controller:
2684                         DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2685                         break;
2686                 case DAC960_P_Controller:
2687                         DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2688                         break;
2689         }
2690         iounmap(Controller->MemoryMappedAddress);
2691   }
2692   if (Controller->IRQ_Channel)
2693         free_irq(Controller->IRQ_Channel, Controller);
2694   if (Controller->IO_Address)
2695         release_region(Controller->IO_Address, 0x80);
2696   pci_disable_device(Controller->PCIDevice);
2697   for (i = 0; (i < DAC960_MaxLogicalDrives) && Controller->disks[i]; i++)
2698        put_disk(Controller->disks[i]);
2699   DAC960_Controllers[Controller->ControllerNumber] = NULL;
2700   kfree(Controller);
2701 }
2702
2703
2704 /*
2705   DAC960_DetectController detects Mylex DAC960/AcceleRAID/eXtremeRAID
2706   PCI RAID Controllers by interrogating the PCI Configuration Space for
2707   Controller Type.
2708 */
2709
2710 static DAC960_Controller_T * 
2711 DAC960_DetectController(struct pci_dev *PCI_Device,
2712                         const struct pci_device_id *entry)
2713 {
2714   struct DAC960_privdata *privdata =
2715                 (struct DAC960_privdata *)entry->driver_data;
2716   irq_handler_t InterruptHandler = privdata->InterruptHandler;
2717   unsigned int MemoryWindowSize = privdata->MemoryWindowSize;
2718   DAC960_Controller_T *Controller = NULL;
2719   unsigned char DeviceFunction = PCI_Device->devfn;
2720   unsigned char ErrorStatus, Parameter0, Parameter1;
2721   unsigned int IRQ_Channel;
2722   void __iomem *BaseAddress;
2723   int i;
2724
2725   Controller = kzalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
2726   if (Controller == NULL) {
2727         DAC960_Error("Unable to allocate Controller structure for "
2728                        "Controller at\n", NULL);
2729         return NULL;
2730   }
2731   Controller->ControllerNumber = DAC960_ControllerCount;
2732   DAC960_Controllers[DAC960_ControllerCount++] = Controller;
2733   Controller->Bus = PCI_Device->bus->number;
2734   Controller->FirmwareType = privdata->FirmwareType;
2735   Controller->HardwareType = privdata->HardwareType;
2736   Controller->Device = DeviceFunction >> 3;
2737   Controller->Function = DeviceFunction & 0x7;
2738   Controller->PCIDevice = PCI_Device;
2739   strcpy(Controller->FullModelName, "DAC960");
2740
2741   if (pci_enable_device(PCI_Device))
2742         goto Failure;
2743
2744   switch (Controller->HardwareType)
2745   {
2746         case DAC960_GEM_Controller:
2747           Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2748           break;
2749         case DAC960_BA_Controller:
2750           Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2751           break;
2752         case DAC960_LP_Controller:
2753           Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2754           break;
2755         case DAC960_LA_Controller:
2756           Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2757           break;
2758         case DAC960_PG_Controller:
2759           Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2760           break;
2761         case DAC960_PD_Controller:
2762           Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2763           Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2764           break;
2765         case DAC960_P_Controller:
2766           Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2767           Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2768           break;
2769   }
2770
2771   pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber));
2772   for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
2773         Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits);
2774         if (!Controller->disks[i])
2775                 goto Failure;
2776         Controller->disks[i]->private_data = (void *)((long)i);
2777   }
2778   init_waitqueue_head(&Controller->CommandWaitQueue);
2779   init_waitqueue_head(&Controller->HealthStatusWaitQueue);
2780   spin_lock_init(&Controller->queue_lock);
2781   DAC960_AnnounceDriver(Controller);
2782   /*
2783     Map the Controller Register Window.
2784   */
2785  if (MemoryWindowSize < PAGE_SIZE)
2786         MemoryWindowSize = PAGE_SIZE;
2787   Controller->MemoryMappedAddress =
2788         ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize);
2789   Controller->BaseAddress =
2790         Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK);
2791   if (Controller->MemoryMappedAddress == NULL)
2792   {
2793           DAC960_Error("Unable to map Controller Register Window for "
2794                        "Controller at\n", Controller);
2795           goto Failure;
2796   }
2797   BaseAddress = Controller->BaseAddress;
2798   switch (Controller->HardwareType)
2799   {
2800         case DAC960_GEM_Controller:
2801           DAC960_GEM_DisableInterrupts(BaseAddress);
2802           DAC960_GEM_AcknowledgeHardwareMailboxStatus(BaseAddress);
2803           udelay(1000);
2804           while (DAC960_GEM_InitializationInProgressP(BaseAddress))
2805             {
2806               if (DAC960_GEM_ReadErrorStatus(BaseAddress, &ErrorStatus,
2807                                             &Parameter0, &Parameter1) &&
2808                   DAC960_ReportErrorStatus(Controller, ErrorStatus,
2809                                            Parameter0, Parameter1))
2810                 goto Failure;
2811               udelay(10);
2812             }
2813           if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2814             {
2815               DAC960_Error("Unable to Enable Memory Mailbox Interface "
2816                            "for Controller at\n", Controller);
2817               goto Failure;
2818             }
2819           DAC960_GEM_EnableInterrupts(BaseAddress);
2820           Controller->QueueCommand = DAC960_GEM_QueueCommand;
2821           Controller->ReadControllerConfiguration =
2822             DAC960_V2_ReadControllerConfiguration;
2823           Controller->ReadDeviceConfiguration =
2824             DAC960_V2_ReadDeviceConfiguration;
2825           Controller->ReportDeviceConfiguration =
2826             DAC960_V2_ReportDeviceConfiguration;
2827           Controller->QueueReadWriteCommand =
2828             DAC960_V2_QueueReadWriteCommand;
2829           break;
2830         case DAC960_BA_Controller:
2831           DAC960_BA_DisableInterrupts(BaseAddress);
2832           DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2833           udelay(1000);
2834           while (DAC960_BA_InitializationInProgressP(BaseAddress))
2835             {
2836               if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2837                                             &Parameter0, &Parameter1) &&
2838                   DAC960_ReportErrorStatus(Controller, ErrorStatus,
2839                                            Parameter0, Parameter1))
2840                 goto Failure;
2841               udelay(10);
2842             }
2843           if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2844             {
2845               DAC960_Error("Unable to Enable Memory Mailbox Interface "
2846                            "for Controller at\n", Controller);
2847               goto Failure;
2848             }
2849           DAC960_BA_EnableInterrupts(BaseAddress);
2850           Controller->QueueCommand = DAC960_BA_QueueCommand;
2851           Controller->ReadControllerConfiguration =
2852             DAC960_V2_ReadControllerConfiguration;
2853           Controller->ReadDeviceConfiguration =
2854             DAC960_V2_ReadDeviceConfiguration;
2855           Controller->ReportDeviceConfiguration =
2856             DAC960_V2_ReportDeviceConfiguration;
2857           Controller->QueueReadWriteCommand =
2858             DAC960_V2_QueueReadWriteCommand;
2859           break;
2860         case DAC960_LP_Controller:
2861           DAC960_LP_DisableInterrupts(BaseAddress);
2862           DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
2863           udelay(1000);
2864           while (DAC960_LP_InitializationInProgressP(BaseAddress))
2865             {
2866               if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
2867                                             &Parameter0, &Parameter1) &&
2868                   DAC960_ReportErrorStatus(Controller, ErrorStatus,
2869                                            Parameter0, Parameter1))
2870                 goto Failure;
2871               udelay(10);
2872             }
2873           if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2874             {
2875               DAC960_Error("Unable to Enable Memory Mailbox Interface "
2876                            "for Controller at\n", Controller);
2877               goto Failure;
2878             }
2879           DAC960_LP_EnableInterrupts(BaseAddress);
2880           Controller->QueueCommand = DAC960_LP_QueueCommand;
2881           Controller->ReadControllerConfiguration =
2882             DAC960_V2_ReadControllerConfiguration;
2883           Controller->ReadDeviceConfiguration =
2884             DAC960_V2_ReadDeviceConfiguration;
2885           Controller->ReportDeviceConfiguration =
2886             DAC960_V2_ReportDeviceConfiguration;
2887           Controller->QueueReadWriteCommand =
2888             DAC960_V2_QueueReadWriteCommand;
2889           break;
2890         case DAC960_LA_Controller:
2891           DAC960_LA_DisableInterrupts(BaseAddress);
2892           DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2893           udelay(1000);
2894           while (DAC960_LA_InitializationInProgressP(BaseAddress))
2895             {
2896               if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2897                                             &Parameter0, &Parameter1) &&
2898                   DAC960_ReportErrorStatus(Controller, ErrorStatus,
2899                                            Parameter0, Parameter1))
2900                 goto Failure;
2901               udelay(10);
2902             }
2903           if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2904             {
2905               DAC960_Error("Unable to Enable Memory Mailbox Interface "
2906                            "for Controller at\n", Controller);
2907               goto Failure;
2908             }
2909           DAC960_LA_EnableInterrupts(BaseAddress);
2910           if (Controller->V1.DualModeMemoryMailboxInterface)
2911             Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
2912           else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
2913           Controller->ReadControllerConfiguration =
2914             DAC960_V1_ReadControllerConfiguration;
2915           Controller->ReadDeviceConfiguration =
2916             DAC960_V1_ReadDeviceConfiguration;
2917           Controller->ReportDeviceConfiguration =
2918             DAC960_V1_ReportDeviceConfiguration;
2919           Controller->QueueReadWriteCommand =
2920             DAC960_V1_QueueReadWriteCommand;
2921           break;
2922         case DAC960_PG_Controller:
2923           DAC960_PG_DisableInterrupts(BaseAddress);
2924           DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
2925           udelay(1000);
2926           while (DAC960_PG_InitializationInProgressP(BaseAddress))
2927             {
2928               if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
2929                                             &Parameter0, &Parameter1) &&
2930                   DAC960_ReportErrorStatus(Controller, ErrorStatus,
2931                                            Parameter0, Parameter1))
2932                 goto Failure;
2933               udelay(10);
2934             }
2935           if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2936             {
2937               DAC960_Error("Unable to Enable Memory Mailbox Interface "
2938                            "for Controller at\n", Controller);
2939               goto Failure;
2940             }
2941           DAC960_PG_EnableInterrupts(BaseAddress);
2942           if (Controller->V1.DualModeMemoryMailboxInterface)
2943             Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
2944           else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
2945           Controller->ReadControllerConfiguration =
2946             DAC960_V1_ReadControllerConfiguration;
2947           Controller->ReadDeviceConfiguration =
2948             DAC960_V1_ReadDeviceConfiguration;
2949           Controller->ReportDeviceConfiguration =
2950             DAC960_V1_ReportDeviceConfiguration;
2951           Controller->QueueReadWriteCommand =
2952             DAC960_V1_QueueReadWriteCommand;
2953           break;
2954         case DAC960_PD_Controller:
2955           if (!request_region(Controller->IO_Address, 0x80,
2956                               Controller->FullModelName)) {
2957                 DAC960_Error("IO port 0x%d busy for Controller at\n",
2958                              Controller, Controller->IO_Address);
2959                 goto Failure;
2960           }
2961           DAC960_PD_DisableInterrupts(BaseAddress);
2962           DAC960_PD_AcknowledgeStatus(BaseAddress);
2963           udelay(1000);
2964           while (DAC960_PD_InitializationInProgressP(BaseAddress))
2965             {
2966               if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2967                                             &Parameter0, &Parameter1) &&
2968                   DAC960_ReportErrorStatus(Controller, ErrorStatus,
2969                                            Parameter0, Parameter1))
2970                 goto Failure;
2971               udelay(10);
2972             }
2973           if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2974             {
2975               DAC960_Error("Unable to allocate DMA mapped memory "
2976                            "for Controller at\n", Controller);
2977               goto Failure;
2978             }
2979           DAC960_PD_EnableInterrupts(BaseAddress);
2980           Controller->QueueCommand = DAC960_PD_QueueCommand;
2981           Controller->ReadControllerConfiguration =
2982             DAC960_V1_ReadControllerConfiguration;
2983           Controller->ReadDeviceConfiguration =
2984             DAC960_V1_ReadDeviceConfiguration;
2985           Controller->ReportDeviceConfiguration =
2986             DAC960_V1_ReportDeviceConfiguration;
2987           Controller->QueueReadWriteCommand =
2988             DAC960_V1_QueueReadWriteCommand;
2989           break;
2990         case DAC960_P_Controller:
2991           if (!request_region(Controller->IO_Address, 0x80,
2992                               Controller->FullModelName)){
2993                 DAC960_Error("IO port 0x%d busy for Controller at\n",
2994                              Controller, Controller->IO_Address);
2995                 goto Failure;
2996           }
2997           DAC960_PD_DisableInterrupts(BaseAddress);
2998           DAC960_PD_AcknowledgeStatus(BaseAddress);
2999           udelay(1000);
3000           while (DAC960_PD_InitializationInProgressP(BaseAddress))
3001             {
3002               if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
3003                                             &Parameter0, &Parameter1) &&
3004                   DAC960_ReportErrorStatus(Controller, ErrorStatus,
3005                                            Parameter0, Parameter1))
3006                 goto Failure;
3007               udelay(10);
3008             }
3009           if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
3010             {
3011               DAC960_Error("Unable to allocate DMA mapped memory"
3012                            "for Controller at\n", Controller);
3013               goto Failure;
3014             }
3015           DAC960_PD_EnableInterrupts(BaseAddress);
3016           Controller->QueueCommand = DAC960_P_QueueCommand;
3017           Controller->ReadControllerConfiguration =
3018             DAC960_V1_ReadControllerConfiguration;
3019           Controller->ReadDeviceConfiguration =
3020             DAC960_V1_ReadDeviceConfiguration;
3021           Controller->ReportDeviceConfiguration =
3022             DAC960_V1_ReportDeviceConfiguration;
3023           Controller->QueueReadWriteCommand =
3024             DAC960_V1_QueueReadWriteCommand;
3025           break;
3026   }
3027   /*
3028      Acquire shared access to the IRQ Channel.
3029   */
3030   IRQ_Channel = PCI_Device->irq;
3031   if (request_irq(IRQ_Channel, InterruptHandler, IRQF_SHARED,
3032                       Controller->FullModelName, Controller) < 0)
3033   {
3034         DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",
3035                        Controller, Controller->IRQ_Channel);
3036         goto Failure;
3037   }
3038   Controller->IRQ_Channel = IRQ_Channel;
3039   Controller->InitialCommand.CommandIdentifier = 1;
3040   Controller->InitialCommand.Controller = Controller;
3041   Controller->Commands[0] = &Controller->InitialCommand;
3042   Controller->FreeCommands = &Controller->InitialCommand;
3043   return Controller;
3044       
3045 Failure:
3046   if (Controller->IO_Address == 0)
3047         DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
3048                      "PCI Address 0x%X\n", Controller,
3049                      Controller->Bus, Controller->Device,
3050                      Controller->Function, Controller->PCI_Address);
3051   else
3052         DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
3053                         "0x%X PCI Address 0x%X\n", Controller,
3054                         Controller->Bus, Controller->Device,
3055                         Controller->Function, Controller->IO_Address,
3056                         Controller->PCI_Address);
3057   DAC960_DetectCleanup(Controller);
3058   DAC960_ControllerCount--;
3059   return NULL;
3060 }
3061
3062 /*
3063   DAC960_InitializeController initializes Controller.
3064 */
3065
3066 static bool 
3067 DAC960_InitializeController(DAC960_Controller_T *Controller)
3068 {
3069   if (DAC960_ReadControllerConfiguration(Controller) &&
3070       DAC960_ReportControllerConfiguration(Controller) &&
3071       DAC960_CreateAuxiliaryStructures(Controller) &&
3072       DAC960_ReadDeviceConfiguration(Controller) &&
3073       DAC960_ReportDeviceConfiguration(Controller) &&
3074       DAC960_RegisterBlockDevice(Controller))
3075     {
3076       /*
3077         Initialize the Monitoring Timer.
3078       */
3079       init_timer(&Controller->MonitoringTimer);
3080       Controller->MonitoringTimer.expires =
3081         jiffies + DAC960_MonitoringTimerInterval;
3082       Controller->MonitoringTimer.data = (unsigned long) Controller;
3083       Controller->MonitoringTimer.function = DAC960_MonitoringTimerFunction;
3084       add_timer(&Controller->MonitoringTimer);
3085       Controller->ControllerInitialized = true;
3086       return true;
3087     }
3088   return false;
3089 }
3090
3091
3092 /*
3093   DAC960_FinalizeController finalizes Controller.
3094 */
3095
3096 static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
3097 {
3098   if (Controller->ControllerInitialized)
3099     {
3100       unsigned long flags;
3101
3102       /*
3103        * Acquiring and releasing lock here eliminates
3104        * a very low probability race.
3105        *
3106        * The code below allocates controller command structures
3107        * from the free list without holding the controller lock.
3108        * This is safe assuming there is no other activity on
3109        * the controller at the time.
3110        * 
3111        * But, there might be a monitoring command still
3112        * in progress.  Setting the Shutdown flag while holding
3113        * the lock ensures that there is no monitoring command
3114        * in the interrupt handler currently, and any monitoring
3115        * commands that complete from this time on will NOT return
3116        * their command structure to the free list.
3117        */
3118
3119       spin_lock_irqsave(&Controller->queue_lock, flags);
3120       Controller->ShutdownMonitoringTimer = 1;
3121       spin_unlock_irqrestore(&Controller->queue_lock, flags);
3122
3123       del_timer_sync(&Controller->MonitoringTimer);
3124       if (Controller->FirmwareType == DAC960_V1_Controller)
3125         {
3126           DAC960_Notice("Flushing Cache...", Controller);
3127           DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, 0);
3128           DAC960_Notice("done\n", Controller);
3129
3130           if (Controller->HardwareType == DAC960_PD_Controller)
3131               release_region(Controller->IO_Address, 0x80);
3132         }
3133       else
3134         {
3135           DAC960_Notice("Flushing Cache...", Controller);
3136           DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
3137                                     DAC960_V2_RAID_Controller);
3138           DAC960_Notice("done\n", Controller);
3139         }
3140     }
3141   DAC960_UnregisterBlockDevice(Controller);
3142   DAC960_DestroyAuxiliaryStructures(Controller);
3143   DAC960_DestroyProcEntries(Controller);
3144   DAC960_DetectCleanup(Controller);
3145 }
3146
3147
3148 /*
3149   DAC960_Probe verifies controller's existence and
3150   initializes the DAC960 Driver for that controller.
3151 */
3152
3153 static int 
3154 DAC960_Probe(struct pci_dev *dev, const struct pci_device_id *entry)
3155 {
3156   int disk;
3157   DAC960_Controller_T *Controller;
3158
3159   if (DAC960_ControllerCount == DAC960_MaxControllers)
3160   {
3161         DAC960_Error("More than %d DAC960 Controllers detected - "
3162                        "ignoring from Controller at\n",
3163                        NULL, DAC960_MaxControllers);
3164         return -ENODEV;
3165   }
3166
3167   Controller = DAC960_DetectController(dev, entry);
3168   if (!Controller)
3169         return -ENODEV;
3170
3171   if (!DAC960_InitializeController(Controller)) {
3172         DAC960_FinalizeController(Controller);
3173         return -ENODEV;
3174   }
3175
3176   for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
3177         set_capacity(Controller->disks[disk], disk_size(Controller, disk));
3178         add_disk(Controller->disks[disk]);
3179   }
3180   DAC960_CreateProcEntries(Controller);
3181   return 0;
3182 }
3183
3184
3185 /*
3186   DAC960_Finalize finalizes the DAC960 Driver.
3187 */
3188
3189 static void DAC960_Remove(struct pci_dev *PCI_Device)
3190 {
3191   int Controller_Number = (long)pci_get_drvdata(PCI_Device);
3192   DAC960_Controller_T *Controller = DAC960_Controllers[Controller_Number];
3193   if (Controller != NULL)
3194       DAC960_FinalizeController(Controller);
3195 }
3196
3197
3198 /*
3199   DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
3200   DAC960 V1 Firmware Controllers.
3201 */
3202
3203 static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
3204 {
3205   DAC960_Controller_T *Controller = Command->Controller;
3206   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
3207   DAC960_V1_ScatterGatherSegment_T *ScatterGatherList =
3208                                         Command->V1.ScatterGatherList;
3209   struct scatterlist *ScatterList = Command->V1.ScatterList;
3210
3211   DAC960_V1_ClearCommand(Command);
3212
3213   if (Command->SegmentCount == 1)
3214     {
3215       if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3216         CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
3217       else 
3218         CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
3219
3220       CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3221       CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3222       CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3223       CommandMailbox->Type5.BusAddress =
3224                         (DAC960_BusAddress32_T)sg_dma_address(ScatterList);     
3225     }
3226   else
3227     {
3228       int i;
3229
3230       if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3231         CommandMailbox->Type5.CommandOpcode = DAC960_V1_ReadWithScatterGather;
3232       else
3233         CommandMailbox->Type5.CommandOpcode = DAC960_V1_WriteWithScatterGather;
3234
3235       CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3236       CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3237       CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3238       CommandMailbox->Type5.BusAddress = Command->V1.ScatterGatherListDMA;
3239
3240       CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
3241
3242       for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3243                 ScatterGatherList->SegmentDataPointer =
3244                         (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3245                 ScatterGatherList->SegmentByteCount =
3246                         (DAC960_ByteCount32_T)sg_dma_len(ScatterList);
3247       }
3248     }
3249   DAC960_QueueCommand(Command);
3250 }
3251
3252
3253 /*
3254   DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
3255   DAC960 V2 Firmware Controllers.
3256 */
3257
3258 static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
3259 {
3260   DAC960_Controller_T *Controller = Command->Controller;
3261   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
3262   struct scatterlist *ScatterList = Command->V2.ScatterList;
3263
3264   DAC960_V2_ClearCommand(Command);
3265
3266   CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
3267   CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
3268     (Command->DmaDirection == PCI_DMA_FROMDEVICE);
3269   CommandMailbox->SCSI_10.DataTransferSize =
3270     Command->BlockCount << DAC960_BlockSizeBits;
3271   CommandMailbox->SCSI_10.RequestSenseBusAddress = Command->V2.RequestSenseDMA;
3272   CommandMailbox->SCSI_10.PhysicalDevice =
3273     Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
3274   CommandMailbox->SCSI_10.RequestSenseSize = sizeof(DAC960_SCSI_RequestSense_T);
3275   CommandMailbox->SCSI_10.CDBLength = 10;
3276   CommandMailbox->SCSI_10.SCSI_CDB[0] =
3277     (Command->DmaDirection == PCI_DMA_FROMDEVICE ? 0x28 : 0x2A);
3278   CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
3279   CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
3280   CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
3281   CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
3282   CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
3283   CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
3284
3285   if (Command->SegmentCount == 1)
3286     {
3287       CommandMailbox->SCSI_10.DataTransferMemoryAddress
3288                              .ScatterGatherSegments[0]
3289                              .SegmentDataPointer =
3290         (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3291       CommandMailbox->SCSI_10.DataTransferMemoryAddress
3292                              .ScatterGatherSegments[0]
3293                              .SegmentByteCount =
3294         CommandMailbox->SCSI_10.DataTransferSize;
3295     }
3296   else
3297     {
3298       DAC960_V2_ScatterGatherSegment_T *ScatterGatherList;
3299       int i;
3300
3301       if (Command->SegmentCount > 2)
3302         {
3303           ScatterGatherList = Command->V2.ScatterGatherList;
3304           CommandMailbox->SCSI_10.CommandControlBits
3305                          .AdditionalScatterGatherListMemory = true;
3306           CommandMailbox->SCSI_10.DataTransferMemoryAddress
3307                 .ExtendedScatterGather.ScatterGatherList0Length = Command->SegmentCount;
3308           CommandMailbox->SCSI_10.DataTransferMemoryAddress
3309                          .ExtendedScatterGather.ScatterGatherList0Address =
3310             Command->V2.ScatterGatherListDMA;
3311         }
3312       else
3313         ScatterGatherList = CommandMailbox->SCSI_10.DataTransferMemoryAddress
3314                                  .ScatterGatherSegments;
3315
3316       for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3317                 ScatterGatherList->SegmentDataPointer =
3318                         (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3319                 ScatterGatherList->SegmentByteCount =
3320                         (DAC960_ByteCount64_T)sg_dma_len(ScatterList);
3321       }
3322     }
3323   DAC960_QueueCommand(Command);
3324 }
3325
3326
3327 static int DAC960_process_queue(DAC960_Controller_T *Controller, struct request_queue *req_q)
3328 {
3329         struct request *Request;
3330         DAC960_Command_T *Command;
3331
3332    while(1) {
3333         Request = blk_peek_request(req_q);
3334         if (!Request)
3335                 return 1;
3336
3337         Command = DAC960_AllocateCommand(Controller);
3338         if (Command == NULL)
3339                 return 0;
3340
3341         if (rq_data_dir(Request) == READ) {
3342                 Command->DmaDirection = PCI_DMA_FROMDEVICE;
3343                 Command->CommandType = DAC960_ReadCommand;
3344         } else {
3345                 Command->DmaDirection = PCI_DMA_TODEVICE;
3346                 Command->CommandType = DAC960_WriteCommand;
3347         }
3348         Command->Completion = Request->end_io_data;
3349         Command->LogicalDriveNumber = (long)Request->rq_disk->private_data;
3350         Command->BlockNumber = blk_rq_pos(Request);
3351         Command->BlockCount = blk_rq_sectors(Request);
3352         Command->Request = Request;
3353         blk_start_request(Request);
3354         Command->SegmentCount = blk_rq_map_sg(req_q,
3355                   Command->Request, Command->cmd_sglist);
3356         /* pci_map_sg MAY change the value of SegCount */
3357         Command->SegmentCount = pci_map_sg(Controller->PCIDevice, Command->cmd_sglist,
3358                  Command->SegmentCount, Command->DmaDirection);
3359
3360         DAC960_QueueReadWriteCommand(Command);
3361   }
3362 }
3363
3364 /*
3365   DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
3366   I/O Request Queue and queues it to the Controller.  WaitForCommand is true if
3367   this function should wait for a Command to become available if necessary.
3368   This function returns true if an I/O Request was queued and false otherwise.
3369 */
3370 static void DAC960_ProcessRequest(DAC960_Controller_T *controller)
3371 {
3372         int i;
3373
3374         if (!controller->ControllerInitialized)
3375                 return;
3376
3377         /* Do this better later! */
3378         for (i = controller->req_q_index; i < DAC960_MaxLogicalDrives; i++) {
3379                 struct request_queue *req_q = controller->RequestQueue[i];
3380
3381                 if (req_q == NULL)
3382                         continue;
3383
3384                 if (!DAC960_process_queue(controller, req_q)) {
3385                         controller->req_q_index = i;
3386                         return;
3387                 }
3388         }
3389
3390         if (controller->req_q_index == 0)
3391                 return;
3392
3393         for (i = 0; i < controller->req_q_index; i++) {
3394                 struct request_queue *req_q = controller->RequestQueue[i];
3395
3396                 if (req_q == NULL)
3397                         continue;
3398
3399                 if (!DAC960_process_queue(controller, req_q)) {
3400                         controller->req_q_index = i;
3401                         return;
3402                 }
3403         }
3404 }
3405
3406
3407 /*
3408   DAC960_queue_partial_rw extracts one bio from the request already
3409   associated with argument command, and construct a new command block to retry I/O
3410   only on that bio.  Queue that command to the controller.
3411
3412   This function re-uses a previously-allocated Command,
3413         there is no failure mode from trying to allocate a command.
3414 */
3415
3416 static void DAC960_queue_partial_rw(DAC960_Command_T *Command)
3417 {
3418   DAC960_Controller_T *Controller = Command->Controller;
3419   struct request *Request = Command->Request;
3420   struct request_queue *req_q = Controller->RequestQueue[Command->LogicalDriveNumber];
3421
3422   if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3423     Command->CommandType = DAC960_ReadRetryCommand;
3424   else
3425     Command->CommandType = DAC960_WriteRetryCommand;
3426
3427   /*
3428    * We could be more efficient with these mapping requests
3429    * and map only the portions that we need.  But since this
3430    * code should almost never be called, just go with a
3431    * simple coding.
3432    */
3433   (void)blk_rq_map_sg(req_q, Command->Request, Command->cmd_sglist);
3434
3435   (void)pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, 1, Command->DmaDirection);
3436   /*
3437    * Resubmitting the request sector at a time is really tedious.
3438    * But, this should almost never happen.  So, we're willing to pay
3439    * this price so that in the end, as much of the transfer is completed
3440    * successfully as possible.
3441    */
3442   Command->SegmentCount = 1;
3443   Command->BlockNumber = blk_rq_pos(Request);
3444   Command->BlockCount = 1;
3445   DAC960_QueueReadWriteCommand(Command);
3446   return;
3447 }
3448
3449 /*
3450   DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
3451 */
3452
3453 static void DAC960_RequestFunction(struct request_queue *RequestQueue)
3454 {
3455         DAC960_ProcessRequest(RequestQueue->queuedata);
3456 }
3457
3458 /*
3459   DAC960_ProcessCompletedBuffer performs completion processing for an
3460   individual Buffer.
3461 */
3462
3463 static inline bool DAC960_ProcessCompletedRequest(DAC960_Command_T *Command,
3464                                                  bool SuccessfulIO)
3465 {
3466         struct request *Request = Command->Request;
3467         int Error = SuccessfulIO ? 0 : -EIO;
3468
3469         pci_unmap_sg(Command->Controller->PCIDevice, Command->cmd_sglist,
3470                 Command->SegmentCount, Command->DmaDirection);
3471
3472          if (!__blk_end_request(Request, Error, Command->BlockCount << 9)) {
3473                 if (Command->Completion) {
3474                         complete(Command->Completion);
3475                         Command->Completion = NULL;
3476                 }
3477                 return true;
3478         }
3479         return false;
3480 }
3481
3482 /*
3483   DAC960_V1_ReadWriteError prints an appropriate error message for Command
3484   when an error occurs on a Read or Write operation.
3485 */
3486
3487 static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command)
3488 {
3489   DAC960_Controller_T *Controller = Command->Controller;
3490   unsigned char *CommandName = "UNKNOWN";
3491   switch (Command->CommandType)
3492     {
3493     case DAC960_ReadCommand:
3494     case DAC960_ReadRetryCommand:
3495       CommandName = "READ";
3496       break;
3497     case DAC960_WriteCommand:
3498     case DAC960_WriteRetryCommand:
3499       CommandName = "WRITE";
3500       break;
3501     case DAC960_MonitoringCommand:
3502     case DAC960_ImmediateCommand:
3503     case DAC960_QueuedCommand:
3504       break;
3505     }
3506   switch (Command->V1.CommandStatus)
3507     {
3508     case DAC960_V1_IrrecoverableDataError:
3509       DAC960_Error("Irrecoverable Data Error on %s:\n",
3510                    Controller, CommandName);
3511       break;
3512     case DAC960_V1_LogicalDriveNonexistentOrOffline:
3513       DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n",
3514                    Controller, CommandName);
3515       break;
3516     case DAC960_V1_AccessBeyondEndOfLogicalDrive:
3517       DAC960_Error("Attempt to Access Beyond End of Logical Drive "
3518                    "on %s:\n", Controller, CommandName);
3519       break;
3520     case DAC960_V1_BadDataEncountered:
3521       DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName);
3522       break;
3523     default:
3524       DAC960_Error("Unexpected Error Status %04X on %s:\n",
3525                    Controller, Command->V1.CommandStatus, CommandName);
3526       break;
3527     }
3528   DAC960_Error("  /dev/rd/c%dd%d:   absolute blocks %u..%u\n",
3529                Controller, Controller->ControllerNumber,
3530                Command->LogicalDriveNumber, Command->BlockNumber,
3531                Command->BlockNumber + Command->BlockCount - 1);
3532 }
3533
3534
3535 /*
3536   DAC960_V1_ProcessCompletedCommand performs completion processing for Command
3537   for DAC960 V1 Firmware Controllers.
3538 */
3539
3540 static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command)
3541 {
3542   DAC960_Controller_T *Controller = Command->Controller;
3543   DAC960_CommandType_T CommandType = Command->CommandType;
3544   DAC960_V1_CommandOpcode_T CommandOpcode =
3545     Command->V1.CommandMailbox.Common.CommandOpcode;
3546   DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus;
3547
3548   if (CommandType == DAC960_ReadCommand ||
3549       CommandType == DAC960_WriteCommand)
3550     {
3551
3552 #ifdef FORCE_RETRY_DEBUG
3553       CommandStatus = DAC960_V1_IrrecoverableDataError;
3554 #endif
3555
3556       if (CommandStatus == DAC960_V1_NormalCompletion) {
3557
3558                 if (!DAC960_ProcessCompletedRequest(Command, true))
3559                         BUG();
3560
3561       } else if (CommandStatus == DAC960_V1_IrrecoverableDataError ||
3562                 CommandStatus == DAC960_V1_BadDataEncountered)
3563         {
3564           /*
3565            * break the command down into pieces and resubmit each
3566            * piece, hoping that some of them will succeed.
3567            */
3568            DAC960_queue_partial_rw(Command);
3569            return;
3570         }
3571       else
3572         {
3573           if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3574             DAC960_V1_ReadWriteError(Command);
3575
3576          if (!DAC960_ProcessCompletedRequest(Command, false))
3577                 BUG();
3578         }
3579     }
3580   else if (CommandType == DAC960_ReadRetryCommand ||
3581            CommandType == DAC960_WriteRetryCommand)
3582     {
3583       bool normal_completion;
3584 #ifdef FORCE_RETRY_FAILURE_DEBUG
3585       static int retry_count = 1;
3586 #endif
3587       /*
3588         Perform completion processing for the portion that was
3589         retried, and submit the next portion, if any.
3590       */
3591       normal_completion = true;
3592       if (CommandStatus != DAC960_V1_NormalCompletion) {
3593         normal_completion = false;
3594         if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3595             DAC960_V1_ReadWriteError(Command);
3596       }
3597
3598 #ifdef FORCE_RETRY_FAILURE_DEBUG
3599       if (!(++retry_count % 10000)) {
3600               printk("V1 error retry failure test\n");
3601               normal_completion = false;
3602               DAC960_V1_ReadWriteError(Command);
3603       }
3604 #endif
3605
3606       if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
3607         DAC960_queue_partial_rw(Command);
3608         return;
3609       }
3610     }
3611
3612   else if (CommandType == DAC960_MonitoringCommand)
3613     {
3614       if (Controller->ShutdownMonitoringTimer)
3615               return;
3616       if (CommandOpcode == DAC960_V1_Enquiry)
3617         {
3618           DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry;
3619           DAC960_V1_Enquiry_T *NewEnquiry = Controller->V1.NewEnquiry;
3620           unsigned int OldCriticalLogicalDriveCount =
3621             OldEnquiry->CriticalLogicalDriveCount;
3622           unsigned int NewCriticalLogicalDriveCount =
3623             NewEnquiry->CriticalLogicalDriveCount;
3624           if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount)
3625             {
3626               int LogicalDriveNumber = Controller->LogicalDriveCount - 1;
3627               while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives)
3628                 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3629                                 "Now Exists\n", Controller,
3630                                 LogicalDriveNumber,
3631                                 Controller->ControllerNumber,
3632                                 LogicalDriveNumber);
3633               Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3634               DAC960_ComputeGenericDiskInfo(Controller);
3635             }
3636           if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount)
3637             {
3638               int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1;
3639               while (++LogicalDriveNumber < Controller->LogicalDriveCount)
3640                 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3641                                 "No Longer Exists\n", Controller,
3642                                 LogicalDriveNumber,
3643                                 Controller->ControllerNumber,
3644                                 LogicalDriveNumber);
3645               Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3646               DAC960_ComputeGenericDiskInfo(Controller);
3647             }
3648           if (NewEnquiry->StatusFlags.DeferredWriteError !=
3649               OldEnquiry->StatusFlags.DeferredWriteError)
3650             DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller,
3651                             (NewEnquiry->StatusFlags.DeferredWriteError
3652                              ? "TRUE" : "FALSE"));
3653           if ((NewCriticalLogicalDriveCount > 0 ||
3654                NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) ||
3655               (NewEnquiry->OfflineLogicalDriveCount > 0 ||
3656                NewEnquiry->OfflineLogicalDriveCount !=
3657                OldEnquiry->OfflineLogicalDriveCount) ||
3658               (NewEnquiry->DeadDriveCount > 0 ||
3659                NewEnquiry->DeadDriveCount !=
3660                OldEnquiry->DeadDriveCount) ||
3661               (NewEnquiry->EventLogSequenceNumber !=
3662                OldEnquiry->EventLogSequenceNumber) ||
3663               Controller->MonitoringTimerCount == 0 ||
3664               time_after_eq(jiffies, Controller->SecondaryMonitoringTime
3665                + DAC960_SecondaryMonitoringInterval))
3666             {
3667               Controller->V1.NeedLogicalDriveInformation = true;
3668               Controller->V1.NewEventLogSequenceNumber =
3669                 NewEnquiry->EventLogSequenceNumber;
3670               Controller->V1.NeedErrorTableInformation = true;
3671               Controller->V1.NeedDeviceStateInformation = true;
3672               Controller->V1.StartDeviceStateScan = true;
3673               Controller->V1.NeedBackgroundInitializationStatus =
3674                 Controller->V1.BackgroundInitializationStatusSupported;
3675               Controller->SecondaryMonitoringTime = jiffies;
3676             }
3677           if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3678               NewEnquiry->RebuildFlag
3679               == DAC960_V1_BackgroundRebuildInProgress ||
3680               OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3681               OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress)
3682             {
3683               Controller->V1.NeedRebuildProgress = true;
3684               Controller->V1.RebuildProgressFirst =
3685                 (NewEnquiry->CriticalLogicalDriveCount <
3686                  OldEnquiry->CriticalLogicalDriveCount);
3687             }
3688           if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress)
3689             switch (NewEnquiry->RebuildFlag)
3690               {
3691               case DAC960_V1_NoStandbyRebuildOrCheckInProgress:
3692                 DAC960_Progress("Consistency Check Completed Successfully\n",
3693                                 Controller);
3694                 break;
3695               case DAC960_V1_StandbyRebuildInProgress:
3696               case DAC960_V1_BackgroundRebuildInProgress:
3697                 break;
3698               case DAC960_V1_BackgroundCheckInProgress:
3699                 Controller->V1.NeedConsistencyCheckProgress = true;
3700                 break;
3701               case DAC960_V1_StandbyRebuildCompletedWithError:
3702                 DAC960_Progress("Consistency Check Completed with Error\n",
3703                                 Controller);
3704                 break;
3705               case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed:
3706                 DAC960_Progress("Consistency Check Failed - "
3707                                 "Physical Device Failed\n", Controller);
3708                 break;
3709               case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed:
3710                 DAC960_Progress("Consistency Check Failed - "
3711                                 "Logical Drive Failed\n", Controller);
3712                 break;
3713               case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses:
3714                 DAC960_Progress("Consistency Check Failed - Other Causes\n",
3715                                 Controller);
3716                 break;
3717               case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated:
3718                 DAC960_Progress("Consistency Check Successfully Terminated\n",
3719                                 Controller);
3720                 break;
3721               }
3722           else if (NewEnquiry->RebuildFlag
3723                    == DAC960_V1_BackgroundCheckInProgress)
3724             Controller->V1.NeedConsistencyCheckProgress = true;
3725           Controller->MonitoringAlertMode =
3726             (NewEnquiry->CriticalLogicalDriveCount > 0 ||
3727              NewEnquiry->OfflineLogicalDriveCount > 0 ||
3728              NewEnquiry->DeadDriveCount > 0);
3729           if (NewEnquiry->RebuildFlag > DAC960_V1_BackgroundCheckInProgress)
3730             {
3731               Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag;
3732               Controller->V1.RebuildFlagPending = true;
3733             }
3734           memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry,
3735                  sizeof(DAC960_V1_Enquiry_T));
3736         }
3737       else if (CommandOpcode == DAC960_V1_PerformEventLogOperation)
3738         {
3739           static char
3740             *DAC960_EventMessages[] =
3741                { "killed because write recovery failed",
3742                  "killed because of SCSI bus reset failure",
3743                  "killed because of double check condition",
3744                  "killed because it was removed",
3745                  "killed because of gross error on SCSI chip",
3746                  "killed because of bad tag returned from drive",
3747                  "killed because of timeout on SCSI command",
3748                  "killed because of reset SCSI command issued from system",
3749                  "killed because busy or parity error count exceeded limit",
3750                  "killed because of 'kill drive' command from system",
3751                  "killed because of selection timeout",
3752                  "killed due to SCSI phase sequence error",
3753                  "killed due to unknown status" };
3754           DAC960_V1_EventLogEntry_T *EventLogEntry =
3755                 Controller->V1.EventLogEntry;
3756           if (EventLogEntry->SequenceNumber ==
3757               Controller->V1.OldEventLogSequenceNumber)
3758             {
3759               unsigned char SenseKey = EventLogEntry->SenseKey;
3760               unsigned char AdditionalSenseCode =
3761                 EventLogEntry->AdditionalSenseCode;
3762               unsigned char AdditionalSenseCodeQualifier =
3763                 EventLogEntry->AdditionalSenseCodeQualifier;
3764               if (SenseKey == DAC960_SenseKey_VendorSpecific &&
3765                   AdditionalSenseCode == 0x80 &&
3766                   AdditionalSenseCodeQualifier <
3767                   ARRAY_SIZE(DAC960_EventMessages))
3768                 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
3769                                 EventLogEntry->Channel,
3770                                 EventLogEntry->TargetID,
3771                                 DAC960_EventMessages[
3772                                   AdditionalSenseCodeQualifier]);
3773               else if (SenseKey == DAC960_SenseKey_UnitAttention &&
3774                        AdditionalSenseCode == 0x29)
3775                 {
3776                   if (Controller->MonitoringTimerCount > 0)
3777                     Controller->V1.DeviceResetCount[EventLogEntry->Channel]
3778                                                    [EventLogEntry->TargetID]++;
3779                 }
3780               else if (!(SenseKey == DAC960_SenseKey_NoSense ||
3781                          (SenseKey == DAC960_SenseKey_NotReady &&
3782                           AdditionalSenseCode == 0x04 &&
3783                           (AdditionalSenseCodeQualifier == 0x01 ||
3784                            AdditionalSenseCodeQualifier == 0x02))))
3785                 {
3786                   DAC960_Critical("Physical Device %d:%d Error Log: "
3787                                   "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
3788                                   Controller,
3789                                   EventLogEntry->Channel,
3790                                   EventLogEntry->TargetID,
3791                                   SenseKey,
3792                                   AdditionalSenseCode,
3793                                   AdditionalSenseCodeQualifier);
3794                   DAC960_Critical("Physical Device %d:%d Error Log: "
3795                                   "Information = %02X%02X%02X%02X "
3796                                   "%02X%02X%02X%02X\n",
3797                                   Controller,
3798                                   EventLogEntry->Channel,
3799                                   EventLogEntry->TargetID,
3800                                   EventLogEntry->Information[0],
3801                                   EventLogEntry->Information[1],
3802                                   EventLogEntry->Information[2],
3803                                   EventLogEntry->Information[3],
3804                                   EventLogEntry->CommandSpecificInformation[0],
3805                                   EventLogEntry->CommandSpecificInformation[1],
3806                                   EventLogEntry->CommandSpecificInformation[2],
3807                                   EventLogEntry->CommandSpecificInformation[3]);
3808                 }
3809             }
3810           Controller->V1.OldEventLogSequenceNumber++;
3811         }
3812       else if (CommandOpcode == DAC960_V1_GetErrorTable)
3813         {
3814           DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable;
3815           DAC960_V1_ErrorTable_T *NewErrorTable = Controller->V1.NewErrorTable;
3816           int Channel, TargetID;
3817           for (Channel = 0; Channel < Controller->Channels; Channel++)
3818             for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
3819               {
3820                 DAC960_V1_ErrorTableEntry_T *NewErrorEntry =
3821                   &NewErrorTable->ErrorTableEntries[Channel][TargetID];
3822                 DAC960_V1_ErrorTableEntry_T *OldErrorEntry =
3823                   &OldErrorTable->ErrorTableEntries[Channel][TargetID];
3824                 if ((NewErrorEntry->ParityErrorCount !=
3825                      OldErrorEntry->ParityErrorCount) ||
3826                     (NewErrorEntry->SoftErrorCount !=
3827                      OldErrorEntry->SoftErrorCount) ||
3828                     (NewErrorEntry->HardErrorCount !=
3829                      OldErrorEntry->HardErrorCount) ||
3830                     (NewErrorEntry->MiscErrorCount !=
3831                      OldErrorEntry->MiscErrorCount))
3832                   DAC960_Critical("Physical Device %d:%d Errors: "
3833                                   "Parity = %d, Soft = %d, "
3834                                   "Hard = %d, Misc = %d\n",
3835                                   Controller, Channel, TargetID,
3836                                   NewErrorEntry->ParityErrorCount,
3837                                   NewErrorEntry->SoftErrorCount,
3838                                   NewErrorEntry->HardErrorCount,
3839                                   NewErrorEntry->MiscErrorCount);
3840               }
3841           memcpy(&Controller->V1.ErrorTable, Controller->V1.NewErrorTable,
3842                  sizeof(DAC960_V1_ErrorTable_T));
3843         }
3844       else if (CommandOpcode == DAC960_V1_GetDeviceState)
3845         {
3846           DAC960_V1_DeviceState_T *OldDeviceState =
3847             &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
3848                                        [Controller->V1.DeviceStateTargetID];
3849           DAC960_V1_DeviceState_T *NewDeviceState =
3850             Controller->V1.NewDeviceState;
3851           if (NewDeviceState->DeviceState != OldDeviceState->DeviceState)
3852             DAC960_Critical("Physical Device %d:%d is now %s\n", Controller,
3853                             Controller->V1.DeviceStateChannel,
3854                             Controller->V1.DeviceStateTargetID,
3855                             (NewDeviceState->DeviceState
3856                              == DAC960_V1_Device_Dead
3857                              ? "DEAD"
3858                              : NewDeviceState->DeviceState
3859                                == DAC960_V1_Device_WriteOnly
3860                                ? "WRITE-ONLY"
3861                                : NewDeviceState->DeviceState
3862                                  == DAC960_V1_Device_Online
3863                                  ? "ONLINE" : "STANDBY"));
3864           if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead &&
3865               NewDeviceState->DeviceState != DAC960_V1_Device_Dead)
3866             {
3867               Controller->V1.NeedDeviceInquiryInformation = true;
3868               Controller->V1.NeedDeviceSerialNumberInformation = true;
3869               Controller->V1.DeviceResetCount
3870                              [Controller->V1.DeviceStateChannel]
3871                              [Controller->V1.DeviceStateTargetID] = 0;
3872             }
3873           memcpy(OldDeviceState, NewDeviceState,
3874                  sizeof(DAC960_V1_DeviceState_T));
3875         }
3876       else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation)
3877         {
3878           int LogicalDriveNumber;
3879           for (LogicalDriveNumber = 0;
3880                LogicalDriveNumber < Controller->LogicalDriveCount;
3881                LogicalDriveNumber++)
3882             {
3883               DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation =
3884                 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
3885               DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation =
3886                 &(*Controller->V1.NewLogicalDriveInformation)[LogicalDriveNumber];
3887               if (NewLogicalDriveInformation->LogicalDriveState !=
3888                   OldLogicalDriveInformation->LogicalDriveState)
3889                 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3890                                 "is now %s\n", Controller,
3891                                 LogicalDriveNumber,
3892                                 Controller->ControllerNumber,
3893                                 LogicalDriveNumber,
3894                                 (NewLogicalDriveInformation->LogicalDriveState
3895                                  == DAC960_V1_LogicalDrive_Online
3896                                  ? "ONLINE"
3897                                  : NewLogicalDriveInformation->LogicalDriveState
3898                                    == DAC960_V1_LogicalDrive_Critical
3899                                    ? "CRITICAL" : "OFFLINE"));
3900               if (NewLogicalDriveInformation->WriteBack !=
3901                   OldLogicalDriveInformation->WriteBack)
3902                 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3903                                 "is now %s\n", Controller,
3904                                 LogicalDriveNumber,
3905                                 Controller->ControllerNumber,
3906                                 LogicalDriveNumber,
3907                                 (NewLogicalDriveInformation->WriteBack
3908                                  ? "WRITE BACK" : "WRITE THRU"));
3909             }
3910           memcpy(&Controller->V1.LogicalDriveInformation,
3911                  Controller->V1.NewLogicalDriveInformation,
3912                  sizeof(DAC960_V1_LogicalDriveInformationArray_T));
3913         }
3914       else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
3915         {
3916           unsigned int LogicalDriveNumber =
3917             Controller->V1.RebuildProgress->LogicalDriveNumber;
3918           unsigned int LogicalDriveSize =
3919             Controller->V1.RebuildProgress->LogicalDriveSize;
3920           unsigned int BlocksCompleted =
3921             LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3922           if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress &&
3923               Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion)
3924             CommandStatus = DAC960_V1_RebuildSuccessful;
3925           switch (CommandStatus)
3926             {
3927             case DAC960_V1_NormalCompletion:
3928               Controller->EphemeralProgressMessage = true;
3929               DAC960_Progress("Rebuild in Progress: "
3930                               "Logical Drive %d (/dev/rd/c%dd%d) "
3931                               "%d%% completed\n",
3932                               Controller, LogicalDriveNumber,
3933                               Controller->ControllerNumber,
3934                               LogicalDriveNumber,
3935                               (100 * (BlocksCompleted >> 7))
3936                               / (LogicalDriveSize >> 7));
3937               Controller->EphemeralProgressMessage = false;
3938               break;
3939             case DAC960_V1_RebuildFailed_LogicalDriveFailure:
3940               DAC960_Progress("Rebuild Failed due to "
3941                               "Logical Drive Failure\n", Controller);
3942               break;
3943             case DAC960_V1_RebuildFailed_BadBlocksOnOther:
3944               DAC960_Progress("Rebuild Failed due to "
3945                               "Bad Blocks on Other Drives\n", Controller);
3946               break;
3947             case DAC960_V1_RebuildFailed_NewDriveFailed:
3948               DAC960_Progress("Rebuild Failed due to "
3949                               "Failure of Drive Being Rebuilt\n", Controller);
3950               break;
3951             case DAC960_V1_NoRebuildOrCheckInProgress:
3952               break;
3953             case DAC960_V1_RebuildSuccessful:
3954               DAC960_Progress("Rebuild Completed Successfully\n", Controller);
3955               break;
3956             case DAC960_V1_RebuildSuccessfullyTerminated:
3957               DAC960_Progress("Rebuild Successfully Terminated\n", Controller);
3958               break;
3959             }
3960           Controller->V1.LastRebuildStatus = CommandStatus;
3961           if (CommandType != DAC960_MonitoringCommand &&
3962               Controller->V1.RebuildStatusPending)
3963             {
3964               Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus;
3965               Controller->V1.RebuildStatusPending = false;
3966             }
3967           else if (CommandType == DAC960_MonitoringCommand &&
3968                    CommandStatus != DAC960_V1_NormalCompletion &&
3969                    CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress)
3970             {
3971               Controller->V1.PendingRebuildStatus = CommandStatus;
3972               Controller->V1.RebuildStatusPending = true;
3973             }
3974         }
3975       else if (CommandOpcode == DAC960_V1_RebuildStat)
3976         {
3977           unsigned int LogicalDriveNumber =
3978             Controller->V1.RebuildProgress->LogicalDriveNumber;
3979           unsigned int LogicalDriveSize =
3980             Controller->V1.RebuildProgress->LogicalDriveSize;
3981           unsigned int BlocksCompleted =
3982             LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3983           if (CommandStatus == DAC960_V1_NormalCompletion)
3984             {
3985               Controller->EphemeralProgressMessage = true;
3986               DAC960_Progress("Consistency Check in Progress: "
3987                               "Logical Drive %d (/dev/rd/c%dd%d) "
3988                               "%d%% completed\n",
3989                               Controller, LogicalDriveNumber,
3990                               Controller->ControllerNumber,
3991                               LogicalDriveNumber,
3992                               (100 * (BlocksCompleted >> 7))
3993                               / (LogicalDriveSize >> 7));
3994               Controller->EphemeralProgressMessage = false;
3995             }
3996         }
3997       else if (CommandOpcode == DAC960_V1_BackgroundInitializationControl)
3998         {
3999           unsigned int LogicalDriveNumber =
4000             Controller->V1.BackgroundInitializationStatus->LogicalDriveNumber;
4001           unsigned int LogicalDriveSize =
4002             Controller->V1.BackgroundInitializationStatus->LogicalDriveSize;
4003           unsigned int BlocksCompleted =
4004             Controller->V1.BackgroundInitializationStatus->BlocksCompleted;
4005           switch (CommandStatus)
4006             {
4007             case DAC960_V1_NormalCompletion:
4008               switch (Controller->V1.BackgroundInitializationStatus->Status)
4009                 {
4010                 case DAC960_V1_BackgroundInitializationInvalid:
4011                   break;
4012                 case DAC960_V1_BackgroundInitializationStarted:
4013                   DAC960_Progress("Background Initialization Started\n",
4014                                   Controller);
4015                   break;
4016                 case DAC960_V1_BackgroundInitializationInProgress:
4017                   if (BlocksCompleted ==
4018                       Controller->V1.LastBackgroundInitializationStatus.
4019                                 BlocksCompleted &&
4020                       LogicalDriveNumber ==
4021                       Controller->V1.LastBackgroundInitializationStatus.
4022                                 LogicalDriveNumber)
4023                     break;
4024                   Controller->EphemeralProgressMessage = true;
4025                   DAC960_Progress("Background Initialization in Progress: "
4026                                   "Logical Drive %d (/dev/rd/c%dd%d) "
4027                                   "%d%% completed\n",
4028                                   Controller, LogicalDriveNumber,
4029                                   Controller->ControllerNumber,
4030                                   LogicalDriveNumber,
4031                                   (100 * (BlocksCompleted >> 7))
4032                                   / (LogicalDriveSize >> 7));
4033                   Controller->EphemeralProgressMessage = false;
4034                   break;
4035                 case DAC960_V1_BackgroundInitializationSuspended:
4036                   DAC960_Progress("Background Initialization Suspended\n",
4037                                   Controller);
4038                   break;
4039                 case DAC960_V1_BackgroundInitializationCancelled:
4040                   DAC960_Progress("Background Initialization Cancelled\n",
4041                                   Controller);
4042                   break;
4043                 }
4044               memcpy(&Controller->V1.LastBackgroundInitializationStatus,
4045                      Controller->V1.BackgroundInitializationStatus,
4046                      sizeof(DAC960_V1_BackgroundInitializationStatus_T));
4047               break;
4048             case DAC960_V1_BackgroundInitSuccessful:
4049               if (Controller->V1.BackgroundInitializationStatus->Status ==
4050                   DAC960_V1_BackgroundInitializationInProgress)
4051                 DAC960_Progress("Background Initialization "
4052                                 "Completed Successfully\n", Controller);
4053               Controller->V1.BackgroundInitializationStatus->Status =
4054                 DAC960_V1_BackgroundInitializationInvalid;
4055               break;
4056             case DAC960_V1_BackgroundInitAborted:
4057               if (Controller->V1.BackgroundInitializationStatus->Status ==
4058                   DAC960_V1_BackgroundInitializationInProgress)
4059                 DAC960_Progress("Background Initialization Aborted\n",
4060                                 Controller);
4061               Controller->V1.BackgroundInitializationStatus->Status =
4062                 DAC960_V1_BackgroundInitializationInvalid;
4063               break;
4064             case DAC960_V1_NoBackgroundInitInProgress:
4065               break;
4066             }
4067         } 
4068       else if (CommandOpcode == DAC960_V1_DCDB)
4069         {
4070            /*
4071              This is a bit ugly.
4072
4073              The InquiryStandardData and 
4074              the InquiryUntitSerialNumber information
4075              retrieval operations BOTH use the DAC960_V1_DCDB
4076              commands.  the test above can't distinguish between
4077              these two cases.
4078
4079              Instead, we rely on the order of code later in this
4080              function to ensure that DeviceInquiryInformation commands
4081              are submitted before DeviceSerialNumber commands.
4082            */
4083            if (Controller->V1.NeedDeviceInquiryInformation)
4084              {
4085                 DAC960_SCSI_Inquiry_T *InquiryStandardData =
4086                         &Controller->V1.InquiryStandardData
4087                                 [Controller->V1.DeviceStateChannel]
4088                                 [Controller->V1.DeviceStateTargetID];
4089                 if (CommandStatus != DAC960_V1_NormalCompletion)
4090                    {
4091                         memset(InquiryStandardData, 0,
4092                                 sizeof(DAC960_SCSI_Inquiry_T));
4093                         InquiryStandardData->PeripheralDeviceType = 0x1F;
4094                     }
4095                  else
4096                         memcpy(InquiryStandardData, 
4097                                 Controller->V1.NewInquiryStandardData,
4098                                 sizeof(DAC960_SCSI_Inquiry_T));
4099                  Controller->V1.NeedDeviceInquiryInformation = false;
4100               }
4101            else if (Controller->V1.NeedDeviceSerialNumberInformation) 
4102               {
4103                 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4104                   &Controller->V1.InquiryUnitSerialNumber
4105                                 [Controller->V1.DeviceStateChannel]
4106                                 [Controller->V1.DeviceStateTargetID];
4107                  if (CommandStatus != DAC960_V1_NormalCompletion)
4108                    {
4109                         memset(InquiryUnitSerialNumber, 0,
4110                                 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4111                         InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4112                     }
4113                   else
4114                         memcpy(InquiryUnitSerialNumber, 
4115                                 Controller->V1.NewInquiryUnitSerialNumber,
4116                                 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4117               Controller->V1.NeedDeviceSerialNumberInformation = false;
4118              }
4119         }
4120       /*
4121         Begin submitting new monitoring commands.
4122        */
4123       if (Controller->V1.NewEventLogSequenceNumber
4124           - Controller->V1.OldEventLogSequenceNumber > 0)
4125         {
4126           Command->V1.CommandMailbox.Type3E.CommandOpcode =
4127             DAC960_V1_PerformEventLogOperation;
4128           Command->V1.CommandMailbox.Type3E.OperationType =
4129             DAC960_V1_GetEventLogEntry;
4130           Command->V1.CommandMailbox.Type3E.OperationQualifier = 1;
4131           Command->V1.CommandMailbox.Type3E.SequenceNumber =
4132             Controller->V1.OldEventLogSequenceNumber;
4133           Command->V1.CommandMailbox.Type3E.BusAddress =
4134                 Controller->V1.EventLogEntryDMA;
4135           DAC960_QueueCommand(Command);
4136           return;
4137         }
4138       if (Controller->V1.NeedErrorTableInformation)
4139         {
4140           Controller->V1.NeedErrorTableInformation = false;
4141           Command->V1.CommandMailbox.Type3.CommandOpcode =
4142             DAC960_V1_GetErrorTable;
4143           Command->V1.CommandMailbox.Type3.BusAddress =
4144                 Controller->V1.NewErrorTableDMA;
4145           DAC960_QueueCommand(Command);
4146           return;
4147         }
4148       if (Controller->V1.NeedRebuildProgress &&
4149           Controller->V1.RebuildProgressFirst)
4150         {
4151           Controller->V1.NeedRebuildProgress = false;
4152           Command->V1.CommandMailbox.Type3.CommandOpcode =
4153             DAC960_V1_GetRebuildProgress;
4154           Command->V1.CommandMailbox.Type3.BusAddress =
4155             Controller->V1.RebuildProgressDMA;
4156           DAC960_QueueCommand(Command);
4157           return;
4158         }
4159       if (Controller->V1.NeedDeviceStateInformation)
4160         {
4161           if (Controller->V1.NeedDeviceInquiryInformation)
4162             {
4163               DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4164               dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4165
4166               dma_addr_t NewInquiryStandardDataDMA =
4167                 Controller->V1.NewInquiryStandardDataDMA;
4168
4169               Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4170               Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4171               DCDB->Channel = Controller->V1.DeviceStateChannel;
4172               DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4173               DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4174               DCDB->EarlyStatus = false;
4175               DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4176               DCDB->NoAutomaticRequestSense = false;
4177               DCDB->DisconnectPermitted = true;
4178               DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
4179               DCDB->BusAddress = NewInquiryStandardDataDMA;
4180               DCDB->CDBLength = 6;
4181               DCDB->TransferLengthHigh4 = 0;
4182               DCDB->SenseLength = sizeof(DCDB->SenseData);
4183               DCDB->CDB[0] = 0x12; /* INQUIRY */
4184               DCDB->CDB[1] = 0; /* EVPD = 0 */
4185               DCDB->CDB[2] = 0; /* Page Code */
4186               DCDB->CDB[3] = 0; /* Reserved */
4187               DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
4188               DCDB->CDB[5] = 0; /* Control */
4189               DAC960_QueueCommand(Command);
4190               return;
4191             }
4192           if (Controller->V1.NeedDeviceSerialNumberInformation)
4193             {
4194               DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4195               dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4196               dma_addr_t NewInquiryUnitSerialNumberDMA = 
4197                         Controller->V1.NewInquiryUnitSerialNumberDMA;
4198
4199               Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4200               Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4201               DCDB->Channel = Controller->V1.DeviceStateChannel;
4202               DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4203               DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4204               DCDB->EarlyStatus = false;
4205               DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4206               DCDB->NoAutomaticRequestSense = false;
4207               DCDB->DisconnectPermitted = true;
4208               DCDB->TransferLength =
4209                 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4210               DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
4211               DCDB->CDBLength = 6;
4212               DCDB->TransferLengthHigh4 = 0;
4213               DCDB->SenseLength = sizeof(DCDB->SenseData);
4214               DCDB->CDB[0] = 0x12; /* INQUIRY */
4215               DCDB->CDB[1] = 1; /* EVPD = 1 */
4216               DCDB->CDB[2] = 0x80; /* Page Code */
4217               DCDB->CDB[3] = 0; /* Reserved */
4218               DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4219               DCDB->CDB[5] = 0; /* Control */
4220               DAC960_QueueCommand(Command);
4221               return;
4222             }
4223           if (Controller->V1.StartDeviceStateScan)
4224             {
4225               Controller->V1.DeviceStateChannel = 0;
4226               Controller->V1.DeviceStateTargetID = 0;
4227               Controller->V1.StartDeviceStateScan = false;
4228             }
4229           else if (++Controller->V1.DeviceStateTargetID == Controller->Targets)
4230             {
4231               Controller->V1.DeviceStateChannel++;
4232               Controller->V1.DeviceStateTargetID = 0;
4233             }
4234           if (Controller->V1.DeviceStateChannel < Controller->Channels)
4235             {
4236               Controller->V1.NewDeviceState->DeviceState =
4237                 DAC960_V1_Device_Dead;
4238               Command->V1.CommandMailbox.Type3D.CommandOpcode =
4239                 DAC960_V1_GetDeviceState;
4240               Command->V1.CommandMailbox.Type3D.Channel =
4241                 Controller->V1.DeviceStateChannel;
4242               Command->V1.CommandMailbox.Type3D.TargetID =
4243                 Controller->V1.DeviceStateTargetID;
4244               Command->V1.CommandMailbox.Type3D.BusAddress =
4245                 Controller->V1.NewDeviceStateDMA;
4246               DAC960_QueueCommand(Command);
4247               return;
4248             }
4249           Controller->V1.NeedDeviceStateInformation = false;
4250         }
4251       if (Controller->V1.NeedLogicalDriveInformation)
4252         {
4253           Controller->V1.NeedLogicalDriveInformation = false;
4254           Command->V1.CommandMailbox.Type3.CommandOpcode =
4255             DAC960_V1_GetLogicalDriveInformation;
4256           Command->V1.CommandMailbox.Type3.BusAddress =
4257             Controller->V1.NewLogicalDriveInformationDMA;
4258           DAC960_QueueCommand(Command);
4259           return;
4260         }
4261       if (Controller->V1.NeedRebuildProgress)
4262         {
4263           Controller->V1.NeedRebuildProgress = false;
4264           Command->V1.CommandMailbox.Type3.CommandOpcode =
4265             DAC960_V1_GetRebuildProgress;
4266           Command->V1.CommandMailbox.Type3.BusAddress =
4267                 Controller->V1.RebuildProgressDMA;
4268           DAC960_QueueCommand(Command);
4269           return;
4270         }
4271       if (Controller->V1.NeedConsistencyCheckProgress)
4272         {
4273           Controller->V1.NeedConsistencyCheckProgress = false;
4274           Command->V1.CommandMailbox.Type3.CommandOpcode =
4275             DAC960_V1_RebuildStat;
4276           Command->V1.CommandMailbox.Type3.BusAddress =
4277             Controller->V1.RebuildProgressDMA;
4278           DAC960_QueueCommand(Command);
4279           return;
4280         }
4281       if (Controller->V1.NeedBackgroundInitializationStatus)
4282         {
4283           Controller->V1.NeedBackgroundInitializationStatus = false;
4284           Command->V1.CommandMailbox.Type3B.CommandOpcode =
4285             DAC960_V1_BackgroundInitializationControl;
4286           Command->V1.CommandMailbox.Type3B.CommandOpcode2 = 0x20;
4287           Command->V1.CommandMailbox.Type3B.BusAddress =
4288             Controller->V1.BackgroundInitializationStatusDMA;
4289           DAC960_QueueCommand(Command);
4290           return;
4291         }
4292       Controller->MonitoringTimerCount++;
4293       Controller->MonitoringTimer.expires =
4294         jiffies + DAC960_MonitoringTimerInterval;
4295         add_timer(&Controller->MonitoringTimer);
4296     }
4297   if (CommandType == DAC960_ImmediateCommand)
4298     {
4299       complete(Command->Completion);
4300       Command->Completion = NULL;
4301       return;
4302     }
4303   if (CommandType == DAC960_QueuedCommand)
4304     {
4305       DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand;
4306       KernelCommand->CommandStatus = Command->V1.CommandStatus;
4307       Command->V1.KernelCommand = NULL;
4308       if (CommandOpcode == DAC960_V1_DCDB)
4309         Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel]
4310                                           [KernelCommand->DCDB->TargetID] =
4311           false;
4312       DAC960_DeallocateCommand(Command);
4313       KernelCommand->CompletionFunction(KernelCommand);
4314       return;
4315     }
4316   /*
4317     Queue a Status Monitoring Command to the Controller using the just
4318     completed Command if one was deferred previously due to lack of a
4319     free Command when the Monitoring Timer Function was called.
4320   */
4321   if (Controller->MonitoringCommandDeferred)
4322     {
4323       Controller->MonitoringCommandDeferred = false;
4324       DAC960_V1_QueueMonitoringCommand(Command);
4325       return;
4326     }
4327   /*
4328     Deallocate the Command.
4329   */
4330   DAC960_DeallocateCommand(Command);
4331   /*
4332     Wake up any processes waiting on a free Command.
4333   */
4334   wake_up(&Controller->CommandWaitQueue);
4335 }
4336
4337
4338 /*
4339   DAC960_V2_ReadWriteError prints an appropriate error message for Command
4340   when an error occurs on a Read or Write operation.
4341 */
4342
4343 static void DAC960_V2_ReadWriteError(DAC960_Command_T *Command)
4344 {
4345   DAC960_Controller_T *Controller = Command->Controller;
4346   unsigned char *SenseErrors[] = { "NO SENSE", "RECOVERED ERROR",
4347                                    "NOT READY", "MEDIUM ERROR",
4348                                    "HARDWARE ERROR", "ILLEGAL REQUEST",
4349                                    "UNIT ATTENTION", "DATA PROTECT",
4350                                    "BLANK CHECK", "VENDOR-SPECIFIC",
4351                                    "COPY ABORTED", "ABORTED COMMAND",
4352                                    "EQUAL", "VOLUME OVERFLOW",
4353                                    "MISCOMPARE", "RESERVED" };
4354   unsigned char *CommandName = "UNKNOWN";
4355   switch (Command->CommandType)
4356     {
4357     case DAC960_ReadCommand:
4358     case DAC960_ReadRetryCommand:
4359       CommandName = "READ";
4360       break;
4361     case DAC960_WriteCommand:
4362     case DAC960_WriteRetryCommand:
4363       CommandName = "WRITE";
4364       break;
4365     case DAC960_MonitoringCommand:
4366     case DAC960_ImmediateCommand:
4367     case DAC960_QueuedCommand:
4368       break;
4369     }
4370   DAC960_Error("Error Condition %s on %s:\n", Controller,
4371                SenseErrors[Command->V2.RequestSense->SenseKey], CommandName);
4372   DAC960_Error("  /dev/rd/c%dd%d:   absolute blocks %u..%u\n",
4373                Controller, Controller->ControllerNumber,
4374                Command->LogicalDriveNumber, Command->BlockNumber,
4375                Command->BlockNumber + Command->BlockCount - 1);
4376 }
4377
4378
4379 /*
4380   DAC960_V2_ReportEvent prints an appropriate message when a Controller Event
4381   occurs.
4382 */
4383
4384 static void DAC960_V2_ReportEvent(DAC960_Controller_T *Controller,
4385                                   DAC960_V2_Event_T *Event)
4386 {
4387   DAC960_SCSI_RequestSense_T *RequestSense =
4388     (DAC960_SCSI_RequestSense_T *) &Event->RequestSenseData;
4389   unsigned char MessageBuffer[DAC960_LineBufferSize];
4390   static struct { int EventCode; unsigned char *EventMessage; } EventList[] =
4391     { /* Physical Device Events (0x0000 - 0x007F) */
4392       { 0x0001, "P Online" },
4393       { 0x0002, "P Standby" },
4394       { 0x0005, "P Automatic Rebuild Started" },
4395       { 0x0006, "P Manual Rebuild Started" },
4396       { 0x0007, "P Rebuild Completed" },
4397       { 0x0008, "P Rebuild Cancelled" },
4398       { 0x0009, "P Rebuild Failed for Unknown Reasons" },
4399       { 0x000A, "P Rebuild Failed due to New Physical Device" },
4400       { 0x000B, "P Rebuild Failed due to Logical Drive Failure" },
4401       { 0x000C, "S Offline" },
4402       { 0x000D, "P Found" },
4403       { 0x000E, "P Removed" },
4404       { 0x000F, "P Unconfigured" },
4405       { 0x0010, "P Expand Capacity Started" },
4406       { 0x0011, "P Expand Capacity Completed" },
4407       { 0x0012, "P Expand Capacity Failed" },
4408       { 0x0013, "P Command Timed Out" },
4409       { 0x0014, "P Command Aborted" },
4410       { 0x0015, "P Command Retried" },
4411       { 0x0016, "P Parity Error" },
4412       { 0x0017, "P Soft Error" },
4413       { 0x0018, "P Miscellaneous Error" },
4414       { 0x0019, "P Reset" },
4415       { 0x001A, "P Active Spare Found" },
4416       { 0x001B, "P Warm Spare Found" },
4417       { 0x001C, "S Sense Data Received" },
4418       { 0x001D, "P Initialization Started" },
4419       { 0x001E, "P Initialization Completed" },
4420       { 0x001F, "P Initialization Failed" },
4421       { 0x0020, "P Initialization Cancelled" },
4422       { 0x0021, "P Failed because Write Recovery Failed" },
4423       { 0x0022, "P Failed because SCSI Bus Reset Failed" },
4424       { 0x0023, "P Failed because of Double Check Condition" },
4425       { 0x0024, "P Failed because Device Cannot Be Accessed" },
4426       { 0x0025, "P Failed because of Gross Error on SCSI Processor" },
4427       { 0x0026, "P Failed because of Bad Tag from Device" },
4428       { 0x0027, "P Failed because of Command Timeout" },
4429       { 0x0028, "P Failed because of System Reset" },
4430       { 0x0029, "P Failed because of Busy Status or Parity Error" },
4431       { 0x002A, "P Failed because Host Set Device to Failed State" },
4432       { 0x002B, "P Failed because of Selection Timeout" },
4433       { 0x002C, "P Failed because of SCSI Bus Phase Error" },
4434       { 0x002D, "P Failed because Device Returned Unknown Status" },
4435       { 0x002E, "P Failed because Device Not Ready" },
4436       { 0x002F, "P Failed because Device Not Found at Startup" },
4437       { 0x0030, "P Failed because COD Write Operation Failed" },
4438       { 0x0031, "P Failed because BDT Write Operation Failed" },
4439       { 0x0039, "P Missing at Startup" },
4440       { 0x003A, "P Start Rebuild Failed due to Physical Drive Too Small" },
4441       { 0x003C, "P Temporarily Offline Device Automatically Made Online" },
4442       { 0x003D, "P Standby Rebuild Started" },
4443       /* Logical Device Events (0x0080 - 0x00FF) */
4444       { 0x0080, "M Consistency Check Started" },
4445       { 0x0081, "M Consistency Check Completed" },
4446       { 0x0082, "M Consistency Check Cancelled" },
4447       { 0x0083, "M Consistency Check Completed With Errors" },
4448       { 0x0084, "M Consistency Check Failed due to Logical Drive Failure" },
4449       { 0x0085, "M Consistency Check Failed due to Physical Device Failure" },
4450       { 0x0086, "L Offline" },
4451       { 0x0087, "L Critical" },
4452       { 0x0088, "L Online" },
4453       { 0x0089, "M Automatic Rebuild Started" },
4454       { 0x008A, "M Manual Rebuild Started" },
4455       { 0x008B, "M Rebuild Completed" },
4456       { 0x008C, "M Rebuild Cancelled" },
4457       { 0x008D, "M Rebuild Failed for Unknown Reasons" },
4458       { 0x008E, "M Rebuild Failed due to New Physical Device" },
4459       { 0x008F, "M Rebuild Failed due to Logical Drive Failure" },
4460       { 0x0090, "M Initialization Started" },
4461       { 0x0091, "M Initialization Completed" },
4462       { 0x0092, "M Initialization Cancelled" },
4463       { 0x0093, "M Initialization Failed" },
4464       { 0x0094, "L Found" },
4465       { 0x0095, "L Deleted" },
4466       { 0x0096, "M Expand Capacity Started" },
4467       { 0x0097, "M Expand Capacity Completed" },
4468       { 0x0098, "M Expand Capacity Failed" },
4469       { 0x0099, "L Bad Block Found" },
4470       { 0x009A, "L Size Changed" },
4471       { 0x009B, "L Type Changed" },
4472       { 0x009C, "L Bad Data Block Found" },
4473       { 0x009E, "L Read of Data Block in BDT" },
4474       { 0x009F, "L Write Back Data for Disk Block Lost" },
4475       { 0x00A0, "L Temporarily Offline RAID-5/3 Drive Made Online" },
4476       { 0x00A1, "L Temporarily Offline RAID-6/1/0/7 Drive Made Online" },
4477       { 0x00A2, "L Standby Rebuild Started" },
4478       /* Fault Management Events (0x0100 - 0x017F) */
4479       { 0x0140, "E Fan %d Failed" },
4480       { 0x0141, "E Fan %d OK" },
4481       { 0x0142, "E Fan %d Not Present" },
4482       { 0x0143, "E Power Supply %d Failed" },
4483       { 0x0144, "E Power Supply %d OK" },
4484       { 0x0145, "E Power Supply %d Not Present" },
4485       { 0x0146, "E Temperature Sensor %d Temperature Exceeds Safe Limit" },
4486       { 0x0147, "E Temperature Sensor %d Temperature Exceeds Working Limit" },
4487       { 0x0148, "E Temperature Sensor %d Temperature Normal" },
4488       { 0x0149, "E Temperature Sensor %d Not Present" },
4489       { 0x014A, "E Enclosure Management Unit %d Access Critical" },
4490       { 0x014B, "E Enclosure Management Unit %d Access OK" },
4491       { 0x014C, "E Enclosure Management Unit %d Access Offline" },
4492       /* Controller Events (0x0180 - 0x01FF) */
4493       { 0x0181, "C Cache Write Back Error" },
4494       { 0x0188, "C Battery Backup Unit Found" },
4495       { 0x0189, "C Battery Backup Unit Charge Level Low" },
4496       { 0x018A, "C Battery Backup Unit Charge Level OK" },
4497       { 0x0193, "C Installation Aborted" },
4498       { 0x0195, "C Battery Backup Unit Physically Removed" },
4499       { 0x0196, "C Memory Error During Warm Boot" },
4500       { 0x019E, "C Memory Soft ECC Error Corrected" },
4501       { 0x019F, "C Memory Hard ECC Error Corrected" },
4502       { 0x01A2, "C Battery Backup Unit Failed" },
4503       { 0x01AB, "C Mirror Race Recovery Failed" },
4504       { 0x01AC, "C Mirror Race on Critical Drive" },
4505       /* Controller Internal Processor Events */
4506       { 0x0380, "C Internal Controller Hung" },
4507       { 0x0381, "C Internal Controller Firmware Breakpoint" },
4508       { 0x0390, "C Internal Controller i960 Processor Specific Error" },
4509       { 0x03A0, "C Internal Controller StrongARM Processor Specific Error" },
4510       { 0, "" } };
4511   int EventListIndex = 0, EventCode;
4512   unsigned char EventType, *EventMessage;
4513   if (Event->EventCode == 0x1C &&
4514       RequestSense->SenseKey == DAC960_SenseKey_VendorSpecific &&
4515       (RequestSense->AdditionalSenseCode == 0x80 ||
4516        RequestSense->AdditionalSenseCode == 0x81))
4517     Event->EventCode = ((RequestSense->AdditionalSenseCode - 0x80) << 8) |
4518                        RequestSense->AdditionalSenseCodeQualifier;
4519   while (true)
4520     {
4521       EventCode = EventList[EventListIndex].EventCode;
4522       if (EventCode == Event->EventCode || EventCode == 0) break;
4523       EventListIndex++;
4524     }
4525   EventType = EventList[EventListIndex].EventMessage[0];
4526   EventMessage = &EventList[EventListIndex].EventMessage[2];
4527   if (EventCode == 0)
4528     {
4529       DAC960_Critical("Unknown Controller Event Code %04X\n",
4530                       Controller, Event->EventCode);
4531       return;
4532     }
4533   switch (EventType)
4534     {
4535     case 'P':
4536       DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4537                       Event->Channel, Event->TargetID, EventMessage);
4538       break;
4539     case 'L':
4540       DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4541                       Event->LogicalUnit, Controller->ControllerNumber,
4542                       Event->LogicalUnit, EventMessage);
4543       break;
4544     case 'M':
4545       DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4546                       Event->LogicalUnit, Controller->ControllerNumber,
4547                       Event->LogicalUnit, EventMessage);
4548       break;
4549     case 'S':
4550       if (RequestSense->SenseKey == DAC960_SenseKey_NoSense ||
4551           (RequestSense->SenseKey == DAC960_SenseKey_NotReady &&
4552            RequestSense->AdditionalSenseCode == 0x04 &&
4553            (RequestSense->AdditionalSenseCodeQualifier == 0x01 ||
4554             RequestSense->AdditionalSenseCodeQualifier == 0x02)))
4555         break;
4556       DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4557                       Event->Channel, Event->TargetID, EventMessage);
4558       DAC960_Critical("Physical Device %d:%d Request Sense: "
4559                       "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
4560                       Controller,
4561                       Event->Channel,
4562                       Event->TargetID,
4563                       RequestSense->SenseKey,
4564                       RequestSense->AdditionalSenseCode,
4565                       RequestSense->AdditionalSenseCodeQualifier);
4566       DAC960_Critical("Physical Device %d:%d Request Sense: "
4567                       "Information = %02X%02X%02X%02X "
4568                       "%02X%02X%02X%02X\n",
4569                       Controller,
4570                       Event->Channel,
4571                       Event->TargetID,
4572                       RequestSense->Information[0],
4573                       RequestSense->Information[1],
4574                       RequestSense->Information[2],
4575                       RequestSense->Information[3],
4576                       RequestSense->CommandSpecificInformation[0],
4577                       RequestSense->CommandSpecificInformation[1],
4578                       RequestSense->CommandSpecificInformation[2],
4579                       RequestSense->CommandSpecificInformation[3]);
4580       break;
4581     case 'E':
4582       if (Controller->SuppressEnclosureMessages) break;
4583       sprintf(MessageBuffer, EventMessage, Event->LogicalUnit);
4584       DAC960_Critical("Enclosure %d %s\n", Controller,
4585                       Event->TargetID, MessageBuffer);
4586       break;
4587     case 'C':
4588       DAC960_Critical("Controller %s\n", Controller, EventMessage);
4589       break;
4590     default:
4591       DAC960_Critical("Unknown Controller Event Code %04X\n",
4592                       Controller, Event->EventCode);
4593       break;
4594     }
4595 }
4596
4597
4598 /*
4599   DAC960_V2_ReportProgress prints an appropriate progress message for
4600   Logical Device Long Operations.
4601 */
4602
4603 static void DAC960_V2_ReportProgress(DAC960_Controller_T *Controller,
4604                                      unsigned char *MessageString,
4605                                      unsigned int LogicalDeviceNumber,
4606                                      unsigned long BlocksCompleted,
4607                                      unsigned long LogicalDeviceSize)
4608 {
4609   Controller->EphemeralProgressMessage = true;
4610   DAC960_Progress("%s in Progress: Logical Drive %d (/dev/rd/c%dd%d) "
4611                   "%d%% completed\n", Controller,
4612                   MessageString,
4613                   LogicalDeviceNumber,
4614                   Controller->ControllerNumber,
4615                   LogicalDeviceNumber,
4616                   (100 * (BlocksCompleted >> 7)) / (LogicalDeviceSize >> 7));
4617   Controller->EphemeralProgressMessage = false;
4618 }
4619
4620
4621 /*
4622   DAC960_V2_ProcessCompletedCommand performs completion processing for Command
4623   for DAC960 V2 Firmware Controllers.
4624 */
4625
4626 static void DAC960_V2_ProcessCompletedCommand(DAC960_Command_T *Command)
4627 {
4628   DAC960_Controller_T *Controller = Command->Controller;
4629   DAC960_CommandType_T CommandType = Command->CommandType;
4630   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
4631   DAC960_V2_IOCTL_Opcode_T IOCTLOpcode = CommandMailbox->Common.IOCTL_Opcode;
4632   DAC960_V2_CommandOpcode_T CommandOpcode = CommandMailbox->SCSI_10.CommandOpcode;
4633   DAC960_V2_CommandStatus_T CommandStatus = Command->V2.CommandStatus;
4634
4635   if (CommandType == DAC960_ReadCommand ||
4636       CommandType == DAC960_WriteCommand)
4637     {
4638
4639 #ifdef FORCE_RETRY_DEBUG
4640       CommandStatus = DAC960_V2_AbormalCompletion;
4641 #endif
4642       Command->V2.RequestSense->SenseKey = DAC960_SenseKey_MediumError;
4643
4644       if (CommandStatus == DAC960_V2_NormalCompletion) {
4645
4646                 if (!DAC960_ProcessCompletedRequest(Command, true))
4647                         BUG();
4648
4649       } else if (Command->V2.RequestSense->SenseKey == DAC960_SenseKey_MediumError)
4650         {
4651           /*
4652            * break the command down into pieces and resubmit each
4653            * piece, hoping that some of them will succeed.
4654            */
4655            DAC960_queue_partial_rw(Command);
4656            return;
4657         }
4658       else
4659         {
4660           if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4661             DAC960_V2_ReadWriteError(Command);
4662           /*
4663             Perform completion processing for all buffers in this I/O Request.
4664           */
4665           (void)DAC960_ProcessCompletedRequest(Command, false);
4666         }
4667     }
4668   else if (CommandType == DAC960_ReadRetryCommand ||
4669            CommandType == DAC960_WriteRetryCommand)
4670     {
4671       bool normal_completion;
4672
4673 #ifdef FORCE_RETRY_FAILURE_DEBUG
4674       static int retry_count = 1;
4675 #endif
4676       /*
4677         Perform completion processing for the portion that was
4678         retried, and submit the next portion, if any.
4679       */
4680       normal_completion = true;
4681       if (CommandStatus != DAC960_V2_NormalCompletion) {
4682         normal_completion = false;
4683         if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4684             DAC960_V2_ReadWriteError(Command);
4685       }
4686
4687 #ifdef FORCE_RETRY_FAILURE_DEBUG
4688       if (!(++retry_count % 10000)) {
4689               printk("V2 error retry failure test\n");
4690               normal_completion = false;
4691               DAC960_V2_ReadWriteError(Command);
4692       }
4693 #endif
4694
4695       if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
4696                 DAC960_queue_partial_rw(Command);
4697                 return;
4698       }
4699     }
4700   else if (CommandType == DAC960_MonitoringCommand)
4701     {
4702       if (Controller->ShutdownMonitoringTimer)
4703               return;
4704       if (IOCTLOpcode == DAC960_V2_GetControllerInfo)
4705         {
4706           DAC960_V2_ControllerInfo_T *NewControllerInfo =
4707             Controller->V2.NewControllerInformation;
4708           DAC960_V2_ControllerInfo_T *ControllerInfo =
4709             &Controller->V2.ControllerInformation;
4710           Controller->LogicalDriveCount =
4711             NewControllerInfo->LogicalDevicesPresent;
4712           Controller->V2.NeedLogicalDeviceInformation = true;
4713           Controller->V2.NeedPhysicalDeviceInformation = true;
4714           Controller->V2.StartLogicalDeviceInformationScan = true;
4715           Controller->V2.StartPhysicalDeviceInformationScan = true;
4716           Controller->MonitoringAlertMode =
4717             (NewControllerInfo->LogicalDevicesCritical > 0 ||
4718              NewControllerInfo->LogicalDevicesOffline > 0 ||
4719              NewControllerInfo->PhysicalDisksCritical > 0 ||
4720              NewControllerInfo->PhysicalDisksOffline > 0);
4721           memcpy(ControllerInfo, NewControllerInfo,
4722                  sizeof(DAC960_V2_ControllerInfo_T));
4723         }
4724       else if (IOCTLOpcode == DAC960_V2_GetEvent)
4725         {
4726           if (CommandStatus == DAC960_V2_NormalCompletion) {
4727             DAC960_V2_ReportEvent(Controller, Controller->V2.Event);
4728           }
4729           Controller->V2.NextEventSequenceNumber++;
4730         }
4731       else if (IOCTLOpcode == DAC960_V2_GetPhysicalDeviceInfoValid &&
4732                CommandStatus == DAC960_V2_NormalCompletion)
4733         {
4734           DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
4735             Controller->V2.NewPhysicalDeviceInformation;
4736           unsigned int PhysicalDeviceIndex = Controller->V2.PhysicalDeviceIndex;
4737           DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4738             Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4739           DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4740             Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4741           unsigned int DeviceIndex;
4742           while (PhysicalDeviceInfo != NULL &&
4743                  (NewPhysicalDeviceInfo->Channel >
4744                   PhysicalDeviceInfo->Channel ||
4745                   (NewPhysicalDeviceInfo->Channel ==
4746                    PhysicalDeviceInfo->Channel &&
4747                    (NewPhysicalDeviceInfo->TargetID >
4748                     PhysicalDeviceInfo->TargetID ||
4749                    (NewPhysicalDeviceInfo->TargetID ==
4750                     PhysicalDeviceInfo->TargetID &&
4751                     NewPhysicalDeviceInfo->LogicalUnit >
4752                     PhysicalDeviceInfo->LogicalUnit)))))
4753             {
4754               DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4755                               Controller,
4756                               PhysicalDeviceInfo->Channel,
4757                               PhysicalDeviceInfo->TargetID);
4758               Controller->V2.PhysicalDeviceInformation
4759                              [PhysicalDeviceIndex] = NULL;
4760               Controller->V2.InquiryUnitSerialNumber
4761                              [PhysicalDeviceIndex] = NULL;
4762               kfree(PhysicalDeviceInfo);
4763               kfree(InquiryUnitSerialNumber);
4764               for (DeviceIndex = PhysicalDeviceIndex;
4765                    DeviceIndex < DAC960_V2_MaxPhysicalDevices - 1;
4766                    DeviceIndex++)
4767                 {
4768                   Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4769                     Controller->V2.PhysicalDeviceInformation[DeviceIndex+1];
4770                   Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4771                     Controller->V2.InquiryUnitSerialNumber[DeviceIndex+1];
4772                 }
4773               Controller->V2.PhysicalDeviceInformation
4774                              [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4775               Controller->V2.InquiryUnitSerialNumber
4776                              [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4777               PhysicalDeviceInfo =
4778                 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4779               InquiryUnitSerialNumber =
4780                 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4781             }
4782           if (PhysicalDeviceInfo == NULL ||
4783               (NewPhysicalDeviceInfo->Channel !=
4784                PhysicalDeviceInfo->Channel) ||
4785               (NewPhysicalDeviceInfo->TargetID !=
4786                PhysicalDeviceInfo->TargetID) ||
4787               (NewPhysicalDeviceInfo->LogicalUnit !=
4788                PhysicalDeviceInfo->LogicalUnit))
4789             {
4790               PhysicalDeviceInfo =
4791                 kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
4792               InquiryUnitSerialNumber =
4793                   kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
4794                           GFP_ATOMIC);
4795               if (InquiryUnitSerialNumber == NULL ||
4796                   PhysicalDeviceInfo == NULL)
4797                 {
4798                   kfree(InquiryUnitSerialNumber);
4799                   InquiryUnitSerialNumber = NULL;
4800                   kfree(PhysicalDeviceInfo);
4801                   PhysicalDeviceInfo = NULL;
4802                 }
4803               DAC960_Critical("Physical Device %d:%d Now Exists%s\n",
4804                               Controller,
4805                               NewPhysicalDeviceInfo->Channel,
4806                               NewPhysicalDeviceInfo->TargetID,
4807                               (PhysicalDeviceInfo != NULL
4808                                ? "" : " - Allocation Failed"));
4809               if (PhysicalDeviceInfo != NULL)
4810                 {
4811                   memset(PhysicalDeviceInfo, 0,
4812                          sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4813                   PhysicalDeviceInfo->PhysicalDeviceState =
4814                     DAC960_V2_Device_InvalidState;
4815                   memset(InquiryUnitSerialNumber, 0,
4816                          sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4817                   InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4818                   for (DeviceIndex = DAC960_V2_MaxPhysicalDevices - 1;
4819                        DeviceIndex > PhysicalDeviceIndex;
4820                        DeviceIndex--)
4821                     {
4822                       Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4823                         Controller->V2.PhysicalDeviceInformation[DeviceIndex-1];
4824                       Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4825                         Controller->V2.InquiryUnitSerialNumber[DeviceIndex-1];
4826                     }
4827                   Controller->V2.PhysicalDeviceInformation
4828                                  [PhysicalDeviceIndex] =
4829                     PhysicalDeviceInfo;
4830                   Controller->V2.InquiryUnitSerialNumber
4831                                  [PhysicalDeviceIndex] =
4832                     InquiryUnitSerialNumber;
4833                   Controller->V2.NeedDeviceSerialNumberInformation = true;
4834                 }
4835             }
4836           if (PhysicalDeviceInfo != NULL)
4837             {
4838               if (NewPhysicalDeviceInfo->PhysicalDeviceState !=
4839                   PhysicalDeviceInfo->PhysicalDeviceState)
4840                 DAC960_Critical(
4841                   "Physical Device %d:%d is now %s\n", Controller,
4842                   NewPhysicalDeviceInfo->Channel,
4843                   NewPhysicalDeviceInfo->TargetID,
4844                   (NewPhysicalDeviceInfo->PhysicalDeviceState
4845                    == DAC960_V2_Device_Online
4846                    ? "ONLINE"
4847                    : NewPhysicalDeviceInfo->PhysicalDeviceState
4848                      == DAC960_V2_Device_Rebuild
4849                      ? "REBUILD"
4850                      : NewPhysicalDeviceInfo->PhysicalDeviceState
4851                        == DAC960_V2_Device_Missing
4852                        ? "MISSING"
4853                        : NewPhysicalDeviceInfo->PhysicalDeviceState
4854                          == DAC960_V2_Device_Critical
4855                          ? "CRITICAL"
4856                          : NewPhysicalDeviceInfo->PhysicalDeviceState
4857                            == DAC960_V2_Device_Dead
4858                            ? "DEAD"
4859                            : NewPhysicalDeviceInfo->PhysicalDeviceState
4860                              == DAC960_V2_Device_SuspectedDead
4861                              ? "SUSPECTED-DEAD"
4862                              : NewPhysicalDeviceInfo->PhysicalDeviceState
4863                                == DAC960_V2_Device_CommandedOffline
4864                                ? "COMMANDED-OFFLINE"
4865                                : NewPhysicalDeviceInfo->PhysicalDeviceState
4866                                  == DAC960_V2_Device_Standby
4867                                  ? "STANDBY" : "UNKNOWN"));
4868               if ((NewPhysicalDeviceInfo->ParityErrors !=
4869                    PhysicalDeviceInfo->ParityErrors) ||
4870                   (NewPhysicalDeviceInfo->SoftErrors !=
4871                    PhysicalDeviceInfo->SoftErrors) ||
4872                   (NewPhysicalDeviceInfo->HardErrors !=
4873                    PhysicalDeviceInfo->HardErrors) ||
4874                   (NewPhysicalDeviceInfo->MiscellaneousErrors !=
4875                    PhysicalDeviceInfo->MiscellaneousErrors) ||
4876                   (NewPhysicalDeviceInfo->CommandTimeouts !=
4877                    PhysicalDeviceInfo->CommandTimeouts) ||
4878                   (NewPhysicalDeviceInfo->Retries !=
4879                    PhysicalDeviceInfo->Retries) ||
4880                   (NewPhysicalDeviceInfo->Aborts !=
4881                    PhysicalDeviceInfo->Aborts) ||
4882                   (NewPhysicalDeviceInfo->PredictedFailuresDetected !=
4883                    PhysicalDeviceInfo->PredictedFailuresDetected))
4884                 {
4885                   DAC960_Critical("Physical Device %d:%d Errors: "
4886                                   "Parity = %d, Soft = %d, "
4887                                   "Hard = %d, Misc = %d\n",
4888                                   Controller,
4889                                   NewPhysicalDeviceInfo->Channel,
4890                                   NewPhysicalDeviceInfo->TargetID,
4891                                   NewPhysicalDeviceInfo->ParityErrors,
4892                                   NewPhysicalDeviceInfo->SoftErrors,
4893                                   NewPhysicalDeviceInfo->HardErrors,
4894                                   NewPhysicalDeviceInfo->MiscellaneousErrors);
4895                   DAC960_Critical("Physical Device %d:%d Errors: "
4896                                   "Timeouts = %d, Retries = %d, "
4897                                   "Aborts = %d, Predicted = %d\n",
4898                                   Controller,
4899                                   NewPhysicalDeviceInfo->Channel,
4900                                   NewPhysicalDeviceInfo->TargetID,
4901                                   NewPhysicalDeviceInfo->CommandTimeouts,
4902                                   NewPhysicalDeviceInfo->Retries,
4903                                   NewPhysicalDeviceInfo->Aborts,
4904                                   NewPhysicalDeviceInfo
4905                                   ->PredictedFailuresDetected);
4906                 }
4907               if ((PhysicalDeviceInfo->PhysicalDeviceState
4908                    == DAC960_V2_Device_Dead ||
4909                    PhysicalDeviceInfo->PhysicalDeviceState
4910                    == DAC960_V2_Device_InvalidState) &&
4911                   NewPhysicalDeviceInfo->PhysicalDeviceState
4912                   != DAC960_V2_Device_Dead)
4913                 Controller->V2.NeedDeviceSerialNumberInformation = true;
4914               memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
4915                      sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4916             }
4917           NewPhysicalDeviceInfo->LogicalUnit++;
4918           Controller->V2.PhysicalDeviceIndex++;
4919         }
4920       else if (IOCTLOpcode == DAC960_V2_GetPhysicalDeviceInfoValid)
4921         {
4922           unsigned int DeviceIndex;
4923           for (DeviceIndex = Controller->V2.PhysicalDeviceIndex;
4924                DeviceIndex < DAC960_V2_MaxPhysicalDevices;
4925                DeviceIndex++)
4926             {
4927               DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4928                 Controller->V2.PhysicalDeviceInformation[DeviceIndex];
4929               DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4930                 Controller->V2.InquiryUnitSerialNumber[DeviceIndex];
4931               if (PhysicalDeviceInfo == NULL) break;
4932               DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4933                               Controller,
4934                               PhysicalDeviceInfo->Channel,
4935                               PhysicalDeviceInfo->TargetID);
4936               Controller->V2.PhysicalDeviceInformation[DeviceIndex] = NULL;
4937               Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = NULL;
4938               kfree(PhysicalDeviceInfo);
4939               kfree(InquiryUnitSerialNumber);
4940             }
4941           Controller->V2.NeedPhysicalDeviceInformation = false;
4942         }
4943       else if (IOCTLOpcode == DAC960_V2_GetLogicalDeviceInfoValid &&
4944                CommandStatus == DAC960_V2_NormalCompletion)
4945         {
4946           DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
4947             Controller->V2.NewLogicalDeviceInformation;
4948           unsigned short LogicalDeviceNumber =
4949             NewLogicalDeviceInfo->LogicalDeviceNumber;
4950           DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
4951             Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber];
4952           if (LogicalDeviceInfo == NULL)
4953             {
4954               DAC960_V2_PhysicalDevice_T PhysicalDevice;
4955               PhysicalDevice.Controller = 0;
4956               PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
4957               PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
4958               PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
4959               Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
4960                 PhysicalDevice;
4961               LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
4962                                           GFP_ATOMIC);
4963               Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
4964                 LogicalDeviceInfo;
4965               DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4966                               "Now Exists%s\n", Controller,
4967                               LogicalDeviceNumber,
4968                               Controller->ControllerNumber,
4969                               LogicalDeviceNumber,
4970                               (LogicalDeviceInfo != NULL
4971                                ? "" : " - Allocation Failed"));
4972               if (LogicalDeviceInfo != NULL)
4973                 {
4974                   memset(LogicalDeviceInfo, 0,
4975                          sizeof(DAC960_V2_LogicalDeviceInfo_T));
4976                   DAC960_ComputeGenericDiskInfo(Controller);
4977                 }
4978             }
4979           if (LogicalDeviceInfo != NULL)
4980             {
4981               unsigned long LogicalDeviceSize =
4982                 NewLogicalDeviceInfo->ConfigurableDeviceSize;
4983               if (NewLogicalDeviceInfo->LogicalDeviceState !=
4984                   LogicalDeviceInfo->LogicalDeviceState)
4985                 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4986                                 "is now %s\n", Controller,
4987                                 LogicalDeviceNumber,
4988                                 Controller->ControllerNumber,
4989                                 LogicalDeviceNumber,
4990                                 (NewLogicalDeviceInfo->LogicalDeviceState
4991                                  == DAC960_V2_LogicalDevice_Online
4992                                  ? "ONLINE"
4993                                  : NewLogicalDeviceInfo->LogicalDeviceState
4994                                    == DAC960_V2_LogicalDevice_Critical
4995                                    ? "CRITICAL" : "OFFLINE"));
4996               if ((NewLogicalDeviceInfo->SoftErrors !=
4997                    LogicalDeviceInfo->SoftErrors) ||
4998                   (NewLogicalDeviceInfo->CommandsFailed !=
4999                    LogicalDeviceInfo->CommandsFailed) ||
5000                   (NewLogicalDeviceInfo->DeferredWriteErrors !=
5001                    LogicalDeviceInfo->DeferredWriteErrors))
5002                 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) Errors: "
5003                                 "Soft = %d, Failed = %d, Deferred Write = %d\n",
5004                                 Controller, LogicalDeviceNumber,
5005                                 Controller->ControllerNumber,
5006                                 LogicalDeviceNumber,
5007                                 NewLogicalDeviceInfo->SoftErrors,
5008                                 NewLogicalDeviceInfo->CommandsFailed,
5009                                 NewLogicalDeviceInfo->DeferredWriteErrors);
5010               if (NewLogicalDeviceInfo->ConsistencyCheckInProgress)
5011                 DAC960_V2_ReportProgress(Controller,
5012                                          "Consistency Check",
5013                                          LogicalDeviceNumber,
5014                                          NewLogicalDeviceInfo
5015                                          ->ConsistencyCheckBlockNumber,
5016                                          LogicalDeviceSize);
5017               else if (NewLogicalDeviceInfo->RebuildInProgress)
5018                 DAC960_V2_ReportProgress(Controller,
5019                                          "Rebuild",
5020                                          LogicalDeviceNumber,
5021                                          NewLogicalDeviceInfo
5022                                          ->RebuildBlockNumber,
5023                                          LogicalDeviceSize);
5024               else if (NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5025                 DAC960_V2_ReportProgress(Controller,
5026                                          "Background Initialization",
5027                                          LogicalDeviceNumber,
5028                                          NewLogicalDeviceInfo
5029                                          ->BackgroundInitializationBlockNumber,
5030                                          LogicalDeviceSize);
5031               else if (NewLogicalDeviceInfo->ForegroundInitializationInProgress)
5032                 DAC960_V2_ReportProgress(Controller,
5033                                          "Foreground Initialization",
5034                                          LogicalDeviceNumber,
5035                                          NewLogicalDeviceInfo
5036                                          ->ForegroundInitializationBlockNumber,
5037                                          LogicalDeviceSize);
5038               else if (NewLogicalDeviceInfo->DataMigrationInProgress)
5039                 DAC960_V2_ReportProgress(Controller,
5040                                          "Data Migration",
5041                                          LogicalDeviceNumber,
5042                                          NewLogicalDeviceInfo
5043                                          ->DataMigrationBlockNumber,
5044                                          LogicalDeviceSize);
5045               else if (NewLogicalDeviceInfo->PatrolOperationInProgress)
5046                 DAC960_V2_ReportProgress(Controller,
5047                                          "Patrol Operation",
5048                                          LogicalDeviceNumber,
5049                                          NewLogicalDeviceInfo
5050                                          ->PatrolOperationBlockNumber,
5051                                          LogicalDeviceSize);
5052               if (LogicalDeviceInfo->BackgroundInitializationInProgress &&
5053                   !NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5054                 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) "
5055                                 "Background Initialization %s\n",
5056                                 Controller,
5057                                 LogicalDeviceNumber,
5058                                 Controller->ControllerNumber,
5059                                 LogicalDeviceNumber,
5060                                 (NewLogicalDeviceInfo->LogicalDeviceControl
5061                                                       .LogicalDeviceInitialized
5062                                  ? "Completed" : "Failed"));
5063               memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
5064                      sizeof(DAC960_V2_LogicalDeviceInfo_T));
5065             }
5066           Controller->V2.LogicalDriveFoundDuringScan
5067                          [LogicalDeviceNumber] = true;
5068           NewLogicalDeviceInfo->LogicalDeviceNumber++;
5069         }
5070       else if (IOCTLOpcode == DAC960_V2_GetLogicalDeviceInfoValid)
5071         {
5072           int LogicalDriveNumber;
5073           for (LogicalDriveNumber = 0;
5074                LogicalDriveNumber < DAC960_MaxLogicalDrives;
5075                LogicalDriveNumber++)
5076             {
5077               DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5078                 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5079               if (LogicalDeviceInfo == NULL ||
5080                   Controller->V2.LogicalDriveFoundDuringScan
5081                                  [LogicalDriveNumber])
5082                 continue;
5083               DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
5084                               "No Longer Exists\n", Controller,
5085                               LogicalDriveNumber,
5086                               Controller->ControllerNumber,
5087                               LogicalDriveNumber);
5088               Controller->V2.LogicalDeviceInformation
5089                              [LogicalDriveNumber] = NULL;
5090               kfree(LogicalDeviceInfo);
5091               Controller->LogicalDriveInitiallyAccessible
5092                           [LogicalDriveNumber] = false;
5093               DAC960_ComputeGenericDiskInfo(Controller);
5094             }
5095           Controller->V2.NeedLogicalDeviceInformation = false;
5096         }
5097       else if (CommandOpcode == DAC960_V2_SCSI_10_Passthru)
5098         {
5099             DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5100                 Controller->V2.InquiryUnitSerialNumber[Controller->V2.PhysicalDeviceIndex - 1];
5101
5102             if (CommandStatus != DAC960_V2_NormalCompletion) {
5103                 memset(InquiryUnitSerialNumber,
5104                         0, sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5105                 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5106             } else
5107                 memcpy(InquiryUnitSerialNumber,
5108                         Controller->V2.NewInquiryUnitSerialNumber,
5109                         sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5110
5111              Controller->V2.NeedDeviceSerialNumberInformation = false;
5112         }
5113
5114       if (Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5115           - Controller->V2.NextEventSequenceNumber > 0)
5116         {
5117           CommandMailbox->GetEvent.CommandOpcode = DAC960_V2_IOCTL;
5118           CommandMailbox->GetEvent.DataTransferSize = sizeof(DAC960_V2_Event_T);
5119           CommandMailbox->GetEvent.EventSequenceNumberHigh16 =
5120             Controller->V2.NextEventSequenceNumber >> 16;
5121           CommandMailbox->GetEvent.ControllerNumber = 0;
5122           CommandMailbox->GetEvent.IOCTL_Opcode =
5123             DAC960_V2_GetEvent;
5124           CommandMailbox->GetEvent.EventSequenceNumberLow16 =
5125             Controller->V2.NextEventSequenceNumber & 0xFFFF;
5126           CommandMailbox->GetEvent.DataTransferMemoryAddress
5127                                   .ScatterGatherSegments[0]
5128                                   .SegmentDataPointer =
5129             Controller->V2.EventDMA;
5130           CommandMailbox->GetEvent.DataTransferMemoryAddress
5131                                   .ScatterGatherSegments[0]
5132                                   .SegmentByteCount =
5133             CommandMailbox->GetEvent.DataTransferSize;
5134           DAC960_QueueCommand(Command);
5135           return;
5136         }
5137       if (Controller->V2.NeedPhysicalDeviceInformation)
5138         {
5139           if (Controller->V2.NeedDeviceSerialNumberInformation)
5140             {
5141               DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5142                 Controller->V2.NewInquiryUnitSerialNumber;
5143               InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5144
5145               DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
5146                         Controller->V2.NewPhysicalDeviceInformation->Channel,
5147                         Controller->V2.NewPhysicalDeviceInformation->TargetID,
5148                 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit - 1);
5149
5150
5151               DAC960_QueueCommand(Command);
5152               return;
5153             }
5154           if (Controller->V2.StartPhysicalDeviceInformationScan)
5155             {
5156               Controller->V2.PhysicalDeviceIndex = 0;
5157               Controller->V2.NewPhysicalDeviceInformation->Channel = 0;
5158               Controller->V2.NewPhysicalDeviceInformation->TargetID = 0;
5159               Controller->V2.NewPhysicalDeviceInformation->LogicalUnit = 0;
5160               Controller->V2.StartPhysicalDeviceInformationScan = false;
5161             }
5162           CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5163           CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
5164             sizeof(DAC960_V2_PhysicalDeviceInfo_T);
5165           CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit =
5166             Controller->V2.NewPhysicalDeviceInformation->LogicalUnit;
5167           CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID =
5168             Controller->V2.NewPhysicalDeviceInformation->TargetID;
5169           CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel =
5170             Controller->V2.NewPhysicalDeviceInformation->Channel;
5171           CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
5172             DAC960_V2_GetPhysicalDeviceInfoValid;
5173           CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5174                                             .ScatterGatherSegments[0]
5175                                             .SegmentDataPointer =
5176             Controller->V2.NewPhysicalDeviceInformationDMA;
5177           CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5178                                             .ScatterGatherSegments[0]
5179                                             .SegmentByteCount =
5180             CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
5181           DAC960_QueueCommand(Command);
5182           return;
5183         }
5184       if (Controller->V2.NeedLogicalDeviceInformation)
5185         {
5186           if (Controller->V2.StartLogicalDeviceInformationScan)
5187             {
5188               int LogicalDriveNumber;
5189               for (LogicalDriveNumber = 0;
5190                    LogicalDriveNumber < DAC960_MaxLogicalDrives;
5191                    LogicalDriveNumber++)
5192                 Controller->V2.LogicalDriveFoundDuringScan
5193                                [LogicalDriveNumber] = false;
5194               Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber = 0;
5195               Controller->V2.StartLogicalDeviceInformationScan = false;
5196             }
5197           CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5198           CommandMailbox->LogicalDeviceInfo.DataTransferSize =
5199             sizeof(DAC960_V2_LogicalDeviceInfo_T);
5200           CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
5201             Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber;
5202           CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
5203             DAC960_V2_GetLogicalDeviceInfoValid;
5204           CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5205                                            .ScatterGatherSegments[0]
5206                                            .SegmentDataPointer =
5207             Controller->V2.NewLogicalDeviceInformationDMA;
5208           CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5209                                            .ScatterGatherSegments[0]
5210                                            .SegmentByteCount =
5211             CommandMailbox->LogicalDeviceInfo.DataTransferSize;
5212           DAC960_QueueCommand(Command);
5213           return;
5214         }
5215       Controller->MonitoringTimerCount++;
5216       Controller->MonitoringTimer.expires =
5217         jiffies + DAC960_HealthStatusMonitoringInterval;
5218         add_timer(&Controller->MonitoringTimer);
5219     }
5220   if (CommandType == DAC960_ImmediateCommand)
5221     {
5222       complete(Command->Completion);
5223       Command->Completion = NULL;
5224       return;
5225     }
5226   if (CommandType == DAC960_QueuedCommand)
5227     {
5228       DAC960_V2_KernelCommand_T *KernelCommand = Command->V2.KernelCommand;
5229       KernelCommand->CommandStatus = CommandStatus;
5230       KernelCommand->RequestSenseLength = Command->V2.RequestSenseLength;
5231       KernelCommand->DataTransferLength = Command->V2.DataTransferResidue;
5232       Command->V2.KernelCommand = NULL;
5233       DAC960_DeallocateCommand(Command);
5234       KernelCommand->CompletionFunction(KernelCommand);
5235       return;
5236     }
5237   /*
5238     Queue a Status Monitoring Command to the Controller using the just
5239     completed Command if one was deferred previously due to lack of a
5240     free Command when the Monitoring Timer Function was called.
5241   */
5242   if (Controller->MonitoringCommandDeferred)
5243     {
5244       Controller->MonitoringCommandDeferred = false;
5245       DAC960_V2_QueueMonitoringCommand(Command);
5246       return;
5247     }
5248   /*
5249     Deallocate the Command.
5250   */
5251   DAC960_DeallocateCommand(Command);
5252   /*
5253     Wake up any processes waiting on a free Command.
5254   */
5255   wake_up(&Controller->CommandWaitQueue);
5256 }
5257
5258 /*
5259   DAC960_GEM_InterruptHandler handles hardware interrupts from DAC960 GEM Series
5260   Controllers.
5261 */
5262
5263 static irqreturn_t DAC960_GEM_InterruptHandler(int IRQ_Channel,
5264                                        void *DeviceIdentifier)
5265 {
5266   DAC960_Controller_T *Controller = DeviceIdentifier;
5267   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5268   DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5269   unsigned long flags;
5270
5271   spin_lock_irqsave(&Controller->queue_lock, flags);
5272   DAC960_GEM_AcknowledgeInterrupt(ControllerBaseAddress);
5273   NextStatusMailbox = Controller->V2.NextStatusMailbox;
5274   while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5275     {
5276        DAC960_V2_CommandIdentifier_T CommandIdentifier =
5277            NextStatusMailbox->Fields.CommandIdentifier;
5278        DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5279        Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5280        Command->V2.RequestSenseLength =
5281            NextStatusMailbox->Fields.RequestSenseLength;
5282        Command->V2.DataTransferResidue =
5283            NextStatusMailbox->Fields.DataTransferResidue;
5284        NextStatusMailbox->Words[0] = 0;
5285        if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5286            NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5287        DAC960_V2_ProcessCompletedCommand(Command);
5288     }
5289   Controller->V2.NextStatusMailbox = NextStatusMailbox;
5290   /*
5291     Attempt to remove additional I/O Requests from the Controller's
5292     I/O Request Queue and queue them to the Controller.
5293   */
5294   DAC960_ProcessRequest(Controller);
5295   spin_unlock_irqrestore(&Controller->queue_lock, flags);
5296   return IRQ_HANDLED;
5297 }
5298
5299 /*
5300   DAC960_BA_InterruptHandler handles hardware interrupts from DAC960 BA Series
5301   Controllers.
5302 */
5303
5304 static irqreturn_t DAC960_BA_InterruptHandler(int IRQ_Channel,
5305                                        void *DeviceIdentifier)
5306 {
5307   DAC960_Controller_T *Controller = DeviceIdentifier;
5308   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5309   DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5310   unsigned long flags;
5311
5312   spin_lock_irqsave(&Controller->queue_lock, flags);
5313   DAC960_BA_AcknowledgeInterrupt(ControllerBaseAddress);
5314   NextStatusMailbox = Controller->V2.NextStatusMailbox;
5315   while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5316     {
5317       DAC960_V2_CommandIdentifier_T CommandIdentifier =
5318         NextStatusMailbox->Fields.CommandIdentifier;
5319       DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5320       Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5321       Command->V2.RequestSenseLength =
5322         NextStatusMailbox->Fields.RequestSenseLength;
5323       Command->V2.DataTransferResidue =
5324         NextStatusMailbox->Fields.DataTransferResidue;
5325       NextStatusMailbox->Words[0] = 0;
5326       if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5327         NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5328       DAC960_V2_ProcessCompletedCommand(Command);
5329     }
5330   Controller->V2.NextStatusMailbox = NextStatusMailbox;
5331   /*
5332     Attempt to remove additional I/O Requests from the Controller's
5333     I/O Request Queue and queue them to the Controller.
5334   */
5335   DAC960_ProcessRequest(Controller);
5336   spin_unlock_irqrestore(&Controller->queue_lock, flags);
5337   return IRQ_HANDLED;
5338 }
5339
5340
5341 /*
5342   DAC960_LP_InterruptHandler handles hardware interrupts from DAC960 LP Series
5343   Controllers.
5344 */
5345
5346 static irqreturn_t DAC960_LP_InterruptHandler(int IRQ_Channel,
5347                                        void *DeviceIdentifier)
5348 {
5349   DAC960_Controller_T *Controller = DeviceIdentifier;
5350   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5351   DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5352   unsigned long flags;
5353
5354   spin_lock_irqsave(&Controller->queue_lock, flags);
5355   DAC960_LP_AcknowledgeInterrupt(ControllerBaseAddress);
5356   NextStatusMailbox = Controller->V2.NextStatusMailbox;
5357   while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5358     {
5359       DAC960_V2_CommandIdentifier_T CommandIdentifier =
5360         NextStatusMailbox->Fields.CommandIdentifier;
5361       DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5362       Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5363       Command->V2.RequestSenseLength =
5364         NextStatusMailbox->Fields.RequestSenseLength;
5365       Command->V2.DataTransferResidue =
5366         NextStatusMailbox->Fields.DataTransferResidue;
5367       NextStatusMailbox->Words[0] = 0;
5368       if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5369         NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5370       DAC960_V2_ProcessCompletedCommand(Command);
5371     }
5372   Controller->V2.NextStatusMailbox = NextStatusMailbox;
5373   /*
5374     Attempt to remove additional I/O Requests from the Controller's
5375     I/O Request Queue and queue them to the Controller.
5376   */
5377   DAC960_ProcessRequest(Controller);
5378   spin_unlock_irqrestore(&Controller->queue_lock, flags);
5379   return IRQ_HANDLED;
5380 }
5381
5382
5383 /*
5384   DAC960_LA_InterruptHandler handles hardware interrupts from DAC960 LA Series
5385   Controllers.
5386 */
5387
5388 static irqreturn_t DAC960_LA_InterruptHandler(int IRQ_Channel,
5389                                        void *DeviceIdentifier)
5390 {
5391   DAC960_Controller_T *Controller = DeviceIdentifier;
5392   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5393   DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5394   unsigned long flags;
5395
5396   spin_lock_irqsave(&Controller->queue_lock, flags);
5397   DAC960_LA_AcknowledgeInterrupt(ControllerBaseAddress);
5398   NextStatusMailbox = Controller->V1.NextStatusMailbox;
5399   while (NextStatusMailbox->Fields.Valid)
5400     {
5401       DAC960_V1_CommandIdentifier_T CommandIdentifier =
5402         NextStatusMailbox->Fields.CommandIdentifier;
5403       DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5404       Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5405       NextStatusMailbox->Word = 0;
5406       if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5407         NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5408       DAC960_V1_ProcessCompletedCommand(Command);
5409     }
5410   Controller->V1.NextStatusMailbox = NextStatusMailbox;
5411   /*
5412     Attempt to remove additional I/O Requests from the Controller's
5413     I/O Request Queue and queue them to the Controller.
5414   */
5415   DAC960_ProcessRequest(Controller);
5416   spin_unlock_irqrestore(&Controller->queue_lock, flags);
5417   return IRQ_HANDLED;
5418 }
5419
5420
5421 /*
5422   DAC960_PG_InterruptHandler handles hardware interrupts from DAC960 PG Series
5423   Controllers.
5424 */
5425
5426 static irqreturn_t DAC960_PG_InterruptHandler(int IRQ_Channel,
5427                                        void *DeviceIdentifier)
5428 {
5429   DAC960_Controller_T *Controller = DeviceIdentifier;
5430   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5431   DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5432   unsigned long flags;
5433
5434   spin_lock_irqsave(&Controller->queue_lock, flags);
5435   DAC960_PG_AcknowledgeInterrupt(ControllerBaseAddress);
5436   NextStatusMailbox = Controller->V1.NextStatusMailbox;
5437   while (NextStatusMailbox->Fields.Valid)
5438     {
5439       DAC960_V1_CommandIdentifier_T CommandIdentifier =
5440         NextStatusMailbox->Fields.CommandIdentifier;
5441       DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5442       Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5443       NextStatusMailbox->Word = 0;
5444       if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5445         NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5446       DAC960_V1_ProcessCompletedCommand(Command);
5447     }
5448   Controller->V1.NextStatusMailbox = NextStatusMailbox;
5449   /*
5450     Attempt to remove additional I/O Requests from the Controller's
5451     I/O Request Queue and queue them to the Controller.
5452   */
5453   DAC960_ProcessRequest(Controller);
5454   spin_unlock_irqrestore(&Controller->queue_lock, flags);
5455   return IRQ_HANDLED;
5456 }
5457
5458
5459 /*
5460   DAC960_PD_InterruptHandler handles hardware interrupts from DAC960 PD Series
5461   Controllers.
5462 */
5463
5464 static irqreturn_t DAC960_PD_InterruptHandler(int IRQ_Channel,
5465                                        void *DeviceIdentifier)
5466 {
5467   DAC960_Controller_T *Controller = DeviceIdentifier;
5468   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5469   unsigned long flags;
5470
5471   spin_lock_irqsave(&Controller->queue_lock, flags);
5472   while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5473     {
5474       DAC960_V1_CommandIdentifier_T CommandIdentifier =
5475         DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5476       DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5477       Command->V1.CommandStatus =
5478         DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5479       DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5480       DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5481       DAC960_V1_ProcessCompletedCommand(Command);
5482     }
5483   /*
5484     Attempt to remove additional I/O Requests from the Controller's
5485     I/O Request Queue and queue them to the Controller.
5486   */
5487   DAC960_ProcessRequest(Controller);
5488   spin_unlock_irqrestore(&Controller->queue_lock, flags);
5489   return IRQ_HANDLED;
5490 }
5491
5492
5493 /*
5494   DAC960_P_InterruptHandler handles hardware interrupts from DAC960 P Series
5495   Controllers.
5496
5497   Translations of DAC960_V1_Enquiry and DAC960_V1_GetDeviceState rely
5498   on the data having been placed into DAC960_Controller_T, rather than
5499   an arbitrary buffer.
5500 */
5501
5502 static irqreturn_t DAC960_P_InterruptHandler(int IRQ_Channel,
5503                                       void *DeviceIdentifier)
5504 {
5505   DAC960_Controller_T *Controller = DeviceIdentifier;
5506   void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5507   unsigned long flags;
5508
5509   spin_lock_irqsave(&Controller->queue_lock, flags);
5510   while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5511     {
5512       DAC960_V1_CommandIdentifier_T CommandIdentifier =
5513         DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5514       DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5515       DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5516       DAC960_V1_CommandOpcode_T CommandOpcode =
5517         CommandMailbox->Common.CommandOpcode;
5518       Command->V1.CommandStatus =
5519         DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5520       DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5521       DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5522       switch (CommandOpcode)
5523         {
5524         case DAC960_V1_Enquiry_Old:
5525           Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Enquiry;
5526           DAC960_P_To_PD_TranslateEnquiry(Controller->V1.NewEnquiry);
5527           break;
5528         case DAC960_V1_GetDeviceState_Old:
5529           Command->V1.CommandMailbox.Common.CommandOpcode =
5530                                                 DAC960_V1_GetDeviceState;
5531           DAC960_P_To_PD_TranslateDeviceState(Controller->V1.NewDeviceState);
5532           break;
5533         case DAC960_V1_Read_Old:
5534           Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Read;
5535           DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5536           break;
5537         case DAC960_V1_Write_Old:
5538           Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Write;
5539           DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5540           break;
5541         case DAC960_V1_ReadWithScatterGather_Old:
5542           Command->V1.CommandMailbox.Common.CommandOpcode =
5543             DAC960_V1_ReadWithScatterGather;
5544           DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5545           break;
5546         case DAC960_V1_WriteWithScatterGather_Old:
5547           Command->V1.CommandMailbox.Common.CommandOpcode =
5548             DAC960_V1_WriteWithScatterGather;
5549           DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5550           break;
5551         default:
5552           break;
5553         }
5554       DAC960_V1_ProcessCompletedCommand(Command);
5555     }
5556   /*
5557     Attempt to remove additional I/O Requests from the Controller's
5558     I/O Request Queue and queue them to the Controller.
5559   */
5560   DAC960_ProcessRequest(Controller);
5561   spin_unlock_irqrestore(&Controller->queue_lock, flags);
5562   return IRQ_HANDLED;
5563 }
5564
5565
5566 /*
5567   DAC960_V1_QueueMonitoringCommand queues a Monitoring Command to DAC960 V1
5568   Firmware Controllers.
5569 */
5570
5571 static void DAC960_V1_QueueMonitoringCommand(DAC960_Command_T *Command)
5572 {
5573   DAC960_Controller_T *Controller = Command->Controller;
5574   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5575   DAC960_V1_ClearCommand(Command);
5576   Command->CommandType = DAC960_MonitoringCommand;
5577   CommandMailbox->Type3.CommandOpcode = DAC960_V1_Enquiry;
5578   CommandMailbox->Type3.BusAddress = Controller->V1.NewEnquiryDMA;
5579   DAC960_QueueCommand(Command);
5580 }
5581
5582
5583 /*
5584   DAC960_V2_QueueMonitoringCommand queues a Monitoring Command to DAC960 V2
5585   Firmware Controllers.
5586 */
5587
5588 static void DAC960_V2_QueueMonitoringCommand(DAC960_Command_T *Command)
5589 {
5590   DAC960_Controller_T *Controller = Command->Controller;
5591   DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
5592   DAC960_V2_ClearCommand(Command);
5593   Command->CommandType = DAC960_MonitoringCommand;
5594   CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
5595   CommandMailbox->ControllerInfo.CommandControlBits
5596                                 .DataTransferControllerToHost = true;
5597   CommandMailbox->ControllerInfo.CommandControlBits
5598                                 .NoAutoRequestSense = true;
5599   CommandMailbox->ControllerInfo.DataTransferSize =
5600     sizeof(DAC960_V2_ControllerInfo_T);
5601   CommandMailbox->ControllerInfo.ControllerNumber = 0;
5602   CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
5603   CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5604                                 .ScatterGatherSegments[0]
5605                                 .SegmentDataPointer =
5606     Controller->V2.NewControllerInformationDMA;
5607   CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5608                                 .ScatterGatherSegments[0]
5609                                 .SegmentByteCount =
5610     CommandMailbox->ControllerInfo.DataTransferSize;
5611   DAC960_QueueCommand(Command);
5612 }
5613
5614
5615 /*
5616   DAC960_MonitoringTimerFunction is the timer function for monitoring
5617   the status of DAC960 Controllers.
5618 */
5619
5620 static void DAC960_MonitoringTimerFunction(unsigned long TimerData)
5621 {
5622   DAC960_Controller_T *Controller = (DAC960_Controller_T *) TimerData;
5623   DAC960_Command_T *Command;
5624   unsigned long flags;
5625
5626   if (Controller->FirmwareType == DAC960_V1_Controller)
5627     {
5628       spin_lock_irqsave(&Controller->queue_lock, flags);
5629       /*
5630         Queue a Status Monitoring Command to Controller.
5631       */
5632       Command = DAC960_AllocateCommand(Controller);
5633       if (Command != NULL)
5634         DAC960_V1_QueueMonitoringCommand(Command);
5635       else Controller->MonitoringCommandDeferred = true;
5636       spin_unlock_irqrestore(&Controller->queue_lock, flags);
5637     }
5638   else
5639     {
5640       DAC960_V2_ControllerInfo_T *ControllerInfo =
5641         &Controller->V2.ControllerInformation;
5642       unsigned int StatusChangeCounter =
5643         Controller->V2.HealthStatusBuffer->StatusChangeCounter;
5644       bool ForceMonitoringCommand = false;
5645       if (time_after(jiffies, Controller->SecondaryMonitoringTime
5646           + DAC960_SecondaryMonitoringInterval))
5647         {
5648           int LogicalDriveNumber;
5649           for (LogicalDriveNumber = 0;
5650                LogicalDriveNumber < DAC960_MaxLogicalDrives;
5651                LogicalDriveNumber++)
5652             {
5653               DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5654                 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5655               if (LogicalDeviceInfo == NULL) continue;
5656               if (!LogicalDeviceInfo->LogicalDeviceControl
5657                                      .LogicalDeviceInitialized)
5658                 {
5659                   ForceMonitoringCommand = true;
5660                   break;
5661                 }
5662             }
5663           Controller->SecondaryMonitoringTime = jiffies;
5664         }
5665       if (StatusChangeCounter == Controller->V2.StatusChangeCounter &&
5666           Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5667           == Controller->V2.NextEventSequenceNumber &&
5668           (ControllerInfo->BackgroundInitializationsActive +
5669            ControllerInfo->LogicalDeviceInitializationsActive +
5670            ControllerInfo->PhysicalDeviceInitializationsActive +
5671            ControllerInfo->ConsistencyChecksActive +
5672            ControllerInfo->RebuildsActive +
5673            ControllerInfo->OnlineExpansionsActive == 0 ||
5674            time_before(jiffies, Controller->PrimaryMonitoringTime
5675            + DAC960_MonitoringTimerInterval)) &&
5676           !ForceMonitoringCommand)
5677         {
5678           Controller->MonitoringTimer.expires =
5679             jiffies + DAC960_HealthStatusMonitoringInterval;
5680             add_timer(&Controller->MonitoringTimer);
5681           return;
5682         }
5683       Controller->V2.StatusChangeCounter = StatusChangeCounter;
5684       Controller->PrimaryMonitoringTime = jiffies;
5685
5686       spin_lock_irqsave(&Controller->queue_lock, flags);
5687       /*
5688         Queue a Status Monitoring Command to Controller.
5689       */
5690       Command = DAC960_AllocateCommand(Controller);
5691       if (Command != NULL)
5692         DAC960_V2_QueueMonitoringCommand(Command);
5693       else Controller->MonitoringCommandDeferred = true;
5694       spin_unlock_irqrestore(&Controller->queue_lock, flags);
5695       /*
5696         Wake up any processes waiting on a Health Status Buffer change.
5697       */
5698       wake_up(&Controller->HealthStatusWaitQueue);
5699     }
5700 }
5701
5702 /*
5703   DAC960_CheckStatusBuffer verifies that there is room to hold ByteCount
5704   additional bytes in the Combined Status Buffer and grows the buffer if
5705   necessary.  It returns true if there is enough room and false otherwise.
5706 */
5707
5708 static bool DAC960_CheckStatusBuffer(DAC960_Controller_T *Controller,
5709                                         unsigned int ByteCount)
5710 {
5711   unsigned char *NewStatusBuffer;
5712   if (Controller->InitialStatusLength + 1 +
5713       Controller->CurrentStatusLength + ByteCount + 1 <=
5714       Controller->CombinedStatusBufferLength)
5715     return true;
5716   if (Controller->CombinedStatusBufferLength == 0)
5717     {
5718       unsigned int NewStatusBufferLength = DAC960_InitialStatusBufferSize;
5719       while (NewStatusBufferLength < ByteCount)
5720         NewStatusBufferLength *= 2;
5721       Controller->CombinedStatusBuffer = kmalloc(NewStatusBufferLength,
5722                                                   GFP_ATOMIC);
5723       if (Controller->CombinedStatusBuffer == NULL) return false;
5724       Controller->CombinedStatusBufferLength = NewStatusBufferLength;
5725       return true;
5726     }
5727   NewStatusBuffer = kmalloc(2 * Controller->CombinedStatusBufferLength,
5728                              GFP_ATOMIC);
5729   if (NewStatusBuffer == NULL)
5730     {
5731       DAC960_Warning("Unable to expand Combined Status Buffer - Truncating\n",
5732                      Controller);
5733       return false;
5734     }
5735   memcpy(NewStatusBuffer, Controller->CombinedStatusBuffer,
5736          Controller->CombinedStatusBufferLength);
5737   kfree(Controller->CombinedStatusBuffer);
5738   Controller->CombinedStatusBuffer = NewStatusBuffer;
5739   Controller->CombinedStatusBufferLength *= 2;
5740   Controller->CurrentStatusBuffer =
5741     &NewStatusBuffer[Controller->InitialStatusLength + 1];
5742   return true;
5743 }
5744
5745
5746 /*
5747   DAC960_Message prints Driver Messages.
5748 */
5749
5750 static void DAC960_Message(DAC960_MessageLevel_T MessageLevel,
5751                            unsigned char *Format,
5752                            DAC960_Controller_T *Controller,
5753                            ...)
5754 {
5755   static unsigned char Buffer[DAC960_LineBufferSize];
5756   static bool BeginningOfLine = true;
5757   va_list Arguments;
5758   int Length = 0;
5759   va_start(Arguments, Controller);
5760   Length = vsprintf(Buffer, Format, Arguments);
5761   va_end(Arguments);
5762   if (Controller == NULL)
5763     printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5764            DAC960_ControllerCount, Buffer);
5765   else if (MessageLevel == DAC960_AnnounceLevel ||
5766            MessageLevel == DAC960_InfoLevel)
5767     {
5768       if (!Controller->ControllerInitialized)
5769         {
5770           if (DAC960_CheckStatusBuffer(Controller, Length))
5771             {
5772               strcpy(&Controller->CombinedStatusBuffer
5773                                   [Controller->InitialStatusLength],
5774                      Buffer);
5775               Controller->InitialStatusLength += Length;
5776               Controller->CurrentStatusBuffer =
5777                 &Controller->CombinedStatusBuffer
5778                              [Controller->InitialStatusLength + 1];
5779             }
5780           if (MessageLevel == DAC960_AnnounceLevel)
5781             {
5782               static int AnnouncementLines = 0;
5783               if (++AnnouncementLines <= 2)
5784                 printk("%sDAC960: %s", DAC960_MessageLevelMap[MessageLevel],
5785                        Buffer);
5786             }
5787           else
5788             {
5789               if (BeginningOfLine)
5790                 {
5791                   if (Buffer[0] != '\n' || Length > 1)
5792                     printk("%sDAC960#%d: %s",
5793                            DAC960_MessageLevelMap[MessageLevel],
5794                            Controller->ControllerNumber, Buffer);
5795                 }
5796               else printk("%s", Buffer);
5797             }
5798         }
5799       else if (DAC960_CheckStatusBuffer(Controller, Length))
5800         {
5801           strcpy(&Controller->CurrentStatusBuffer[
5802                     Controller->CurrentStatusLength], Buffer);
5803           Controller->CurrentStatusLength += Length;
5804         }
5805     }
5806   else if (MessageLevel == DAC960_ProgressLevel)
5807     {
5808       strcpy(Controller->ProgressBuffer, Buffer);
5809       Controller->ProgressBufferLength = Length;
5810       if (Controller->EphemeralProgressMessage)
5811         {
5812           if (time_after_eq(jiffies, Controller->LastProgressReportTime
5813               + DAC960_ProgressReportingInterval))
5814             {
5815               printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5816                      Controller->ControllerNumber, Buffer);
5817               Controller->LastProgressReportTime = jiffies;
5818             }
5819         }
5820       else printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5821                   Controller->ControllerNumber, Buffer);
5822     }
5823   else if (MessageLevel == DAC960_UserCriticalLevel)
5824     {
5825       strcpy(&Controller->UserStatusBuffer[Controller->UserStatusLength],
5826              Buffer);
5827       Controller->UserStatusLength += Length;
5828       if (Buffer[0] != '\n' || Length > 1)
5829         printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5830                Controller->ControllerNumber, Buffer);
5831     }
5832   else
5833     {
5834       if (BeginningOfLine)
5835         printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5836                Controller->ControllerNumber, Buffer);
5837       else printk("%s", Buffer);
5838     }
5839   BeginningOfLine = (Buffer[Length-1] == '\n');
5840 }
5841
5842
5843 /*
5844   DAC960_ParsePhysicalDevice parses spaces followed by a Physical Device
5845   Channel:TargetID specification from a User Command string.  It updates
5846   Channel and TargetID and returns true on success and false on failure.
5847 */
5848
5849 static bool DAC960_ParsePhysicalDevice(DAC960_Controller_T *Controller,
5850                                           char *UserCommandString,
5851                                           unsigned char *Channel,
5852                                           unsigned char *TargetID)
5853 {
5854   char *NewUserCommandString = UserCommandString;
5855   unsigned long XChannel, XTargetID;
5856   while (*UserCommandString == ' ') UserCommandString++;
5857   if (UserCommandString == NewUserCommandString)
5858     return false;
5859   XChannel = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5860   if (NewUserCommandString == UserCommandString ||
5861       *NewUserCommandString != ':' ||
5862       XChannel >= Controller->Channels)
5863     return false;
5864   UserCommandString = ++NewUserCommandString;
5865   XTargetID = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5866   if (NewUserCommandString == UserCommandString ||
5867       *NewUserCommandString != '\0' ||
5868       XTargetID >= Controller->Targets)
5869     return false;
5870   *Channel = XChannel;
5871   *TargetID = XTargetID;
5872   return true;
5873 }
5874
5875
5876 /*
5877   DAC960_ParseLogicalDrive parses spaces followed by a Logical Drive Number
5878   specification from a User Command string.  It updates LogicalDriveNumber and
5879   returns true on success and false on failure.
5880 */
5881
5882 static bool DAC960_ParseLogicalDrive(DAC960_Controller_T *Controller,
5883                                         char *UserCommandString,
5884                                         unsigned char *LogicalDriveNumber)
5885 {
5886   char *NewUserCommandString = UserCommandString;
5887   unsigned long XLogicalDriveNumber;
5888   while (*UserCommandString == ' ') UserCommandString++;
5889   if (UserCommandString == NewUserCommandString)
5890     return false;
5891   XLogicalDriveNumber =
5892     simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5893   if (NewUserCommandString == UserCommandString ||
5894       *NewUserCommandString != '\0' ||
5895       XLogicalDriveNumber > DAC960_MaxLogicalDrives - 1)
5896     return false;
5897   *LogicalDriveNumber = XLogicalDriveNumber;
5898   return true;
5899 }
5900
5901
5902 /*
5903   DAC960_V1_SetDeviceState sets the Device State for a Physical Device for
5904   DAC960 V1 Firmware Controllers.
5905 */
5906
5907 static void DAC960_V1_SetDeviceState(DAC960_Controller_T *Controller,
5908                                      DAC960_Command_T *Command,
5909                                      unsigned char Channel,
5910                                      unsigned char TargetID,
5911                                      DAC960_V1_PhysicalDeviceState_T
5912                                        DeviceState,
5913                                      const unsigned char *DeviceStateString)
5914 {
5915   DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5916   CommandMailbox->Type3D.CommandOpcode = DAC960_V1_StartDevice;
5917   CommandMailbox->Type3D.Channel = Channel;
5918   CommandMailbox->Type3D.TargetID = TargetID;
5919   CommandMailbox->Type3D.DeviceState = DeviceState;
5920   CommandMailbox->Type3D.Modifier = 0;
5921   DAC960_ExecuteCommand(Command);
5922   switch (Command->V1.CommandStatus)
5923     {
5924     case DAC960_V1_NormalCompletion:
5925       DAC960_UserCritical("%s of Physical Device %d:%d Succeeded\n", Controller,
5926                           DeviceStateString, Channel, TargetID);
5927       break;
5928     case DAC960_V1_UnableToStartDevice:
5929       DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5930                           "Unable to Start Device\n", Controller,
5931                           DeviceStateString, Channel, TargetID);
5932       break;
5933     case DAC960_V1_NoDeviceAtAddress:
5934       DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5935                           "No Device at Address\n", Controller,
5936                           DeviceStateString, Channel, TargetID);
5937       break;
5938     case DAC960_V1_InvalidChannelOrTargetOrModifier:
5939       DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5940                           "Invalid Channel or Target or Modifier\n",
5941                           Controller, DeviceStateString, Channel, TargetID);
5942       break;
5943     case DAC960_V1_ChannelBusy:
5944       DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5945                           "Channel Busy\n", Controller,
5946                           DeviceStateString, Channel, TargetID);
5947       break;
5948     default:
5949       DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5950                           "Unexpected Status %04X\n", Controller,
5951                           DeviceStateString, Channel, TargetID,
5952                           Command->V1.CommandStatus);
5953       break;
5954     }
5955 }
5956
5957
5958 /*
5959   DAC960_V1_ExecuteUserCommand executes a User Command for DAC960 V1 Firmware
5960   Controllers.
5961 */
5962
5963 static bool DAC960_V1_ExecuteUserCommand(DAC960_Controller_T *Controller,
5964                                             unsigned char *UserCommand)
5965 {
5966   DAC960_Command_T *Command;
5967   DAC960_V1_CommandMailbox_T *CommandMailbox;
5968   unsigned long flags;
5969   unsigned char Channel, TargetID, LogicalDriveNumber;
5970
5971   spin_lock_irqsave(&Controller->queue_lock, flags);
5972   while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
5973     DAC960_WaitForCommand(Controller);