844df0cbbd3e011784531ddb6e6ff1a06e7ec83c
[linux-3.10.git] / arch / x86 / pci / i386.c
1 /*
2  *      Low-Level PCI Access for i386 machines
3  *
4  * Copyright 1993, 1994 Drew Eckhardt
5  *      Visionary Computing
6  *      (Unix and Linux consulting and custom programming)
7  *      Drew@Colorado.EDU
8  *      +1 (303) 786-7975
9  *
10  * Drew's work was sponsored by:
11  *      iX Multiuser Multitasking Magazine
12  *      Hannover, Germany
13  *      hm@ix.de
14  *
15  * Copyright 1997--2000 Martin Mares <mj@ucw.cz>
16  *
17  * For more information, please consult the following manuals (look at
18  * http://www.pcisig.com/ for how to get them):
19  *
20  * PCI BIOS Specification
21  * PCI Local Bus Specification
22  * PCI to PCI Bridge Specification
23  * PCI System Design Guide
24  *
25  */
26
27 #include <linux/types.h>
28 #include <linux/kernel.h>
29 #include <linux/pci.h>
30 #include <linux/init.h>
31 #include <linux/ioport.h>
32 #include <linux/errno.h>
33 #include <linux/bootmem.h>
34
35 #include <asm/pat.h>
36 #include <asm/e820.h>
37
38 #include "pci.h"
39
40 static int
41 skip_isa_ioresource_align(struct pci_dev *dev) {
42
43         if ((pci_probe & PCI_CAN_SKIP_ISA_ALIGN) &&
44             !(dev->bus->bridge_ctl & PCI_BRIDGE_CTL_ISA))
45                 return 1;
46         return 0;
47 }
48
49 /*
50  * We need to avoid collisions with `mirrored' VGA ports
51  * and other strange ISA hardware, so we always want the
52  * addresses to be allocated in the 0x000-0x0ff region
53  * modulo 0x400.
54  *
55  * Why? Because some silly external IO cards only decode
56  * the low 10 bits of the IO address. The 0x00-0xff region
57  * is reserved for motherboard devices that decode all 16
58  * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
59  * but we want to try to avoid allocating at 0x2900-0x2bff
60  * which might have be mirrored at 0x0100-0x03ff..
61  */
62 void
63 pcibios_align_resource(void *data, struct resource *res,
64                         resource_size_t size, resource_size_t align)
65 {
66         struct pci_dev *dev = data;
67
68         if (res->flags & IORESOURCE_IO) {
69                 resource_size_t start = res->start;
70
71                 if (skip_isa_ioresource_align(dev))
72                         return;
73                 if (start & 0x300) {
74                         start = (start + 0x3ff) & ~0x3ff;
75                         res->start = start;
76                 }
77         }
78 }
79 EXPORT_SYMBOL(pcibios_align_resource);
80
81 /*
82  *  Handle resources of PCI devices.  If the world were perfect, we could
83  *  just allocate all the resource regions and do nothing more.  It isn't.
84  *  On the other hand, we cannot just re-allocate all devices, as it would
85  *  require us to know lots of host bridge internals.  So we attempt to
86  *  keep as much of the original configuration as possible, but tweak it
87  *  when it's found to be wrong.
88  *
89  *  Known BIOS problems we have to work around:
90  *      - I/O or memory regions not configured
91  *      - regions configured, but not enabled in the command register
92  *      - bogus I/O addresses above 64K used
93  *      - expansion ROMs left enabled (this may sound harmless, but given
94  *        the fact the PCI specs explicitly allow address decoders to be
95  *        shared between expansion ROMs and other resource regions, it's
96  *        at least dangerous)
97  *
98  *  Our solution:
99  *      (1) Allocate resources for all buses behind PCI-to-PCI bridges.
100  *          This gives us fixed barriers on where we can allocate.
101  *      (2) Allocate resources for all enabled devices.  If there is
102  *          a collision, just mark the resource as unallocated. Also
103  *          disable expansion ROMs during this step.
104  *      (3) Try to allocate resources for disabled devices.  If the
105  *          resources were assigned correctly, everything goes well,
106  *          if they weren't, they won't disturb allocation of other
107  *          resources.
108  *      (4) Assign new addresses to resources which were either
109  *          not configured at all or misconfigured.  If explicitly
110  *          requested by the user, configure expansion ROM address
111  *          as well.
112  */
113
114 static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
115 {
116         struct pci_bus *bus;
117         struct pci_dev *dev;
118         int idx;
119         struct resource *r, *pr;
120
121         /* Depth-First Search on bus tree */
122         list_for_each_entry(bus, bus_list, node) {
123                 if ((dev = bus->self)) {
124                         for (idx = PCI_BRIDGE_RESOURCES;
125                             idx < PCI_NUM_RESOURCES; idx++) {
126                                 r = &dev->resource[idx];
127                                 if (!r->flags)
128                                         continue;
129                                 pr = pci_find_parent_resource(dev, r);
130                                 if (!r->start || !pr ||
131                                     request_resource(pr, r) < 0) {
132                                         dev_err(&dev->dev, "BAR %d: can't allocate resource\n", idx);
133                                         /*
134                                          * Something is wrong with the region.
135                                          * Invalidate the resource to prevent
136                                          * child resource allocations in this
137                                          * range.
138                                          */
139                                         r->flags = 0;
140                                 }
141                         }
142                 }
143                 pcibios_allocate_bus_resources(&bus->children);
144         }
145 }
146
147 static void __init pcibios_allocate_resources(int pass)
148 {
149         struct pci_dev *dev = NULL;
150         int idx, disabled;
151         u16 command;
152         struct resource *r, *pr;
153
154         for_each_pci_dev(dev) {
155                 pci_read_config_word(dev, PCI_COMMAND, &command);
156                 for (idx = 0; idx < PCI_ROM_RESOURCE; idx++) {
157                         r = &dev->resource[idx];
158                         if (r->parent)          /* Already allocated */
159                                 continue;
160                         if (!r->start)          /* Address not assigned at all */
161                                 continue;
162                         if (r->flags & IORESOURCE_IO)
163                                 disabled = !(command & PCI_COMMAND_IO);
164                         else
165                                 disabled = !(command & PCI_COMMAND_MEMORY);
166                         if (pass == disabled) {
167                                 dev_dbg(&dev->dev, "resource %#08llx-%#08llx (f=%lx, d=%d, p=%d)\n",
168                                         (unsigned long long) r->start,
169                                         (unsigned long long) r->end,
170                                         r->flags, disabled, pass);
171                                 pr = pci_find_parent_resource(dev, r);
172                                 if (!pr || request_resource(pr, r) < 0) {
173                                         dev_err(&dev->dev, "BAR %d: can't allocate resource\n", idx);
174                                         /* We'll assign a new address later */
175                                         r->end -= r->start;
176                                         r->start = 0;
177                                 }
178                         }
179                 }
180                 if (!pass) {
181                         r = &dev->resource[PCI_ROM_RESOURCE];
182                         if (r->flags & IORESOURCE_ROM_ENABLE) {
183                                 /* Turn the ROM off, leave the resource region,
184                                  * but keep it unregistered. */
185                                 u32 reg;
186                                 dev_dbg(&dev->dev, "disabling ROM\n");
187                                 r->flags &= ~IORESOURCE_ROM_ENABLE;
188                                 pci_read_config_dword(dev,
189                                                 dev->rom_base_reg, &reg);
190                                 pci_write_config_dword(dev, dev->rom_base_reg,
191                                                 reg & ~PCI_ROM_ADDRESS_ENABLE);
192                         }
193                 }
194         }
195 }
196
197 static int __init pcibios_assign_resources(void)
198 {
199         struct pci_dev *dev = NULL;
200         struct resource *r, *pr;
201
202         if (!(pci_probe & PCI_ASSIGN_ROMS)) {
203                 /*
204                  * Try to use BIOS settings for ROMs, otherwise let
205                  * pci_assign_unassigned_resources() allocate the new
206                  * addresses.
207                  */
208                 for_each_pci_dev(dev) {
209                         r = &dev->resource[PCI_ROM_RESOURCE];
210                         if (!r->flags || !r->start)
211                                 continue;
212                         pr = pci_find_parent_resource(dev, r);
213                         if (!pr || request_resource(pr, r) < 0) {
214                                 r->end -= r->start;
215                                 r->start = 0;
216                         }
217                 }
218         }
219
220         pci_assign_unassigned_resources();
221
222         return 0;
223 }
224
225 void __init pcibios_resource_survey(void)
226 {
227         DBG("PCI: Allocating resources\n");
228         pcibios_allocate_bus_resources(&pci_root_buses);
229         pcibios_allocate_resources(0);
230         pcibios_allocate_resources(1);
231
232         e820_reserve_resources_late();
233 }
234
235 /**
236  * called in fs_initcall (one below subsys_initcall),
237  * give a chance for motherboard reserve resources
238  */
239 fs_initcall(pcibios_assign_resources);
240
241 /*
242  *  If we set up a device for bus mastering, we need to check the latency
243  *  timer as certain crappy BIOSes forget to set it properly.
244  */
245 unsigned int pcibios_max_latency = 255;
246
247 void pcibios_set_master(struct pci_dev *dev)
248 {
249         u8 lat;
250         pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
251         if (lat < 16)
252                 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
253         else if (lat > pcibios_max_latency)
254                 lat = pcibios_max_latency;
255         else
256                 return;
257         dev_printk(KERN_DEBUG, &dev->dev, "setting latency timer to %d\n", lat);
258         pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
259 }
260
261 static void pci_unmap_page_range(struct vm_area_struct *vma)
262 {
263         u64 addr = (u64)vma->vm_pgoff << PAGE_SHIFT;
264         free_memtype(addr, addr + vma->vm_end - vma->vm_start);
265 }
266
267 static void pci_track_mmap_page_range(struct vm_area_struct *vma)
268 {
269         u64 addr = (u64)vma->vm_pgoff << PAGE_SHIFT;
270         unsigned long flags = pgprot_val(vma->vm_page_prot)
271                                                 & _PAGE_CACHE_MASK;
272
273         reserve_memtype(addr, addr + vma->vm_end - vma->vm_start, flags, NULL);
274 }
275
276 static struct vm_operations_struct pci_mmap_ops = {
277         .open  = pci_track_mmap_page_range,
278         .close = pci_unmap_page_range,
279         .access = generic_access_phys,
280 };
281
282 int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
283                         enum pci_mmap_state mmap_state, int write_combine)
284 {
285         unsigned long prot;
286         u64 addr = vma->vm_pgoff << PAGE_SHIFT;
287         unsigned long len = vma->vm_end - vma->vm_start;
288         unsigned long flags;
289         unsigned long new_flags;
290         int retval;
291
292         /* I/O space cannot be accessed via normal processor loads and
293          * stores on this platform.
294          */
295         if (mmap_state == pci_mmap_io)
296                 return -EINVAL;
297
298         prot = pgprot_val(vma->vm_page_prot);
299         if (pat_enabled && write_combine)
300                 prot |= _PAGE_CACHE_WC;
301         else if (pat_enabled || boot_cpu_data.x86 > 3)
302                 /*
303                  * ioremap() and ioremap_nocache() defaults to UC MINUS for now.
304                  * To avoid attribute conflicts, request UC MINUS here
305                  * aswell.
306                  */
307                 prot |= _PAGE_CACHE_UC_MINUS;
308
309         vma->vm_page_prot = __pgprot(prot);
310
311         flags = pgprot_val(vma->vm_page_prot) & _PAGE_CACHE_MASK;
312         retval = reserve_memtype(addr, addr + len, flags, &new_flags);
313         if (retval)
314                 return retval;
315
316         if (flags != new_flags) {
317                 /*
318                  * Do not fallback to certain memory types with certain
319                  * requested type:
320                  * - request is uncached, return cannot be write-back
321                  * - request is uncached, return cannot be write-combine
322                  * - request is write-combine, return cannot be write-back
323                  */
324                 if ((flags == _PAGE_CACHE_UC_MINUS &&
325                      (new_flags == _PAGE_CACHE_WB)) ||
326                     (flags == _PAGE_CACHE_WC &&
327                      new_flags == _PAGE_CACHE_WB)) {
328                         free_memtype(addr, addr+len);
329                         return -EINVAL;
330                 }
331                 flags = new_flags;
332         }
333
334         if (((vma->vm_pgoff < max_low_pfn_mapped) ||
335              (vma->vm_pgoff >= (1UL<<(32 - PAGE_SHIFT)) &&
336               vma->vm_pgoff < max_pfn_mapped)) &&
337             ioremap_change_attr((unsigned long)__va(addr), len, flags)) {
338                 free_memtype(addr, addr + len);
339                 return -EINVAL;
340         }
341
342         if (io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
343                                vma->vm_end - vma->vm_start,
344                                vma->vm_page_prot))
345                 return -EAGAIN;
346
347         vma->vm_ops = &pci_mmap_ops;
348
349         return 0;
350 }