KVM: L1 TSC handling
[linux-3.10.git] / arch / x86 / kvm / x86.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * derived from drivers/kvm/kvm_main.c
5  *
6  * Copyright (C) 2006 Qumranet, Inc.
7  * Copyright (C) 2008 Qumranet, Inc.
8  * Copyright IBM Corporation, 2008
9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
10  *
11  * Authors:
12  *   Avi Kivity   <avi@qumranet.com>
13  *   Yaniv Kamay  <yaniv@qumranet.com>
14  *   Amit Shah    <amit.shah@qumranet.com>
15  *   Ben-Ami Yassour <benami@il.ibm.com>
16  *
17  * This work is licensed under the terms of the GNU GPL, version 2.  See
18  * the COPYING file in the top-level directory.
19  *
20  */
21
22 #include <linux/kvm_host.h>
23 #include "irq.h"
24 #include "mmu.h"
25 #include "i8254.h"
26 #include "tss.h"
27 #include "kvm_cache_regs.h"
28 #include "x86.h"
29
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
33 #include <linux/fs.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <trace/events/kvm.h>
48
49 #define CREATE_TRACE_POINTS
50 #include "trace.h"
51
52 #include <asm/debugreg.h>
53 #include <asm/msr.h>
54 #include <asm/desc.h>
55 #include <asm/mtrr.h>
56 #include <asm/mce.h>
57 #include <asm/i387.h>
58 #include <asm/xcr.h>
59 #include <asm/pvclock.h>
60 #include <asm/div64.h>
61
62 #define MAX_IO_MSRS 256
63 #define KVM_MAX_MCE_BANKS 32
64 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
65
66 #define emul_to_vcpu(ctxt) \
67         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
68
69 /* EFER defaults:
70  * - enable syscall per default because its emulated by KVM
71  * - enable LME and LMA per default on 64 bit KVM
72  */
73 #ifdef CONFIG_X86_64
74 static
75 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
76 #else
77 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
78 #endif
79
80 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
81 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
82
83 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
84 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
85                                     struct kvm_cpuid_entry2 __user *entries);
86
87 struct kvm_x86_ops *kvm_x86_ops;
88 EXPORT_SYMBOL_GPL(kvm_x86_ops);
89
90 int ignore_msrs = 0;
91 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
92
93 bool kvm_has_tsc_control;
94 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
95 u32  kvm_max_guest_tsc_khz;
96 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
97
98 #define KVM_NR_SHARED_MSRS 16
99
100 struct kvm_shared_msrs_global {
101         int nr;
102         u32 msrs[KVM_NR_SHARED_MSRS];
103 };
104
105 struct kvm_shared_msrs {
106         struct user_return_notifier urn;
107         bool registered;
108         struct kvm_shared_msr_values {
109                 u64 host;
110                 u64 curr;
111         } values[KVM_NR_SHARED_MSRS];
112 };
113
114 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
115 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
116
117 struct kvm_stats_debugfs_item debugfs_entries[] = {
118         { "pf_fixed", VCPU_STAT(pf_fixed) },
119         { "pf_guest", VCPU_STAT(pf_guest) },
120         { "tlb_flush", VCPU_STAT(tlb_flush) },
121         { "invlpg", VCPU_STAT(invlpg) },
122         { "exits", VCPU_STAT(exits) },
123         { "io_exits", VCPU_STAT(io_exits) },
124         { "mmio_exits", VCPU_STAT(mmio_exits) },
125         { "signal_exits", VCPU_STAT(signal_exits) },
126         { "irq_window", VCPU_STAT(irq_window_exits) },
127         { "nmi_window", VCPU_STAT(nmi_window_exits) },
128         { "halt_exits", VCPU_STAT(halt_exits) },
129         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
130         { "hypercalls", VCPU_STAT(hypercalls) },
131         { "request_irq", VCPU_STAT(request_irq_exits) },
132         { "irq_exits", VCPU_STAT(irq_exits) },
133         { "host_state_reload", VCPU_STAT(host_state_reload) },
134         { "efer_reload", VCPU_STAT(efer_reload) },
135         { "fpu_reload", VCPU_STAT(fpu_reload) },
136         { "insn_emulation", VCPU_STAT(insn_emulation) },
137         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
138         { "irq_injections", VCPU_STAT(irq_injections) },
139         { "nmi_injections", VCPU_STAT(nmi_injections) },
140         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
141         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
142         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
143         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
144         { "mmu_flooded", VM_STAT(mmu_flooded) },
145         { "mmu_recycled", VM_STAT(mmu_recycled) },
146         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
147         { "mmu_unsync", VM_STAT(mmu_unsync) },
148         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
149         { "largepages", VM_STAT(lpages) },
150         { NULL }
151 };
152
153 u64 __read_mostly host_xcr0;
154
155 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
156
157 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
158 {
159         int i;
160         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
161                 vcpu->arch.apf.gfns[i] = ~0;
162 }
163
164 static void kvm_on_user_return(struct user_return_notifier *urn)
165 {
166         unsigned slot;
167         struct kvm_shared_msrs *locals
168                 = container_of(urn, struct kvm_shared_msrs, urn);
169         struct kvm_shared_msr_values *values;
170
171         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
172                 values = &locals->values[slot];
173                 if (values->host != values->curr) {
174                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
175                         values->curr = values->host;
176                 }
177         }
178         locals->registered = false;
179         user_return_notifier_unregister(urn);
180 }
181
182 static void shared_msr_update(unsigned slot, u32 msr)
183 {
184         struct kvm_shared_msrs *smsr;
185         u64 value;
186
187         smsr = &__get_cpu_var(shared_msrs);
188         /* only read, and nobody should modify it at this time,
189          * so don't need lock */
190         if (slot >= shared_msrs_global.nr) {
191                 printk(KERN_ERR "kvm: invalid MSR slot!");
192                 return;
193         }
194         rdmsrl_safe(msr, &value);
195         smsr->values[slot].host = value;
196         smsr->values[slot].curr = value;
197 }
198
199 void kvm_define_shared_msr(unsigned slot, u32 msr)
200 {
201         if (slot >= shared_msrs_global.nr)
202                 shared_msrs_global.nr = slot + 1;
203         shared_msrs_global.msrs[slot] = msr;
204         /* we need ensured the shared_msr_global have been updated */
205         smp_wmb();
206 }
207 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
208
209 static void kvm_shared_msr_cpu_online(void)
210 {
211         unsigned i;
212
213         for (i = 0; i < shared_msrs_global.nr; ++i)
214                 shared_msr_update(i, shared_msrs_global.msrs[i]);
215 }
216
217 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
218 {
219         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
220
221         if (((value ^ smsr->values[slot].curr) & mask) == 0)
222                 return;
223         smsr->values[slot].curr = value;
224         wrmsrl(shared_msrs_global.msrs[slot], value);
225         if (!smsr->registered) {
226                 smsr->urn.on_user_return = kvm_on_user_return;
227                 user_return_notifier_register(&smsr->urn);
228                 smsr->registered = true;
229         }
230 }
231 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
232
233 static void drop_user_return_notifiers(void *ignore)
234 {
235         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
236
237         if (smsr->registered)
238                 kvm_on_user_return(&smsr->urn);
239 }
240
241 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
242 {
243         if (irqchip_in_kernel(vcpu->kvm))
244                 return vcpu->arch.apic_base;
245         else
246                 return vcpu->arch.apic_base;
247 }
248 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
249
250 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
251 {
252         /* TODO: reserve bits check */
253         if (irqchip_in_kernel(vcpu->kvm))
254                 kvm_lapic_set_base(vcpu, data);
255         else
256                 vcpu->arch.apic_base = data;
257 }
258 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
259
260 #define EXCPT_BENIGN            0
261 #define EXCPT_CONTRIBUTORY      1
262 #define EXCPT_PF                2
263
264 static int exception_class(int vector)
265 {
266         switch (vector) {
267         case PF_VECTOR:
268                 return EXCPT_PF;
269         case DE_VECTOR:
270         case TS_VECTOR:
271         case NP_VECTOR:
272         case SS_VECTOR:
273         case GP_VECTOR:
274                 return EXCPT_CONTRIBUTORY;
275         default:
276                 break;
277         }
278         return EXCPT_BENIGN;
279 }
280
281 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
282                 unsigned nr, bool has_error, u32 error_code,
283                 bool reinject)
284 {
285         u32 prev_nr;
286         int class1, class2;
287
288         kvm_make_request(KVM_REQ_EVENT, vcpu);
289
290         if (!vcpu->arch.exception.pending) {
291         queue:
292                 vcpu->arch.exception.pending = true;
293                 vcpu->arch.exception.has_error_code = has_error;
294                 vcpu->arch.exception.nr = nr;
295                 vcpu->arch.exception.error_code = error_code;
296                 vcpu->arch.exception.reinject = reinject;
297                 return;
298         }
299
300         /* to check exception */
301         prev_nr = vcpu->arch.exception.nr;
302         if (prev_nr == DF_VECTOR) {
303                 /* triple fault -> shutdown */
304                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
305                 return;
306         }
307         class1 = exception_class(prev_nr);
308         class2 = exception_class(nr);
309         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
310                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
311                 /* generate double fault per SDM Table 5-5 */
312                 vcpu->arch.exception.pending = true;
313                 vcpu->arch.exception.has_error_code = true;
314                 vcpu->arch.exception.nr = DF_VECTOR;
315                 vcpu->arch.exception.error_code = 0;
316         } else
317                 /* replace previous exception with a new one in a hope
318                    that instruction re-execution will regenerate lost
319                    exception */
320                 goto queue;
321 }
322
323 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
324 {
325         kvm_multiple_exception(vcpu, nr, false, 0, false);
326 }
327 EXPORT_SYMBOL_GPL(kvm_queue_exception);
328
329 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
330 {
331         kvm_multiple_exception(vcpu, nr, false, 0, true);
332 }
333 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
334
335 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
336 {
337         if (err)
338                 kvm_inject_gp(vcpu, 0);
339         else
340                 kvm_x86_ops->skip_emulated_instruction(vcpu);
341 }
342 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
343
344 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
345 {
346         ++vcpu->stat.pf_guest;
347         vcpu->arch.cr2 = fault->address;
348         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
349 }
350 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
351
352 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
353 {
354         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
355                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
356         else
357                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
358 }
359
360 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
361 {
362         kvm_make_request(KVM_REQ_EVENT, vcpu);
363         vcpu->arch.nmi_pending = 1;
364 }
365 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
366
367 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
368 {
369         kvm_multiple_exception(vcpu, nr, true, error_code, false);
370 }
371 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
372
373 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
374 {
375         kvm_multiple_exception(vcpu, nr, true, error_code, true);
376 }
377 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
378
379 /*
380  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
381  * a #GP and return false.
382  */
383 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
384 {
385         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
386                 return true;
387         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
388         return false;
389 }
390 EXPORT_SYMBOL_GPL(kvm_require_cpl);
391
392 /*
393  * This function will be used to read from the physical memory of the currently
394  * running guest. The difference to kvm_read_guest_page is that this function
395  * can read from guest physical or from the guest's guest physical memory.
396  */
397 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
398                             gfn_t ngfn, void *data, int offset, int len,
399                             u32 access)
400 {
401         gfn_t real_gfn;
402         gpa_t ngpa;
403
404         ngpa     = gfn_to_gpa(ngfn);
405         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
406         if (real_gfn == UNMAPPED_GVA)
407                 return -EFAULT;
408
409         real_gfn = gpa_to_gfn(real_gfn);
410
411         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
412 }
413 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
414
415 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
416                                void *data, int offset, int len, u32 access)
417 {
418         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
419                                        data, offset, len, access);
420 }
421
422 /*
423  * Load the pae pdptrs.  Return true is they are all valid.
424  */
425 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
426 {
427         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
428         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
429         int i;
430         int ret;
431         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
432
433         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
434                                       offset * sizeof(u64), sizeof(pdpte),
435                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
436         if (ret < 0) {
437                 ret = 0;
438                 goto out;
439         }
440         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
441                 if (is_present_gpte(pdpte[i]) &&
442                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
443                         ret = 0;
444                         goto out;
445                 }
446         }
447         ret = 1;
448
449         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
450         __set_bit(VCPU_EXREG_PDPTR,
451                   (unsigned long *)&vcpu->arch.regs_avail);
452         __set_bit(VCPU_EXREG_PDPTR,
453                   (unsigned long *)&vcpu->arch.regs_dirty);
454 out:
455
456         return ret;
457 }
458 EXPORT_SYMBOL_GPL(load_pdptrs);
459
460 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
461 {
462         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
463         bool changed = true;
464         int offset;
465         gfn_t gfn;
466         int r;
467
468         if (is_long_mode(vcpu) || !is_pae(vcpu))
469                 return false;
470
471         if (!test_bit(VCPU_EXREG_PDPTR,
472                       (unsigned long *)&vcpu->arch.regs_avail))
473                 return true;
474
475         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
476         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
477         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
478                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
479         if (r < 0)
480                 goto out;
481         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
482 out:
483
484         return changed;
485 }
486
487 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
488 {
489         unsigned long old_cr0 = kvm_read_cr0(vcpu);
490         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
491                                     X86_CR0_CD | X86_CR0_NW;
492
493         cr0 |= X86_CR0_ET;
494
495 #ifdef CONFIG_X86_64
496         if (cr0 & 0xffffffff00000000UL)
497                 return 1;
498 #endif
499
500         cr0 &= ~CR0_RESERVED_BITS;
501
502         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
503                 return 1;
504
505         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
506                 return 1;
507
508         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
509 #ifdef CONFIG_X86_64
510                 if ((vcpu->arch.efer & EFER_LME)) {
511                         int cs_db, cs_l;
512
513                         if (!is_pae(vcpu))
514                                 return 1;
515                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
516                         if (cs_l)
517                                 return 1;
518                 } else
519 #endif
520                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
521                                                  kvm_read_cr3(vcpu)))
522                         return 1;
523         }
524
525         kvm_x86_ops->set_cr0(vcpu, cr0);
526
527         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
528                 kvm_clear_async_pf_completion_queue(vcpu);
529                 kvm_async_pf_hash_reset(vcpu);
530         }
531
532         if ((cr0 ^ old_cr0) & update_bits)
533                 kvm_mmu_reset_context(vcpu);
534         return 0;
535 }
536 EXPORT_SYMBOL_GPL(kvm_set_cr0);
537
538 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
539 {
540         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
541 }
542 EXPORT_SYMBOL_GPL(kvm_lmsw);
543
544 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
545 {
546         u64 xcr0;
547
548         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
549         if (index != XCR_XFEATURE_ENABLED_MASK)
550                 return 1;
551         xcr0 = xcr;
552         if (kvm_x86_ops->get_cpl(vcpu) != 0)
553                 return 1;
554         if (!(xcr0 & XSTATE_FP))
555                 return 1;
556         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
557                 return 1;
558         if (xcr0 & ~host_xcr0)
559                 return 1;
560         vcpu->arch.xcr0 = xcr0;
561         vcpu->guest_xcr0_loaded = 0;
562         return 0;
563 }
564
565 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
566 {
567         if (__kvm_set_xcr(vcpu, index, xcr)) {
568                 kvm_inject_gp(vcpu, 0);
569                 return 1;
570         }
571         return 0;
572 }
573 EXPORT_SYMBOL_GPL(kvm_set_xcr);
574
575 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
576 {
577         struct kvm_cpuid_entry2 *best;
578
579         best = kvm_find_cpuid_entry(vcpu, 1, 0);
580         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
581 }
582
583 static bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
584 {
585         struct kvm_cpuid_entry2 *best;
586
587         best = kvm_find_cpuid_entry(vcpu, 7, 0);
588         return best && (best->ebx & bit(X86_FEATURE_SMEP));
589 }
590
591 static bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
592 {
593         struct kvm_cpuid_entry2 *best;
594
595         best = kvm_find_cpuid_entry(vcpu, 7, 0);
596         return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
597 }
598
599 static void update_cpuid(struct kvm_vcpu *vcpu)
600 {
601         struct kvm_cpuid_entry2 *best;
602
603         best = kvm_find_cpuid_entry(vcpu, 1, 0);
604         if (!best)
605                 return;
606
607         /* Update OSXSAVE bit */
608         if (cpu_has_xsave && best->function == 0x1) {
609                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
610                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
611                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
612         }
613 }
614
615 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
616 {
617         unsigned long old_cr4 = kvm_read_cr4(vcpu);
618         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
619                                    X86_CR4_PAE | X86_CR4_SMEP;
620         if (cr4 & CR4_RESERVED_BITS)
621                 return 1;
622
623         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
624                 return 1;
625
626         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
627                 return 1;
628
629         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
630                 return 1;
631
632         if (is_long_mode(vcpu)) {
633                 if (!(cr4 & X86_CR4_PAE))
634                         return 1;
635         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
636                    && ((cr4 ^ old_cr4) & pdptr_bits)
637                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
638                                    kvm_read_cr3(vcpu)))
639                 return 1;
640
641         if (kvm_x86_ops->set_cr4(vcpu, cr4))
642                 return 1;
643
644         if ((cr4 ^ old_cr4) & pdptr_bits)
645                 kvm_mmu_reset_context(vcpu);
646
647         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
648                 update_cpuid(vcpu);
649
650         return 0;
651 }
652 EXPORT_SYMBOL_GPL(kvm_set_cr4);
653
654 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
655 {
656         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
657                 kvm_mmu_sync_roots(vcpu);
658                 kvm_mmu_flush_tlb(vcpu);
659                 return 0;
660         }
661
662         if (is_long_mode(vcpu)) {
663                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
664                         return 1;
665         } else {
666                 if (is_pae(vcpu)) {
667                         if (cr3 & CR3_PAE_RESERVED_BITS)
668                                 return 1;
669                         if (is_paging(vcpu) &&
670                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
671                                 return 1;
672                 }
673                 /*
674                  * We don't check reserved bits in nonpae mode, because
675                  * this isn't enforced, and VMware depends on this.
676                  */
677         }
678
679         /*
680          * Does the new cr3 value map to physical memory? (Note, we
681          * catch an invalid cr3 even in real-mode, because it would
682          * cause trouble later on when we turn on paging anyway.)
683          *
684          * A real CPU would silently accept an invalid cr3 and would
685          * attempt to use it - with largely undefined (and often hard
686          * to debug) behavior on the guest side.
687          */
688         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
689                 return 1;
690         vcpu->arch.cr3 = cr3;
691         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
692         vcpu->arch.mmu.new_cr3(vcpu);
693         return 0;
694 }
695 EXPORT_SYMBOL_GPL(kvm_set_cr3);
696
697 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
698 {
699         if (cr8 & CR8_RESERVED_BITS)
700                 return 1;
701         if (irqchip_in_kernel(vcpu->kvm))
702                 kvm_lapic_set_tpr(vcpu, cr8);
703         else
704                 vcpu->arch.cr8 = cr8;
705         return 0;
706 }
707 EXPORT_SYMBOL_GPL(kvm_set_cr8);
708
709 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
710 {
711         if (irqchip_in_kernel(vcpu->kvm))
712                 return kvm_lapic_get_cr8(vcpu);
713         else
714                 return vcpu->arch.cr8;
715 }
716 EXPORT_SYMBOL_GPL(kvm_get_cr8);
717
718 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
719 {
720         switch (dr) {
721         case 0 ... 3:
722                 vcpu->arch.db[dr] = val;
723                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
724                         vcpu->arch.eff_db[dr] = val;
725                 break;
726         case 4:
727                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
728                         return 1; /* #UD */
729                 /* fall through */
730         case 6:
731                 if (val & 0xffffffff00000000ULL)
732                         return -1; /* #GP */
733                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
734                 break;
735         case 5:
736                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
737                         return 1; /* #UD */
738                 /* fall through */
739         default: /* 7 */
740                 if (val & 0xffffffff00000000ULL)
741                         return -1; /* #GP */
742                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
743                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
744                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
745                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
746                 }
747                 break;
748         }
749
750         return 0;
751 }
752
753 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
754 {
755         int res;
756
757         res = __kvm_set_dr(vcpu, dr, val);
758         if (res > 0)
759                 kvm_queue_exception(vcpu, UD_VECTOR);
760         else if (res < 0)
761                 kvm_inject_gp(vcpu, 0);
762
763         return res;
764 }
765 EXPORT_SYMBOL_GPL(kvm_set_dr);
766
767 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
768 {
769         switch (dr) {
770         case 0 ... 3:
771                 *val = vcpu->arch.db[dr];
772                 break;
773         case 4:
774                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
775                         return 1;
776                 /* fall through */
777         case 6:
778                 *val = vcpu->arch.dr6;
779                 break;
780         case 5:
781                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
782                         return 1;
783                 /* fall through */
784         default: /* 7 */
785                 *val = vcpu->arch.dr7;
786                 break;
787         }
788
789         return 0;
790 }
791
792 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
793 {
794         if (_kvm_get_dr(vcpu, dr, val)) {
795                 kvm_queue_exception(vcpu, UD_VECTOR);
796                 return 1;
797         }
798         return 0;
799 }
800 EXPORT_SYMBOL_GPL(kvm_get_dr);
801
802 /*
803  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
804  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
805  *
806  * This list is modified at module load time to reflect the
807  * capabilities of the host cpu. This capabilities test skips MSRs that are
808  * kvm-specific. Those are put in the beginning of the list.
809  */
810
811 #define KVM_SAVE_MSRS_BEGIN     9
812 static u32 msrs_to_save[] = {
813         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
814         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
815         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
816         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
817         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
818         MSR_STAR,
819 #ifdef CONFIG_X86_64
820         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
821 #endif
822         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
823 };
824
825 static unsigned num_msrs_to_save;
826
827 static u32 emulated_msrs[] = {
828         MSR_IA32_MISC_ENABLE,
829         MSR_IA32_MCG_STATUS,
830         MSR_IA32_MCG_CTL,
831 };
832
833 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
834 {
835         u64 old_efer = vcpu->arch.efer;
836
837         if (efer & efer_reserved_bits)
838                 return 1;
839
840         if (is_paging(vcpu)
841             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
842                 return 1;
843
844         if (efer & EFER_FFXSR) {
845                 struct kvm_cpuid_entry2 *feat;
846
847                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
848                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
849                         return 1;
850         }
851
852         if (efer & EFER_SVME) {
853                 struct kvm_cpuid_entry2 *feat;
854
855                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
856                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
857                         return 1;
858         }
859
860         efer &= ~EFER_LMA;
861         efer |= vcpu->arch.efer & EFER_LMA;
862
863         kvm_x86_ops->set_efer(vcpu, efer);
864
865         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
866
867         /* Update reserved bits */
868         if ((efer ^ old_efer) & EFER_NX)
869                 kvm_mmu_reset_context(vcpu);
870
871         return 0;
872 }
873
874 void kvm_enable_efer_bits(u64 mask)
875 {
876        efer_reserved_bits &= ~mask;
877 }
878 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
879
880
881 /*
882  * Writes msr value into into the appropriate "register".
883  * Returns 0 on success, non-0 otherwise.
884  * Assumes vcpu_load() was already called.
885  */
886 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
887 {
888         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
889 }
890
891 /*
892  * Adapt set_msr() to msr_io()'s calling convention
893  */
894 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
895 {
896         return kvm_set_msr(vcpu, index, *data);
897 }
898
899 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
900 {
901         int version;
902         int r;
903         struct pvclock_wall_clock wc;
904         struct timespec boot;
905
906         if (!wall_clock)
907                 return;
908
909         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
910         if (r)
911                 return;
912
913         if (version & 1)
914                 ++version;  /* first time write, random junk */
915
916         ++version;
917
918         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
919
920         /*
921          * The guest calculates current wall clock time by adding
922          * system time (updated by kvm_guest_time_update below) to the
923          * wall clock specified here.  guest system time equals host
924          * system time for us, thus we must fill in host boot time here.
925          */
926         getboottime(&boot);
927
928         wc.sec = boot.tv_sec;
929         wc.nsec = boot.tv_nsec;
930         wc.version = version;
931
932         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
933
934         version++;
935         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
936 }
937
938 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
939 {
940         uint32_t quotient, remainder;
941
942         /* Don't try to replace with do_div(), this one calculates
943          * "(dividend << 32) / divisor" */
944         __asm__ ( "divl %4"
945                   : "=a" (quotient), "=d" (remainder)
946                   : "0" (0), "1" (dividend), "r" (divisor) );
947         return quotient;
948 }
949
950 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
951                                s8 *pshift, u32 *pmultiplier)
952 {
953         uint64_t scaled64;
954         int32_t  shift = 0;
955         uint64_t tps64;
956         uint32_t tps32;
957
958         tps64 = base_khz * 1000LL;
959         scaled64 = scaled_khz * 1000LL;
960         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
961                 tps64 >>= 1;
962                 shift--;
963         }
964
965         tps32 = (uint32_t)tps64;
966         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
967                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
968                         scaled64 >>= 1;
969                 else
970                         tps32 <<= 1;
971                 shift++;
972         }
973
974         *pshift = shift;
975         *pmultiplier = div_frac(scaled64, tps32);
976
977         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
978                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
979 }
980
981 static inline u64 get_kernel_ns(void)
982 {
983         struct timespec ts;
984
985         WARN_ON(preemptible());
986         ktime_get_ts(&ts);
987         monotonic_to_bootbased(&ts);
988         return timespec_to_ns(&ts);
989 }
990
991 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
992 unsigned long max_tsc_khz;
993
994 static inline int kvm_tsc_changes_freq(void)
995 {
996         int cpu = get_cpu();
997         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
998                   cpufreq_quick_get(cpu) != 0;
999         put_cpu();
1000         return ret;
1001 }
1002
1003 static u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
1004 {
1005         if (vcpu->arch.virtual_tsc_khz)
1006                 return vcpu->arch.virtual_tsc_khz;
1007         else
1008                 return __this_cpu_read(cpu_tsc_khz);
1009 }
1010
1011 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1012 {
1013         u64 ret;
1014
1015         WARN_ON(preemptible());
1016         if (kvm_tsc_changes_freq())
1017                 printk_once(KERN_WARNING
1018                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
1019         ret = nsec * vcpu_tsc_khz(vcpu);
1020         do_div(ret, USEC_PER_SEC);
1021         return ret;
1022 }
1023
1024 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1025 {
1026         /* Compute a scale to convert nanoseconds in TSC cycles */
1027         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1028                            &vcpu->arch.tsc_catchup_shift,
1029                            &vcpu->arch.tsc_catchup_mult);
1030 }
1031
1032 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1033 {
1034         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1035                                       vcpu->arch.tsc_catchup_mult,
1036                                       vcpu->arch.tsc_catchup_shift);
1037         tsc += vcpu->arch.last_tsc_write;
1038         return tsc;
1039 }
1040
1041 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1042 {
1043         struct kvm *kvm = vcpu->kvm;
1044         u64 offset, ns, elapsed;
1045         unsigned long flags;
1046         s64 sdiff;
1047
1048         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1049         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1050         ns = get_kernel_ns();
1051         elapsed = ns - kvm->arch.last_tsc_nsec;
1052         sdiff = data - kvm->arch.last_tsc_write;
1053         if (sdiff < 0)
1054                 sdiff = -sdiff;
1055
1056         /*
1057          * Special case: close write to TSC within 5 seconds of
1058          * another CPU is interpreted as an attempt to synchronize
1059          * The 5 seconds is to accommodate host load / swapping as
1060          * well as any reset of TSC during the boot process.
1061          *
1062          * In that case, for a reliable TSC, we can match TSC offsets,
1063          * or make a best guest using elapsed value.
1064          */
1065         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1066             elapsed < 5ULL * NSEC_PER_SEC) {
1067                 if (!check_tsc_unstable()) {
1068                         offset = kvm->arch.last_tsc_offset;
1069                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1070                 } else {
1071                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1072                         offset += delta;
1073                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1074                 }
1075                 ns = kvm->arch.last_tsc_nsec;
1076         }
1077         kvm->arch.last_tsc_nsec = ns;
1078         kvm->arch.last_tsc_write = data;
1079         kvm->arch.last_tsc_offset = offset;
1080         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1081         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1082
1083         /* Reset of TSC must disable overshoot protection below */
1084         vcpu->arch.hv_clock.tsc_timestamp = 0;
1085         vcpu->arch.last_tsc_write = data;
1086         vcpu->arch.last_tsc_nsec = ns;
1087 }
1088 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1089
1090 static int kvm_guest_time_update(struct kvm_vcpu *v)
1091 {
1092         unsigned long flags;
1093         struct kvm_vcpu_arch *vcpu = &v->arch;
1094         void *shared_kaddr;
1095         unsigned long this_tsc_khz;
1096         s64 kernel_ns, max_kernel_ns;
1097         u64 tsc_timestamp;
1098
1099         /* Keep irq disabled to prevent changes to the clock */
1100         local_irq_save(flags);
1101         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1102         kernel_ns = get_kernel_ns();
1103         this_tsc_khz = vcpu_tsc_khz(v);
1104         if (unlikely(this_tsc_khz == 0)) {
1105                 local_irq_restore(flags);
1106                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1107                 return 1;
1108         }
1109
1110         /*
1111          * We may have to catch up the TSC to match elapsed wall clock
1112          * time for two reasons, even if kvmclock is used.
1113          *   1) CPU could have been running below the maximum TSC rate
1114          *   2) Broken TSC compensation resets the base at each VCPU
1115          *      entry to avoid unknown leaps of TSC even when running
1116          *      again on the same CPU.  This may cause apparent elapsed
1117          *      time to disappear, and the guest to stand still or run
1118          *      very slowly.
1119          */
1120         if (vcpu->tsc_catchup) {
1121                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1122                 if (tsc > tsc_timestamp) {
1123                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1124                         tsc_timestamp = tsc;
1125                 }
1126         }
1127
1128         local_irq_restore(flags);
1129
1130         if (!vcpu->time_page)
1131                 return 0;
1132
1133         /*
1134          * Time as measured by the TSC may go backwards when resetting the base
1135          * tsc_timestamp.  The reason for this is that the TSC resolution is
1136          * higher than the resolution of the other clock scales.  Thus, many
1137          * possible measurments of the TSC correspond to one measurement of any
1138          * other clock, and so a spread of values is possible.  This is not a
1139          * problem for the computation of the nanosecond clock; with TSC rates
1140          * around 1GHZ, there can only be a few cycles which correspond to one
1141          * nanosecond value, and any path through this code will inevitably
1142          * take longer than that.  However, with the kernel_ns value itself,
1143          * the precision may be much lower, down to HZ granularity.  If the
1144          * first sampling of TSC against kernel_ns ends in the low part of the
1145          * range, and the second in the high end of the range, we can get:
1146          *
1147          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1148          *
1149          * As the sampling errors potentially range in the thousands of cycles,
1150          * it is possible such a time value has already been observed by the
1151          * guest.  To protect against this, we must compute the system time as
1152          * observed by the guest and ensure the new system time is greater.
1153          */
1154         max_kernel_ns = 0;
1155         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1156                 max_kernel_ns = vcpu->last_guest_tsc -
1157                                 vcpu->hv_clock.tsc_timestamp;
1158                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1159                                     vcpu->hv_clock.tsc_to_system_mul,
1160                                     vcpu->hv_clock.tsc_shift);
1161                 max_kernel_ns += vcpu->last_kernel_ns;
1162         }
1163
1164         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1165                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1166                                    &vcpu->hv_clock.tsc_shift,
1167                                    &vcpu->hv_clock.tsc_to_system_mul);
1168                 vcpu->hw_tsc_khz = this_tsc_khz;
1169         }
1170
1171         if (max_kernel_ns > kernel_ns)
1172                 kernel_ns = max_kernel_ns;
1173
1174         /* With all the info we got, fill in the values */
1175         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1176         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1177         vcpu->last_kernel_ns = kernel_ns;
1178         vcpu->last_guest_tsc = tsc_timestamp;
1179         vcpu->hv_clock.flags = 0;
1180
1181         /*
1182          * The interface expects us to write an even number signaling that the
1183          * update is finished. Since the guest won't see the intermediate
1184          * state, we just increase by 2 at the end.
1185          */
1186         vcpu->hv_clock.version += 2;
1187
1188         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1189
1190         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1191                sizeof(vcpu->hv_clock));
1192
1193         kunmap_atomic(shared_kaddr, KM_USER0);
1194
1195         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1196         return 0;
1197 }
1198
1199 static bool msr_mtrr_valid(unsigned msr)
1200 {
1201         switch (msr) {
1202         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1203         case MSR_MTRRfix64K_00000:
1204         case MSR_MTRRfix16K_80000:
1205         case MSR_MTRRfix16K_A0000:
1206         case MSR_MTRRfix4K_C0000:
1207         case MSR_MTRRfix4K_C8000:
1208         case MSR_MTRRfix4K_D0000:
1209         case MSR_MTRRfix4K_D8000:
1210         case MSR_MTRRfix4K_E0000:
1211         case MSR_MTRRfix4K_E8000:
1212         case MSR_MTRRfix4K_F0000:
1213         case MSR_MTRRfix4K_F8000:
1214         case MSR_MTRRdefType:
1215         case MSR_IA32_CR_PAT:
1216                 return true;
1217         case 0x2f8:
1218                 return true;
1219         }
1220         return false;
1221 }
1222
1223 static bool valid_pat_type(unsigned t)
1224 {
1225         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1226 }
1227
1228 static bool valid_mtrr_type(unsigned t)
1229 {
1230         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1231 }
1232
1233 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1234 {
1235         int i;
1236
1237         if (!msr_mtrr_valid(msr))
1238                 return false;
1239
1240         if (msr == MSR_IA32_CR_PAT) {
1241                 for (i = 0; i < 8; i++)
1242                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1243                                 return false;
1244                 return true;
1245         } else if (msr == MSR_MTRRdefType) {
1246                 if (data & ~0xcff)
1247                         return false;
1248                 return valid_mtrr_type(data & 0xff);
1249         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1250                 for (i = 0; i < 8 ; i++)
1251                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1252                                 return false;
1253                 return true;
1254         }
1255
1256         /* variable MTRRs */
1257         return valid_mtrr_type(data & 0xff);
1258 }
1259
1260 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1261 {
1262         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1263
1264         if (!mtrr_valid(vcpu, msr, data))
1265                 return 1;
1266
1267         if (msr == MSR_MTRRdefType) {
1268                 vcpu->arch.mtrr_state.def_type = data;
1269                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1270         } else if (msr == MSR_MTRRfix64K_00000)
1271                 p[0] = data;
1272         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1273                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1274         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1275                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1276         else if (msr == MSR_IA32_CR_PAT)
1277                 vcpu->arch.pat = data;
1278         else {  /* Variable MTRRs */
1279                 int idx, is_mtrr_mask;
1280                 u64 *pt;
1281
1282                 idx = (msr - 0x200) / 2;
1283                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1284                 if (!is_mtrr_mask)
1285                         pt =
1286                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1287                 else
1288                         pt =
1289                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1290                 *pt = data;
1291         }
1292
1293         kvm_mmu_reset_context(vcpu);
1294         return 0;
1295 }
1296
1297 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1298 {
1299         u64 mcg_cap = vcpu->arch.mcg_cap;
1300         unsigned bank_num = mcg_cap & 0xff;
1301
1302         switch (msr) {
1303         case MSR_IA32_MCG_STATUS:
1304                 vcpu->arch.mcg_status = data;
1305                 break;
1306         case MSR_IA32_MCG_CTL:
1307                 if (!(mcg_cap & MCG_CTL_P))
1308                         return 1;
1309                 if (data != 0 && data != ~(u64)0)
1310                         return -1;
1311                 vcpu->arch.mcg_ctl = data;
1312                 break;
1313         default:
1314                 if (msr >= MSR_IA32_MC0_CTL &&
1315                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1316                         u32 offset = msr - MSR_IA32_MC0_CTL;
1317                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1318                          * some Linux kernels though clear bit 10 in bank 4 to
1319                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1320                          * this to avoid an uncatched #GP in the guest
1321                          */
1322                         if ((offset & 0x3) == 0 &&
1323                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1324                                 return -1;
1325                         vcpu->arch.mce_banks[offset] = data;
1326                         break;
1327                 }
1328                 return 1;
1329         }
1330         return 0;
1331 }
1332
1333 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1334 {
1335         struct kvm *kvm = vcpu->kvm;
1336         int lm = is_long_mode(vcpu);
1337         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1338                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1339         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1340                 : kvm->arch.xen_hvm_config.blob_size_32;
1341         u32 page_num = data & ~PAGE_MASK;
1342         u64 page_addr = data & PAGE_MASK;
1343         u8 *page;
1344         int r;
1345
1346         r = -E2BIG;
1347         if (page_num >= blob_size)
1348                 goto out;
1349         r = -ENOMEM;
1350         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1351         if (!page)
1352                 goto out;
1353         r = -EFAULT;
1354         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1355                 goto out_free;
1356         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1357                 goto out_free;
1358         r = 0;
1359 out_free:
1360         kfree(page);
1361 out:
1362         return r;
1363 }
1364
1365 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1366 {
1367         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1368 }
1369
1370 static bool kvm_hv_msr_partition_wide(u32 msr)
1371 {
1372         bool r = false;
1373         switch (msr) {
1374         case HV_X64_MSR_GUEST_OS_ID:
1375         case HV_X64_MSR_HYPERCALL:
1376                 r = true;
1377                 break;
1378         }
1379
1380         return r;
1381 }
1382
1383 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1384 {
1385         struct kvm *kvm = vcpu->kvm;
1386
1387         switch (msr) {
1388         case HV_X64_MSR_GUEST_OS_ID:
1389                 kvm->arch.hv_guest_os_id = data;
1390                 /* setting guest os id to zero disables hypercall page */
1391                 if (!kvm->arch.hv_guest_os_id)
1392                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1393                 break;
1394         case HV_X64_MSR_HYPERCALL: {
1395                 u64 gfn;
1396                 unsigned long addr;
1397                 u8 instructions[4];
1398
1399                 /* if guest os id is not set hypercall should remain disabled */
1400                 if (!kvm->arch.hv_guest_os_id)
1401                         break;
1402                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1403                         kvm->arch.hv_hypercall = data;
1404                         break;
1405                 }
1406                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1407                 addr = gfn_to_hva(kvm, gfn);
1408                 if (kvm_is_error_hva(addr))
1409                         return 1;
1410                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1411                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1412                 if (__copy_to_user((void __user *)addr, instructions, 4))
1413                         return 1;
1414                 kvm->arch.hv_hypercall = data;
1415                 break;
1416         }
1417         default:
1418                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1419                           "data 0x%llx\n", msr, data);
1420                 return 1;
1421         }
1422         return 0;
1423 }
1424
1425 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1426 {
1427         switch (msr) {
1428         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1429                 unsigned long addr;
1430
1431                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1432                         vcpu->arch.hv_vapic = data;
1433                         break;
1434                 }
1435                 addr = gfn_to_hva(vcpu->kvm, data >>
1436                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1437                 if (kvm_is_error_hva(addr))
1438                         return 1;
1439                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1440                         return 1;
1441                 vcpu->arch.hv_vapic = data;
1442                 break;
1443         }
1444         case HV_X64_MSR_EOI:
1445                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1446         case HV_X64_MSR_ICR:
1447                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1448         case HV_X64_MSR_TPR:
1449                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1450         default:
1451                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1452                           "data 0x%llx\n", msr, data);
1453                 return 1;
1454         }
1455
1456         return 0;
1457 }
1458
1459 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1460 {
1461         gpa_t gpa = data & ~0x3f;
1462
1463         /* Bits 2:5 are resrved, Should be zero */
1464         if (data & 0x3c)
1465                 return 1;
1466
1467         vcpu->arch.apf.msr_val = data;
1468
1469         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1470                 kvm_clear_async_pf_completion_queue(vcpu);
1471                 kvm_async_pf_hash_reset(vcpu);
1472                 return 0;
1473         }
1474
1475         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1476                 return 1;
1477
1478         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1479         kvm_async_pf_wakeup_all(vcpu);
1480         return 0;
1481 }
1482
1483 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1484 {
1485         if (vcpu->arch.time_page) {
1486                 kvm_release_page_dirty(vcpu->arch.time_page);
1487                 vcpu->arch.time_page = NULL;
1488         }
1489 }
1490
1491 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1492 {
1493         u64 delta;
1494
1495         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1496                 return;
1497
1498         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1499         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1500         vcpu->arch.st.accum_steal = delta;
1501 }
1502
1503 static void record_steal_time(struct kvm_vcpu *vcpu)
1504 {
1505         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1506                 return;
1507
1508         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1509                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1510                 return;
1511
1512         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1513         vcpu->arch.st.steal.version += 2;
1514         vcpu->arch.st.accum_steal = 0;
1515
1516         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1517                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1518 }
1519
1520 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1521 {
1522         switch (msr) {
1523         case MSR_EFER:
1524                 return set_efer(vcpu, data);
1525         case MSR_K7_HWCR:
1526                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1527                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1528                 if (data != 0) {
1529                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1530                                 data);
1531                         return 1;
1532                 }
1533                 break;
1534         case MSR_FAM10H_MMIO_CONF_BASE:
1535                 if (data != 0) {
1536                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1537                                 "0x%llx\n", data);
1538                         return 1;
1539                 }
1540                 break;
1541         case MSR_AMD64_NB_CFG:
1542                 break;
1543         case MSR_IA32_DEBUGCTLMSR:
1544                 if (!data) {
1545                         /* We support the non-activated case already */
1546                         break;
1547                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1548                         /* Values other than LBR and BTF are vendor-specific,
1549                            thus reserved and should throw a #GP */
1550                         return 1;
1551                 }
1552                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1553                         __func__, data);
1554                 break;
1555         case MSR_IA32_UCODE_REV:
1556         case MSR_IA32_UCODE_WRITE:
1557         case MSR_VM_HSAVE_PA:
1558         case MSR_AMD64_PATCH_LOADER:
1559                 break;
1560         case 0x200 ... 0x2ff:
1561                 return set_msr_mtrr(vcpu, msr, data);
1562         case MSR_IA32_APICBASE:
1563                 kvm_set_apic_base(vcpu, data);
1564                 break;
1565         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1566                 return kvm_x2apic_msr_write(vcpu, msr, data);
1567         case MSR_IA32_MISC_ENABLE:
1568                 vcpu->arch.ia32_misc_enable_msr = data;
1569                 break;
1570         case MSR_KVM_WALL_CLOCK_NEW:
1571         case MSR_KVM_WALL_CLOCK:
1572                 vcpu->kvm->arch.wall_clock = data;
1573                 kvm_write_wall_clock(vcpu->kvm, data);
1574                 break;
1575         case MSR_KVM_SYSTEM_TIME_NEW:
1576         case MSR_KVM_SYSTEM_TIME: {
1577                 kvmclock_reset(vcpu);
1578
1579                 vcpu->arch.time = data;
1580                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1581
1582                 /* we verify if the enable bit is set... */
1583                 if (!(data & 1))
1584                         break;
1585
1586                 /* ...but clean it before doing the actual write */
1587                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1588
1589                 vcpu->arch.time_page =
1590                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1591
1592                 if (is_error_page(vcpu->arch.time_page)) {
1593                         kvm_release_page_clean(vcpu->arch.time_page);
1594                         vcpu->arch.time_page = NULL;
1595                 }
1596                 break;
1597         }
1598         case MSR_KVM_ASYNC_PF_EN:
1599                 if (kvm_pv_enable_async_pf(vcpu, data))
1600                         return 1;
1601                 break;
1602         case MSR_KVM_STEAL_TIME:
1603
1604                 if (unlikely(!sched_info_on()))
1605                         return 1;
1606
1607                 if (data & KVM_STEAL_RESERVED_MASK)
1608                         return 1;
1609
1610                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1611                                                         data & KVM_STEAL_VALID_BITS))
1612                         return 1;
1613
1614                 vcpu->arch.st.msr_val = data;
1615
1616                 if (!(data & KVM_MSR_ENABLED))
1617                         break;
1618
1619                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1620
1621                 preempt_disable();
1622                 accumulate_steal_time(vcpu);
1623                 preempt_enable();
1624
1625                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1626
1627                 break;
1628
1629         case MSR_IA32_MCG_CTL:
1630         case MSR_IA32_MCG_STATUS:
1631         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1632                 return set_msr_mce(vcpu, msr, data);
1633
1634         /* Performance counters are not protected by a CPUID bit,
1635          * so we should check all of them in the generic path for the sake of
1636          * cross vendor migration.
1637          * Writing a zero into the event select MSRs disables them,
1638          * which we perfectly emulate ;-). Any other value should be at least
1639          * reported, some guests depend on them.
1640          */
1641         case MSR_P6_EVNTSEL0:
1642         case MSR_P6_EVNTSEL1:
1643         case MSR_K7_EVNTSEL0:
1644         case MSR_K7_EVNTSEL1:
1645         case MSR_K7_EVNTSEL2:
1646         case MSR_K7_EVNTSEL3:
1647                 if (data != 0)
1648                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1649                                 "0x%x data 0x%llx\n", msr, data);
1650                 break;
1651         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1652          * so we ignore writes to make it happy.
1653          */
1654         case MSR_P6_PERFCTR0:
1655         case MSR_P6_PERFCTR1:
1656         case MSR_K7_PERFCTR0:
1657         case MSR_K7_PERFCTR1:
1658         case MSR_K7_PERFCTR2:
1659         case MSR_K7_PERFCTR3:
1660                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1661                         "0x%x data 0x%llx\n", msr, data);
1662                 break;
1663         case MSR_K7_CLK_CTL:
1664                 /*
1665                  * Ignore all writes to this no longer documented MSR.
1666                  * Writes are only relevant for old K7 processors,
1667                  * all pre-dating SVM, but a recommended workaround from
1668                  * AMD for these chips. It is possible to speicify the
1669                  * affected processor models on the command line, hence
1670                  * the need to ignore the workaround.
1671                  */
1672                 break;
1673         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1674                 if (kvm_hv_msr_partition_wide(msr)) {
1675                         int r;
1676                         mutex_lock(&vcpu->kvm->lock);
1677                         r = set_msr_hyperv_pw(vcpu, msr, data);
1678                         mutex_unlock(&vcpu->kvm->lock);
1679                         return r;
1680                 } else
1681                         return set_msr_hyperv(vcpu, msr, data);
1682                 break;
1683         case MSR_IA32_BBL_CR_CTL3:
1684                 /* Drop writes to this legacy MSR -- see rdmsr
1685                  * counterpart for further detail.
1686                  */
1687                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1688                 break;
1689         default:
1690                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1691                         return xen_hvm_config(vcpu, data);
1692                 if (!ignore_msrs) {
1693                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1694                                 msr, data);
1695                         return 1;
1696                 } else {
1697                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1698                                 msr, data);
1699                         break;
1700                 }
1701         }
1702         return 0;
1703 }
1704 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1705
1706
1707 /*
1708  * Reads an msr value (of 'msr_index') into 'pdata'.
1709  * Returns 0 on success, non-0 otherwise.
1710  * Assumes vcpu_load() was already called.
1711  */
1712 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1713 {
1714         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1715 }
1716
1717 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1718 {
1719         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1720
1721         if (!msr_mtrr_valid(msr))
1722                 return 1;
1723
1724         if (msr == MSR_MTRRdefType)
1725                 *pdata = vcpu->arch.mtrr_state.def_type +
1726                          (vcpu->arch.mtrr_state.enabled << 10);
1727         else if (msr == MSR_MTRRfix64K_00000)
1728                 *pdata = p[0];
1729         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1730                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1731         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1732                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1733         else if (msr == MSR_IA32_CR_PAT)
1734                 *pdata = vcpu->arch.pat;
1735         else {  /* Variable MTRRs */
1736                 int idx, is_mtrr_mask;
1737                 u64 *pt;
1738
1739                 idx = (msr - 0x200) / 2;
1740                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1741                 if (!is_mtrr_mask)
1742                         pt =
1743                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1744                 else
1745                         pt =
1746                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1747                 *pdata = *pt;
1748         }
1749
1750         return 0;
1751 }
1752
1753 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1754 {
1755         u64 data;
1756         u64 mcg_cap = vcpu->arch.mcg_cap;
1757         unsigned bank_num = mcg_cap & 0xff;
1758
1759         switch (msr) {
1760         case MSR_IA32_P5_MC_ADDR:
1761         case MSR_IA32_P5_MC_TYPE:
1762                 data = 0;
1763                 break;
1764         case MSR_IA32_MCG_CAP:
1765                 data = vcpu->arch.mcg_cap;
1766                 break;
1767         case MSR_IA32_MCG_CTL:
1768                 if (!(mcg_cap & MCG_CTL_P))
1769                         return 1;
1770                 data = vcpu->arch.mcg_ctl;
1771                 break;
1772         case MSR_IA32_MCG_STATUS:
1773                 data = vcpu->arch.mcg_status;
1774                 break;
1775         default:
1776                 if (msr >= MSR_IA32_MC0_CTL &&
1777                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1778                         u32 offset = msr - MSR_IA32_MC0_CTL;
1779                         data = vcpu->arch.mce_banks[offset];
1780                         break;
1781                 }
1782                 return 1;
1783         }
1784         *pdata = data;
1785         return 0;
1786 }
1787
1788 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1789 {
1790         u64 data = 0;
1791         struct kvm *kvm = vcpu->kvm;
1792
1793         switch (msr) {
1794         case HV_X64_MSR_GUEST_OS_ID:
1795                 data = kvm->arch.hv_guest_os_id;
1796                 break;
1797         case HV_X64_MSR_HYPERCALL:
1798                 data = kvm->arch.hv_hypercall;
1799                 break;
1800         default:
1801                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1802                 return 1;
1803         }
1804
1805         *pdata = data;
1806         return 0;
1807 }
1808
1809 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1810 {
1811         u64 data = 0;
1812
1813         switch (msr) {
1814         case HV_X64_MSR_VP_INDEX: {
1815                 int r;
1816                 struct kvm_vcpu *v;
1817                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1818                         if (v == vcpu)
1819                                 data = r;
1820                 break;
1821         }
1822         case HV_X64_MSR_EOI:
1823                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1824         case HV_X64_MSR_ICR:
1825                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1826         case HV_X64_MSR_TPR:
1827                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1828         case HV_X64_MSR_APIC_ASSIST_PAGE:
1829                 data = vcpu->arch.hv_vapic;
1830                 break;
1831         default:
1832                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1833                 return 1;
1834         }
1835         *pdata = data;
1836         return 0;
1837 }
1838
1839 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1840 {
1841         u64 data;
1842
1843         switch (msr) {
1844         case MSR_IA32_PLATFORM_ID:
1845         case MSR_IA32_EBL_CR_POWERON:
1846         case MSR_IA32_DEBUGCTLMSR:
1847         case MSR_IA32_LASTBRANCHFROMIP:
1848         case MSR_IA32_LASTBRANCHTOIP:
1849         case MSR_IA32_LASTINTFROMIP:
1850         case MSR_IA32_LASTINTTOIP:
1851         case MSR_K8_SYSCFG:
1852         case MSR_K7_HWCR:
1853         case MSR_VM_HSAVE_PA:
1854         case MSR_P6_PERFCTR0:
1855         case MSR_P6_PERFCTR1:
1856         case MSR_P6_EVNTSEL0:
1857         case MSR_P6_EVNTSEL1:
1858         case MSR_K7_EVNTSEL0:
1859         case MSR_K7_PERFCTR0:
1860         case MSR_K8_INT_PENDING_MSG:
1861         case MSR_AMD64_NB_CFG:
1862         case MSR_FAM10H_MMIO_CONF_BASE:
1863                 data = 0;
1864                 break;
1865         case MSR_IA32_UCODE_REV:
1866                 data = 0x100000000ULL;
1867                 break;
1868         case MSR_MTRRcap:
1869                 data = 0x500 | KVM_NR_VAR_MTRR;
1870                 break;
1871         case 0x200 ... 0x2ff:
1872                 return get_msr_mtrr(vcpu, msr, pdata);
1873         case 0xcd: /* fsb frequency */
1874                 data = 3;
1875                 break;
1876                 /*
1877                  * MSR_EBC_FREQUENCY_ID
1878                  * Conservative value valid for even the basic CPU models.
1879                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1880                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1881                  * and 266MHz for model 3, or 4. Set Core Clock
1882                  * Frequency to System Bus Frequency Ratio to 1 (bits
1883                  * 31:24) even though these are only valid for CPU
1884                  * models > 2, however guests may end up dividing or
1885                  * multiplying by zero otherwise.
1886                  */
1887         case MSR_EBC_FREQUENCY_ID:
1888                 data = 1 << 24;
1889                 break;
1890         case MSR_IA32_APICBASE:
1891                 data = kvm_get_apic_base(vcpu);
1892                 break;
1893         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1894                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1895                 break;
1896         case MSR_IA32_MISC_ENABLE:
1897                 data = vcpu->arch.ia32_misc_enable_msr;
1898                 break;
1899         case MSR_IA32_PERF_STATUS:
1900                 /* TSC increment by tick */
1901                 data = 1000ULL;
1902                 /* CPU multiplier */
1903                 data |= (((uint64_t)4ULL) << 40);
1904                 break;
1905         case MSR_EFER:
1906                 data = vcpu->arch.efer;
1907                 break;
1908         case MSR_KVM_WALL_CLOCK:
1909         case MSR_KVM_WALL_CLOCK_NEW:
1910                 data = vcpu->kvm->arch.wall_clock;
1911                 break;
1912         case MSR_KVM_SYSTEM_TIME:
1913         case MSR_KVM_SYSTEM_TIME_NEW:
1914                 data = vcpu->arch.time;
1915                 break;
1916         case MSR_KVM_ASYNC_PF_EN:
1917                 data = vcpu->arch.apf.msr_val;
1918                 break;
1919         case MSR_KVM_STEAL_TIME:
1920                 data = vcpu->arch.st.msr_val;
1921                 break;
1922         case MSR_IA32_P5_MC_ADDR:
1923         case MSR_IA32_P5_MC_TYPE:
1924         case MSR_IA32_MCG_CAP:
1925         case MSR_IA32_MCG_CTL:
1926         case MSR_IA32_MCG_STATUS:
1927         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1928                 return get_msr_mce(vcpu, msr, pdata);
1929         case MSR_K7_CLK_CTL:
1930                 /*
1931                  * Provide expected ramp-up count for K7. All other
1932                  * are set to zero, indicating minimum divisors for
1933                  * every field.
1934                  *
1935                  * This prevents guest kernels on AMD host with CPU
1936                  * type 6, model 8 and higher from exploding due to
1937                  * the rdmsr failing.
1938                  */
1939                 data = 0x20000000;
1940                 break;
1941         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1942                 if (kvm_hv_msr_partition_wide(msr)) {
1943                         int r;
1944                         mutex_lock(&vcpu->kvm->lock);
1945                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1946                         mutex_unlock(&vcpu->kvm->lock);
1947                         return r;
1948                 } else
1949                         return get_msr_hyperv(vcpu, msr, pdata);
1950                 break;
1951         case MSR_IA32_BBL_CR_CTL3:
1952                 /* This legacy MSR exists but isn't fully documented in current
1953                  * silicon.  It is however accessed by winxp in very narrow
1954                  * scenarios where it sets bit #19, itself documented as
1955                  * a "reserved" bit.  Best effort attempt to source coherent
1956                  * read data here should the balance of the register be
1957                  * interpreted by the guest:
1958                  *
1959                  * L2 cache control register 3: 64GB range, 256KB size,
1960                  * enabled, latency 0x1, configured
1961                  */
1962                 data = 0xbe702111;
1963                 break;
1964         default:
1965                 if (!ignore_msrs) {
1966                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1967                         return 1;
1968                 } else {
1969                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1970                         data = 0;
1971                 }
1972                 break;
1973         }
1974         *pdata = data;
1975         return 0;
1976 }
1977 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1978
1979 /*
1980  * Read or write a bunch of msrs. All parameters are kernel addresses.
1981  *
1982  * @return number of msrs set successfully.
1983  */
1984 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1985                     struct kvm_msr_entry *entries,
1986                     int (*do_msr)(struct kvm_vcpu *vcpu,
1987                                   unsigned index, u64 *data))
1988 {
1989         int i, idx;
1990
1991         idx = srcu_read_lock(&vcpu->kvm->srcu);
1992         for (i = 0; i < msrs->nmsrs; ++i)
1993                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1994                         break;
1995         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1996
1997         return i;
1998 }
1999
2000 /*
2001  * Read or write a bunch of msrs. Parameters are user addresses.
2002  *
2003  * @return number of msrs set successfully.
2004  */
2005 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2006                   int (*do_msr)(struct kvm_vcpu *vcpu,
2007                                 unsigned index, u64 *data),
2008                   int writeback)
2009 {
2010         struct kvm_msrs msrs;
2011         struct kvm_msr_entry *entries;
2012         int r, n;
2013         unsigned size;
2014
2015         r = -EFAULT;
2016         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2017                 goto out;
2018
2019         r = -E2BIG;
2020         if (msrs.nmsrs >= MAX_IO_MSRS)
2021                 goto out;
2022
2023         r = -ENOMEM;
2024         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2025         entries = kmalloc(size, GFP_KERNEL);
2026         if (!entries)
2027                 goto out;
2028
2029         r = -EFAULT;
2030         if (copy_from_user(entries, user_msrs->entries, size))
2031                 goto out_free;
2032
2033         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2034         if (r < 0)
2035                 goto out_free;
2036
2037         r = -EFAULT;
2038         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2039                 goto out_free;
2040
2041         r = n;
2042
2043 out_free:
2044         kfree(entries);
2045 out:
2046         return r;
2047 }
2048
2049 int kvm_dev_ioctl_check_extension(long ext)
2050 {
2051         int r;
2052
2053         switch (ext) {
2054         case KVM_CAP_IRQCHIP:
2055         case KVM_CAP_HLT:
2056         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2057         case KVM_CAP_SET_TSS_ADDR:
2058         case KVM_CAP_EXT_CPUID:
2059         case KVM_CAP_CLOCKSOURCE:
2060         case KVM_CAP_PIT:
2061         case KVM_CAP_NOP_IO_DELAY:
2062         case KVM_CAP_MP_STATE:
2063         case KVM_CAP_SYNC_MMU:
2064         case KVM_CAP_USER_NMI:
2065         case KVM_CAP_REINJECT_CONTROL:
2066         case KVM_CAP_IRQ_INJECT_STATUS:
2067         case KVM_CAP_ASSIGN_DEV_IRQ:
2068         case KVM_CAP_IRQFD:
2069         case KVM_CAP_IOEVENTFD:
2070         case KVM_CAP_PIT2:
2071         case KVM_CAP_PIT_STATE2:
2072         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2073         case KVM_CAP_XEN_HVM:
2074         case KVM_CAP_ADJUST_CLOCK:
2075         case KVM_CAP_VCPU_EVENTS:
2076         case KVM_CAP_HYPERV:
2077         case KVM_CAP_HYPERV_VAPIC:
2078         case KVM_CAP_HYPERV_SPIN:
2079         case KVM_CAP_PCI_SEGMENT:
2080         case KVM_CAP_DEBUGREGS:
2081         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2082         case KVM_CAP_XSAVE:
2083         case KVM_CAP_ASYNC_PF:
2084         case KVM_CAP_GET_TSC_KHZ:
2085                 r = 1;
2086                 break;
2087         case KVM_CAP_COALESCED_MMIO:
2088                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2089                 break;
2090         case KVM_CAP_VAPIC:
2091                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2092                 break;
2093         case KVM_CAP_NR_VCPUS:
2094                 r = KVM_SOFT_MAX_VCPUS;
2095                 break;
2096         case KVM_CAP_MAX_VCPUS:
2097                 r = KVM_MAX_VCPUS;
2098                 break;
2099         case KVM_CAP_NR_MEMSLOTS:
2100                 r = KVM_MEMORY_SLOTS;
2101                 break;
2102         case KVM_CAP_PV_MMU:    /* obsolete */
2103                 r = 0;
2104                 break;
2105         case KVM_CAP_IOMMU:
2106                 r = iommu_found();
2107                 break;
2108         case KVM_CAP_MCE:
2109                 r = KVM_MAX_MCE_BANKS;
2110                 break;
2111         case KVM_CAP_XCRS:
2112                 r = cpu_has_xsave;
2113                 break;
2114         case KVM_CAP_TSC_CONTROL:
2115                 r = kvm_has_tsc_control;
2116                 break;
2117         default:
2118                 r = 0;
2119                 break;
2120         }
2121         return r;
2122
2123 }
2124
2125 long kvm_arch_dev_ioctl(struct file *filp,
2126                         unsigned int ioctl, unsigned long arg)
2127 {
2128         void __user *argp = (void __user *)arg;
2129         long r;
2130
2131         switch (ioctl) {
2132         case KVM_GET_MSR_INDEX_LIST: {
2133                 struct kvm_msr_list __user *user_msr_list = argp;
2134                 struct kvm_msr_list msr_list;
2135                 unsigned n;
2136
2137                 r = -EFAULT;
2138                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2139                         goto out;
2140                 n = msr_list.nmsrs;
2141                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2142                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2143                         goto out;
2144                 r = -E2BIG;
2145                 if (n < msr_list.nmsrs)
2146                         goto out;
2147                 r = -EFAULT;
2148                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2149                                  num_msrs_to_save * sizeof(u32)))
2150                         goto out;
2151                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2152                                  &emulated_msrs,
2153                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2154                         goto out;
2155                 r = 0;
2156                 break;
2157         }
2158         case KVM_GET_SUPPORTED_CPUID: {
2159                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2160                 struct kvm_cpuid2 cpuid;
2161
2162                 r = -EFAULT;
2163                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2164                         goto out;
2165                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2166                                                       cpuid_arg->entries);
2167                 if (r)
2168                         goto out;
2169
2170                 r = -EFAULT;
2171                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2172                         goto out;
2173                 r = 0;
2174                 break;
2175         }
2176         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2177                 u64 mce_cap;
2178
2179                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2180                 r = -EFAULT;
2181                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2182                         goto out;
2183                 r = 0;
2184                 break;
2185         }
2186         default:
2187                 r = -EINVAL;
2188         }
2189 out:
2190         return r;
2191 }
2192
2193 static void wbinvd_ipi(void *garbage)
2194 {
2195         wbinvd();
2196 }
2197
2198 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2199 {
2200         return vcpu->kvm->arch.iommu_domain &&
2201                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2202 }
2203
2204 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2205 {
2206         /* Address WBINVD may be executed by guest */
2207         if (need_emulate_wbinvd(vcpu)) {
2208                 if (kvm_x86_ops->has_wbinvd_exit())
2209                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2210                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2211                         smp_call_function_single(vcpu->cpu,
2212                                         wbinvd_ipi, NULL, 1);
2213         }
2214
2215         kvm_x86_ops->vcpu_load(vcpu, cpu);
2216         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2217                 /* Make sure TSC doesn't go backwards */
2218                 s64 tsc_delta;
2219                 u64 tsc;
2220
2221                 tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2222                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2223                              tsc - vcpu->arch.last_guest_tsc;
2224
2225                 if (tsc_delta < 0)
2226                         mark_tsc_unstable("KVM discovered backwards TSC");
2227                 if (check_tsc_unstable()) {
2228                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2229                         vcpu->arch.tsc_catchup = 1;
2230                 }
2231                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2232                 if (vcpu->cpu != cpu)
2233                         kvm_migrate_timers(vcpu);
2234                 vcpu->cpu = cpu;
2235         }
2236
2237         accumulate_steal_time(vcpu);
2238         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2239 }
2240
2241 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2242 {
2243         kvm_x86_ops->vcpu_put(vcpu);
2244         kvm_put_guest_fpu(vcpu);
2245         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2246 }
2247
2248 static int is_efer_nx(void)
2249 {
2250         unsigned long long efer = 0;
2251
2252         rdmsrl_safe(MSR_EFER, &efer);
2253         return efer & EFER_NX;
2254 }
2255
2256 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2257 {
2258         int i;
2259         struct kvm_cpuid_entry2 *e, *entry;
2260
2261         entry = NULL;
2262         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2263                 e = &vcpu->arch.cpuid_entries[i];
2264                 if (e->function == 0x80000001) {
2265                         entry = e;
2266                         break;
2267                 }
2268         }
2269         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2270                 entry->edx &= ~(1 << 20);
2271                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2272         }
2273 }
2274
2275 /* when an old userspace process fills a new kernel module */
2276 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2277                                     struct kvm_cpuid *cpuid,
2278                                     struct kvm_cpuid_entry __user *entries)
2279 {
2280         int r, i;
2281         struct kvm_cpuid_entry *cpuid_entries;
2282
2283         r = -E2BIG;
2284         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2285                 goto out;
2286         r = -ENOMEM;
2287         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2288         if (!cpuid_entries)
2289                 goto out;
2290         r = -EFAULT;
2291         if (copy_from_user(cpuid_entries, entries,
2292                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2293                 goto out_free;
2294         for (i = 0; i < cpuid->nent; i++) {
2295                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2296                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2297                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2298                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2299                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2300                 vcpu->arch.cpuid_entries[i].index = 0;
2301                 vcpu->arch.cpuid_entries[i].flags = 0;
2302                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2303                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2304                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2305         }
2306         vcpu->arch.cpuid_nent = cpuid->nent;
2307         cpuid_fix_nx_cap(vcpu);
2308         r = 0;
2309         kvm_apic_set_version(vcpu);
2310         kvm_x86_ops->cpuid_update(vcpu);
2311         update_cpuid(vcpu);
2312
2313 out_free:
2314         vfree(cpuid_entries);
2315 out:
2316         return r;
2317 }
2318
2319 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2320                                      struct kvm_cpuid2 *cpuid,
2321                                      struct kvm_cpuid_entry2 __user *entries)
2322 {
2323         int r;
2324
2325         r = -E2BIG;
2326         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2327                 goto out;
2328         r = -EFAULT;
2329         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2330                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2331                 goto out;
2332         vcpu->arch.cpuid_nent = cpuid->nent;
2333         kvm_apic_set_version(vcpu);
2334         kvm_x86_ops->cpuid_update(vcpu);
2335         update_cpuid(vcpu);
2336         return 0;
2337
2338 out:
2339         return r;
2340 }
2341
2342 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2343                                      struct kvm_cpuid2 *cpuid,
2344                                      struct kvm_cpuid_entry2 __user *entries)
2345 {
2346         int r;
2347
2348         r = -E2BIG;
2349         if (cpuid->nent < vcpu->arch.cpuid_nent)
2350                 goto out;
2351         r = -EFAULT;
2352         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2353                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2354                 goto out;
2355         return 0;
2356
2357 out:
2358         cpuid->nent = vcpu->arch.cpuid_nent;
2359         return r;
2360 }
2361
2362 static void cpuid_mask(u32 *word, int wordnum)
2363 {
2364         *word &= boot_cpu_data.x86_capability[wordnum];
2365 }
2366
2367 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2368                            u32 index)
2369 {
2370         entry->function = function;
2371         entry->index = index;
2372         cpuid_count(entry->function, entry->index,
2373                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2374         entry->flags = 0;
2375 }
2376
2377 static bool supported_xcr0_bit(unsigned bit)
2378 {
2379         u64 mask = ((u64)1 << bit);
2380
2381         return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2382 }
2383
2384 #define F(x) bit(X86_FEATURE_##x)
2385
2386 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2387                          u32 index, int *nent, int maxnent)
2388 {
2389         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2390 #ifdef CONFIG_X86_64
2391         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2392                                 ? F(GBPAGES) : 0;
2393         unsigned f_lm = F(LM);
2394 #else
2395         unsigned f_gbpages = 0;
2396         unsigned f_lm = 0;
2397 #endif
2398         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2399
2400         /* cpuid 1.edx */
2401         const u32 kvm_supported_word0_x86_features =
2402                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2403                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2404                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2405                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2406                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2407                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2408                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2409                 0 /* HTT, TM, Reserved, PBE */;
2410         /* cpuid 0x80000001.edx */
2411         const u32 kvm_supported_word1_x86_features =
2412                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2413                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2414                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2415                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2416                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2417                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2418                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2419                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2420         /* cpuid 1.ecx */
2421         const u32 kvm_supported_word4_x86_features =
2422                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2423                 0 /* DS-CPL, VMX, SMX, EST */ |
2424                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2425                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2426                 0 /* Reserved, DCA */ | F(XMM4_1) |
2427                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2428                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2429                 F(F16C) | F(RDRAND);
2430         /* cpuid 0x80000001.ecx */
2431         const u32 kvm_supported_word6_x86_features =
2432                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2433                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2434                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2435                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2436
2437         /* cpuid 0xC0000001.edx */
2438         const u32 kvm_supported_word5_x86_features =
2439                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2440                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2441                 F(PMM) | F(PMM_EN);
2442
2443         /* cpuid 7.0.ebx */
2444         const u32 kvm_supported_word9_x86_features =
2445                 F(SMEP) | F(FSGSBASE) | F(ERMS);
2446
2447         /* all calls to cpuid_count() should be made on the same cpu */
2448         get_cpu();
2449         do_cpuid_1_ent(entry, function, index);
2450         ++*nent;
2451
2452         switch (function) {
2453         case 0:
2454                 entry->eax = min(entry->eax, (u32)0xd);
2455                 break;
2456         case 1:
2457                 entry->edx &= kvm_supported_word0_x86_features;
2458                 cpuid_mask(&entry->edx, 0);
2459                 entry->ecx &= kvm_supported_word4_x86_features;
2460                 cpuid_mask(&entry->ecx, 4);
2461                 /* we support x2apic emulation even if host does not support
2462                  * it since we emulate x2apic in software */
2463                 entry->ecx |= F(X2APIC);
2464                 break;
2465         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2466          * may return different values. This forces us to get_cpu() before
2467          * issuing the first command, and also to emulate this annoying behavior
2468          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2469         case 2: {
2470                 int t, times = entry->eax & 0xff;
2471
2472                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2473                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2474                 for (t = 1; t < times && *nent < maxnent; ++t) {
2475                         do_cpuid_1_ent(&entry[t], function, 0);
2476                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2477                         ++*nent;
2478                 }
2479                 break;
2480         }
2481         /* function 4 has additional index. */
2482         case 4: {
2483                 int i, cache_type;
2484
2485                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2486                 /* read more entries until cache_type is zero */
2487                 for (i = 1; *nent < maxnent; ++i) {
2488                         cache_type = entry[i - 1].eax & 0x1f;
2489                         if (!cache_type)
2490                                 break;
2491                         do_cpuid_1_ent(&entry[i], function, i);
2492                         entry[i].flags |=
2493                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2494                         ++*nent;
2495                 }
2496                 break;
2497         }
2498         case 7: {
2499                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2500                 /* Mask ebx against host capbability word 9 */
2501                 if (index == 0) {
2502                         entry->ebx &= kvm_supported_word9_x86_features;
2503                         cpuid_mask(&entry->ebx, 9);
2504                 } else
2505                         entry->ebx = 0;
2506                 entry->eax = 0;
2507                 entry->ecx = 0;
2508                 entry->edx = 0;
2509                 break;
2510         }
2511         case 9:
2512                 break;
2513         /* function 0xb has additional index. */
2514         case 0xb: {
2515                 int i, level_type;
2516
2517                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2518                 /* read more entries until level_type is zero */
2519                 for (i = 1; *nent < maxnent; ++i) {
2520                         level_type = entry[i - 1].ecx & 0xff00;
2521                         if (!level_type)
2522                                 break;
2523                         do_cpuid_1_ent(&entry[i], function, i);
2524                         entry[i].flags |=
2525                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2526                         ++*nent;
2527                 }
2528                 break;
2529         }
2530         case 0xd: {
2531                 int idx, i;
2532
2533                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2534                 for (idx = 1, i = 1; *nent < maxnent && idx < 64; ++idx) {
2535                         do_cpuid_1_ent(&entry[i], function, idx);
2536                         if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
2537                                 continue;
2538                         entry[i].flags |=
2539                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2540                         ++*nent;
2541                         ++i;
2542                 }
2543                 break;
2544         }
2545         case KVM_CPUID_SIGNATURE: {
2546                 char signature[12] = "KVMKVMKVM\0\0";
2547                 u32 *sigptr = (u32 *)signature;
2548                 entry->eax = 0;
2549                 entry->ebx = sigptr[0];
2550                 entry->ecx = sigptr[1];
2551                 entry->edx = sigptr[2];
2552                 break;
2553         }
2554         case KVM_CPUID_FEATURES:
2555                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2556                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2557                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2558                              (1 << KVM_FEATURE_ASYNC_PF) |
2559                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2560
2561                 if (sched_info_on())
2562                         entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
2563
2564                 entry->ebx = 0;
2565                 entry->ecx = 0;
2566                 entry->edx = 0;
2567                 break;
2568         case 0x80000000:
2569                 entry->eax = min(entry->eax, 0x8000001a);
2570                 break;
2571         case 0x80000001:
2572                 entry->edx &= kvm_supported_word1_x86_features;
2573                 cpuid_mask(&entry->edx, 1);
2574                 entry->ecx &= kvm_supported_word6_x86_features;
2575                 cpuid_mask(&entry->ecx, 6);
2576                 break;
2577         case 0x80000008: {
2578                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2579                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2580                 unsigned phys_as = entry->eax & 0xff;
2581
2582                 if (!g_phys_as)
2583                         g_phys_as = phys_as;
2584                 entry->eax = g_phys_as | (virt_as << 8);
2585                 entry->ebx = entry->edx = 0;
2586                 break;
2587         }
2588         case 0x80000019:
2589                 entry->ecx = entry->edx = 0;
2590                 break;
2591         case 0x8000001a:
2592                 break;
2593         case 0x8000001d:
2594                 break;
2595         /*Add support for Centaur's CPUID instruction*/
2596         case 0xC0000000:
2597                 /*Just support up to 0xC0000004 now*/
2598                 entry->eax = min(entry->eax, 0xC0000004);
2599                 break;
2600         case 0xC0000001:
2601                 entry->edx &= kvm_supported_word5_x86_features;
2602                 cpuid_mask(&entry->edx, 5);
2603                 break;
2604         case 3: /* Processor serial number */
2605         case 5: /* MONITOR/MWAIT */
2606         case 6: /* Thermal management */
2607         case 0xA: /* Architectural Performance Monitoring */
2608         case 0x80000007: /* Advanced power management */
2609         case 0xC0000002:
2610         case 0xC0000003:
2611         case 0xC0000004:
2612         default:
2613                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2614                 break;
2615         }
2616
2617         kvm_x86_ops->set_supported_cpuid(function, entry);
2618
2619         put_cpu();
2620 }
2621
2622 #undef F
2623
2624 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2625                                      struct kvm_cpuid_entry2 __user *entries)
2626 {
2627         struct kvm_cpuid_entry2 *cpuid_entries;
2628         int limit, nent = 0, r = -E2BIG;
2629         u32 func;
2630
2631         if (cpuid->nent < 1)
2632                 goto out;
2633         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2634                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2635         r = -ENOMEM;
2636         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2637         if (!cpuid_entries)
2638                 goto out;
2639
2640         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2641         limit = cpuid_entries[0].eax;
2642         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2643                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2644                              &nent, cpuid->nent);
2645         r = -E2BIG;
2646         if (nent >= cpuid->nent)
2647                 goto out_free;
2648
2649         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2650         limit = cpuid_entries[nent - 1].eax;
2651         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2652                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2653                              &nent, cpuid->nent);
2654
2655
2656
2657         r = -E2BIG;
2658         if (nent >= cpuid->nent)
2659                 goto out_free;
2660
2661         /* Add support for Centaur's CPUID instruction. */
2662         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2663                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2664                                 &nent, cpuid->nent);
2665
2666                 r = -E2BIG;
2667                 if (nent >= cpuid->nent)
2668                         goto out_free;
2669
2670                 limit = cpuid_entries[nent - 1].eax;
2671                 for (func = 0xC0000001;
2672                         func <= limit && nent < cpuid->nent; ++func)
2673                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2674                                         &nent, cpuid->nent);
2675
2676                 r = -E2BIG;
2677                 if (nent >= cpuid->nent)
2678                         goto out_free;
2679         }
2680
2681         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2682                      cpuid->nent);
2683
2684         r = -E2BIG;
2685         if (nent >= cpuid->nent)
2686                 goto out_free;
2687
2688         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2689                      cpuid->nent);
2690
2691         r = -E2BIG;
2692         if (nent >= cpuid->nent)
2693                 goto out_free;
2694
2695         r = -EFAULT;
2696         if (copy_to_user(entries, cpuid_entries,
2697                          nent * sizeof(struct kvm_cpuid_entry2)))
2698                 goto out_free;
2699         cpuid->nent = nent;
2700         r = 0;
2701
2702 out_free:
2703         vfree(cpuid_entries);
2704 out:
2705         return r;
2706 }
2707
2708 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2709                                     struct kvm_lapic_state *s)
2710 {
2711         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2712
2713         return 0;
2714 }
2715
2716 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2717                                     struct kvm_lapic_state *s)
2718 {
2719         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2720         kvm_apic_post_state_restore(vcpu);
2721         update_cr8_intercept(vcpu);
2722
2723         return 0;
2724 }
2725
2726 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2727                                     struct kvm_interrupt *irq)
2728 {
2729         if (irq->irq < 0 || irq->irq >= 256)
2730                 return -EINVAL;
2731         if (irqchip_in_kernel(vcpu->kvm))
2732                 return -ENXIO;
2733
2734         kvm_queue_interrupt(vcpu, irq->irq, false);
2735         kvm_make_request(KVM_REQ_EVENT, vcpu);
2736
2737         return 0;
2738 }
2739
2740 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2741 {
2742         kvm_inject_nmi(vcpu);
2743
2744         return 0;
2745 }
2746
2747 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2748                                            struct kvm_tpr_access_ctl *tac)
2749 {
2750         if (tac->flags)
2751                 return -EINVAL;
2752         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2753         return 0;
2754 }
2755
2756 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2757                                         u64 mcg_cap)
2758 {
2759         int r;
2760         unsigned bank_num = mcg_cap & 0xff, bank;
2761
2762         r = -EINVAL;
2763         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2764                 goto out;
2765         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2766                 goto out;
2767         r = 0;
2768         vcpu->arch.mcg_cap = mcg_cap;
2769         /* Init IA32_MCG_CTL to all 1s */
2770         if (mcg_cap & MCG_CTL_P)
2771                 vcpu->arch.mcg_ctl = ~(u64)0;
2772         /* Init IA32_MCi_CTL to all 1s */
2773         for (bank = 0; bank < bank_num; bank++)
2774                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2775 out:
2776         return r;
2777 }
2778
2779 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2780                                       struct kvm_x86_mce *mce)
2781 {
2782         u64 mcg_cap = vcpu->arch.mcg_cap;
2783         unsigned bank_num = mcg_cap & 0xff;
2784         u64 *banks = vcpu->arch.mce_banks;
2785
2786         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2787                 return -EINVAL;
2788         /*
2789          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2790          * reporting is disabled
2791          */
2792         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2793             vcpu->arch.mcg_ctl != ~(u64)0)
2794                 return 0;
2795         banks += 4 * mce->bank;
2796         /*
2797          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2798          * reporting is disabled for the bank
2799          */
2800         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2801                 return 0;
2802         if (mce->status & MCI_STATUS_UC) {
2803                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2804                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2805                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2806                         return 0;
2807                 }
2808                 if (banks[1] & MCI_STATUS_VAL)
2809                         mce->status |= MCI_STATUS_OVER;
2810                 banks[2] = mce->addr;
2811                 banks[3] = mce->misc;
2812                 vcpu->arch.mcg_status = mce->mcg_status;
2813                 banks[1] = mce->status;
2814                 kvm_queue_exception(vcpu, MC_VECTOR);
2815         } else if (!(banks[1] & MCI_STATUS_VAL)
2816                    || !(banks[1] & MCI_STATUS_UC)) {
2817                 if (banks[1] & MCI_STATUS_VAL)
2818                         mce->status |= MCI_STATUS_OVER;
2819                 banks[2] = mce->addr;
2820                 banks[3] = mce->misc;
2821                 banks[1] = mce->status;
2822         } else
2823                 banks[1] |= MCI_STATUS_OVER;
2824         return 0;
2825 }
2826
2827 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2828                                                struct kvm_vcpu_events *events)
2829 {
2830         events->exception.injected =
2831                 vcpu->arch.exception.pending &&
2832                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2833         events->exception.nr = vcpu->arch.exception.nr;
2834         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2835         events->exception.pad = 0;
2836         events->exception.error_code = vcpu->arch.exception.error_code;
2837
2838         events->interrupt.injected =
2839                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2840         events->interrupt.nr = vcpu->arch.interrupt.nr;
2841         events->interrupt.soft = 0;
2842         events->interrupt.shadow =
2843                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2844                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2845
2846         events->nmi.injected = vcpu->arch.nmi_injected;
2847         events->nmi.pending = vcpu->arch.nmi_pending;
2848         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2849         events->nmi.pad = 0;
2850
2851         events->sipi_vector = vcpu->arch.sipi_vector;
2852
2853         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2854                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2855                          | KVM_VCPUEVENT_VALID_SHADOW);
2856         memset(&events->reserved, 0, sizeof(events->reserved));
2857 }
2858
2859 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2860                                               struct kvm_vcpu_events *events)
2861 {
2862         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2863                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2864                               | KVM_VCPUEVENT_VALID_SHADOW))
2865                 return -EINVAL;
2866
2867         vcpu->arch.exception.pending = events->exception.injected;
2868         vcpu->arch.exception.nr = events->exception.nr;
2869         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2870         vcpu->arch.exception.error_code = events->exception.error_code;
2871
2872         vcpu->arch.interrupt.pending = events->interrupt.injected;
2873         vcpu->arch.interrupt.nr = events->interrupt.nr;
2874         vcpu->arch.interrupt.soft = events->interrupt.soft;
2875         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2876                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2877                                                   events->interrupt.shadow);
2878
2879         vcpu->arch.nmi_injected = events->nmi.injected;
2880         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2881                 vcpu->arch.nmi_pending = events->nmi.pending;
2882         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2883
2884         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2885                 vcpu->arch.sipi_vector = events->sipi_vector;
2886
2887         kvm_make_request(KVM_REQ_EVENT, vcpu);
2888
2889         return 0;
2890 }
2891
2892 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2893                                              struct kvm_debugregs *dbgregs)
2894 {
2895         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2896         dbgregs->dr6 = vcpu->arch.dr6;
2897         dbgregs->dr7 = vcpu->arch.dr7;
2898         dbgregs->flags = 0;
2899         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2900 }
2901
2902 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2903                                             struct kvm_debugregs *dbgregs)
2904 {
2905         if (dbgregs->flags)
2906                 return -EINVAL;
2907
2908         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2909         vcpu->arch.dr6 = dbgregs->dr6;
2910         vcpu->arch.dr7 = dbgregs->dr7;
2911
2912         return 0;
2913 }
2914
2915 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2916                                          struct kvm_xsave *guest_xsave)
2917 {
2918         if (cpu_has_xsave)
2919                 memcpy(guest_xsave->region,
2920                         &vcpu->arch.guest_fpu.state->xsave,
2921                         xstate_size);
2922         else {
2923                 memcpy(guest_xsave->region,
2924                         &vcpu->arch.guest_fpu.state->fxsave,
2925                         sizeof(struct i387_fxsave_struct));
2926                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2927                         XSTATE_FPSSE;
2928         }
2929 }
2930
2931 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2932                                         struct kvm_xsave *guest_xsave)
2933 {
2934         u64 xstate_bv =
2935                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2936
2937         if (cpu_has_xsave)
2938                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2939                         guest_xsave->region, xstate_size);
2940         else {
2941                 if (xstate_bv & ~XSTATE_FPSSE)
2942                         return -EINVAL;
2943                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2944                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2945         }
2946         return 0;
2947 }
2948
2949 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2950                                         struct kvm_xcrs *guest_xcrs)
2951 {
2952         if (!cpu_has_xsave) {
2953                 guest_xcrs->nr_xcrs = 0;
2954                 return;
2955         }
2956
2957         guest_xcrs->nr_xcrs = 1;
2958         guest_xcrs->flags = 0;
2959         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2960         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2961 }
2962
2963 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2964                                        struct kvm_xcrs *guest_xcrs)
2965 {
2966         int i, r = 0;
2967
2968         if (!cpu_has_xsave)
2969                 return -EINVAL;
2970
2971         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2972                 return -EINVAL;
2973
2974         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2975                 /* Only support XCR0 currently */
2976                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2977                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2978                                 guest_xcrs->xcrs[0].value);
2979                         break;
2980                 }
2981         if (r)
2982                 r = -EINVAL;
2983         return r;
2984 }
2985
2986 long kvm_arch_vcpu_ioctl(struct file *filp,
2987                          unsigned int ioctl, unsigned long arg)
2988 {
2989         struct kvm_vcpu *vcpu = filp->private_data;
2990         void __user *argp = (void __user *)arg;
2991         int r;
2992         union {
2993                 struct kvm_lapic_state *lapic;
2994                 struct kvm_xsave *xsave;
2995                 struct kvm_xcrs *xcrs;
2996                 void *buffer;
2997         } u;
2998
2999         u.buffer = NULL;
3000         switch (ioctl) {
3001         case KVM_GET_LAPIC: {
3002                 r = -EINVAL;
3003                 if (!vcpu->arch.apic)
3004                         goto out;
3005                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3006
3007                 r = -ENOMEM;
3008                 if (!u.lapic)
3009                         goto out;
3010                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3011                 if (r)
3012                         goto out;
3013                 r = -EFAULT;
3014                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3015                         goto out;
3016                 r = 0;
3017                 break;
3018         }
3019         case KVM_SET_LAPIC: {
3020                 r = -EINVAL;
3021                 if (!vcpu->arch.apic)
3022                         goto out;
3023                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3024                 r = -ENOMEM;
3025                 if (!u.lapic)
3026                         goto out;
3027                 r = -EFAULT;
3028                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
3029                         goto out;
3030                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3031                 if (r)
3032                         goto out;
3033                 r = 0;
3034                 break;
3035         }
3036         case KVM_INTERRUPT: {
3037                 struct kvm_interrupt irq;
3038
3039                 r = -EFAULT;
3040                 if (copy_from_user(&irq, argp, sizeof irq))
3041                         goto out;
3042                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3043                 if (r)
3044                         goto out;
3045                 r = 0;
3046                 break;
3047         }
3048         case KVM_NMI: {
3049                 r = kvm_vcpu_ioctl_nmi(vcpu);
3050                 if (r)
3051                         goto out;
3052                 r = 0;
3053                 break;
3054         }
3055         case KVM_SET_CPUID: {
3056                 struct kvm_cpuid __user *cpuid_arg = argp;
3057                 struct kvm_cpuid cpuid;
3058
3059                 r = -EFAULT;
3060                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3061                         goto out;
3062                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3063                 if (r)
3064                         goto out;
3065                 break;
3066         }
3067         case KVM_SET_CPUID2: {
3068                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3069                 struct kvm_cpuid2 cpuid;
3070
3071                 r = -EFAULT;
3072                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3073                         goto out;
3074                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3075                                               cpuid_arg->entries);
3076                 if (r)
3077                         goto out;
3078                 break;
3079         }
3080         case KVM_GET_CPUID2: {
3081                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3082                 struct kvm_cpuid2 cpuid;
3083
3084                 r = -EFAULT;
3085                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3086                         goto out;
3087                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3088                                               cpuid_arg->entries);
3089                 if (r)
3090                         goto out;
3091                 r = -EFAULT;
3092                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3093                         goto out;
3094                 r = 0;
3095                 break;
3096         }
3097         case KVM_GET_MSRS:
3098                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3099                 break;
3100         case KVM_SET_MSRS:
3101                 r = msr_io(vcpu, argp, do_set_msr, 0);
3102                 break;
3103         case KVM_TPR_ACCESS_REPORTING: {
3104                 struct kvm_tpr_access_ctl tac;
3105
3106                 r = -EFAULT;
3107                 if (copy_from_user(&tac, argp, sizeof tac))
3108                         goto out;
3109                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3110                 if (r)
3111                         goto out;
3112                 r = -EFAULT;
3113                 if (copy_to_user(argp, &tac, sizeof tac))
3114                         goto out;
3115                 r = 0;
3116                 break;
3117         };
3118         case KVM_SET_VAPIC_ADDR: {
3119                 struct kvm_vapic_addr va;
3120
3121                 r = -EINVAL;
3122                 if (!irqchip_in_kernel(vcpu->kvm))
3123                         goto out;
3124                 r = -EFAULT;
3125                 if (copy_from_user(&va, argp, sizeof va))
3126                         goto out;
3127                 r = 0;
3128                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3129                 break;
3130         }
3131         case KVM_X86_SETUP_MCE: {
3132                 u64 mcg_cap;
3133
3134                 r = -EFAULT;
3135                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3136                         goto out;
3137                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3138                 break;
3139         }
3140         case KVM_X86_SET_MCE: {
3141                 struct kvm_x86_mce mce;
3142
3143                 r = -EFAULT;
3144                 if (copy_from_user(&mce, argp, sizeof mce))
3145                         goto out;
3146                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3147                 break;
3148         }
3149         case KVM_GET_VCPU_EVENTS: {
3150                 struct kvm_vcpu_events events;
3151
3152                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3153
3154                 r = -EFAULT;
3155                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3156                         break;
3157                 r = 0;
3158                 break;
3159         }
3160         case KVM_SET_VCPU_EVENTS: {
3161                 struct kvm_vcpu_events events;
3162
3163                 r = -EFAULT;
3164                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3165                         break;
3166
3167                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3168                 break;
3169         }
3170         case KVM_GET_DEBUGREGS: {
3171                 struct kvm_debugregs dbgregs;
3172
3173                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3174
3175                 r = -EFAULT;
3176                 if (copy_to_user(argp, &dbgregs,
3177                                  sizeof(struct kvm_debugregs)))
3178                         break;
3179                 r = 0;
3180                 break;
3181         }
3182         case KVM_SET_DEBUGREGS: {
3183                 struct kvm_debugregs dbgregs;
3184
3185                 r = -EFAULT;
3186                 if (copy_from_user(&dbgregs, argp,
3187                                    sizeof(struct kvm_debugregs)))
3188                         break;
3189
3190                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3191                 break;
3192         }
3193         case KVM_GET_XSAVE: {
3194                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3195                 r = -ENOMEM;
3196                 if (!u.xsave)
3197                         break;
3198
3199                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3200
3201                 r = -EFAULT;
3202                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3203                         break;
3204                 r = 0;
3205                 break;
3206         }
3207         case KVM_SET_XSAVE: {
3208                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3209                 r = -ENOMEM;
3210                 if (!u.xsave)
3211                         break;
3212
3213                 r = -EFAULT;
3214                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3215                         break;
3216
3217                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3218                 break;
3219         }
3220         case KVM_GET_XCRS: {
3221                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3222                 r = -ENOMEM;
3223                 if (!u.xcrs)
3224                         break;
3225
3226                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3227
3228                 r = -EFAULT;
3229                 if (copy_to_user(argp, u.xcrs,
3230                                  sizeof(struct kvm_xcrs)))
3231                         break;
3232                 r = 0;
3233                 break;
3234         }
3235         case KVM_SET_XCRS: {
3236                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3237                 r = -ENOMEM;
3238                 if (!u.xcrs)
3239                         break;
3240
3241                 r = -EFAULT;
3242                 if (copy_from_user(u.xcrs, argp,
3243                                    sizeof(struct kvm_xcrs)))
3244                         break;
3245
3246                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3247                 break;
3248         }
3249         case KVM_SET_TSC_KHZ: {
3250                 u32 user_tsc_khz;
3251
3252                 r = -EINVAL;
3253                 if (!kvm_has_tsc_control)
3254                         break;
3255
3256                 user_tsc_khz = (u32)arg;
3257
3258                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3259                         goto out;
3260
3261                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3262
3263                 r = 0;
3264                 goto out;
3265         }
3266         case KVM_GET_TSC_KHZ: {
3267                 r = -EIO;
3268                 if (check_tsc_unstable())
3269                         goto out;
3270
3271                 r = vcpu_tsc_khz(vcpu);
3272
3273                 goto out;
3274         }
3275         default:
3276                 r = -EINVAL;
3277         }
3278 out:
3279         kfree(u.buffer);
3280         return r;
3281 }
3282
3283 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3284 {
3285         int ret;
3286
3287         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3288                 return -1;
3289         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3290         return ret;
3291 }
3292
3293 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3294                                               u64 ident_addr)
3295 {
3296         kvm->arch.ept_identity_map_addr = ident_addr;
3297         return 0;
3298 }
3299
3300 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3301                                           u32 kvm_nr_mmu_pages)
3302 {
3303         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3304                 return -EINVAL;
3305
3306         mutex_lock(&kvm->slots_lock);
3307         spin_lock(&kvm->mmu_lock);
3308
3309         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3310         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3311
3312         spin_unlock(&kvm->mmu_lock);
3313         mutex_unlock(&kvm->slots_lock);
3314         return 0;
3315 }
3316
3317 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3318 {
3319         return kvm->arch.n_max_mmu_pages;
3320 }
3321
3322 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3323 {
3324         int r;
3325
3326         r = 0;
3327         switch (chip->chip_id) {
3328         case KVM_IRQCHIP_PIC_MASTER:
3329                 memcpy(&chip->chip.pic,
3330                         &pic_irqchip(kvm)->pics[0],
3331                         sizeof(struct kvm_pic_state));
3332                 break;
3333         case KVM_IRQCHIP_PIC_SLAVE:
3334                 memcpy(&chip->chip.pic,
3335                         &pic_irqchip(kvm)->pics[1],
3336                         sizeof(struct kvm_pic_state));
3337                 break;
3338         case KVM_IRQCHIP_IOAPIC:
3339                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3340                 break;
3341         default:
3342                 r = -EINVAL;
3343                 break;
3344         }
3345         return r;
3346 }
3347
3348 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3349 {
3350         int r;
3351
3352         r = 0;
3353         switch (chip->chip_id) {
3354         case KVM_IRQCHIP_PIC_MASTER:
3355                 spin_lock(&pic_irqchip(kvm)->lock);
3356                 memcpy(&pic_irqchip(kvm)->pics[0],
3357                         &chip->chip.pic,
3358                         sizeof(struct kvm_pic_state));
3359                 spin_unlock(&pic_irqchip(kvm)->lock);
3360                 break;
3361         case KVM_IRQCHIP_PIC_SLAVE:
3362                 spin_lock(&pic_irqchip(kvm)->lock);
3363                 memcpy(&pic_irqchip(kvm)->pics[1],
3364                         &chip->chip.pic,
3365                         sizeof(struct kvm_pic_state));
3366                 spin_unlock(&pic_irqchip(kvm)->lock);
3367                 break;
3368         case KVM_IRQCHIP_IOAPIC:
3369                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3370                 break;
3371         default:
3372                 r = -EINVAL;
3373                 break;
3374         }
3375         kvm_pic_update_irq(pic_irqchip(kvm));
3376         return r;
3377 }
3378
3379 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3380 {
3381         int r = 0;
3382
3383         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3384         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3385         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3386         return r;
3387 }
3388
3389 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3390 {
3391         int r = 0;
3392
3393         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3394         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3395         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3396         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3397         return r;
3398 }
3399
3400 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3401 {
3402         int r = 0;
3403
3404         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3405         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3406                 sizeof(ps->channels));
3407         ps->flags = kvm->arch.vpit->pit_state.flags;
3408         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3409         memset(&ps->reserved, 0, sizeof(ps->reserved));
3410         return r;
3411 }
3412
3413 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3414 {
3415         int r = 0, start = 0;
3416         u32 prev_legacy, cur_legacy;
3417         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3418         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3419         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3420         if (!prev_legacy && cur_legacy)
3421                 start = 1;
3422         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3423                sizeof(kvm->arch.vpit->pit_state.channels));
3424         kvm->arch.vpit->pit_state.flags = ps->flags;
3425         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3426         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3427         return r;
3428 }
3429
3430 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3431                                  struct kvm_reinject_control *control)
3432 {
3433         if (!kvm->arch.vpit)
3434                 return -ENXIO;
3435         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3436         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3437         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3438         return 0;
3439 }
3440
3441 /*
3442  * Get (and clear) the dirty memory log for a memory slot.
3443  */
3444 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3445                                       struct kvm_dirty_log *log)
3446 {
3447         int r, i;
3448         struct kvm_memory_slot *memslot;
3449         unsigned long n;
3450         unsigned long is_dirty = 0;
3451
3452         mutex_lock(&kvm->slots_lock);
3453
3454         r = -EINVAL;
3455         if (log->slot >= KVM_MEMORY_SLOTS)
3456                 goto out;
3457
3458         memslot = &kvm->memslots->memslots[log->slot];
3459         r = -ENOENT;
3460         if (!memslot->dirty_bitmap)
3461                 goto out;
3462
3463         n = kvm_dirty_bitmap_bytes(memslot);
3464
3465         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3466                 is_dirty = memslot->dirty_bitmap[i];
3467
3468         /* If nothing is dirty, don't bother messing with page tables. */
3469         if (is_dirty) {
3470                 struct kvm_memslots *slots, *old_slots;
3471                 unsigned long *dirty_bitmap;
3472
3473                 dirty_bitmap = memslot->dirty_bitmap_head;
3474                 if (memslot->dirty_bitmap == dirty_bitmap)
3475                         dirty_bitmap += n / sizeof(long);
3476                 memset(dirty_bitmap, 0, n);
3477
3478                 r = -ENOMEM;
3479                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3480                 if (!slots)
3481                         goto out;
3482                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3483                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3484                 slots->generation++;
3485
3486                 old_slots = kvm->memslots;
3487                 rcu_assign_pointer(kvm->memslots, slots);
3488                 synchronize_srcu_expedited(&kvm->srcu);
3489                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3490                 kfree(old_slots);
3491
3492                 spin_lock(&kvm->mmu_lock);
3493                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3494                 spin_unlock(&kvm->mmu_lock);
3495
3496                 r = -EFAULT;
3497                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3498                         goto out;
3499         } else {
3500                 r = -EFAULT;
3501                 if (clear_user(log->dirty_bitmap, n))
3502                         goto out;
3503         }
3504
3505         r = 0;
3506 out:
3507         mutex_unlock(&kvm->slots_lock);
3508         return r;
3509 }
3510
3511 long kvm_arch_vm_ioctl(struct file *filp,
3512                        unsigned int ioctl, unsigned long arg)
3513 {
3514         struct kvm *kvm = filp->private_data;
3515         void __user *argp = (void __user *)arg;
3516         int r = -ENOTTY;
3517         /*
3518          * This union makes it completely explicit to gcc-3.x
3519          * that these two variables' stack usage should be
3520          * combined, not added together.
3521          */
3522         union {
3523                 struct kvm_pit_state ps;
3524                 struct kvm_pit_state2 ps2;
3525                 struct kvm_pit_config pit_config;
3526         } u;
3527
3528         switch (ioctl) {
3529         case KVM_SET_TSS_ADDR:
3530                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3531                 if (r < 0)
3532                         goto out;
3533                 break;
3534         case KVM_SET_IDENTITY_MAP_ADDR: {
3535                 u64 ident_addr;
3536
3537                 r = -EFAULT;
3538                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3539                         goto out;
3540                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3541                 if (r < 0)
3542                         goto out;
3543                 break;
3544         }
3545         case KVM_SET_NR_MMU_PAGES:
3546                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3547                 if (r)
3548                         goto out;
3549                 break;
3550         case KVM_GET_NR_MMU_PAGES:
3551                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3552                 break;
3553         case KVM_CREATE_IRQCHIP: {
3554                 struct kvm_pic *vpic;
3555
3556                 mutex_lock(&kvm->lock);
3557                 r = -EEXIST;
3558                 if (kvm->arch.vpic)
3559                         goto create_irqchip_unlock;
3560                 r = -ENOMEM;
3561                 vpic = kvm_create_pic(kvm);
3562                 if (vpic) {
3563                         r = kvm_ioapic_init(kvm);
3564                         if (r) {
3565                                 mutex_lock(&kvm->slots_lock);
3566                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3567                                                           &vpic->dev_master);
3568                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3569                                                           &vpic->dev_slave);
3570                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3571                                                           &vpic->dev_eclr);
3572                                 mutex_unlock(&kvm->slots_lock);
3573                                 kfree(vpic);
3574                                 goto create_irqchip_unlock;
3575                         }
3576                 } else
3577                         goto create_irqchip_unlock;
3578                 smp_wmb();
3579                 kvm->arch.vpic = vpic;
3580                 smp_wmb();
3581                 r = kvm_setup_default_irq_routing(kvm);
3582                 if (r) {
3583                         mutex_lock(&kvm->slots_lock);
3584                         mutex_lock(&kvm->irq_lock);
3585                         kvm_ioapic_destroy(kvm);
3586                         kvm_destroy_pic(kvm);
3587                         mutex_unlock(&kvm->irq_lock);
3588                         mutex_unlock(&kvm->slots_lock);
3589                 }
3590         create_irqchip_unlock:
3591                 mutex_unlock(&kvm->lock);
3592                 break;
3593         }
3594         case KVM_CREATE_PIT:
3595                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3596                 goto create_pit;
3597         case KVM_CREATE_PIT2:
3598                 r = -EFAULT;
3599                 if (copy_from_user(&u.pit_config, argp,
3600                                    sizeof(struct kvm_pit_config)))
3601                         goto out;
3602         create_pit:
3603                 mutex_lock(&kvm->slots_lock);
3604                 r = -EEXIST;
3605                 if (kvm->arch.vpit)
3606                         goto create_pit_unlock;
3607                 r = -ENOMEM;
3608                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3609                 if (kvm->arch.vpit)
3610                         r = 0;
3611         create_pit_unlock:
3612                 mutex_unlock(&kvm->slots_lock);
3613                 break;
3614         case KVM_IRQ_LINE_STATUS:
3615         case KVM_IRQ_LINE: {
3616                 struct kvm_irq_level irq_event;
3617
3618                 r = -EFAULT;
3619                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3620                         goto out;
3621                 r = -ENXIO;
3622                 if (irqchip_in_kernel(kvm)) {
3623                         __s32 status;
3624                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3625                                         irq_event.irq, irq_event.level);
3626                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3627                                 r = -EFAULT;
3628                                 irq_event.status = status;
3629                                 if (copy_to_user(argp, &irq_event,
3630                                                         sizeof irq_event))
3631                                         goto out;
3632                         }
3633                         r = 0;
3634                 }
3635                 break;
3636         }
3637         case KVM_GET_IRQCHIP: {
3638                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3639                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3640
3641                 r = -ENOMEM;
3642                 if (!chip)
3643                         goto out;
3644                 r = -EFAULT;
3645                 if (copy_from_user(chip, argp, sizeof *chip))
3646                         goto get_irqchip_out;
3647                 r = -ENXIO;
3648                 if (!irqchip_in_kernel(kvm))
3649                         goto get_irqchip_out;
3650                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3651                 if (r)
3652                         goto get_irqchip_out;
3653                 r = -EFAULT;
3654                 if (copy_to_user(argp, chip, sizeof *chip))
3655                         goto get_irqchip_out;
3656                 r = 0;
3657         get_irqchip_out:
3658                 kfree(chip);
3659                 if (r)
3660                         goto out;
3661                 break;
3662         }
3663         case KVM_SET_IRQCHIP: {
3664                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3665                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3666
3667                 r = -ENOMEM;
3668                 if (!chip)
3669                         goto out;
3670                 r = -EFAULT;
3671                 if (copy_from_user(chip, argp, sizeof *chip))
3672                         goto set_irqchip_out;
3673                 r = -ENXIO;
3674                 if (!irqchip_in_kernel(kvm))
3675                         goto set_irqchip_out;
3676                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3677                 if (r)
3678                         goto set_irqchip_out;
3679                 r = 0;
3680         set_irqchip_out:
3681                 kfree(chip);
3682                 if (r)
3683                         goto out;
3684                 break;
3685         }
3686         case KVM_GET_PIT: {
3687                 r = -EFAULT;
3688                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3689                         goto out;
3690                 r = -ENXIO;
3691                 if (!kvm->arch.vpit)
3692                         goto out;
3693                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3694                 if (r)
3695                         goto out;
3696                 r = -EFAULT;
3697                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3698                         goto out;
3699                 r = 0;
3700                 break;
3701         }
3702         case KVM_SET_PIT: {
3703                 r = -EFAULT;
3704                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3705                         goto out;
3706                 r = -ENXIO;
3707                 if (!kvm->arch.vpit)
3708                         goto out;
3709                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3710                 if (r)
3711                         goto out;
3712                 r = 0;
3713                 break;
3714         }
3715         case KVM_GET_PIT2: {
3716                 r = -ENXIO;
3717                 if (!kvm->arch.vpit)
3718                         goto out;
3719                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3720                 if (r)
3721                         goto out;
3722                 r = -EFAULT;
3723                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3724                         goto out;
3725                 r = 0;
3726                 break;
3727         }
3728         case KVM_SET_PIT2: {
3729                 r = -EFAULT;
3730                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3731                         goto out;
3732                 r = -ENXIO;
3733                 if (!kvm->arch.vpit)
3734                         goto out;
3735                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3736                 if (r)
3737                         goto out;
3738                 r = 0;
3739                 break;
3740         }
3741         case KVM_REINJECT_CONTROL: {
3742                 struct kvm_reinject_control control;
3743                 r =  -EFAULT;
3744                 if (copy_from_user(&control, argp, sizeof(control)))
3745                         goto out;
3746                 r = kvm_vm_ioctl_reinject(kvm, &control);
3747                 if (r)
3748                         goto out;
3749                 r = 0;
3750                 break;
3751         }
3752         case KVM_XEN_HVM_CONFIG: {
3753                 r = -EFAULT;
3754                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3755                                    sizeof(struct kvm_xen_hvm_config)))
3756                         goto out;
3757                 r = -EINVAL;
3758                 if (kvm->arch.xen_hvm_config.flags)
3759                         goto out;
3760                 r = 0;
3761                 break;
3762         }
3763         case KVM_SET_CLOCK: {
3764                 struct kvm_clock_data user_ns;
3765                 u64 now_ns;
3766                 s64 delta;
3767
3768                 r = -EFAULT;
3769                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3770                         goto out;
3771
3772                 r = -EINVAL;
3773                 if (user_ns.flags)
3774                         goto out;
3775
3776                 r = 0;
3777                 local_irq_disable();
3778                 now_ns = get_kernel_ns();
3779                 delta = user_ns.clock - now_ns;
3780                 local_irq_enable();
3781                 kvm->arch.kvmclock_offset = delta;
3782                 break;
3783         }
3784         case KVM_GET_CLOCK: {
3785                 struct kvm_clock_data user_ns;
3786                 u64 now_ns;
3787
3788                 local_irq_disable();
3789                 now_ns = get_kernel_ns();
3790                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3791                 local_irq_enable();
3792                 user_ns.flags = 0;
3793                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3794
3795                 r = -EFAULT;
3796                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3797                         goto out;
3798                 r = 0;
3799                 break;
3800         }
3801
3802         default:
3803                 ;
3804         }
3805 out:
3806         return r;
3807 }
3808
3809 static void kvm_init_msr_list(void)
3810 {
3811         u32 dummy[2];
3812         unsigned i, j;
3813
3814         /* skip the first msrs in the list. KVM-specific */
3815         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3816                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3817                         continue;
3818                 if (j < i)
3819                         msrs_to_save[j] = msrs_to_save[i];
3820                 j++;
3821         }
3822         num_msrs_to_save = j;
3823 }
3824
3825 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3826                            const void *v)
3827 {
3828         int handled = 0;
3829         int n;
3830
3831         do {
3832                 n = min(len, 8);
3833                 if (!(vcpu->arch.apic &&
3834                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3835                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3836                         break;
3837                 handled += n;
3838                 addr += n;
3839                 len -= n;
3840                 v += n;
3841         } while (len);
3842
3843         return handled;
3844 }
3845
3846 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3847 {
3848         int handled = 0;
3849         int n;
3850
3851         do {
3852                 n = min(len, 8);
3853                 if (!(vcpu->arch.apic &&
3854                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3855                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3856                         break;
3857                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3858                 handled += n;
3859                 addr += n;
3860                 len -= n;
3861                 v += n;
3862         } while (len);
3863
3864         return handled;
3865 }
3866
3867 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3868                         struct kvm_segment *var, int seg)
3869 {
3870         kvm_x86_ops->set_segment(vcpu, var, seg);
3871 }
3872
3873 void kvm_get_segment(struct kvm_vcpu *vcpu,
3874                      struct kvm_segment *var, int seg)
3875 {
3876         kvm_x86_ops->get_segment(vcpu, var, seg);
3877 }
3878
3879 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3880 {
3881         return gpa;
3882 }
3883
3884 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3885 {
3886         gpa_t t_gpa;
3887         struct x86_exception exception;
3888
3889         BUG_ON(!mmu_is_nested(vcpu));
3890
3891         /* NPT walks are always user-walks */
3892         access |= PFERR_USER_MASK;
3893         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3894
3895         return t_gpa;
3896 }
3897
3898 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3899                               struct x86_exception *exception)
3900 {
3901         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3902         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3903 }
3904
3905  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3906                                 struct x86_exception *exception)
3907 {
3908         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3909         access |= PFERR_FETCH_MASK;
3910         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3911 }
3912
3913 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3914                                struct x86_exception *exception)
3915 {
3916         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3917         access |= PFERR_WRITE_MASK;
3918         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3919 }
3920
3921 /* uses this to access any guest's mapped memory without checking CPL */
3922 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3923                                 struct x86_exception *exception)
3924 {
3925         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3926 }
3927
3928 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3929                                       struct kvm_vcpu *vcpu, u32 access,
3930                                       struct x86_exception *exception)
3931 {
3932         void *data = val;
3933         int r = X86EMUL_CONTINUE;
3934
3935         while (bytes) {
3936                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3937                                                             exception);
3938                 unsigned offset = addr & (PAGE_SIZE-1);
3939                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3940                 int ret;
3941
3942                 if (gpa == UNMAPPED_GVA)
3943                         return X86EMUL_PROPAGATE_FAULT;
3944                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3945                 if (ret < 0) {
3946                         r = X86EMUL_IO_NEEDED;
3947                         goto out;
3948                 }
3949
3950                 bytes -= toread;
3951                 data += toread;
3952                 addr += toread;
3953         }
3954 out:
3955         return r;
3956 }
3957
3958 /* used for instruction fetching */
3959 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3960                                 gva_t addr, void *val, unsigned int bytes,
3961                                 struct x86_exception *exception)
3962 {
3963         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3964         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3965
3966         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3967                                           access | PFERR_FETCH_MASK,
3968                                           exception);
3969 }
3970
3971 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3972                                gva_t addr, void *val, unsigned int bytes,
3973                                struct x86_exception *exception)
3974 {
3975         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3976         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3977
3978         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3979                                           exception);
3980 }
3981 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3982
3983 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3984                                       gva_t addr, void *val, unsigned int bytes,
3985                                       struct x86_exception *exception)
3986 {
3987         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3988         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3989 }
3990
3991 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3992                                        gva_t addr, void *val,
3993                                        unsigned int bytes,
3994                                        struct x86_exception *exception)
3995 {
3996         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3997         void *data = val;
3998         int r = X86EMUL_CONTINUE;
3999
4000         while (bytes) {
4001                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4002                                                              PFERR_WRITE_MASK,
4003                                                              exception);
4004                 unsigned offset = addr & (PAGE_SIZE-1);
4005                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4006                 int ret;
4007
4008                 if (gpa == UNMAPPED_GVA)
4009                         return X86EMUL_PROPAGATE_FAULT;
4010                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4011                 if (ret < 0) {
4012                         r = X86EMUL_IO_NEEDED;
4013                         goto out;
4014                 }
4015
4016                 bytes -= towrite;
4017                 data += towrite;
4018                 addr += towrite;
4019         }
4020 out:
4021         return r;
4022 }
4023 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4024
4025 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4026                                 gpa_t *gpa, struct x86_exception *exception,
4027                                 bool write)
4028 {
4029         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4030
4031         if (vcpu_match_mmio_gva(vcpu, gva) &&
4032                   check_write_user_access(vcpu, write, access,
4033                   vcpu->arch.access)) {
4034                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4035                                         (gva & (PAGE_SIZE - 1));
4036                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4037                 return 1;
4038         }
4039
4040         if (write)
4041                 access |= PFERR_WRITE_MASK;
4042
4043         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4044
4045         if (*gpa == UNMAPPED_GVA)
4046                 return -1;
4047
4048         /* For APIC access vmexit */
4049         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4050                 return 1;
4051
4052         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4053                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4054                 return 1;
4055         }
4056
4057         return 0;
4058 }
4059
4060 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4061                         const void *val, int bytes)
4062 {
4063         int ret;
4064
4065         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4066         if (ret < 0)
4067                 return 0;
4068         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
4069         return 1;
4070 }
4071
4072 struct read_write_emulator_ops {
4073         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4074                                   int bytes);
4075         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4076                                   void *val, int bytes);
4077         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4078                                int bytes, void *val);
4079         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4080                                     void *val, int bytes);
4081         bool write;
4082 };
4083
4084 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4085 {
4086         if (vcpu->mmio_read_completed) {
4087                 memcpy(val, vcpu->mmio_data, bytes);
4088                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4089                                vcpu->mmio_phys_addr, *(u64 *)val);
4090                 vcpu->mmio_read_completed = 0;
4091                 return 1;
4092         }
4093
4094         return 0;
4095 }
4096
4097 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4098                         void *val, int bytes)
4099 {
4100         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4101 }
4102
4103 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4104                          void *val, int bytes)
4105 {
4106         return emulator_write_phys(vcpu, gpa, val, bytes);
4107 }
4108
4109 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4110 {
4111         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4112         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4113 }
4114
4115 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4116                           void *val, int bytes)
4117 {
4118         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4119         return X86EMUL_IO_NEEDED;
4120 }
4121
4122 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4123                            void *val, int bytes)
4124 {
4125         memcpy(vcpu->mmio_data, val, bytes);
4126         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4127         return X86EMUL_CONTINUE;
4128 }
4129
4130 static struct read_write_emulator_ops read_emultor = {
4131         .read_write_prepare = read_prepare,
4132         .read_write_emulate = read_emulate,
4133         .read_write_mmio = vcpu_mmio_read,
4134         .read_write_exit_mmio = read_exit_mmio,
4135 };
4136
4137 static struct read_write_emulator_ops write_emultor = {
4138         .read_write_emulate = write_emulate,
4139         .read_write_mmio = write_mmio,
4140         .read_write_exit_mmio = write_exit_mmio,
4141         .write = true,
4142 };
4143
4144 static int emulator_read_write_onepage(unsigned long addr, void *val,
4145                                        unsigned int bytes,
4146                                        struct x86_exception *exception,
4147                                        struct kvm_vcpu *vcpu,
4148                                        struct read_write_emulator_ops *ops)
4149 {
4150         gpa_t gpa;
4151         int handled, ret;
4152         bool write = ops->write;
4153
4154         if (ops->read_write_prepare &&
4155                   ops->read_write_prepare(vcpu, val, bytes))
4156                 return X86EMUL_CONTINUE;
4157
4158         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4159
4160         if (ret < 0)
4161                 return X86EMUL_PROPAGATE_FAULT;
4162
4163         /* For APIC access vmexit */
4164         if (ret)
4165                 goto mmio;
4166
4167         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4168                 return X86EMUL_CONTINUE;
4169
4170 mmio:
4171         /*
4172          * Is this MMIO handled locally?
4173          */
4174         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4175         if (handled == bytes)
4176                 return X86EMUL_CONTINUE;
4177
4178         gpa += handled;
4179         bytes -= handled;
4180         val += handled;
4181
4182         vcpu->mmio_needed = 1;
4183         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4184         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4185         vcpu->mmio_size = bytes;
4186         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4187         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
4188         vcpu->mmio_index = 0;
4189
4190         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4191 }
4192
4193 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4194                         void *val, unsigned int bytes,
4195                         struct x86_exception *exception,
4196                         struct read_write_emulator_ops *ops)
4197 {
4198         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4199
4200         /* Crossing a page boundary? */
4201         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4202                 int rc, now;
4203
4204                 now = -addr & ~PAGE_MASK;
4205                 rc = emulator_read_write_onepage(addr, val, now, exception,
4206                                                  vcpu, ops);
4207
4208                 if (rc != X86EMUL_CONTINUE)
4209                         return rc;
4210                 addr += now;
4211                 val += now;
4212                 bytes -= now;
4213         }
4214
4215         return emulator_read_write_onepage(addr, val, bytes, exception,
4216                                            vcpu, ops);
4217 }
4218
4219 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4220                                   unsigned long addr,
4221                                   void *val,
4222                                   unsigned int bytes,
4223                                   struct x86_exception *exception)
4224 {
4225         return emulator_read_write(ctxt, addr, val, bytes,
4226                                    exception, &read_emultor);
4227 }
4228
4229 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4230                             unsigned long addr,
4231                             const void *val,
4232                             unsigned int bytes,
4233                             struct x86_exception *exception)
4234 {
4235         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4236                                    exception, &write_emultor);
4237 }
4238
4239 #define CMPXCHG_TYPE(t, ptr, old, new) \
4240         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4241
4242 #ifdef CONFIG_X86_64
4243 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4244 #else
4245 #  define CMPXCHG64(ptr, old, new) \
4246         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4247 #endif
4248
4249 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4250                                      unsigned long addr,
4251                                      const void *old,
4252                                      const void *new,
4253                                      unsigned int bytes,
4254                                      struct x86_exception *exception)
4255 {
4256         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4257         gpa_t gpa;
4258         struct page *page;
4259         char *kaddr;
4260         bool exchanged;
4261
4262         /* guests cmpxchg8b have to be emulated atomically */
4263         if (bytes > 8 || (bytes & (bytes - 1)))
4264                 goto emul_write;
4265
4266         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4267
4268         if (gpa == UNMAPPED_GVA ||
4269             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4270                 goto emul_write;
4271
4272         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4273                 goto emul_write;
4274
4275         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4276         if (is_error_page(page)) {
4277                 kvm_release_page_clean(page);
4278                 goto emul_write;
4279         }
4280
4281         kaddr = kmap_atomic(page, KM_USER0);
4282         kaddr += offset_in_page(gpa);
4283         switch (bytes) {
4284         case 1:
4285                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4286                 break;
4287         case 2:
4288                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4289                 break;
4290         case 4:
4291                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4292                 break;
4293         case 8:
4294                 exchanged = CMPXCHG64(kaddr, old, new);
4295                 break;
4296         default:
4297                 BUG();
4298         }
4299         kunmap_atomic(kaddr, KM_USER0);
4300         kvm_release_page_dirty(page);
4301
4302         if (!exchanged)
4303                 return X86EMUL_CMPXCHG_FAILED;
4304
4305         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4306
4307         return X86EMUL_CONTINUE;
4308
4309 emul_write:
4310         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4311
4312         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4313 }
4314
4315 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4316 {
4317         /* TODO: String I/O for in kernel device */
4318         int r;
4319
4320         if (vcpu->arch.pio.in)
4321                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4322                                     vcpu->arch.pio.size, pd);
4323         else
4324                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4325                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4326                                      pd);
4327         return r;
4328 }
4329
4330
4331 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4332                                     int size, unsigned short port, void *val,
4333                                     unsigned int count)
4334 {
4335         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4336
4337         if (vcpu->arch.pio.count)
4338                 goto data_avail;
4339
4340         trace_kvm_pio(0, port, size, count);
4341
4342         vcpu->arch.pio.port = port;
4343         vcpu->arch.pio.in = 1;
4344         vcpu->arch.pio.count  = count;
4345         vcpu->arch.pio.size = size;
4346
4347         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4348         data_avail:
4349                 memcpy(val, vcpu->arch.pio_data, size * count);
4350                 vcpu->arch.pio.count = 0;
4351                 return 1;
4352         }
4353
4354         vcpu->run->exit_reason = KVM_EXIT_IO;
4355         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4356         vcpu->run->io.size = size;
4357         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4358         vcpu->run->io.count = count;
4359         vcpu->run->io.port = port;
4360
4361         return 0;
4362 }
4363
4364 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4365                                      int size, unsigned short port,
4366                                      const void *val, unsigned int count)
4367 {
4368         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4369
4370         trace_kvm_pio(1, port, size, count);
4371
4372         vcpu->arch.pio.port = port;
4373         vcpu->arch.pio.in = 0;
4374         vcpu->arch.pio.count = count;
4375         vcpu->arch.pio.size = size;
4376
4377         memcpy(vcpu->arch.pio_data, val, size * count);
4378
4379         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4380                 vcpu->arch.pio.count = 0;
4381                 return 1;
4382         }
4383
4384         vcpu->run->exit_reason = KVM_EXIT_IO;
4385         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4386         vcpu->run->io.size = size;
4387         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4388         vcpu->run->io.count = count;
4389         vcpu->run->io.port = port;
4390
4391         return 0;
4392 }
4393
4394 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4395 {
4396         return kvm_x86_ops->get_segment_base(vcpu, seg);
4397 }
4398
4399 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4400 {
4401         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4402 }
4403
4404 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4405 {
4406         if (!need_emulate_wbinvd(vcpu))
4407                 return X86EMUL_CONTINUE;
4408
4409         if (kvm_x86_ops->has_wbinvd_exit()) {
4410                 int cpu = get_cpu();
4411
4412                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4413                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4414                                 wbinvd_ipi, NULL, 1);
4415                 put_cpu();
4416                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4417         } else
4418                 wbinvd();
4419         return X86EMUL_CONTINUE;
4420 }
4421 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4422
4423 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4424 {
4425         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4426 }
4427
4428 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4429 {
4430         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4431 }
4432
4433 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4434 {
4435
4436         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4437 }
4438
4439 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4440 {
4441         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4442 }
4443
4444 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4445 {
4446         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4447         unsigned long value;
4448
4449         switch (cr) {
4450         case 0:
4451                 value = kvm_read_cr0(vcpu);
4452                 break;
4453         case 2:
4454                 value = vcpu->arch.cr2;
4455                 break;
4456         case 3:
4457                 value = kvm_read_cr3(vcpu);
4458                 break;
4459         case 4:
4460                 value = kvm_read_cr4(vcpu);
4461                 break;
4462         case 8:
4463                 value = kvm_get_cr8(vcpu);
4464                 break;
4465         default:
4466                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4467                 return 0;
4468         }
4469
4470         return value;
4471 }
4472
4473 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4474 {
4475         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4476         int res = 0;
4477
4478         switch (cr) {
4479         case 0:
4480                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4481                 break;
4482         case 2:
4483                 vcpu->arch.cr2 = val;
4484                 break;
4485         case 3:
4486                 res = kvm_set_cr3(vcpu, val);
4487                 break;
4488         case 4:
4489                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4490                 break;
4491         case 8:
4492                 res = kvm_set_cr8(vcpu, val);
4493                 break;
4494         default:
4495                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4496                 res = -1;
4497         }
4498
4499         return res;
4500 }
4501
4502 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4503 {
4504         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4505 }
4506
4507 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4508 {
4509         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4510 }
4511
4512 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4513 {
4514         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4515 }
4516
4517 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4518 {
4519         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4520 }
4521
4522 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4523 {
4524         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4525 }
4526
4527 static unsigned long emulator_get_cached_segment_base(
4528         struct x86_emulate_ctxt *ctxt, int seg)
4529 {
4530         return get_segment_base(emul_to_vcpu(ctxt), seg);
4531 }
4532
4533 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4534                                  struct desc_struct *desc, u32 *base3,
4535                                  int seg)
4536 {
4537         struct kvm_segment var;
4538
4539         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4540         *selector = var.selector;
4541
4542         if (var.unusable)
4543                 return false;
4544
4545         if (var.g)
4546                 var.limit >>= 12;
4547         set_desc_limit(desc, var.limit);
4548         set_desc_base(desc, (unsigned long)var.base);
4549 #ifdef CONFIG_X86_64
4550         if (base3)
4551                 *base3 = var.base >> 32;
4552 #endif
4553         desc->type = var.type;
4554         desc->s = var.s;
4555         desc->dpl = var.dpl;
4556         desc->p = var.present;
4557         desc->avl = var.avl;
4558         desc->l = var.l;
4559         desc->d = var.db;
4560         desc->g = var.g;
4561
4562         return true;
4563 }
4564
4565 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4566                                  struct desc_struct *desc, u32 base3,
4567                                  int seg)
4568 {
4569         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4570         struct kvm_segment var;
4571
4572         var.selector = selector;
4573         var.base = get_desc_base(desc);
4574 #ifdef CONFIG_X86_64
4575         var.base |= ((u64)base3) << 32;
4576 #endif
4577         var.limit = get_desc_limit(desc);
4578         if (desc->g)
4579                 var.limit = (var.limit << 12) | 0xfff;
4580         var.type = desc->type;
4581         var.present = desc->p;
4582         var.dpl = desc->dpl;
4583         var.db = desc->d;
4584         var.s = desc->s;
4585         var.l = desc->l;
4586         var.g = desc->g;
4587         var.avl = desc->avl;
4588         var.present = desc->p;
4589         var.unusable = !var.present;
4590         var.padding = 0;
4591
4592         kvm_set_segment(vcpu, &var, seg);
4593         return;
4594 }
4595
4596 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4597                             u32 msr_index, u64 *pdata)
4598 {
4599         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4600 }
4601
4602 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4603                             u32 msr_index, u64 data)
4604 {
4605         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4606 }
4607
4608 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4609 {
4610         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4611 }
4612
4613 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4614 {
4615         preempt_disable();
4616         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4617         /*
4618          * CR0.TS may reference the host fpu state, not the guest fpu state,
4619          * so it may be clear at this point.
4620          */
4621         clts();
4622 }
4623
4624 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4625 {
4626         preempt_enable();
4627 }
4628
4629 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4630                               struct x86_instruction_info *info,
4631                               enum x86_intercept_stage stage)
4632 {
4633         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4634 }
4635
4636 static struct x86_emulate_ops emulate_ops = {
4637         .read_std            = kvm_read_guest_virt_system,
4638         .write_std           = kvm_write_guest_virt_system,
4639         .fetch               = kvm_fetch_guest_virt,
4640         .read_emulated       = emulator_read_emulated,
4641         .write_emulated      = emulator_write_emulated,
4642         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4643         .invlpg              = emulator_invlpg,
4644         .pio_in_emulated     = emulator_pio_in_emulated,
4645         .pio_out_emulated    = emulator_pio_out_emulated,
4646         .get_segment         = emulator_get_segment,
4647         .set_segment         = emulator_set_segment,
4648         .get_cached_segment_base = emulator_get_cached_segment_base,
4649         .get_gdt             = emulator_get_gdt,
4650         .get_idt             = emulator_get_idt,
4651         .set_gdt             = emulator_set_gdt,
4652         .set_idt             = emulator_set_idt,
4653         .get_cr              = emulator_get_cr,
4654         .set_cr              = emulator_set_cr,
4655         .cpl                 = emulator_get_cpl,
4656         .get_dr              = emulator_get_dr,
4657         .set_dr              = emulator_set_dr,
4658         .set_msr             = emulator_set_msr,
4659         .get_msr             = emulator_get_msr,
4660         .halt                = emulator_halt,
4661         .wbinvd              = emulator_wbinvd,
4662         .fix_hypercall       = emulator_fix_hypercall,
4663         .get_fpu             = emulator_get_fpu,
4664         .put_fpu             = emulator_put_fpu,
4665         .intercept           = emulator_intercept,
4666 };
4667
4668 static void cache_all_regs(struct kvm_vcpu *vcpu)
4669 {
4670         kvm_register_read(vcpu, VCPU_REGS_RAX);
4671         kvm_register_read(vcpu, VCPU_REGS_RSP);
4672         kvm_register_read(vcpu, VCPU_REGS_RIP);
4673         vcpu->arch.regs_dirty = ~0;
4674 }
4675
4676 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4677 {
4678         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4679         /*
4680          * an sti; sti; sequence only disable interrupts for the first
4681          * instruction. So, if the last instruction, be it emulated or
4682          * not, left the system with the INT_STI flag enabled, it
4683          * means that the last instruction is an sti. We should not
4684          * leave the flag on in this case. The same goes for mov ss
4685          */
4686         if (!(int_shadow & mask))
4687                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4688 }
4689
4690 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4691 {
4692         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4693         if (ctxt->exception.vector == PF_VECTOR)
4694                 kvm_propagate_fault(vcpu, &ctxt->exception);
4695         else if (ctxt->exception.error_code_valid)
4696                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4697                                       ctxt->exception.error_code);
4698         else
4699                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4700 }
4701
4702 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4703                               const unsigned long *regs)
4704 {
4705         memset(&ctxt->twobyte, 0,
4706                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4707         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4708
4709         ctxt->fetch.start = 0;
4710         ctxt->fetch.end = 0;
4711         ctxt->io_read.pos = 0;
4712         ctxt->io_read.end = 0;
4713         ctxt->mem_read.pos = 0;
4714         ctxt->mem_read.end = 0;
4715 }
4716
4717 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4718 {
4719         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4720         int cs_db, cs_l;
4721
4722         /*
4723          * TODO: fix emulate.c to use guest_read/write_register
4724          * instead of direct ->regs accesses, can save hundred cycles
4725          * on Intel for instructions that don't read/change RSP, for
4726          * for example.
4727          */
4728         cache_all_regs(vcpu);
4729
4730         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4731
4732         ctxt->eflags = kvm_get_rflags(vcpu);
4733         ctxt->eip = kvm_rip_read(vcpu);
4734         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4735                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4736                      cs_l                               ? X86EMUL_MODE_PROT64 :
4737                      cs_db                              ? X86EMUL_MODE_PROT32 :
4738                                                           X86EMUL_MODE_PROT16;
4739         ctxt->guest_mode = is_guest_mode(vcpu);
4740
4741         init_decode_cache(ctxt, vcpu->arch.regs);
4742         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4743 }
4744
4745 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4746 {
4747         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4748         int ret;
4749
4750         init_emulate_ctxt(vcpu);
4751
4752         ctxt->op_bytes = 2;
4753         ctxt->ad_bytes = 2;
4754         ctxt->_eip = ctxt->eip + inc_eip;
4755         ret = emulate_int_real(ctxt, irq);
4756
4757         if (ret != X86EMUL_CONTINUE)
4758                 return EMULATE_FAIL;
4759
4760         ctxt->eip = ctxt->_eip;
4761         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4762         kvm_rip_write(vcpu, ctxt->eip);
4763         kvm_set_rflags(vcpu, ctxt->eflags);
4764
4765         if (irq == NMI_VECTOR)
4766                 vcpu->arch.nmi_pending = false;
4767         else
4768                 vcpu->arch.interrupt.pending = false;
4769
4770         return EMULATE_DONE;
4771 }
4772 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4773
4774 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4775 {
4776         int r = EMULATE_DONE;
4777
4778         ++vcpu->stat.insn_emulation_fail;
4779         trace_kvm_emulate_insn_failed(vcpu);
4780         if (!is_guest_mode(vcpu)) {
4781                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4782                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4783                 vcpu->run->internal.ndata = 0;
4784                 r = EMULATE_FAIL;
4785         }
4786         kvm_queue_exception(vcpu, UD_VECTOR);
4787
4788         return r;
4789 }
4790
4791 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4792 {
4793         gpa_t gpa;
4794
4795         if (tdp_enabled)
4796                 return false;
4797
4798         /*
4799          * if emulation was due to access to shadowed page table
4800          * and it failed try to unshadow page and re-entetr the
4801          * guest to let CPU execute the instruction.
4802          */
4803         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4804                 return true;
4805
4806         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4807
4808         if (gpa == UNMAPPED_GVA)
4809                 return true; /* let cpu generate fault */
4810
4811         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4812                 return true;
4813
4814         return false;
4815 }
4816
4817 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4818                             unsigned long cr2,
4819                             int emulation_type,
4820                             void *insn,
4821                             int insn_len)
4822 {
4823         int r;
4824         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4825         bool writeback = true;
4826
4827         kvm_clear_exception_queue(vcpu);
4828
4829         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4830                 init_emulate_ctxt(vcpu);
4831                 ctxt->interruptibility = 0;
4832                 ctxt->have_exception = false;
4833                 ctxt->perm_ok = false;
4834
4835                 ctxt->only_vendor_specific_insn
4836                         = emulation_type & EMULTYPE_TRAP_UD;
4837
4838                 r = x86_decode_insn(ctxt, insn, insn_len);
4839
4840                 trace_kvm_emulate_insn_start(vcpu);
4841                 ++vcpu->stat.insn_emulation;
4842                 if (r != EMULATION_OK)  {
4843                         if (emulation_type & EMULTYPE_TRAP_UD)
4844                                 return EMULATE_FAIL;
4845                         if (reexecute_instruction(vcpu, cr2))
4846                                 return EMULATE_DONE;
4847                         if (emulation_type & EMULTYPE_SKIP)
4848                                 return EMULATE_FAIL;
4849                         return handle_emulation_failure(vcpu);
4850                 }
4851         }
4852
4853         if (emulation_type & EMULTYPE_SKIP) {
4854                 kvm_rip_write(vcpu, ctxt->_eip);
4855                 return EMULATE_DONE;
4856         }
4857
4858         /* this is needed for vmware backdoor interface to work since it
4859            changes registers values  during IO operation */
4860         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4861                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4862                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4863         }
4864
4865 restart:
4866         r = x86_emulate_insn(ctxt);
4867
4868         if (r == EMULATION_INTERCEPTED)
4869                 return EMULATE_DONE;
4870
4871         if (r == EMULATION_FAILED) {
4872                 if (reexecute_instruction(vcpu, cr2))
4873                         return EMULATE_DONE;
4874
4875                 return handle_emulation_failure(vcpu);
4876         }
4877
4878         if (ctxt->have_exception) {
4879                 inject_emulated_exception(vcpu);
4880                 r = EMULATE_DONE;
4881         } else if (vcpu->arch.pio.count) {
4882                 if (!vcpu->arch.pio.in)
4883                         vcpu->arch.pio.count = 0;
4884                 else
4885                         writeback = false;
4886                 r = EMULATE_DO_MMIO;
4887         } else if (vcpu->mmio_needed) {
4888                 if (!vcpu->mmio_is_write)
4889                         writeback = false;
4890                 r = EMULATE_DO_MMIO;
4891         } else if (r == EMULATION_RESTART)
4892                 goto restart;
4893         else
4894                 r = EMULATE_DONE;
4895
4896         if (writeback) {
4897                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4898                 kvm_set_rflags(vcpu, ctxt->eflags);
4899                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4900                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4901                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4902                 kvm_rip_write(vcpu, ctxt->eip);
4903         } else
4904                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4905
4906         return r;
4907 }
4908 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4909
4910 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4911 {
4912         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4913         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4914                                             size, port, &val, 1);
4915         /* do not return to emulator after return from userspace */
4916         vcpu->arch.pio.count = 0;
4917         return ret;
4918 }
4919 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4920
4921 static void tsc_bad(void *info)
4922 {
4923         __this_cpu_write(cpu_tsc_khz, 0);
4924 }
4925
4926 static void tsc_khz_changed(void *data)
4927 {
4928         struct cpufreq_freqs *freq = data;
4929         unsigned long khz = 0;
4930
4931         if (data)
4932                 khz = freq->new;
4933         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4934                 khz = cpufreq_quick_get(raw_smp_processor_id());
4935         if (!khz)
4936                 khz = tsc_khz;
4937         __this_cpu_write(cpu_tsc_khz, khz);
4938 }
4939
4940 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4941                                      void *data)
4942 {
4943         struct cpufreq_freqs *freq = data;
4944         struct kvm *kvm;
4945         struct kvm_vcpu *vcpu;
4946         int i, send_ipi = 0;
4947
4948         /*
4949          * We allow guests to temporarily run on slowing clocks,
4950          * provided we notify them after, or to run on accelerating
4951          * clocks, provided we notify them before.  Thus time never
4952          * goes backwards.
4953          *
4954          * However, we have a problem.  We can't atomically update
4955          * the frequency of a given CPU from this function; it is
4956          * merely a notifier, which can be called from any CPU.
4957          * Changing the TSC frequency at arbitrary points in time
4958          * requires a recomputation of local variables related to
4959          * the TSC for each VCPU.  We must flag these local variables
4960          * to be updated and be sure the update takes place with the
4961          * new frequency before any guests proceed.
4962          *
4963          * Unfortunately, the combination of hotplug CPU and frequency
4964          * change creates an intractable locking scenario; the order
4965          * of when these callouts happen is undefined with respect to
4966          * CPU hotplug, and they can race with each other.  As such,
4967          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4968          * undefined; you can actually have a CPU frequency change take
4969          * place in between the computation of X and the setting of the
4970          * variable.  To protect against this problem, all updates of
4971          * the per_cpu tsc_khz variable are done in an interrupt
4972          * protected IPI, and all callers wishing to update the value
4973          * must wait for a synchronous IPI to complete (which is trivial
4974          * if the caller is on the CPU already).  This establishes the
4975          * necessary total order on variable updates.
4976          *
4977          * Note that because a guest time update may take place
4978          * anytime after the setting of the VCPU's request bit, the
4979          * correct TSC value must be set before the request.  However,
4980          * to ensure the update actually makes it to any guest which
4981          * starts running in hardware virtualization between the set
4982          * and the acquisition of the spinlock, we must also ping the
4983          * CPU after setting the request bit.
4984          *
4985          */
4986
4987         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4988                 return 0;
4989         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4990                 return 0;
4991
4992         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4993
4994         raw_spin_lock(&kvm_lock);
4995         list_for_each_entry(kvm, &vm_list, vm_list) {
4996                 kvm_for_each_vcpu(i, vcpu, kvm) {
4997                         if (vcpu->cpu != freq->cpu)
4998                                 continue;
4999                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5000                         if (vcpu->cpu != smp_processor_id())
5001                                 send_ipi = 1;
5002                 }
5003         }
5004         raw_spin_unlock(&kvm_lock);
5005
5006         if (freq->old < freq->new && send_ipi) {
5007                 /*
5008                  * We upscale the frequency.  Must make the guest
5009                  * doesn't see old kvmclock values while running with
5010                  * the new frequency, otherwise we risk the guest sees
5011                  * time go backwards.
5012                  *
5013                  * In case we update the frequency for another cpu
5014                  * (which might be in guest context) send an interrupt
5015                  * to kick the cpu out of guest context.  Next time
5016                  * guest context is entered kvmclock will be updated,
5017                  * so the guest will not see stale values.
5018                  */
5019                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5020         }
5021         return 0;
5022 }
5023
5024 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5025         .notifier_call  = kvmclock_cpufreq_notifier
5026 };
5027
5028 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5029                                         unsigned long action, void *hcpu)
5030 {
5031         unsigned int cpu = (unsigned long)hcpu;
5032
5033         switch (action) {
5034                 case CPU_ONLINE:
5035                 case CPU_DOWN_FAILED:
5036                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5037                         break;
5038                 case CPU_DOWN_PREPARE:
5039                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5040                         break;
5041         }
5042         return NOTIFY_OK;
5043 }
5044
5045 static struct notifier_block kvmclock_cpu_notifier_block = {
5046         .notifier_call  = kvmclock_cpu_notifier,
5047         .priority = -INT_MAX
5048 };
5049
5050 static void kvm_timer_init(void)
5051 {
5052         int cpu;
5053
5054         max_tsc_khz = tsc_khz;
5055         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5056         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5057 #ifdef CONFIG_CPU_FREQ
5058                 struct cpufreq_policy policy;
5059                 memset(&policy, 0, sizeof(policy));
5060                 cpu = get_cpu();
5061                 cpufreq_get_policy(&policy, cpu);
5062                 if (policy.cpuinfo.max_freq)
5063                         max_tsc_khz = policy.cpuinfo.max_freq;
5064                 put_cpu();
5065 #endif
5066                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5067                                           CPUFREQ_TRANSITION_NOTIFIER);
5068         }
5069         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5070         for_each_online_cpu(cpu)
5071                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5072 }
5073
5074 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5075
5076 static int kvm_is_in_guest(void)
5077 {
5078         return percpu_read(current_vcpu) != NULL;
5079 }
5080
5081 static int kvm_is_user_mode(void)
5082 {
5083         int user_mode = 3;
5084
5085         if (percpu_read(current_vcpu))
5086                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
5087
5088         return user_mode != 0;
5089 }
5090
5091 static unsigned long kvm_get_guest_ip(void)
5092 {
5093         unsigned long ip = 0;
5094
5095         if (percpu_read(current_vcpu))
5096                 ip = kvm_rip_read(percpu_read(current_vcpu));
5097
5098         return ip;
5099 }
5100
5101 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5102         .is_in_guest            = kvm_is_in_guest,
5103         .is_user_mode           = kvm_is_user_mode,
5104         .get_guest_ip           = kvm_get_guest_ip,
5105 };
5106
5107 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5108 {
5109         percpu_write(current_vcpu, vcpu);
5110 }
5111 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5112
5113 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5114 {
5115         percpu_write(current_vcpu, NULL);
5116 }
5117 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5118
5119 static void kvm_set_mmio_spte_mask(void)
5120 {
5121         u64 mask;
5122         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5123
5124         /*
5125          * Set the reserved bits and the present bit of an paging-structure
5126          * entry to generate page fault with PFER.RSV = 1.
5127          */
5128         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5129         mask |= 1ull;
5130
5131 #ifdef CONFIG_X86_64
5132         /*
5133          * If reserved bit is not supported, clear the present bit to disable
5134          * mmio page fault.
5135          */
5136         if (maxphyaddr == 52)
5137                 mask &= ~1ull;
5138 #endif
5139
5140         kvm_mmu_set_mmio_spte_mask(mask);
5141 }
5142
5143 int kvm_arch_init(void *opaque)
5144 {
5145         int r;
5146         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5147
5148         if (kvm_x86_ops) {
5149                 printk(KERN_ERR "kvm: already loaded the other module\n");
5150                 r = -EEXIST;
5151                 goto out;
5152         }
5153
5154         if (!ops->cpu_has_kvm_support()) {
5155                 printk(KERN_ERR "kvm: no hardware support\n");
5156                 r = -EOPNOTSUPP;
5157                 goto out;
5158         }
5159         if (ops->disabled_by_bios()) {
5160                 printk(KERN_ERR "kvm: disabled by bios\n");
5161                 r = -EOPNOTSUPP;
5162                 goto out;
5163         }
5164
5165         r = kvm_mmu_module_init();
5166         if (r)
5167                 goto out;
5168
5169         kvm_set_mmio_spte_mask();
5170         kvm_init_msr_list();
5171
5172         kvm_x86_ops = ops;
5173         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5174                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5175
5176         kvm_timer_init();
5177
5178         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5179
5180         if (cpu_has_xsave)
5181                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5182
5183         return 0;
5184
5185 out:
5186         return r;
5187 }
5188
5189 void kvm_arch_exit(void)
5190 {
5191         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5192
5193         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5194                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5195                                             CPUFREQ_TRANSITION_NOTIFIER);
5196         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5197         kvm_x86_ops = NULL;
5198         kvm_mmu_module_exit();
5199 }
5200
5201 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5202 {
5203         ++vcpu->stat.halt_exits;
5204         if (irqchip_in_kernel(vcpu->kvm)) {
5205                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5206                 return 1;
5207         } else {
5208                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5209                 return 0;
5210         }
5211 }
5212 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5213
5214 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
5215                            unsigned long a1)
5216 {
5217         if (is_long_mode(vcpu))
5218                 return a0;
5219         else
5220                 return a0 | ((gpa_t)a1 << 32);
5221 }
5222
5223 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5224 {
5225         u64 param, ingpa, outgpa, ret;
5226         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5227         bool fast, longmode;
5228         int cs_db, cs_l;
5229
5230         /*
5231          * hypercall generates UD from non zero cpl and real mode
5232          * per HYPER-V spec
5233          */
5234         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5235                 kvm_queue_exception(vcpu, UD_VECTOR);
5236                 return 0;
5237         }
5238
5239         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5240         longmode = is_long_mode(vcpu) && cs_l == 1;
5241
5242         if (!longmode) {
5243                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5244                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5245                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5246                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5247                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5248                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5249         }
5250 #ifdef CONFIG_X86_64
5251         else {
5252                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5253                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5254                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5255         }
5256 #endif
5257
5258         code = param & 0xffff;
5259         fast = (param >> 16) & 0x1;
5260         rep_cnt = (param >> 32) & 0xfff;
5261         rep_idx = (param >> 48) & 0xfff;
5262
5263         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5264
5265         switch (code) {
5266         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5267                 kvm_vcpu_on_spin(vcpu);
5268                 break;
5269         default:
5270                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5271                 break;
5272         }
5273
5274         ret = res | (((u64)rep_done & 0xfff) << 32);
5275         if (longmode) {
5276                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5277         } else {
5278                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5279                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5280         }
5281
5282         return 1;
5283 }
5284
5285 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5286 {
5287         unsigned long nr, a0, a1, a2, a3, ret;
5288         int r = 1;
5289
5290         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5291                 return kvm_hv_hypercall(vcpu);
5292
5293         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5294         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5295         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5296         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5297         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5298
5299         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5300
5301         if (!is_long_mode(vcpu)) {
5302                 nr &= 0xFFFFFFFF;
5303                 a0 &= 0xFFFFFFFF;
5304                 a1 &= 0xFFFFFFFF;
5305                 a2 &= 0xFFFFFFFF;
5306                 a3 &= 0xFFFFFFFF;
5307         }
5308
5309         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5310                 ret = -KVM_EPERM;
5311                 goto out;
5312         }
5313
5314         switch (nr) {
5315         case KVM_HC_VAPIC_POLL_IRQ:
5316                 ret = 0;
5317                 break;
5318         case KVM_HC_MMU_OP:
5319                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5320                 break;
5321         default:
5322                 ret = -KVM_ENOSYS;
5323                 break;
5324         }
5325 out:
5326         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5327         ++vcpu->stat.hypercalls;
5328         return r;
5329 }
5330 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5331
5332 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5333 {
5334         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5335         char instruction[3];
5336         unsigned long rip = kvm_rip_read(vcpu);
5337
5338         /*
5339          * Blow out the MMU to ensure that no other VCPU has an active mapping
5340          * to ensure that the updated hypercall appears atomically across all
5341          * VCPUs.
5342          */
5343         kvm_mmu_zap_all(vcpu->kvm);
5344
5345         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5346
5347         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5348 }
5349
5350 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5351 {
5352         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5353         int j, nent = vcpu->arch.cpuid_nent;
5354
5355         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5356         /* when no next entry is found, the current entry[i] is reselected */
5357         for (j = i + 1; ; j = (j + 1) % nent) {
5358                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5359                 if (ej->function == e->function) {
5360                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5361                         return j;
5362                 }
5363         }
5364         return 0; /* silence gcc, even though control never reaches here */
5365 }
5366
5367 /* find an entry with matching function, matching index (if needed), and that
5368  * should be read next (if it's stateful) */
5369 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5370         u32 function, u32 index)
5371 {
5372         if (e->function != function)
5373                 return 0;
5374         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5375                 return 0;
5376         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5377             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5378                 return 0;
5379         return 1;
5380 }
5381
5382 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5383                                               u32 function, u32 index)
5384 {
5385         int i;
5386         struct kvm_cpuid_entry2 *best = NULL;
5387
5388         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5389                 struct kvm_cpuid_entry2 *e;
5390
5391                 e = &vcpu->arch.cpuid_entries[i];
5392                 if (is_matching_cpuid_entry(e, function, index)) {
5393                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5394                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5395                         best = e;
5396                         break;
5397                 }
5398         }
5399         return best;
5400 }
5401 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5402
5403 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5404 {
5405         struct kvm_cpuid_entry2 *best;
5406
5407         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5408         if (!best || best->eax < 0x80000008)
5409                 goto not_found;
5410         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5411         if (best)
5412                 return best->eax & 0xff;
5413 not_found:
5414         return 36;
5415 }
5416
5417 /*
5418  * If no match is found, check whether we exceed the vCPU's limit
5419  * and return the content of the highest valid _standard_ leaf instead.
5420  * This is to satisfy the CPUID specification.
5421  */
5422 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5423                                                   u32 function, u32 index)
5424 {
5425         struct kvm_cpuid_entry2 *maxlevel;
5426
5427         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5428         if (!maxlevel || maxlevel->eax >= function)
5429                 return NULL;
5430         if (function & 0x80000000) {
5431                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5432                 if (!maxlevel)
5433                         return NULL;
5434         }
5435         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5436 }
5437
5438 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5439 {
5440         u32 function, index;
5441         struct kvm_cpuid_entry2 *best;
5442
5443         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5444         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5445         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5446         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5447         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5448         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5449         best = kvm_find_cpuid_entry(vcpu, function, index);
5450
5451         if (!best)
5452                 best = check_cpuid_limit(vcpu, function, index);
5453
5454         if (best) {
5455                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5456                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5457                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5458                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5459         }
5460         kvm_x86_ops->skip_emulated_instruction(vcpu);
5461         trace_kvm_cpuid(function,
5462                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5463                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5464                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5465                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5466 }
5467 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5468
5469 /*
5470  * Check if userspace requested an interrupt window, and that the
5471  * interrupt window is open.
5472  *
5473  * No need to exit to userspace if we already have an interrupt queued.
5474  */
5475 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5476 {
5477         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5478                 vcpu->run->request_interrupt_window &&
5479                 kvm_arch_interrupt_allowed(vcpu));
5480 }
5481
5482 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5483 {
5484         struct kvm_run *kvm_run = vcpu->run;
5485
5486         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5487         kvm_run->cr8 = kvm_get_cr8(vcpu);
5488         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5489         if (irqchip_in_kernel(vcpu->kvm))
5490                 kvm_run->ready_for_interrupt_injection = 1;
5491         else
5492                 kvm_run->ready_for_interrupt_injection =
5493                         kvm_arch_interrupt_allowed(vcpu) &&
5494                         !kvm_cpu_has_interrupt(vcpu) &&
5495                         !kvm_event_needs_reinjection(vcpu);
5496 }
5497
5498 static void vapic_enter(struct kvm_vcpu *vcpu)
5499 {
5500         struct kvm_lapic *apic = vcpu->arch.apic;
5501         struct page *page;
5502
5503         if (!apic || !apic->vapic_addr)
5504                 return;
5505
5506         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5507
5508         vcpu->arch.apic->vapic_page = page;
5509 }
5510
5511 static void vapic_exit(struct kvm_vcpu *vcpu)
5512 {
5513         struct kvm_lapic *apic = vcpu->arch.apic;
5514         int idx;
5515
5516         if (!apic || !apic->vapic_addr)
5517                 return;
5518
5519         idx = srcu_read_lock(&vcpu->kvm->srcu);
5520         kvm_release_page_dirty(apic->vapic_page);
5521         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5522         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5523 }
5524
5525 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5526 {
5527         int max_irr, tpr;
5528
5529         if (!kvm_x86_ops->update_cr8_intercept)
5530                 return;
5531
5532         if (!vcpu->arch.apic)
5533                 return;
5534
5535         if (!vcpu->arch.apic->vapic_addr)
5536                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5537         else
5538                 max_irr = -1;
5539
5540         if (max_irr != -1)
5541                 max_irr >>= 4;
5542
5543         tpr = kvm_lapic_get_cr8(vcpu);
5544
5545         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5546 }
5547
5548 static void inject_pending_event(struct kvm_vcpu *vcpu)
5549 {
5550         /* try to reinject previous events if any */
5551         if (vcpu->arch.exception.pending) {
5552                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5553                                         vcpu->arch.exception.has_error_code,
5554                                         vcpu->arch.exception.error_code);
5555                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5556                                           vcpu->arch.exception.has_error_code,
5557                                           vcpu->arch.exception.error_code,
5558                                           vcpu->arch.exception.reinject);
5559                 return;
5560         }
5561
5562         if (vcpu->arch.nmi_injected) {
5563                 kvm_x86_ops->set_nmi(vcpu);
5564                 return;
5565         }
5566
5567         if (vcpu->arch.interrupt.pending) {
5568                 kvm_x86_ops->set_irq(vcpu);
5569                 return;
5570         }
5571
5572         /* try to inject new event if pending */
5573         if (vcpu->arch.nmi_pending) {
5574                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5575                         vcpu->arch.nmi_pending = false;
5576                         vcpu->arch.nmi_injected = true;
5577                         kvm_x86_ops->set_nmi(vcpu);
5578                 }
5579         } else if (kvm_cpu_has_interrupt(vcpu)) {
5580                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5581                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5582                                             false);
5583                         kvm_x86_ops->set_irq(vcpu);
5584                 }
5585         }
5586 }
5587
5588 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5589 {
5590         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5591                         !vcpu->guest_xcr0_loaded) {
5592                 /* kvm_set_xcr() also depends on this */
5593                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5594                 vcpu->guest_xcr0_loaded = 1;
5595         }
5596 }
5597
5598 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5599 {
5600         if (vcpu->guest_xcr0_loaded) {
5601                 if (vcpu->arch.xcr0 != host_xcr0)
5602                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5603                 vcpu->guest_xcr0_loaded = 0;
5604         }
5605 }
5606
5607 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5608 {
5609         int r;
5610         bool nmi_pending;
5611         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5612                 vcpu->run->request_interrupt_window;
5613
5614         if (vcpu->requests) {
5615                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5616                         kvm_mmu_unload(vcpu);
5617                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5618                         __kvm_migrate_timers(vcpu);
5619                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5620                         r = kvm_guest_time_update(vcpu);
5621                         if (unlikely(r))
5622                                 goto out;
5623                 }
5624                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5625                         kvm_mmu_sync_roots(vcpu);
5626                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5627                         kvm_x86_ops->tlb_flush(vcpu);
5628                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5629                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5630                         r = 0;
5631                         goto out;
5632                 }
5633                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5634                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5635                         r = 0;
5636                         goto out;
5637                 }
5638                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5639                         vcpu->fpu_active = 0;
5640                         kvm_x86_ops->fpu_deactivate(vcpu);
5641                 }
5642                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5643                         /* Page is swapped out. Do synthetic halt */
5644                         vcpu->arch.apf.halted = true;
5645                         r = 1;
5646                         goto out;
5647                 }
5648                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5649                         record_steal_time(vcpu);
5650
5651         }
5652
5653         r = kvm_mmu_reload(vcpu);
5654         if (unlikely(r))
5655                 goto out;
5656
5657         /*
5658          * An NMI can be injected between local nmi_pending read and
5659          * vcpu->arch.nmi_pending read inside inject_pending_event().
5660          * But in that case, KVM_REQ_EVENT will be set, which makes
5661          * the race described above benign.
5662          */
5663         nmi_pending = ACCESS_ONCE(vcpu->arch.nmi_pending);
5664
5665         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5666                 inject_pending_event(vcpu);
5667
5668                 /* enable NMI/IRQ window open exits if needed */
5669                 if (nmi_pending)
5670                         kvm_x86_ops->enable_nmi_window(vcpu);
5671                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5672                         kvm_x86_ops->enable_irq_window(vcpu);
5673
5674                 if (kvm_lapic_enabled(vcpu)) {
5675                         update_cr8_intercept(vcpu);
5676                         kvm_lapic_sync_to_vapic(vcpu);
5677                 }
5678         }
5679
5680         preempt_disable();
5681
5682         kvm_x86_ops->prepare_guest_switch(vcpu);
5683         if (vcpu->fpu_active)
5684                 kvm_load_guest_fpu(vcpu);
5685         kvm_load_guest_xcr0(vcpu);
5686
5687         vcpu->mode = IN_GUEST_MODE;
5688
5689         /* We should set ->mode before check ->requests,
5690          * see the comment in make_all_cpus_request.
5691          */
5692         smp_mb();
5693
5694         local_irq_disable();
5695
5696         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5697             || need_resched() || signal_pending(current)) {
5698                 vcpu->mode = OUTSIDE_GUEST_MODE;
5699                 smp_wmb();
5700                 local_irq_enable();
5701                 preempt_enable();
5702                 kvm_x86_ops->cancel_injection(vcpu);
5703                 r = 1;
5704                 goto out;
5705         }
5706
5707         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5708
5709         kvm_guest_enter();
5710
5711         if (unlikely(vcpu->arch.switch_db_regs)) {
5712                 set_debugreg(0, 7);
5713                 set_debugreg(vcpu->arch.eff_db[0], 0);
5714                 set_debugreg(vcpu->arch.eff_db[1], 1);
5715                 set_debugreg(vcpu->arch.eff_db[2], 2);
5716                 set_debugreg(vcpu->arch.eff_db[3], 3);
5717         }
5718
5719         trace_kvm_entry(vcpu->vcpu_id);
5720         kvm_x86_ops->run(vcpu);
5721
5722         /*
5723          * If the guest has used debug registers, at least dr7
5724          * will be disabled while returning to the host.
5725          * If we don't have active breakpoints in the host, we don't
5726          * care about the messed up debug address registers. But if
5727          * we have some of them active, restore the old state.
5728          */
5729         if (hw_breakpoint_active())
5730                 hw_breakpoint_restore();
5731
5732         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5733
5734         vcpu->mode = OUTSIDE_GUEST_MODE;
5735         smp_wmb();
5736         local_irq_enable();
5737
5738         ++vcpu->stat.exits;
5739
5740         /*
5741          * We must have an instruction between local_irq_enable() and
5742          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5743          * the interrupt shadow.  The stat.exits increment will do nicely.
5744          * But we need to prevent reordering, hence this barrier():
5745          */
5746         barrier();
5747
5748         kvm_guest_exit();
5749
5750         preempt_enable();
5751
5752         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5753
5754         /*
5755          * Profile KVM exit RIPs:
5756          */
5757         if (unlikely(prof_on == KVM_PROFILING)) {
5758                 unsigned long rip = kvm_rip_read(vcpu);
5759                 profile_hit(KVM_PROFILING, (void *)rip);
5760         }
5761
5762
5763         kvm_lapic_sync_from_vapic(vcpu);
5764
5765         r = kvm_x86_ops->handle_exit(vcpu);
5766 out:
5767         return r;
5768 }
5769
5770
5771 static int __vcpu_run(struct kvm_vcpu *vcpu)
5772 {
5773         int r;
5774         struct kvm *kvm = vcpu->kvm;
5775
5776         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5777                 pr_debug("vcpu %d received sipi with vector # %x\n",
5778                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5779                 kvm_lapic_reset(vcpu);
5780                 r = kvm_arch_vcpu_reset(vcpu);
5781                 if (r)
5782                         return r;
5783                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5784         }
5785
5786         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5787         vapic_enter(vcpu);
5788
5789         r = 1;
5790         while (r > 0) {
5791                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5792                     !vcpu->arch.apf.halted)
5793                         r = vcpu_enter_guest(vcpu);
5794                 else {
5795                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5796                         kvm_vcpu_block(vcpu);
5797                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5798                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5799                         {
5800                                 switch(vcpu->arch.mp_state) {
5801                                 case KVM_MP_STATE_HALTED:
5802                                         vcpu->arch.mp_state =
5803                                                 KVM_MP_STATE_RUNNABLE;
5804                                 case KVM_MP_STATE_RUNNABLE:
5805                                         vcpu->arch.apf.halted = false;
5806                                         break;
5807                                 case KVM_MP_STATE_SIPI_RECEIVED:
5808                                 default:
5809                                         r = -EINTR;
5810                                         break;
5811                                 }
5812                         }
5813                 }
5814
5815                 if (r <= 0)
5816                         break;
5817
5818                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5819                 if (kvm_cpu_has_pending_timer(vcpu))
5820                         kvm_inject_pending_timer_irqs(vcpu);
5821
5822                 if (dm_request_for_irq_injection(vcpu)) {
5823                         r = -EINTR;
5824                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5825                         ++vcpu->stat.request_irq_exits;
5826                 }
5827
5828                 kvm_check_async_pf_completion(vcpu);
5829
5830                 if (signal_pending(current)) {
5831                         r = -EINTR;
5832                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5833                         ++vcpu->stat.signal_exits;
5834                 }
5835                 if (need_resched()) {
5836                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5837                         kvm_resched(vcpu);
5838                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5839                 }
5840         }
5841
5842         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5843
5844         vapic_exit(vcpu);
5845
5846         return r;
5847 }
5848
5849 static int complete_mmio(struct kvm_vcpu *vcpu)
5850 {
5851         struct kvm_run *run = vcpu->run;
5852         int r;
5853
5854         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5855                 return 1;
5856
5857         if (vcpu->mmio_needed) {
5858                 vcpu->mmio_needed = 0;
5859                 if (!vcpu->mmio_is_write)
5860                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5861                                run->mmio.data, 8);
5862                 vcpu->mmio_index += 8;
5863                 if (vcpu->mmio_index < vcpu->mmio_size) {
5864                         run->exit_reason = KVM_EXIT_MMIO;
5865                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5866                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5867                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5868                         run->mmio.is_write = vcpu->mmio_is_write;
5869                         vcpu->mmio_needed = 1;
5870                         return 0;
5871                 }
5872                 if (vcpu->mmio_is_write)
5873                         return 1;
5874                 vcpu->mmio_read_completed = 1;
5875         }
5876         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5877         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5878         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5879         if (r != EMULATE_DONE)
5880                 return 0;
5881         return 1;
5882 }
5883
5884 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5885 {
5886         int r;
5887         sigset_t sigsaved;
5888
5889         if (!tsk_used_math(current) && init_fpu(current))
5890                 return -ENOMEM;
5891
5892         if (vcpu->sigset_active)
5893                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5894
5895         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5896                 kvm_vcpu_block(vcpu);
5897                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5898                 r = -EAGAIN;
5899                 goto out;
5900         }
5901
5902         /* re-sync apic's tpr */
5903         if (!irqchip_in_kernel(vcpu->kvm)) {
5904                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5905                         r = -EINVAL;
5906                         goto out;
5907                 }
5908         }
5909
5910         r = complete_mmio(vcpu);
5911         if (r <= 0)
5912                 goto out;
5913
5914         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5915                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5916                                      kvm_run->hypercall.ret);
5917
5918         r = __vcpu_run(vcpu);
5919
5920 out:
5921         post_kvm_run_save(vcpu);
5922         if (vcpu->sigset_active)
5923                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5924
5925         return r;
5926 }
5927
5928 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5929 {
5930         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5931                 /*
5932                  * We are here if userspace calls get_regs() in the middle of
5933                  * instruction emulation. Registers state needs to be copied
5934                  * back from emulation context to vcpu. Usrapace shouldn't do
5935                  * that usually, but some bad designed PV devices (vmware
5936                  * backdoor interface) need this to work
5937                  */
5938                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5939                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5940                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5941         }
5942         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5943         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5944         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5945         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5946         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5947         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5948         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5949         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5950 #ifdef CONFIG_X86_64
5951         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5952         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5953         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5954         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5955         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5956         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5957         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5958         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5959 #endif
5960
5961         regs->rip = kvm_rip_read(vcpu);
5962         regs->rflags = kvm_get_rflags(vcpu);
5963
5964         return 0;
5965 }
5966
5967 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5968 {
5969         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5970         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5971
5972         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5973         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5974         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5975         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5976         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5977         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5978         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5979         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5980 #ifdef CONFIG_X86_64
5981         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5982         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5983         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5984         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5985         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5986         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5987         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5988         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5989 #endif
5990
5991         kvm_rip_write(vcpu, regs->rip);
5992         kvm_set_rflags(vcpu, regs->rflags);
5993
5994         vcpu->arch.exception.pending = false;
5995
5996         kvm_make_request(KVM_REQ_EVENT, vcpu);
5997
5998         return 0;
5999 }
6000
6001 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6002 {
6003         struct kvm_segment cs;
6004
6005         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6006         *db = cs.db;
6007         *l = cs.l;
6008 }
6009 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6010
6011 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6012                                   struct kvm_sregs *sregs)
6013 {
6014         struct desc_ptr dt;
6015
6016         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6017         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6018         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6019         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6020         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6021         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6022
6023         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6024         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6025
6026         kvm_x86_ops->get_idt(vcpu, &dt);
6027         sregs->idt.limit = dt.size;
6028         sregs->idt.base = dt.address;
6029         kvm_x86_ops->get_gdt(vcpu, &dt);
6030         sregs->gdt.limit = dt.size;
6031         sregs->gdt.base = dt.address;
6032
6033         sregs->cr0 = kvm_read_cr0(vcpu);
6034         sregs->cr2 = vcpu->arch.cr2;
6035         sregs->cr3 = kvm_read_cr3(vcpu);
6036         sregs->cr4 = kvm_read_cr4(vcpu);
6037         sregs->cr8 = kvm_get_cr8(vcpu);
6038         sregs->efer = vcpu->arch.efer;
6039         sregs->apic_base = kvm_get_apic_base(vcpu);
6040
6041         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6042
6043         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6044                 set_bit(vcpu->arch.interrupt.nr,
6045                         (unsigned long *)sregs->interrupt_bitmap);
6046
6047         return 0;
6048 }
6049
6050 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6051                                     struct kvm_mp_state *mp_state)
6052 {
6053         mp_state->mp_state = vcpu->arch.mp_state;
6054         return 0;
6055 }
6056
6057 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6058                                     struct kvm_mp_state *mp_state)
6059 {
6060         vcpu->arch.mp_state = mp_state->mp_state;
6061         kvm_make_request(KVM_REQ_EVENT, vcpu);
6062         return 0;
6063 }
6064
6065 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
6066                     bool has_error_code, u32 error_code)
6067 {
6068         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6069         int ret;
6070
6071         init_emulate_ctxt(vcpu);
6072
6073         ret = emulator_task_switch(ctxt, tss_selector, reason,
6074                                    has_error_code, error_code);
6075
6076         if (ret)
6077                 return EMULATE_FAIL;
6078
6079         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
6080         kvm_rip_write(vcpu, ctxt->eip);
6081         kvm_set_rflags(vcpu, ctxt->eflags);
6082         kvm_make_request(KVM_REQ_EVENT, vcpu);
6083         return EMULATE_DONE;
6084 }
6085 EXPORT_SYMBOL_GPL(kvm_task_switch);
6086
6087 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6088                                   struct kvm_sregs *sregs)
6089 {
6090         int mmu_reset_needed = 0;
6091         int pending_vec, max_bits, idx;
6092         struct desc_ptr dt;
6093
6094         dt.size = sregs->idt.limit;
6095         dt.address = sregs->idt.base;
6096         kvm_x86_ops->set_idt(vcpu, &dt);
6097         dt.size = sregs->gdt.limit;
6098         dt.address = sregs->gdt.base;
6099         kvm_x86_ops->set_gdt(vcpu, &dt);
6100
6101         vcpu->arch.cr2 = sregs->cr2;
6102         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6103         vcpu->arch.cr3 = sregs->cr3;
6104         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6105
6106         kvm_set_cr8(vcpu, sregs->cr8);
6107
6108         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6109         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6110         kvm_set_apic_base(vcpu, sregs->apic_base);
6111
6112         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6113         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6114         vcpu->arch.cr0 = sregs->cr0;
6115
6116         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6117         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6118         if (sregs->cr4 & X86_CR4_OSXSAVE)
6119                 update_cpuid(vcpu);
6120
6121         idx = srcu_read_lock(&vcpu->kvm->srcu);
6122         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6123                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6124                 mmu_reset_needed = 1;
6125         }
6126         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6127
6128         if (mmu_reset_needed)
6129                 kvm_mmu_reset_context(vcpu);
6130
6131         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
6132         pending_vec = find_first_bit(
6133                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6134         if (pending_vec < max_bits) {
6135                 kvm_queue_interrupt(vcpu, pending_vec, false);
6136                 pr_debug("Set back pending irq %d\n", pending_vec);
6137         }
6138
6139         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6140         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6141         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6142         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6143         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6144         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6145
6146         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6147         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6148
6149         update_cr8_intercept(vcpu);
6150
6151         /* Older userspace won't unhalt the vcpu on reset. */
6152         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6153             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6154             !is_protmode(vcpu))
6155                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6156
6157         kvm_make_request(KVM_REQ_EVENT, vcpu);
6158
6159         return 0;
6160 }
6161
6162 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6163                                         struct kvm_guest_debug *dbg)
6164 {
6165         unsigned long rflags;
6166         int i, r;
6167
6168         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6169                 r = -EBUSY;
6170                 if (vcpu->arch.exception.pending)
6171                         goto out;
6172                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6173                         kvm_queue_exception(vcpu, DB_VECTOR);
6174                 else
6175                         kvm_queue_exception(vcpu, BP_VECTOR);
6176         }
6177
6178         /*
6179          * Read rflags as long as potentially injected trace flags are still
6180          * filtered out.
6181          */
6182         rflags = kvm_get_rflags(vcpu);
6183
6184         vcpu->guest_debug = dbg->control;