x86, kvm: fix kvm's usage of kernel_fpu_begin/end()
[linux-3.10.git] / arch / x86 / kvm / x86.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * derived from drivers/kvm/kvm_main.c
5  *
6  * Copyright (C) 2006 Qumranet, Inc.
7  * Copyright (C) 2008 Qumranet, Inc.
8  * Copyright IBM Corporation, 2008
9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
10  *
11  * Authors:
12  *   Avi Kivity   <avi@qumranet.com>
13  *   Yaniv Kamay  <yaniv@qumranet.com>
14  *   Amit Shah    <amit.shah@qumranet.com>
15  *   Ben-Ami Yassour <benami@il.ibm.com>
16  *
17  * This work is licensed under the terms of the GNU GPL, version 2.  See
18  * the COPYING file in the top-level directory.
19  *
20  */
21
22 #include <linux/kvm_host.h>
23 #include "irq.h"
24 #include "mmu.h"
25 #include "i8254.h"
26 #include "tss.h"
27 #include "kvm_cache_regs.h"
28 #include "x86.h"
29 #include "cpuid.h"
30
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
34 #include <linux/fs.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <trace/events/kvm.h>
50
51 #define CREATE_TRACE_POINTS
52 #include "trace.h"
53
54 #include <asm/debugreg.h>
55 #include <asm/msr.h>
56 #include <asm/desc.h>
57 #include <asm/mtrr.h>
58 #include <asm/mce.h>
59 #include <asm/i387.h>
60 #include <asm/fpu-internal.h> /* Ugh! */
61 #include <asm/xcr.h>
62 #include <asm/pvclock.h>
63 #include <asm/div64.h>
64
65 #define MAX_IO_MSRS 256
66 #define KVM_MAX_MCE_BANKS 32
67 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
68
69 #define emul_to_vcpu(ctxt) \
70         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
71
72 /* EFER defaults:
73  * - enable syscall per default because its emulated by KVM
74  * - enable LME and LMA per default on 64 bit KVM
75  */
76 #ifdef CONFIG_X86_64
77 static
78 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
79 #else
80 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
81 #endif
82
83 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
84 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
85
86 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
87 static void process_nmi(struct kvm_vcpu *vcpu);
88
89 struct kvm_x86_ops *kvm_x86_ops;
90 EXPORT_SYMBOL_GPL(kvm_x86_ops);
91
92 static bool ignore_msrs = 0;
93 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
94
95 bool kvm_has_tsc_control;
96 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
97 u32  kvm_max_guest_tsc_khz;
98 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
99
100 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
101 static u32 tsc_tolerance_ppm = 250;
102 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
103
104 #define KVM_NR_SHARED_MSRS 16
105
106 struct kvm_shared_msrs_global {
107         int nr;
108         u32 msrs[KVM_NR_SHARED_MSRS];
109 };
110
111 struct kvm_shared_msrs {
112         struct user_return_notifier urn;
113         bool registered;
114         struct kvm_shared_msr_values {
115                 u64 host;
116                 u64 curr;
117         } values[KVM_NR_SHARED_MSRS];
118 };
119
120 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
121 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
122
123 struct kvm_stats_debugfs_item debugfs_entries[] = {
124         { "pf_fixed", VCPU_STAT(pf_fixed) },
125         { "pf_guest", VCPU_STAT(pf_guest) },
126         { "tlb_flush", VCPU_STAT(tlb_flush) },
127         { "invlpg", VCPU_STAT(invlpg) },
128         { "exits", VCPU_STAT(exits) },
129         { "io_exits", VCPU_STAT(io_exits) },
130         { "mmio_exits", VCPU_STAT(mmio_exits) },
131         { "signal_exits", VCPU_STAT(signal_exits) },
132         { "irq_window", VCPU_STAT(irq_window_exits) },
133         { "nmi_window", VCPU_STAT(nmi_window_exits) },
134         { "halt_exits", VCPU_STAT(halt_exits) },
135         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
136         { "hypercalls", VCPU_STAT(hypercalls) },
137         { "request_irq", VCPU_STAT(request_irq_exits) },
138         { "irq_exits", VCPU_STAT(irq_exits) },
139         { "host_state_reload", VCPU_STAT(host_state_reload) },
140         { "efer_reload", VCPU_STAT(efer_reload) },
141         { "fpu_reload", VCPU_STAT(fpu_reload) },
142         { "insn_emulation", VCPU_STAT(insn_emulation) },
143         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
144         { "irq_injections", VCPU_STAT(irq_injections) },
145         { "nmi_injections", VCPU_STAT(nmi_injections) },
146         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
147         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
148         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
149         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
150         { "mmu_flooded", VM_STAT(mmu_flooded) },
151         { "mmu_recycled", VM_STAT(mmu_recycled) },
152         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
153         { "mmu_unsync", VM_STAT(mmu_unsync) },
154         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
155         { "largepages", VM_STAT(lpages) },
156         { NULL }
157 };
158
159 u64 __read_mostly host_xcr0;
160
161 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
162
163 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
164 {
165         int i;
166         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
167                 vcpu->arch.apf.gfns[i] = ~0;
168 }
169
170 static void kvm_on_user_return(struct user_return_notifier *urn)
171 {
172         unsigned slot;
173         struct kvm_shared_msrs *locals
174                 = container_of(urn, struct kvm_shared_msrs, urn);
175         struct kvm_shared_msr_values *values;
176
177         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
178                 values = &locals->values[slot];
179                 if (values->host != values->curr) {
180                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
181                         values->curr = values->host;
182                 }
183         }
184         locals->registered = false;
185         user_return_notifier_unregister(urn);
186 }
187
188 static void shared_msr_update(unsigned slot, u32 msr)
189 {
190         struct kvm_shared_msrs *smsr;
191         u64 value;
192
193         smsr = &__get_cpu_var(shared_msrs);
194         /* only read, and nobody should modify it at this time,
195          * so don't need lock */
196         if (slot >= shared_msrs_global.nr) {
197                 printk(KERN_ERR "kvm: invalid MSR slot!");
198                 return;
199         }
200         rdmsrl_safe(msr, &value);
201         smsr->values[slot].host = value;
202         smsr->values[slot].curr = value;
203 }
204
205 void kvm_define_shared_msr(unsigned slot, u32 msr)
206 {
207         if (slot >= shared_msrs_global.nr)
208                 shared_msrs_global.nr = slot + 1;
209         shared_msrs_global.msrs[slot] = msr;
210         /* we need ensured the shared_msr_global have been updated */
211         smp_wmb();
212 }
213 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
214
215 static void kvm_shared_msr_cpu_online(void)
216 {
217         unsigned i;
218
219         for (i = 0; i < shared_msrs_global.nr; ++i)
220                 shared_msr_update(i, shared_msrs_global.msrs[i]);
221 }
222
223 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
224 {
225         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
226
227         if (((value ^ smsr->values[slot].curr) & mask) == 0)
228                 return;
229         smsr->values[slot].curr = value;
230         wrmsrl(shared_msrs_global.msrs[slot], value);
231         if (!smsr->registered) {
232                 smsr->urn.on_user_return = kvm_on_user_return;
233                 user_return_notifier_register(&smsr->urn);
234                 smsr->registered = true;
235         }
236 }
237 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
238
239 static void drop_user_return_notifiers(void *ignore)
240 {
241         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
242
243         if (smsr->registered)
244                 kvm_on_user_return(&smsr->urn);
245 }
246
247 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
248 {
249         if (irqchip_in_kernel(vcpu->kvm))
250                 return vcpu->arch.apic_base;
251         else
252                 return vcpu->arch.apic_base;
253 }
254 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
255
256 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
257 {
258         /* TODO: reserve bits check */
259         if (irqchip_in_kernel(vcpu->kvm))
260                 kvm_lapic_set_base(vcpu, data);
261         else
262                 vcpu->arch.apic_base = data;
263 }
264 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
265
266 #define EXCPT_BENIGN            0
267 #define EXCPT_CONTRIBUTORY      1
268 #define EXCPT_PF                2
269
270 static int exception_class(int vector)
271 {
272         switch (vector) {
273         case PF_VECTOR:
274                 return EXCPT_PF;
275         case DE_VECTOR:
276         case TS_VECTOR:
277         case NP_VECTOR:
278         case SS_VECTOR:
279         case GP_VECTOR:
280                 return EXCPT_CONTRIBUTORY;
281         default:
282                 break;
283         }
284         return EXCPT_BENIGN;
285 }
286
287 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
288                 unsigned nr, bool has_error, u32 error_code,
289                 bool reinject)
290 {
291         u32 prev_nr;
292         int class1, class2;
293
294         kvm_make_request(KVM_REQ_EVENT, vcpu);
295
296         if (!vcpu->arch.exception.pending) {
297         queue:
298                 vcpu->arch.exception.pending = true;
299                 vcpu->arch.exception.has_error_code = has_error;
300                 vcpu->arch.exception.nr = nr;
301                 vcpu->arch.exception.error_code = error_code;
302                 vcpu->arch.exception.reinject = reinject;
303                 return;
304         }
305
306         /* to check exception */
307         prev_nr = vcpu->arch.exception.nr;
308         if (prev_nr == DF_VECTOR) {
309                 /* triple fault -> shutdown */
310                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
311                 return;
312         }
313         class1 = exception_class(prev_nr);
314         class2 = exception_class(nr);
315         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
316                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
317                 /* generate double fault per SDM Table 5-5 */
318                 vcpu->arch.exception.pending = true;
319                 vcpu->arch.exception.has_error_code = true;
320                 vcpu->arch.exception.nr = DF_VECTOR;
321                 vcpu->arch.exception.error_code = 0;
322         } else
323                 /* replace previous exception with a new one in a hope
324                    that instruction re-execution will regenerate lost
325                    exception */
326                 goto queue;
327 }
328
329 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
330 {
331         kvm_multiple_exception(vcpu, nr, false, 0, false);
332 }
333 EXPORT_SYMBOL_GPL(kvm_queue_exception);
334
335 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
336 {
337         kvm_multiple_exception(vcpu, nr, false, 0, true);
338 }
339 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
340
341 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
342 {
343         if (err)
344                 kvm_inject_gp(vcpu, 0);
345         else
346                 kvm_x86_ops->skip_emulated_instruction(vcpu);
347 }
348 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
349
350 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
351 {
352         ++vcpu->stat.pf_guest;
353         vcpu->arch.cr2 = fault->address;
354         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
355 }
356 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
357
358 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
359 {
360         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
361                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
362         else
363                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
364 }
365
366 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
367 {
368         atomic_inc(&vcpu->arch.nmi_queued);
369         kvm_make_request(KVM_REQ_NMI, vcpu);
370 }
371 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
372
373 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
374 {
375         kvm_multiple_exception(vcpu, nr, true, error_code, false);
376 }
377 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
378
379 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
380 {
381         kvm_multiple_exception(vcpu, nr, true, error_code, true);
382 }
383 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
384
385 /*
386  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
387  * a #GP and return false.
388  */
389 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
390 {
391         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
392                 return true;
393         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
394         return false;
395 }
396 EXPORT_SYMBOL_GPL(kvm_require_cpl);
397
398 /*
399  * This function will be used to read from the physical memory of the currently
400  * running guest. The difference to kvm_read_guest_page is that this function
401  * can read from guest physical or from the guest's guest physical memory.
402  */
403 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
404                             gfn_t ngfn, void *data, int offset, int len,
405                             u32 access)
406 {
407         gfn_t real_gfn;
408         gpa_t ngpa;
409
410         ngpa     = gfn_to_gpa(ngfn);
411         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
412         if (real_gfn == UNMAPPED_GVA)
413                 return -EFAULT;
414
415         real_gfn = gpa_to_gfn(real_gfn);
416
417         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
418 }
419 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
420
421 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
422                                void *data, int offset, int len, u32 access)
423 {
424         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
425                                        data, offset, len, access);
426 }
427
428 /*
429  * Load the pae pdptrs.  Return true is they are all valid.
430  */
431 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
432 {
433         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
434         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
435         int i;
436         int ret;
437         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
438
439         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
440                                       offset * sizeof(u64), sizeof(pdpte),
441                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
442         if (ret < 0) {
443                 ret = 0;
444                 goto out;
445         }
446         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
447                 if (is_present_gpte(pdpte[i]) &&
448                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
449                         ret = 0;
450                         goto out;
451                 }
452         }
453         ret = 1;
454
455         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
456         __set_bit(VCPU_EXREG_PDPTR,
457                   (unsigned long *)&vcpu->arch.regs_avail);
458         __set_bit(VCPU_EXREG_PDPTR,
459                   (unsigned long *)&vcpu->arch.regs_dirty);
460 out:
461
462         return ret;
463 }
464 EXPORT_SYMBOL_GPL(load_pdptrs);
465
466 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
467 {
468         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
469         bool changed = true;
470         int offset;
471         gfn_t gfn;
472         int r;
473
474         if (is_long_mode(vcpu) || !is_pae(vcpu))
475                 return false;
476
477         if (!test_bit(VCPU_EXREG_PDPTR,
478                       (unsigned long *)&vcpu->arch.regs_avail))
479                 return true;
480
481         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
482         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
483         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
484                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
485         if (r < 0)
486                 goto out;
487         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
488 out:
489
490         return changed;
491 }
492
493 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
494 {
495         unsigned long old_cr0 = kvm_read_cr0(vcpu);
496         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
497                                     X86_CR0_CD | X86_CR0_NW;
498
499         cr0 |= X86_CR0_ET;
500
501 #ifdef CONFIG_X86_64
502         if (cr0 & 0xffffffff00000000UL)
503                 return 1;
504 #endif
505
506         cr0 &= ~CR0_RESERVED_BITS;
507
508         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
509                 return 1;
510
511         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
512                 return 1;
513
514         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
515 #ifdef CONFIG_X86_64
516                 if ((vcpu->arch.efer & EFER_LME)) {
517                         int cs_db, cs_l;
518
519                         if (!is_pae(vcpu))
520                                 return 1;
521                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
522                         if (cs_l)
523                                 return 1;
524                 } else
525 #endif
526                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
527                                                  kvm_read_cr3(vcpu)))
528                         return 1;
529         }
530
531         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
532                 return 1;
533
534         kvm_x86_ops->set_cr0(vcpu, cr0);
535
536         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
537                 kvm_clear_async_pf_completion_queue(vcpu);
538                 kvm_async_pf_hash_reset(vcpu);
539         }
540
541         if ((cr0 ^ old_cr0) & update_bits)
542                 kvm_mmu_reset_context(vcpu);
543         return 0;
544 }
545 EXPORT_SYMBOL_GPL(kvm_set_cr0);
546
547 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
548 {
549         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
550 }
551 EXPORT_SYMBOL_GPL(kvm_lmsw);
552
553 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
554 {
555         u64 xcr0;
556
557         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
558         if (index != XCR_XFEATURE_ENABLED_MASK)
559                 return 1;
560         xcr0 = xcr;
561         if (kvm_x86_ops->get_cpl(vcpu) != 0)
562                 return 1;
563         if (!(xcr0 & XSTATE_FP))
564                 return 1;
565         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
566                 return 1;
567         if (xcr0 & ~host_xcr0)
568                 return 1;
569         vcpu->arch.xcr0 = xcr0;
570         vcpu->guest_xcr0_loaded = 0;
571         return 0;
572 }
573
574 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
575 {
576         if (__kvm_set_xcr(vcpu, index, xcr)) {
577                 kvm_inject_gp(vcpu, 0);
578                 return 1;
579         }
580         return 0;
581 }
582 EXPORT_SYMBOL_GPL(kvm_set_xcr);
583
584 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
585 {
586         unsigned long old_cr4 = kvm_read_cr4(vcpu);
587         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
588                                    X86_CR4_PAE | X86_CR4_SMEP;
589         if (cr4 & CR4_RESERVED_BITS)
590                 return 1;
591
592         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
593                 return 1;
594
595         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
596                 return 1;
597
598         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
599                 return 1;
600
601         if (is_long_mode(vcpu)) {
602                 if (!(cr4 & X86_CR4_PAE))
603                         return 1;
604         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
605                    && ((cr4 ^ old_cr4) & pdptr_bits)
606                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
607                                    kvm_read_cr3(vcpu)))
608                 return 1;
609
610         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
611                 if (!guest_cpuid_has_pcid(vcpu))
612                         return 1;
613
614                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
615                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
616                         return 1;
617         }
618
619         if (kvm_x86_ops->set_cr4(vcpu, cr4))
620                 return 1;
621
622         if (((cr4 ^ old_cr4) & pdptr_bits) ||
623             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
624                 kvm_mmu_reset_context(vcpu);
625
626         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
627                 kvm_update_cpuid(vcpu);
628
629         return 0;
630 }
631 EXPORT_SYMBOL_GPL(kvm_set_cr4);
632
633 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
634 {
635         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
636                 kvm_mmu_sync_roots(vcpu);
637                 kvm_mmu_flush_tlb(vcpu);
638                 return 0;
639         }
640
641         if (is_long_mode(vcpu)) {
642                 if (kvm_read_cr4(vcpu) & X86_CR4_PCIDE) {
643                         if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
644                                 return 1;
645                 } else
646                         if (cr3 & CR3_L_MODE_RESERVED_BITS)
647                                 return 1;
648         } else {
649                 if (is_pae(vcpu)) {
650                         if (cr3 & CR3_PAE_RESERVED_BITS)
651                                 return 1;
652                         if (is_paging(vcpu) &&
653                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
654                                 return 1;
655                 }
656                 /*
657                  * We don't check reserved bits in nonpae mode, because
658                  * this isn't enforced, and VMware depends on this.
659                  */
660         }
661
662         /*
663          * Does the new cr3 value map to physical memory? (Note, we
664          * catch an invalid cr3 even in real-mode, because it would
665          * cause trouble later on when we turn on paging anyway.)
666          *
667          * A real CPU would silently accept an invalid cr3 and would
668          * attempt to use it - with largely undefined (and often hard
669          * to debug) behavior on the guest side.
670          */
671         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
672                 return 1;
673         vcpu->arch.cr3 = cr3;
674         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
675         vcpu->arch.mmu.new_cr3(vcpu);
676         return 0;
677 }
678 EXPORT_SYMBOL_GPL(kvm_set_cr3);
679
680 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
681 {
682         if (cr8 & CR8_RESERVED_BITS)
683                 return 1;
684         if (irqchip_in_kernel(vcpu->kvm))
685                 kvm_lapic_set_tpr(vcpu, cr8);
686         else
687                 vcpu->arch.cr8 = cr8;
688         return 0;
689 }
690 EXPORT_SYMBOL_GPL(kvm_set_cr8);
691
692 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
693 {
694         if (irqchip_in_kernel(vcpu->kvm))
695                 return kvm_lapic_get_cr8(vcpu);
696         else
697                 return vcpu->arch.cr8;
698 }
699 EXPORT_SYMBOL_GPL(kvm_get_cr8);
700
701 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
702 {
703         switch (dr) {
704         case 0 ... 3:
705                 vcpu->arch.db[dr] = val;
706                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
707                         vcpu->arch.eff_db[dr] = val;
708                 break;
709         case 4:
710                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
711                         return 1; /* #UD */
712                 /* fall through */
713         case 6:
714                 if (val & 0xffffffff00000000ULL)
715                         return -1; /* #GP */
716                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
717                 break;
718         case 5:
719                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
720                         return 1; /* #UD */
721                 /* fall through */
722         default: /* 7 */
723                 if (val & 0xffffffff00000000ULL)
724                         return -1; /* #GP */
725                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
726                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
727                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
728                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
729                 }
730                 break;
731         }
732
733         return 0;
734 }
735
736 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
737 {
738         int res;
739
740         res = __kvm_set_dr(vcpu, dr, val);
741         if (res > 0)
742                 kvm_queue_exception(vcpu, UD_VECTOR);
743         else if (res < 0)
744                 kvm_inject_gp(vcpu, 0);
745
746         return res;
747 }
748 EXPORT_SYMBOL_GPL(kvm_set_dr);
749
750 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
751 {
752         switch (dr) {
753         case 0 ... 3:
754                 *val = vcpu->arch.db[dr];
755                 break;
756         case 4:
757                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
758                         return 1;
759                 /* fall through */
760         case 6:
761                 *val = vcpu->arch.dr6;
762                 break;
763         case 5:
764                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
765                         return 1;
766                 /* fall through */
767         default: /* 7 */
768                 *val = vcpu->arch.dr7;
769                 break;
770         }
771
772         return 0;
773 }
774
775 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
776 {
777         if (_kvm_get_dr(vcpu, dr, val)) {
778                 kvm_queue_exception(vcpu, UD_VECTOR);
779                 return 1;
780         }
781         return 0;
782 }
783 EXPORT_SYMBOL_GPL(kvm_get_dr);
784
785 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
786 {
787         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
788         u64 data;
789         int err;
790
791         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
792         if (err)
793                 return err;
794         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
795         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
796         return err;
797 }
798 EXPORT_SYMBOL_GPL(kvm_rdpmc);
799
800 /*
801  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
802  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
803  *
804  * This list is modified at module load time to reflect the
805  * capabilities of the host cpu. This capabilities test skips MSRs that are
806  * kvm-specific. Those are put in the beginning of the list.
807  */
808
809 #define KVM_SAVE_MSRS_BEGIN     10
810 static u32 msrs_to_save[] = {
811         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
812         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
813         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
814         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
815         MSR_KVM_PV_EOI_EN,
816         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
817         MSR_STAR,
818 #ifdef CONFIG_X86_64
819         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
820 #endif
821         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
822 };
823
824 static unsigned num_msrs_to_save;
825
826 static u32 emulated_msrs[] = {
827         MSR_IA32_TSCDEADLINE,
828         MSR_IA32_MISC_ENABLE,
829         MSR_IA32_MCG_STATUS,
830         MSR_IA32_MCG_CTL,
831 };
832
833 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
834 {
835         u64 old_efer = vcpu->arch.efer;
836
837         if (efer & efer_reserved_bits)
838                 return 1;
839
840         if (is_paging(vcpu)
841             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
842                 return 1;
843
844         if (efer & EFER_FFXSR) {
845                 struct kvm_cpuid_entry2 *feat;
846
847                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
848                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
849                         return 1;
850         }
851
852         if (efer & EFER_SVME) {
853                 struct kvm_cpuid_entry2 *feat;
854
855                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
856                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
857                         return 1;
858         }
859
860         efer &= ~EFER_LMA;
861         efer |= vcpu->arch.efer & EFER_LMA;
862
863         kvm_x86_ops->set_efer(vcpu, efer);
864
865         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
866
867         /* Update reserved bits */
868         if ((efer ^ old_efer) & EFER_NX)
869                 kvm_mmu_reset_context(vcpu);
870
871         return 0;
872 }
873
874 void kvm_enable_efer_bits(u64 mask)
875 {
876        efer_reserved_bits &= ~mask;
877 }
878 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
879
880
881 /*
882  * Writes msr value into into the appropriate "register".
883  * Returns 0 on success, non-0 otherwise.
884  * Assumes vcpu_load() was already called.
885  */
886 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
887 {
888         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
889 }
890
891 /*
892  * Adapt set_msr() to msr_io()'s calling convention
893  */
894 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
895 {
896         return kvm_set_msr(vcpu, index, *data);
897 }
898
899 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
900 {
901         int version;
902         int r;
903         struct pvclock_wall_clock wc;
904         struct timespec boot;
905
906         if (!wall_clock)
907                 return;
908
909         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
910         if (r)
911                 return;
912
913         if (version & 1)
914                 ++version;  /* first time write, random junk */
915
916         ++version;
917
918         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
919
920         /*
921          * The guest calculates current wall clock time by adding
922          * system time (updated by kvm_guest_time_update below) to the
923          * wall clock specified here.  guest system time equals host
924          * system time for us, thus we must fill in host boot time here.
925          */
926         getboottime(&boot);
927
928         if (kvm->arch.kvmclock_offset) {
929                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
930                 boot = timespec_sub(boot, ts);
931         }
932         wc.sec = boot.tv_sec;
933         wc.nsec = boot.tv_nsec;
934         wc.version = version;
935
936         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
937
938         version++;
939         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
940 }
941
942 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
943 {
944         uint32_t quotient, remainder;
945
946         /* Don't try to replace with do_div(), this one calculates
947          * "(dividend << 32) / divisor" */
948         __asm__ ( "divl %4"
949                   : "=a" (quotient), "=d" (remainder)
950                   : "0" (0), "1" (dividend), "r" (divisor) );
951         return quotient;
952 }
953
954 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
955                                s8 *pshift, u32 *pmultiplier)
956 {
957         uint64_t scaled64;
958         int32_t  shift = 0;
959         uint64_t tps64;
960         uint32_t tps32;
961
962         tps64 = base_khz * 1000LL;
963         scaled64 = scaled_khz * 1000LL;
964         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
965                 tps64 >>= 1;
966                 shift--;
967         }
968
969         tps32 = (uint32_t)tps64;
970         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
971                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
972                         scaled64 >>= 1;
973                 else
974                         tps32 <<= 1;
975                 shift++;
976         }
977
978         *pshift = shift;
979         *pmultiplier = div_frac(scaled64, tps32);
980
981         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
982                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
983 }
984
985 static inline u64 get_kernel_ns(void)
986 {
987         struct timespec ts;
988
989         WARN_ON(preemptible());
990         ktime_get_ts(&ts);
991         monotonic_to_bootbased(&ts);
992         return timespec_to_ns(&ts);
993 }
994
995 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
996 unsigned long max_tsc_khz;
997
998 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
999 {
1000         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1001                                    vcpu->arch.virtual_tsc_shift);
1002 }
1003
1004 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1005 {
1006         u64 v = (u64)khz * (1000000 + ppm);
1007         do_div(v, 1000000);
1008         return v;
1009 }
1010
1011 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1012 {
1013         u32 thresh_lo, thresh_hi;
1014         int use_scaling = 0;
1015
1016         /* Compute a scale to convert nanoseconds in TSC cycles */
1017         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1018                            &vcpu->arch.virtual_tsc_shift,
1019                            &vcpu->arch.virtual_tsc_mult);
1020         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1021
1022         /*
1023          * Compute the variation in TSC rate which is acceptable
1024          * within the range of tolerance and decide if the
1025          * rate being applied is within that bounds of the hardware
1026          * rate.  If so, no scaling or compensation need be done.
1027          */
1028         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1029         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1030         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1031                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1032                 use_scaling = 1;
1033         }
1034         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1035 }
1036
1037 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1038 {
1039         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1040                                       vcpu->arch.virtual_tsc_mult,
1041                                       vcpu->arch.virtual_tsc_shift);
1042         tsc += vcpu->arch.this_tsc_write;
1043         return tsc;
1044 }
1045
1046 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1047 {
1048         struct kvm *kvm = vcpu->kvm;
1049         u64 offset, ns, elapsed;
1050         unsigned long flags;
1051         s64 usdiff;
1052
1053         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1054         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1055         ns = get_kernel_ns();
1056         elapsed = ns - kvm->arch.last_tsc_nsec;
1057
1058         /* n.b - signed multiplication and division required */
1059         usdiff = data - kvm->arch.last_tsc_write;
1060 #ifdef CONFIG_X86_64
1061         usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1062 #else
1063         /* do_div() only does unsigned */
1064         asm("idivl %2; xor %%edx, %%edx"
1065             : "=A"(usdiff)
1066             : "A"(usdiff * 1000), "rm"(vcpu->arch.virtual_tsc_khz));
1067 #endif
1068         do_div(elapsed, 1000);
1069         usdiff -= elapsed;
1070         if (usdiff < 0)
1071                 usdiff = -usdiff;
1072
1073         /*
1074          * Special case: TSC write with a small delta (1 second) of virtual
1075          * cycle time against real time is interpreted as an attempt to
1076          * synchronize the CPU.
1077          *
1078          * For a reliable TSC, we can match TSC offsets, and for an unstable
1079          * TSC, we add elapsed time in this computation.  We could let the
1080          * compensation code attempt to catch up if we fall behind, but
1081          * it's better to try to match offsets from the beginning.
1082          */
1083         if (usdiff < USEC_PER_SEC &&
1084             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1085                 if (!check_tsc_unstable()) {
1086                         offset = kvm->arch.cur_tsc_offset;
1087                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1088                 } else {
1089                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1090                         data += delta;
1091                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1092                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1093                 }
1094         } else {
1095                 /*
1096                  * We split periods of matched TSC writes into generations.
1097                  * For each generation, we track the original measured
1098                  * nanosecond time, offset, and write, so if TSCs are in
1099                  * sync, we can match exact offset, and if not, we can match
1100                  * exact software computaion in compute_guest_tsc()
1101                  *
1102                  * These values are tracked in kvm->arch.cur_xxx variables.
1103                  */
1104                 kvm->arch.cur_tsc_generation++;
1105                 kvm->arch.cur_tsc_nsec = ns;
1106                 kvm->arch.cur_tsc_write = data;
1107                 kvm->arch.cur_tsc_offset = offset;
1108                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1109                          kvm->arch.cur_tsc_generation, data);
1110         }
1111
1112         /*
1113          * We also track th most recent recorded KHZ, write and time to
1114          * allow the matching interval to be extended at each write.
1115          */
1116         kvm->arch.last_tsc_nsec = ns;
1117         kvm->arch.last_tsc_write = data;
1118         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1119
1120         /* Reset of TSC must disable overshoot protection below */
1121         vcpu->arch.hv_clock.tsc_timestamp = 0;
1122         vcpu->arch.last_guest_tsc = data;
1123
1124         /* Keep track of which generation this VCPU has synchronized to */
1125         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1126         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1127         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1128
1129         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1130         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1131 }
1132
1133 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1134
1135 static int kvm_guest_time_update(struct kvm_vcpu *v)
1136 {
1137         unsigned long flags;
1138         struct kvm_vcpu_arch *vcpu = &v->arch;
1139         void *shared_kaddr;
1140         unsigned long this_tsc_khz;
1141         s64 kernel_ns, max_kernel_ns;
1142         u64 tsc_timestamp;
1143
1144         /* Keep irq disabled to prevent changes to the clock */
1145         local_irq_save(flags);
1146         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1147         kernel_ns = get_kernel_ns();
1148         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1149         if (unlikely(this_tsc_khz == 0)) {
1150                 local_irq_restore(flags);
1151                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1152                 return 1;
1153         }
1154
1155         /*
1156          * We may have to catch up the TSC to match elapsed wall clock
1157          * time for two reasons, even if kvmclock is used.
1158          *   1) CPU could have been running below the maximum TSC rate
1159          *   2) Broken TSC compensation resets the base at each VCPU
1160          *      entry to avoid unknown leaps of TSC even when running
1161          *      again on the same CPU.  This may cause apparent elapsed
1162          *      time to disappear, and the guest to stand still or run
1163          *      very slowly.
1164          */
1165         if (vcpu->tsc_catchup) {
1166                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1167                 if (tsc > tsc_timestamp) {
1168                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1169                         tsc_timestamp = tsc;
1170                 }
1171         }
1172
1173         local_irq_restore(flags);
1174
1175         if (!vcpu->time_page)
1176                 return 0;
1177
1178         /*
1179          * Time as measured by the TSC may go backwards when resetting the base
1180          * tsc_timestamp.  The reason for this is that the TSC resolution is
1181          * higher than the resolution of the other clock scales.  Thus, many
1182          * possible measurments of the TSC correspond to one measurement of any
1183          * other clock, and so a spread of values is possible.  This is not a
1184          * problem for the computation of the nanosecond clock; with TSC rates
1185          * around 1GHZ, there can only be a few cycles which correspond to one
1186          * nanosecond value, and any path through this code will inevitably
1187          * take longer than that.  However, with the kernel_ns value itself,
1188          * the precision may be much lower, down to HZ granularity.  If the
1189          * first sampling of TSC against kernel_ns ends in the low part of the
1190          * range, and the second in the high end of the range, we can get:
1191          *
1192          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1193          *
1194          * As the sampling errors potentially range in the thousands of cycles,
1195          * it is possible such a time value has already been observed by the
1196          * guest.  To protect against this, we must compute the system time as
1197          * observed by the guest and ensure the new system time is greater.
1198          */
1199         max_kernel_ns = 0;
1200         if (vcpu->hv_clock.tsc_timestamp) {
1201                 max_kernel_ns = vcpu->last_guest_tsc -
1202                                 vcpu->hv_clock.tsc_timestamp;
1203                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1204                                     vcpu->hv_clock.tsc_to_system_mul,
1205                                     vcpu->hv_clock.tsc_shift);
1206                 max_kernel_ns += vcpu->last_kernel_ns;
1207         }
1208
1209         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1210                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1211                                    &vcpu->hv_clock.tsc_shift,
1212                                    &vcpu->hv_clock.tsc_to_system_mul);
1213                 vcpu->hw_tsc_khz = this_tsc_khz;
1214         }
1215
1216         if (max_kernel_ns > kernel_ns)
1217                 kernel_ns = max_kernel_ns;
1218
1219         /* With all the info we got, fill in the values */
1220         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1221         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1222         vcpu->last_kernel_ns = kernel_ns;
1223         vcpu->last_guest_tsc = tsc_timestamp;
1224         vcpu->hv_clock.flags = 0;
1225
1226         /*
1227          * The interface expects us to write an even number signaling that the
1228          * update is finished. Since the guest won't see the intermediate
1229          * state, we just increase by 2 at the end.
1230          */
1231         vcpu->hv_clock.version += 2;
1232
1233         shared_kaddr = kmap_atomic(vcpu->time_page);
1234
1235         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1236                sizeof(vcpu->hv_clock));
1237
1238         kunmap_atomic(shared_kaddr);
1239
1240         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1241         return 0;
1242 }
1243
1244 static bool msr_mtrr_valid(unsigned msr)
1245 {
1246         switch (msr) {
1247         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1248         case MSR_MTRRfix64K_00000:
1249         case MSR_MTRRfix16K_80000:
1250         case MSR_MTRRfix16K_A0000:
1251         case MSR_MTRRfix4K_C0000:
1252         case MSR_MTRRfix4K_C8000:
1253         case MSR_MTRRfix4K_D0000:
1254         case MSR_MTRRfix4K_D8000:
1255         case MSR_MTRRfix4K_E0000:
1256         case MSR_MTRRfix4K_E8000:
1257         case MSR_MTRRfix4K_F0000:
1258         case MSR_MTRRfix4K_F8000:
1259         case MSR_MTRRdefType:
1260         case MSR_IA32_CR_PAT:
1261                 return true;
1262         case 0x2f8:
1263                 return true;
1264         }
1265         return false;
1266 }
1267
1268 static bool valid_pat_type(unsigned t)
1269 {
1270         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1271 }
1272
1273 static bool valid_mtrr_type(unsigned t)
1274 {
1275         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1276 }
1277
1278 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1279 {
1280         int i;
1281
1282         if (!msr_mtrr_valid(msr))
1283                 return false;
1284
1285         if (msr == MSR_IA32_CR_PAT) {
1286                 for (i = 0; i < 8; i++)
1287                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1288                                 return false;
1289                 return true;
1290         } else if (msr == MSR_MTRRdefType) {
1291                 if (data & ~0xcff)
1292                         return false;
1293                 return valid_mtrr_type(data & 0xff);
1294         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1295                 for (i = 0; i < 8 ; i++)
1296                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1297                                 return false;
1298                 return true;
1299         }
1300
1301         /* variable MTRRs */
1302         return valid_mtrr_type(data & 0xff);
1303 }
1304
1305 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1306 {
1307         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1308
1309         if (!mtrr_valid(vcpu, msr, data))
1310                 return 1;
1311
1312         if (msr == MSR_MTRRdefType) {
1313                 vcpu->arch.mtrr_state.def_type = data;
1314                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1315         } else if (msr == MSR_MTRRfix64K_00000)
1316                 p[0] = data;
1317         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1318                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1319         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1320                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1321         else if (msr == MSR_IA32_CR_PAT)
1322                 vcpu->arch.pat = data;
1323         else {  /* Variable MTRRs */
1324                 int idx, is_mtrr_mask;
1325                 u64 *pt;
1326
1327                 idx = (msr - 0x200) / 2;
1328                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1329                 if (!is_mtrr_mask)
1330                         pt =
1331                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1332                 else
1333                         pt =
1334                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1335                 *pt = data;
1336         }
1337
1338         kvm_mmu_reset_context(vcpu);
1339         return 0;
1340 }
1341
1342 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1343 {
1344         u64 mcg_cap = vcpu->arch.mcg_cap;
1345         unsigned bank_num = mcg_cap & 0xff;
1346
1347         switch (msr) {
1348         case MSR_IA32_MCG_STATUS:
1349                 vcpu->arch.mcg_status = data;
1350                 break;
1351         case MSR_IA32_MCG_CTL:
1352                 if (!(mcg_cap & MCG_CTL_P))
1353                         return 1;
1354                 if (data != 0 && data != ~(u64)0)
1355                         return -1;
1356                 vcpu->arch.mcg_ctl = data;
1357                 break;
1358         default:
1359                 if (msr >= MSR_IA32_MC0_CTL &&
1360                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1361                         u32 offset = msr - MSR_IA32_MC0_CTL;
1362                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1363                          * some Linux kernels though clear bit 10 in bank 4 to
1364                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1365                          * this to avoid an uncatched #GP in the guest
1366                          */
1367                         if ((offset & 0x3) == 0 &&
1368                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1369                                 return -1;
1370                         vcpu->arch.mce_banks[offset] = data;
1371                         break;
1372                 }
1373                 return 1;
1374         }
1375         return 0;
1376 }
1377
1378 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1379 {
1380         struct kvm *kvm = vcpu->kvm;
1381         int lm = is_long_mode(vcpu);
1382         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1383                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1384         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1385                 : kvm->arch.xen_hvm_config.blob_size_32;
1386         u32 page_num = data & ~PAGE_MASK;
1387         u64 page_addr = data & PAGE_MASK;
1388         u8 *page;
1389         int r;
1390
1391         r = -E2BIG;
1392         if (page_num >= blob_size)
1393                 goto out;
1394         r = -ENOMEM;
1395         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1396         if (IS_ERR(page)) {
1397                 r = PTR_ERR(page);
1398                 goto out;
1399         }
1400         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1401                 goto out_free;
1402         r = 0;
1403 out_free:
1404         kfree(page);
1405 out:
1406         return r;
1407 }
1408
1409 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1410 {
1411         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1412 }
1413
1414 static bool kvm_hv_msr_partition_wide(u32 msr)
1415 {
1416         bool r = false;
1417         switch (msr) {
1418         case HV_X64_MSR_GUEST_OS_ID:
1419         case HV_X64_MSR_HYPERCALL:
1420                 r = true;
1421                 break;
1422         }
1423
1424         return r;
1425 }
1426
1427 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1428 {
1429         struct kvm *kvm = vcpu->kvm;
1430
1431         switch (msr) {
1432         case HV_X64_MSR_GUEST_OS_ID:
1433                 kvm->arch.hv_guest_os_id = data;
1434                 /* setting guest os id to zero disables hypercall page */
1435                 if (!kvm->arch.hv_guest_os_id)
1436                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1437                 break;
1438         case HV_X64_MSR_HYPERCALL: {
1439                 u64 gfn;
1440                 unsigned long addr;
1441                 u8 instructions[4];
1442
1443                 /* if guest os id is not set hypercall should remain disabled */
1444                 if (!kvm->arch.hv_guest_os_id)
1445                         break;
1446                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1447                         kvm->arch.hv_hypercall = data;
1448                         break;
1449                 }
1450                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1451                 addr = gfn_to_hva(kvm, gfn);
1452                 if (kvm_is_error_hva(addr))
1453                         return 1;
1454                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1455                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1456                 if (__copy_to_user((void __user *)addr, instructions, 4))
1457                         return 1;
1458                 kvm->arch.hv_hypercall = data;
1459                 break;
1460         }
1461         default:
1462                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1463                             "data 0x%llx\n", msr, data);
1464                 return 1;
1465         }
1466         return 0;
1467 }
1468
1469 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1470 {
1471         switch (msr) {
1472         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1473                 unsigned long addr;
1474
1475                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1476                         vcpu->arch.hv_vapic = data;
1477                         break;
1478                 }
1479                 addr = gfn_to_hva(vcpu->kvm, data >>
1480                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1481                 if (kvm_is_error_hva(addr))
1482                         return 1;
1483                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1484                         return 1;
1485                 vcpu->arch.hv_vapic = data;
1486                 break;
1487         }
1488         case HV_X64_MSR_EOI:
1489                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1490         case HV_X64_MSR_ICR:
1491                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1492         case HV_X64_MSR_TPR:
1493                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1494         default:
1495                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1496                             "data 0x%llx\n", msr, data);
1497                 return 1;
1498         }
1499
1500         return 0;
1501 }
1502
1503 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1504 {
1505         gpa_t gpa = data & ~0x3f;
1506
1507         /* Bits 2:5 are resrved, Should be zero */
1508         if (data & 0x3c)
1509                 return 1;
1510
1511         vcpu->arch.apf.msr_val = data;
1512
1513         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1514                 kvm_clear_async_pf_completion_queue(vcpu);
1515                 kvm_async_pf_hash_reset(vcpu);
1516                 return 0;
1517         }
1518
1519         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1520                 return 1;
1521
1522         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1523         kvm_async_pf_wakeup_all(vcpu);
1524         return 0;
1525 }
1526
1527 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1528 {
1529         if (vcpu->arch.time_page) {
1530                 kvm_release_page_dirty(vcpu->arch.time_page);
1531                 vcpu->arch.time_page = NULL;
1532         }
1533 }
1534
1535 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1536 {
1537         u64 delta;
1538
1539         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1540                 return;
1541
1542         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1543         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1544         vcpu->arch.st.accum_steal = delta;
1545 }
1546
1547 static void record_steal_time(struct kvm_vcpu *vcpu)
1548 {
1549         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1550                 return;
1551
1552         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1553                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1554                 return;
1555
1556         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1557         vcpu->arch.st.steal.version += 2;
1558         vcpu->arch.st.accum_steal = 0;
1559
1560         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1561                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1562 }
1563
1564 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1565 {
1566         bool pr = false;
1567
1568         switch (msr) {
1569         case MSR_EFER:
1570                 return set_efer(vcpu, data);
1571         case MSR_K7_HWCR:
1572                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1573                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1574                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1575                 if (data != 0) {
1576                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1577                                     data);
1578                         return 1;
1579                 }
1580                 break;
1581         case MSR_FAM10H_MMIO_CONF_BASE:
1582                 if (data != 0) {
1583                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1584                                     "0x%llx\n", data);
1585                         return 1;
1586                 }
1587                 break;
1588         case MSR_AMD64_NB_CFG:
1589                 break;
1590         case MSR_IA32_DEBUGCTLMSR:
1591                 if (!data) {
1592                         /* We support the non-activated case already */
1593                         break;
1594                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1595                         /* Values other than LBR and BTF are vendor-specific,
1596                            thus reserved and should throw a #GP */
1597                         return 1;
1598                 }
1599                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1600                             __func__, data);
1601                 break;
1602         case MSR_IA32_UCODE_REV:
1603         case MSR_IA32_UCODE_WRITE:
1604         case MSR_VM_HSAVE_PA:
1605         case MSR_AMD64_PATCH_LOADER:
1606                 break;
1607         case 0x200 ... 0x2ff:
1608                 return set_msr_mtrr(vcpu, msr, data);
1609         case MSR_IA32_APICBASE:
1610                 kvm_set_apic_base(vcpu, data);
1611                 break;
1612         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1613                 return kvm_x2apic_msr_write(vcpu, msr, data);
1614         case MSR_IA32_TSCDEADLINE:
1615                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1616                 break;
1617         case MSR_IA32_MISC_ENABLE:
1618                 vcpu->arch.ia32_misc_enable_msr = data;
1619                 break;
1620         case MSR_KVM_WALL_CLOCK_NEW:
1621         case MSR_KVM_WALL_CLOCK:
1622                 vcpu->kvm->arch.wall_clock = data;
1623                 kvm_write_wall_clock(vcpu->kvm, data);
1624                 break;
1625         case MSR_KVM_SYSTEM_TIME_NEW:
1626         case MSR_KVM_SYSTEM_TIME: {
1627                 kvmclock_reset(vcpu);
1628
1629                 vcpu->arch.time = data;
1630                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1631
1632                 /* we verify if the enable bit is set... */
1633                 if (!(data & 1))
1634                         break;
1635
1636                 /* ...but clean it before doing the actual write */
1637                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1638
1639                 vcpu->arch.time_page =
1640                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1641
1642                 if (is_error_page(vcpu->arch.time_page)) {
1643                         kvm_release_page_clean(vcpu->arch.time_page);
1644                         vcpu->arch.time_page = NULL;
1645                 }
1646                 break;
1647         }
1648         case MSR_KVM_ASYNC_PF_EN:
1649                 if (kvm_pv_enable_async_pf(vcpu, data))
1650                         return 1;
1651                 break;
1652         case MSR_KVM_STEAL_TIME:
1653
1654                 if (unlikely(!sched_info_on()))
1655                         return 1;
1656
1657                 if (data & KVM_STEAL_RESERVED_MASK)
1658                         return 1;
1659
1660                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1661                                                         data & KVM_STEAL_VALID_BITS))
1662                         return 1;
1663
1664                 vcpu->arch.st.msr_val = data;
1665
1666                 if (!(data & KVM_MSR_ENABLED))
1667                         break;
1668
1669                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1670
1671                 preempt_disable();
1672                 accumulate_steal_time(vcpu);
1673                 preempt_enable();
1674
1675                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1676
1677                 break;
1678         case MSR_KVM_PV_EOI_EN:
1679                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
1680                         return 1;
1681                 break;
1682
1683         case MSR_IA32_MCG_CTL:
1684         case MSR_IA32_MCG_STATUS:
1685         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1686                 return set_msr_mce(vcpu, msr, data);
1687
1688         /* Performance counters are not protected by a CPUID bit,
1689          * so we should check all of them in the generic path for the sake of
1690          * cross vendor migration.
1691          * Writing a zero into the event select MSRs disables them,
1692          * which we perfectly emulate ;-). Any other value should be at least
1693          * reported, some guests depend on them.
1694          */
1695         case MSR_K7_EVNTSEL0:
1696         case MSR_K7_EVNTSEL1:
1697         case MSR_K7_EVNTSEL2:
1698         case MSR_K7_EVNTSEL3:
1699                 if (data != 0)
1700                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1701                                     "0x%x data 0x%llx\n", msr, data);
1702                 break;
1703         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1704          * so we ignore writes to make it happy.
1705          */
1706         case MSR_K7_PERFCTR0:
1707         case MSR_K7_PERFCTR1:
1708         case MSR_K7_PERFCTR2:
1709         case MSR_K7_PERFCTR3:
1710                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1711                             "0x%x data 0x%llx\n", msr, data);
1712                 break;
1713         case MSR_P6_PERFCTR0:
1714         case MSR_P6_PERFCTR1:
1715                 pr = true;
1716         case MSR_P6_EVNTSEL0:
1717         case MSR_P6_EVNTSEL1:
1718                 if (kvm_pmu_msr(vcpu, msr))
1719                         return kvm_pmu_set_msr(vcpu, msr, data);
1720
1721                 if (pr || data != 0)
1722                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
1723                                     "0x%x data 0x%llx\n", msr, data);
1724                 break;
1725         case MSR_K7_CLK_CTL:
1726                 /*
1727                  * Ignore all writes to this no longer documented MSR.
1728                  * Writes are only relevant for old K7 processors,
1729                  * all pre-dating SVM, but a recommended workaround from
1730                  * AMD for these chips. It is possible to speicify the
1731                  * affected processor models on the command line, hence
1732                  * the need to ignore the workaround.
1733                  */
1734                 break;
1735         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1736                 if (kvm_hv_msr_partition_wide(msr)) {
1737                         int r;
1738                         mutex_lock(&vcpu->kvm->lock);
1739                         r = set_msr_hyperv_pw(vcpu, msr, data);
1740                         mutex_unlock(&vcpu->kvm->lock);
1741                         return r;
1742                 } else
1743                         return set_msr_hyperv(vcpu, msr, data);
1744                 break;
1745         case MSR_IA32_BBL_CR_CTL3:
1746                 /* Drop writes to this legacy MSR -- see rdmsr
1747                  * counterpart for further detail.
1748                  */
1749                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1750                 break;
1751         case MSR_AMD64_OSVW_ID_LENGTH:
1752                 if (!guest_cpuid_has_osvw(vcpu))
1753                         return 1;
1754                 vcpu->arch.osvw.length = data;
1755                 break;
1756         case MSR_AMD64_OSVW_STATUS:
1757                 if (!guest_cpuid_has_osvw(vcpu))
1758                         return 1;
1759                 vcpu->arch.osvw.status = data;
1760                 break;
1761         default:
1762                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1763                         return xen_hvm_config(vcpu, data);
1764                 if (kvm_pmu_msr(vcpu, msr))
1765                         return kvm_pmu_set_msr(vcpu, msr, data);
1766                 if (!ignore_msrs) {
1767                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1768                                     msr, data);
1769                         return 1;
1770                 } else {
1771                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1772                                     msr, data);
1773                         break;
1774                 }
1775         }
1776         return 0;
1777 }
1778 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1779
1780
1781 /*
1782  * Reads an msr value (of 'msr_index') into 'pdata'.
1783  * Returns 0 on success, non-0 otherwise.
1784  * Assumes vcpu_load() was already called.
1785  */
1786 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1787 {
1788         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1789 }
1790
1791 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1792 {
1793         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1794
1795         if (!msr_mtrr_valid(msr))
1796                 return 1;
1797
1798         if (msr == MSR_MTRRdefType)
1799                 *pdata = vcpu->arch.mtrr_state.def_type +
1800                          (vcpu->arch.mtrr_state.enabled << 10);
1801         else if (msr == MSR_MTRRfix64K_00000)
1802                 *pdata = p[0];
1803         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1804                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1805         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1806                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1807         else if (msr == MSR_IA32_CR_PAT)
1808                 *pdata = vcpu->arch.pat;
1809         else {  /* Variable MTRRs */
1810                 int idx, is_mtrr_mask;
1811                 u64 *pt;
1812
1813                 idx = (msr - 0x200) / 2;
1814                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1815                 if (!is_mtrr_mask)
1816                         pt =
1817                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1818                 else
1819                         pt =
1820                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1821                 *pdata = *pt;
1822         }
1823
1824         return 0;
1825 }
1826
1827 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1828 {
1829         u64 data;
1830         u64 mcg_cap = vcpu->arch.mcg_cap;
1831         unsigned bank_num = mcg_cap & 0xff;
1832
1833         switch (msr) {
1834         case MSR_IA32_P5_MC_ADDR:
1835         case MSR_IA32_P5_MC_TYPE:
1836                 data = 0;
1837                 break;
1838         case MSR_IA32_MCG_CAP:
1839                 data = vcpu->arch.mcg_cap;
1840                 break;
1841         case MSR_IA32_MCG_CTL:
1842                 if (!(mcg_cap & MCG_CTL_P))
1843                         return 1;
1844                 data = vcpu->arch.mcg_ctl;
1845                 break;
1846         case MSR_IA32_MCG_STATUS:
1847                 data = vcpu->arch.mcg_status;
1848                 break;
1849         default:
1850                 if (msr >= MSR_IA32_MC0_CTL &&
1851                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1852                         u32 offset = msr - MSR_IA32_MC0_CTL;
1853                         data = vcpu->arch.mce_banks[offset];
1854                         break;
1855                 }
1856                 return 1;
1857         }
1858         *pdata = data;
1859         return 0;
1860 }
1861
1862 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1863 {
1864         u64 data = 0;
1865         struct kvm *kvm = vcpu->kvm;
1866
1867         switch (msr) {
1868         case HV_X64_MSR_GUEST_OS_ID:
1869                 data = kvm->arch.hv_guest_os_id;
1870                 break;
1871         case HV_X64_MSR_HYPERCALL:
1872                 data = kvm->arch.hv_hypercall;
1873                 break;
1874         default:
1875                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1876                 return 1;
1877         }
1878
1879         *pdata = data;
1880         return 0;
1881 }
1882
1883 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1884 {
1885         u64 data = 0;
1886
1887         switch (msr) {
1888         case HV_X64_MSR_VP_INDEX: {
1889                 int r;
1890                 struct kvm_vcpu *v;
1891                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1892                         if (v == vcpu)
1893                                 data = r;
1894                 break;
1895         }
1896         case HV_X64_MSR_EOI:
1897                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1898         case HV_X64_MSR_ICR:
1899                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1900         case HV_X64_MSR_TPR:
1901                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1902         case HV_X64_MSR_APIC_ASSIST_PAGE:
1903                 data = vcpu->arch.hv_vapic;
1904                 break;
1905         default:
1906                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1907                 return 1;
1908         }
1909         *pdata = data;
1910         return 0;
1911 }
1912
1913 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1914 {
1915         u64 data;
1916
1917         switch (msr) {
1918         case MSR_IA32_PLATFORM_ID:
1919         case MSR_IA32_EBL_CR_POWERON:
1920         case MSR_IA32_DEBUGCTLMSR:
1921         case MSR_IA32_LASTBRANCHFROMIP:
1922         case MSR_IA32_LASTBRANCHTOIP:
1923         case MSR_IA32_LASTINTFROMIP:
1924         case MSR_IA32_LASTINTTOIP:
1925         case MSR_K8_SYSCFG:
1926         case MSR_K7_HWCR:
1927         case MSR_VM_HSAVE_PA:
1928         case MSR_K7_EVNTSEL0:
1929         case MSR_K7_PERFCTR0:
1930         case MSR_K8_INT_PENDING_MSG:
1931         case MSR_AMD64_NB_CFG:
1932         case MSR_FAM10H_MMIO_CONF_BASE:
1933                 data = 0;
1934                 break;
1935         case MSR_P6_PERFCTR0:
1936         case MSR_P6_PERFCTR1:
1937         case MSR_P6_EVNTSEL0:
1938         case MSR_P6_EVNTSEL1:
1939                 if (kvm_pmu_msr(vcpu, msr))
1940                         return kvm_pmu_get_msr(vcpu, msr, pdata);
1941                 data = 0;
1942                 break;
1943         case MSR_IA32_UCODE_REV:
1944                 data = 0x100000000ULL;
1945                 break;
1946         case MSR_MTRRcap:
1947                 data = 0x500 | KVM_NR_VAR_MTRR;
1948                 break;
1949         case 0x200 ... 0x2ff:
1950                 return get_msr_mtrr(vcpu, msr, pdata);
1951         case 0xcd: /* fsb frequency */
1952                 data = 3;
1953                 break;
1954                 /*
1955                  * MSR_EBC_FREQUENCY_ID
1956                  * Conservative value valid for even the basic CPU models.
1957                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1958                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1959                  * and 266MHz for model 3, or 4. Set Core Clock
1960                  * Frequency to System Bus Frequency Ratio to 1 (bits
1961                  * 31:24) even though these are only valid for CPU
1962                  * models > 2, however guests may end up dividing or
1963                  * multiplying by zero otherwise.
1964                  */
1965         case MSR_EBC_FREQUENCY_ID:
1966                 data = 1 << 24;
1967                 break;
1968         case MSR_IA32_APICBASE:
1969                 data = kvm_get_apic_base(vcpu);
1970                 break;
1971         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1972                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1973                 break;
1974         case MSR_IA32_TSCDEADLINE:
1975                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1976                 break;
1977         case MSR_IA32_MISC_ENABLE:
1978                 data = vcpu->arch.ia32_misc_enable_msr;
1979                 break;
1980         case MSR_IA32_PERF_STATUS:
1981                 /* TSC increment by tick */
1982                 data = 1000ULL;
1983                 /* CPU multiplier */
1984                 data |= (((uint64_t)4ULL) << 40);
1985                 break;
1986         case MSR_EFER:
1987                 data = vcpu->arch.efer;
1988                 break;
1989         case MSR_KVM_WALL_CLOCK:
1990         case MSR_KVM_WALL_CLOCK_NEW:
1991                 data = vcpu->kvm->arch.wall_clock;
1992                 break;
1993         case MSR_KVM_SYSTEM_TIME:
1994         case MSR_KVM_SYSTEM_TIME_NEW:
1995                 data = vcpu->arch.time;
1996                 break;
1997         case MSR_KVM_ASYNC_PF_EN:
1998                 data = vcpu->arch.apf.msr_val;
1999                 break;
2000         case MSR_KVM_STEAL_TIME:
2001                 data = vcpu->arch.st.msr_val;
2002                 break;
2003         case MSR_KVM_PV_EOI_EN:
2004                 data = vcpu->arch.pv_eoi.msr_val;
2005                 break;
2006         case MSR_IA32_P5_MC_ADDR:
2007         case MSR_IA32_P5_MC_TYPE:
2008         case MSR_IA32_MCG_CAP:
2009         case MSR_IA32_MCG_CTL:
2010         case MSR_IA32_MCG_STATUS:
2011         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2012                 return get_msr_mce(vcpu, msr, pdata);
2013         case MSR_K7_CLK_CTL:
2014                 /*
2015                  * Provide expected ramp-up count for K7. All other
2016                  * are set to zero, indicating minimum divisors for
2017                  * every field.
2018                  *
2019                  * This prevents guest kernels on AMD host with CPU
2020                  * type 6, model 8 and higher from exploding due to
2021                  * the rdmsr failing.
2022                  */
2023                 data = 0x20000000;
2024                 break;
2025         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2026                 if (kvm_hv_msr_partition_wide(msr)) {
2027                         int r;
2028                         mutex_lock(&vcpu->kvm->lock);
2029                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2030                         mutex_unlock(&vcpu->kvm->lock);
2031                         return r;
2032                 } else
2033                         return get_msr_hyperv(vcpu, msr, pdata);
2034                 break;
2035         case MSR_IA32_BBL_CR_CTL3:
2036                 /* This legacy MSR exists but isn't fully documented in current
2037                  * silicon.  It is however accessed by winxp in very narrow
2038                  * scenarios where it sets bit #19, itself documented as
2039                  * a "reserved" bit.  Best effort attempt to source coherent
2040                  * read data here should the balance of the register be
2041                  * interpreted by the guest:
2042                  *
2043                  * L2 cache control register 3: 64GB range, 256KB size,
2044                  * enabled, latency 0x1, configured
2045                  */
2046                 data = 0xbe702111;
2047                 break;
2048         case MSR_AMD64_OSVW_ID_LENGTH:
2049                 if (!guest_cpuid_has_osvw(vcpu))
2050                         return 1;
2051                 data = vcpu->arch.osvw.length;
2052                 break;
2053         case MSR_AMD64_OSVW_STATUS:
2054                 if (!guest_cpuid_has_osvw(vcpu))
2055                         return 1;
2056                 data = vcpu->arch.osvw.status;
2057                 break;
2058         default:
2059                 if (kvm_pmu_msr(vcpu, msr))
2060                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2061                 if (!ignore_msrs) {
2062                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2063                         return 1;
2064                 } else {
2065                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2066                         data = 0;
2067                 }
2068                 break;
2069         }
2070         *pdata = data;
2071         return 0;
2072 }
2073 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2074
2075 /*
2076  * Read or write a bunch of msrs. All parameters are kernel addresses.
2077  *
2078  * @return number of msrs set successfully.
2079  */
2080 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2081                     struct kvm_msr_entry *entries,
2082                     int (*do_msr)(struct kvm_vcpu *vcpu,
2083                                   unsigned index, u64 *data))
2084 {
2085         int i, idx;
2086
2087         idx = srcu_read_lock(&vcpu->kvm->srcu);
2088         for (i = 0; i < msrs->nmsrs; ++i)
2089                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2090                         break;
2091         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2092
2093         return i;
2094 }
2095
2096 /*
2097  * Read or write a bunch of msrs. Parameters are user addresses.
2098  *
2099  * @return number of msrs set successfully.
2100  */
2101 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2102                   int (*do_msr)(struct kvm_vcpu *vcpu,
2103                                 unsigned index, u64 *data),
2104                   int writeback)
2105 {
2106         struct kvm_msrs msrs;
2107         struct kvm_msr_entry *entries;
2108         int r, n;
2109         unsigned size;
2110
2111         r = -EFAULT;
2112         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2113                 goto out;
2114
2115         r = -E2BIG;
2116         if (msrs.nmsrs >= MAX_IO_MSRS)
2117                 goto out;
2118
2119         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2120         entries = memdup_user(user_msrs->entries, size);
2121         if (IS_ERR(entries)) {
2122                 r = PTR_ERR(entries);
2123                 goto out;
2124         }
2125
2126         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2127         if (r < 0)
2128                 goto out_free;
2129
2130         r = -EFAULT;
2131         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2132                 goto out_free;
2133
2134         r = n;
2135
2136 out_free:
2137         kfree(entries);
2138 out:
2139         return r;
2140 }
2141
2142 int kvm_dev_ioctl_check_extension(long ext)
2143 {
2144         int r;
2145
2146         switch (ext) {
2147         case KVM_CAP_IRQCHIP:
2148         case KVM_CAP_HLT:
2149         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2150         case KVM_CAP_SET_TSS_ADDR:
2151         case KVM_CAP_EXT_CPUID:
2152         case KVM_CAP_CLOCKSOURCE:
2153         case KVM_CAP_PIT:
2154         case KVM_CAP_NOP_IO_DELAY:
2155         case KVM_CAP_MP_STATE:
2156         case KVM_CAP_SYNC_MMU:
2157         case KVM_CAP_USER_NMI:
2158         case KVM_CAP_REINJECT_CONTROL:
2159         case KVM_CAP_IRQ_INJECT_STATUS:
2160         case KVM_CAP_ASSIGN_DEV_IRQ:
2161         case KVM_CAP_IRQFD:
2162         case KVM_CAP_IOEVENTFD:
2163         case KVM_CAP_PIT2:
2164         case KVM_CAP_PIT_STATE2:
2165         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2166         case KVM_CAP_XEN_HVM:
2167         case KVM_CAP_ADJUST_CLOCK:
2168         case KVM_CAP_VCPU_EVENTS:
2169         case KVM_CAP_HYPERV:
2170         case KVM_CAP_HYPERV_VAPIC:
2171         case KVM_CAP_HYPERV_SPIN:
2172         case KVM_CAP_PCI_SEGMENT:
2173         case KVM_CAP_DEBUGREGS:
2174         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2175         case KVM_CAP_XSAVE:
2176         case KVM_CAP_ASYNC_PF:
2177         case KVM_CAP_GET_TSC_KHZ:
2178         case KVM_CAP_PCI_2_3:
2179         case KVM_CAP_KVMCLOCK_CTRL:
2180                 r = 1;
2181                 break;
2182         case KVM_CAP_COALESCED_MMIO:
2183                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2184                 break;
2185         case KVM_CAP_VAPIC:
2186                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2187                 break;
2188         case KVM_CAP_NR_VCPUS:
2189                 r = KVM_SOFT_MAX_VCPUS;
2190                 break;
2191         case KVM_CAP_MAX_VCPUS:
2192                 r = KVM_MAX_VCPUS;
2193                 break;
2194         case KVM_CAP_NR_MEMSLOTS:
2195                 r = KVM_MEMORY_SLOTS;
2196                 break;
2197         case KVM_CAP_PV_MMU:    /* obsolete */
2198                 r = 0;
2199                 break;
2200         case KVM_CAP_IOMMU:
2201                 r = iommu_present(&pci_bus_type);
2202                 break;
2203         case KVM_CAP_MCE:
2204                 r = KVM_MAX_MCE_BANKS;
2205                 break;
2206         case KVM_CAP_XCRS:
2207                 r = cpu_has_xsave;
2208                 break;
2209         case KVM_CAP_TSC_CONTROL:
2210                 r = kvm_has_tsc_control;
2211                 break;
2212         case KVM_CAP_TSC_DEADLINE_TIMER:
2213                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2214                 break;
2215         default:
2216                 r = 0;
2217                 break;
2218         }
2219         return r;
2220
2221 }
2222
2223 long kvm_arch_dev_ioctl(struct file *filp,
2224                         unsigned int ioctl, unsigned long arg)
2225 {
2226         void __user *argp = (void __user *)arg;
2227         long r;
2228
2229         switch (ioctl) {
2230         case KVM_GET_MSR_INDEX_LIST: {
2231                 struct kvm_msr_list __user *user_msr_list = argp;
2232                 struct kvm_msr_list msr_list;
2233                 unsigned n;
2234
2235                 r = -EFAULT;
2236                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2237                         goto out;
2238                 n = msr_list.nmsrs;
2239                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2240                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2241                         goto out;
2242                 r = -E2BIG;
2243                 if (n < msr_list.nmsrs)
2244                         goto out;
2245                 r = -EFAULT;
2246                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2247                                  num_msrs_to_save * sizeof(u32)))
2248                         goto out;
2249                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2250                                  &emulated_msrs,
2251                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2252                         goto out;
2253                 r = 0;
2254                 break;
2255         }
2256         case KVM_GET_SUPPORTED_CPUID: {
2257                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2258                 struct kvm_cpuid2 cpuid;
2259
2260                 r = -EFAULT;
2261                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2262                         goto out;
2263                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2264                                                       cpuid_arg->entries);
2265                 if (r)
2266                         goto out;
2267
2268                 r = -EFAULT;
2269                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2270                         goto out;
2271                 r = 0;
2272                 break;
2273         }
2274         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2275                 u64 mce_cap;
2276
2277                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2278                 r = -EFAULT;
2279                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2280                         goto out;
2281                 r = 0;
2282                 break;
2283         }
2284         default:
2285                 r = -EINVAL;
2286         }
2287 out:
2288         return r;
2289 }
2290
2291 static void wbinvd_ipi(void *garbage)
2292 {
2293         wbinvd();
2294 }
2295
2296 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2297 {
2298         return vcpu->kvm->arch.iommu_domain &&
2299                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2300 }
2301
2302 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2303 {
2304         /* Address WBINVD may be executed by guest */
2305         if (need_emulate_wbinvd(vcpu)) {
2306                 if (kvm_x86_ops->has_wbinvd_exit())
2307                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2308                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2309                         smp_call_function_single(vcpu->cpu,
2310                                         wbinvd_ipi, NULL, 1);
2311         }
2312
2313         kvm_x86_ops->vcpu_load(vcpu, cpu);
2314
2315         /* Apply any externally detected TSC adjustments (due to suspend) */
2316         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2317                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2318                 vcpu->arch.tsc_offset_adjustment = 0;
2319                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2320         }
2321
2322         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2323                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2324                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2325                 if (tsc_delta < 0)
2326                         mark_tsc_unstable("KVM discovered backwards TSC");
2327                 if (check_tsc_unstable()) {
2328                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2329                                                 vcpu->arch.last_guest_tsc);
2330                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2331                         vcpu->arch.tsc_catchup = 1;
2332                 }
2333                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2334                 if (vcpu->cpu != cpu)
2335                         kvm_migrate_timers(vcpu);
2336                 vcpu->cpu = cpu;
2337         }
2338
2339         accumulate_steal_time(vcpu);
2340         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2341 }
2342
2343 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2344 {
2345         kvm_x86_ops->vcpu_put(vcpu);
2346         kvm_put_guest_fpu(vcpu);
2347         vcpu->arch.last_host_tsc = native_read_tsc();
2348 }
2349
2350 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2351                                     struct kvm_lapic_state *s)
2352 {
2353         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2354
2355         return 0;
2356 }
2357
2358 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2359                                     struct kvm_lapic_state *s)
2360 {
2361         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2362         kvm_apic_post_state_restore(vcpu);
2363         update_cr8_intercept(vcpu);
2364
2365         return 0;
2366 }
2367
2368 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2369                                     struct kvm_interrupt *irq)
2370 {
2371         if (irq->irq < 0 || irq->irq >= 256)
2372                 return -EINVAL;
2373         if (irqchip_in_kernel(vcpu->kvm))
2374                 return -ENXIO;
2375
2376         kvm_queue_interrupt(vcpu, irq->irq, false);
2377         kvm_make_request(KVM_REQ_EVENT, vcpu);
2378
2379         return 0;
2380 }
2381
2382 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2383 {
2384         kvm_inject_nmi(vcpu);
2385
2386         return 0;
2387 }
2388
2389 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2390                                            struct kvm_tpr_access_ctl *tac)
2391 {
2392         if (tac->flags)
2393                 return -EINVAL;
2394         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2395         return 0;
2396 }
2397
2398 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2399                                         u64 mcg_cap)
2400 {
2401         int r;
2402         unsigned bank_num = mcg_cap & 0xff, bank;
2403
2404         r = -EINVAL;
2405         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2406                 goto out;
2407         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2408                 goto out;
2409         r = 0;
2410         vcpu->arch.mcg_cap = mcg_cap;
2411         /* Init IA32_MCG_CTL to all 1s */
2412         if (mcg_cap & MCG_CTL_P)
2413                 vcpu->arch.mcg_ctl = ~(u64)0;
2414         /* Init IA32_MCi_CTL to all 1s */
2415         for (bank = 0; bank < bank_num; bank++)
2416                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2417 out:
2418         return r;
2419 }
2420
2421 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2422                                       struct kvm_x86_mce *mce)
2423 {
2424         u64 mcg_cap = vcpu->arch.mcg_cap;
2425         unsigned bank_num = mcg_cap & 0xff;
2426         u64 *banks = vcpu->arch.mce_banks;
2427
2428         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2429                 return -EINVAL;
2430         /*
2431          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2432          * reporting is disabled
2433          */
2434         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2435             vcpu->arch.mcg_ctl != ~(u64)0)
2436                 return 0;
2437         banks += 4 * mce->bank;
2438         /*
2439          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2440          * reporting is disabled for the bank
2441          */
2442         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2443                 return 0;
2444         if (mce->status & MCI_STATUS_UC) {
2445                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2446                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2447                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2448                         return 0;
2449                 }
2450                 if (banks[1] & MCI_STATUS_VAL)
2451                         mce->status |= MCI_STATUS_OVER;
2452                 banks[2] = mce->addr;
2453                 banks[3] = mce->misc;
2454                 vcpu->arch.mcg_status = mce->mcg_status;
2455                 banks[1] = mce->status;
2456                 kvm_queue_exception(vcpu, MC_VECTOR);
2457         } else if (!(banks[1] & MCI_STATUS_VAL)
2458                    || !(banks[1] & MCI_STATUS_UC)) {
2459                 if (banks[1] & MCI_STATUS_VAL)
2460                         mce->status |= MCI_STATUS_OVER;
2461                 banks[2] = mce->addr;
2462                 banks[3] = mce->misc;
2463                 banks[1] = mce->status;
2464         } else
2465                 banks[1] |= MCI_STATUS_OVER;
2466         return 0;
2467 }
2468
2469 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2470                                                struct kvm_vcpu_events *events)
2471 {
2472         process_nmi(vcpu);
2473         events->exception.injected =
2474                 vcpu->arch.exception.pending &&
2475                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2476         events->exception.nr = vcpu->arch.exception.nr;
2477         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2478         events->exception.pad = 0;
2479         events->exception.error_code = vcpu->arch.exception.error_code;
2480
2481         events->interrupt.injected =
2482                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2483         events->interrupt.nr = vcpu->arch.interrupt.nr;
2484         events->interrupt.soft = 0;
2485         events->interrupt.shadow =
2486                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2487                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2488
2489         events->nmi.injected = vcpu->arch.nmi_injected;
2490         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2491         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2492         events->nmi.pad = 0;
2493
2494         events->sipi_vector = vcpu->arch.sipi_vector;
2495
2496         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2497                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2498                          | KVM_VCPUEVENT_VALID_SHADOW);
2499         memset(&events->reserved, 0, sizeof(events->reserved));
2500 }
2501
2502 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2503                                               struct kvm_vcpu_events *events)
2504 {
2505         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2506                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2507                               | KVM_VCPUEVENT_VALID_SHADOW))
2508                 return -EINVAL;
2509
2510         process_nmi(vcpu);
2511         vcpu->arch.exception.pending = events->exception.injected;
2512         vcpu->arch.exception.nr = events->exception.nr;
2513         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2514         vcpu->arch.exception.error_code = events->exception.error_code;
2515
2516         vcpu->arch.interrupt.pending = events->interrupt.injected;
2517         vcpu->arch.interrupt.nr = events->interrupt.nr;
2518         vcpu->arch.interrupt.soft = events->interrupt.soft;
2519         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2520                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2521                                                   events->interrupt.shadow);
2522
2523         vcpu->arch.nmi_injected = events->nmi.injected;
2524         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2525                 vcpu->arch.nmi_pending = events->nmi.pending;
2526         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2527
2528         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2529                 vcpu->arch.sipi_vector = events->sipi_vector;
2530
2531         kvm_make_request(KVM_REQ_EVENT, vcpu);
2532
2533         return 0;
2534 }
2535
2536 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2537                                              struct kvm_debugregs *dbgregs)
2538 {
2539         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2540         dbgregs->dr6 = vcpu->arch.dr6;
2541         dbgregs->dr7 = vcpu->arch.dr7;
2542         dbgregs->flags = 0;
2543         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2544 }
2545
2546 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2547                                             struct kvm_debugregs *dbgregs)
2548 {
2549         if (dbgregs->flags)
2550                 return -EINVAL;
2551
2552         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2553         vcpu->arch.dr6 = dbgregs->dr6;
2554         vcpu->arch.dr7 = dbgregs->dr7;
2555
2556         return 0;
2557 }
2558
2559 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2560                                          struct kvm_xsave *guest_xsave)
2561 {
2562         if (cpu_has_xsave)
2563                 memcpy(guest_xsave->region,
2564                         &vcpu->arch.guest_fpu.state->xsave,
2565                         xstate_size);
2566         else {
2567                 memcpy(guest_xsave->region,
2568                         &vcpu->arch.guest_fpu.state->fxsave,
2569                         sizeof(struct i387_fxsave_struct));
2570                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2571                         XSTATE_FPSSE;
2572         }
2573 }
2574
2575 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2576                                         struct kvm_xsave *guest_xsave)
2577 {
2578         u64 xstate_bv =
2579                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2580
2581         if (cpu_has_xsave)
2582                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2583                         guest_xsave->region, xstate_size);
2584         else {
2585                 if (xstate_bv & ~XSTATE_FPSSE)
2586                         return -EINVAL;
2587                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2588                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2589         }
2590         return 0;
2591 }
2592
2593 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2594                                         struct kvm_xcrs *guest_xcrs)
2595 {
2596         if (!cpu_has_xsave) {
2597                 guest_xcrs->nr_xcrs = 0;
2598                 return;
2599         }
2600
2601         guest_xcrs->nr_xcrs = 1;
2602         guest_xcrs->flags = 0;
2603         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2604         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2605 }
2606
2607 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2608                                        struct kvm_xcrs *guest_xcrs)
2609 {
2610         int i, r = 0;
2611
2612         if (!cpu_has_xsave)
2613                 return -EINVAL;
2614
2615         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2616                 return -EINVAL;
2617
2618         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2619                 /* Only support XCR0 currently */
2620                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2621                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2622                                 guest_xcrs->xcrs[0].value);
2623                         break;
2624                 }
2625         if (r)
2626                 r = -EINVAL;
2627         return r;
2628 }
2629
2630 /*
2631  * kvm_set_guest_paused() indicates to the guest kernel that it has been
2632  * stopped by the hypervisor.  This function will be called from the host only.
2633  * EINVAL is returned when the host attempts to set the flag for a guest that
2634  * does not support pv clocks.
2635  */
2636 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
2637 {
2638         struct pvclock_vcpu_time_info *src = &vcpu->arch.hv_clock;
2639         if (!vcpu->arch.time_page)
2640                 return -EINVAL;
2641         src->flags |= PVCLOCK_GUEST_STOPPED;
2642         mark_page_dirty(vcpu->kvm, vcpu->arch.time >> PAGE_SHIFT);
2643         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2644         return 0;
2645 }
2646
2647 long kvm_arch_vcpu_ioctl(struct file *filp,
2648                          unsigned int ioctl, unsigned long arg)
2649 {
2650         struct kvm_vcpu *vcpu = filp->private_data;
2651         void __user *argp = (void __user *)arg;
2652         int r;
2653         union {
2654                 struct kvm_lapic_state *lapic;
2655                 struct kvm_xsave *xsave;
2656                 struct kvm_xcrs *xcrs;
2657                 void *buffer;
2658         } u;
2659
2660         u.buffer = NULL;
2661         switch (ioctl) {
2662         case KVM_GET_LAPIC: {
2663                 r = -EINVAL;
2664                 if (!vcpu->arch.apic)
2665                         goto out;
2666                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2667
2668                 r = -ENOMEM;
2669                 if (!u.lapic)
2670                         goto out;
2671                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2672                 if (r)
2673                         goto out;
2674                 r = -EFAULT;
2675                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2676                         goto out;
2677                 r = 0;
2678                 break;
2679         }
2680         case KVM_SET_LAPIC: {
2681                 r = -EINVAL;
2682                 if (!vcpu->arch.apic)
2683                         goto out;
2684                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
2685                 if (IS_ERR(u.lapic)) {
2686                         r = PTR_ERR(u.lapic);
2687                         goto out;
2688                 }
2689
2690                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2691                 if (r)
2692                         goto out;
2693                 r = 0;
2694                 break;
2695         }
2696         case KVM_INTERRUPT: {
2697                 struct kvm_interrupt irq;
2698
2699                 r = -EFAULT;
2700                 if (copy_from_user(&irq, argp, sizeof irq))
2701                         goto out;
2702                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2703                 if (r)
2704                         goto out;
2705                 r = 0;
2706                 break;
2707         }
2708         case KVM_NMI: {
2709                 r = kvm_vcpu_ioctl_nmi(vcpu);
2710                 if (r)
2711                         goto out;
2712                 r = 0;
2713                 break;
2714         }
2715         case KVM_SET_CPUID: {
2716                 struct kvm_cpuid __user *cpuid_arg = argp;
2717                 struct kvm_cpuid cpuid;
2718
2719                 r = -EFAULT;
2720                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2721                         goto out;
2722                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2723                 if (r)
2724                         goto out;
2725                 break;
2726         }
2727         case KVM_SET_CPUID2: {
2728                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2729                 struct kvm_cpuid2 cpuid;
2730
2731                 r = -EFAULT;
2732                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2733                         goto out;
2734                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2735                                               cpuid_arg->entries);
2736                 if (r)
2737                         goto out;
2738                 break;
2739         }
2740         case KVM_GET_CPUID2: {
2741                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2742                 struct kvm_cpuid2 cpuid;
2743
2744                 r = -EFAULT;
2745                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2746                         goto out;
2747                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2748                                               cpuid_arg->entries);
2749                 if (r)
2750                         goto out;
2751                 r = -EFAULT;
2752                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2753                         goto out;
2754                 r = 0;
2755                 break;
2756         }
2757         case KVM_GET_MSRS:
2758                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2759                 break;
2760         case KVM_SET_MSRS:
2761                 r = msr_io(vcpu, argp, do_set_msr, 0);
2762                 break;
2763         case KVM_TPR_ACCESS_REPORTING: {
2764                 struct kvm_tpr_access_ctl tac;
2765
2766                 r = -EFAULT;
2767                 if (copy_from_user(&tac, argp, sizeof tac))
2768                         goto out;
2769                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2770                 if (r)
2771                         goto out;
2772                 r = -EFAULT;
2773                 if (copy_to_user(argp, &tac, sizeof tac))
2774                         goto out;
2775                 r = 0;
2776                 break;
2777         };
2778         case KVM_SET_VAPIC_ADDR: {
2779                 struct kvm_vapic_addr va;
2780
2781                 r = -EINVAL;
2782                 if (!irqchip_in_kernel(vcpu->kvm))
2783                         goto out;
2784                 r = -EFAULT;
2785                 if (copy_from_user(&va, argp, sizeof va))
2786                         goto out;
2787                 r = 0;
2788                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2789                 break;
2790         }
2791         case KVM_X86_SETUP_MCE: {
2792                 u64 mcg_cap;
2793
2794                 r = -EFAULT;
2795                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2796                         goto out;
2797                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2798                 break;
2799         }
2800         case KVM_X86_SET_MCE: {
2801                 struct kvm_x86_mce mce;
2802
2803                 r = -EFAULT;
2804                 if (copy_from_user(&mce, argp, sizeof mce))
2805                         goto out;
2806                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2807                 break;
2808         }
2809         case KVM_GET_VCPU_EVENTS: {
2810                 struct kvm_vcpu_events events;
2811
2812                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2813
2814                 r = -EFAULT;
2815                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2816                         break;
2817                 r = 0;
2818                 break;
2819         }
2820         case KVM_SET_VCPU_EVENTS: {
2821                 struct kvm_vcpu_events events;
2822
2823                 r = -EFAULT;
2824                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2825                         break;
2826
2827                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2828                 break;
2829         }
2830         case KVM_GET_DEBUGREGS: {
2831                 struct kvm_debugregs dbgregs;
2832
2833                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2834
2835                 r = -EFAULT;
2836                 if (copy_to_user(argp, &dbgregs,
2837                                  sizeof(struct kvm_debugregs)))
2838                         break;
2839                 r = 0;
2840                 break;
2841         }
2842         case KVM_SET_DEBUGREGS: {
2843                 struct kvm_debugregs dbgregs;
2844
2845                 r = -EFAULT;
2846                 if (copy_from_user(&dbgregs, argp,
2847                                    sizeof(struct kvm_debugregs)))
2848                         break;
2849
2850                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2851                 break;
2852         }
2853         case KVM_GET_XSAVE: {
2854                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2855                 r = -ENOMEM;
2856                 if (!u.xsave)
2857                         break;
2858
2859                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2860
2861                 r = -EFAULT;
2862                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2863                         break;
2864                 r = 0;
2865                 break;
2866         }
2867         case KVM_SET_XSAVE: {
2868                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
2869                 if (IS_ERR(u.xsave)) {
2870                         r = PTR_ERR(u.xsave);
2871                         goto out;
2872                 }
2873
2874                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2875                 break;
2876         }
2877         case KVM_GET_XCRS: {
2878                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2879                 r = -ENOMEM;
2880                 if (!u.xcrs)
2881                         break;
2882
2883                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2884
2885                 r = -EFAULT;
2886                 if (copy_to_user(argp, u.xcrs,
2887                                  sizeof(struct kvm_xcrs)))
2888                         break;
2889                 r = 0;
2890                 break;
2891         }
2892         case KVM_SET_XCRS: {
2893                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
2894                 if (IS_ERR(u.xcrs)) {
2895                         r = PTR_ERR(u.xcrs);
2896                         goto out;
2897                 }
2898
2899                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2900                 break;
2901         }
2902         case KVM_SET_TSC_KHZ: {
2903                 u32 user_tsc_khz;
2904
2905                 r = -EINVAL;
2906                 user_tsc_khz = (u32)arg;
2907
2908                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
2909                         goto out;
2910
2911                 if (user_tsc_khz == 0)
2912                         user_tsc_khz = tsc_khz;
2913
2914                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
2915
2916                 r = 0;
2917                 goto out;
2918         }
2919         case KVM_GET_TSC_KHZ: {
2920                 r = vcpu->arch.virtual_tsc_khz;
2921                 goto out;
2922         }
2923         case KVM_KVMCLOCK_CTRL: {
2924                 r = kvm_set_guest_paused(vcpu);
2925                 goto out;
2926         }
2927         default:
2928                 r = -EINVAL;
2929         }
2930 out:
2931         kfree(u.buffer);
2932         return r;
2933 }
2934
2935 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
2936 {
2937         return VM_FAULT_SIGBUS;
2938 }
2939
2940 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2941 {
2942         int ret;
2943
2944         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2945                 return -1;
2946         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2947         return ret;
2948 }
2949
2950 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2951                                               u64 ident_addr)
2952 {
2953         kvm->arch.ept_identity_map_addr = ident_addr;
2954         return 0;
2955 }
2956
2957 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2958                                           u32 kvm_nr_mmu_pages)
2959 {
2960         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2961                 return -EINVAL;
2962
2963         mutex_lock(&kvm->slots_lock);
2964         spin_lock(&kvm->mmu_lock);
2965
2966         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2967         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2968
2969         spin_unlock(&kvm->mmu_lock);
2970         mutex_unlock(&kvm->slots_lock);
2971         return 0;
2972 }
2973
2974 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2975 {
2976         return kvm->arch.n_max_mmu_pages;
2977 }
2978
2979 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2980 {
2981         int r;
2982
2983         r = 0;
2984         switch (chip->chip_id) {
2985         case KVM_IRQCHIP_PIC_MASTER:
2986                 memcpy(&chip->chip.pic,
2987                         &pic_irqchip(kvm)->pics[0],
2988                         sizeof(struct kvm_pic_state));
2989                 break;
2990         case KVM_IRQCHIP_PIC_SLAVE:
2991                 memcpy(&chip->chip.pic,
2992                         &pic_irqchip(kvm)->pics[1],
2993                         sizeof(struct kvm_pic_state));
2994                 break;
2995         case KVM_IRQCHIP_IOAPIC:
2996                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2997                 break;
2998         default:
2999                 r = -EINVAL;
3000                 break;
3001         }
3002         return r;
3003 }
3004
3005 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3006 {
3007         int r;
3008
3009         r = 0;
3010         switch (chip->chip_id) {
3011         case KVM_IRQCHIP_PIC_MASTER:
3012                 spin_lock(&pic_irqchip(kvm)->lock);
3013                 memcpy(&pic_irqchip(kvm)->pics[0],
3014                         &chip->chip.pic,
3015                         sizeof(struct kvm_pic_state));
3016                 spin_unlock(&pic_irqchip(kvm)->lock);
3017                 break;
3018         case KVM_IRQCHIP_PIC_SLAVE:
3019                 spin_lock(&pic_irqchip(kvm)->lock);
3020                 memcpy(&pic_irqchip(kvm)->pics[1],
3021                         &chip->chip.pic,
3022                         sizeof(struct kvm_pic_state));
3023                 spin_unlock(&pic_irqchip(kvm)->lock);
3024                 break;
3025         case KVM_IRQCHIP_IOAPIC:
3026                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3027                 break;
3028         default:
3029                 r = -EINVAL;
3030                 break;
3031         }
3032         kvm_pic_update_irq(pic_irqchip(kvm));
3033         return r;
3034 }
3035
3036 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3037 {
3038         int r = 0;
3039
3040         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3041         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3042         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3043         return r;
3044 }
3045
3046 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3047 {
3048         int r = 0;
3049
3050         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3051         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3052         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3053         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3054         return r;
3055 }
3056
3057 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3058 {
3059         int r = 0;
3060
3061         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3062         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3063                 sizeof(ps->channels));
3064         ps->flags = kvm->arch.vpit->pit_state.flags;
3065         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3066         memset(&ps->reserved, 0, sizeof(ps->reserved));
3067         return r;
3068 }
3069
3070 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3071 {
3072         int r = 0, start = 0;
3073         u32 prev_legacy, cur_legacy;
3074         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3075         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3076         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3077         if (!prev_legacy && cur_legacy)
3078                 start = 1;
3079         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3080                sizeof(kvm->arch.vpit->pit_state.channels));
3081         kvm->arch.vpit->pit_state.flags = ps->flags;
3082         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3083         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3084         return r;
3085 }
3086
3087 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3088                                  struct kvm_reinject_control *control)
3089 {
3090         if (!kvm->arch.vpit)
3091                 return -ENXIO;
3092         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3093         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3094         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3095         return 0;
3096 }
3097
3098 /**
3099  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3100  * @kvm: kvm instance
3101  * @log: slot id and address to which we copy the log
3102  *
3103  * We need to keep it in mind that VCPU threads can write to the bitmap
3104  * concurrently.  So, to avoid losing data, we keep the following order for
3105  * each bit:
3106  *
3107  *   1. Take a snapshot of the bit and clear it if needed.
3108  *   2. Write protect the corresponding page.
3109  *   3. Flush TLB's if needed.
3110  *   4. Copy the snapshot to the userspace.
3111  *
3112  * Between 2 and 3, the guest may write to the page using the remaining TLB
3113  * entry.  This is not a problem because the page will be reported dirty at
3114  * step 4 using the snapshot taken before and step 3 ensures that successive
3115  * writes will be logged for the next call.
3116  */
3117 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3118 {
3119         int r;
3120         struct kvm_memory_slot *memslot;
3121         unsigned long n, i;
3122         unsigned long *dirty_bitmap;
3123         unsigned long *dirty_bitmap_buffer;
3124         bool is_dirty = false;
3125
3126         mutex_lock(&kvm->slots_lock);
3127
3128         r = -EINVAL;
3129         if (log->slot >= KVM_MEMORY_SLOTS)
3130                 goto out;
3131
3132         memslot = id_to_memslot(kvm->memslots, log->slot);
3133
3134         dirty_bitmap = memslot->dirty_bitmap;
3135         r = -ENOENT;
3136         if (!dirty_bitmap)
3137                 goto out;
3138
3139         n = kvm_dirty_bitmap_bytes(memslot);
3140
3141         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3142         memset(dirty_bitmap_buffer, 0, n);
3143
3144         spin_lock(&kvm->mmu_lock);
3145
3146         for (i = 0; i < n / sizeof(long); i++) {
3147                 unsigned long mask;
3148                 gfn_t offset;
3149
3150                 if (!dirty_bitmap[i])
3151                         continue;
3152
3153                 is_dirty = true;
3154
3155                 mask = xchg(&dirty_bitmap[i], 0);
3156                 dirty_bitmap_buffer[i] = mask;
3157
3158                 offset = i * BITS_PER_LONG;
3159                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3160         }
3161         if (is_dirty)
3162                 kvm_flush_remote_tlbs(kvm);
3163
3164         spin_unlock(&kvm->mmu_lock);
3165
3166         r = -EFAULT;
3167         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3168                 goto out;
3169
3170         r = 0;
3171 out:
3172         mutex_unlock(&kvm->slots_lock);
3173         return r;
3174 }
3175
3176 long kvm_arch_vm_ioctl(struct file *filp,
3177                        unsigned int ioctl, unsigned long arg)
3178 {
3179         struct kvm *kvm = filp->private_data;
3180         void __user *argp = (void __user *)arg;
3181         int r = -ENOTTY;
3182         /*
3183          * This union makes it completely explicit to gcc-3.x
3184          * that these two variables' stack usage should be
3185          * combined, not added together.
3186          */
3187         union {
3188                 struct kvm_pit_state ps;
3189                 struct kvm_pit_state2 ps2;
3190                 struct kvm_pit_config pit_config;
3191         } u;
3192
3193         switch (ioctl) {
3194         case KVM_SET_TSS_ADDR:
3195                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3196                 if (r < 0)
3197                         goto out;
3198                 break;
3199         case KVM_SET_IDENTITY_MAP_ADDR: {
3200                 u64 ident_addr;
3201
3202                 r = -EFAULT;
3203                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3204                         goto out;
3205                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3206                 if (r < 0)
3207                         goto out;
3208                 break;
3209         }
3210         case KVM_SET_NR_MMU_PAGES:
3211                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3212                 if (r)
3213                         goto out;
3214                 break;
3215         case KVM_GET_NR_MMU_PAGES:
3216                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3217                 break;
3218         case KVM_CREATE_IRQCHIP: {
3219                 struct kvm_pic *vpic;
3220
3221                 mutex_lock(&kvm->lock);
3222                 r = -EEXIST;
3223                 if (kvm->arch.vpic)
3224                         goto create_irqchip_unlock;
3225                 r = -EINVAL;
3226                 if (atomic_read(&kvm->online_vcpus))
3227                         goto create_irqchip_unlock;
3228                 r = -ENOMEM;
3229                 vpic = kvm_create_pic(kvm);
3230                 if (vpic) {
3231                         r = kvm_ioapic_init(kvm);
3232                         if (r) {
3233                                 mutex_lock(&kvm->slots_lock);
3234                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3235                                                           &vpic->dev_master);
3236                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3237                                                           &vpic->dev_slave);
3238                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3239                                                           &vpic->dev_eclr);
3240                                 mutex_unlock(&kvm->slots_lock);
3241                                 kfree(vpic);
3242                                 goto create_irqchip_unlock;
3243                         }
3244                 } else
3245                         goto create_irqchip_unlock;
3246                 smp_wmb();
3247                 kvm->arch.vpic = vpic;
3248                 smp_wmb();
3249                 r = kvm_setup_default_irq_routing(kvm);
3250                 if (r) {
3251                         mutex_lock(&kvm->slots_lock);
3252                         mutex_lock(&kvm->irq_lock);
3253                         kvm_ioapic_destroy(kvm);
3254                         kvm_destroy_pic(kvm);
3255                         mutex_unlock(&kvm->irq_lock);
3256                         mutex_unlock(&kvm->slots_lock);
3257                 }
3258         create_irqchip_unlock:
3259                 mutex_unlock(&kvm->lock);
3260                 break;
3261         }
3262         case KVM_CREATE_PIT:
3263                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3264                 goto create_pit;
3265         case KVM_CREATE_PIT2:
3266                 r = -EFAULT;
3267                 if (copy_from_user(&u.pit_config, argp,
3268                                    sizeof(struct kvm_pit_config)))
3269                         goto out;
3270         create_pit:
3271                 mutex_lock(&kvm->slots_lock);
3272                 r = -EEXIST;
3273                 if (kvm->arch.vpit)
3274                         goto create_pit_unlock;
3275                 r = -ENOMEM;
3276                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3277                 if (kvm->arch.vpit)
3278                         r = 0;
3279         create_pit_unlock:
3280                 mutex_unlock(&kvm->slots_lock);
3281                 break;
3282         case KVM_IRQ_LINE_STATUS:
3283         case KVM_IRQ_LINE: {
3284                 struct kvm_irq_level irq_event;
3285
3286                 r = -EFAULT;
3287                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3288                         goto out;
3289                 r = -ENXIO;
3290                 if (irqchip_in_kernel(kvm)) {
3291                         __s32 status;
3292                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3293                                         irq_event.irq, irq_event.level);
3294                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3295                                 r = -EFAULT;
3296                                 irq_event.status = status;
3297                                 if (copy_to_user(argp, &irq_event,
3298                                                         sizeof irq_event))
3299                                         goto out;
3300                         }
3301                         r = 0;
3302                 }
3303                 break;
3304         }
3305         case KVM_GET_IRQCHIP: {
3306                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3307                 struct kvm_irqchip *chip;
3308
3309                 chip = memdup_user(argp, sizeof(*chip));
3310                 if (IS_ERR(chip)) {
3311                         r = PTR_ERR(chip);
3312                         goto out;
3313                 }
3314
3315                 r = -ENXIO;
3316                 if (!irqchip_in_kernel(kvm))
3317                         goto get_irqchip_out;
3318                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3319                 if (r)
3320                         goto get_irqchip_out;
3321                 r = -EFAULT;
3322                 if (copy_to_user(argp, chip, sizeof *chip))
3323                         goto get_irqchip_out;
3324                 r = 0;
3325         get_irqchip_out:
3326                 kfree(chip);
3327                 if (r)
3328                         goto out;
3329                 break;
3330         }
3331         case KVM_SET_IRQCHIP: {
3332                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3333                 struct kvm_irqchip *chip;
3334
3335                 chip = memdup_user(argp, sizeof(*chip));
3336                 if (IS_ERR(chip)) {
3337                         r = PTR_ERR(chip);
3338                         goto out;
3339                 }
3340
3341                 r = -ENXIO;
3342                 if (!irqchip_in_kernel(kvm))
3343                         goto set_irqchip_out;
3344                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3345                 if (r)
3346                         goto set_irqchip_out;
3347                 r = 0;
3348         set_irqchip_out:
3349                 kfree(chip);
3350                 if (r)
3351                         goto out;
3352                 break;
3353         }
3354         case KVM_GET_PIT: {
3355                 r = -EFAULT;
3356                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3357                         goto out;
3358                 r = -ENXIO;
3359                 if (!kvm->arch.vpit)
3360                         goto out;
3361                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3362                 if (r)
3363                         goto out;
3364                 r = -EFAULT;
3365                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3366                         goto out;
3367                 r = 0;
3368                 break;
3369         }
3370         case KVM_SET_PIT: {
3371                 r = -EFAULT;
3372                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3373                         goto out;
3374                 r = -ENXIO;
3375                 if (!kvm->arch.vpit)
3376                         goto out;
3377                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3378                 if (r)
3379                         goto out;
3380                 r = 0;
3381                 break;
3382         }
3383         case KVM_GET_PIT2: {
3384                 r = -ENXIO;
3385                 if (!kvm->arch.vpit)
3386                         goto out;
3387                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3388                 if (r)
3389                         goto out;
3390                 r = -EFAULT;
3391                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3392                         goto out;
3393                 r = 0;
3394                 break;
3395         }
3396         case KVM_SET_PIT2: {
3397                 r = -EFAULT;
3398                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3399                         goto out;
3400                 r = -ENXIO;
3401                 if (!kvm->arch.vpit)
3402                         goto out;
3403                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3404                 if (r)
3405                         goto out;
3406                 r = 0;
3407                 break;
3408         }
3409         case KVM_REINJECT_CONTROL: {
3410                 struct kvm_reinject_control control;
3411                 r =  -EFAULT;
3412                 if (copy_from_user(&control, argp, sizeof(control)))
3413                         goto out;
3414                 r = kvm_vm_ioctl_reinject(kvm, &control);
3415                 if (r)
3416                         goto out;
3417                 r = 0;
3418                 break;
3419         }
3420         case KVM_XEN_HVM_CONFIG: {
3421                 r = -EFAULT;
3422                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3423                                    sizeof(struct kvm_xen_hvm_config)))
3424                         goto out;
3425                 r = -EINVAL;
3426                 if (kvm->arch.xen_hvm_config.flags)
3427                         goto out;
3428                 r = 0;
3429                 break;
3430         }
3431         case KVM_SET_CLOCK: {
3432                 struct kvm_clock_data user_ns;
3433                 u64 now_ns;
3434                 s64 delta;
3435
3436                 r = -EFAULT;
3437                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3438                         goto out;
3439
3440                 r = -EINVAL;
3441                 if (user_ns.flags)
3442                         goto out;
3443
3444                 r = 0;
3445                 local_irq_disable();
3446                 now_ns = get_kernel_ns();
3447                 delta = user_ns.clock - now_ns;
3448                 local_irq_enable();
3449                 kvm->arch.kvmclock_offset = delta;
3450                 break;
3451         }
3452         case KVM_GET_CLOCK: {
3453                 struct kvm_clock_data user_ns;
3454                 u64 now_ns;
3455
3456                 local_irq_disable();
3457                 now_ns = get_kernel_ns();
3458                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3459                 local_irq_enable();
3460                 user_ns.flags = 0;
3461                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3462
3463                 r = -EFAULT;
3464                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3465                         goto out;
3466                 r = 0;
3467                 break;
3468         }
3469
3470         default:
3471                 ;
3472         }
3473 out:
3474         return r;
3475 }
3476
3477 static void kvm_init_msr_list(void)
3478 {
3479         u32 dummy[2];
3480         unsigned i, j;
3481
3482         /* skip the first msrs in the list. KVM-specific */
3483         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3484                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3485                         continue;
3486                 if (j < i)
3487                         msrs_to_save[j] = msrs_to_save[i];
3488                 j++;
3489         }
3490         num_msrs_to_save = j;
3491 }
3492
3493 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3494                            const void *v)
3495 {
3496         int handled = 0;
3497         int n;
3498
3499         do {
3500                 n = min(len, 8);
3501                 if (!(vcpu->arch.apic &&
3502                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3503                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3504                         break;
3505                 handled += n;
3506                 addr += n;
3507                 len -= n;
3508                 v += n;
3509         } while (len);
3510
3511         return handled;
3512 }
3513
3514 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3515 {
3516         int handled = 0;
3517         int n;
3518
3519         do {
3520                 n = min(len, 8);
3521                 if (!(vcpu->arch.apic &&
3522                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3523                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3524                         break;
3525                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3526                 handled += n;
3527                 addr += n;
3528                 len -= n;
3529                 v += n;
3530         } while (len);
3531
3532         return handled;
3533 }
3534
3535 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3536                         struct kvm_segment *var, int seg)
3537 {
3538         kvm_x86_ops->set_segment(vcpu, var, seg);
3539 }
3540
3541 void kvm_get_segment(struct kvm_vcpu *vcpu,
3542                      struct kvm_segment *var, int seg)
3543 {
3544         kvm_x86_ops->get_segment(vcpu, var, seg);
3545 }
3546
3547 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3548 {
3549         gpa_t t_gpa;
3550         struct x86_exception exception;
3551
3552         BUG_ON(!mmu_is_nested(vcpu));
3553
3554         /* NPT walks are always user-walks */
3555         access |= PFERR_USER_MASK;
3556         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3557
3558         return t_gpa;
3559 }
3560
3561 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3562                               struct x86_exception *exception)
3563 {
3564         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3565         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3566 }
3567
3568  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3569                                 struct x86_exception *exception)
3570 {
3571         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3572         access |= PFERR_FETCH_MASK;
3573         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3574 }
3575
3576 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3577                                struct x86_exception *exception)
3578 {
3579         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3580         access |= PFERR_WRITE_MASK;
3581         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3582 }
3583
3584 /* uses this to access any guest's mapped memory without checking CPL */
3585 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3586                                 struct x86_exception *exception)
3587 {
3588         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3589 }
3590
3591 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3592                                       struct kvm_vcpu *vcpu, u32 access,
3593                                       struct x86_exception *exception)
3594 {
3595         void *data = val;
3596         int r = X86EMUL_CONTINUE;
3597
3598         while (bytes) {
3599                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3600                                                             exception);
3601                 unsigned offset = addr & (PAGE_SIZE-1);
3602                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3603                 int ret;
3604
3605                 if (gpa == UNMAPPED_GVA)
3606                         return X86EMUL_PROPAGATE_FAULT;
3607                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3608                 if (ret < 0) {
3609                         r = X86EMUL_IO_NEEDED;
3610                         goto out;
3611                 }
3612
3613                 bytes -= toread;
3614                 data += toread;
3615                 addr += toread;
3616         }
3617 out:
3618         return r;
3619 }
3620
3621 /* used for instruction fetching */
3622 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3623                                 gva_t addr, void *val, unsigned int bytes,
3624                                 struct x86_exception *exception)
3625 {
3626         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3627         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3628
3629         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3630                                           access | PFERR_FETCH_MASK,
3631                                           exception);
3632 }
3633
3634 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3635                                gva_t addr, void *val, unsigned int bytes,
3636                                struct x86_exception *exception)
3637 {
3638         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3639         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3640
3641         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3642                                           exception);
3643 }
3644 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3645
3646 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3647                                       gva_t addr, void *val, unsigned int bytes,
3648                                       struct x86_exception *exception)
3649 {
3650         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3651         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3652 }
3653
3654 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3655                                        gva_t addr, void *val,
3656                                        unsigned int bytes,
3657                                        struct x86_exception *exception)
3658 {
3659         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3660         void *data = val;
3661         int r = X86EMUL_CONTINUE;
3662
3663         while (bytes) {
3664                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3665                                                              PFERR_WRITE_MASK,
3666                                                              exception);
3667                 unsigned offset = addr & (PAGE_SIZE-1);
3668                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3669                 int ret;
3670
3671                 if (gpa == UNMAPPED_GVA)
3672                         return X86EMUL_PROPAGATE_FAULT;
3673                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3674                 if (ret < 0) {
3675                         r = X86EMUL_IO_NEEDED;
3676                         goto out;
3677                 }
3678
3679                 bytes -= towrite;
3680                 data += towrite;
3681                 addr += towrite;
3682         }
3683 out:
3684         return r;
3685 }
3686 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3687
3688 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3689                                 gpa_t *gpa, struct x86_exception *exception,
3690                                 bool write)
3691 {
3692         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3693
3694         if (vcpu_match_mmio_gva(vcpu, gva) &&
3695                   check_write_user_access(vcpu, write, access,
3696                   vcpu->arch.access)) {
3697                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3698                                         (gva & (PAGE_SIZE - 1));
3699                 trace_vcpu_match_mmio(gva, *gpa, write, false);
3700                 return 1;
3701         }
3702
3703         if (write)
3704                 access |= PFERR_WRITE_MASK;
3705
3706         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3707
3708         if (*gpa == UNMAPPED_GVA)
3709                 return -1;
3710
3711         /* For APIC access vmexit */
3712         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3713                 return 1;
3714
3715         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3716                 trace_vcpu_match_mmio(gva, *gpa, write, true);
3717                 return 1;
3718         }
3719
3720         return 0;
3721 }
3722
3723 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3724                         const void *val, int bytes)
3725 {
3726         int ret;
3727
3728         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3729         if (ret < 0)
3730                 return 0;
3731         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
3732         return 1;
3733 }
3734
3735 struct read_write_emulator_ops {
3736         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
3737                                   int bytes);
3738         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
3739                                   void *val, int bytes);
3740         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3741                                int bytes, void *val);
3742         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3743                                     void *val, int bytes);
3744         bool write;
3745 };
3746
3747 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
3748 {
3749         if (vcpu->mmio_read_completed) {
3750                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3751                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
3752                 vcpu->mmio_read_completed = 0;
3753                 return 1;
3754         }
3755
3756         return 0;
3757 }
3758
3759 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3760                         void *val, int bytes)
3761 {
3762         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
3763 }
3764
3765 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3766                          void *val, int bytes)
3767 {
3768         return emulator_write_phys(vcpu, gpa, val, bytes);
3769 }
3770
3771 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
3772 {
3773         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3774         return vcpu_mmio_write(vcpu, gpa, bytes, val);
3775 }
3776
3777 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3778                           void *val, int bytes)
3779 {
3780         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3781         return X86EMUL_IO_NEEDED;
3782 }
3783
3784 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3785                            void *val, int bytes)
3786 {
3787         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
3788
3789         memcpy(vcpu->run->mmio.data, frag->data, frag->len);
3790         return X86EMUL_CONTINUE;
3791 }
3792
3793 static struct read_write_emulator_ops read_emultor = {
3794         .read_write_prepare = read_prepare,
3795         .read_write_emulate = read_emulate,
3796         .read_write_mmio = vcpu_mmio_read,
3797         .read_write_exit_mmio = read_exit_mmio,
3798 };
3799
3800 static struct read_write_emulator_ops write_emultor = {
3801         .read_write_emulate = write_emulate,
3802         .read_write_mmio = write_mmio,
3803         .read_write_exit_mmio = write_exit_mmio,
3804         .write = true,
3805 };
3806
3807 static int emulator_read_write_onepage(unsigned long addr, void *val,
3808                                        unsigned int bytes,
3809                                        struct x86_exception *exception,
3810                                        struct kvm_vcpu *vcpu,
3811                                        struct read_write_emulator_ops *ops)
3812 {
3813         gpa_t gpa;
3814         int handled, ret;
3815         bool write = ops->write;
3816         struct kvm_mmio_fragment *frag;
3817
3818         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
3819
3820         if (ret < 0)
3821                 return X86EMUL_PROPAGATE_FAULT;
3822
3823         /* For APIC access vmexit */
3824         if (ret)
3825                 goto mmio;
3826
3827         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
3828                 return X86EMUL_CONTINUE;
3829
3830 mmio:
3831         /*
3832          * Is this MMIO handled locally?
3833          */
3834         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
3835         if (handled == bytes)
3836                 return X86EMUL_CONTINUE;
3837
3838         gpa += handled;
3839         bytes -= handled;
3840         val += handled;
3841
3842         while (bytes) {
3843                 unsigned now = min(bytes, 8U);
3844
3845                 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
3846                 frag->gpa = gpa;
3847                 frag->data = val;
3848                 frag->len = now;
3849
3850                 gpa += now;
3851                 val += now;
3852                 bytes -= now;
3853         }
3854         return X86EMUL_CONTINUE;
3855 }
3856
3857 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
3858                         void *val, unsigned int bytes,
3859                         struct x86_exception *exception,
3860                         struct read_write_emulator_ops *ops)
3861 {
3862         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3863         gpa_t gpa;
3864         int rc;
3865
3866         if (ops->read_write_prepare &&
3867                   ops->read_write_prepare(vcpu, val, bytes))
3868                 return X86EMUL_CONTINUE;
3869
3870         vcpu->mmio_nr_fragments = 0;
3871
3872         /* Crossing a page boundary? */
3873         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3874                 int now;
3875
3876                 now = -addr & ~PAGE_MASK;
3877                 rc = emulator_read_write_onepage(addr, val, now, exception,
3878                                                  vcpu, ops);
3879
3880                 if (rc != X86EMUL_CONTINUE)
3881                         return rc;
3882                 addr += now;
3883                 val += now;
3884                 bytes -= now;
3885         }
3886
3887         rc = emulator_read_write_onepage(addr, val, bytes, exception,
3888                                          vcpu, ops);
3889         if (rc != X86EMUL_CONTINUE)
3890                 return rc;
3891
3892         if (!vcpu->mmio_nr_fragments)
3893                 return rc;
3894
3895         gpa = vcpu->mmio_fragments[0].gpa;
3896
3897         vcpu->mmio_needed = 1;
3898         vcpu->mmio_cur_fragment = 0;
3899
3900         vcpu->run->mmio.len = vcpu->mmio_fragments[0].len;
3901         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
3902         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3903         vcpu->run->mmio.phys_addr = gpa;
3904
3905         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
3906 }
3907
3908 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3909                                   unsigned long addr,
3910                                   void *val,
3911                                   unsigned int bytes,
3912                                   struct x86_exception *exception)
3913 {
3914         return emulator_read_write(ctxt, addr, val, bytes,
3915                                    exception, &read_emultor);
3916 }
3917
3918 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
3919                             unsigned long addr,
3920                             const void *val,
3921                             unsigned int bytes,
3922                             struct x86_exception *exception)
3923 {
3924         return emulator_read_write(ctxt, addr, (void *)val, bytes,
3925                                    exception, &write_emultor);
3926 }
3927
3928 #define CMPXCHG_TYPE(t, ptr, old, new) \
3929         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3930
3931 #ifdef CONFIG_X86_64
3932 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3933 #else
3934 #  define CMPXCHG64(ptr, old, new) \
3935         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3936 #endif
3937
3938 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
3939                                      unsigned long addr,
3940                                      const void *old,
3941                                      const void *new,
3942                                      unsigned int bytes,
3943                                      struct x86_exception *exception)
3944 {
3945         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3946         gpa_t gpa;
3947         struct page *page;
3948         char *kaddr;
3949         bool exchanged;
3950
3951         /* guests cmpxchg8b have to be emulated atomically */
3952         if (bytes > 8 || (bytes & (bytes - 1)))
3953                 goto emul_write;
3954
3955         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3956
3957         if (gpa == UNMAPPED_GVA ||
3958             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3959                 goto emul_write;
3960
3961         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3962                 goto emul_write;
3963
3964         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3965         if (is_error_page(page)) {
3966                 kvm_release_page_clean(page);
3967                 goto emul_write;
3968         }
3969
3970         kaddr = kmap_atomic(page);
3971         kaddr += offset_in_page(gpa);
3972         switch (bytes) {
3973         case 1:
3974                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3975                 break;
3976         case 2:
3977                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3978                 break;
3979         case 4:
3980                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3981                 break;
3982         case 8:
3983                 exchanged = CMPXCHG64(kaddr, old, new);
3984                 break;
3985         default:
3986                 BUG();
3987         }
3988         kunmap_atomic(kaddr);
3989         kvm_release_page_dirty(page);
3990
3991         if (!exchanged)
3992                 return X86EMUL_CMPXCHG_FAILED;
3993
3994         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
3995
3996         return X86EMUL_CONTINUE;
3997
3998 emul_write:
3999         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4000
4001         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4002 }
4003
4004 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4005 {
4006         /* TODO: String I/O for in kernel device */
4007         int r;
4008
4009         if (vcpu->arch.pio.in)
4010                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4011                                     vcpu->arch.pio.size, pd);
4012         else
4013                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4014                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4015                                      pd);
4016         return r;
4017 }
4018
4019 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4020                                unsigned short port, void *val,
4021                                unsigned int count, bool in)
4022 {
4023         trace_kvm_pio(!in, port, size, count);
4024
4025         vcpu->arch.pio.port = port;
4026         vcpu->arch.pio.in = in;
4027         vcpu->arch.pio.count  = count;
4028         vcpu->arch.pio.size = size;
4029
4030         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4031                 vcpu->arch.pio.count = 0;
4032                 return 1;
4033         }
4034
4035         vcpu->run->exit_reason = KVM_EXIT_IO;
4036         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4037         vcpu->run->io.size = size;
4038         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4039         vcpu->run->io.count = count;
4040         vcpu->run->io.port = port;
4041
4042         return 0;
4043 }
4044
4045 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4046                                     int size, unsigned short port, void *val,
4047                                     unsigned int count)
4048 {
4049         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4050         int ret;
4051
4052         if (vcpu->arch.pio.count)
4053                 goto data_avail;
4054
4055         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4056         if (ret) {
4057 data_avail:
4058                 memcpy(val, vcpu->arch.pio_data, size * count);
4059                 vcpu->arch.pio.count = 0;
4060                 return 1;
4061         }
4062
4063         return 0;
4064 }
4065
4066 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4067                                      int size, unsigned short port,
4068                                      const void *val, unsigned int count)
4069 {
4070         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4071
4072         memcpy(vcpu->arch.pio_data, val, size * count);
4073         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4074 }
4075
4076 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4077 {
4078         return kvm_x86_ops->get_segment_base(vcpu, seg);
4079 }
4080
4081 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4082 {
4083         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4084 }
4085
4086 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4087 {
4088         if (!need_emulate_wbinvd(vcpu))
4089                 return X86EMUL_CONTINUE;
4090
4091         if (kvm_x86_ops->has_wbinvd_exit()) {
4092                 int cpu = get_cpu();
4093
4094                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4095                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4096                                 wbinvd_ipi, NULL, 1);
4097                 put_cpu();
4098                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4099         } else
4100                 wbinvd();
4101         return X86EMUL_CONTINUE;
4102 }
4103 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4104
4105 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4106 {
4107         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4108 }
4109
4110 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4111 {
4112         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4113 }
4114
4115 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4116 {
4117
4118         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4119 }
4120
4121 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4122 {
4123         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4124 }
4125
4126 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4127 {
4128         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4129         unsigned long value;
4130
4131         switch (cr) {
4132         case 0:
4133                 value = kvm_read_cr0(vcpu);
4134                 break;
4135         case 2:
4136                 value = vcpu->arch.cr2;
4137                 break;
4138         case 3:
4139                 value = kvm_read_cr3(vcpu);
4140                 break;
4141         case 4:
4142                 value = kvm_read_cr4(vcpu);
4143                 break;
4144         case 8:
4145                 value = kvm_get_cr8(vcpu);
4146                 break;
4147         default:
4148                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4149                 return 0;
4150         }
4151
4152         return value;
4153 }
4154
4155 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4156 {
4157         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4158         int res = 0;
4159
4160         switch (cr) {
4161         case 0:
4162                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4163                 break;
4164         case 2:
4165                 vcpu->arch.cr2 = val;
4166                 break;
4167         case 3:
4168                 res = kvm_set_cr3(vcpu, val);
4169                 break;
4170         case 4:
4171                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4172                 break;
4173         case 8:
4174                 res = kvm_set_cr8(vcpu, val);
4175                 break;
4176         default:
4177                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4178                 res = -1;
4179         }
4180
4181         return res;
4182 }
4183
4184 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4185 {
4186         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4187 }
4188
4189 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4190 {
4191         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4192 }
4193
4194 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4195 {
4196         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4197 }
4198
4199 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4200 {
4201         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4202 }
4203
4204 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4205 {
4206         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4207 }
4208
4209 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4210 {
4211         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4212 }
4213
4214 static unsigned long emulator_get_cached_segment_base(
4215         struct x86_emulate_ctxt *ctxt, int seg)
4216 {
4217         return get_segment_base(emul_to_vcpu(ctxt), seg);
4218 }
4219
4220 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4221                                  struct desc_struct *desc, u32 *base3,
4222                                  int seg)
4223 {
4224         struct kvm_segment var;
4225
4226         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4227         *selector = var.selector;
4228
4229         if (var.unusable)
4230                 return false;
4231
4232         if (var.g)
4233                 var.limit >>= 12;
4234         set_desc_limit(desc, var.limit);
4235         set_desc_base(desc, (unsigned long)var.base);
4236 #ifdef CONFIG_X86_64
4237         if (base3)
4238                 *base3 = var.base >> 32;
4239 #endif
4240         desc->type = var.type;
4241         desc->s = var.s;
4242         desc->dpl = var.dpl;
4243         desc->p = var.present;
4244         desc->avl = var.avl;
4245         desc->l = var.l;
4246         desc->d = var.db;
4247         desc->g = var.g;
4248
4249         return true;
4250 }
4251
4252 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4253                                  struct desc_struct *desc, u32 base3,
4254                                  int seg)
4255 {
4256         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4257         struct kvm_segment var;
4258
4259         var.selector = selector;
4260         var.base = get_desc_base(desc);
4261 #ifdef CONFIG_X86_64
4262         var.base |= ((u64)base3) << 32;
4263 #endif
4264         var.limit = get_desc_limit(desc);
4265         if (desc->g)
4266                 var.limit = (var.limit << 12) | 0xfff;
4267         var.type = desc->type;
4268         var.present = desc->p;
4269         var.dpl = desc->dpl;
4270         var.db = desc->d;
4271         var.s = desc->s;
4272         var.l = desc->l;
4273         var.g = desc->g;
4274         var.avl = desc->avl;
4275         var.present = desc->p;
4276         var.unusable = !var.present;
4277         var.padding = 0;
4278
4279         kvm_set_segment(vcpu, &var, seg);
4280         return;
4281 }
4282
4283 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4284                             u32 msr_index, u64 *pdata)
4285 {
4286         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4287 }
4288
4289 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4290                             u32 msr_index, u64 data)
4291 {
4292         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4293 }
4294
4295 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4296                              u32 pmc, u64 *pdata)
4297 {
4298         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4299 }
4300
4301 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4302 {
4303         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4304 }
4305
4306 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4307 {
4308         preempt_disable();
4309         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4310         /*
4311          * CR0.TS may reference the host fpu state, not the guest fpu state,
4312          * so it may be clear at this point.
4313          */
4314         clts();
4315 }
4316
4317 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4318 {
4319         preempt_enable();
4320 }
4321
4322 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4323                               struct x86_instruction_info *info,
4324                               enum x86_intercept_stage stage)
4325 {
4326         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4327 }
4328
4329 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4330                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4331 {
4332         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4333 }
4334
4335 static struct x86_emulate_ops emulate_ops = {
4336         .read_std            = kvm_read_guest_virt_system,
4337         .write_std           = kvm_write_guest_virt_system,
4338         .fetch               = kvm_fetch_guest_virt,
4339         .read_emulated       = emulator_read_emulated,
4340         .write_emulated      = emulator_write_emulated,
4341         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4342         .invlpg              = emulator_invlpg,
4343         .pio_in_emulated     = emulator_pio_in_emulated,
4344         .pio_out_emulated    = emulator_pio_out_emulated,
4345         .get_segment         = emulator_get_segment,
4346         .set_segment         = emulator_set_segment,
4347         .get_cached_segment_base = emulator_get_cached_segment_base,
4348         .get_gdt             = emulator_get_gdt,
4349         .get_idt             = emulator_get_idt,
4350         .set_gdt             = emulator_set_gdt,
4351         .set_idt             = emulator_set_idt,
4352         .get_cr              = emulator_get_cr,
4353         .set_cr              = emulator_set_cr,
4354         .set_rflags          = emulator_set_rflags,
4355         .cpl                 = emulator_get_cpl,
4356         .get_dr              = emulator_get_dr,
4357         .set_dr              = emulator_set_dr,
4358         .set_msr             = emulator_set_msr,
4359         .get_msr             = emulator_get_msr,
4360         .read_pmc            = emulator_read_pmc,
4361         .halt                = emulator_halt,
4362         .wbinvd              = emulator_wbinvd,
4363         .fix_hypercall       = emulator_fix_hypercall,
4364         .get_fpu             = emulator_get_fpu,
4365         .put_fpu             = emulator_put_fpu,
4366         .intercept           = emulator_intercept,
4367         .get_cpuid           = emulator_get_cpuid,
4368 };
4369
4370 static void cache_all_regs(struct kvm_vcpu *vcpu)
4371 {
4372         kvm_register_read(vcpu, VCPU_REGS_RAX);
4373         kvm_register_read(vcpu, VCPU_REGS_RSP);
4374         kvm_register_read(vcpu, VCPU_REGS_RIP);
4375         vcpu->arch.regs_dirty = ~0;
4376 }
4377
4378 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4379 {
4380         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4381         /*
4382          * an sti; sti; sequence only disable interrupts for the first
4383          * instruction. So, if the last instruction, be it emulated or
4384          * not, left the system with the INT_STI flag enabled, it
4385          * means that the last instruction is an sti. We should not
4386          * leave the flag on in this case. The same goes for mov ss
4387          */
4388         if (!(int_shadow & mask))
4389                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4390 }
4391
4392 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4393 {
4394         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4395         if (ctxt->exception.vector == PF_VECTOR)
4396                 kvm_propagate_fault(vcpu, &ctxt->exception);
4397         else if (ctxt->exception.error_code_valid)
4398                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4399                                       ctxt->exception.error_code);
4400         else
4401                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4402 }
4403
4404 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4405                               const unsigned long *regs)
4406 {
4407         memset(&ctxt->twobyte, 0,
4408                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4409         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4410
4411         ctxt->fetch.start = 0;
4412         ctxt->fetch.end = 0;
4413         ctxt->io_read.pos = 0;
4414         ctxt->io_read.end = 0;
4415         ctxt->mem_read.pos = 0;
4416         ctxt->mem_read.end = 0;
4417 }
4418
4419 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4420 {
4421         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4422         int cs_db, cs_l;
4423
4424         /*
4425          * TODO: fix emulate.c to use guest_read/write_register
4426          * instead of direct ->regs accesses, can save hundred cycles
4427          * on Intel for instructions that don't read/change RSP, for
4428          * for example.
4429          */
4430         cache_all_regs(vcpu);
4431
4432         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4433
4434         ctxt->eflags = kvm_get_rflags(vcpu);
4435         ctxt->eip = kvm_rip_read(vcpu);
4436         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4437                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4438                      cs_l                               ? X86EMUL_MODE_PROT64 :
4439                      cs_db                              ? X86EMUL_MODE_PROT32 :
4440                                                           X86EMUL_MODE_PROT16;
4441         ctxt->guest_mode = is_guest_mode(vcpu);
4442
4443         init_decode_cache(ctxt, vcpu->arch.regs);
4444         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4445 }
4446
4447 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4448 {
4449         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4450         int ret;
4451
4452         init_emulate_ctxt(vcpu);
4453
4454         ctxt->op_bytes = 2;
4455         ctxt->ad_bytes = 2;
4456         ctxt->_eip = ctxt->eip + inc_eip;
4457         ret = emulate_int_real(ctxt, irq);
4458
4459         if (ret != X86EMUL_CONTINUE)
4460                 return EMULATE_FAIL;
4461
4462         ctxt->eip = ctxt->_eip;
4463         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4464         kvm_rip_write(vcpu, ctxt->eip);
4465         kvm_set_rflags(vcpu, ctxt->eflags);
4466
4467         if (irq == NMI_VECTOR)
4468                 vcpu->arch.nmi_pending = 0;
4469         else
4470                 vcpu->arch.interrupt.pending = false;
4471
4472         return EMULATE_DONE;
4473 }
4474 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4475
4476 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4477 {
4478         int r = EMULATE_DONE;
4479
4480         ++vcpu->stat.insn_emulation_fail;
4481         trace_kvm_emulate_insn_failed(vcpu);
4482         if (!is_guest_mode(vcpu)) {
4483                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4484                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4485                 vcpu->run->internal.ndata = 0;
4486                 r = EMULATE_FAIL;
4487         }
4488         kvm_queue_exception(vcpu, UD_VECTOR);
4489
4490         return r;
4491 }
4492
4493 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4494 {
4495         gpa_t gpa;
4496
4497         if (tdp_enabled)
4498                 return false;
4499
4500         /*
4501          * if emulation was due to access to shadowed page table
4502          * and it failed try to unshadow page and re-entetr the
4503          * guest to let CPU execute the instruction.
4504          */
4505         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4506                 return true;
4507
4508         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4509
4510         if (gpa == UNMAPPED_GVA)
4511                 return true; /* let cpu generate fault */
4512
4513         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4514                 return true;
4515
4516         return false;
4517 }
4518
4519 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4520                               unsigned long cr2,  int emulation_type)
4521 {
4522         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4523         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4524
4525         last_retry_eip = vcpu->arch.last_retry_eip;
4526         last_retry_addr = vcpu->arch.last_retry_addr;
4527
4528         /*
4529          * If the emulation is caused by #PF and it is non-page_table
4530          * writing instruction, it means the VM-EXIT is caused by shadow
4531          * page protected, we can zap the shadow page and retry this
4532          * instruction directly.
4533          *
4534          * Note: if the guest uses a non-page-table modifying instruction
4535          * on the PDE that points to the instruction, then we will unmap
4536          * the instruction and go to an infinite loop. So, we cache the
4537          * last retried eip and the last fault address, if we meet the eip
4538          * and the address again, we can break out of the potential infinite
4539          * loop.
4540          */
4541         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4542
4543         if (!(emulation_type & EMULTYPE_RETRY))
4544                 return false;
4545
4546         if (x86_page_table_writing_insn(ctxt))
4547                 return false;
4548
4549         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4550                 return false;
4551
4552         vcpu->arch.last_retry_eip = ctxt->eip;
4553         vcpu->arch.last_retry_addr = cr2;
4554
4555         if (!vcpu->arch.mmu.direct_map)
4556                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4557
4558         kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4559
4560         return true;
4561 }
4562
4563 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4564                             unsigned long cr2,
4565                             int emulation_type,
4566                             void *insn,
4567                             int insn_len)
4568 {
4569         int r;
4570         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4571         bool writeback = true;
4572
4573         kvm_clear_exception_queue(vcpu);
4574
4575         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4576                 init_emulate_ctxt(vcpu);
4577                 ctxt->interruptibility = 0;
4578                 ctxt->have_exception = false;
4579                 ctxt->perm_ok = false;
4580
4581                 ctxt->only_vendor_specific_insn
4582                         = emulation_type & EMULTYPE_TRAP_UD;
4583
4584                 r = x86_decode_insn(ctxt, insn, insn_len);
4585
4586                 trace_kvm_emulate_insn_start(vcpu);
4587                 ++vcpu->stat.insn_emulation;
4588                 if (r != EMULATION_OK)  {
4589                         if (emulation_type & EMULTYPE_TRAP_UD)
4590                                 return EMULATE_FAIL;
4591                         if (reexecute_instruction(vcpu, cr2))
4592                                 return EMULATE_DONE;
4593                         if (emulation_type & EMULTYPE_SKIP)
4594                                 return EMULATE_FAIL;
4595                         return handle_emulation_failure(vcpu);
4596                 }
4597         }
4598
4599         if (emulation_type & EMULTYPE_SKIP) {
4600                 kvm_rip_write(vcpu, ctxt->_eip);
4601                 return EMULATE_DONE;
4602         }
4603
4604         if (retry_instruction(ctxt, cr2, emulation_type))
4605                 return EMULATE_DONE;
4606
4607         /* this is needed for vmware backdoor interface to work since it
4608            changes registers values  during IO operation */
4609         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4610                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4611                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4612         }
4613
4614 restart:
4615         r = x86_emulate_insn(ctxt);
4616
4617         if (r == EMULATION_INTERCEPTED)
4618                 return EMULATE_DONE;
4619
4620         if (r == EMULATION_FAILED) {
4621                 if (reexecute_instruction(vcpu, cr2))
4622                         return EMULATE_DONE;
4623
4624                 return handle_emulation_failure(vcpu);
4625         }
4626
4627         if (ctxt->have_exception) {
4628                 inject_emulated_exception(vcpu);
4629                 r = EMULATE_DONE;
4630         } else if (vcpu->arch.pio.count) {
4631                 if (!vcpu->arch.pio.in)
4632                         vcpu->arch.pio.count = 0;
4633                 else
4634                         writeback = false;
4635                 r = EMULATE_DO_MMIO;
4636         } else if (vcpu->mmio_needed) {
4637                 if (!vcpu->mmio_is_write)
4638                         writeback = false;
4639                 r = EMULATE_DO_MMIO;
4640         } else if (r == EMULATION_RESTART)
4641                 goto restart;
4642         else
4643                 r = EMULATE_DONE;
4644
4645         if (writeback) {
4646                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4647                 kvm_set_rflags(vcpu, ctxt->eflags);
4648                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4649                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4650                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4651                 kvm_rip_write(vcpu, ctxt->eip);
4652         } else
4653                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4654
4655         return r;
4656 }
4657 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4658
4659 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4660 {
4661         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4662         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4663                                             size, port, &val, 1);
4664         /* do not return to emulator after return from userspace */
4665         vcpu->arch.pio.count = 0;
4666         return ret;
4667 }
4668 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4669
4670 static void tsc_bad(void *info)
4671 {
4672         __this_cpu_write(cpu_tsc_khz, 0);
4673 }
4674
4675 static void tsc_khz_changed(void *data)
4676 {
4677         struct cpufreq_freqs *freq = data;
4678         unsigned long khz = 0;
4679
4680         if (data)
4681                 khz = freq->new;
4682         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4683                 khz = cpufreq_quick_get(raw_smp_processor_id());
4684         if (!khz)
4685                 khz = tsc_khz;
4686         __this_cpu_write(cpu_tsc_khz, khz);
4687 }
4688
4689 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4690                                      void *data)
4691 {
4692         struct cpufreq_freqs *freq = data;
4693         struct kvm *kvm;
4694         struct kvm_vcpu *vcpu;
4695         int i, send_ipi = 0;
4696
4697         /*
4698          * We allow guests to temporarily run on slowing clocks,
4699          * provided we notify them after, or to run on accelerating
4700          * clocks, provided we notify them before.  Thus time never
4701          * goes backwards.
4702          *
4703          * However, we have a problem.  We can't atomically update
4704          * the frequency of a given CPU from this function; it is
4705          * merely a notifier, which can be called from any CPU.
4706          * Changing the TSC frequency at arbitrary points in time
4707          * requires a recomputation of local variables related to
4708          * the TSC for each VCPU.  We must flag these local variables
4709          * to be updated and be sure the update takes place with the
4710          * new frequency before any guests proceed.
4711          *
4712          * Unfortunately, the combination of hotplug CPU and frequency
4713          * change creates an intractable locking scenario; the order
4714          * of when these callouts happen is undefined with respect to
4715          * CPU hotplug, and they can race with each other.  As such,
4716          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4717          * undefined; you can actually have a CPU frequency change take
4718          * place in between the computation of X and the setting of the
4719          * variable.  To protect against this problem, all updates of
4720          * the per_cpu tsc_khz variable are done in an interrupt
4721          * protected IPI, and all callers wishing to update the value
4722          * must wait for a synchronous IPI to complete (which is trivial
4723          * if the caller is on the CPU already).  This establishes the
4724          * necessary total order on variable updates.
4725          *
4726          * Note that because a guest time update may take place
4727          * anytime after the setting of the VCPU's request bit, the
4728          * correct TSC value must be set before the request.  However,
4729          * to ensure the update actually makes it to any guest which
4730          * starts running in hardware virtualization between the set
4731          * and the acquisition of the spinlock, we must also ping the
4732          * CPU after setting the request bit.
4733          *
4734          */
4735
4736         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4737                 return 0;
4738         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4739                 return 0;
4740
4741         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4742
4743         raw_spin_lock(&kvm_lock);
4744         list_for_each_entry(kvm, &vm_list, vm_list) {
4745                 kvm_for_each_vcpu(i, vcpu, kvm) {
4746                         if (vcpu->cpu != freq->cpu)
4747                                 continue;
4748                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4749                         if (vcpu->cpu != smp_processor_id())
4750                                 send_ipi = 1;
4751                 }
4752         }
4753         raw_spin_unlock(&kvm_lock);
4754
4755         if (freq->old < freq->new && send_ipi) {
4756                 /*
4757                  * We upscale the frequency.  Must make the guest
4758                  * doesn't see old kvmclock values while running with
4759                  * the new frequency, otherwise we risk the guest sees
4760                  * time go backwards.
4761                  *
4762                  * In case we update the frequency for another cpu
4763                  * (which might be in guest context) send an interrupt
4764                  * to kick the cpu out of guest context.  Next time
4765                  * guest context is entered kvmclock will be updated,
4766                  * so the guest will not see stale values.
4767                  */
4768                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4769         }
4770         return 0;
4771 }
4772
4773 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4774         .notifier_call  = kvmclock_cpufreq_notifier
4775 };
4776
4777 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4778                                         unsigned long action, void *hcpu)
4779 {
4780         unsigned int cpu = (unsigned long)hcpu;
4781
4782         switch (action) {
4783                 case CPU_ONLINE:
4784                 case CPU_DOWN_FAILED:
4785                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4786                         break;
4787                 case CPU_DOWN_PREPARE:
4788                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4789                         break;
4790         }
4791         return NOTIFY_OK;
4792 }
4793
4794 static struct notifier_block kvmclock_cpu_notifier_block = {
4795         .notifier_call  = kvmclock_cpu_notifier,
4796         .priority = -INT_MAX
4797 };
4798
4799 static void kvm_timer_init(void)
4800 {
4801         int cpu;
4802
4803         max_tsc_khz = tsc_khz;
4804         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4805         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4806 #ifdef CONFIG_CPU_FREQ
4807                 struct cpufreq_policy policy;
4808                 memset(&policy, 0, sizeof(policy));
4809                 cpu = get_cpu();
4810                 cpufreq_get_policy(&policy, cpu);
4811                 if (policy.cpuinfo.max_freq)
4812                         max_tsc_khz = policy.cpuinfo.max_freq;
4813                 put_cpu();
4814 #endif
4815                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4816                                           CPUFREQ_TRANSITION_NOTIFIER);
4817         }
4818         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4819         for_each_online_cpu(cpu)
4820                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4821 }
4822
4823 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4824
4825 int kvm_is_in_guest(void)
4826 {
4827         return __this_cpu_read(current_vcpu) != NULL;
4828 }
4829
4830 static int kvm_is_user_mode(void)
4831 {
4832         int user_mode = 3;
4833
4834         if (__this_cpu_read(current_vcpu))
4835                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
4836
4837         return user_mode != 0;
4838 }
4839
4840 static unsigned long kvm_get_guest_ip(void)
4841 {
4842         unsigned long ip = 0;
4843
4844         if (__this_cpu_read(current_vcpu))
4845                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
4846
4847         return ip;
4848 }
4849
4850 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4851         .is_in_guest            = kvm_is_in_guest,
4852         .is_user_mode           = kvm_is_user_mode,
4853         .get_guest_ip           = kvm_get_guest_ip,
4854 };
4855
4856 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4857 {
4858         __this_cpu_write(current_vcpu, vcpu);
4859 }
4860 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4861
4862 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4863 {
4864         __this_cpu_write(current_vcpu, NULL);
4865 }
4866 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4867
4868 static void kvm_set_mmio_spte_mask(void)
4869 {
4870         u64 mask;
4871         int maxphyaddr = boot_cpu_data.x86_phys_bits;
4872
4873         /*
4874          * Set the reserved bits and the present bit of an paging-structure
4875          * entry to generate page fault with PFER.RSV = 1.
4876          */
4877         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
4878         mask |= 1ull;
4879
4880 #ifdef CONFIG_X86_64
4881         /*
4882          * If reserved bit is not supported, clear the present bit to disable
4883          * mmio page fault.
4884          */
4885         if (maxphyaddr == 52)
4886                 mask &= ~1ull;
4887 #endif
4888
4889         kvm_mmu_set_mmio_spte_mask(mask);
4890 }
4891
4892 int kvm_arch_init(void *opaque)
4893 {
4894         int r;
4895         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4896
4897         if (kvm_x86_ops) {
4898                 printk(KERN_ERR "kvm: already loaded the other module\n");
4899                 r = -EEXIST;
4900                 goto out;
4901         }
4902
4903         if (!ops->cpu_has_kvm_support()) {
4904                 printk(KERN_ERR "kvm: no hardware support\n");
4905                 r = -EOPNOTSUPP;
4906                 goto out;
4907         }
4908         if (ops->disabled_by_bios()) {
4909                 printk(KERN_ERR "kvm: disabled by bios\n");
4910                 r = -EOPNOTSUPP;
4911                 goto out;
4912         }
4913
4914         r = kvm_mmu_module_init();
4915         if (r)
4916                 goto out;
4917
4918         kvm_set_mmio_spte_mask();
4919         kvm_init_msr_list();
4920
4921         kvm_x86_ops = ops;
4922         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4923                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4924
4925         kvm_timer_init();
4926
4927         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4928
4929         if (cpu_has_xsave)
4930                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4931
4932         return 0;
4933
4934 out:
4935         return r;
4936 }
4937
4938 void kvm_arch_exit(void)
4939 {
4940         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4941
4942         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4943                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4944                                             CPUFREQ_TRANSITION_NOTIFIER);
4945         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4946         kvm_x86_ops = NULL;
4947         kvm_mmu_module_exit();
4948 }
4949
4950 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4951 {
4952         ++vcpu->stat.halt_exits;
4953         if (irqchip_in_kernel(vcpu->kvm)) {
4954                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4955                 return 1;
4956         } else {
4957                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4958                 return 0;
4959         }
4960 }
4961 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4962
4963 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4964 {
4965         u64 param, ingpa, outgpa, ret;
4966         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4967         bool fast, longmode;
4968         int cs_db, cs_l;
4969
4970         /*
4971          * hypercall generates UD from non zero cpl and real mode
4972          * per HYPER-V spec
4973          */
4974         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4975                 kvm_queue_exception(vcpu, UD_VECTOR);
4976                 return 0;
4977         }
4978
4979         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4980         longmode = is_long_mode(vcpu) && cs_l == 1;
4981
4982         if (!longmode) {
4983                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4984                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4985                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4986                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4987                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4988                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4989         }
4990 #ifdef CONFIG_X86_64
4991         else {
4992                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4993                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4994                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4995         }
4996 #endif
4997
4998         code = param & 0xffff;
4999         fast = (param >> 16) & 0x1;
5000         rep_cnt = (param >> 32) & 0xfff;
5001         rep_idx = (param >> 48) & 0xfff;
5002
5003         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5004
5005         switch (code) {
5006         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5007                 kvm_vcpu_on_spin(vcpu);
5008                 break;
5009         default:
5010                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5011                 break;
5012         }
5013
5014         ret = res | (((u64)rep_done & 0xfff) << 32);
5015         if (longmode) {
5016                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5017         } else {
5018                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5019                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5020         }
5021
5022         return 1;
5023 }
5024
5025 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5026 {
5027         unsigned long nr, a0, a1, a2, a3, ret;
5028         int r = 1;
5029
5030         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5031                 return kvm_hv_hypercall(vcpu);
5032
5033         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5034         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5035         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5036         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5037         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5038
5039         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5040
5041         if (!is_long_mode(vcpu)) {
5042                 nr &= 0xFFFFFFFF;
5043                 a0 &= 0xFFFFFFFF;
5044                 a1 &= 0xFFFFFFFF;
5045                 a2 &= 0xFFFFFFFF;
5046                 a3 &= 0xFFFFFFFF;
5047         }
5048
5049         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5050                 ret = -KVM_EPERM;
5051                 goto out;
5052         }
5053
5054         switch (nr) {
5055         case KVM_HC_VAPIC_POLL_IRQ:
5056                 ret = 0;
5057                 break;
5058         default:
5059                 ret = -KVM_ENOSYS;
5060                 break;
5061         }
5062 out:
5063         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5064         ++vcpu->stat.hypercalls;
5065         return r;
5066 }
5067 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5068
5069 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5070 {
5071         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5072         char instruction[3];
5073         unsigned long rip = kvm_rip_read(vcpu);
5074
5075         /*
5076          * Blow out the MMU to ensure that no other VCPU has an active mapping
5077          * to ensure that the updated hypercall appears atomically across all
5078          * VCPUs.
5079          */
5080         kvm_mmu_zap_all(vcpu->kvm);
5081
5082         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5083
5084         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5085 }
5086
5087 /*
5088  * Check if userspace requested an interrupt window, and that the
5089  * interrupt window is open.
5090  *
5091  * No need to exit to userspace if we already have an interrupt queued.
5092  */
5093 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5094 {
5095         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5096                 vcpu->run->request_interrupt_window &&
5097                 kvm_arch_interrupt_allowed(vcpu));
5098 }
5099
5100 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5101 {
5102         struct kvm_run *kvm_run = vcpu->run;
5103
5104         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5105         kvm_run->cr8 = kvm_get_cr8(vcpu);
5106         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5107         if (irqchip_in_kernel(vcpu->kvm))
5108                 kvm_run->ready_for_interrupt_injection = 1;
5109         else
5110                 kvm_run->ready_for_interrupt_injection =
5111                         kvm_arch_interrupt_allowed(vcpu) &&
5112                         !kvm_cpu_has_interrupt(vcpu) &&
5113                         !kvm_event_needs_reinjection(vcpu);
5114 }
5115
5116 static void vapic_enter(struct kvm_vcpu *vcpu)
5117 {
5118         struct kvm_lapic *apic = vcpu->arch.apic;
5119         struct page *page;
5120
5121         if (!apic || !apic->vapic_addr)
5122                 return;
5123
5124         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5125
5126         vcpu->arch.apic->vapic_page = page;
5127 }
5128
5129 static void vapic_exit(struct kvm_vcpu *vcpu)
5130 {
5131         struct kvm_lapic *apic = vcpu->arch.apic;
5132         int idx;
5133
5134         if (!apic || !apic->vapic_addr)
5135                 return;
5136
5137         idx = srcu_read_lock(&vcpu->kvm->srcu);
5138         kvm_release_page_dirty(apic->vapic_page);
5139         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5140         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5141 }
5142
5143 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5144 {
5145         int max_irr, tpr;
5146
5147         if (!kvm_x86_ops->update_cr8_intercept)
5148                 return;
5149
5150         if (!vcpu->arch.apic)
5151                 return;
5152
5153         if (!vcpu->arch.apic->vapic_addr)
5154                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5155         else
5156                 max_irr = -1;
5157
5158         if (max_irr != -1)
5159                 max_irr >>= 4;
5160
5161         tpr = kvm_lapic_get_cr8(vcpu);
5162
5163         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5164 }
5165
5166 static void inject_pending_event(struct kvm_vcpu *vcpu)
5167 {
5168         /* try to reinject previous events if any */
5169         if (vcpu->arch.exception.pending) {
5170                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5171                                         vcpu->arch.exception.has_error_code,
5172                                         vcpu->arch.exception.error_code);
5173                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5174                                           vcpu->arch.exception.has_error_code,
5175                                           vcpu->arch.exception.error_code,
5176                                           vcpu->arch.exception.reinject);
5177                 return;
5178         }
5179
5180         if (vcpu->arch.nmi_injected) {
5181                 kvm_x86_ops->set_nmi(vcpu);
5182                 return;
5183         }
5184
5185         if (vcpu->arch.interrupt.pending) {
5186                 kvm_x86_ops->set_irq(vcpu);
5187                 return;
5188         }
5189
5190         /* try to inject new event if pending */
5191         if (vcpu->arch.nmi_pending) {
5192                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5193                         --vcpu->arch.nmi_pending;
5194                         vcpu->arch.nmi_injected = true;
5195                         kvm_x86_ops->set_nmi(vcpu);
5196                 }
5197         } else if (kvm_cpu_has_interrupt(vcpu)) {
5198                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5199                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5200                                             false);
5201                         kvm_x86_ops->set_irq(vcpu);
5202                 }
5203         }
5204 }
5205
5206 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5207 {
5208         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5209                         !vcpu->guest_xcr0_loaded) {
5210                 /* kvm_set_xcr() also depends on this */
5211                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5212                 vcpu->guest_xcr0_loaded = 1;
5213         }
5214 }
5215
5216 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5217 {
5218         if (vcpu->guest_xcr0_loaded) {
5219                 if (vcpu->arch.xcr0 != host_xcr0)
5220                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5221                 vcpu->guest_xcr0_loaded = 0;
5222         }
5223 }
5224
5225 static void process_nmi(struct kvm_vcpu *vcpu)
5226 {
5227         unsigned limit = 2;
5228
5229         /*
5230          * x86 is limited to one NMI running, and one NMI pending after it.
5231          * If an NMI is already in progress, limit further NMIs to just one.
5232          * Otherwise, allow two (and we'll inject the first one immediately).
5233          */
5234         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5235                 limit = 1;
5236
5237         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5238         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5239         kvm_make_request(KVM_REQ_EVENT, vcpu);
5240 }
5241
5242 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5243 {
5244         int r;
5245         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5246                 vcpu->run->request_interrupt_window;
5247         bool req_immediate_exit = 0;
5248
5249         if (vcpu->requests) {
5250                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5251                         kvm_mmu_unload(vcpu);
5252                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5253                         __kvm_migrate_timers(vcpu);
5254                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5255                         r = kvm_guest_time_update(vcpu);
5256                         if (unlikely(r))
5257                                 goto out;
5258                 }
5259                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5260                         kvm_mmu_sync_roots(vcpu);
5261                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5262                         kvm_x86_ops->tlb_flush(vcpu);
5263                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5264                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5265                         r = 0;
5266                         goto out;
5267                 }
5268                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5269                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5270                         r = 0;
5271                         goto out;
5272                 }
5273                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5274                         vcpu->fpu_active = 0;
5275                         kvm_x86_ops->fpu_deactivate(vcpu);
5276                 }
5277                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5278                         /* Page is swapped out. Do synthetic halt */
5279                         vcpu->arch.apf.halted = true;
5280                         r = 1;
5281                         goto out;
5282                 }
5283                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5284                         record_steal_time(vcpu);
5285                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5286                         process_nmi(vcpu);
5287                 req_immediate_exit =
5288                         kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5289                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5290                         kvm_handle_pmu_event(vcpu);
5291                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5292                         kvm_deliver_pmi(vcpu);
5293         }
5294
5295         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5296                 inject_pending_event(vcpu);
5297
5298                 /* enable NMI/IRQ window open exits if needed */
5299                 if (vcpu->arch.nmi_pending)
5300                         kvm_x86_ops->enable_nmi_window(vcpu);
5301                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5302                         kvm_x86_ops->enable_irq_window(vcpu);
5303
5304                 if (kvm_lapic_enabled(vcpu)) {
5305                         update_cr8_intercept(vcpu);
5306                         kvm_lapic_sync_to_vapic(vcpu);
5307                 }
5308         }
5309
5310         r = kvm_mmu_reload(vcpu);
5311         if (unlikely(r)) {
5312                 goto cancel_injection;
5313         }
5314
5315         preempt_disable();
5316
5317         kvm_x86_ops->prepare_guest_switch(vcpu);
5318         if (vcpu->fpu_active)
5319                 kvm_load_guest_fpu(vcpu);
5320         kvm_load_guest_xcr0(vcpu);
5321
5322         vcpu->mode = IN_GUEST_MODE;
5323
5324         /* We should set ->mode before check ->requests,
5325          * see the comment in make_all_cpus_request.
5326          */
5327         smp_mb();
5328
5329         local_irq_disable();
5330
5331         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5332             || need_resched() || signal_pending(current)) {
5333                 vcpu->mode = OUTSIDE_GUEST_MODE;
5334                 smp_wmb();
5335                 local_irq_enable();
5336                 preempt_enable();
5337                 r = 1;
5338                 goto cancel_injection;
5339         }
5340
5341         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5342
5343         if (req_immediate_exit)
5344                 smp_send_reschedule(vcpu->cpu);
5345
5346         kvm_guest_enter();
5347
5348         if (unlikely(vcpu->arch.switch_db_regs)) {
5349                 set_debugreg(0, 7);
5350                 set_debugreg(vcpu->arch.eff_db[0], 0);
5351                 set_debugreg(vcpu->arch.eff_db[1], 1);
5352                 set_debugreg(vcpu->arch.eff_db[2], 2);
5353                 set_debugreg(vcpu->arch.eff_db[3], 3);
5354         }
5355
5356         trace_kvm_entry(vcpu->vcpu_id);
5357         kvm_x86_ops->run(vcpu);
5358
5359         /*
5360          * If the guest has used debug registers, at least dr7
5361          * will be disabled while returning to the host.
5362          * If we don't have active breakpoints in the host, we don't
5363          * care about the messed up debug address registers. But if
5364          * we have some of them active, restore the old state.
5365          */
5366         if (hw_breakpoint_active())
5367                 hw_breakpoint_restore();
5368
5369         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5370
5371         vcpu->mode = OUTSIDE_GUEST_MODE;
5372         smp_wmb();
5373         local_irq_enable();
5374
5375         ++vcpu->stat.exits;
5376
5377         /*
5378          * We must have an instruction between local_irq_enable() and
5379          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5380          * the interrupt shadow.  The stat.exits increment will do nicely.
5381          * But we need to prevent reordering, hence this barrier():
5382          */
5383         barrier();
5384
5385         kvm_guest_exit();
5386
5387         preempt_enable();
5388
5389         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5390
5391         /*
5392          * Profile KVM exit RIPs:
5393          */
5394         if (unlikely(prof_on == KVM_PROFILING)) {
5395                 unsigned long rip = kvm_rip_read(vcpu);
5396                 profile_hit(KVM_PROFILING, (void *)rip);
5397         }
5398
5399         if (unlikely(vcpu->arch.tsc_always_catchup))
5400                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5401
5402         if (vcpu->arch.apic_attention)
5403                 kvm_lapic_sync_from_vapic(vcpu);
5404
5405         r = kvm_x86_ops->handle_exit(vcpu);
5406         return r;
5407
5408 cancel_injection:
5409         kvm_x86_ops->cancel_injection(vcpu);
5410         if (unlikely(vcpu->arch.apic_attention))
5411                 kvm_lapic_sync_from_vapic(vcpu);
5412 out:
5413         return r;
5414 }
5415
5416
5417 static int __vcpu_run(struct kvm_vcpu *vcpu)
5418 {
5419         int r;
5420         struct kvm *kvm = vcpu->kvm;
5421
5422         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5423                 pr_debug("vcpu %d received sipi with vector # %x\n",
5424                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5425                 kvm_lapic_reset(vcpu);
5426                 r = kvm_arch_vcpu_reset(vcpu);
5427                 if (r)
5428                         return r;
5429                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5430         }
5431
5432         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5433         vapic_enter(vcpu);
5434
5435         r = 1;
5436         while (r > 0) {
5437                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5438                     !vcpu->arch.apf.halted)
5439                         r = vcpu_enter_guest(vcpu);
5440                 else {
5441                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5442                         kvm_vcpu_block(vcpu);
5443                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5444                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5445                         {
5446                                 switch(vcpu->arch.mp_state) {
5447                                 case KVM_MP_STATE_HALTED:
5448                                         vcpu->arch.mp_state =
5449                                                 KVM_MP_STATE_RUNNABLE;
5450                                 case KVM_MP_STATE_RUNNABLE:
5451                                         vcpu->arch.apf.halted = false;
5452                                         break;
5453                                 case KVM_MP_STATE_SIPI_RECEIVED:
5454                                 default:
5455                                         r = -EINTR;
5456                                         break;
5457                                 }
5458                         }
5459                 }
5460
5461                 if (r <= 0)
5462                         break;
5463
5464                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5465                 if (kvm_cpu_has_pending_timer(vcpu))
5466                         kvm_inject_pending_timer_irqs(vcpu);
5467
5468                 if (dm_request_for_irq_injection(vcpu)) {
5469                         r = -EINTR;
5470                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5471                         ++vcpu->stat.request_irq_exits;
5472                 }
5473
5474                 kvm_check_async_pf_completion(vcpu);
5475
5476                 if (signal_pending(current)) {
5477                         r = -EINTR;
5478                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5479                         ++vcpu->stat.signal_exits;
5480                 }
5481                 if (need_resched()) {
5482                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5483                         kvm_resched(vcpu);
5484                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5485                 }
5486         }
5487
5488         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5489
5490         vapic_exit(vcpu);
5491
5492         return r;
5493 }
5494
5495 /*
5496  * Implements the following, as a state machine:
5497  *
5498  * read:
5499  *   for each fragment
5500  *     write gpa, len
5501  *     exit
5502  *     copy data
5503  *   execute insn
5504  *
5505  * write:
5506  *   for each fragment
5507  *      write gpa, len
5508  *      copy data
5509  *      exit
5510  */
5511 static int complete_mmio(struct kvm_vcpu *vcpu)
5512 {
5513         struct kvm_run *run = vcpu->run;
5514         struct kvm_mmio_fragment *frag;
5515         int r;
5516
5517         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5518                 return 1;
5519
5520         if (vcpu->mmio_needed) {
5521                 /* Complete previous fragment */
5522                 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment++];
5523                 if (!vcpu->mmio_is_write)
5524                         memcpy(frag->data, run->mmio.data, frag->len);
5525                 if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
5526                         vcpu->mmio_needed = 0;
5527                         if (vcpu->mmio_is_write)
5528                                 return 1;
5529                         vcpu->mmio_read_completed = 1;
5530                         goto done;
5531                 }
5532                 /* Initiate next fragment */
5533                 ++frag;
5534                 run->exit_reason = KVM_EXIT_MMIO;
5535                 run->mmio.phys_addr = frag->gpa;
5536                 if (vcpu->mmio_is_write)
5537                         memcpy(run->mmio.data, frag->data, frag->len);
5538                 run->mmio.len = frag->len;
5539                 run->mmio.is_write = vcpu->mmio_is_write;
5540                 return 0;
5541
5542         }
5543 done:
5544         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5545         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5546         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5547         if (r != EMULATE_DONE)
5548                 return 0;
5549         return 1;
5550 }
5551
5552 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5553 {
5554         int r;
5555         sigset_t sigsaved;
5556
5557         if (!tsk_used_math(current) && init_fpu(current))
5558                 return -ENOMEM;
5559
5560         if (vcpu->sigset_active)
5561                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5562
5563         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5564                 kvm_vcpu_block(vcpu);
5565                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5566                 r = -EAGAIN;
5567                 goto out;
5568         }
5569
5570         /* re-sync apic's tpr */
5571         if (!irqchip_in_kernel(vcpu->kvm)) {
5572                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5573                         r = -EINVAL;
5574                         goto out;
5575                 }
5576         }
5577
5578         r = complete_mmio(vcpu);
5579         if (r <= 0)
5580                 goto out;
5581
5582         r = __vcpu_run(vcpu);
5583
5584 out:
5585         post_kvm_run_save(vcpu);
5586         if (vcpu->sigset_active)
5587                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5588
5589         return r;
5590 }
5591
5592 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5593 {
5594         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5595                 /*
5596                  * We are here if userspace calls get_regs() in the middle of
5597                  * instruction emulation. Registers state needs to be copied
5598                  * back from emulation context to vcpu. Usrapace shouldn't do
5599                  * that usually, but some bad designed PV devices (vmware
5600                  * backdoor interface) need this to work
5601                  */
5602                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5603                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5604                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5605         }
5606         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5607         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5608         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5609         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5610         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5611         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5612         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5613         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5614 #ifdef CONFIG_X86_64
5615         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5616         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5617         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5618         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5619         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5620         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5621         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5622         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5623 #endif
5624
5625         regs->rip = kvm_rip_read(vcpu);
5626         regs->rflags = kvm_get_rflags(vcpu);
5627
5628         return 0;
5629 }
5630
5631 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5632 {
5633         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5634         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5635
5636         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5637         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5638         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5639         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5640         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5641         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5642         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5643         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5644 #ifdef CONFIG_X86_64
5645         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5646         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5647         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5648         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5649         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5650         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5651         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5652         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5653 #endif
5654
5655         kvm_rip_write(vcpu, regs->rip);
5656         kvm_set_rflags(vcpu, regs->rflags);
5657
5658         vcpu->arch.exception.pending = false;
5659
5660         kvm_make_request(KVM_REQ_EVENT, vcpu);
5661
5662         return 0;
5663 }
5664
5665 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5666 {
5667         struct kvm_segment cs;
5668
5669         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5670         *db = cs.db;
5671         *l = cs.l;
5672 }
5673 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5674
5675 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5676                                   struct kvm_sregs *sregs)
5677 {
5678         struct desc_ptr dt;
5679
5680         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5681         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5682         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5683         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5684         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5685         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5686
5687         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5688         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5689
5690         kvm_x86_ops->get_idt(vcpu, &dt);
5691         sregs->idt.limit = dt.size;
5692         sregs->idt.base = dt.address;
5693         kvm_x86_ops->get_gdt(vcpu, &dt);
5694         sregs->gdt.limit = dt.size;
5695         sregs->gdt.base = dt.address;
5696
5697         sregs->cr0 = kvm_read_cr0(vcpu);
5698         sregs->cr2 = vcpu->arch.cr2;
5699         sregs->cr3 = kvm_read_cr3(vcpu);
5700         sregs->cr4 = kvm_read_cr4(vcpu);
5701         sregs->cr8 = kvm_get_cr8(vcpu);
5702         sregs->efer = vcpu->arch.efer;
5703         sregs->apic_base = kvm_get_apic_base(vcpu);
5704
5705         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5706
5707         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5708                 set_bit(vcpu->arch.interrupt.nr,
5709                         (unsigned long *)sregs->interrupt_bitmap);
5710
5711         return 0;
5712 }
5713
5714 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5715                                     struct kvm_mp_state *mp_state)
5716 {
5717         mp_state->mp_state = vcpu->arch.mp_state;
5718         return 0;
5719 }
5720
5721 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5722                                     struct kvm_mp_state *mp_state)
5723 {
5724         vcpu->arch.mp_state = mp_state->mp_state;
5725         kvm_make_request(KVM_REQ_EVENT, vcpu);
5726         return 0;
5727 }
5728
5729 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
5730                     int reason, bool has_error_code, u32 error_code)
5731 {
5732         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5733         int ret;
5734
5735         init_emulate_ctxt(vcpu);
5736
5737         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
5738                                    has_error_code, error_code);
5739
5740         if (ret)
5741                 return EMULATE_FAIL;
5742
5743         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5744         kvm_rip_write(vcpu, ctxt->eip);
5745         kvm_set_rflags(vcpu, ctxt->eflags);
5746         kvm_make_request(KVM_REQ_EVENT, vcpu);
5747         return EMULATE_DONE;
5748 }
5749 EXPORT_SYMBOL_GPL(kvm_task_switch);
5750
5751 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5752                                   struct kvm_sregs *sregs)
5753 {
5754         int mmu_reset_needed = 0;
5755         int pending_vec, max_bits, idx;
5756         struct desc_ptr dt;
5757
5758         dt.size = sregs->idt.limit;
5759         dt.address = sregs->idt.base;
5760         kvm_x86_ops->set_idt(vcpu, &dt);
5761         dt.size = sregs->gdt.limit;
5762         dt.address = sregs->gdt.base;
5763         kvm_x86_ops->set_gdt(vcpu, &dt);
5764
5765         vcpu->arch.cr2 = sregs->cr2;
5766         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5767         vcpu->arch.cr3 = sregs->cr3;
5768         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5769
5770         kvm_set_cr8(vcpu, sregs->cr8);
5771
5772         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5773         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5774         kvm_set_apic_base(vcpu, sregs->apic_base);
5775
5776         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5777         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5778         vcpu->arch.cr0 = sregs->cr0;
5779
5780         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5781         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5782         if (sregs->cr4 & X86_CR4_OSXSAVE)
5783                 kvm_update_cpuid(vcpu);
5784
5785         idx = srcu_read_lock(&vcpu->kvm->srcu);
5786         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5787                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5788                 mmu_reset_needed = 1;
5789         }
5790         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5791
5792         if (mmu_reset_needed)
5793                 kvm_mmu_reset_context(vcpu);
5794
5795         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5796         pending_vec = find_first_bit(
5797                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5798         if (pending_vec < max_bits) {
5799                 kvm_queue_interrupt(vcpu, pending_vec, false);
5800                 pr_debug("Set back pending irq %d\n", pending_vec);
5801         }
5802
5803         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5804         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5805         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5806         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5807         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5808         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5809
5810         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5811         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5812
5813         update_cr8_intercept(vcpu);
5814
5815         /* Older userspace won't unhalt the vcpu on reset. */
5816         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5817             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5818             !is_protmode(vcpu))
5819                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5820
5821         kvm_make_request(KVM_REQ_EVENT, vcpu);
5822
5823         return 0;
5824 }
5825
5826 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5827                                         struct kvm_guest_debug *dbg)
5828 {
5829         unsigned long rflags;
5830         int i, r;
5831
5832         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5833                 r = -EBUSY;
5834                 if (vcpu->arch.exception.pending)
5835                         goto out;
5836                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5837                         kvm_queue_exception(vcpu, DB_VECTOR);
5838                 else
5839                         kvm_queue_exception(vcpu, BP_VECTOR);
5840         }
5841
5842         /*
5843          * Read rflags as long as potentially injected trace flags are still
5844          * filtered out.
5845          */
5846         rflags = kvm_get_rflags(vcpu);
5847
5848         vcpu->guest_debug = dbg->control;
5849         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5850                 vcpu->guest_debug = 0;
5851
5852         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5853                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5854                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5855                 vcpu->arch.switch_db_regs =
5856                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5857         } else {
5858                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5859                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5860                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5861         }
5862
5863         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5864                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5865                         get_segment_base(vcpu, VCPU_SREG_CS);
5866
5867         /*
5868          * Trigger an rflags update that will inject or remove the trace
5869          * flags.
5870          */
5871         kvm_set_rflags(vcpu, rflags);
5872
5873         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5874
5875         r = 0;
5876
5877 out:
5878
5879         return r;
5880 }
5881
5882 /*
5883  * Translate a guest virtual address to a guest physical address.
5884  */
5885 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5886                                     struct kvm_translation *tr)
5887 {
5888         unsigned long vaddr = tr->linear_address;
5889         gpa_t gpa;
5890         int idx;
5891
5892         idx = srcu_read_lock(&vcpu->kvm->srcu);
5893         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5894         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5895         tr->physical_address = gpa;
5896         tr->valid = gpa != UNMAPPED_GVA;
5897         tr->writeable = 1;
5898         tr->usermode = 0;
5899
5900         return 0;
5901 }
5902
5903 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5904 {
5905         struct i387_fxsave_struct *fxsave =
5906                         &vcpu->arch.guest_fpu.state->fxsave;
5907
5908         memcpy(fpu->fpr, fxsave->st_space, 128);
5909         fpu->fcw = fxsave->cwd;
5910         fpu->fsw = fxsave->swd;
5911         fpu->ftwx = fxsave->twd;
5912         fpu->last_opcode = fxsave->fop;
5913         fpu->last_ip = fxsave->rip;
5914         fpu->last_dp = fxsave->rdp;
5915         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5916
5917         return 0;
5918 }
5919
5920 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5921 {
5922         struct i387_fxsave_struct *fxsave =
5923                         &vcpu->arch.guest_fpu.state->fxsave;
5924
5925         memcpy(fxsave->st_space, fpu->fpr, 128);
5926         fxsave->cwd = fpu->fcw;
5927         fxsave->swd = fpu->fsw;
5928         fxsave->twd = fpu->ftwx;
5929         fxsave->fop = fpu->last_opcode;
5930         fxsave->rip = fpu->last_ip;
5931         fxsave->rdp = fpu->last_dp;
5932         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5933
5934         return 0;
5935 }
5936
5937 int fx_init(struct kvm_vcpu *vcpu)
5938 {
5939         int err;
5940
5941         err = fpu_alloc(&vcpu->arch.guest_fpu);
5942         if (err)
5943                 return err;
5944
5945         fpu_finit(&vcpu->arch.guest_fpu);
5946
5947         /*
5948          * Ensure guest xcr0 is valid for loading
5949          */
5950         vcpu->arch.xcr0 = XSTATE_FP;
5951
5952         vcpu->arch.cr0 |= X86_CR0_ET;
5953
5954         return 0;
5955 }
5956 EXPORT_SYMBOL_GPL(fx_init);
5957
5958 static void fx_free(struct kvm_vcpu *vcpu)
5959 {
5960         fpu_free(&vcpu->arch.guest_fpu);
5961 }
5962
5963 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5964 {
5965         if (vcpu->guest_fpu_loaded)
5966                 return;
5967
5968         /*
5969          * Restore all possible states in the guest,
5970          * and assume host would use all available bits.
5971          * Guest xcr0 would be loaded later.
5972          */
5973         kvm_put_guest_xcr0(vcpu);
5974         vcpu->guest_fpu_loaded = 1;
5975         __kernel_fpu_begin();
5976         fpu_restore_checking(&vcpu->arch.guest_fpu);
5977         trace_kvm_fpu(1);
5978 }
5979
5980 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5981 {
5982         kvm_put_guest_xcr0(vcpu);
5983
5984         if (!vcpu->guest_fpu_loaded)
5985                 return;
5986
5987         vcpu->guest_fpu_loaded = 0;
5988         fpu_save_init(&vcpu->arch.guest_fpu);
5989         __kernel_fpu_end();
5990         ++vcpu->stat.fpu_reload;
5991         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5992         trace_kvm_fpu(0);
5993 }
5994
5995 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5996 {
5997         kvmclock_reset(vcpu);
5998
5999         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6000         fx_free(vcpu);
6001         kvm_x86_ops->vcpu_free(vcpu);
6002 }
6003
6004 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6005                                                 unsigned int id)
6006 {
6007         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6008                 printk_once(KERN_WARNING
6009                 "kvm: SMP vm created on host with unstable TSC; "
6010                 "guest TSC will not be reliable\n");
6011         return kvm_x86_ops->vcpu_create(kvm, id);
6012 }
6013
6014 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6015 {
6016         int r;
6017
6018         vcpu->arch.mtrr_state.have_fixed = 1;
6019         vcpu_load(vcpu);
6020         r = kvm_arch_vcpu_reset(vcpu);
6021         if (r == 0)
6022                 r = kvm_mmu_setup(vcpu);
6023         vcpu_put(vcpu);
6024
6025         return r;
6026 }
6027
6028 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6029 {
6030         vcpu->arch.apf.msr_val = 0;
6031
6032         vcpu_load(vcpu);
6033         kvm_mmu_unload(vcpu);
6034         vcpu_put(vcpu);
6035
6036         fx_free(vcpu);
6037         kvm_x86_ops->vcpu_free(vcpu);
6038 }
6039
6040 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6041 {
6042         atomic_set(&vcpu->arch.nmi_queued, 0);
6043         vcpu->arch.nmi_pending = 0;
6044         vcpu->arch.nmi_injected = false;
6045
6046         vcpu->arch.switch_db_regs = 0;
6047         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6048         vcpu->arch.dr6 = DR6_FIXED_1;
6049         vcpu->arch.dr7 = DR7_FIXED_1;
6050
6051         kvm_make_request(KVM_REQ_EVENT, vcpu);
6052         vcpu->arch.apf.msr_val = 0;
6053         vcpu->arch.st.msr_val = 0;
6054
6055         kvmclock_reset(vcpu);
6056
6057         kvm_clear_async_pf_completion_queue(vcpu);
6058         kvm_async_pf_hash_reset(vcpu);
6059         vcpu->arch.apf.halted = false;
6060
6061         kvm_pmu_reset(vcpu);
6062
6063         return kvm_x86_ops->vcpu_reset(vcpu);
6064 }
6065
6066 int kvm_arch_hardware_enable(void *garbage)
6067 {
6068         struct kvm *kvm;
6069         struct kvm_vcpu *vcpu;
6070         int i;
6071         int ret;
6072         u64 local_tsc;
6073         u64 max_tsc = 0;
6074         bool stable, backwards_tsc = false;
6075
6076         kvm_shared_msr_cpu_online();
6077         ret = kvm_x86_ops->hardware_enable(garbage);
6078         if (ret != 0)
6079                 return ret;
6080
6081         local_tsc = native_read_tsc();
6082         stable = !check_tsc_unstable();
6083         list_for_each_entry(kvm, &vm_list, vm_list) {
6084                 kvm_for_each_vcpu(i, vcpu, kvm) {
6085                         if (!stable && vcpu->cpu == smp_processor_id())
6086                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6087                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6088                                 backwards_tsc = true;
6089                                 if (vcpu->arch.last_host_tsc > max_tsc)
6090                                         max_tsc = vcpu->arch.last_host_tsc;
6091                         }
6092                 }
6093         }
6094
6095         /*
6096          * Sometimes, even reliable TSCs go backwards.  This happens on
6097          * platforms that reset TSC during suspend or hibernate actions, but
6098          * maintain synchronization.  We must compensate.  Fortunately, we can
6099          * detect that condition here, which happens early in CPU bringup,
6100          * before any KVM threads can be running.  Unfortunately, we can't
6101          * bring the TSCs fully up to date with real time, as we aren't yet far
6102          * enough into CPU bringup that we know how much real time has actually
6103          * elapsed; our helper function, get_kernel_ns() will be using boot
6104          * variables that haven't been updated yet.
6105          *
6106          * So we simply find the maximum observed TSC above, then record the
6107          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6108          * the adjustment will be applied.  Note that we accumulate
6109          * adjustments, in case multiple suspend cycles happen before some VCPU
6110          * gets a chance to run again.  In the event that no KVM threads get a
6111          * chance to run, we will miss the entire elapsed period, as we'll have
6112          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6113          * loose cycle time.  This isn't too big a deal, since the loss will be
6114          * uniform across all VCPUs (not to mention the scenario is extremely
6115          * unlikely). It is possible that a second hibernate recovery happens
6116          * much faster than a first, causing the observed TSC here to be
6117          * smaller; this would require additional padding adjustment, which is
6118          * why we set last_host_tsc to the local tsc observed here.
6119          *
6120          * N.B. - this code below runs only on platforms with reliable TSC,
6121          * as that is the only way backwards_tsc is set above.  Also note
6122          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6123          * have the same delta_cyc adjustment applied if backwards_tsc
6124          * is detected.  Note further, this adjustment is only done once,
6125          * as we reset last_host_tsc on all VCPUs to stop this from being
6126          * called multiple times (one for each physical CPU bringup).
6127          *
6128          * Platforms with unnreliable TSCs don't have to deal with this, they
6129          * will be compensated by the logic in vcpu_load, which sets the TSC to
6130          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6131          * guarantee that they stay in perfect synchronization.
6132          */
6133         if (backwards_tsc) {
6134                 u64 delta_cyc = max_tsc - local_tsc;
6135                 list_for_each_entry(kvm, &vm_list, vm_list) {
6136                         kvm_for_each_vcpu(i, vcpu, kvm) {
6137                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6138                                 vcpu->arch.last_host_tsc = local_tsc;
6139                         }
6140
6141                         /*
6142                          * We have to disable TSC offset matching.. if you were
6143                          * booting a VM while issuing an S4 host suspend....
6144                          * you may have some problem.  Solving this issue is
6145                          * left as an exercise to the reader.
6146                          */
6147                         kvm->arch.last_tsc_nsec = 0;
6148                         kvm->arch.last_tsc_write = 0;
6149                 }
6150
6151         }
6152         return 0;
6153 }
6154
6155 void kvm_arch_hardware_disable(void *garbage)
6156 {
6157         kvm_x86_ops->hardware_disable(garbage);
6158         drop_user_return_notifiers(garbage);
6159 }
6160
6161 int kvm_arch_hardware_setup(void)
6162 {
6163         return kvm_x86_ops->hardware_setup();
6164 }
6165
6166 void kvm_arch_hardware_unsetup(void)
6167 {
6168         kvm_x86_ops->hardware_unsetup();
6169 }
6170
6171 void kvm_arch_check_processor_compat(void *rtn)
6172 {
6173         kvm_x86_ops->check_processor_compatibility(rtn);
6174 }
6175
6176 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6177 {
6178         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6179 }
6180
6181 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6182 {
6183         struct page *page;
6184         struct kvm *kvm;
6185         int r;
6186
6187         BUG_ON(vcpu->kvm == NULL);
6188         kvm = vcpu->kvm;
6189
6190         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6191         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6192                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6193         else
6194                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6195
6196         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6197         if (!page) {
6198                 r = -ENOMEM;
6199                 goto fail;
6200         }
6201         vcpu->arch.pio_data = page_address(page);
6202
6203         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6204
6205         r = kvm_mmu_create(vcpu);
6206         if (r < 0)
6207                 goto fail_free_pio_data;
6208
6209         if (irqchip_in_kernel(kvm)) {
6210                 r = kvm_create_lapic(vcpu);
6211                 if (r < 0)
6212                         goto fail_mmu_destroy;
6213         }
6214
6215         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6216                                        GFP_KERNEL);
6217         if (!vcpu->arch.mce_banks) {
6218                 r = -ENOMEM;
6219                 goto fail_free_lapic;
6220         }
6221         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6222
6223         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6224                 goto fail_free_mce_banks;
6225
6226         kvm_async_pf_hash_reset(vcpu);
6227         kvm_pmu_init(vcpu);
6228
6229         return 0;
6230 fail_free_mce_banks:
6231         kfree(vcpu->arch.mce_banks);
6232 fail_free_lapic:
6233         kvm_free_lapic(vcpu);
6234 fail_mmu_destroy:
6235         kvm_mmu_destroy(vcpu);
6236 fail_free_pio_data:
6237         free_page((unsigned long)vcpu->arch.pio_data);
6238 fail:
6239         return r;
6240 }
6241
6242 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6243 {
6244         int idx;
6245
6246         kvm_pmu_destroy(vcpu);
6247         kfree(vcpu->arch.mce_banks);
6248         kvm_free_lapic(vcpu);