KVM: Enable ERMS feature support for KVM
[linux-3.10.git] / arch / x86 / kvm / x86.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * derived from drivers/kvm/kvm_main.c
5  *
6  * Copyright (C) 2006 Qumranet, Inc.
7  * Copyright (C) 2008 Qumranet, Inc.
8  * Copyright IBM Corporation, 2008
9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
10  *
11  * Authors:
12  *   Avi Kivity   <avi@qumranet.com>
13  *   Yaniv Kamay  <yaniv@qumranet.com>
14  *   Amit Shah    <amit.shah@qumranet.com>
15  *   Ben-Ami Yassour <benami@il.ibm.com>
16  *
17  * This work is licensed under the terms of the GNU GPL, version 2.  See
18  * the COPYING file in the top-level directory.
19  *
20  */
21
22 #include <linux/kvm_host.h>
23 #include "irq.h"
24 #include "mmu.h"
25 #include "i8254.h"
26 #include "tss.h"
27 #include "kvm_cache_regs.h"
28 #include "x86.h"
29
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
33 #include <linux/fs.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <trace/events/kvm.h>
48
49 #define CREATE_TRACE_POINTS
50 #include "trace.h"
51
52 #include <asm/debugreg.h>
53 #include <asm/msr.h>
54 #include <asm/desc.h>
55 #include <asm/mtrr.h>
56 #include <asm/mce.h>
57 #include <asm/i387.h>
58 #include <asm/xcr.h>
59 #include <asm/pvclock.h>
60 #include <asm/div64.h>
61
62 #define MAX_IO_MSRS 256
63 #define KVM_MAX_MCE_BANKS 32
64 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
65
66 #define emul_to_vcpu(ctxt) \
67         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
68
69 /* EFER defaults:
70  * - enable syscall per default because its emulated by KVM
71  * - enable LME and LMA per default on 64 bit KVM
72  */
73 #ifdef CONFIG_X86_64
74 static
75 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
76 #else
77 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
78 #endif
79
80 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
81 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
82
83 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
84 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
85                                     struct kvm_cpuid_entry2 __user *entries);
86
87 struct kvm_x86_ops *kvm_x86_ops;
88 EXPORT_SYMBOL_GPL(kvm_x86_ops);
89
90 int ignore_msrs = 0;
91 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
92
93 bool kvm_has_tsc_control;
94 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
95 u32  kvm_max_guest_tsc_khz;
96 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
97
98 #define KVM_NR_SHARED_MSRS 16
99
100 struct kvm_shared_msrs_global {
101         int nr;
102         u32 msrs[KVM_NR_SHARED_MSRS];
103 };
104
105 struct kvm_shared_msrs {
106         struct user_return_notifier urn;
107         bool registered;
108         struct kvm_shared_msr_values {
109                 u64 host;
110                 u64 curr;
111         } values[KVM_NR_SHARED_MSRS];
112 };
113
114 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
115 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
116
117 struct kvm_stats_debugfs_item debugfs_entries[] = {
118         { "pf_fixed", VCPU_STAT(pf_fixed) },
119         { "pf_guest", VCPU_STAT(pf_guest) },
120         { "tlb_flush", VCPU_STAT(tlb_flush) },
121         { "invlpg", VCPU_STAT(invlpg) },
122         { "exits", VCPU_STAT(exits) },
123         { "io_exits", VCPU_STAT(io_exits) },
124         { "mmio_exits", VCPU_STAT(mmio_exits) },
125         { "signal_exits", VCPU_STAT(signal_exits) },
126         { "irq_window", VCPU_STAT(irq_window_exits) },
127         { "nmi_window", VCPU_STAT(nmi_window_exits) },
128         { "halt_exits", VCPU_STAT(halt_exits) },
129         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
130         { "hypercalls", VCPU_STAT(hypercalls) },
131         { "request_irq", VCPU_STAT(request_irq_exits) },
132         { "irq_exits", VCPU_STAT(irq_exits) },
133         { "host_state_reload", VCPU_STAT(host_state_reload) },
134         { "efer_reload", VCPU_STAT(efer_reload) },
135         { "fpu_reload", VCPU_STAT(fpu_reload) },
136         { "insn_emulation", VCPU_STAT(insn_emulation) },
137         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
138         { "irq_injections", VCPU_STAT(irq_injections) },
139         { "nmi_injections", VCPU_STAT(nmi_injections) },
140         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
141         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
142         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
143         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
144         { "mmu_flooded", VM_STAT(mmu_flooded) },
145         { "mmu_recycled", VM_STAT(mmu_recycled) },
146         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
147         { "mmu_unsync", VM_STAT(mmu_unsync) },
148         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
149         { "largepages", VM_STAT(lpages) },
150         { NULL }
151 };
152
153 u64 __read_mostly host_xcr0;
154
155 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
156
157 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
158 {
159         int i;
160         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
161                 vcpu->arch.apf.gfns[i] = ~0;
162 }
163
164 static void kvm_on_user_return(struct user_return_notifier *urn)
165 {
166         unsigned slot;
167         struct kvm_shared_msrs *locals
168                 = container_of(urn, struct kvm_shared_msrs, urn);
169         struct kvm_shared_msr_values *values;
170
171         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
172                 values = &locals->values[slot];
173                 if (values->host != values->curr) {
174                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
175                         values->curr = values->host;
176                 }
177         }
178         locals->registered = false;
179         user_return_notifier_unregister(urn);
180 }
181
182 static void shared_msr_update(unsigned slot, u32 msr)
183 {
184         struct kvm_shared_msrs *smsr;
185         u64 value;
186
187         smsr = &__get_cpu_var(shared_msrs);
188         /* only read, and nobody should modify it at this time,
189          * so don't need lock */
190         if (slot >= shared_msrs_global.nr) {
191                 printk(KERN_ERR "kvm: invalid MSR slot!");
192                 return;
193         }
194         rdmsrl_safe(msr, &value);
195         smsr->values[slot].host = value;
196         smsr->values[slot].curr = value;
197 }
198
199 void kvm_define_shared_msr(unsigned slot, u32 msr)
200 {
201         if (slot >= shared_msrs_global.nr)
202                 shared_msrs_global.nr = slot + 1;
203         shared_msrs_global.msrs[slot] = msr;
204         /* we need ensured the shared_msr_global have been updated */
205         smp_wmb();
206 }
207 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
208
209 static void kvm_shared_msr_cpu_online(void)
210 {
211         unsigned i;
212
213         for (i = 0; i < shared_msrs_global.nr; ++i)
214                 shared_msr_update(i, shared_msrs_global.msrs[i]);
215 }
216
217 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
218 {
219         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
220
221         if (((value ^ smsr->values[slot].curr) & mask) == 0)
222                 return;
223         smsr->values[slot].curr = value;
224         wrmsrl(shared_msrs_global.msrs[slot], value);
225         if (!smsr->registered) {
226                 smsr->urn.on_user_return = kvm_on_user_return;
227                 user_return_notifier_register(&smsr->urn);
228                 smsr->registered = true;
229         }
230 }
231 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
232
233 static void drop_user_return_notifiers(void *ignore)
234 {
235         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
236
237         if (smsr->registered)
238                 kvm_on_user_return(&smsr->urn);
239 }
240
241 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
242 {
243         if (irqchip_in_kernel(vcpu->kvm))
244                 return vcpu->arch.apic_base;
245         else
246                 return vcpu->arch.apic_base;
247 }
248 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
249
250 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
251 {
252         /* TODO: reserve bits check */
253         if (irqchip_in_kernel(vcpu->kvm))
254                 kvm_lapic_set_base(vcpu, data);
255         else
256                 vcpu->arch.apic_base = data;
257 }
258 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
259
260 #define EXCPT_BENIGN            0
261 #define EXCPT_CONTRIBUTORY      1
262 #define EXCPT_PF                2
263
264 static int exception_class(int vector)
265 {
266         switch (vector) {
267         case PF_VECTOR:
268                 return EXCPT_PF;
269         case DE_VECTOR:
270         case TS_VECTOR:
271         case NP_VECTOR:
272         case SS_VECTOR:
273         case GP_VECTOR:
274                 return EXCPT_CONTRIBUTORY;
275         default:
276                 break;
277         }
278         return EXCPT_BENIGN;
279 }
280
281 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
282                 unsigned nr, bool has_error, u32 error_code,
283                 bool reinject)
284 {
285         u32 prev_nr;
286         int class1, class2;
287
288         kvm_make_request(KVM_REQ_EVENT, vcpu);
289
290         if (!vcpu->arch.exception.pending) {
291         queue:
292                 vcpu->arch.exception.pending = true;
293                 vcpu->arch.exception.has_error_code = has_error;
294                 vcpu->arch.exception.nr = nr;
295                 vcpu->arch.exception.error_code = error_code;
296                 vcpu->arch.exception.reinject = reinject;
297                 return;
298         }
299
300         /* to check exception */
301         prev_nr = vcpu->arch.exception.nr;
302         if (prev_nr == DF_VECTOR) {
303                 /* triple fault -> shutdown */
304                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
305                 return;
306         }
307         class1 = exception_class(prev_nr);
308         class2 = exception_class(nr);
309         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
310                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
311                 /* generate double fault per SDM Table 5-5 */
312                 vcpu->arch.exception.pending = true;
313                 vcpu->arch.exception.has_error_code = true;
314                 vcpu->arch.exception.nr = DF_VECTOR;
315                 vcpu->arch.exception.error_code = 0;
316         } else
317                 /* replace previous exception with a new one in a hope
318                    that instruction re-execution will regenerate lost
319                    exception */
320                 goto queue;
321 }
322
323 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
324 {
325         kvm_multiple_exception(vcpu, nr, false, 0, false);
326 }
327 EXPORT_SYMBOL_GPL(kvm_queue_exception);
328
329 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
330 {
331         kvm_multiple_exception(vcpu, nr, false, 0, true);
332 }
333 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
334
335 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
336 {
337         if (err)
338                 kvm_inject_gp(vcpu, 0);
339         else
340                 kvm_x86_ops->skip_emulated_instruction(vcpu);
341 }
342 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
343
344 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
345 {
346         ++vcpu->stat.pf_guest;
347         vcpu->arch.cr2 = fault->address;
348         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
349 }
350 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
351
352 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
353 {
354         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
355                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
356         else
357                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
358 }
359
360 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
361 {
362         kvm_make_request(KVM_REQ_EVENT, vcpu);
363         vcpu->arch.nmi_pending = 1;
364 }
365 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
366
367 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
368 {
369         kvm_multiple_exception(vcpu, nr, true, error_code, false);
370 }
371 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
372
373 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
374 {
375         kvm_multiple_exception(vcpu, nr, true, error_code, true);
376 }
377 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
378
379 /*
380  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
381  * a #GP and return false.
382  */
383 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
384 {
385         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
386                 return true;
387         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
388         return false;
389 }
390 EXPORT_SYMBOL_GPL(kvm_require_cpl);
391
392 /*
393  * This function will be used to read from the physical memory of the currently
394  * running guest. The difference to kvm_read_guest_page is that this function
395  * can read from guest physical or from the guest's guest physical memory.
396  */
397 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
398                             gfn_t ngfn, void *data, int offset, int len,
399                             u32 access)
400 {
401         gfn_t real_gfn;
402         gpa_t ngpa;
403
404         ngpa     = gfn_to_gpa(ngfn);
405         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
406         if (real_gfn == UNMAPPED_GVA)
407                 return -EFAULT;
408
409         real_gfn = gpa_to_gfn(real_gfn);
410
411         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
412 }
413 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
414
415 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
416                                void *data, int offset, int len, u32 access)
417 {
418         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
419                                        data, offset, len, access);
420 }
421
422 /*
423  * Load the pae pdptrs.  Return true is they are all valid.
424  */
425 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
426 {
427         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
428         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
429         int i;
430         int ret;
431         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
432
433         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
434                                       offset * sizeof(u64), sizeof(pdpte),
435                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
436         if (ret < 0) {
437                 ret = 0;
438                 goto out;
439         }
440         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
441                 if (is_present_gpte(pdpte[i]) &&
442                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
443                         ret = 0;
444                         goto out;
445                 }
446         }
447         ret = 1;
448
449         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
450         __set_bit(VCPU_EXREG_PDPTR,
451                   (unsigned long *)&vcpu->arch.regs_avail);
452         __set_bit(VCPU_EXREG_PDPTR,
453                   (unsigned long *)&vcpu->arch.regs_dirty);
454 out:
455
456         return ret;
457 }
458 EXPORT_SYMBOL_GPL(load_pdptrs);
459
460 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
461 {
462         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
463         bool changed = true;
464         int offset;
465         gfn_t gfn;
466         int r;
467
468         if (is_long_mode(vcpu) || !is_pae(vcpu))
469                 return false;
470
471         if (!test_bit(VCPU_EXREG_PDPTR,
472                       (unsigned long *)&vcpu->arch.regs_avail))
473                 return true;
474
475         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
476         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
477         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
478                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
479         if (r < 0)
480                 goto out;
481         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
482 out:
483
484         return changed;
485 }
486
487 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
488 {
489         unsigned long old_cr0 = kvm_read_cr0(vcpu);
490         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
491                                     X86_CR0_CD | X86_CR0_NW;
492
493         cr0 |= X86_CR0_ET;
494
495 #ifdef CONFIG_X86_64
496         if (cr0 & 0xffffffff00000000UL)
497                 return 1;
498 #endif
499
500         cr0 &= ~CR0_RESERVED_BITS;
501
502         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
503                 return 1;
504
505         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
506                 return 1;
507
508         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
509 #ifdef CONFIG_X86_64
510                 if ((vcpu->arch.efer & EFER_LME)) {
511                         int cs_db, cs_l;
512
513                         if (!is_pae(vcpu))
514                                 return 1;
515                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
516                         if (cs_l)
517                                 return 1;
518                 } else
519 #endif
520                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
521                                                  kvm_read_cr3(vcpu)))
522                         return 1;
523         }
524
525         kvm_x86_ops->set_cr0(vcpu, cr0);
526
527         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
528                 kvm_clear_async_pf_completion_queue(vcpu);
529                 kvm_async_pf_hash_reset(vcpu);
530         }
531
532         if ((cr0 ^ old_cr0) & update_bits)
533                 kvm_mmu_reset_context(vcpu);
534         return 0;
535 }
536 EXPORT_SYMBOL_GPL(kvm_set_cr0);
537
538 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
539 {
540         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
541 }
542 EXPORT_SYMBOL_GPL(kvm_lmsw);
543
544 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
545 {
546         u64 xcr0;
547
548         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
549         if (index != XCR_XFEATURE_ENABLED_MASK)
550                 return 1;
551         xcr0 = xcr;
552         if (kvm_x86_ops->get_cpl(vcpu) != 0)
553                 return 1;
554         if (!(xcr0 & XSTATE_FP))
555                 return 1;
556         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
557                 return 1;
558         if (xcr0 & ~host_xcr0)
559                 return 1;
560         vcpu->arch.xcr0 = xcr0;
561         vcpu->guest_xcr0_loaded = 0;
562         return 0;
563 }
564
565 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
566 {
567         if (__kvm_set_xcr(vcpu, index, xcr)) {
568                 kvm_inject_gp(vcpu, 0);
569                 return 1;
570         }
571         return 0;
572 }
573 EXPORT_SYMBOL_GPL(kvm_set_xcr);
574
575 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
576 {
577         struct kvm_cpuid_entry2 *best;
578
579         best = kvm_find_cpuid_entry(vcpu, 1, 0);
580         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
581 }
582
583 static bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
584 {
585         struct kvm_cpuid_entry2 *best;
586
587         best = kvm_find_cpuid_entry(vcpu, 7, 0);
588         return best && (best->ebx & bit(X86_FEATURE_SMEP));
589 }
590
591 static bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
592 {
593         struct kvm_cpuid_entry2 *best;
594
595         best = kvm_find_cpuid_entry(vcpu, 7, 0);
596         return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
597 }
598
599 static void update_cpuid(struct kvm_vcpu *vcpu)
600 {
601         struct kvm_cpuid_entry2 *best;
602
603         best = kvm_find_cpuid_entry(vcpu, 1, 0);
604         if (!best)
605                 return;
606
607         /* Update OSXSAVE bit */
608         if (cpu_has_xsave && best->function == 0x1) {
609                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
610                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
611                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
612         }
613 }
614
615 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
616 {
617         unsigned long old_cr4 = kvm_read_cr4(vcpu);
618         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
619                                    X86_CR4_PAE | X86_CR4_SMEP;
620         if (cr4 & CR4_RESERVED_BITS)
621                 return 1;
622
623         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
624                 return 1;
625
626         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
627                 return 1;
628
629         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
630                 return 1;
631
632         if (is_long_mode(vcpu)) {
633                 if (!(cr4 & X86_CR4_PAE))
634                         return 1;
635         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
636                    && ((cr4 ^ old_cr4) & pdptr_bits)
637                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
638                                    kvm_read_cr3(vcpu)))
639                 return 1;
640
641         if (kvm_x86_ops->set_cr4(vcpu, cr4))
642                 return 1;
643
644         if ((cr4 ^ old_cr4) & pdptr_bits)
645                 kvm_mmu_reset_context(vcpu);
646
647         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
648                 update_cpuid(vcpu);
649
650         return 0;
651 }
652 EXPORT_SYMBOL_GPL(kvm_set_cr4);
653
654 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
655 {
656         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
657                 kvm_mmu_sync_roots(vcpu);
658                 kvm_mmu_flush_tlb(vcpu);
659                 return 0;
660         }
661
662         if (is_long_mode(vcpu)) {
663                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
664                         return 1;
665         } else {
666                 if (is_pae(vcpu)) {
667                         if (cr3 & CR3_PAE_RESERVED_BITS)
668                                 return 1;
669                         if (is_paging(vcpu) &&
670                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
671                                 return 1;
672                 }
673                 /*
674                  * We don't check reserved bits in nonpae mode, because
675                  * this isn't enforced, and VMware depends on this.
676                  */
677         }
678
679         /*
680          * Does the new cr3 value map to physical memory? (Note, we
681          * catch an invalid cr3 even in real-mode, because it would
682          * cause trouble later on when we turn on paging anyway.)
683          *
684          * A real CPU would silently accept an invalid cr3 and would
685          * attempt to use it - with largely undefined (and often hard
686          * to debug) behavior on the guest side.
687          */
688         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
689                 return 1;
690         vcpu->arch.cr3 = cr3;
691         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
692         vcpu->arch.mmu.new_cr3(vcpu);
693         return 0;
694 }
695 EXPORT_SYMBOL_GPL(kvm_set_cr3);
696
697 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
698 {
699         if (cr8 & CR8_RESERVED_BITS)
700                 return 1;
701         if (irqchip_in_kernel(vcpu->kvm))
702                 kvm_lapic_set_tpr(vcpu, cr8);
703         else
704                 vcpu->arch.cr8 = cr8;
705         return 0;
706 }
707 EXPORT_SYMBOL_GPL(kvm_set_cr8);
708
709 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
710 {
711         if (irqchip_in_kernel(vcpu->kvm))
712                 return kvm_lapic_get_cr8(vcpu);
713         else
714                 return vcpu->arch.cr8;
715 }
716 EXPORT_SYMBOL_GPL(kvm_get_cr8);
717
718 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
719 {
720         switch (dr) {
721         case 0 ... 3:
722                 vcpu->arch.db[dr] = val;
723                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
724                         vcpu->arch.eff_db[dr] = val;
725                 break;
726         case 4:
727                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
728                         return 1; /* #UD */
729                 /* fall through */
730         case 6:
731                 if (val & 0xffffffff00000000ULL)
732                         return -1; /* #GP */
733                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
734                 break;
735         case 5:
736                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
737                         return 1; /* #UD */
738                 /* fall through */
739         default: /* 7 */
740                 if (val & 0xffffffff00000000ULL)
741                         return -1; /* #GP */
742                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
743                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
744                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
745                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
746                 }
747                 break;
748         }
749
750         return 0;
751 }
752
753 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
754 {
755         int res;
756
757         res = __kvm_set_dr(vcpu, dr, val);
758         if (res > 0)
759                 kvm_queue_exception(vcpu, UD_VECTOR);
760         else if (res < 0)
761                 kvm_inject_gp(vcpu, 0);
762
763         return res;
764 }
765 EXPORT_SYMBOL_GPL(kvm_set_dr);
766
767 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
768 {
769         switch (dr) {
770         case 0 ... 3:
771                 *val = vcpu->arch.db[dr];
772                 break;
773         case 4:
774                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
775                         return 1;
776                 /* fall through */
777         case 6:
778                 *val = vcpu->arch.dr6;
779                 break;
780         case 5:
781                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
782                         return 1;
783                 /* fall through */
784         default: /* 7 */
785                 *val = vcpu->arch.dr7;
786                 break;
787         }
788
789         return 0;
790 }
791
792 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
793 {
794         if (_kvm_get_dr(vcpu, dr, val)) {
795                 kvm_queue_exception(vcpu, UD_VECTOR);
796                 return 1;
797         }
798         return 0;
799 }
800 EXPORT_SYMBOL_GPL(kvm_get_dr);
801
802 /*
803  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
804  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
805  *
806  * This list is modified at module load time to reflect the
807  * capabilities of the host cpu. This capabilities test skips MSRs that are
808  * kvm-specific. Those are put in the beginning of the list.
809  */
810
811 #define KVM_SAVE_MSRS_BEGIN     8
812 static u32 msrs_to_save[] = {
813         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
814         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
815         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
816         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
817         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
818         MSR_STAR,
819 #ifdef CONFIG_X86_64
820         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
821 #endif
822         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
823 };
824
825 static unsigned num_msrs_to_save;
826
827 static u32 emulated_msrs[] = {
828         MSR_IA32_MISC_ENABLE,
829         MSR_IA32_MCG_STATUS,
830         MSR_IA32_MCG_CTL,
831 };
832
833 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
834 {
835         u64 old_efer = vcpu->arch.efer;
836
837         if (efer & efer_reserved_bits)
838                 return 1;
839
840         if (is_paging(vcpu)
841             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
842                 return 1;
843
844         if (efer & EFER_FFXSR) {
845                 struct kvm_cpuid_entry2 *feat;
846
847                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
848                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
849                         return 1;
850         }
851
852         if (efer & EFER_SVME) {
853                 struct kvm_cpuid_entry2 *feat;
854
855                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
856                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
857                         return 1;
858         }
859
860         efer &= ~EFER_LMA;
861         efer |= vcpu->arch.efer & EFER_LMA;
862
863         kvm_x86_ops->set_efer(vcpu, efer);
864
865         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
866
867         /* Update reserved bits */
868         if ((efer ^ old_efer) & EFER_NX)
869                 kvm_mmu_reset_context(vcpu);
870
871         return 0;
872 }
873
874 void kvm_enable_efer_bits(u64 mask)
875 {
876        efer_reserved_bits &= ~mask;
877 }
878 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
879
880
881 /*
882  * Writes msr value into into the appropriate "register".
883  * Returns 0 on success, non-0 otherwise.
884  * Assumes vcpu_load() was already called.
885  */
886 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
887 {
888         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
889 }
890
891 /*
892  * Adapt set_msr() to msr_io()'s calling convention
893  */
894 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
895 {
896         return kvm_set_msr(vcpu, index, *data);
897 }
898
899 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
900 {
901         int version;
902         int r;
903         struct pvclock_wall_clock wc;
904         struct timespec boot;
905
906         if (!wall_clock)
907                 return;
908
909         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
910         if (r)
911                 return;
912
913         if (version & 1)
914                 ++version;  /* first time write, random junk */
915
916         ++version;
917
918         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
919
920         /*
921          * The guest calculates current wall clock time by adding
922          * system time (updated by kvm_guest_time_update below) to the
923          * wall clock specified here.  guest system time equals host
924          * system time for us, thus we must fill in host boot time here.
925          */
926         getboottime(&boot);
927
928         wc.sec = boot.tv_sec;
929         wc.nsec = boot.tv_nsec;
930         wc.version = version;
931
932         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
933
934         version++;
935         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
936 }
937
938 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
939 {
940         uint32_t quotient, remainder;
941
942         /* Don't try to replace with do_div(), this one calculates
943          * "(dividend << 32) / divisor" */
944         __asm__ ( "divl %4"
945                   : "=a" (quotient), "=d" (remainder)
946                   : "0" (0), "1" (dividend), "r" (divisor) );
947         return quotient;
948 }
949
950 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
951                                s8 *pshift, u32 *pmultiplier)
952 {
953         uint64_t scaled64;
954         int32_t  shift = 0;
955         uint64_t tps64;
956         uint32_t tps32;
957
958         tps64 = base_khz * 1000LL;
959         scaled64 = scaled_khz * 1000LL;
960         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
961                 tps64 >>= 1;
962                 shift--;
963         }
964
965         tps32 = (uint32_t)tps64;
966         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
967                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
968                         scaled64 >>= 1;
969                 else
970                         tps32 <<= 1;
971                 shift++;
972         }
973
974         *pshift = shift;
975         *pmultiplier = div_frac(scaled64, tps32);
976
977         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
978                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
979 }
980
981 static inline u64 get_kernel_ns(void)
982 {
983         struct timespec ts;
984
985         WARN_ON(preemptible());
986         ktime_get_ts(&ts);
987         monotonic_to_bootbased(&ts);
988         return timespec_to_ns(&ts);
989 }
990
991 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
992 unsigned long max_tsc_khz;
993
994 static inline int kvm_tsc_changes_freq(void)
995 {
996         int cpu = get_cpu();
997         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
998                   cpufreq_quick_get(cpu) != 0;
999         put_cpu();
1000         return ret;
1001 }
1002
1003 static u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
1004 {
1005         if (vcpu->arch.virtual_tsc_khz)
1006                 return vcpu->arch.virtual_tsc_khz;
1007         else
1008                 return __this_cpu_read(cpu_tsc_khz);
1009 }
1010
1011 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1012 {
1013         u64 ret;
1014
1015         WARN_ON(preemptible());
1016         if (kvm_tsc_changes_freq())
1017                 printk_once(KERN_WARNING
1018                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
1019         ret = nsec * vcpu_tsc_khz(vcpu);
1020         do_div(ret, USEC_PER_SEC);
1021         return ret;
1022 }
1023
1024 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1025 {
1026         /* Compute a scale to convert nanoseconds in TSC cycles */
1027         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1028                            &vcpu->arch.tsc_catchup_shift,
1029                            &vcpu->arch.tsc_catchup_mult);
1030 }
1031
1032 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1033 {
1034         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1035                                       vcpu->arch.tsc_catchup_mult,
1036                                       vcpu->arch.tsc_catchup_shift);
1037         tsc += vcpu->arch.last_tsc_write;
1038         return tsc;
1039 }
1040
1041 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1042 {
1043         struct kvm *kvm = vcpu->kvm;
1044         u64 offset, ns, elapsed;
1045         unsigned long flags;
1046         s64 sdiff;
1047
1048         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1049         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1050         ns = get_kernel_ns();
1051         elapsed = ns - kvm->arch.last_tsc_nsec;
1052         sdiff = data - kvm->arch.last_tsc_write;
1053         if (sdiff < 0)
1054                 sdiff = -sdiff;
1055
1056         /*
1057          * Special case: close write to TSC within 5 seconds of
1058          * another CPU is interpreted as an attempt to synchronize
1059          * The 5 seconds is to accommodate host load / swapping as
1060          * well as any reset of TSC during the boot process.
1061          *
1062          * In that case, for a reliable TSC, we can match TSC offsets,
1063          * or make a best guest using elapsed value.
1064          */
1065         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1066             elapsed < 5ULL * NSEC_PER_SEC) {
1067                 if (!check_tsc_unstable()) {
1068                         offset = kvm->arch.last_tsc_offset;
1069                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1070                 } else {
1071                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1072                         offset += delta;
1073                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1074                 }
1075                 ns = kvm->arch.last_tsc_nsec;
1076         }
1077         kvm->arch.last_tsc_nsec = ns;
1078         kvm->arch.last_tsc_write = data;
1079         kvm->arch.last_tsc_offset = offset;
1080         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1081         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1082
1083         /* Reset of TSC must disable overshoot protection below */
1084         vcpu->arch.hv_clock.tsc_timestamp = 0;
1085         vcpu->arch.last_tsc_write = data;
1086         vcpu->arch.last_tsc_nsec = ns;
1087 }
1088 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1089
1090 static int kvm_guest_time_update(struct kvm_vcpu *v)
1091 {
1092         unsigned long flags;
1093         struct kvm_vcpu_arch *vcpu = &v->arch;
1094         void *shared_kaddr;
1095         unsigned long this_tsc_khz;
1096         s64 kernel_ns, max_kernel_ns;
1097         u64 tsc_timestamp;
1098
1099         /* Keep irq disabled to prevent changes to the clock */
1100         local_irq_save(flags);
1101         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1102         kernel_ns = get_kernel_ns();
1103         this_tsc_khz = vcpu_tsc_khz(v);
1104         if (unlikely(this_tsc_khz == 0)) {
1105                 local_irq_restore(flags);
1106                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1107                 return 1;
1108         }
1109
1110         /*
1111          * We may have to catch up the TSC to match elapsed wall clock
1112          * time for two reasons, even if kvmclock is used.
1113          *   1) CPU could have been running below the maximum TSC rate
1114          *   2) Broken TSC compensation resets the base at each VCPU
1115          *      entry to avoid unknown leaps of TSC even when running
1116          *      again on the same CPU.  This may cause apparent elapsed
1117          *      time to disappear, and the guest to stand still or run
1118          *      very slowly.
1119          */
1120         if (vcpu->tsc_catchup) {
1121                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1122                 if (tsc > tsc_timestamp) {
1123                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1124                         tsc_timestamp = tsc;
1125                 }
1126         }
1127
1128         local_irq_restore(flags);
1129
1130         if (!vcpu->time_page)
1131                 return 0;
1132
1133         /*
1134          * Time as measured by the TSC may go backwards when resetting the base
1135          * tsc_timestamp.  The reason for this is that the TSC resolution is
1136          * higher than the resolution of the other clock scales.  Thus, many
1137          * possible measurments of the TSC correspond to one measurement of any
1138          * other clock, and so a spread of values is possible.  This is not a
1139          * problem for the computation of the nanosecond clock; with TSC rates
1140          * around 1GHZ, there can only be a few cycles which correspond to one
1141          * nanosecond value, and any path through this code will inevitably
1142          * take longer than that.  However, with the kernel_ns value itself,
1143          * the precision may be much lower, down to HZ granularity.  If the
1144          * first sampling of TSC against kernel_ns ends in the low part of the
1145          * range, and the second in the high end of the range, we can get:
1146          *
1147          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1148          *
1149          * As the sampling errors potentially range in the thousands of cycles,
1150          * it is possible such a time value has already been observed by the
1151          * guest.  To protect against this, we must compute the system time as
1152          * observed by the guest and ensure the new system time is greater.
1153          */
1154         max_kernel_ns = 0;
1155         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1156                 max_kernel_ns = vcpu->last_guest_tsc -
1157                                 vcpu->hv_clock.tsc_timestamp;
1158                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1159                                     vcpu->hv_clock.tsc_to_system_mul,
1160                                     vcpu->hv_clock.tsc_shift);
1161                 max_kernel_ns += vcpu->last_kernel_ns;
1162         }
1163
1164         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1165                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1166                                    &vcpu->hv_clock.tsc_shift,
1167                                    &vcpu->hv_clock.tsc_to_system_mul);
1168                 vcpu->hw_tsc_khz = this_tsc_khz;
1169         }
1170
1171         if (max_kernel_ns > kernel_ns)
1172                 kernel_ns = max_kernel_ns;
1173
1174         /* With all the info we got, fill in the values */
1175         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1176         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1177         vcpu->last_kernel_ns = kernel_ns;
1178         vcpu->last_guest_tsc = tsc_timestamp;
1179         vcpu->hv_clock.flags = 0;
1180
1181         /*
1182          * The interface expects us to write an even number signaling that the
1183          * update is finished. Since the guest won't see the intermediate
1184          * state, we just increase by 2 at the end.
1185          */
1186         vcpu->hv_clock.version += 2;
1187
1188         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1189
1190         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1191                sizeof(vcpu->hv_clock));
1192
1193         kunmap_atomic(shared_kaddr, KM_USER0);
1194
1195         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1196         return 0;
1197 }
1198
1199 static bool msr_mtrr_valid(unsigned msr)
1200 {
1201         switch (msr) {
1202         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1203         case MSR_MTRRfix64K_00000:
1204         case MSR_MTRRfix16K_80000:
1205         case MSR_MTRRfix16K_A0000:
1206         case MSR_MTRRfix4K_C0000:
1207         case MSR_MTRRfix4K_C8000:
1208         case MSR_MTRRfix4K_D0000:
1209         case MSR_MTRRfix4K_D8000:
1210         case MSR_MTRRfix4K_E0000:
1211         case MSR_MTRRfix4K_E8000:
1212         case MSR_MTRRfix4K_F0000:
1213         case MSR_MTRRfix4K_F8000:
1214         case MSR_MTRRdefType:
1215         case MSR_IA32_CR_PAT:
1216                 return true;
1217         case 0x2f8:
1218                 return true;
1219         }
1220         return false;
1221 }
1222
1223 static bool valid_pat_type(unsigned t)
1224 {
1225         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1226 }
1227
1228 static bool valid_mtrr_type(unsigned t)
1229 {
1230         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1231 }
1232
1233 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1234 {
1235         int i;
1236
1237         if (!msr_mtrr_valid(msr))
1238                 return false;
1239
1240         if (msr == MSR_IA32_CR_PAT) {
1241                 for (i = 0; i < 8; i++)
1242                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1243                                 return false;
1244                 return true;
1245         } else if (msr == MSR_MTRRdefType) {
1246                 if (data & ~0xcff)
1247                         return false;
1248                 return valid_mtrr_type(data & 0xff);
1249         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1250                 for (i = 0; i < 8 ; i++)
1251                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1252                                 return false;
1253                 return true;
1254         }
1255
1256         /* variable MTRRs */
1257         return valid_mtrr_type(data & 0xff);
1258 }
1259
1260 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1261 {
1262         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1263
1264         if (!mtrr_valid(vcpu, msr, data))
1265                 return 1;
1266
1267         if (msr == MSR_MTRRdefType) {
1268                 vcpu->arch.mtrr_state.def_type = data;
1269                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1270         } else if (msr == MSR_MTRRfix64K_00000)
1271                 p[0] = data;
1272         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1273                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1274         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1275                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1276         else if (msr == MSR_IA32_CR_PAT)
1277                 vcpu->arch.pat = data;
1278         else {  /* Variable MTRRs */
1279                 int idx, is_mtrr_mask;
1280                 u64 *pt;
1281
1282                 idx = (msr - 0x200) / 2;
1283                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1284                 if (!is_mtrr_mask)
1285                         pt =
1286                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1287                 else
1288                         pt =
1289                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1290                 *pt = data;
1291         }
1292
1293         kvm_mmu_reset_context(vcpu);
1294         return 0;
1295 }
1296
1297 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1298 {
1299         u64 mcg_cap = vcpu->arch.mcg_cap;
1300         unsigned bank_num = mcg_cap & 0xff;
1301
1302         switch (msr) {
1303         case MSR_IA32_MCG_STATUS:
1304                 vcpu->arch.mcg_status = data;
1305                 break;
1306         case MSR_IA32_MCG_CTL:
1307                 if (!(mcg_cap & MCG_CTL_P))
1308                         return 1;
1309                 if (data != 0 && data != ~(u64)0)
1310                         return -1;
1311                 vcpu->arch.mcg_ctl = data;
1312                 break;
1313         default:
1314                 if (msr >= MSR_IA32_MC0_CTL &&
1315                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1316                         u32 offset = msr - MSR_IA32_MC0_CTL;
1317                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1318                          * some Linux kernels though clear bit 10 in bank 4 to
1319                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1320                          * this to avoid an uncatched #GP in the guest
1321                          */
1322                         if ((offset & 0x3) == 0 &&
1323                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1324                                 return -1;
1325                         vcpu->arch.mce_banks[offset] = data;
1326                         break;
1327                 }
1328                 return 1;
1329         }
1330         return 0;
1331 }
1332
1333 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1334 {
1335         struct kvm *kvm = vcpu->kvm;
1336         int lm = is_long_mode(vcpu);
1337         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1338                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1339         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1340                 : kvm->arch.xen_hvm_config.blob_size_32;
1341         u32 page_num = data & ~PAGE_MASK;
1342         u64 page_addr = data & PAGE_MASK;
1343         u8 *page;
1344         int r;
1345
1346         r = -E2BIG;
1347         if (page_num >= blob_size)
1348                 goto out;
1349         r = -ENOMEM;
1350         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1351         if (!page)
1352                 goto out;
1353         r = -EFAULT;
1354         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1355                 goto out_free;
1356         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1357                 goto out_free;
1358         r = 0;
1359 out_free:
1360         kfree(page);
1361 out:
1362         return r;
1363 }
1364
1365 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1366 {
1367         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1368 }
1369
1370 static bool kvm_hv_msr_partition_wide(u32 msr)
1371 {
1372         bool r = false;
1373         switch (msr) {
1374         case HV_X64_MSR_GUEST_OS_ID:
1375         case HV_X64_MSR_HYPERCALL:
1376                 r = true;
1377                 break;
1378         }
1379
1380         return r;
1381 }
1382
1383 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1384 {
1385         struct kvm *kvm = vcpu->kvm;
1386
1387         switch (msr) {
1388         case HV_X64_MSR_GUEST_OS_ID:
1389                 kvm->arch.hv_guest_os_id = data;
1390                 /* setting guest os id to zero disables hypercall page */
1391                 if (!kvm->arch.hv_guest_os_id)
1392                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1393                 break;
1394         case HV_X64_MSR_HYPERCALL: {
1395                 u64 gfn;
1396                 unsigned long addr;
1397                 u8 instructions[4];
1398
1399                 /* if guest os id is not set hypercall should remain disabled */
1400                 if (!kvm->arch.hv_guest_os_id)
1401                         break;
1402                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1403                         kvm->arch.hv_hypercall = data;
1404                         break;
1405                 }
1406                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1407                 addr = gfn_to_hva(kvm, gfn);
1408                 if (kvm_is_error_hva(addr))
1409                         return 1;
1410                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1411                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1412                 if (__copy_to_user((void __user *)addr, instructions, 4))
1413                         return 1;
1414                 kvm->arch.hv_hypercall = data;
1415                 break;
1416         }
1417         default:
1418                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1419                           "data 0x%llx\n", msr, data);
1420                 return 1;
1421         }
1422         return 0;
1423 }
1424
1425 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1426 {
1427         switch (msr) {
1428         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1429                 unsigned long addr;
1430
1431                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1432                         vcpu->arch.hv_vapic = data;
1433                         break;
1434                 }
1435                 addr = gfn_to_hva(vcpu->kvm, data >>
1436                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1437                 if (kvm_is_error_hva(addr))
1438                         return 1;
1439                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1440                         return 1;
1441                 vcpu->arch.hv_vapic = data;
1442                 break;
1443         }
1444         case HV_X64_MSR_EOI:
1445                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1446         case HV_X64_MSR_ICR:
1447                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1448         case HV_X64_MSR_TPR:
1449                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1450         default:
1451                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1452                           "data 0x%llx\n", msr, data);
1453                 return 1;
1454         }
1455
1456         return 0;
1457 }
1458
1459 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1460 {
1461         gpa_t gpa = data & ~0x3f;
1462
1463         /* Bits 2:5 are resrved, Should be zero */
1464         if (data & 0x3c)
1465                 return 1;
1466
1467         vcpu->arch.apf.msr_val = data;
1468
1469         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1470                 kvm_clear_async_pf_completion_queue(vcpu);
1471                 kvm_async_pf_hash_reset(vcpu);
1472                 return 0;
1473         }
1474
1475         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1476                 return 1;
1477
1478         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1479         kvm_async_pf_wakeup_all(vcpu);
1480         return 0;
1481 }
1482
1483 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1484 {
1485         if (vcpu->arch.time_page) {
1486                 kvm_release_page_dirty(vcpu->arch.time_page);
1487                 vcpu->arch.time_page = NULL;
1488         }
1489 }
1490
1491 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1492 {
1493         switch (msr) {
1494         case MSR_EFER:
1495                 return set_efer(vcpu, data);
1496         case MSR_K7_HWCR:
1497                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1498                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1499                 if (data != 0) {
1500                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1501                                 data);
1502                         return 1;
1503                 }
1504                 break;
1505         case MSR_FAM10H_MMIO_CONF_BASE:
1506                 if (data != 0) {
1507                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1508                                 "0x%llx\n", data);
1509                         return 1;
1510                 }
1511                 break;
1512         case MSR_AMD64_NB_CFG:
1513                 break;
1514         case MSR_IA32_DEBUGCTLMSR:
1515                 if (!data) {
1516                         /* We support the non-activated case already */
1517                         break;
1518                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1519                         /* Values other than LBR and BTF are vendor-specific,
1520                            thus reserved and should throw a #GP */
1521                         return 1;
1522                 }
1523                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1524                         __func__, data);
1525                 break;
1526         case MSR_IA32_UCODE_REV:
1527         case MSR_IA32_UCODE_WRITE:
1528         case MSR_VM_HSAVE_PA:
1529         case MSR_AMD64_PATCH_LOADER:
1530                 break;
1531         case 0x200 ... 0x2ff:
1532                 return set_msr_mtrr(vcpu, msr, data);
1533         case MSR_IA32_APICBASE:
1534                 kvm_set_apic_base(vcpu, data);
1535                 break;
1536         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1537                 return kvm_x2apic_msr_write(vcpu, msr, data);
1538         case MSR_IA32_MISC_ENABLE:
1539                 vcpu->arch.ia32_misc_enable_msr = data;
1540                 break;
1541         case MSR_KVM_WALL_CLOCK_NEW:
1542         case MSR_KVM_WALL_CLOCK:
1543                 vcpu->kvm->arch.wall_clock = data;
1544                 kvm_write_wall_clock(vcpu->kvm, data);
1545                 break;
1546         case MSR_KVM_SYSTEM_TIME_NEW:
1547         case MSR_KVM_SYSTEM_TIME: {
1548                 kvmclock_reset(vcpu);
1549
1550                 vcpu->arch.time = data;
1551                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1552
1553                 /* we verify if the enable bit is set... */
1554                 if (!(data & 1))
1555                         break;
1556
1557                 /* ...but clean it before doing the actual write */
1558                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1559
1560                 vcpu->arch.time_page =
1561                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1562
1563                 if (is_error_page(vcpu->arch.time_page)) {
1564                         kvm_release_page_clean(vcpu->arch.time_page);
1565                         vcpu->arch.time_page = NULL;
1566                 }
1567                 break;
1568         }
1569         case MSR_KVM_ASYNC_PF_EN:
1570                 if (kvm_pv_enable_async_pf(vcpu, data))
1571                         return 1;
1572                 break;
1573         case MSR_IA32_MCG_CTL:
1574         case MSR_IA32_MCG_STATUS:
1575         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1576                 return set_msr_mce(vcpu, msr, data);
1577
1578         /* Performance counters are not protected by a CPUID bit,
1579          * so we should check all of them in the generic path for the sake of
1580          * cross vendor migration.
1581          * Writing a zero into the event select MSRs disables them,
1582          * which we perfectly emulate ;-). Any other value should be at least
1583          * reported, some guests depend on them.
1584          */
1585         case MSR_P6_EVNTSEL0:
1586         case MSR_P6_EVNTSEL1:
1587         case MSR_K7_EVNTSEL0:
1588         case MSR_K7_EVNTSEL1:
1589         case MSR_K7_EVNTSEL2:
1590         case MSR_K7_EVNTSEL3:
1591                 if (data != 0)
1592                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1593                                 "0x%x data 0x%llx\n", msr, data);
1594                 break;
1595         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1596          * so we ignore writes to make it happy.
1597          */
1598         case MSR_P6_PERFCTR0:
1599         case MSR_P6_PERFCTR1:
1600         case MSR_K7_PERFCTR0:
1601         case MSR_K7_PERFCTR1:
1602         case MSR_K7_PERFCTR2:
1603         case MSR_K7_PERFCTR3:
1604                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1605                         "0x%x data 0x%llx\n", msr, data);
1606                 break;
1607         case MSR_K7_CLK_CTL:
1608                 /*
1609                  * Ignore all writes to this no longer documented MSR.
1610                  * Writes are only relevant for old K7 processors,
1611                  * all pre-dating SVM, but a recommended workaround from
1612                  * AMD for these chips. It is possible to speicify the
1613                  * affected processor models on the command line, hence
1614                  * the need to ignore the workaround.
1615                  */
1616                 break;
1617         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1618                 if (kvm_hv_msr_partition_wide(msr)) {
1619                         int r;
1620                         mutex_lock(&vcpu->kvm->lock);
1621                         r = set_msr_hyperv_pw(vcpu, msr, data);
1622                         mutex_unlock(&vcpu->kvm->lock);
1623                         return r;
1624                 } else
1625                         return set_msr_hyperv(vcpu, msr, data);
1626                 break;
1627         case MSR_IA32_BBL_CR_CTL3:
1628                 /* Drop writes to this legacy MSR -- see rdmsr
1629                  * counterpart for further detail.
1630                  */
1631                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1632                 break;
1633         default:
1634                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1635                         return xen_hvm_config(vcpu, data);
1636                 if (!ignore_msrs) {
1637                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1638                                 msr, data);
1639                         return 1;
1640                 } else {
1641                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1642                                 msr, data);
1643                         break;
1644                 }
1645         }
1646         return 0;
1647 }
1648 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1649
1650
1651 /*
1652  * Reads an msr value (of 'msr_index') into 'pdata'.
1653  * Returns 0 on success, non-0 otherwise.
1654  * Assumes vcpu_load() was already called.
1655  */
1656 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1657 {
1658         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1659 }
1660
1661 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1662 {
1663         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1664
1665         if (!msr_mtrr_valid(msr))
1666                 return 1;
1667
1668         if (msr == MSR_MTRRdefType)
1669                 *pdata = vcpu->arch.mtrr_state.def_type +
1670                          (vcpu->arch.mtrr_state.enabled << 10);
1671         else if (msr == MSR_MTRRfix64K_00000)
1672                 *pdata = p[0];
1673         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1674                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1675         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1676                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1677         else if (msr == MSR_IA32_CR_PAT)
1678                 *pdata = vcpu->arch.pat;
1679         else {  /* Variable MTRRs */
1680                 int idx, is_mtrr_mask;
1681                 u64 *pt;
1682
1683                 idx = (msr - 0x200) / 2;
1684                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1685                 if (!is_mtrr_mask)
1686                         pt =
1687                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1688                 else
1689                         pt =
1690                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1691                 *pdata = *pt;
1692         }
1693
1694         return 0;
1695 }
1696
1697 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1698 {
1699         u64 data;
1700         u64 mcg_cap = vcpu->arch.mcg_cap;
1701         unsigned bank_num = mcg_cap & 0xff;
1702
1703         switch (msr) {
1704         case MSR_IA32_P5_MC_ADDR:
1705         case MSR_IA32_P5_MC_TYPE:
1706                 data = 0;
1707                 break;
1708         case MSR_IA32_MCG_CAP:
1709                 data = vcpu->arch.mcg_cap;
1710                 break;
1711         case MSR_IA32_MCG_CTL:
1712                 if (!(mcg_cap & MCG_CTL_P))
1713                         return 1;
1714                 data = vcpu->arch.mcg_ctl;
1715                 break;
1716         case MSR_IA32_MCG_STATUS:
1717                 data = vcpu->arch.mcg_status;
1718                 break;
1719         default:
1720                 if (msr >= MSR_IA32_MC0_CTL &&
1721                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1722                         u32 offset = msr - MSR_IA32_MC0_CTL;
1723                         data = vcpu->arch.mce_banks[offset];
1724                         break;
1725                 }
1726                 return 1;
1727         }
1728         *pdata = data;
1729         return 0;
1730 }
1731
1732 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1733 {
1734         u64 data = 0;
1735         struct kvm *kvm = vcpu->kvm;
1736
1737         switch (msr) {
1738         case HV_X64_MSR_GUEST_OS_ID:
1739                 data = kvm->arch.hv_guest_os_id;
1740                 break;
1741         case HV_X64_MSR_HYPERCALL:
1742                 data = kvm->arch.hv_hypercall;
1743                 break;
1744         default:
1745                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1746                 return 1;
1747         }
1748
1749         *pdata = data;
1750         return 0;
1751 }
1752
1753 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1754 {
1755         u64 data = 0;
1756
1757         switch (msr) {
1758         case HV_X64_MSR_VP_INDEX: {
1759                 int r;
1760                 struct kvm_vcpu *v;
1761                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1762                         if (v == vcpu)
1763                                 data = r;
1764                 break;
1765         }
1766         case HV_X64_MSR_EOI:
1767                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1768         case HV_X64_MSR_ICR:
1769                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1770         case HV_X64_MSR_TPR:
1771                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1772         default:
1773                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1774                 return 1;
1775         }
1776         *pdata = data;
1777         return 0;
1778 }
1779
1780 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1781 {
1782         u64 data;
1783
1784         switch (msr) {
1785         case MSR_IA32_PLATFORM_ID:
1786         case MSR_IA32_UCODE_REV:
1787         case MSR_IA32_EBL_CR_POWERON:
1788         case MSR_IA32_DEBUGCTLMSR:
1789         case MSR_IA32_LASTBRANCHFROMIP:
1790         case MSR_IA32_LASTBRANCHTOIP:
1791         case MSR_IA32_LASTINTFROMIP:
1792         case MSR_IA32_LASTINTTOIP:
1793         case MSR_K8_SYSCFG:
1794         case MSR_K7_HWCR:
1795         case MSR_VM_HSAVE_PA:
1796         case MSR_P6_PERFCTR0:
1797         case MSR_P6_PERFCTR1:
1798         case MSR_P6_EVNTSEL0:
1799         case MSR_P6_EVNTSEL1:
1800         case MSR_K7_EVNTSEL0:
1801         case MSR_K7_PERFCTR0:
1802         case MSR_K8_INT_PENDING_MSG:
1803         case MSR_AMD64_NB_CFG:
1804         case MSR_FAM10H_MMIO_CONF_BASE:
1805                 data = 0;
1806                 break;
1807         case MSR_MTRRcap:
1808                 data = 0x500 | KVM_NR_VAR_MTRR;
1809                 break;
1810         case 0x200 ... 0x2ff:
1811                 return get_msr_mtrr(vcpu, msr, pdata);
1812         case 0xcd: /* fsb frequency */
1813                 data = 3;
1814                 break;
1815                 /*
1816                  * MSR_EBC_FREQUENCY_ID
1817                  * Conservative value valid for even the basic CPU models.
1818                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1819                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1820                  * and 266MHz for model 3, or 4. Set Core Clock
1821                  * Frequency to System Bus Frequency Ratio to 1 (bits
1822                  * 31:24) even though these are only valid for CPU
1823                  * models > 2, however guests may end up dividing or
1824                  * multiplying by zero otherwise.
1825                  */
1826         case MSR_EBC_FREQUENCY_ID:
1827                 data = 1 << 24;
1828                 break;
1829         case MSR_IA32_APICBASE:
1830                 data = kvm_get_apic_base(vcpu);
1831                 break;
1832         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1833                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1834                 break;
1835         case MSR_IA32_MISC_ENABLE:
1836                 data = vcpu->arch.ia32_misc_enable_msr;
1837                 break;
1838         case MSR_IA32_PERF_STATUS:
1839                 /* TSC increment by tick */
1840                 data = 1000ULL;
1841                 /* CPU multiplier */
1842                 data |= (((uint64_t)4ULL) << 40);
1843                 break;
1844         case MSR_EFER:
1845                 data = vcpu->arch.efer;
1846                 break;
1847         case MSR_KVM_WALL_CLOCK:
1848         case MSR_KVM_WALL_CLOCK_NEW:
1849                 data = vcpu->kvm->arch.wall_clock;
1850                 break;
1851         case MSR_KVM_SYSTEM_TIME:
1852         case MSR_KVM_SYSTEM_TIME_NEW:
1853                 data = vcpu->arch.time;
1854                 break;
1855         case MSR_KVM_ASYNC_PF_EN:
1856                 data = vcpu->arch.apf.msr_val;
1857                 break;
1858         case MSR_IA32_P5_MC_ADDR:
1859         case MSR_IA32_P5_MC_TYPE:
1860         case MSR_IA32_MCG_CAP:
1861         case MSR_IA32_MCG_CTL:
1862         case MSR_IA32_MCG_STATUS:
1863         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1864                 return get_msr_mce(vcpu, msr, pdata);
1865         case MSR_K7_CLK_CTL:
1866                 /*
1867                  * Provide expected ramp-up count for K7. All other
1868                  * are set to zero, indicating minimum divisors for
1869                  * every field.
1870                  *
1871                  * This prevents guest kernels on AMD host with CPU
1872                  * type 6, model 8 and higher from exploding due to
1873                  * the rdmsr failing.
1874                  */
1875                 data = 0x20000000;
1876                 break;
1877         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1878                 if (kvm_hv_msr_partition_wide(msr)) {
1879                         int r;
1880                         mutex_lock(&vcpu->kvm->lock);
1881                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1882                         mutex_unlock(&vcpu->kvm->lock);
1883                         return r;
1884                 } else
1885                         return get_msr_hyperv(vcpu, msr, pdata);
1886                 break;
1887         case MSR_IA32_BBL_CR_CTL3:
1888                 /* This legacy MSR exists but isn't fully documented in current
1889                  * silicon.  It is however accessed by winxp in very narrow
1890                  * scenarios where it sets bit #19, itself documented as
1891                  * a "reserved" bit.  Best effort attempt to source coherent
1892                  * read data here should the balance of the register be
1893                  * interpreted by the guest:
1894                  *
1895                  * L2 cache control register 3: 64GB range, 256KB size,
1896                  * enabled, latency 0x1, configured
1897                  */
1898                 data = 0xbe702111;
1899                 break;
1900         default:
1901                 if (!ignore_msrs) {
1902                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1903                         return 1;
1904                 } else {
1905                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1906                         data = 0;
1907                 }
1908                 break;
1909         }
1910         *pdata = data;
1911         return 0;
1912 }
1913 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1914
1915 /*
1916  * Read or write a bunch of msrs. All parameters are kernel addresses.
1917  *
1918  * @return number of msrs set successfully.
1919  */
1920 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1921                     struct kvm_msr_entry *entries,
1922                     int (*do_msr)(struct kvm_vcpu *vcpu,
1923                                   unsigned index, u64 *data))
1924 {
1925         int i, idx;
1926
1927         idx = srcu_read_lock(&vcpu->kvm->srcu);
1928         for (i = 0; i < msrs->nmsrs; ++i)
1929                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1930                         break;
1931         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1932
1933         return i;
1934 }
1935
1936 /*
1937  * Read or write a bunch of msrs. Parameters are user addresses.
1938  *
1939  * @return number of msrs set successfully.
1940  */
1941 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1942                   int (*do_msr)(struct kvm_vcpu *vcpu,
1943                                 unsigned index, u64 *data),
1944                   int writeback)
1945 {
1946         struct kvm_msrs msrs;
1947         struct kvm_msr_entry *entries;
1948         int r, n;
1949         unsigned size;
1950
1951         r = -EFAULT;
1952         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1953                 goto out;
1954
1955         r = -E2BIG;
1956         if (msrs.nmsrs >= MAX_IO_MSRS)
1957                 goto out;
1958
1959         r = -ENOMEM;
1960         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1961         entries = kmalloc(size, GFP_KERNEL);
1962         if (!entries)
1963                 goto out;
1964
1965         r = -EFAULT;
1966         if (copy_from_user(entries, user_msrs->entries, size))
1967                 goto out_free;
1968
1969         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1970         if (r < 0)
1971                 goto out_free;
1972
1973         r = -EFAULT;
1974         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1975                 goto out_free;
1976
1977         r = n;
1978
1979 out_free:
1980         kfree(entries);
1981 out:
1982         return r;
1983 }
1984
1985 int kvm_dev_ioctl_check_extension(long ext)
1986 {
1987         int r;
1988
1989         switch (ext) {
1990         case KVM_CAP_IRQCHIP:
1991         case KVM_CAP_HLT:
1992         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1993         case KVM_CAP_SET_TSS_ADDR:
1994         case KVM_CAP_EXT_CPUID:
1995         case KVM_CAP_CLOCKSOURCE:
1996         case KVM_CAP_PIT:
1997         case KVM_CAP_NOP_IO_DELAY:
1998         case KVM_CAP_MP_STATE:
1999         case KVM_CAP_SYNC_MMU:
2000         case KVM_CAP_USER_NMI:
2001         case KVM_CAP_REINJECT_CONTROL:
2002         case KVM_CAP_IRQ_INJECT_STATUS:
2003         case KVM_CAP_ASSIGN_DEV_IRQ:
2004         case KVM_CAP_IRQFD:
2005         case KVM_CAP_IOEVENTFD:
2006         case KVM_CAP_PIT2:
2007         case KVM_CAP_PIT_STATE2:
2008         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2009         case KVM_CAP_XEN_HVM:
2010         case KVM_CAP_ADJUST_CLOCK:
2011         case KVM_CAP_VCPU_EVENTS:
2012         case KVM_CAP_HYPERV:
2013         case KVM_CAP_HYPERV_VAPIC:
2014         case KVM_CAP_HYPERV_SPIN:
2015         case KVM_CAP_PCI_SEGMENT:
2016         case KVM_CAP_DEBUGREGS:
2017         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2018         case KVM_CAP_XSAVE:
2019         case KVM_CAP_ASYNC_PF:
2020         case KVM_CAP_GET_TSC_KHZ:
2021                 r = 1;
2022                 break;
2023         case KVM_CAP_COALESCED_MMIO:
2024                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2025                 break;
2026         case KVM_CAP_VAPIC:
2027                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2028                 break;
2029         case KVM_CAP_NR_VCPUS:
2030                 r = KVM_MAX_VCPUS;
2031                 break;
2032         case KVM_CAP_NR_MEMSLOTS:
2033                 r = KVM_MEMORY_SLOTS;
2034                 break;
2035         case KVM_CAP_PV_MMU:    /* obsolete */
2036                 r = 0;
2037                 break;
2038         case KVM_CAP_IOMMU:
2039                 r = iommu_found();
2040                 break;
2041         case KVM_CAP_MCE:
2042                 r = KVM_MAX_MCE_BANKS;
2043                 break;
2044         case KVM_CAP_XCRS:
2045                 r = cpu_has_xsave;
2046                 break;
2047         case KVM_CAP_TSC_CONTROL:
2048                 r = kvm_has_tsc_control;
2049                 break;
2050         default:
2051                 r = 0;
2052                 break;
2053         }
2054         return r;
2055
2056 }
2057
2058 long kvm_arch_dev_ioctl(struct file *filp,
2059                         unsigned int ioctl, unsigned long arg)
2060 {
2061         void __user *argp = (void __user *)arg;
2062         long r;
2063
2064         switch (ioctl) {
2065         case KVM_GET_MSR_INDEX_LIST: {
2066                 struct kvm_msr_list __user *user_msr_list = argp;
2067                 struct kvm_msr_list msr_list;
2068                 unsigned n;
2069
2070                 r = -EFAULT;
2071                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2072                         goto out;
2073                 n = msr_list.nmsrs;
2074                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2075                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2076                         goto out;
2077                 r = -E2BIG;
2078                 if (n < msr_list.nmsrs)
2079                         goto out;
2080                 r = -EFAULT;
2081                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2082                                  num_msrs_to_save * sizeof(u32)))
2083                         goto out;
2084                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2085                                  &emulated_msrs,
2086                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2087                         goto out;
2088                 r = 0;
2089                 break;
2090         }
2091         case KVM_GET_SUPPORTED_CPUID: {
2092                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2093                 struct kvm_cpuid2 cpuid;
2094
2095                 r = -EFAULT;
2096                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2097                         goto out;
2098                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2099                                                       cpuid_arg->entries);
2100                 if (r)
2101                         goto out;
2102
2103                 r = -EFAULT;
2104                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2105                         goto out;
2106                 r = 0;
2107                 break;
2108         }
2109         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2110                 u64 mce_cap;
2111
2112                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2113                 r = -EFAULT;
2114                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2115                         goto out;
2116                 r = 0;
2117                 break;
2118         }
2119         default:
2120                 r = -EINVAL;
2121         }
2122 out:
2123         return r;
2124 }
2125
2126 static void wbinvd_ipi(void *garbage)
2127 {
2128         wbinvd();
2129 }
2130
2131 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2132 {
2133         return vcpu->kvm->arch.iommu_domain &&
2134                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2135 }
2136
2137 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2138 {
2139         /* Address WBINVD may be executed by guest */
2140         if (need_emulate_wbinvd(vcpu)) {
2141                 if (kvm_x86_ops->has_wbinvd_exit())
2142                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2143                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2144                         smp_call_function_single(vcpu->cpu,
2145                                         wbinvd_ipi, NULL, 1);
2146         }
2147
2148         kvm_x86_ops->vcpu_load(vcpu, cpu);
2149         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2150                 /* Make sure TSC doesn't go backwards */
2151                 s64 tsc_delta;
2152                 u64 tsc;
2153
2154                 kvm_get_msr(vcpu, MSR_IA32_TSC, &tsc);
2155                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2156                              tsc - vcpu->arch.last_guest_tsc;
2157
2158                 if (tsc_delta < 0)
2159                         mark_tsc_unstable("KVM discovered backwards TSC");
2160                 if (check_tsc_unstable()) {
2161                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2162                         vcpu->arch.tsc_catchup = 1;
2163                 }
2164                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2165                 if (vcpu->cpu != cpu)
2166                         kvm_migrate_timers(vcpu);
2167                 vcpu->cpu = cpu;
2168         }
2169 }
2170
2171 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2172 {
2173         kvm_x86_ops->vcpu_put(vcpu);
2174         kvm_put_guest_fpu(vcpu);
2175         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
2176 }
2177
2178 static int is_efer_nx(void)
2179 {
2180         unsigned long long efer = 0;
2181
2182         rdmsrl_safe(MSR_EFER, &efer);
2183         return efer & EFER_NX;
2184 }
2185
2186 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2187 {
2188         int i;
2189         struct kvm_cpuid_entry2 *e, *entry;
2190
2191         entry = NULL;
2192         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2193                 e = &vcpu->arch.cpuid_entries[i];
2194                 if (e->function == 0x80000001) {
2195                         entry = e;
2196                         break;
2197                 }
2198         }
2199         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2200                 entry->edx &= ~(1 << 20);
2201                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2202         }
2203 }
2204
2205 /* when an old userspace process fills a new kernel module */
2206 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2207                                     struct kvm_cpuid *cpuid,
2208                                     struct kvm_cpuid_entry __user *entries)
2209 {
2210         int r, i;
2211         struct kvm_cpuid_entry *cpuid_entries;
2212
2213         r = -E2BIG;
2214         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2215                 goto out;
2216         r = -ENOMEM;
2217         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2218         if (!cpuid_entries)
2219                 goto out;
2220         r = -EFAULT;
2221         if (copy_from_user(cpuid_entries, entries,
2222                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2223                 goto out_free;
2224         for (i = 0; i < cpuid->nent; i++) {
2225                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2226                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2227                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2228                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2229                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2230                 vcpu->arch.cpuid_entries[i].index = 0;
2231                 vcpu->arch.cpuid_entries[i].flags = 0;
2232                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2233                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2234                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2235         }
2236         vcpu->arch.cpuid_nent = cpuid->nent;
2237         cpuid_fix_nx_cap(vcpu);
2238         r = 0;
2239         kvm_apic_set_version(vcpu);
2240         kvm_x86_ops->cpuid_update(vcpu);
2241         update_cpuid(vcpu);
2242
2243 out_free:
2244         vfree(cpuid_entries);
2245 out:
2246         return r;
2247 }
2248
2249 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2250                                      struct kvm_cpuid2 *cpuid,
2251                                      struct kvm_cpuid_entry2 __user *entries)
2252 {
2253         int r;
2254
2255         r = -E2BIG;
2256         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2257                 goto out;
2258         r = -EFAULT;
2259         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2260                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2261                 goto out;
2262         vcpu->arch.cpuid_nent = cpuid->nent;
2263         kvm_apic_set_version(vcpu);
2264         kvm_x86_ops->cpuid_update(vcpu);
2265         update_cpuid(vcpu);
2266         return 0;
2267
2268 out:
2269         return r;
2270 }
2271
2272 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2273                                      struct kvm_cpuid2 *cpuid,
2274                                      struct kvm_cpuid_entry2 __user *entries)
2275 {
2276         int r;
2277
2278         r = -E2BIG;
2279         if (cpuid->nent < vcpu->arch.cpuid_nent)
2280                 goto out;
2281         r = -EFAULT;
2282         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2283                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2284                 goto out;
2285         return 0;
2286
2287 out:
2288         cpuid->nent = vcpu->arch.cpuid_nent;
2289         return r;
2290 }
2291
2292 static void cpuid_mask(u32 *word, int wordnum)
2293 {
2294         *word &= boot_cpu_data.x86_capability[wordnum];
2295 }
2296
2297 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2298                            u32 index)
2299 {
2300         entry->function = function;
2301         entry->index = index;
2302         cpuid_count(entry->function, entry->index,
2303                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2304         entry->flags = 0;
2305 }
2306
2307 static bool supported_xcr0_bit(unsigned bit)
2308 {
2309         u64 mask = ((u64)1 << bit);
2310
2311         return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2312 }
2313
2314 #define F(x) bit(X86_FEATURE_##x)
2315
2316 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2317                          u32 index, int *nent, int maxnent)
2318 {
2319         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2320 #ifdef CONFIG_X86_64
2321         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2322                                 ? F(GBPAGES) : 0;
2323         unsigned f_lm = F(LM);
2324 #else
2325         unsigned f_gbpages = 0;
2326         unsigned f_lm = 0;
2327 #endif
2328         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2329
2330         /* cpuid 1.edx */
2331         const u32 kvm_supported_word0_x86_features =
2332                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2333                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2334                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2335                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2336                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2337                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2338                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2339                 0 /* HTT, TM, Reserved, PBE */;
2340         /* cpuid 0x80000001.edx */
2341         const u32 kvm_supported_word1_x86_features =
2342                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2343                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2344                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2345                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2346                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2347                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2348                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2349                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2350         /* cpuid 1.ecx */
2351         const u32 kvm_supported_word4_x86_features =
2352                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2353                 0 /* DS-CPL, VMX, SMX, EST */ |
2354                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2355                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2356                 0 /* Reserved, DCA */ | F(XMM4_1) |
2357                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2358                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2359                 F(F16C) | F(RDRAND);
2360         /* cpuid 0x80000001.ecx */
2361         const u32 kvm_supported_word6_x86_features =
2362                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2363                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2364                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2365                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2366
2367         /* cpuid 0xC0000001.edx */
2368         const u32 kvm_supported_word5_x86_features =
2369                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2370                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2371                 F(PMM) | F(PMM_EN);
2372
2373         /* cpuid 7.0.ebx */
2374         const u32 kvm_supported_word9_x86_features =
2375                 F(SMEP) | F(FSGSBASE) | F(ERMS);
2376
2377         /* all calls to cpuid_count() should be made on the same cpu */
2378         get_cpu();
2379         do_cpuid_1_ent(entry, function, index);
2380         ++*nent;
2381
2382         switch (function) {
2383         case 0:
2384                 entry->eax = min(entry->eax, (u32)0xd);
2385                 break;
2386         case 1:
2387                 entry->edx &= kvm_supported_word0_x86_features;
2388                 cpuid_mask(&entry->edx, 0);
2389                 entry->ecx &= kvm_supported_word4_x86_features;
2390                 cpuid_mask(&entry->ecx, 4);
2391                 /* we support x2apic emulation even if host does not support
2392                  * it since we emulate x2apic in software */
2393                 entry->ecx |= F(X2APIC);
2394                 break;
2395         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2396          * may return different values. This forces us to get_cpu() before
2397          * issuing the first command, and also to emulate this annoying behavior
2398          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2399         case 2: {
2400                 int t, times = entry->eax & 0xff;
2401
2402                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2403                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2404                 for (t = 1; t < times && *nent < maxnent; ++t) {
2405                         do_cpuid_1_ent(&entry[t], function, 0);
2406                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2407                         ++*nent;
2408                 }
2409                 break;
2410         }
2411         /* function 4 has additional index. */
2412         case 4: {
2413                 int i, cache_type;
2414
2415                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2416                 /* read more entries until cache_type is zero */
2417                 for (i = 1; *nent < maxnent; ++i) {
2418                         cache_type = entry[i - 1].eax & 0x1f;
2419                         if (!cache_type)
2420                                 break;
2421                         do_cpuid_1_ent(&entry[i], function, i);
2422                         entry[i].flags |=
2423                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2424                         ++*nent;
2425                 }
2426                 break;
2427         }
2428         case 7: {
2429                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2430                 /* Mask ebx against host capbability word 9 */
2431                 if (index == 0) {
2432                         entry->ebx &= kvm_supported_word9_x86_features;
2433                         cpuid_mask(&entry->ebx, 9);
2434                 } else
2435                         entry->ebx = 0;
2436                 entry->eax = 0;
2437                 entry->ecx = 0;
2438                 entry->edx = 0;
2439                 break;
2440         }
2441         case 9:
2442                 break;
2443         /* function 0xb has additional index. */
2444         case 0xb: {
2445                 int i, level_type;
2446
2447                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2448                 /* read more entries until level_type is zero */
2449                 for (i = 1; *nent < maxnent; ++i) {
2450                         level_type = entry[i - 1].ecx & 0xff00;
2451                         if (!level_type)
2452                                 break;
2453                         do_cpuid_1_ent(&entry[i], function, i);
2454                         entry[i].flags |=
2455                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2456                         ++*nent;
2457                 }
2458                 break;
2459         }
2460         case 0xd: {
2461                 int idx, i;
2462
2463                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2464                 for (idx = 1, i = 1; *nent < maxnent && idx < 64; ++idx) {
2465                         do_cpuid_1_ent(&entry[i], function, idx);
2466                         if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
2467                                 continue;
2468                         entry[i].flags |=
2469                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2470                         ++*nent;
2471                         ++i;
2472                 }
2473                 break;
2474         }
2475         case KVM_CPUID_SIGNATURE: {
2476                 char signature[12] = "KVMKVMKVM\0\0";
2477                 u32 *sigptr = (u32 *)signature;
2478                 entry->eax = 0;
2479                 entry->ebx = sigptr[0];
2480                 entry->ecx = sigptr[1];
2481                 entry->edx = sigptr[2];
2482                 break;
2483         }
2484         case KVM_CPUID_FEATURES:
2485                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2486                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2487                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2488                              (1 << KVM_FEATURE_ASYNC_PF) |
2489                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2490                 entry->ebx = 0;
2491                 entry->ecx = 0;
2492                 entry->edx = 0;
2493                 break;
2494         case 0x80000000:
2495                 entry->eax = min(entry->eax, 0x8000001a);
2496                 break;
2497         case 0x80000001:
2498                 entry->edx &= kvm_supported_word1_x86_features;
2499                 cpuid_mask(&entry->edx, 1);
2500                 entry->ecx &= kvm_supported_word6_x86_features;
2501                 cpuid_mask(&entry->ecx, 6);
2502                 break;
2503         case 0x80000008: {
2504                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2505                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2506                 unsigned phys_as = entry->eax & 0xff;
2507
2508                 if (!g_phys_as)
2509                         g_phys_as = phys_as;
2510                 entry->eax = g_phys_as | (virt_as << 8);
2511                 entry->ebx = entry->edx = 0;
2512                 break;
2513         }
2514         case 0x80000019:
2515                 entry->ecx = entry->edx = 0;
2516                 break;
2517         case 0x8000001a:
2518                 break;
2519         case 0x8000001d:
2520                 break;
2521         /*Add support for Centaur's CPUID instruction*/
2522         case 0xC0000000:
2523                 /*Just support up to 0xC0000004 now*/
2524                 entry->eax = min(entry->eax, 0xC0000004);
2525                 break;
2526         case 0xC0000001:
2527                 entry->edx &= kvm_supported_word5_x86_features;
2528                 cpuid_mask(&entry->edx, 5);
2529                 break;
2530         case 3: /* Processor serial number */
2531         case 5: /* MONITOR/MWAIT */
2532         case 6: /* Thermal management */
2533         case 0xA: /* Architectural Performance Monitoring */
2534         case 0x80000007: /* Advanced power management */
2535         case 0xC0000002:
2536         case 0xC0000003:
2537         case 0xC0000004:
2538         default:
2539                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2540                 break;
2541         }
2542
2543         kvm_x86_ops->set_supported_cpuid(function, entry);
2544
2545         put_cpu();
2546 }
2547
2548 #undef F
2549
2550 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2551                                      struct kvm_cpuid_entry2 __user *entries)
2552 {
2553         struct kvm_cpuid_entry2 *cpuid_entries;
2554         int limit, nent = 0, r = -E2BIG;
2555         u32 func;
2556
2557         if (cpuid->nent < 1)
2558                 goto out;
2559         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2560                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2561         r = -ENOMEM;
2562         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2563         if (!cpuid_entries)
2564                 goto out;
2565
2566         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2567         limit = cpuid_entries[0].eax;
2568         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2569                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2570                              &nent, cpuid->nent);
2571         r = -E2BIG;
2572         if (nent >= cpuid->nent)
2573                 goto out_free;
2574
2575         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2576         limit = cpuid_entries[nent - 1].eax;
2577         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2578                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2579                              &nent, cpuid->nent);
2580
2581
2582
2583         r = -E2BIG;
2584         if (nent >= cpuid->nent)
2585                 goto out_free;
2586
2587         /* Add support for Centaur's CPUID instruction. */
2588         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2589                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2590                                 &nent, cpuid->nent);
2591
2592                 r = -E2BIG;
2593                 if (nent >= cpuid->nent)
2594                         goto out_free;
2595
2596                 limit = cpuid_entries[nent - 1].eax;
2597                 for (func = 0xC0000001;
2598                         func <= limit && nent < cpuid->nent; ++func)
2599                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2600                                         &nent, cpuid->nent);
2601
2602                 r = -E2BIG;
2603                 if (nent >= cpuid->nent)
2604                         goto out_free;
2605         }
2606
2607         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2608                      cpuid->nent);
2609
2610         r = -E2BIG;
2611         if (nent >= cpuid->nent)
2612                 goto out_free;
2613
2614         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2615                      cpuid->nent);
2616
2617         r = -E2BIG;
2618         if (nent >= cpuid->nent)
2619                 goto out_free;
2620
2621         r = -EFAULT;
2622         if (copy_to_user(entries, cpuid_entries,
2623                          nent * sizeof(struct kvm_cpuid_entry2)))
2624                 goto out_free;
2625         cpuid->nent = nent;
2626         r = 0;
2627
2628 out_free:
2629         vfree(cpuid_entries);
2630 out:
2631         return r;
2632 }
2633
2634 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2635                                     struct kvm_lapic_state *s)
2636 {
2637         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2638
2639         return 0;
2640 }
2641
2642 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2643                                     struct kvm_lapic_state *s)
2644 {
2645         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2646         kvm_apic_post_state_restore(vcpu);
2647         update_cr8_intercept(vcpu);
2648
2649         return 0;
2650 }
2651
2652 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2653                                     struct kvm_interrupt *irq)
2654 {
2655         if (irq->irq < 0 || irq->irq >= 256)
2656                 return -EINVAL;
2657         if (irqchip_in_kernel(vcpu->kvm))
2658                 return -ENXIO;
2659
2660         kvm_queue_interrupt(vcpu, irq->irq, false);
2661         kvm_make_request(KVM_REQ_EVENT, vcpu);
2662
2663         return 0;
2664 }
2665
2666 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2667 {
2668         kvm_inject_nmi(vcpu);
2669
2670         return 0;
2671 }
2672
2673 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2674                                            struct kvm_tpr_access_ctl *tac)
2675 {
2676         if (tac->flags)
2677                 return -EINVAL;
2678         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2679         return 0;
2680 }
2681
2682 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2683                                         u64 mcg_cap)
2684 {
2685         int r;
2686         unsigned bank_num = mcg_cap & 0xff, bank;
2687
2688         r = -EINVAL;
2689         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2690                 goto out;
2691         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2692                 goto out;
2693         r = 0;
2694         vcpu->arch.mcg_cap = mcg_cap;
2695         /* Init IA32_MCG_CTL to all 1s */
2696         if (mcg_cap & MCG_CTL_P)
2697                 vcpu->arch.mcg_ctl = ~(u64)0;
2698         /* Init IA32_MCi_CTL to all 1s */
2699         for (bank = 0; bank < bank_num; bank++)
2700                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2701 out:
2702         return r;
2703 }
2704
2705 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2706                                       struct kvm_x86_mce *mce)
2707 {
2708         u64 mcg_cap = vcpu->arch.mcg_cap;
2709         unsigned bank_num = mcg_cap & 0xff;
2710         u64 *banks = vcpu->arch.mce_banks;
2711
2712         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2713                 return -EINVAL;
2714         /*
2715          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2716          * reporting is disabled
2717          */
2718         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2719             vcpu->arch.mcg_ctl != ~(u64)0)
2720                 return 0;
2721         banks += 4 * mce->bank;
2722         /*
2723          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2724          * reporting is disabled for the bank
2725          */
2726         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2727                 return 0;
2728         if (mce->status & MCI_STATUS_UC) {
2729                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2730                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2731                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2732                         return 0;
2733                 }
2734                 if (banks[1] & MCI_STATUS_VAL)
2735                         mce->status |= MCI_STATUS_OVER;
2736                 banks[2] = mce->addr;
2737                 banks[3] = mce->misc;
2738                 vcpu->arch.mcg_status = mce->mcg_status;
2739                 banks[1] = mce->status;
2740                 kvm_queue_exception(vcpu, MC_VECTOR);
2741         } else if (!(banks[1] & MCI_STATUS_VAL)
2742                    || !(banks[1] & MCI_STATUS_UC)) {
2743                 if (banks[1] & MCI_STATUS_VAL)
2744                         mce->status |= MCI_STATUS_OVER;
2745                 banks[2] = mce->addr;
2746                 banks[3] = mce->misc;
2747                 banks[1] = mce->status;
2748         } else
2749                 banks[1] |= MCI_STATUS_OVER;
2750         return 0;
2751 }
2752
2753 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2754                                                struct kvm_vcpu_events *events)
2755 {
2756         events->exception.injected =
2757                 vcpu->arch.exception.pending &&
2758                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2759         events->exception.nr = vcpu->arch.exception.nr;
2760         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2761         events->exception.pad = 0;
2762         events->exception.error_code = vcpu->arch.exception.error_code;
2763
2764         events->interrupt.injected =
2765                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2766         events->interrupt.nr = vcpu->arch.interrupt.nr;
2767         events->interrupt.soft = 0;
2768         events->interrupt.shadow =
2769                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2770                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2771
2772         events->nmi.injected = vcpu->arch.nmi_injected;
2773         events->nmi.pending = vcpu->arch.nmi_pending;
2774         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2775         events->nmi.pad = 0;
2776
2777         events->sipi_vector = vcpu->arch.sipi_vector;
2778
2779         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2780                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2781                          | KVM_VCPUEVENT_VALID_SHADOW);
2782         memset(&events->reserved, 0, sizeof(events->reserved));
2783 }
2784
2785 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2786                                               struct kvm_vcpu_events *events)
2787 {
2788         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2789                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2790                               | KVM_VCPUEVENT_VALID_SHADOW))
2791                 return -EINVAL;
2792
2793         vcpu->arch.exception.pending = events->exception.injected;
2794         vcpu->arch.exception.nr = events->exception.nr;
2795         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2796         vcpu->arch.exception.error_code = events->exception.error_code;
2797
2798         vcpu->arch.interrupt.pending = events->interrupt.injected;
2799         vcpu->arch.interrupt.nr = events->interrupt.nr;
2800         vcpu->arch.interrupt.soft = events->interrupt.soft;
2801         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2802                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2803                                                   events->interrupt.shadow);
2804
2805         vcpu->arch.nmi_injected = events->nmi.injected;
2806         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2807                 vcpu->arch.nmi_pending = events->nmi.pending;
2808         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2809
2810         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2811                 vcpu->arch.sipi_vector = events->sipi_vector;
2812
2813         kvm_make_request(KVM_REQ_EVENT, vcpu);
2814
2815         return 0;
2816 }
2817
2818 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2819                                              struct kvm_debugregs *dbgregs)
2820 {
2821         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2822         dbgregs->dr6 = vcpu->arch.dr6;
2823         dbgregs->dr7 = vcpu->arch.dr7;
2824         dbgregs->flags = 0;
2825         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2826 }
2827
2828 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2829                                             struct kvm_debugregs *dbgregs)
2830 {
2831         if (dbgregs->flags)
2832                 return -EINVAL;
2833
2834         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2835         vcpu->arch.dr6 = dbgregs->dr6;
2836         vcpu->arch.dr7 = dbgregs->dr7;
2837
2838         return 0;
2839 }
2840
2841 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2842                                          struct kvm_xsave *guest_xsave)
2843 {
2844         if (cpu_has_xsave)
2845                 memcpy(guest_xsave->region,
2846                         &vcpu->arch.guest_fpu.state->xsave,
2847                         xstate_size);
2848         else {
2849                 memcpy(guest_xsave->region,
2850                         &vcpu->arch.guest_fpu.state->fxsave,
2851                         sizeof(struct i387_fxsave_struct));
2852                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2853                         XSTATE_FPSSE;
2854         }
2855 }
2856
2857 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2858                                         struct kvm_xsave *guest_xsave)
2859 {
2860         u64 xstate_bv =
2861                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2862
2863         if (cpu_has_xsave)
2864                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2865                         guest_xsave->region, xstate_size);
2866         else {
2867                 if (xstate_bv & ~XSTATE_FPSSE)
2868                         return -EINVAL;
2869                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2870                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2871         }
2872         return 0;
2873 }
2874
2875 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2876                                         struct kvm_xcrs *guest_xcrs)
2877 {
2878         if (!cpu_has_xsave) {
2879                 guest_xcrs->nr_xcrs = 0;
2880                 return;
2881         }
2882
2883         guest_xcrs->nr_xcrs = 1;
2884         guest_xcrs->flags = 0;
2885         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2886         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2887 }
2888
2889 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2890                                        struct kvm_xcrs *guest_xcrs)
2891 {
2892         int i, r = 0;
2893
2894         if (!cpu_has_xsave)
2895                 return -EINVAL;
2896
2897         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2898                 return -EINVAL;
2899
2900         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2901                 /* Only support XCR0 currently */
2902                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2903                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2904                                 guest_xcrs->xcrs[0].value);
2905                         break;
2906                 }
2907         if (r)
2908                 r = -EINVAL;
2909         return r;
2910 }
2911
2912 long kvm_arch_vcpu_ioctl(struct file *filp,
2913                          unsigned int ioctl, unsigned long arg)
2914 {
2915         struct kvm_vcpu *vcpu = filp->private_data;
2916         void __user *argp = (void __user *)arg;
2917         int r;
2918         union {
2919                 struct kvm_lapic_state *lapic;
2920                 struct kvm_xsave *xsave;
2921                 struct kvm_xcrs *xcrs;
2922                 void *buffer;
2923         } u;
2924
2925         u.buffer = NULL;
2926         switch (ioctl) {
2927         case KVM_GET_LAPIC: {
2928                 r = -EINVAL;
2929                 if (!vcpu->arch.apic)
2930                         goto out;
2931                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2932
2933                 r = -ENOMEM;
2934                 if (!u.lapic)
2935                         goto out;
2936                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2937                 if (r)
2938                         goto out;
2939                 r = -EFAULT;
2940                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2941                         goto out;
2942                 r = 0;
2943                 break;
2944         }
2945         case KVM_SET_LAPIC: {
2946                 r = -EINVAL;
2947                 if (!vcpu->arch.apic)
2948                         goto out;
2949                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2950                 r = -ENOMEM;
2951                 if (!u.lapic)
2952                         goto out;
2953                 r = -EFAULT;
2954                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2955                         goto out;
2956                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2957                 if (r)
2958                         goto out;
2959                 r = 0;
2960                 break;
2961         }
2962         case KVM_INTERRUPT: {
2963                 struct kvm_interrupt irq;
2964
2965                 r = -EFAULT;
2966                 if (copy_from_user(&irq, argp, sizeof irq))
2967                         goto out;
2968                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2969                 if (r)
2970                         goto out;
2971                 r = 0;
2972                 break;
2973         }
2974         case KVM_NMI: {
2975                 r = kvm_vcpu_ioctl_nmi(vcpu);
2976                 if (r)
2977                         goto out;
2978                 r = 0;
2979                 break;
2980         }
2981         case KVM_SET_CPUID: {
2982                 struct kvm_cpuid __user *cpuid_arg = argp;
2983                 struct kvm_cpuid cpuid;
2984
2985                 r = -EFAULT;
2986                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2987                         goto out;
2988                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2989                 if (r)
2990                         goto out;
2991                 break;
2992         }
2993         case KVM_SET_CPUID2: {
2994                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2995                 struct kvm_cpuid2 cpuid;
2996
2997                 r = -EFAULT;
2998                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2999                         goto out;
3000                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3001                                               cpuid_arg->entries);
3002                 if (r)
3003                         goto out;
3004                 break;
3005         }
3006         case KVM_GET_CPUID2: {
3007                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3008                 struct kvm_cpuid2 cpuid;
3009
3010                 r = -EFAULT;
3011                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3012                         goto out;
3013                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3014                                               cpuid_arg->entries);
3015                 if (r)
3016                         goto out;
3017                 r = -EFAULT;
3018                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3019                         goto out;
3020                 r = 0;
3021                 break;
3022         }
3023         case KVM_GET_MSRS:
3024                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3025                 break;
3026         case KVM_SET_MSRS:
3027                 r = msr_io(vcpu, argp, do_set_msr, 0);
3028                 break;
3029         case KVM_TPR_ACCESS_REPORTING: {
3030                 struct kvm_tpr_access_ctl tac;
3031
3032                 r = -EFAULT;
3033                 if (copy_from_user(&tac, argp, sizeof tac))
3034                         goto out;
3035                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3036                 if (r)
3037                         goto out;
3038                 r = -EFAULT;
3039                 if (copy_to_user(argp, &tac, sizeof tac))
3040                         goto out;
3041                 r = 0;
3042                 break;
3043         };
3044         case KVM_SET_VAPIC_ADDR: {
3045                 struct kvm_vapic_addr va;
3046
3047                 r = -EINVAL;
3048                 if (!irqchip_in_kernel(vcpu->kvm))
3049                         goto out;
3050                 r = -EFAULT;
3051                 if (copy_from_user(&va, argp, sizeof va))
3052                         goto out;
3053                 r = 0;
3054                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3055                 break;
3056         }
3057         case KVM_X86_SETUP_MCE: {
3058                 u64 mcg_cap;
3059
3060                 r = -EFAULT;
3061                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3062                         goto out;
3063                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3064                 break;
3065         }
3066         case KVM_X86_SET_MCE: {
3067                 struct kvm_x86_mce mce;
3068
3069                 r = -EFAULT;
3070                 if (copy_from_user(&mce, argp, sizeof mce))
3071                         goto out;
3072                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3073                 break;
3074         }
3075         case KVM_GET_VCPU_EVENTS: {
3076                 struct kvm_vcpu_events events;
3077
3078                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3079
3080                 r = -EFAULT;
3081                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3082                         break;
3083                 r = 0;
3084                 break;
3085         }
3086         case KVM_SET_VCPU_EVENTS: {
3087                 struct kvm_vcpu_events events;
3088
3089                 r = -EFAULT;
3090                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3091                         break;
3092
3093                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3094                 break;
3095         }
3096         case KVM_GET_DEBUGREGS: {
3097                 struct kvm_debugregs dbgregs;
3098
3099                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3100
3101                 r = -EFAULT;
3102                 if (copy_to_user(argp, &dbgregs,
3103                                  sizeof(struct kvm_debugregs)))
3104                         break;
3105                 r = 0;
3106                 break;
3107         }
3108         case KVM_SET_DEBUGREGS: {
3109                 struct kvm_debugregs dbgregs;
3110
3111                 r = -EFAULT;
3112                 if (copy_from_user(&dbgregs, argp,
3113                                    sizeof(struct kvm_debugregs)))
3114                         break;
3115
3116                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3117                 break;
3118         }
3119         case KVM_GET_XSAVE: {
3120                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3121                 r = -ENOMEM;
3122                 if (!u.xsave)
3123                         break;
3124
3125                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3126
3127                 r = -EFAULT;
3128                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3129                         break;
3130                 r = 0;
3131                 break;
3132         }
3133         case KVM_SET_XSAVE: {
3134                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3135                 r = -ENOMEM;
3136                 if (!u.xsave)
3137                         break;
3138
3139                 r = -EFAULT;
3140                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3141                         break;
3142
3143                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3144                 break;
3145         }
3146         case KVM_GET_XCRS: {
3147                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3148                 r = -ENOMEM;
3149                 if (!u.xcrs)
3150                         break;
3151
3152                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3153
3154                 r = -EFAULT;
3155                 if (copy_to_user(argp, u.xcrs,
3156                                  sizeof(struct kvm_xcrs)))
3157                         break;
3158                 r = 0;
3159                 break;
3160         }
3161         case KVM_SET_XCRS: {
3162                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3163                 r = -ENOMEM;
3164                 if (!u.xcrs)
3165                         break;
3166
3167                 r = -EFAULT;
3168                 if (copy_from_user(u.xcrs, argp,
3169                                    sizeof(struct kvm_xcrs)))
3170                         break;
3171
3172                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3173                 break;
3174         }
3175         case KVM_SET_TSC_KHZ: {
3176                 u32 user_tsc_khz;
3177
3178                 r = -EINVAL;
3179                 if (!kvm_has_tsc_control)
3180                         break;
3181
3182                 user_tsc_khz = (u32)arg;
3183
3184                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3185                         goto out;
3186
3187                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3188
3189                 r = 0;
3190                 goto out;
3191         }
3192         case KVM_GET_TSC_KHZ: {
3193                 r = -EIO;
3194                 if (check_tsc_unstable())
3195                         goto out;
3196
3197                 r = vcpu_tsc_khz(vcpu);
3198
3199                 goto out;
3200         }
3201         default:
3202                 r = -EINVAL;
3203         }
3204 out:
3205         kfree(u.buffer);
3206         return r;
3207 }
3208
3209 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3210 {
3211         int ret;
3212
3213         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3214                 return -1;
3215         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3216         return ret;
3217 }
3218
3219 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3220                                               u64 ident_addr)
3221 {
3222         kvm->arch.ept_identity_map_addr = ident_addr;
3223         return 0;
3224 }
3225
3226 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3227                                           u32 kvm_nr_mmu_pages)
3228 {
3229         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3230                 return -EINVAL;
3231
3232         mutex_lock(&kvm->slots_lock);
3233         spin_lock(&kvm->mmu_lock);
3234
3235         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3236         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3237
3238         spin_unlock(&kvm->mmu_lock);
3239         mutex_unlock(&kvm->slots_lock);
3240         return 0;
3241 }
3242
3243 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3244 {
3245         return kvm->arch.n_max_mmu_pages;
3246 }
3247
3248 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3249 {
3250         int r;
3251
3252         r = 0;
3253         switch (chip->chip_id) {
3254         case KVM_IRQCHIP_PIC_MASTER:
3255                 memcpy(&chip->chip.pic,
3256                         &pic_irqchip(kvm)->pics[0],
3257                         sizeof(struct kvm_pic_state));
3258                 break;
3259         case KVM_IRQCHIP_PIC_SLAVE:
3260                 memcpy(&chip->chip.pic,
3261                         &pic_irqchip(kvm)->pics[1],
3262                         sizeof(struct kvm_pic_state));
3263                 break;
3264         case KVM_IRQCHIP_IOAPIC:
3265                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3266                 break;
3267         default:
3268                 r = -EINVAL;
3269                 break;
3270         }
3271         return r;
3272 }
3273
3274 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3275 {
3276         int r;
3277
3278         r = 0;
3279         switch (chip->chip_id) {
3280         case KVM_IRQCHIP_PIC_MASTER:
3281                 spin_lock(&pic_irqchip(kvm)->lock);
3282                 memcpy(&pic_irqchip(kvm)->pics[0],
3283                         &chip->chip.pic,
3284                         sizeof(struct kvm_pic_state));
3285                 spin_unlock(&pic_irqchip(kvm)->lock);
3286                 break;
3287         case KVM_IRQCHIP_PIC_SLAVE:
3288                 spin_lock(&pic_irqchip(kvm)->lock);
3289                 memcpy(&pic_irqchip(kvm)->pics[1],
3290                         &chip->chip.pic,
3291                         sizeof(struct kvm_pic_state));
3292                 spin_unlock(&pic_irqchip(kvm)->lock);
3293                 break;
3294         case KVM_IRQCHIP_IOAPIC:
3295                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3296                 break;
3297         default:
3298                 r = -EINVAL;
3299                 break;
3300         }
3301         kvm_pic_update_irq(pic_irqchip(kvm));
3302         return r;
3303 }
3304
3305 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3306 {
3307         int r = 0;
3308
3309         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3310         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3311         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3312         return r;
3313 }
3314
3315 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3316 {
3317         int r = 0;
3318
3319         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3320         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3321         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3322         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3323         return r;
3324 }
3325
3326 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3327 {
3328         int r = 0;
3329
3330         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3331         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3332                 sizeof(ps->channels));
3333         ps->flags = kvm->arch.vpit->pit_state.flags;
3334         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3335         memset(&ps->reserved, 0, sizeof(ps->reserved));
3336         return r;
3337 }
3338
3339 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3340 {
3341         int r = 0, start = 0;
3342         u32 prev_legacy, cur_legacy;
3343         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3344         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3345         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3346         if (!prev_legacy && cur_legacy)
3347                 start = 1;
3348         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3349                sizeof(kvm->arch.vpit->pit_state.channels));
3350         kvm->arch.vpit->pit_state.flags = ps->flags;
3351         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3352         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3353         return r;
3354 }
3355
3356 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3357                                  struct kvm_reinject_control *control)
3358 {
3359         if (!kvm->arch.vpit)
3360                 return -ENXIO;
3361         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3362         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3363         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3364         return 0;
3365 }
3366
3367 /*
3368  * Get (and clear) the dirty memory log for a memory slot.
3369  */
3370 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3371                                       struct kvm_dirty_log *log)
3372 {
3373         int r, i;
3374         struct kvm_memory_slot *memslot;
3375         unsigned long n;
3376         unsigned long is_dirty = 0;
3377
3378         mutex_lock(&kvm->slots_lock);
3379
3380         r = -EINVAL;
3381         if (log->slot >= KVM_MEMORY_SLOTS)
3382                 goto out;
3383
3384         memslot = &kvm->memslots->memslots[log->slot];
3385         r = -ENOENT;
3386         if (!memslot->dirty_bitmap)
3387                 goto out;
3388
3389         n = kvm_dirty_bitmap_bytes(memslot);
3390
3391         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3392                 is_dirty = memslot->dirty_bitmap[i];
3393
3394         /* If nothing is dirty, don't bother messing with page tables. */
3395         if (is_dirty) {
3396                 struct kvm_memslots *slots, *old_slots;
3397                 unsigned long *dirty_bitmap;
3398
3399                 dirty_bitmap = memslot->dirty_bitmap_head;
3400                 if (memslot->dirty_bitmap == dirty_bitmap)
3401                         dirty_bitmap += n / sizeof(long);
3402                 memset(dirty_bitmap, 0, n);
3403
3404                 r = -ENOMEM;
3405                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3406                 if (!slots)
3407                         goto out;
3408                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3409                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3410                 slots->generation++;
3411
3412                 old_slots = kvm->memslots;
3413                 rcu_assign_pointer(kvm->memslots, slots);
3414                 synchronize_srcu_expedited(&kvm->srcu);
3415                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3416                 kfree(old_slots);
3417
3418                 spin_lock(&kvm->mmu_lock);
3419                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3420                 spin_unlock(&kvm->mmu_lock);
3421
3422                 r = -EFAULT;
3423                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3424                         goto out;
3425         } else {
3426                 r = -EFAULT;
3427                 if (clear_user(log->dirty_bitmap, n))
3428                         goto out;
3429         }
3430
3431         r = 0;
3432 out:
3433         mutex_unlock(&kvm->slots_lock);
3434         return r;
3435 }
3436
3437 long kvm_arch_vm_ioctl(struct file *filp,
3438                        unsigned int ioctl, unsigned long arg)
3439 {
3440         struct kvm *kvm = filp->private_data;
3441         void __user *argp = (void __user *)arg;
3442         int r = -ENOTTY;
3443         /*
3444          * This union makes it completely explicit to gcc-3.x
3445          * that these two variables' stack usage should be
3446          * combined, not added together.
3447          */
3448         union {
3449                 struct kvm_pit_state ps;
3450                 struct kvm_pit_state2 ps2;
3451                 struct kvm_pit_config pit_config;
3452         } u;
3453
3454         switch (ioctl) {
3455         case KVM_SET_TSS_ADDR:
3456                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3457                 if (r < 0)
3458                         goto out;
3459                 break;
3460         case KVM_SET_IDENTITY_MAP_ADDR: {
3461                 u64 ident_addr;
3462
3463                 r = -EFAULT;
3464                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3465                         goto out;
3466                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3467                 if (r < 0)
3468                         goto out;
3469                 break;
3470         }
3471         case KVM_SET_NR_MMU_PAGES:
3472                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3473                 if (r)
3474                         goto out;
3475                 break;
3476         case KVM_GET_NR_MMU_PAGES:
3477                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3478                 break;
3479         case KVM_CREATE_IRQCHIP: {
3480                 struct kvm_pic *vpic;
3481
3482                 mutex_lock(&kvm->lock);
3483                 r = -EEXIST;
3484                 if (kvm->arch.vpic)
3485                         goto create_irqchip_unlock;
3486                 r = -ENOMEM;
3487                 vpic = kvm_create_pic(kvm);
3488                 if (vpic) {
3489                         r = kvm_ioapic_init(kvm);
3490                         if (r) {
3491                                 mutex_lock(&kvm->slots_lock);
3492                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3493                                                           &vpic->dev);
3494                                 mutex_unlock(&kvm->slots_lock);
3495                                 kfree(vpic);
3496                                 goto create_irqchip_unlock;
3497                         }
3498                 } else
3499                         goto create_irqchip_unlock;
3500                 smp_wmb();
3501                 kvm->arch.vpic = vpic;
3502                 smp_wmb();
3503                 r = kvm_setup_default_irq_routing(kvm);
3504                 if (r) {
3505                         mutex_lock(&kvm->slots_lock);
3506                         mutex_lock(&kvm->irq_lock);
3507                         kvm_ioapic_destroy(kvm);
3508                         kvm_destroy_pic(kvm);
3509                         mutex_unlock(&kvm->irq_lock);
3510                         mutex_unlock(&kvm->slots_lock);
3511                 }
3512         create_irqchip_unlock:
3513                 mutex_unlock(&kvm->lock);
3514                 break;
3515         }
3516         case KVM_CREATE_PIT:
3517                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3518                 goto create_pit;
3519         case KVM_CREATE_PIT2:
3520                 r = -EFAULT;
3521                 if (copy_from_user(&u.pit_config, argp,
3522                                    sizeof(struct kvm_pit_config)))
3523                         goto out;
3524         create_pit:
3525                 mutex_lock(&kvm->slots_lock);
3526                 r = -EEXIST;
3527                 if (kvm->arch.vpit)
3528                         goto create_pit_unlock;
3529                 r = -ENOMEM;
3530                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3531                 if (kvm->arch.vpit)
3532                         r = 0;
3533         create_pit_unlock:
3534                 mutex_unlock(&kvm->slots_lock);
3535                 break;
3536         case KVM_IRQ_LINE_STATUS:
3537         case KVM_IRQ_LINE: {
3538                 struct kvm_irq_level irq_event;
3539
3540                 r = -EFAULT;
3541                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3542                         goto out;
3543                 r = -ENXIO;
3544                 if (irqchip_in_kernel(kvm)) {
3545                         __s32 status;
3546                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3547                                         irq_event.irq, irq_event.level);
3548                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3549                                 r = -EFAULT;
3550                                 irq_event.status = status;
3551                                 if (copy_to_user(argp, &irq_event,
3552                                                         sizeof irq_event))
3553                                         goto out;
3554                         }
3555                         r = 0;
3556                 }
3557                 break;
3558         }
3559         case KVM_GET_IRQCHIP: {
3560                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3561                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3562
3563                 r = -ENOMEM;
3564                 if (!chip)
3565                         goto out;
3566                 r = -EFAULT;
3567                 if (copy_from_user(chip, argp, sizeof *chip))
3568                         goto get_irqchip_out;
3569                 r = -ENXIO;
3570                 if (!irqchip_in_kernel(kvm))
3571                         goto get_irqchip_out;
3572                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3573                 if (r)
3574                         goto get_irqchip_out;
3575                 r = -EFAULT;
3576                 if (copy_to_user(argp, chip, sizeof *chip))
3577                         goto get_irqchip_out;
3578                 r = 0;
3579         get_irqchip_out:
3580                 kfree(chip);
3581                 if (r)
3582                         goto out;
3583                 break;
3584         }
3585         case KVM_SET_IRQCHIP: {
3586                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3587                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3588
3589                 r = -ENOMEM;
3590                 if (!chip)
3591                         goto out;
3592                 r = -EFAULT;
3593                 if (copy_from_user(chip, argp, sizeof *chip))
3594                         goto set_irqchip_out;
3595                 r = -ENXIO;
3596                 if (!irqchip_in_kernel(kvm))
3597                         goto set_irqchip_out;
3598                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3599                 if (r)
3600                         goto set_irqchip_out;
3601                 r = 0;
3602         set_irqchip_out:
3603                 kfree(chip);
3604                 if (r)
3605                         goto out;
3606                 break;
3607         }
3608         case KVM_GET_PIT: {
3609                 r = -EFAULT;
3610                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3611                         goto out;
3612                 r = -ENXIO;
3613                 if (!kvm->arch.vpit)
3614                         goto out;
3615                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3616                 if (r)
3617                         goto out;
3618                 r = -EFAULT;
3619                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3620                         goto out;
3621                 r = 0;
3622                 break;
3623         }
3624         case KVM_SET_PIT: {
3625                 r = -EFAULT;
3626                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3627                         goto out;
3628                 r = -ENXIO;
3629                 if (!kvm->arch.vpit)
3630                         goto out;
3631                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3632                 if (r)
3633                         goto out;
3634                 r = 0;
3635                 break;
3636         }
3637         case KVM_GET_PIT2: {
3638                 r = -ENXIO;
3639                 if (!kvm->arch.vpit)
3640                         goto out;
3641                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3642                 if (r)
3643                         goto out;
3644                 r = -EFAULT;
3645                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3646                         goto out;
3647                 r = 0;
3648                 break;
3649         }
3650         case KVM_SET_PIT2: {
3651                 r = -EFAULT;
3652                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3653                         goto out;
3654                 r = -ENXIO;
3655                 if (!kvm->arch.vpit)
3656                         goto out;
3657                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3658                 if (r)
3659                         goto out;
3660                 r = 0;
3661                 break;
3662         }
3663         case KVM_REINJECT_CONTROL: {
3664                 struct kvm_reinject_control control;
3665                 r =  -EFAULT;
3666                 if (copy_from_user(&control, argp, sizeof(control)))
3667                         goto out;
3668                 r = kvm_vm_ioctl_reinject(kvm, &control);
3669                 if (r)
3670                         goto out;
3671                 r = 0;
3672                 break;
3673         }
3674         case KVM_XEN_HVM_CONFIG: {
3675                 r = -EFAULT;
3676                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3677                                    sizeof(struct kvm_xen_hvm_config)))
3678                         goto out;
3679                 r = -EINVAL;
3680                 if (kvm->arch.xen_hvm_config.flags)
3681                         goto out;
3682                 r = 0;
3683                 break;
3684         }
3685         case KVM_SET_CLOCK: {
3686                 struct kvm_clock_data user_ns;
3687                 u64 now_ns;
3688                 s64 delta;
3689
3690                 r = -EFAULT;
3691                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3692                         goto out;
3693
3694                 r = -EINVAL;
3695                 if (user_ns.flags)
3696                         goto out;
3697
3698                 r = 0;
3699                 local_irq_disable();
3700                 now_ns = get_kernel_ns();
3701                 delta = user_ns.clock - now_ns;
3702                 local_irq_enable();
3703                 kvm->arch.kvmclock_offset = delta;
3704                 break;
3705         }
3706         case KVM_GET_CLOCK: {
3707                 struct kvm_clock_data user_ns;
3708                 u64 now_ns;
3709
3710                 local_irq_disable();
3711                 now_ns = get_kernel_ns();
3712                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3713                 local_irq_enable();
3714                 user_ns.flags = 0;
3715                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3716
3717                 r = -EFAULT;
3718                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3719                         goto out;
3720                 r = 0;
3721                 break;
3722         }
3723
3724         default:
3725                 ;
3726         }
3727 out:
3728         return r;
3729 }
3730
3731 static void kvm_init_msr_list(void)
3732 {
3733         u32 dummy[2];
3734         unsigned i, j;
3735
3736         /* skip the first msrs in the list. KVM-specific */
3737         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3738                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3739                         continue;
3740                 if (j < i)
3741                         msrs_to_save[j] = msrs_to_save[i];
3742                 j++;
3743         }
3744         num_msrs_to_save = j;
3745 }
3746
3747 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3748                            const void *v)
3749 {
3750         int handled = 0;
3751         int n;
3752
3753         do {
3754                 n = min(len, 8);
3755                 if (!(vcpu->arch.apic &&
3756                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3757                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3758                         break;
3759                 handled += n;
3760                 addr += n;
3761                 len -= n;
3762                 v += n;
3763         } while (len);
3764
3765         return handled;
3766 }
3767
3768 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3769 {
3770         int handled = 0;
3771         int n;
3772
3773         do {
3774                 n = min(len, 8);
3775                 if (!(vcpu->arch.apic &&
3776                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3777                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3778                         break;
3779                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3780                 handled += n;
3781                 addr += n;
3782                 len -= n;
3783                 v += n;
3784         } while (len);
3785
3786         return handled;
3787 }
3788
3789 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3790                         struct kvm_segment *var, int seg)
3791 {
3792         kvm_x86_ops->set_segment(vcpu, var, seg);
3793 }
3794
3795 void kvm_get_segment(struct kvm_vcpu *vcpu,
3796                      struct kvm_segment *var, int seg)
3797 {
3798         kvm_x86_ops->get_segment(vcpu, var, seg);
3799 }
3800
3801 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3802 {
3803         return gpa;
3804 }
3805
3806 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3807 {
3808         gpa_t t_gpa;
3809         struct x86_exception exception;
3810
3811         BUG_ON(!mmu_is_nested(vcpu));
3812
3813         /* NPT walks are always user-walks */
3814         access |= PFERR_USER_MASK;
3815         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3816
3817         return t_gpa;
3818 }
3819
3820 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3821                               struct x86_exception *exception)
3822 {
3823         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3824         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3825 }
3826
3827  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3828                                 struct x86_exception *exception)
3829 {
3830         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3831         access |= PFERR_FETCH_MASK;
3832         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3833 }
3834
3835 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3836                                struct x86_exception *exception)
3837 {
3838         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3839         access |= PFERR_WRITE_MASK;
3840         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3841 }
3842
3843 /* uses this to access any guest's mapped memory without checking CPL */
3844 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3845                                 struct x86_exception *exception)
3846 {
3847         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3848 }
3849
3850 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3851                                       struct kvm_vcpu *vcpu, u32 access,
3852                                       struct x86_exception *exception)
3853 {
3854         void *data = val;
3855         int r = X86EMUL_CONTINUE;
3856
3857         while (bytes) {
3858                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3859                                                             exception);
3860                 unsigned offset = addr & (PAGE_SIZE-1);
3861                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3862                 int ret;
3863
3864                 if (gpa == UNMAPPED_GVA)
3865                         return X86EMUL_PROPAGATE_FAULT;
3866                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3867                 if (ret < 0) {
3868                         r = X86EMUL_IO_NEEDED;
3869                         goto out;
3870                 }
3871
3872                 bytes -= toread;
3873                 data += toread;
3874                 addr += toread;
3875         }
3876 out:
3877         return r;
3878 }
3879
3880 /* used for instruction fetching */
3881 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3882                                 gva_t addr, void *val, unsigned int bytes,
3883                                 struct x86_exception *exception)
3884 {
3885         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3886         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3887
3888         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3889                                           access | PFERR_FETCH_MASK,
3890                                           exception);
3891 }
3892
3893 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3894                                gva_t addr, void *val, unsigned int bytes,
3895                                struct x86_exception *exception)
3896 {
3897         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3898         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3899
3900         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3901                                           exception);
3902 }
3903 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3904
3905 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3906                                       gva_t addr, void *val, unsigned int bytes,
3907                                       struct x86_exception *exception)
3908 {
3909         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3910         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3911 }
3912
3913 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3914                                        gva_t addr, void *val,
3915                                        unsigned int bytes,
3916                                        struct x86_exception *exception)
3917 {
3918         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3919         void *data = val;
3920         int r = X86EMUL_CONTINUE;
3921
3922         while (bytes) {
3923                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3924                                                              PFERR_WRITE_MASK,
3925                                                              exception);
3926                 unsigned offset = addr & (PAGE_SIZE-1);
3927                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3928                 int ret;
3929
3930                 if (gpa == UNMAPPED_GVA)
3931                         return X86EMUL_PROPAGATE_FAULT;
3932                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3933                 if (ret < 0) {
3934                         r = X86EMUL_IO_NEEDED;
3935                         goto out;
3936                 }
3937
3938                 bytes -= towrite;
3939                 data += towrite;
3940                 addr += towrite;
3941         }
3942 out:
3943         return r;
3944 }
3945 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3946
3947 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3948                                   unsigned long addr,
3949                                   void *val,
3950                                   unsigned int bytes,
3951                                   struct x86_exception *exception)
3952 {
3953         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3954         gpa_t                 gpa;
3955         int handled;
3956
3957         if (vcpu->mmio_read_completed) {
3958                 memcpy(val, vcpu->mmio_data, bytes);
3959                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3960                                vcpu->mmio_phys_addr, *(u64 *)val);
3961                 vcpu->mmio_read_completed = 0;
3962                 return X86EMUL_CONTINUE;
3963         }
3964
3965         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, exception);
3966
3967         if (gpa == UNMAPPED_GVA)
3968                 return X86EMUL_PROPAGATE_FAULT;
3969
3970         /* For APIC access vmexit */
3971         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3972                 goto mmio;
3973
3974         if (kvm_read_guest_virt(ctxt, addr, val, bytes, exception)
3975             == X86EMUL_CONTINUE)
3976                 return X86EMUL_CONTINUE;
3977
3978 mmio:
3979         /*
3980          * Is this MMIO handled locally?
3981          */
3982         handled = vcpu_mmio_read(vcpu, gpa, bytes, val);
3983
3984         if (handled == bytes)
3985                 return X86EMUL_CONTINUE;
3986
3987         gpa += handled;
3988         bytes -= handled;
3989         val += handled;
3990
3991         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3992
3993         vcpu->mmio_needed = 1;
3994         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3995         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3996         vcpu->mmio_size = bytes;
3997         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3998         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3999         vcpu->mmio_index = 0;
4000
4001         return X86EMUL_IO_NEEDED;
4002 }
4003
4004 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4005                         const void *val, int bytes)
4006 {
4007         int ret;
4008
4009         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4010         if (ret < 0)
4011                 return 0;
4012         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
4013         return 1;
4014 }
4015
4016 static int emulator_write_emulated_onepage(unsigned long addr,
4017                                            const void *val,
4018                                            unsigned int bytes,
4019                                            struct x86_exception *exception,
4020                                            struct kvm_vcpu *vcpu)
4021 {
4022         gpa_t                 gpa;
4023         int handled;
4024
4025         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, exception);
4026
4027         if (gpa == UNMAPPED_GVA)
4028                 return X86EMUL_PROPAGATE_FAULT;
4029
4030         /* For APIC access vmexit */
4031         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4032                 goto mmio;
4033
4034         if (emulator_write_phys(vcpu, gpa, val, bytes))
4035                 return X86EMUL_CONTINUE;
4036
4037 mmio:
4038         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4039         /*
4040          * Is this MMIO handled locally?
4041          */
4042         handled = vcpu_mmio_write(vcpu, gpa, bytes, val);
4043         if (handled == bytes)
4044                 return X86EMUL_CONTINUE;
4045
4046         gpa += handled;
4047         bytes -= handled;
4048         val += handled;
4049
4050         vcpu->mmio_needed = 1;
4051         memcpy(vcpu->mmio_data, val, bytes);
4052         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4053         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4054         vcpu->mmio_size = bytes;
4055         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4056         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
4057         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4058         vcpu->mmio_index = 0;
4059
4060         return X86EMUL_CONTINUE;
4061 }
4062
4063 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4064                             unsigned long addr,
4065                             const void *val,
4066                             unsigned int bytes,
4067                             struct x86_exception *exception)
4068 {
4069         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4070
4071         /* Crossing a page boundary? */
4072         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4073                 int rc, now;
4074
4075                 now = -addr & ~PAGE_MASK;
4076                 rc = emulator_write_emulated_onepage(addr, val, now, exception,
4077                                                      vcpu);
4078                 if (rc != X86EMUL_CONTINUE)
4079                         return rc;
4080                 addr += now;
4081                 val += now;
4082                 bytes -= now;
4083         }
4084         return emulator_write_emulated_onepage(addr, val, bytes, exception,
4085                                                vcpu);
4086 }
4087
4088 #define CMPXCHG_TYPE(t, ptr, old, new) \
4089         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4090
4091 #ifdef CONFIG_X86_64
4092 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4093 #else
4094 #  define CMPXCHG64(ptr, old, new) \
4095         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4096 #endif
4097
4098 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4099                                      unsigned long addr,
4100                                      const void *old,
4101                                      const void *new,
4102                                      unsigned int bytes,
4103                                      struct x86_exception *exception)
4104 {
4105         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4106         gpa_t gpa;
4107         struct page *page;
4108         char *kaddr;
4109         bool exchanged;
4110
4111         /* guests cmpxchg8b have to be emulated atomically */
4112         if (bytes > 8 || (bytes & (bytes - 1)))
4113                 goto emul_write;
4114
4115         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4116
4117         if (gpa == UNMAPPED_GVA ||
4118             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4119                 goto emul_write;
4120
4121         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4122                 goto emul_write;
4123
4124         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4125         if (is_error_page(page)) {
4126                 kvm_release_page_clean(page);
4127                 goto emul_write;
4128         }
4129
4130         kaddr = kmap_atomic(page, KM_USER0);
4131         kaddr += offset_in_page(gpa);
4132         switch (bytes) {
4133         case 1:
4134                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4135                 break;
4136         case 2:
4137                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4138                 break;
4139         case 4:
4140                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4141                 break;
4142         case 8:
4143                 exchanged = CMPXCHG64(kaddr, old, new);
4144                 break;
4145         default:
4146                 BUG();
4147         }
4148         kunmap_atomic(kaddr, KM_USER0);
4149         kvm_release_page_dirty(page);
4150
4151         if (!exchanged)
4152                 return X86EMUL_CMPXCHG_FAILED;
4153
4154         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4155
4156         return X86EMUL_CONTINUE;
4157
4158 emul_write:
4159         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4160
4161         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4162 }
4163
4164 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4165 {
4166         /* TODO: String I/O for in kernel device */
4167         int r;
4168
4169         if (vcpu->arch.pio.in)
4170                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4171                                     vcpu->arch.pio.size, pd);
4172         else
4173                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4174                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4175                                      pd);
4176         return r;
4177 }
4178
4179
4180 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4181                                     int size, unsigned short port, void *val,
4182                                     unsigned int count)
4183 {
4184         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4185
4186         if (vcpu->arch.pio.count)
4187                 goto data_avail;
4188
4189         trace_kvm_pio(0, port, size, count);
4190
4191         vcpu->arch.pio.port = port;
4192         vcpu->arch.pio.in = 1;
4193         vcpu->arch.pio.count  = count;
4194         vcpu->arch.pio.size = size;
4195
4196         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4197         data_avail:
4198                 memcpy(val, vcpu->arch.pio_data, size * count);
4199                 vcpu->arch.pio.count = 0;
4200                 return 1;
4201         }
4202
4203         vcpu->run->exit_reason = KVM_EXIT_IO;
4204         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4205         vcpu->run->io.size = size;
4206         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4207         vcpu->run->io.count = count;
4208         vcpu->run->io.port = port;
4209
4210         return 0;
4211 }
4212
4213 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4214                                      int size, unsigned short port,
4215                                      const void *val, unsigned int count)
4216 {
4217         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4218
4219         trace_kvm_pio(1, port, size, count);
4220
4221         vcpu->arch.pio.port = port;
4222         vcpu->arch.pio.in = 0;
4223         vcpu->arch.pio.count = count;
4224         vcpu->arch.pio.size = size;
4225
4226         memcpy(vcpu->arch.pio_data, val, size * count);
4227
4228         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4229                 vcpu->arch.pio.count = 0;
4230                 return 1;
4231         }
4232
4233         vcpu->run->exit_reason = KVM_EXIT_IO;
4234         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4235         vcpu->run->io.size = size;
4236         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4237         vcpu->run->io.count = count;
4238         vcpu->run->io.port = port;
4239
4240         return 0;
4241 }
4242
4243 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4244 {
4245         return kvm_x86_ops->get_segment_base(vcpu, seg);
4246 }
4247
4248 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4249 {
4250         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4251 }
4252
4253 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4254 {
4255         if (!need_emulate_wbinvd(vcpu))
4256                 return X86EMUL_CONTINUE;
4257
4258         if (kvm_x86_ops->has_wbinvd_exit()) {
4259                 int cpu = get_cpu();
4260
4261                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4262                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4263                                 wbinvd_ipi, NULL, 1);
4264                 put_cpu();
4265                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4266         } else
4267                 wbinvd();
4268         return X86EMUL_CONTINUE;
4269 }
4270 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4271
4272 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4273 {
4274         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4275 }
4276
4277 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4278 {
4279         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4280 }
4281
4282 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4283 {
4284
4285         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4286 }
4287
4288 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4289 {
4290         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4291 }
4292
4293 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4294 {
4295         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4296         unsigned long value;
4297
4298         switch (cr) {
4299         case 0:
4300                 value = kvm_read_cr0(vcpu);
4301                 break;
4302         case 2:
4303                 value = vcpu->arch.cr2;
4304                 break;
4305         case 3:
4306                 value = kvm_read_cr3(vcpu);
4307                 break;
4308         case 4:
4309                 value = kvm_read_cr4(vcpu);
4310                 break;
4311         case 8:
4312                 value = kvm_get_cr8(vcpu);
4313                 break;
4314         default:
4315                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4316                 return 0;
4317         }
4318
4319         return value;
4320 }
4321
4322 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4323 {
4324         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4325         int res = 0;
4326
4327         switch (cr) {
4328         case 0:
4329                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4330                 break;
4331         case 2:
4332                 vcpu->arch.cr2 = val;
4333                 break;
4334         case 3:
4335                 res = kvm_set_cr3(vcpu, val);
4336                 break;
4337         case 4:
4338                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4339                 break;
4340         case 8:
4341                 res = kvm_set_cr8(vcpu, val);
4342                 break;
4343         default:
4344                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4345                 res = -1;
4346         }
4347
4348         return res;
4349 }
4350
4351 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4352 {
4353         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4354 }
4355
4356 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4357 {
4358         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4359 }
4360
4361 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4362 {
4363         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4364 }
4365
4366 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4367 {
4368         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4369 }
4370
4371 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4372 {
4373         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4374 }
4375
4376 static unsigned long emulator_get_cached_segment_base(
4377         struct x86_emulate_ctxt *ctxt, int seg)
4378 {
4379         return get_segment_base(emul_to_vcpu(ctxt), seg);
4380 }
4381
4382 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4383                                  struct desc_struct *desc, u32 *base3,
4384                                  int seg)
4385 {
4386         struct kvm_segment var;
4387
4388         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4389         *selector = var.selector;
4390
4391         if (var.unusable)
4392                 return false;
4393
4394         if (var.g)
4395                 var.limit >>= 12;
4396         set_desc_limit(desc, var.limit);
4397         set_desc_base(desc, (unsigned long)var.base);
4398 #ifdef CONFIG_X86_64
4399         if (base3)
4400                 *base3 = var.base >> 32;
4401 #endif
4402         desc->type = var.type;
4403         desc->s = var.s;
4404         desc->dpl = var.dpl;
4405         desc->p = var.present;
4406         desc->avl = var.avl;
4407         desc->l = var.l;
4408         desc->d = var.db;
4409         desc->g = var.g;
4410
4411         return true;
4412 }
4413
4414 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4415                                  struct desc_struct *desc, u32 base3,
4416                                  int seg)
4417 {
4418         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4419         struct kvm_segment var;
4420
4421         var.selector = selector;
4422         var.base = get_desc_base(desc);
4423 #ifdef CONFIG_X86_64
4424         var.base |= ((u64)base3) << 32;
4425 #endif
4426         var.limit = get_desc_limit(desc);
4427         if (desc->g)
4428                 var.limit = (var.limit << 12) | 0xfff;
4429         var.type = desc->type;
4430         var.present = desc->p;
4431         var.dpl = desc->dpl;
4432         var.db = desc->d;
4433         var.s = desc->s;
4434         var.l = desc->l;
4435         var.g = desc->g;
4436         var.avl = desc->avl;
4437         var.present = desc->p;
4438         var.unusable = !var.present;
4439         var.padding = 0;
4440
4441         kvm_set_segment(vcpu, &var, seg);
4442         return;
4443 }
4444
4445 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4446                             u32 msr_index, u64 *pdata)
4447 {
4448         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4449 }
4450
4451 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4452                             u32 msr_index, u64 data)
4453 {
4454         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4455 }
4456
4457 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4458 {
4459         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4460 }
4461
4462 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4463 {
4464         preempt_disable();
4465         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4466         /*
4467          * CR0.TS may reference the host fpu state, not the guest fpu state,
4468          * so it may be clear at this point.
4469          */
4470         clts();
4471 }
4472
4473 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4474 {
4475         preempt_enable();
4476 }
4477
4478 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4479                               struct x86_instruction_info *info,
4480                               enum x86_intercept_stage stage)
4481 {
4482         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4483 }
4484
4485 static struct x86_emulate_ops emulate_ops = {
4486         .read_std            = kvm_read_guest_virt_system,
4487         .write_std           = kvm_write_guest_virt_system,
4488         .fetch               = kvm_fetch_guest_virt,
4489         .read_emulated       = emulator_read_emulated,
4490         .write_emulated      = emulator_write_emulated,
4491         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4492         .invlpg              = emulator_invlpg,
4493         .pio_in_emulated     = emulator_pio_in_emulated,
4494         .pio_out_emulated    = emulator_pio_out_emulated,
4495         .get_segment         = emulator_get_segment,
4496         .set_segment         = emulator_set_segment,
4497         .get_cached_segment_base = emulator_get_cached_segment_base,
4498         .get_gdt             = emulator_get_gdt,
4499         .get_idt             = emulator_get_idt,
4500         .set_gdt             = emulator_set_gdt,
4501         .set_idt             = emulator_set_idt,
4502         .get_cr              = emulator_get_cr,
4503         .set_cr              = emulator_set_cr,
4504         .cpl                 = emulator_get_cpl,
4505         .get_dr              = emulator_get_dr,
4506         .set_dr              = emulator_set_dr,
4507         .set_msr             = emulator_set_msr,
4508         .get_msr             = emulator_get_msr,
4509         .halt                = emulator_halt,
4510         .wbinvd              = emulator_wbinvd,
4511         .fix_hypercall       = emulator_fix_hypercall,
4512         .get_fpu             = emulator_get_fpu,
4513         .put_fpu             = emulator_put_fpu,
4514         .intercept           = emulator_intercept,
4515 };
4516
4517 static void cache_all_regs(struct kvm_vcpu *vcpu)
4518 {
4519         kvm_register_read(vcpu, VCPU_REGS_RAX);
4520         kvm_register_read(vcpu, VCPU_REGS_RSP);
4521         kvm_register_read(vcpu, VCPU_REGS_RIP);
4522         vcpu->arch.regs_dirty = ~0;
4523 }
4524
4525 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4526 {
4527         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4528         /*
4529          * an sti; sti; sequence only disable interrupts for the first
4530          * instruction. So, if the last instruction, be it emulated or
4531          * not, left the system with the INT_STI flag enabled, it
4532          * means that the last instruction is an sti. We should not
4533          * leave the flag on in this case. The same goes for mov ss
4534          */
4535         if (!(int_shadow & mask))
4536                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4537 }
4538
4539 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4540 {
4541         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4542         if (ctxt->exception.vector == PF_VECTOR)
4543                 kvm_propagate_fault(vcpu, &ctxt->exception);
4544         else if (ctxt->exception.error_code_valid)
4545                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4546                                       ctxt->exception.error_code);
4547         else
4548                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4549 }
4550
4551 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4552                               const unsigned long *regs)
4553 {
4554         memset(&ctxt->twobyte, 0,
4555                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4556         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4557
4558         ctxt->fetch.start = 0;
4559         ctxt->fetch.end = 0;
4560         ctxt->io_read.pos = 0;
4561         ctxt->io_read.end = 0;
4562         ctxt->mem_read.pos = 0;
4563         ctxt->mem_read.end = 0;
4564 }
4565
4566 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4567 {
4568         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4569         int cs_db, cs_l;
4570
4571         /*
4572          * TODO: fix emulate.c to use guest_read/write_register
4573          * instead of direct ->regs accesses, can save hundred cycles
4574          * on Intel for instructions that don't read/change RSP, for
4575          * for example.
4576          */
4577         cache_all_regs(vcpu);
4578
4579         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4580
4581         ctxt->eflags = kvm_get_rflags(vcpu);
4582         ctxt->eip = kvm_rip_read(vcpu);
4583         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4584                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4585                      cs_l                               ? X86EMUL_MODE_PROT64 :
4586                      cs_db                              ? X86EMUL_MODE_PROT32 :
4587                                                           X86EMUL_MODE_PROT16;
4588         ctxt->guest_mode = is_guest_mode(vcpu);
4589
4590         init_decode_cache(ctxt, vcpu->arch.regs);
4591         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4592 }
4593
4594 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4595 {
4596         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4597         int ret;
4598
4599         init_emulate_ctxt(vcpu);
4600
4601         ctxt->op_bytes = 2;
4602         ctxt->ad_bytes = 2;
4603         ctxt->_eip = ctxt->eip + inc_eip;
4604         ret = emulate_int_real(ctxt, irq);
4605
4606         if (ret != X86EMUL_CONTINUE)
4607                 return EMULATE_FAIL;
4608
4609         ctxt->eip = ctxt->_eip;
4610         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4611         kvm_rip_write(vcpu, ctxt->eip);
4612         kvm_set_rflags(vcpu, ctxt->eflags);
4613
4614         if (irq == NMI_VECTOR)
4615                 vcpu->arch.nmi_pending = false;
4616         else
4617                 vcpu->arch.interrupt.pending = false;
4618
4619         return EMULATE_DONE;
4620 }
4621 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4622
4623 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4624 {
4625         int r = EMULATE_DONE;
4626
4627         ++vcpu->stat.insn_emulation_fail;
4628         trace_kvm_emulate_insn_failed(vcpu);
4629         if (!is_guest_mode(vcpu)) {
4630                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4631                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4632                 vcpu->run->internal.ndata = 0;
4633                 r = EMULATE_FAIL;
4634         }
4635         kvm_queue_exception(vcpu, UD_VECTOR);
4636
4637         return r;
4638 }
4639
4640 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4641 {
4642         gpa_t gpa;
4643
4644         if (tdp_enabled)
4645                 return false;
4646
4647         /*
4648          * if emulation was due to access to shadowed page table
4649          * and it failed try to unshadow page and re-entetr the
4650          * guest to let CPU execute the instruction.
4651          */
4652         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4653                 return true;
4654
4655         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4656
4657         if (gpa == UNMAPPED_GVA)
4658                 return true; /* let cpu generate fault */
4659
4660         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4661                 return true;
4662
4663         return false;
4664 }
4665
4666 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4667                             unsigned long cr2,
4668                             int emulation_type,
4669                             void *insn,
4670                             int insn_len)
4671 {
4672         int r;
4673         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4674         bool writeback = true;
4675
4676         kvm_clear_exception_queue(vcpu);
4677
4678         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4679                 init_emulate_ctxt(vcpu);
4680                 ctxt->interruptibility = 0;
4681                 ctxt->have_exception = false;
4682                 ctxt->perm_ok = false;
4683
4684                 ctxt->only_vendor_specific_insn
4685                         = emulation_type & EMULTYPE_TRAP_UD;
4686
4687                 r = x86_decode_insn(ctxt, insn, insn_len);
4688
4689                 trace_kvm_emulate_insn_start(vcpu);
4690                 ++vcpu->stat.insn_emulation;
4691                 if (r)  {
4692                         if (emulation_type & EMULTYPE_TRAP_UD)
4693                                 return EMULATE_FAIL;
4694                         if (reexecute_instruction(vcpu, cr2))
4695                                 return EMULATE_DONE;
4696                         if (emulation_type & EMULTYPE_SKIP)
4697                                 return EMULATE_FAIL;
4698                         return handle_emulation_failure(vcpu);
4699                 }
4700         }
4701
4702         if (emulation_type & EMULTYPE_SKIP) {
4703                 kvm_rip_write(vcpu, ctxt->_eip);
4704                 return EMULATE_DONE;
4705         }
4706
4707         /* this is needed for vmware backdoor interface to work since it
4708            changes registers values  during IO operation */
4709         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4710                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4711                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4712         }
4713
4714 restart:
4715         r = x86_emulate_insn(ctxt);
4716
4717         if (r == EMULATION_INTERCEPTED)
4718                 return EMULATE_DONE;
4719
4720         if (r == EMULATION_FAILED) {
4721                 if (reexecute_instruction(vcpu, cr2))
4722                         return EMULATE_DONE;
4723
4724                 return handle_emulation_failure(vcpu);
4725         }
4726
4727         if (ctxt->have_exception) {
4728                 inject_emulated_exception(vcpu);
4729                 r = EMULATE_DONE;
4730         } else if (vcpu->arch.pio.count) {
4731                 if (!vcpu->arch.pio.in)
4732                         vcpu->arch.pio.count = 0;
4733                 else
4734                         writeback = false;
4735                 r = EMULATE_DO_MMIO;
4736         } else if (vcpu->mmio_needed) {
4737                 if (!vcpu->mmio_is_write)
4738                         writeback = false;
4739                 r = EMULATE_DO_MMIO;
4740         } else if (r == EMULATION_RESTART)
4741                 goto restart;
4742         else
4743                 r = EMULATE_DONE;
4744
4745         if (writeback) {
4746                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4747                 kvm_set_rflags(vcpu, ctxt->eflags);
4748                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4749                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4750                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4751                 kvm_rip_write(vcpu, ctxt->eip);
4752         } else
4753                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4754
4755         return r;
4756 }
4757 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4758
4759 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4760 {
4761         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4762         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4763                                             size, port, &val, 1);
4764         /* do not return to emulator after return from userspace */
4765         vcpu->arch.pio.count = 0;
4766         return ret;
4767 }
4768 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4769
4770 static void tsc_bad(void *info)
4771 {
4772         __this_cpu_write(cpu_tsc_khz, 0);
4773 }
4774
4775 static void tsc_khz_changed(void *data)
4776 {
4777         struct cpufreq_freqs *freq = data;
4778         unsigned long khz = 0;
4779
4780         if (data)
4781                 khz = freq->new;
4782         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4783                 khz = cpufreq_quick_get(raw_smp_processor_id());
4784         if (!khz)
4785                 khz = tsc_khz;
4786         __this_cpu_write(cpu_tsc_khz, khz);
4787 }
4788
4789 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4790                                      void *data)
4791 {
4792         struct cpufreq_freqs *freq = data;
4793         struct kvm *kvm;
4794         struct kvm_vcpu *vcpu;
4795         int i, send_ipi = 0;
4796
4797         /*
4798          * We allow guests to temporarily run on slowing clocks,
4799          * provided we notify them after, or to run on accelerating
4800          * clocks, provided we notify them before.  Thus time never
4801          * goes backwards.
4802          *
4803          * However, we have a problem.  We can't atomically update
4804          * the frequency of a given CPU from this function; it is
4805          * merely a notifier, which can be called from any CPU.
4806          * Changing the TSC frequency at arbitrary points in time
4807          * requires a recomputation of local variables related to
4808          * the TSC for each VCPU.  We must flag these local variables
4809          * to be updated and be sure the update takes place with the
4810          * new frequency before any guests proceed.
4811          *
4812          * Unfortunately, the combination of hotplug CPU and frequency
4813          * change creates an intractable locking scenario; the order
4814          * of when these callouts happen is undefined with respect to
4815          * CPU hotplug, and they can race with each other.  As such,
4816          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4817          * undefined; you can actually have a CPU frequency change take
4818          * place in between the computation of X and the setting of the
4819          * variable.  To protect against this problem, all updates of
4820          * the per_cpu tsc_khz variable are done in an interrupt
4821          * protected IPI, and all callers wishing to update the value
4822          * must wait for a synchronous IPI to complete (which is trivial
4823          * if the caller is on the CPU already).  This establishes the
4824          * necessary total order on variable updates.
4825          *
4826          * Note that because a guest time update may take place
4827          * anytime after the setting of the VCPU's request bit, the
4828          * correct TSC value must be set before the request.  However,
4829          * to ensure the update actually makes it to any guest which
4830          * starts running in hardware virtualization between the set
4831          * and the acquisition of the spinlock, we must also ping the
4832          * CPU after setting the request bit.
4833          *
4834          */
4835
4836         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4837                 return 0;
4838         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4839                 return 0;
4840
4841         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4842
4843         raw_spin_lock(&kvm_lock);
4844         list_for_each_entry(kvm, &vm_list, vm_list) {
4845                 kvm_for_each_vcpu(i, vcpu, kvm) {
4846                         if (vcpu->cpu != freq->cpu)
4847                                 continue;
4848                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4849                         if (vcpu->cpu != smp_processor_id())
4850                                 send_ipi = 1;
4851                 }
4852         }
4853         raw_spin_unlock(&kvm_lock);
4854
4855         if (freq->old < freq->new && send_ipi) {
4856                 /*
4857                  * We upscale the frequency.  Must make the guest
4858                  * doesn't see old kvmclock values while running with
4859                  * the new frequency, otherwise we risk the guest sees
4860                  * time go backwards.
4861                  *
4862                  * In case we update the frequency for another cpu
4863                  * (which might be in guest context) send an interrupt
4864                  * to kick the cpu out of guest context.  Next time
4865                  * guest context is entered kvmclock will be updated,
4866                  * so the guest will not see stale values.
4867                  */
4868                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4869         }
4870         return 0;
4871 }
4872
4873 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4874         .notifier_call  = kvmclock_cpufreq_notifier
4875 };
4876
4877 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4878                                         unsigned long action, void *hcpu)
4879 {
4880         unsigned int cpu = (unsigned long)hcpu;
4881
4882         switch (action) {
4883                 case CPU_ONLINE:
4884                 case CPU_DOWN_FAILED:
4885                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4886                         break;
4887                 case CPU_DOWN_PREPARE:
4888                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4889                         break;
4890         }
4891         return NOTIFY_OK;
4892 }
4893
4894 static struct notifier_block kvmclock_cpu_notifier_block = {
4895         .notifier_call  = kvmclock_cpu_notifier,
4896         .priority = -INT_MAX
4897 };
4898
4899 static void kvm_timer_init(void)
4900 {
4901         int cpu;
4902
4903         max_tsc_khz = tsc_khz;
4904         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4905         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4906 #ifdef CONFIG_CPU_FREQ
4907                 struct cpufreq_policy policy;
4908                 memset(&policy, 0, sizeof(policy));
4909                 cpu = get_cpu();
4910                 cpufreq_get_policy(&policy, cpu);
4911                 if (policy.cpuinfo.max_freq)
4912                         max_tsc_khz = policy.cpuinfo.max_freq;
4913                 put_cpu();
4914 #endif
4915                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4916                                           CPUFREQ_TRANSITION_NOTIFIER);
4917         }
4918         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4919         for_each_online_cpu(cpu)
4920                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4921 }
4922
4923 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4924
4925 static int kvm_is_in_guest(void)
4926 {
4927         return percpu_read(current_vcpu) != NULL;
4928 }
4929
4930 static int kvm_is_user_mode(void)
4931 {
4932         int user_mode = 3;
4933
4934         if (percpu_read(current_vcpu))
4935                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4936
4937         return user_mode != 0;
4938 }
4939
4940 static unsigned long kvm_get_guest_ip(void)
4941 {
4942         unsigned long ip = 0;
4943
4944         if (percpu_read(current_vcpu))
4945                 ip = kvm_rip_read(percpu_read(current_vcpu));
4946
4947         return ip;
4948 }
4949
4950 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4951         .is_in_guest            = kvm_is_in_guest,
4952         .is_user_mode           = kvm_is_user_mode,
4953         .get_guest_ip           = kvm_get_guest_ip,
4954 };
4955
4956 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4957 {
4958         percpu_write(current_vcpu, vcpu);
4959 }
4960 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4961
4962 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4963 {
4964         percpu_write(current_vcpu, NULL);
4965 }
4966 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4967
4968 int kvm_arch_init(void *opaque)
4969 {
4970         int r;
4971         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4972
4973         if (kvm_x86_ops) {
4974                 printk(KERN_ERR "kvm: already loaded the other module\n");
4975                 r = -EEXIST;
4976                 goto out;
4977         }
4978
4979         if (!ops->cpu_has_kvm_support()) {
4980                 printk(KERN_ERR "kvm: no hardware support\n");
4981                 r = -EOPNOTSUPP;
4982                 goto out;
4983         }
4984         if (ops->disabled_by_bios()) {
4985                 printk(KERN_ERR "kvm: disabled by bios\n");
4986                 r = -EOPNOTSUPP;
4987                 goto out;
4988         }
4989
4990         r = kvm_mmu_module_init();
4991         if (r)
4992                 goto out;
4993
4994         kvm_init_msr_list();
4995
4996         kvm_x86_ops = ops;
4997         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4998         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4999                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5000
5001         kvm_timer_init();
5002
5003         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5004
5005         if (cpu_has_xsave)
5006                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5007
5008         return 0;
5009
5010 out:
5011         return r;
5012 }
5013
5014 void kvm_arch_exit(void)
5015 {
5016         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5017
5018         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5019                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5020                                             CPUFREQ_TRANSITION_NOTIFIER);
5021         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5022         kvm_x86_ops = NULL;
5023         kvm_mmu_module_exit();
5024 }
5025
5026 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5027 {
5028         ++vcpu->stat.halt_exits;
5029         if (irqchip_in_kernel(vcpu->kvm)) {
5030                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5031                 return 1;
5032         } else {
5033                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5034                 return 0;
5035         }
5036 }
5037 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5038
5039 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
5040                            unsigned long a1)
5041 {
5042         if (is_long_mode(vcpu))
5043                 return a0;
5044         else
5045                 return a0 | ((gpa_t)a1 << 32);
5046 }
5047
5048 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5049 {
5050         u64 param, ingpa, outgpa, ret;
5051         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5052         bool fast, longmode;
5053         int cs_db, cs_l;
5054
5055         /*
5056          * hypercall generates UD from non zero cpl and real mode
5057          * per HYPER-V spec
5058          */
5059         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5060                 kvm_queue_exception(vcpu, UD_VECTOR);
5061                 return 0;
5062         }
5063
5064         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5065         longmode = is_long_mode(vcpu) && cs_l == 1;
5066
5067         if (!longmode) {
5068                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5069                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5070                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5071                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5072                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5073                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5074         }
5075 #ifdef CONFIG_X86_64
5076         else {
5077                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5078                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5079                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5080         }
5081 #endif
5082
5083         code = param & 0xffff;
5084         fast = (param >> 16) & 0x1;
5085         rep_cnt = (param >> 32) & 0xfff;
5086         rep_idx = (param >> 48) & 0xfff;
5087
5088         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5089
5090         switch (code) {
5091         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5092                 kvm_vcpu_on_spin(vcpu);
5093                 break;
5094         default:
5095                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5096                 break;
5097         }
5098
5099         ret = res | (((u64)rep_done & 0xfff) << 32);
5100         if (longmode) {
5101                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5102         } else {
5103                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5104                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5105         }
5106
5107         return 1;
5108 }
5109
5110 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5111 {
5112         unsigned long nr, a0, a1, a2, a3, ret;
5113         int r = 1;
5114
5115         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5116                 return kvm_hv_hypercall(vcpu);
5117
5118         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5119         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5120         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5121         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5122         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5123
5124         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5125
5126         if (!is_long_mode(vcpu)) {
5127                 nr &= 0xFFFFFFFF;
5128                 a0 &= 0xFFFFFFFF;
5129                 a1 &= 0xFFFFFFFF;
5130                 a2 &= 0xFFFFFFFF;
5131                 a3 &= 0xFFFFFFFF;
5132         }
5133
5134         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5135                 ret = -KVM_EPERM;
5136                 goto out;
5137         }
5138
5139         switch (nr) {
5140         case KVM_HC_VAPIC_POLL_IRQ:
5141                 ret = 0;
5142                 break;
5143         case KVM_HC_MMU_OP:
5144                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5145                 break;
5146         default:
5147                 ret = -KVM_ENOSYS;
5148                 break;
5149         }
5150 out:
5151         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5152         ++vcpu->stat.hypercalls;
5153         return r;
5154 }
5155 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5156
5157 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5158 {
5159         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5160         char instruction[3];
5161         unsigned long rip = kvm_rip_read(vcpu);
5162
5163         /*
5164          * Blow out the MMU to ensure that no other VCPU has an active mapping
5165          * to ensure that the updated hypercall appears atomically across all
5166          * VCPUs.
5167          */
5168         kvm_mmu_zap_all(vcpu->kvm);
5169
5170         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5171
5172         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5173 }
5174
5175 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5176 {
5177         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5178         int j, nent = vcpu->arch.cpuid_nent;
5179
5180         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5181         /* when no next entry is found, the current entry[i] is reselected */
5182         for (j = i + 1; ; j = (j + 1) % nent) {
5183                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5184                 if (ej->function == e->function) {
5185                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5186                         return j;
5187                 }
5188         }
5189         return 0; /* silence gcc, even though control never reaches here */
5190 }
5191
5192 /* find an entry with matching function, matching index (if needed), and that
5193  * should be read next (if it's stateful) */
5194 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5195         u32 function, u32 index)
5196 {
5197         if (e->function != function)
5198                 return 0;
5199         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5200                 return 0;
5201         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5202             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5203                 return 0;
5204         return 1;
5205 }
5206
5207 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5208                                               u32 function, u32 index)
5209 {
5210         int i;
5211         struct kvm_cpuid_entry2 *best = NULL;
5212
5213         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5214                 struct kvm_cpuid_entry2 *e;
5215
5216                 e = &vcpu->arch.cpuid_entries[i];
5217                 if (is_matching_cpuid_entry(e, function, index)) {
5218                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5219                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5220                         best = e;
5221                         break;
5222                 }
5223         }
5224         return best;
5225 }
5226 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5227
5228 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5229 {
5230         struct kvm_cpuid_entry2 *best;
5231
5232         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5233         if (!best || best->eax < 0x80000008)
5234                 goto not_found;
5235         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5236         if (best)
5237                 return best->eax & 0xff;
5238 not_found:
5239         return 36;
5240 }
5241
5242 /*
5243  * If no match is found, check whether we exceed the vCPU's limit
5244  * and return the content of the highest valid _standard_ leaf instead.
5245  * This is to satisfy the CPUID specification.
5246  */
5247 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5248                                                   u32 function, u32 index)
5249 {
5250         struct kvm_cpuid_entry2 *maxlevel;
5251
5252         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5253         if (!maxlevel || maxlevel->eax >= function)
5254                 return NULL;
5255         if (function & 0x80000000) {
5256                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5257                 if (!maxlevel)
5258                         return NULL;
5259         }
5260         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5261 }
5262
5263 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5264 {
5265         u32 function, index;
5266         struct kvm_cpuid_entry2 *best;
5267
5268         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5269         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5270         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5271         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5272         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5273         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5274         best = kvm_find_cpuid_entry(vcpu, function, index);
5275
5276         if (!best)
5277                 best = check_cpuid_limit(vcpu, function, index);
5278
5279         if (best) {
5280                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5281                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5282                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5283                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5284         }
5285         kvm_x86_ops->skip_emulated_instruction(vcpu);
5286         trace_kvm_cpuid(function,
5287                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5288                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5289                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5290                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5291 }
5292 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5293
5294 /*
5295  * Check if userspace requested an interrupt window, and that the
5296  * interrupt window is open.
5297  *
5298  * No need to exit to userspace if we already have an interrupt queued.
5299  */
5300 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5301 {
5302         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5303                 vcpu->run->request_interrupt_window &&
5304                 kvm_arch_interrupt_allowed(vcpu));
5305 }
5306
5307 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5308 {
5309         struct kvm_run *kvm_run = vcpu->run;
5310
5311         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5312         kvm_run->cr8 = kvm_get_cr8(vcpu);
5313         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5314         if (irqchip_in_kernel(vcpu->kvm))
5315                 kvm_run->ready_for_interrupt_injection = 1;
5316         else
5317                 kvm_run->ready_for_interrupt_injection =
5318                         kvm_arch_interrupt_allowed(vcpu) &&
5319                         !kvm_cpu_has_interrupt(vcpu) &&
5320                         !kvm_event_needs_reinjection(vcpu);
5321 }
5322
5323 static void vapic_enter(struct kvm_vcpu *vcpu)
5324 {
5325         struct kvm_lapic *apic = vcpu->arch.apic;
5326         struct page *page;
5327
5328         if (!apic || !apic->vapic_addr)
5329                 return;
5330
5331         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5332
5333         vcpu->arch.apic->vapic_page = page;
5334 }
5335
5336 static void vapic_exit(struct kvm_vcpu *vcpu)
5337 {
5338         struct kvm_lapic *apic = vcpu->arch.apic;
5339         int idx;
5340
5341         if (!apic || !apic->vapic_addr)
5342                 return;
5343
5344         idx = srcu_read_lock(&vcpu->kvm->srcu);
5345         kvm_release_page_dirty(apic->vapic_page);
5346         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5347         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5348 }
5349
5350 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5351 {
5352         int max_irr, tpr;
5353
5354         if (!kvm_x86_ops->update_cr8_intercept)
5355                 return;
5356
5357         if (!vcpu->arch.apic)
5358                 return;
5359
5360         if (!vcpu->arch.apic->vapic_addr)
5361                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5362         else
5363                 max_irr = -1;
5364
5365         if (max_irr != -1)
5366                 max_irr >>= 4;
5367
5368         tpr = kvm_lapic_get_cr8(vcpu);
5369
5370         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5371 }
5372
5373 static void inject_pending_event(struct kvm_vcpu *vcpu)
5374 {
5375         /* try to reinject previous events if any */
5376         if (vcpu->arch.exception.pending) {
5377                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5378                                         vcpu->arch.exception.has_error_code,
5379                                         vcpu->arch.exception.error_code);
5380                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5381                                           vcpu->arch.exception.has_error_code,
5382                                           vcpu->arch.exception.error_code,
5383                                           vcpu->arch.exception.reinject);
5384                 return;
5385         }
5386
5387         if (vcpu->arch.nmi_injected) {
5388                 kvm_x86_ops->set_nmi(vcpu);
5389                 return;
5390         }
5391
5392         if (vcpu->arch.interrupt.pending) {
5393                 kvm_x86_ops->set_irq(vcpu);
5394                 return;
5395         }
5396
5397         /* try to inject new event if pending */
5398         if (vcpu->arch.nmi_pending) {
5399                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5400                         vcpu->arch.nmi_pending = false;
5401                         vcpu->arch.nmi_injected = true;
5402                         kvm_x86_ops->set_nmi(vcpu);
5403                 }
5404         } else if (kvm_cpu_has_interrupt(vcpu)) {
5405                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5406                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5407                                             false);
5408                         kvm_x86_ops->set_irq(vcpu);
5409                 }
5410         }
5411 }
5412
5413 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5414 {
5415         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5416                         !vcpu->guest_xcr0_loaded) {
5417                 /* kvm_set_xcr() also depends on this */
5418                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5419                 vcpu->guest_xcr0_loaded = 1;
5420         }
5421 }
5422
5423 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5424 {
5425         if (vcpu->guest_xcr0_loaded) {
5426                 if (vcpu->arch.xcr0 != host_xcr0)
5427                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5428                 vcpu->guest_xcr0_loaded = 0;
5429         }
5430 }
5431
5432 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5433 {
5434         int r;
5435         bool nmi_pending;
5436         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5437                 vcpu->run->request_interrupt_window;
5438
5439         if (vcpu->requests) {
5440                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5441                         kvm_mmu_unload(vcpu);
5442                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5443                         __kvm_migrate_timers(vcpu);
5444                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5445                         r = kvm_guest_time_update(vcpu);
5446                         if (unlikely(r))
5447                                 goto out;
5448                 }
5449                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5450                         kvm_mmu_sync_roots(vcpu);
5451                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5452                         kvm_x86_ops->tlb_flush(vcpu);
5453                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5454                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5455                         r = 0;
5456                         goto out;
5457                 }
5458                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5459                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5460                         r = 0;
5461                         goto out;
5462                 }
5463                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5464                         vcpu->fpu_active = 0;
5465                         kvm_x86_ops->fpu_deactivate(vcpu);
5466                 }
5467                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5468                         /* Page is swapped out. Do synthetic halt */
5469                         vcpu->arch.apf.halted = true;
5470                         r = 1;
5471                         goto out;
5472                 }
5473         }
5474
5475         r = kvm_mmu_reload(vcpu);
5476         if (unlikely(r))
5477                 goto out;
5478
5479         /*
5480          * An NMI can be injected between local nmi_pending read and
5481          * vcpu->arch.nmi_pending read inside inject_pending_event().
5482          * But in that case, KVM_REQ_EVENT will be set, which makes
5483          * the race described above benign.
5484          */
5485         nmi_pending = ACCESS_ONCE(vcpu->arch.nmi_pending);
5486
5487         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5488                 inject_pending_event(vcpu);
5489
5490                 /* enable NMI/IRQ window open exits if needed */
5491                 if (nmi_pending)
5492                         kvm_x86_ops->enable_nmi_window(vcpu);
5493                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5494                         kvm_x86_ops->enable_irq_window(vcpu);
5495
5496                 if (kvm_lapic_enabled(vcpu)) {
5497                         update_cr8_intercept(vcpu);
5498                         kvm_lapic_sync_to_vapic(vcpu);
5499                 }
5500         }
5501
5502         preempt_disable();
5503
5504         kvm_x86_ops->prepare_guest_switch(vcpu);
5505         if (vcpu->fpu_active)
5506                 kvm_load_guest_fpu(vcpu);
5507         kvm_load_guest_xcr0(vcpu);
5508
5509         vcpu->mode = IN_GUEST_MODE;
5510
5511         /* We should set ->mode before check ->requests,
5512          * see the comment in make_all_cpus_request.
5513          */
5514         smp_mb();
5515
5516         local_irq_disable();
5517
5518         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5519             || need_resched() || signal_pending(current)) {
5520                 vcpu->mode = OUTSIDE_GUEST_MODE;
5521                 smp_wmb();
5522                 local_irq_enable();
5523                 preempt_enable();
5524                 kvm_x86_ops->cancel_injection(vcpu);
5525                 r = 1;
5526                 goto out;
5527         }
5528
5529         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5530
5531         kvm_guest_enter();
5532
5533         if (unlikely(vcpu->arch.switch_db_regs)) {
5534                 set_debugreg(0, 7);
5535                 set_debugreg(vcpu->arch.eff_db[0], 0);
5536                 set_debugreg(vcpu->arch.eff_db[1], 1);
5537                 set_debugreg(vcpu->arch.eff_db[2], 2);
5538                 set_debugreg(vcpu->arch.eff_db[3], 3);
5539         }
5540
5541         trace_kvm_entry(vcpu->vcpu_id);
5542         kvm_x86_ops->run(vcpu);
5543
5544         /*
5545          * If the guest has used debug registers, at least dr7
5546          * will be disabled while returning to the host.
5547          * If we don't have active breakpoints in the host, we don't
5548          * care about the messed up debug address registers. But if
5549          * we have some of them active, restore the old state.
5550          */
5551         if (hw_breakpoint_active())
5552                 hw_breakpoint_restore();
5553
5554         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5555
5556         vcpu->mode = OUTSIDE_GUEST_MODE;
5557         smp_wmb();
5558         local_irq_enable();
5559
5560         ++vcpu->stat.exits;
5561
5562         /*
5563          * We must have an instruction between local_irq_enable() and
5564          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5565          * the interrupt shadow.  The stat.exits increment will do nicely.
5566          * But we need to prevent reordering, hence this barrier():
5567          */
5568         barrier();
5569
5570         kvm_guest_exit();
5571
5572         preempt_enable();
5573
5574         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5575
5576         /*
5577          * Profile KVM exit RIPs:
5578          */
5579         if (unlikely(prof_on == KVM_PROFILING)) {
5580                 unsigned long rip = kvm_rip_read(vcpu);
5581                 profile_hit(KVM_PROFILING, (void *)rip);
5582         }
5583
5584
5585         kvm_lapic_sync_from_vapic(vcpu);
5586
5587         r = kvm_x86_ops->handle_exit(vcpu);
5588 out:
5589         return r;
5590 }
5591
5592
5593 static int __vcpu_run(struct kvm_vcpu *vcpu)
5594 {
5595         int r;
5596         struct kvm *kvm = vcpu->kvm;
5597
5598         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5599                 pr_debug("vcpu %d received sipi with vector # %x\n",
5600                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5601                 kvm_lapic_reset(vcpu);
5602                 r = kvm_arch_vcpu_reset(vcpu);
5603                 if (r)
5604                         return r;
5605                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5606         }
5607
5608         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5609         vapic_enter(vcpu);
5610
5611         r = 1;
5612         while (r > 0) {
5613                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5614                     !vcpu->arch.apf.halted)
5615                         r = vcpu_enter_guest(vcpu);
5616                 else {
5617                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5618                         kvm_vcpu_block(vcpu);
5619                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5620                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5621                         {
5622                                 switch(vcpu->arch.mp_state) {
5623                                 case KVM_MP_STATE_HALTED:
5624                                         vcpu->arch.mp_state =
5625                                                 KVM_MP_STATE_RUNNABLE;
5626                                 case KVM_MP_STATE_RUNNABLE:
5627                                         vcpu->arch.apf.halted = false;
5628                                         break;
5629                                 case KVM_MP_STATE_SIPI_RECEIVED:
5630                                 default:
5631                                         r = -EINTR;
5632                                         break;
5633                                 }
5634                         }
5635                 }
5636
5637                 if (r <= 0)
5638                         break;
5639
5640                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5641                 if (kvm_cpu_has_pending_timer(vcpu))
5642                         kvm_inject_pending_timer_irqs(vcpu);
5643
5644                 if (dm_request_for_irq_injection(vcpu)) {
5645                         r = -EINTR;
5646                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5647                         ++vcpu->stat.request_irq_exits;
5648                 }
5649
5650                 kvm_check_async_pf_completion(vcpu);
5651
5652                 if (signal_pending(current)) {
5653                         r = -EINTR;
5654                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5655                         ++vcpu->stat.signal_exits;
5656                 }
5657                 if (need_resched()) {
5658                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5659                         kvm_resched(vcpu);
5660                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5661                 }
5662         }
5663
5664         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5665
5666         vapic_exit(vcpu);
5667
5668         return r;
5669 }
5670
5671 static int complete_mmio(struct kvm_vcpu *vcpu)
5672 {
5673         struct kvm_run *run = vcpu->run;
5674         int r;
5675
5676         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5677                 return 1;
5678
5679         if (vcpu->mmio_needed) {
5680                 vcpu->mmio_needed = 0;
5681                 if (!vcpu->mmio_is_write)
5682                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5683                                run->mmio.data, 8);
5684                 vcpu->mmio_index += 8;
5685                 if (vcpu->mmio_index < vcpu->mmio_size) {
5686                         run->exit_reason = KVM_EXIT_MMIO;
5687                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5688                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5689                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5690                         run->mmio.is_write = vcpu->mmio_is_write;
5691                         vcpu->mmio_needed = 1;
5692                         return 0;
5693                 }
5694                 if (vcpu->mmio_is_write)
5695                         return 1;
5696                 vcpu->mmio_read_completed = 1;
5697         }
5698         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5699         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5700         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5701         if (r != EMULATE_DONE)
5702                 return 0;
5703         return 1;
5704 }
5705
5706 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5707 {
5708         int r;
5709         sigset_t sigsaved;
5710
5711         if (!tsk_used_math(current) && init_fpu(current))
5712                 return -ENOMEM;
5713
5714         if (vcpu->sigset_active)
5715                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5716
5717         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5718                 kvm_vcpu_block(vcpu);
5719                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5720                 r = -EAGAIN;
5721                 goto out;
5722         }
5723
5724         /* re-sync apic's tpr */
5725         if (!irqchip_in_kernel(vcpu->kvm)) {
5726                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5727                         r = -EINVAL;
5728                         goto out;
5729                 }
5730         }
5731
5732         r = complete_mmio(vcpu);
5733         if (r <= 0)
5734                 goto out;
5735
5736         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5737                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5738                                      kvm_run->hypercall.ret);
5739
5740         r = __vcpu_run(vcpu);
5741
5742 out:
5743         post_kvm_run_save(vcpu);
5744         if (vcpu->sigset_active)
5745                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5746
5747         return r;
5748 }
5749
5750 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5751 {
5752         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5753                 /*
5754                  * We are here if userspace calls get_regs() in the middle of
5755                  * instruction emulation. Registers state needs to be copied
5756                  * back from emulation context to vcpu. Usrapace shouldn't do
5757                  * that usually, but some bad designed PV devices (vmware
5758                  * backdoor interface) need this to work
5759                  */
5760                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5761                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5762                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5763         }
5764         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5765         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5766         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5767         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5768         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5769         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5770         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5771         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5772 #ifdef CONFIG_X86_64
5773         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5774         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5775         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5776         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5777         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5778         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5779         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5780         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5781 #endif
5782
5783         regs->rip = kvm_rip_read(vcpu);
5784         regs->rflags = kvm_get_rflags(vcpu);
5785
5786         return 0;
5787 }
5788
5789 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5790 {
5791         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5792         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5793
5794         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5795         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5796         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5797         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5798         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5799         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5800         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5801         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5802 #ifdef CONFIG_X86_64
5803         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5804         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5805         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5806         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5807         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5808         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5809         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5810         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5811 #endif
5812
5813         kvm_rip_write(vcpu, regs->rip);
5814         kvm_set_rflags(vcpu, regs->rflags);
5815
5816         vcpu->arch.exception.pending = false;
5817
5818         kvm_make_request(KVM_REQ_EVENT, vcpu);
5819
5820         return 0;
5821 }
5822
5823 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5824 {
5825         struct kvm_segment cs;
5826
5827         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5828         *db = cs.db;
5829         *l = cs.l;
5830 }
5831 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5832
5833 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5834                                   struct kvm_sregs *sregs)
5835 {
5836         struct desc_ptr dt;
5837
5838         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5839         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5840         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5841         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5842         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5843         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5844
5845         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5846         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5847
5848         kvm_x86_ops->get_idt(vcpu, &dt);
5849         sregs->idt.limit = dt.size;
5850         sregs->idt.base = dt.address;
5851         kvm_x86_ops->get_gdt(vcpu, &dt);
5852         sregs->gdt.limit = dt.size;
5853         sregs->gdt.base = dt.address;
5854
5855         sregs->cr0 = kvm_read_cr0(vcpu);
5856         sregs->cr2 = vcpu->arch.cr2;
5857         sregs->cr3 = kvm_read_cr3(vcpu);
5858         sregs->cr4 = kvm_read_cr4(vcpu);
5859         sregs->cr8 = kvm_get_cr8(vcpu);
5860         sregs->efer = vcpu->arch.efer;
5861         sregs->apic_base = kvm_get_apic_base(vcpu);
5862
5863         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5864
5865         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5866                 set_bit(vcpu->arch.interrupt.nr,
5867                         (unsigned long *)sregs->interrupt_bitmap);
5868
5869         return 0;
5870 }
5871
5872 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5873                                     struct kvm_mp_state *mp_state)
5874 {
5875         mp_state->mp_state = vcpu->arch.mp_state;
5876         return 0;
5877 }
5878
5879 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5880                                     struct kvm_mp_state *mp_state)
5881 {
5882         vcpu->arch.mp_state = mp_state->mp_state;
5883         kvm_make_request(KVM_REQ_EVENT, vcpu);
5884         return 0;
5885 }
5886
5887 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5888                     bool has_error_code, u32 error_code)
5889 {
5890         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5891         int ret;
5892
5893         init_emulate_ctxt(vcpu);
5894
5895         ret = emulator_task_switch(ctxt, tss_selector, reason,
5896                                    has_error_code, error_code);
5897
5898         if (ret)
5899                 return EMULATE_FAIL;
5900
5901         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5902         kvm_rip_write(vcpu, ctxt->eip);
5903         kvm_set_rflags(vcpu, ctxt->eflags);
5904         kvm_make_request(KVM_REQ_EVENT, vcpu);
5905         return EMULATE_DONE;
5906 }
5907 EXPORT_SYMBOL_GPL(kvm_task_switch);
5908
5909 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5910                                   struct kvm_sregs *sregs)
5911 {
5912         int mmu_reset_needed = 0;
5913         int pending_vec, max_bits, idx;
5914         struct desc_ptr dt;
5915
5916         dt.size = sregs->idt.limit;
5917         dt.address = sregs->idt.base;
5918         kvm_x86_ops->set_idt(vcpu, &dt);
5919         dt.size = sregs->gdt.limit;
5920         dt.address = sregs->gdt.base;
5921         kvm_x86_ops->set_gdt(vcpu, &dt);
5922
5923         vcpu->arch.cr2 = sregs->cr2;
5924         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5925         vcpu->arch.cr3 = sregs->cr3;
5926         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5927
5928         kvm_set_cr8(vcpu, sregs->cr8);
5929
5930         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5931         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5932         kvm_set_apic_base(vcpu, sregs->apic_base);
5933
5934         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5935         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5936         vcpu->arch.cr0 = sregs->cr0;
5937
5938         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5939         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5940         if (sregs->cr4 & X86_CR4_OSXSAVE)
5941                 update_cpuid(vcpu);
5942
5943         idx = srcu_read_lock(&vcpu->kvm->srcu);
5944         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5945                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5946                 mmu_reset_needed = 1;
5947         }
5948         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5949
5950         if (mmu_reset_needed)
5951                 kvm_mmu_reset_context(vcpu);
5952
5953         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5954         pending_vec = find_first_bit(
5955                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5956         if (pending_vec < max_bits) {
5957                 kvm_queue_interrupt(vcpu, pending_vec, false);
5958                 pr_debug("Set back pending irq %d\n", pending_vec);
5959         }
5960
5961         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5962         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5963         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5964         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5965         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5966         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5967
5968         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5969         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5970
5971         update_cr8_intercept(vcpu);
5972
5973         /* Older userspace won't unhalt the vcpu on reset. */
5974         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5975             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5976             !is_protmode(vcpu))
5977                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5978
5979         kvm_make_request(KVM_REQ_EVENT, vcpu);
5980
5981         return 0;
5982 }
5983
5984 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5985                                         struct kvm_guest_debug *dbg)
5986 {
5987         unsigned long rflags;
5988         int i, r;
5989
5990         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5991                 r = -EBUSY;
5992                 if (vcpu->arch.exception.pending)
5993                         goto out;
5994                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5995                         kvm_queue_exception(vcpu, DB_VECTOR);
5996                 else
5997                         kvm_queue_exception(vcpu, BP_VECTOR);
5998         }
5999
6000         /*
6001          * Read rflags as long as potentially injected trace flags are still
6002          * filtered out.
6003          */
6004         rflags = kvm_get_rflags(vcpu);
6005
6006         vcpu->guest_debug = dbg->control;
6007         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6008                 vcpu->guest_debug = 0;
6009
6010         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6011                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6012                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6013                 vcpu->arch.switch_db_regs =
6014                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
6015         } else {
6016                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6017                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6018                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
6019         }
6020
6021         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6022                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6023                         get_segment_base(vcpu, VCPU_SREG_CS);
6024
6025         /*
6026          * Trigger an rflags update that will inject or remove the trace
6027          * flags.
6028          */
6029         kvm_set_rflags(vcpu, rflags);
6030
6031         kvm_x86_ops->set_guest_debug(vcpu, dbg);
6032
6033         r = 0;
6034
6035 out:
6036
6037         return r;
6038 }
6039
6040 /*
6041  * Translate a guest virtual address to a guest physical address.
6042  */
6043 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6044                                     struct kvm_translation *tr)
6045 {
6046         unsigned long vaddr = tr->linear_address;
6047         gpa_t gpa;
6048         int idx;
6049
6050         idx = srcu_read_lock(&vcpu->kvm->srcu);
6051         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6052         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6053         tr->physical_address = gpa;
6054         tr->valid = gpa != UNMAPPED_GVA;
6055         tr->writeable = 1;
6056         tr->usermode = 0;
6057
6058         return 0;
6059 }
6060
6061 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6062 {
6063         struct i387_fxsave_struct *fxsave =
6064                         &vcpu->arch.guest_fpu.state->fxsave;
6065
6066         memcpy(fpu->fpr, fxsave->st_space, 128);
6067         fpu->fcw = fxsave->cwd;
6068         fpu->fsw = fxsave->swd;
6069         fpu->ftwx = fxsave->twd;
6070         fpu->last_opcode = fxsave->fop;
6071         fpu->last_ip = fxsave->rip;
6072         fpu->last_dp = fxsave->rdp;
6073         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6074
6075         return 0;
6076 }
6077
6078 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6079 {
6080         struct i387_fxsave_struct *fxsave =
6081                         &vcpu->arch.guest_fpu.state->fxsave;
6082
6083         memcpy(fxsave->st_space, fpu->fpr, 128);
6084         fxsave->cwd = fpu->fcw;
6085         fxsave->swd = fpu->fsw;
6086         fxsave->twd = fpu->ftwx;
6087         fxsave->fop = fpu->last_opcode;
6088         fxsave->rip = fpu->last_ip;
6089         fxsave->rdp = fpu->last_dp;
6090         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6091
6092         return 0;
6093 }
6094
6095 int fx_init(struct kvm_vcpu *vcpu)
6096 {
6097         int err;
6098
6099         err = fpu_alloc(&vcpu->arch.guest_fpu);
6100         if (err)
6101                 return err;
6102
6103         fpu_finit(&vcpu->arch.guest_fpu);
6104
6105         /*
6106          * Ensure guest xcr0 is valid for loading
6107          */
6108         vcpu->arch.xcr0 = XSTATE_FP;
6109
6110         vcpu->arch.cr0 |= X86_CR0_ET;
6111
6112         return 0;
6113 }
6114 EXPORT_SYMBOL_GPL(fx_init);
6115
6116 static void fx_free(struct kvm_vcpu *vcpu)
6117 {
6118         fpu_free(&vcpu->arch.guest_fpu);
6119 }
6120
6121 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6122 {
6123         if (vcpu->guest_fpu_loaded)
6124                 return;
6125
6126         /*
6127          * Restore all possible states in the guest,
6128          * and assume host would use all available bits.
6129          * Guest xcr0 would be loaded later.
6130          */
6131         kvm_put_guest_xcr0(vcpu);
6132         vcpu->guest_fpu_loaded = 1;
6133         unlazy_fpu(current);
6134         fpu_restore_checking(&vcpu->arch.guest_fpu);
6135         trace_kvm_fpu(1);
6136 }
6137
6138 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6139 {
6140         kvm_put_guest_xcr0(vcpu);
6141
6142         if (!vcpu->guest_fpu_loaded)
6143                 return;
6144
6145         vcpu->guest_fpu_loaded = 0;
6146         fpu_save_init(&vcpu->arch.guest_fpu);
6147         ++vcpu->stat.fpu_reload;
6148         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6149         trace_kvm_fpu(0);
6150 }
6151
6152 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6153 {
6154         kvmclock_reset(vcpu);
6155
6156         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6157         fx_free(vcpu);
6158         kvm_x86_ops->vcpu_free(vcpu);
6159 }
6160
6161 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6162                                                 unsigned int id)
6163 {
6164         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6165                 printk_once(KERN_WARNING
6166                 "kvm: SMP vm created on host with unstable TSC; "
6167                 "guest TSC will not be reliable\n");
6168         return kvm_x86_ops->vcpu_create(kvm, id);
6169 }
6170
6171 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6172 {
6173         int r;
6174
6175         vcpu->arch.mtrr_state.have_fixed = 1;
6176         vcpu_load(vcpu);
6177         r = kvm_arch_vcpu_reset(vcpu);
6178         if (r == 0)
6179                 r = kvm_mmu_setup(vcpu);
6180         vcpu_put(vcpu);
6181
6182         return r;
6183 }
6184
6185 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6186 {
6187         vcpu->arch.apf.msr_val = 0;
6188
6189         vcpu_load(vcpu);
6190         kvm_mmu_unload(vcpu);
6191         vcpu_put(vcpu);
6192
6193         fx_free(vcpu);
6194         kvm_x86_ops->vcpu_free(vcpu);
6195 }
6196
6197 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6198 {
6199         vcpu->arch.nmi_pending = false;
6200         vcpu->arch.nmi_injected = false;
6201
6202         vcpu->arch.switch_db_regs = 0;
6203         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6204         vcpu->arch.dr6 = DR6_FIXED_1;
6205         vcpu->arch.dr7 = DR7_FIXED_1;
6206
6207         kvm_make_request(KVM_REQ_EVENT, vcpu);
6208         vcpu->arch.apf.msr_val = 0;
6209
6210         kvmclock_reset(vcpu);
6211
6212         kvm_clear_async_pf_completion_queue(vcpu);
6213         kvm_async_pf_hash_reset(vcpu);
6214         vcpu->arch.apf.halted = false;