KVM: X86: Make tsc_delta calculation a function of guest tsc
[linux-3.10.git] / arch / x86 / kvm / x86.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * derived from drivers/kvm/kvm_main.c
5  *
6  * Copyright (C) 2006 Qumranet, Inc.
7  * Copyright (C) 2008 Qumranet, Inc.
8  * Copyright IBM Corporation, 2008
9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
10  *
11  * Authors:
12  *   Avi Kivity   <avi@qumranet.com>
13  *   Yaniv Kamay  <yaniv@qumranet.com>
14  *   Amit Shah    <amit.shah@qumranet.com>
15  *   Ben-Ami Yassour <benami@il.ibm.com>
16  *
17  * This work is licensed under the terms of the GNU GPL, version 2.  See
18  * the COPYING file in the top-level directory.
19  *
20  */
21
22 #include <linux/kvm_host.h>
23 #include "irq.h"
24 #include "mmu.h"
25 #include "i8254.h"
26 #include "tss.h"
27 #include "kvm_cache_regs.h"
28 #include "x86.h"
29
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
33 #include <linux/fs.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <trace/events/kvm.h>
48
49 #define CREATE_TRACE_POINTS
50 #include "trace.h"
51
52 #include <asm/debugreg.h>
53 #include <asm/msr.h>
54 #include <asm/desc.h>
55 #include <asm/mtrr.h>
56 #include <asm/mce.h>
57 #include <asm/i387.h>
58 #include <asm/xcr.h>
59 #include <asm/pvclock.h>
60 #include <asm/div64.h>
61
62 #define MAX_IO_MSRS 256
63 #define KVM_MAX_MCE_BANKS 32
64 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
65
66 /* EFER defaults:
67  * - enable syscall per default because its emulated by KVM
68  * - enable LME and LMA per default on 64 bit KVM
69  */
70 #ifdef CONFIG_X86_64
71 static
72 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
73 #else
74 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
75 #endif
76
77 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
78 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
79
80 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
81 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
82                                     struct kvm_cpuid_entry2 __user *entries);
83
84 struct kvm_x86_ops *kvm_x86_ops;
85 EXPORT_SYMBOL_GPL(kvm_x86_ops);
86
87 int ignore_msrs = 0;
88 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
89
90 #define KVM_NR_SHARED_MSRS 16
91
92 struct kvm_shared_msrs_global {
93         int nr;
94         u32 msrs[KVM_NR_SHARED_MSRS];
95 };
96
97 struct kvm_shared_msrs {
98         struct user_return_notifier urn;
99         bool registered;
100         struct kvm_shared_msr_values {
101                 u64 host;
102                 u64 curr;
103         } values[KVM_NR_SHARED_MSRS];
104 };
105
106 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
107 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
108
109 struct kvm_stats_debugfs_item debugfs_entries[] = {
110         { "pf_fixed", VCPU_STAT(pf_fixed) },
111         { "pf_guest", VCPU_STAT(pf_guest) },
112         { "tlb_flush", VCPU_STAT(tlb_flush) },
113         { "invlpg", VCPU_STAT(invlpg) },
114         { "exits", VCPU_STAT(exits) },
115         { "io_exits", VCPU_STAT(io_exits) },
116         { "mmio_exits", VCPU_STAT(mmio_exits) },
117         { "signal_exits", VCPU_STAT(signal_exits) },
118         { "irq_window", VCPU_STAT(irq_window_exits) },
119         { "nmi_window", VCPU_STAT(nmi_window_exits) },
120         { "halt_exits", VCPU_STAT(halt_exits) },
121         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
122         { "hypercalls", VCPU_STAT(hypercalls) },
123         { "request_irq", VCPU_STAT(request_irq_exits) },
124         { "irq_exits", VCPU_STAT(irq_exits) },
125         { "host_state_reload", VCPU_STAT(host_state_reload) },
126         { "efer_reload", VCPU_STAT(efer_reload) },
127         { "fpu_reload", VCPU_STAT(fpu_reload) },
128         { "insn_emulation", VCPU_STAT(insn_emulation) },
129         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
130         { "irq_injections", VCPU_STAT(irq_injections) },
131         { "nmi_injections", VCPU_STAT(nmi_injections) },
132         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
133         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
134         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
135         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
136         { "mmu_flooded", VM_STAT(mmu_flooded) },
137         { "mmu_recycled", VM_STAT(mmu_recycled) },
138         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
139         { "mmu_unsync", VM_STAT(mmu_unsync) },
140         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
141         { "largepages", VM_STAT(lpages) },
142         { NULL }
143 };
144
145 u64 __read_mostly host_xcr0;
146
147 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
148 {
149         int i;
150         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
151                 vcpu->arch.apf.gfns[i] = ~0;
152 }
153
154 static void kvm_on_user_return(struct user_return_notifier *urn)
155 {
156         unsigned slot;
157         struct kvm_shared_msrs *locals
158                 = container_of(urn, struct kvm_shared_msrs, urn);
159         struct kvm_shared_msr_values *values;
160
161         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
162                 values = &locals->values[slot];
163                 if (values->host != values->curr) {
164                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
165                         values->curr = values->host;
166                 }
167         }
168         locals->registered = false;
169         user_return_notifier_unregister(urn);
170 }
171
172 static void shared_msr_update(unsigned slot, u32 msr)
173 {
174         struct kvm_shared_msrs *smsr;
175         u64 value;
176
177         smsr = &__get_cpu_var(shared_msrs);
178         /* only read, and nobody should modify it at this time,
179          * so don't need lock */
180         if (slot >= shared_msrs_global.nr) {
181                 printk(KERN_ERR "kvm: invalid MSR slot!");
182                 return;
183         }
184         rdmsrl_safe(msr, &value);
185         smsr->values[slot].host = value;
186         smsr->values[slot].curr = value;
187 }
188
189 void kvm_define_shared_msr(unsigned slot, u32 msr)
190 {
191         if (slot >= shared_msrs_global.nr)
192                 shared_msrs_global.nr = slot + 1;
193         shared_msrs_global.msrs[slot] = msr;
194         /* we need ensured the shared_msr_global have been updated */
195         smp_wmb();
196 }
197 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
198
199 static void kvm_shared_msr_cpu_online(void)
200 {
201         unsigned i;
202
203         for (i = 0; i < shared_msrs_global.nr; ++i)
204                 shared_msr_update(i, shared_msrs_global.msrs[i]);
205 }
206
207 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
208 {
209         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
210
211         if (((value ^ smsr->values[slot].curr) & mask) == 0)
212                 return;
213         smsr->values[slot].curr = value;
214         wrmsrl(shared_msrs_global.msrs[slot], value);
215         if (!smsr->registered) {
216                 smsr->urn.on_user_return = kvm_on_user_return;
217                 user_return_notifier_register(&smsr->urn);
218                 smsr->registered = true;
219         }
220 }
221 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
222
223 static void drop_user_return_notifiers(void *ignore)
224 {
225         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
226
227         if (smsr->registered)
228                 kvm_on_user_return(&smsr->urn);
229 }
230
231 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
232 {
233         if (irqchip_in_kernel(vcpu->kvm))
234                 return vcpu->arch.apic_base;
235         else
236                 return vcpu->arch.apic_base;
237 }
238 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
239
240 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
241 {
242         /* TODO: reserve bits check */
243         if (irqchip_in_kernel(vcpu->kvm))
244                 kvm_lapic_set_base(vcpu, data);
245         else
246                 vcpu->arch.apic_base = data;
247 }
248 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
249
250 #define EXCPT_BENIGN            0
251 #define EXCPT_CONTRIBUTORY      1
252 #define EXCPT_PF                2
253
254 static int exception_class(int vector)
255 {
256         switch (vector) {
257         case PF_VECTOR:
258                 return EXCPT_PF;
259         case DE_VECTOR:
260         case TS_VECTOR:
261         case NP_VECTOR:
262         case SS_VECTOR:
263         case GP_VECTOR:
264                 return EXCPT_CONTRIBUTORY;
265         default:
266                 break;
267         }
268         return EXCPT_BENIGN;
269 }
270
271 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
272                 unsigned nr, bool has_error, u32 error_code,
273                 bool reinject)
274 {
275         u32 prev_nr;
276         int class1, class2;
277
278         kvm_make_request(KVM_REQ_EVENT, vcpu);
279
280         if (!vcpu->arch.exception.pending) {
281         queue:
282                 vcpu->arch.exception.pending = true;
283                 vcpu->arch.exception.has_error_code = has_error;
284                 vcpu->arch.exception.nr = nr;
285                 vcpu->arch.exception.error_code = error_code;
286                 vcpu->arch.exception.reinject = reinject;
287                 return;
288         }
289
290         /* to check exception */
291         prev_nr = vcpu->arch.exception.nr;
292         if (prev_nr == DF_VECTOR) {
293                 /* triple fault -> shutdown */
294                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
295                 return;
296         }
297         class1 = exception_class(prev_nr);
298         class2 = exception_class(nr);
299         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
300                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
301                 /* generate double fault per SDM Table 5-5 */
302                 vcpu->arch.exception.pending = true;
303                 vcpu->arch.exception.has_error_code = true;
304                 vcpu->arch.exception.nr = DF_VECTOR;
305                 vcpu->arch.exception.error_code = 0;
306         } else
307                 /* replace previous exception with a new one in a hope
308                    that instruction re-execution will regenerate lost
309                    exception */
310                 goto queue;
311 }
312
313 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
314 {
315         kvm_multiple_exception(vcpu, nr, false, 0, false);
316 }
317 EXPORT_SYMBOL_GPL(kvm_queue_exception);
318
319 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
320 {
321         kvm_multiple_exception(vcpu, nr, false, 0, true);
322 }
323 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
324
325 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
326 {
327         if (err)
328                 kvm_inject_gp(vcpu, 0);
329         else
330                 kvm_x86_ops->skip_emulated_instruction(vcpu);
331 }
332 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
333
334 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
335 {
336         ++vcpu->stat.pf_guest;
337         vcpu->arch.cr2 = fault->address;
338         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
339 }
340
341 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
342 {
343         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
344                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
345         else
346                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
347 }
348
349 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
350 {
351         kvm_make_request(KVM_REQ_EVENT, vcpu);
352         vcpu->arch.nmi_pending = 1;
353 }
354 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
355
356 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
357 {
358         kvm_multiple_exception(vcpu, nr, true, error_code, false);
359 }
360 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
361
362 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
363 {
364         kvm_multiple_exception(vcpu, nr, true, error_code, true);
365 }
366 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
367
368 /*
369  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
370  * a #GP and return false.
371  */
372 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
373 {
374         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
375                 return true;
376         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
377         return false;
378 }
379 EXPORT_SYMBOL_GPL(kvm_require_cpl);
380
381 /*
382  * This function will be used to read from the physical memory of the currently
383  * running guest. The difference to kvm_read_guest_page is that this function
384  * can read from guest physical or from the guest's guest physical memory.
385  */
386 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
387                             gfn_t ngfn, void *data, int offset, int len,
388                             u32 access)
389 {
390         gfn_t real_gfn;
391         gpa_t ngpa;
392
393         ngpa     = gfn_to_gpa(ngfn);
394         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
395         if (real_gfn == UNMAPPED_GVA)
396                 return -EFAULT;
397
398         real_gfn = gpa_to_gfn(real_gfn);
399
400         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
401 }
402 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
403
404 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
405                                void *data, int offset, int len, u32 access)
406 {
407         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
408                                        data, offset, len, access);
409 }
410
411 /*
412  * Load the pae pdptrs.  Return true is they are all valid.
413  */
414 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
415 {
416         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
417         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
418         int i;
419         int ret;
420         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
421
422         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
423                                       offset * sizeof(u64), sizeof(pdpte),
424                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
425         if (ret < 0) {
426                 ret = 0;
427                 goto out;
428         }
429         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
430                 if (is_present_gpte(pdpte[i]) &&
431                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
432                         ret = 0;
433                         goto out;
434                 }
435         }
436         ret = 1;
437
438         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
439         __set_bit(VCPU_EXREG_PDPTR,
440                   (unsigned long *)&vcpu->arch.regs_avail);
441         __set_bit(VCPU_EXREG_PDPTR,
442                   (unsigned long *)&vcpu->arch.regs_dirty);
443 out:
444
445         return ret;
446 }
447 EXPORT_SYMBOL_GPL(load_pdptrs);
448
449 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
450 {
451         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
452         bool changed = true;
453         int offset;
454         gfn_t gfn;
455         int r;
456
457         if (is_long_mode(vcpu) || !is_pae(vcpu))
458                 return false;
459
460         if (!test_bit(VCPU_EXREG_PDPTR,
461                       (unsigned long *)&vcpu->arch.regs_avail))
462                 return true;
463
464         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
465         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
466         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
467                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
468         if (r < 0)
469                 goto out;
470         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
471 out:
472
473         return changed;
474 }
475
476 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
477 {
478         unsigned long old_cr0 = kvm_read_cr0(vcpu);
479         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
480                                     X86_CR0_CD | X86_CR0_NW;
481
482         cr0 |= X86_CR0_ET;
483
484 #ifdef CONFIG_X86_64
485         if (cr0 & 0xffffffff00000000UL)
486                 return 1;
487 #endif
488
489         cr0 &= ~CR0_RESERVED_BITS;
490
491         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
492                 return 1;
493
494         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
495                 return 1;
496
497         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
498 #ifdef CONFIG_X86_64
499                 if ((vcpu->arch.efer & EFER_LME)) {
500                         int cs_db, cs_l;
501
502                         if (!is_pae(vcpu))
503                                 return 1;
504                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
505                         if (cs_l)
506                                 return 1;
507                 } else
508 #endif
509                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
510                                                  kvm_read_cr3(vcpu)))
511                         return 1;
512         }
513
514         kvm_x86_ops->set_cr0(vcpu, cr0);
515
516         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
517                 kvm_clear_async_pf_completion_queue(vcpu);
518                 kvm_async_pf_hash_reset(vcpu);
519         }
520
521         if ((cr0 ^ old_cr0) & update_bits)
522                 kvm_mmu_reset_context(vcpu);
523         return 0;
524 }
525 EXPORT_SYMBOL_GPL(kvm_set_cr0);
526
527 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
528 {
529         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
530 }
531 EXPORT_SYMBOL_GPL(kvm_lmsw);
532
533 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
534 {
535         u64 xcr0;
536
537         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
538         if (index != XCR_XFEATURE_ENABLED_MASK)
539                 return 1;
540         xcr0 = xcr;
541         if (kvm_x86_ops->get_cpl(vcpu) != 0)
542                 return 1;
543         if (!(xcr0 & XSTATE_FP))
544                 return 1;
545         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
546                 return 1;
547         if (xcr0 & ~host_xcr0)
548                 return 1;
549         vcpu->arch.xcr0 = xcr0;
550         vcpu->guest_xcr0_loaded = 0;
551         return 0;
552 }
553
554 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
555 {
556         if (__kvm_set_xcr(vcpu, index, xcr)) {
557                 kvm_inject_gp(vcpu, 0);
558                 return 1;
559         }
560         return 0;
561 }
562 EXPORT_SYMBOL_GPL(kvm_set_xcr);
563
564 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
565 {
566         struct kvm_cpuid_entry2 *best;
567
568         best = kvm_find_cpuid_entry(vcpu, 1, 0);
569         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
570 }
571
572 static void update_cpuid(struct kvm_vcpu *vcpu)
573 {
574         struct kvm_cpuid_entry2 *best;
575
576         best = kvm_find_cpuid_entry(vcpu, 1, 0);
577         if (!best)
578                 return;
579
580         /* Update OSXSAVE bit */
581         if (cpu_has_xsave && best->function == 0x1) {
582                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
583                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
584                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
585         }
586 }
587
588 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
589 {
590         unsigned long old_cr4 = kvm_read_cr4(vcpu);
591         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
592
593         if (cr4 & CR4_RESERVED_BITS)
594                 return 1;
595
596         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
597                 return 1;
598
599         if (is_long_mode(vcpu)) {
600                 if (!(cr4 & X86_CR4_PAE))
601                         return 1;
602         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
603                    && ((cr4 ^ old_cr4) & pdptr_bits)
604                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
605                                    kvm_read_cr3(vcpu)))
606                 return 1;
607
608         if (cr4 & X86_CR4_VMXE)
609                 return 1;
610
611         kvm_x86_ops->set_cr4(vcpu, cr4);
612
613         if ((cr4 ^ old_cr4) & pdptr_bits)
614                 kvm_mmu_reset_context(vcpu);
615
616         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
617                 update_cpuid(vcpu);
618
619         return 0;
620 }
621 EXPORT_SYMBOL_GPL(kvm_set_cr4);
622
623 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
624 {
625         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
626                 kvm_mmu_sync_roots(vcpu);
627                 kvm_mmu_flush_tlb(vcpu);
628                 return 0;
629         }
630
631         if (is_long_mode(vcpu)) {
632                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
633                         return 1;
634         } else {
635                 if (is_pae(vcpu)) {
636                         if (cr3 & CR3_PAE_RESERVED_BITS)
637                                 return 1;
638                         if (is_paging(vcpu) &&
639                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
640                                 return 1;
641                 }
642                 /*
643                  * We don't check reserved bits in nonpae mode, because
644                  * this isn't enforced, and VMware depends on this.
645                  */
646         }
647
648         /*
649          * Does the new cr3 value map to physical memory? (Note, we
650          * catch an invalid cr3 even in real-mode, because it would
651          * cause trouble later on when we turn on paging anyway.)
652          *
653          * A real CPU would silently accept an invalid cr3 and would
654          * attempt to use it - with largely undefined (and often hard
655          * to debug) behavior on the guest side.
656          */
657         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
658                 return 1;
659         vcpu->arch.cr3 = cr3;
660         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
661         vcpu->arch.mmu.new_cr3(vcpu);
662         return 0;
663 }
664 EXPORT_SYMBOL_GPL(kvm_set_cr3);
665
666 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
667 {
668         if (cr8 & CR8_RESERVED_BITS)
669                 return 1;
670         if (irqchip_in_kernel(vcpu->kvm))
671                 kvm_lapic_set_tpr(vcpu, cr8);
672         else
673                 vcpu->arch.cr8 = cr8;
674         return 0;
675 }
676 EXPORT_SYMBOL_GPL(kvm_set_cr8);
677
678 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
679 {
680         if (irqchip_in_kernel(vcpu->kvm))
681                 return kvm_lapic_get_cr8(vcpu);
682         else
683                 return vcpu->arch.cr8;
684 }
685 EXPORT_SYMBOL_GPL(kvm_get_cr8);
686
687 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
688 {
689         switch (dr) {
690         case 0 ... 3:
691                 vcpu->arch.db[dr] = val;
692                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
693                         vcpu->arch.eff_db[dr] = val;
694                 break;
695         case 4:
696                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
697                         return 1; /* #UD */
698                 /* fall through */
699         case 6:
700                 if (val & 0xffffffff00000000ULL)
701                         return -1; /* #GP */
702                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
703                 break;
704         case 5:
705                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
706                         return 1; /* #UD */
707                 /* fall through */
708         default: /* 7 */
709                 if (val & 0xffffffff00000000ULL)
710                         return -1; /* #GP */
711                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
712                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
713                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
714                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
715                 }
716                 break;
717         }
718
719         return 0;
720 }
721
722 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
723 {
724         int res;
725
726         res = __kvm_set_dr(vcpu, dr, val);
727         if (res > 0)
728                 kvm_queue_exception(vcpu, UD_VECTOR);
729         else if (res < 0)
730                 kvm_inject_gp(vcpu, 0);
731
732         return res;
733 }
734 EXPORT_SYMBOL_GPL(kvm_set_dr);
735
736 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
737 {
738         switch (dr) {
739         case 0 ... 3:
740                 *val = vcpu->arch.db[dr];
741                 break;
742         case 4:
743                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
744                         return 1;
745                 /* fall through */
746         case 6:
747                 *val = vcpu->arch.dr6;
748                 break;
749         case 5:
750                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
751                         return 1;
752                 /* fall through */
753         default: /* 7 */
754                 *val = vcpu->arch.dr7;
755                 break;
756         }
757
758         return 0;
759 }
760
761 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
762 {
763         if (_kvm_get_dr(vcpu, dr, val)) {
764                 kvm_queue_exception(vcpu, UD_VECTOR);
765                 return 1;
766         }
767         return 0;
768 }
769 EXPORT_SYMBOL_GPL(kvm_get_dr);
770
771 /*
772  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
773  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
774  *
775  * This list is modified at module load time to reflect the
776  * capabilities of the host cpu. This capabilities test skips MSRs that are
777  * kvm-specific. Those are put in the beginning of the list.
778  */
779
780 #define KVM_SAVE_MSRS_BEGIN     8
781 static u32 msrs_to_save[] = {
782         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
783         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
784         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
785         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
786         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
787         MSR_STAR,
788 #ifdef CONFIG_X86_64
789         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
790 #endif
791         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
792 };
793
794 static unsigned num_msrs_to_save;
795
796 static u32 emulated_msrs[] = {
797         MSR_IA32_MISC_ENABLE,
798         MSR_IA32_MCG_STATUS,
799         MSR_IA32_MCG_CTL,
800 };
801
802 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
803 {
804         u64 old_efer = vcpu->arch.efer;
805
806         if (efer & efer_reserved_bits)
807                 return 1;
808
809         if (is_paging(vcpu)
810             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
811                 return 1;
812
813         if (efer & EFER_FFXSR) {
814                 struct kvm_cpuid_entry2 *feat;
815
816                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
817                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
818                         return 1;
819         }
820
821         if (efer & EFER_SVME) {
822                 struct kvm_cpuid_entry2 *feat;
823
824                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
825                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
826                         return 1;
827         }
828
829         efer &= ~EFER_LMA;
830         efer |= vcpu->arch.efer & EFER_LMA;
831
832         kvm_x86_ops->set_efer(vcpu, efer);
833
834         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
835
836         /* Update reserved bits */
837         if ((efer ^ old_efer) & EFER_NX)
838                 kvm_mmu_reset_context(vcpu);
839
840         return 0;
841 }
842
843 void kvm_enable_efer_bits(u64 mask)
844 {
845        efer_reserved_bits &= ~mask;
846 }
847 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
848
849
850 /*
851  * Writes msr value into into the appropriate "register".
852  * Returns 0 on success, non-0 otherwise.
853  * Assumes vcpu_load() was already called.
854  */
855 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
856 {
857         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
858 }
859
860 /*
861  * Adapt set_msr() to msr_io()'s calling convention
862  */
863 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
864 {
865         return kvm_set_msr(vcpu, index, *data);
866 }
867
868 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
869 {
870         int version;
871         int r;
872         struct pvclock_wall_clock wc;
873         struct timespec boot;
874
875         if (!wall_clock)
876                 return;
877
878         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
879         if (r)
880                 return;
881
882         if (version & 1)
883                 ++version;  /* first time write, random junk */
884
885         ++version;
886
887         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
888
889         /*
890          * The guest calculates current wall clock time by adding
891          * system time (updated by kvm_guest_time_update below) to the
892          * wall clock specified here.  guest system time equals host
893          * system time for us, thus we must fill in host boot time here.
894          */
895         getboottime(&boot);
896
897         wc.sec = boot.tv_sec;
898         wc.nsec = boot.tv_nsec;
899         wc.version = version;
900
901         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
902
903         version++;
904         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
905 }
906
907 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
908 {
909         uint32_t quotient, remainder;
910
911         /* Don't try to replace with do_div(), this one calculates
912          * "(dividend << 32) / divisor" */
913         __asm__ ( "divl %4"
914                   : "=a" (quotient), "=d" (remainder)
915                   : "0" (0), "1" (dividend), "r" (divisor) );
916         return quotient;
917 }
918
919 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
920                                s8 *pshift, u32 *pmultiplier)
921 {
922         uint64_t scaled64;
923         int32_t  shift = 0;
924         uint64_t tps64;
925         uint32_t tps32;
926
927         tps64 = base_khz * 1000LL;
928         scaled64 = scaled_khz * 1000LL;
929         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
930                 tps64 >>= 1;
931                 shift--;
932         }
933
934         tps32 = (uint32_t)tps64;
935         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
936                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
937                         scaled64 >>= 1;
938                 else
939                         tps32 <<= 1;
940                 shift++;
941         }
942
943         *pshift = shift;
944         *pmultiplier = div_frac(scaled64, tps32);
945
946         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
947                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
948 }
949
950 static inline u64 get_kernel_ns(void)
951 {
952         struct timespec ts;
953
954         WARN_ON(preemptible());
955         ktime_get_ts(&ts);
956         monotonic_to_bootbased(&ts);
957         return timespec_to_ns(&ts);
958 }
959
960 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
961 unsigned long max_tsc_khz;
962
963 static inline int kvm_tsc_changes_freq(void)
964 {
965         int cpu = get_cpu();
966         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
967                   cpufreq_quick_get(cpu) != 0;
968         put_cpu();
969         return ret;
970 }
971
972 static u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
973 {
974         if (vcpu->arch.virtual_tsc_khz)
975                 return vcpu->arch.virtual_tsc_khz;
976         else
977                 return __this_cpu_read(cpu_tsc_khz);
978 }
979
980 static inline u64 nsec_to_cycles(u64 nsec)
981 {
982         u64 ret;
983
984         WARN_ON(preemptible());
985         if (kvm_tsc_changes_freq())
986                 printk_once(KERN_WARNING
987                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
988         ret = nsec * __this_cpu_read(cpu_tsc_khz);
989         do_div(ret, USEC_PER_SEC);
990         return ret;
991 }
992
993 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
994 {
995         /* Compute a scale to convert nanoseconds in TSC cycles */
996         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
997                            &vcpu->arch.tsc_catchup_shift,
998                            &vcpu->arch.tsc_catchup_mult);
999 }
1000
1001 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1002 {
1003         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1004                                       vcpu->arch.tsc_catchup_mult,
1005                                       vcpu->arch.tsc_catchup_shift);
1006         tsc += vcpu->arch.last_tsc_write;
1007         return tsc;
1008 }
1009
1010 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1011 {
1012         struct kvm *kvm = vcpu->kvm;
1013         u64 offset, ns, elapsed;
1014         unsigned long flags;
1015         s64 sdiff;
1016
1017         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1018         offset = data - native_read_tsc();
1019         ns = get_kernel_ns();
1020         elapsed = ns - kvm->arch.last_tsc_nsec;
1021         sdiff = data - kvm->arch.last_tsc_write;
1022         if (sdiff < 0)
1023                 sdiff = -sdiff;
1024
1025         /*
1026          * Special case: close write to TSC within 5 seconds of
1027          * another CPU is interpreted as an attempt to synchronize
1028          * The 5 seconds is to accommodate host load / swapping as
1029          * well as any reset of TSC during the boot process.
1030          *
1031          * In that case, for a reliable TSC, we can match TSC offsets,
1032          * or make a best guest using elapsed value.
1033          */
1034         if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1035             elapsed < 5ULL * NSEC_PER_SEC) {
1036                 if (!check_tsc_unstable()) {
1037                         offset = kvm->arch.last_tsc_offset;
1038                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1039                 } else {
1040                         u64 delta = nsec_to_cycles(elapsed);
1041                         offset += delta;
1042                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1043                 }
1044                 ns = kvm->arch.last_tsc_nsec;
1045         }
1046         kvm->arch.last_tsc_nsec = ns;
1047         kvm->arch.last_tsc_write = data;
1048         kvm->arch.last_tsc_offset = offset;
1049         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1050         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1051
1052         /* Reset of TSC must disable overshoot protection below */
1053         vcpu->arch.hv_clock.tsc_timestamp = 0;
1054         vcpu->arch.last_tsc_write = data;
1055         vcpu->arch.last_tsc_nsec = ns;
1056 }
1057 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1058
1059 static int kvm_guest_time_update(struct kvm_vcpu *v)
1060 {
1061         unsigned long flags;
1062         struct kvm_vcpu_arch *vcpu = &v->arch;
1063         void *shared_kaddr;
1064         unsigned long this_tsc_khz;
1065         s64 kernel_ns, max_kernel_ns;
1066         u64 tsc_timestamp;
1067
1068         /* Keep irq disabled to prevent changes to the clock */
1069         local_irq_save(flags);
1070         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1071         kernel_ns = get_kernel_ns();
1072         this_tsc_khz = vcpu_tsc_khz(v);
1073         if (unlikely(this_tsc_khz == 0)) {
1074                 local_irq_restore(flags);
1075                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1076                 return 1;
1077         }
1078
1079         /*
1080          * We may have to catch up the TSC to match elapsed wall clock
1081          * time for two reasons, even if kvmclock is used.
1082          *   1) CPU could have been running below the maximum TSC rate
1083          *   2) Broken TSC compensation resets the base at each VCPU
1084          *      entry to avoid unknown leaps of TSC even when running
1085          *      again on the same CPU.  This may cause apparent elapsed
1086          *      time to disappear, and the guest to stand still or run
1087          *      very slowly.
1088          */
1089         if (vcpu->tsc_catchup) {
1090                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1091                 if (tsc > tsc_timestamp) {
1092                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1093                         tsc_timestamp = tsc;
1094                 }
1095         }
1096
1097         local_irq_restore(flags);
1098
1099         if (!vcpu->time_page)
1100                 return 0;
1101
1102         /*
1103          * Time as measured by the TSC may go backwards when resetting the base
1104          * tsc_timestamp.  The reason for this is that the TSC resolution is
1105          * higher than the resolution of the other clock scales.  Thus, many
1106          * possible measurments of the TSC correspond to one measurement of any
1107          * other clock, and so a spread of values is possible.  This is not a
1108          * problem for the computation of the nanosecond clock; with TSC rates
1109          * around 1GHZ, there can only be a few cycles which correspond to one
1110          * nanosecond value, and any path through this code will inevitably
1111          * take longer than that.  However, with the kernel_ns value itself,
1112          * the precision may be much lower, down to HZ granularity.  If the
1113          * first sampling of TSC against kernel_ns ends in the low part of the
1114          * range, and the second in the high end of the range, we can get:
1115          *
1116          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1117          *
1118          * As the sampling errors potentially range in the thousands of cycles,
1119          * it is possible such a time value has already been observed by the
1120          * guest.  To protect against this, we must compute the system time as
1121          * observed by the guest and ensure the new system time is greater.
1122          */
1123         max_kernel_ns = 0;
1124         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1125                 max_kernel_ns = vcpu->last_guest_tsc -
1126                                 vcpu->hv_clock.tsc_timestamp;
1127                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1128                                     vcpu->hv_clock.tsc_to_system_mul,
1129                                     vcpu->hv_clock.tsc_shift);
1130                 max_kernel_ns += vcpu->last_kernel_ns;
1131         }
1132
1133         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1134                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1135                                    &vcpu->hv_clock.tsc_shift,
1136                                    &vcpu->hv_clock.tsc_to_system_mul);
1137                 vcpu->hw_tsc_khz = this_tsc_khz;
1138         }
1139
1140         if (max_kernel_ns > kernel_ns)
1141                 kernel_ns = max_kernel_ns;
1142
1143         /* With all the info we got, fill in the values */
1144         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1145         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1146         vcpu->last_kernel_ns = kernel_ns;
1147         vcpu->last_guest_tsc = tsc_timestamp;
1148         vcpu->hv_clock.flags = 0;
1149
1150         /*
1151          * The interface expects us to write an even number signaling that the
1152          * update is finished. Since the guest won't see the intermediate
1153          * state, we just increase by 2 at the end.
1154          */
1155         vcpu->hv_clock.version += 2;
1156
1157         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1158
1159         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1160                sizeof(vcpu->hv_clock));
1161
1162         kunmap_atomic(shared_kaddr, KM_USER0);
1163
1164         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1165         return 0;
1166 }
1167
1168 static bool msr_mtrr_valid(unsigned msr)
1169 {
1170         switch (msr) {
1171         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1172         case MSR_MTRRfix64K_00000:
1173         case MSR_MTRRfix16K_80000:
1174         case MSR_MTRRfix16K_A0000:
1175         case MSR_MTRRfix4K_C0000:
1176         case MSR_MTRRfix4K_C8000:
1177         case MSR_MTRRfix4K_D0000:
1178         case MSR_MTRRfix4K_D8000:
1179         case MSR_MTRRfix4K_E0000:
1180         case MSR_MTRRfix4K_E8000:
1181         case MSR_MTRRfix4K_F0000:
1182         case MSR_MTRRfix4K_F8000:
1183         case MSR_MTRRdefType:
1184         case MSR_IA32_CR_PAT:
1185                 return true;
1186         case 0x2f8:
1187                 return true;
1188         }
1189         return false;
1190 }
1191
1192 static bool valid_pat_type(unsigned t)
1193 {
1194         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1195 }
1196
1197 static bool valid_mtrr_type(unsigned t)
1198 {
1199         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1200 }
1201
1202 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1203 {
1204         int i;
1205
1206         if (!msr_mtrr_valid(msr))
1207                 return false;
1208
1209         if (msr == MSR_IA32_CR_PAT) {
1210                 for (i = 0; i < 8; i++)
1211                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1212                                 return false;
1213                 return true;
1214         } else if (msr == MSR_MTRRdefType) {
1215                 if (data & ~0xcff)
1216                         return false;
1217                 return valid_mtrr_type(data & 0xff);
1218         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1219                 for (i = 0; i < 8 ; i++)
1220                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1221                                 return false;
1222                 return true;
1223         }
1224
1225         /* variable MTRRs */
1226         return valid_mtrr_type(data & 0xff);
1227 }
1228
1229 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1230 {
1231         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1232
1233         if (!mtrr_valid(vcpu, msr, data))
1234                 return 1;
1235
1236         if (msr == MSR_MTRRdefType) {
1237                 vcpu->arch.mtrr_state.def_type = data;
1238                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1239         } else if (msr == MSR_MTRRfix64K_00000)
1240                 p[0] = data;
1241         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1242                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1243         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1244                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1245         else if (msr == MSR_IA32_CR_PAT)
1246                 vcpu->arch.pat = data;
1247         else {  /* Variable MTRRs */
1248                 int idx, is_mtrr_mask;
1249                 u64 *pt;
1250
1251                 idx = (msr - 0x200) / 2;
1252                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1253                 if (!is_mtrr_mask)
1254                         pt =
1255                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1256                 else
1257                         pt =
1258                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1259                 *pt = data;
1260         }
1261
1262         kvm_mmu_reset_context(vcpu);
1263         return 0;
1264 }
1265
1266 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1267 {
1268         u64 mcg_cap = vcpu->arch.mcg_cap;
1269         unsigned bank_num = mcg_cap & 0xff;
1270
1271         switch (msr) {
1272         case MSR_IA32_MCG_STATUS:
1273                 vcpu->arch.mcg_status = data;
1274                 break;
1275         case MSR_IA32_MCG_CTL:
1276                 if (!(mcg_cap & MCG_CTL_P))
1277                         return 1;
1278                 if (data != 0 && data != ~(u64)0)
1279                         return -1;
1280                 vcpu->arch.mcg_ctl = data;
1281                 break;
1282         default:
1283                 if (msr >= MSR_IA32_MC0_CTL &&
1284                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1285                         u32 offset = msr - MSR_IA32_MC0_CTL;
1286                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1287                          * some Linux kernels though clear bit 10 in bank 4 to
1288                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1289                          * this to avoid an uncatched #GP in the guest
1290                          */
1291                         if ((offset & 0x3) == 0 &&
1292                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1293                                 return -1;
1294                         vcpu->arch.mce_banks[offset] = data;
1295                         break;
1296                 }
1297                 return 1;
1298         }
1299         return 0;
1300 }
1301
1302 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1303 {
1304         struct kvm *kvm = vcpu->kvm;
1305         int lm = is_long_mode(vcpu);
1306         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1307                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1308         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1309                 : kvm->arch.xen_hvm_config.blob_size_32;
1310         u32 page_num = data & ~PAGE_MASK;
1311         u64 page_addr = data & PAGE_MASK;
1312         u8 *page;
1313         int r;
1314
1315         r = -E2BIG;
1316         if (page_num >= blob_size)
1317                 goto out;
1318         r = -ENOMEM;
1319         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1320         if (!page)
1321                 goto out;
1322         r = -EFAULT;
1323         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1324                 goto out_free;
1325         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1326                 goto out_free;
1327         r = 0;
1328 out_free:
1329         kfree(page);
1330 out:
1331         return r;
1332 }
1333
1334 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1335 {
1336         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1337 }
1338
1339 static bool kvm_hv_msr_partition_wide(u32 msr)
1340 {
1341         bool r = false;
1342         switch (msr) {
1343         case HV_X64_MSR_GUEST_OS_ID:
1344         case HV_X64_MSR_HYPERCALL:
1345                 r = true;
1346                 break;
1347         }
1348
1349         return r;
1350 }
1351
1352 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1353 {
1354         struct kvm *kvm = vcpu->kvm;
1355
1356         switch (msr) {
1357         case HV_X64_MSR_GUEST_OS_ID:
1358                 kvm->arch.hv_guest_os_id = data;
1359                 /* setting guest os id to zero disables hypercall page */
1360                 if (!kvm->arch.hv_guest_os_id)
1361                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1362                 break;
1363         case HV_X64_MSR_HYPERCALL: {
1364                 u64 gfn;
1365                 unsigned long addr;
1366                 u8 instructions[4];
1367
1368                 /* if guest os id is not set hypercall should remain disabled */
1369                 if (!kvm->arch.hv_guest_os_id)
1370                         break;
1371                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1372                         kvm->arch.hv_hypercall = data;
1373                         break;
1374                 }
1375                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1376                 addr = gfn_to_hva(kvm, gfn);
1377                 if (kvm_is_error_hva(addr))
1378                         return 1;
1379                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1380                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1381                 if (copy_to_user((void __user *)addr, instructions, 4))
1382                         return 1;
1383                 kvm->arch.hv_hypercall = data;
1384                 break;
1385         }
1386         default:
1387                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1388                           "data 0x%llx\n", msr, data);
1389                 return 1;
1390         }
1391         return 0;
1392 }
1393
1394 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1395 {
1396         switch (msr) {
1397         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1398                 unsigned long addr;
1399
1400                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1401                         vcpu->arch.hv_vapic = data;
1402                         break;
1403                 }
1404                 addr = gfn_to_hva(vcpu->kvm, data >>
1405                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1406                 if (kvm_is_error_hva(addr))
1407                         return 1;
1408                 if (clear_user((void __user *)addr, PAGE_SIZE))
1409                         return 1;
1410                 vcpu->arch.hv_vapic = data;
1411                 break;
1412         }
1413         case HV_X64_MSR_EOI:
1414                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1415         case HV_X64_MSR_ICR:
1416                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1417         case HV_X64_MSR_TPR:
1418                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1419         default:
1420                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1421                           "data 0x%llx\n", msr, data);
1422                 return 1;
1423         }
1424
1425         return 0;
1426 }
1427
1428 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1429 {
1430         gpa_t gpa = data & ~0x3f;
1431
1432         /* Bits 2:5 are resrved, Should be zero */
1433         if (data & 0x3c)
1434                 return 1;
1435
1436         vcpu->arch.apf.msr_val = data;
1437
1438         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1439                 kvm_clear_async_pf_completion_queue(vcpu);
1440                 kvm_async_pf_hash_reset(vcpu);
1441                 return 0;
1442         }
1443
1444         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1445                 return 1;
1446
1447         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1448         kvm_async_pf_wakeup_all(vcpu);
1449         return 0;
1450 }
1451
1452 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1453 {
1454         if (vcpu->arch.time_page) {
1455                 kvm_release_page_dirty(vcpu->arch.time_page);
1456                 vcpu->arch.time_page = NULL;
1457         }
1458 }
1459
1460 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1461 {
1462         switch (msr) {
1463         case MSR_EFER:
1464                 return set_efer(vcpu, data);
1465         case MSR_K7_HWCR:
1466                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1467                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1468                 if (data != 0) {
1469                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1470                                 data);
1471                         return 1;
1472                 }
1473                 break;
1474         case MSR_FAM10H_MMIO_CONF_BASE:
1475                 if (data != 0) {
1476                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1477                                 "0x%llx\n", data);
1478                         return 1;
1479                 }
1480                 break;
1481         case MSR_AMD64_NB_CFG:
1482                 break;
1483         case MSR_IA32_DEBUGCTLMSR:
1484                 if (!data) {
1485                         /* We support the non-activated case already */
1486                         break;
1487                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1488                         /* Values other than LBR and BTF are vendor-specific,
1489                            thus reserved and should throw a #GP */
1490                         return 1;
1491                 }
1492                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1493                         __func__, data);
1494                 break;
1495         case MSR_IA32_UCODE_REV:
1496         case MSR_IA32_UCODE_WRITE:
1497         case MSR_VM_HSAVE_PA:
1498         case MSR_AMD64_PATCH_LOADER:
1499                 break;
1500         case 0x200 ... 0x2ff:
1501                 return set_msr_mtrr(vcpu, msr, data);
1502         case MSR_IA32_APICBASE:
1503                 kvm_set_apic_base(vcpu, data);
1504                 break;
1505         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1506                 return kvm_x2apic_msr_write(vcpu, msr, data);
1507         case MSR_IA32_MISC_ENABLE:
1508                 vcpu->arch.ia32_misc_enable_msr = data;
1509                 break;
1510         case MSR_KVM_WALL_CLOCK_NEW:
1511         case MSR_KVM_WALL_CLOCK:
1512                 vcpu->kvm->arch.wall_clock = data;
1513                 kvm_write_wall_clock(vcpu->kvm, data);
1514                 break;
1515         case MSR_KVM_SYSTEM_TIME_NEW:
1516         case MSR_KVM_SYSTEM_TIME: {
1517                 kvmclock_reset(vcpu);
1518
1519                 vcpu->arch.time = data;
1520                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1521
1522                 /* we verify if the enable bit is set... */
1523                 if (!(data & 1))
1524                         break;
1525
1526                 /* ...but clean it before doing the actual write */
1527                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1528
1529                 vcpu->arch.time_page =
1530                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1531
1532                 if (is_error_page(vcpu->arch.time_page)) {
1533                         kvm_release_page_clean(vcpu->arch.time_page);
1534                         vcpu->arch.time_page = NULL;
1535                 }
1536                 break;
1537         }
1538         case MSR_KVM_ASYNC_PF_EN:
1539                 if (kvm_pv_enable_async_pf(vcpu, data))
1540                         return 1;
1541                 break;
1542         case MSR_IA32_MCG_CTL:
1543         case MSR_IA32_MCG_STATUS:
1544         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1545                 return set_msr_mce(vcpu, msr, data);
1546
1547         /* Performance counters are not protected by a CPUID bit,
1548          * so we should check all of them in the generic path for the sake of
1549          * cross vendor migration.
1550          * Writing a zero into the event select MSRs disables them,
1551          * which we perfectly emulate ;-). Any other value should be at least
1552          * reported, some guests depend on them.
1553          */
1554         case MSR_P6_EVNTSEL0:
1555         case MSR_P6_EVNTSEL1:
1556         case MSR_K7_EVNTSEL0:
1557         case MSR_K7_EVNTSEL1:
1558         case MSR_K7_EVNTSEL2:
1559         case MSR_K7_EVNTSEL3:
1560                 if (data != 0)
1561                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1562                                 "0x%x data 0x%llx\n", msr, data);
1563                 break;
1564         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1565          * so we ignore writes to make it happy.
1566          */
1567         case MSR_P6_PERFCTR0:
1568         case MSR_P6_PERFCTR1:
1569         case MSR_K7_PERFCTR0:
1570         case MSR_K7_PERFCTR1:
1571         case MSR_K7_PERFCTR2:
1572         case MSR_K7_PERFCTR3:
1573                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1574                         "0x%x data 0x%llx\n", msr, data);
1575                 break;
1576         case MSR_K7_CLK_CTL:
1577                 /*
1578                  * Ignore all writes to this no longer documented MSR.
1579                  * Writes are only relevant for old K7 processors,
1580                  * all pre-dating SVM, but a recommended workaround from
1581                  * AMD for these chips. It is possible to speicify the
1582                  * affected processor models on the command line, hence
1583                  * the need to ignore the workaround.
1584                  */
1585                 break;
1586         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1587                 if (kvm_hv_msr_partition_wide(msr)) {
1588                         int r;
1589                         mutex_lock(&vcpu->kvm->lock);
1590                         r = set_msr_hyperv_pw(vcpu, msr, data);
1591                         mutex_unlock(&vcpu->kvm->lock);
1592                         return r;
1593                 } else
1594                         return set_msr_hyperv(vcpu, msr, data);
1595                 break;
1596         case MSR_IA32_BBL_CR_CTL3:
1597                 /* Drop writes to this legacy MSR -- see rdmsr
1598                  * counterpart for further detail.
1599                  */
1600                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1601                 break;
1602         default:
1603                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1604                         return xen_hvm_config(vcpu, data);
1605                 if (!ignore_msrs) {
1606                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1607                                 msr, data);
1608                         return 1;
1609                 } else {
1610                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1611                                 msr, data);
1612                         break;
1613                 }
1614         }
1615         return 0;
1616 }
1617 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1618
1619
1620 /*
1621  * Reads an msr value (of 'msr_index') into 'pdata'.
1622  * Returns 0 on success, non-0 otherwise.
1623  * Assumes vcpu_load() was already called.
1624  */
1625 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1626 {
1627         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1628 }
1629
1630 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1631 {
1632         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1633
1634         if (!msr_mtrr_valid(msr))
1635                 return 1;
1636
1637         if (msr == MSR_MTRRdefType)
1638                 *pdata = vcpu->arch.mtrr_state.def_type +
1639                          (vcpu->arch.mtrr_state.enabled << 10);
1640         else if (msr == MSR_MTRRfix64K_00000)
1641                 *pdata = p[0];
1642         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1643                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1644         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1645                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1646         else if (msr == MSR_IA32_CR_PAT)
1647                 *pdata = vcpu->arch.pat;
1648         else {  /* Variable MTRRs */
1649                 int idx, is_mtrr_mask;
1650                 u64 *pt;
1651
1652                 idx = (msr - 0x200) / 2;
1653                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1654                 if (!is_mtrr_mask)
1655                         pt =
1656                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1657                 else
1658                         pt =
1659                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1660                 *pdata = *pt;
1661         }
1662
1663         return 0;
1664 }
1665
1666 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1667 {
1668         u64 data;
1669         u64 mcg_cap = vcpu->arch.mcg_cap;
1670         unsigned bank_num = mcg_cap & 0xff;
1671
1672         switch (msr) {
1673         case MSR_IA32_P5_MC_ADDR:
1674         case MSR_IA32_P5_MC_TYPE:
1675                 data = 0;
1676                 break;
1677         case MSR_IA32_MCG_CAP:
1678                 data = vcpu->arch.mcg_cap;
1679                 break;
1680         case MSR_IA32_MCG_CTL:
1681                 if (!(mcg_cap & MCG_CTL_P))
1682                         return 1;
1683                 data = vcpu->arch.mcg_ctl;
1684                 break;
1685         case MSR_IA32_MCG_STATUS:
1686                 data = vcpu->arch.mcg_status;
1687                 break;
1688         default:
1689                 if (msr >= MSR_IA32_MC0_CTL &&
1690                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1691                         u32 offset = msr - MSR_IA32_MC0_CTL;
1692                         data = vcpu->arch.mce_banks[offset];
1693                         break;
1694                 }
1695                 return 1;
1696         }
1697         *pdata = data;
1698         return 0;
1699 }
1700
1701 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1702 {
1703         u64 data = 0;
1704         struct kvm *kvm = vcpu->kvm;
1705
1706         switch (msr) {
1707         case HV_X64_MSR_GUEST_OS_ID:
1708                 data = kvm->arch.hv_guest_os_id;
1709                 break;
1710         case HV_X64_MSR_HYPERCALL:
1711                 data = kvm->arch.hv_hypercall;
1712                 break;
1713         default:
1714                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1715                 return 1;
1716         }
1717
1718         *pdata = data;
1719         return 0;
1720 }
1721
1722 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1723 {
1724         u64 data = 0;
1725
1726         switch (msr) {
1727         case HV_X64_MSR_VP_INDEX: {
1728                 int r;
1729                 struct kvm_vcpu *v;
1730                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1731                         if (v == vcpu)
1732                                 data = r;
1733                 break;
1734         }
1735         case HV_X64_MSR_EOI:
1736                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1737         case HV_X64_MSR_ICR:
1738                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1739         case HV_X64_MSR_TPR:
1740                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1741         default:
1742                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1743                 return 1;
1744         }
1745         *pdata = data;
1746         return 0;
1747 }
1748
1749 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1750 {
1751         u64 data;
1752
1753         switch (msr) {
1754         case MSR_IA32_PLATFORM_ID:
1755         case MSR_IA32_UCODE_REV:
1756         case MSR_IA32_EBL_CR_POWERON:
1757         case MSR_IA32_DEBUGCTLMSR:
1758         case MSR_IA32_LASTBRANCHFROMIP:
1759         case MSR_IA32_LASTBRANCHTOIP:
1760         case MSR_IA32_LASTINTFROMIP:
1761         case MSR_IA32_LASTINTTOIP:
1762         case MSR_K8_SYSCFG:
1763         case MSR_K7_HWCR:
1764         case MSR_VM_HSAVE_PA:
1765         case MSR_P6_PERFCTR0:
1766         case MSR_P6_PERFCTR1:
1767         case MSR_P6_EVNTSEL0:
1768         case MSR_P6_EVNTSEL1:
1769         case MSR_K7_EVNTSEL0:
1770         case MSR_K7_PERFCTR0:
1771         case MSR_K8_INT_PENDING_MSG:
1772         case MSR_AMD64_NB_CFG:
1773         case MSR_FAM10H_MMIO_CONF_BASE:
1774                 data = 0;
1775                 break;
1776         case MSR_MTRRcap:
1777                 data = 0x500 | KVM_NR_VAR_MTRR;
1778                 break;
1779         case 0x200 ... 0x2ff:
1780                 return get_msr_mtrr(vcpu, msr, pdata);
1781         case 0xcd: /* fsb frequency */
1782                 data = 3;
1783                 break;
1784                 /*
1785                  * MSR_EBC_FREQUENCY_ID
1786                  * Conservative value valid for even the basic CPU models.
1787                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1788                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1789                  * and 266MHz for model 3, or 4. Set Core Clock
1790                  * Frequency to System Bus Frequency Ratio to 1 (bits
1791                  * 31:24) even though these are only valid for CPU
1792                  * models > 2, however guests may end up dividing or
1793                  * multiplying by zero otherwise.
1794                  */
1795         case MSR_EBC_FREQUENCY_ID:
1796                 data = 1 << 24;
1797                 break;
1798         case MSR_IA32_APICBASE:
1799                 data = kvm_get_apic_base(vcpu);
1800                 break;
1801         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1802                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1803                 break;
1804         case MSR_IA32_MISC_ENABLE:
1805                 data = vcpu->arch.ia32_misc_enable_msr;
1806                 break;
1807         case MSR_IA32_PERF_STATUS:
1808                 /* TSC increment by tick */
1809                 data = 1000ULL;
1810                 /* CPU multiplier */
1811                 data |= (((uint64_t)4ULL) << 40);
1812                 break;
1813         case MSR_EFER:
1814                 data = vcpu->arch.efer;
1815                 break;
1816         case MSR_KVM_WALL_CLOCK:
1817         case MSR_KVM_WALL_CLOCK_NEW:
1818                 data = vcpu->kvm->arch.wall_clock;
1819                 break;
1820         case MSR_KVM_SYSTEM_TIME:
1821         case MSR_KVM_SYSTEM_TIME_NEW:
1822                 data = vcpu->arch.time;
1823                 break;
1824         case MSR_KVM_ASYNC_PF_EN:
1825                 data = vcpu->arch.apf.msr_val;
1826                 break;
1827         case MSR_IA32_P5_MC_ADDR:
1828         case MSR_IA32_P5_MC_TYPE:
1829         case MSR_IA32_MCG_CAP:
1830         case MSR_IA32_MCG_CTL:
1831         case MSR_IA32_MCG_STATUS:
1832         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1833                 return get_msr_mce(vcpu, msr, pdata);
1834         case MSR_K7_CLK_CTL:
1835                 /*
1836                  * Provide expected ramp-up count for K7. All other
1837                  * are set to zero, indicating minimum divisors for
1838                  * every field.
1839                  *
1840                  * This prevents guest kernels on AMD host with CPU
1841                  * type 6, model 8 and higher from exploding due to
1842                  * the rdmsr failing.
1843                  */
1844                 data = 0x20000000;
1845                 break;
1846         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1847                 if (kvm_hv_msr_partition_wide(msr)) {
1848                         int r;
1849                         mutex_lock(&vcpu->kvm->lock);
1850                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1851                         mutex_unlock(&vcpu->kvm->lock);
1852                         return r;
1853                 } else
1854                         return get_msr_hyperv(vcpu, msr, pdata);
1855                 break;
1856         case MSR_IA32_BBL_CR_CTL3:
1857                 /* This legacy MSR exists but isn't fully documented in current
1858                  * silicon.  It is however accessed by winxp in very narrow
1859                  * scenarios where it sets bit #19, itself documented as
1860                  * a "reserved" bit.  Best effort attempt to source coherent
1861                  * read data here should the balance of the register be
1862                  * interpreted by the guest:
1863                  *
1864                  * L2 cache control register 3: 64GB range, 256KB size,
1865                  * enabled, latency 0x1, configured
1866                  */
1867                 data = 0xbe702111;
1868                 break;
1869         default:
1870                 if (!ignore_msrs) {
1871                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1872                         return 1;
1873                 } else {
1874                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1875                         data = 0;
1876                 }
1877                 break;
1878         }
1879         *pdata = data;
1880         return 0;
1881 }
1882 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1883
1884 /*
1885  * Read or write a bunch of msrs. All parameters are kernel addresses.
1886  *
1887  * @return number of msrs set successfully.
1888  */
1889 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1890                     struct kvm_msr_entry *entries,
1891                     int (*do_msr)(struct kvm_vcpu *vcpu,
1892                                   unsigned index, u64 *data))
1893 {
1894         int i, idx;
1895
1896         idx = srcu_read_lock(&vcpu->kvm->srcu);
1897         for (i = 0; i < msrs->nmsrs; ++i)
1898                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1899                         break;
1900         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1901
1902         return i;
1903 }
1904
1905 /*
1906  * Read or write a bunch of msrs. Parameters are user addresses.
1907  *
1908  * @return number of msrs set successfully.
1909  */
1910 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1911                   int (*do_msr)(struct kvm_vcpu *vcpu,
1912                                 unsigned index, u64 *data),
1913                   int writeback)
1914 {
1915         struct kvm_msrs msrs;
1916         struct kvm_msr_entry *entries;
1917         int r, n;
1918         unsigned size;
1919
1920         r = -EFAULT;
1921         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1922                 goto out;
1923
1924         r = -E2BIG;
1925         if (msrs.nmsrs >= MAX_IO_MSRS)
1926                 goto out;
1927
1928         r = -ENOMEM;
1929         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1930         entries = kmalloc(size, GFP_KERNEL);
1931         if (!entries)
1932                 goto out;
1933
1934         r = -EFAULT;
1935         if (copy_from_user(entries, user_msrs->entries, size))
1936                 goto out_free;
1937
1938         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1939         if (r < 0)
1940                 goto out_free;
1941
1942         r = -EFAULT;
1943         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1944                 goto out_free;
1945
1946         r = n;
1947
1948 out_free:
1949         kfree(entries);
1950 out:
1951         return r;
1952 }
1953
1954 int kvm_dev_ioctl_check_extension(long ext)
1955 {
1956         int r;
1957
1958         switch (ext) {
1959         case KVM_CAP_IRQCHIP:
1960         case KVM_CAP_HLT:
1961         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1962         case KVM_CAP_SET_TSS_ADDR:
1963         case KVM_CAP_EXT_CPUID:
1964         case KVM_CAP_CLOCKSOURCE:
1965         case KVM_CAP_PIT:
1966         case KVM_CAP_NOP_IO_DELAY:
1967         case KVM_CAP_MP_STATE:
1968         case KVM_CAP_SYNC_MMU:
1969         case KVM_CAP_USER_NMI:
1970         case KVM_CAP_REINJECT_CONTROL:
1971         case KVM_CAP_IRQ_INJECT_STATUS:
1972         case KVM_CAP_ASSIGN_DEV_IRQ:
1973         case KVM_CAP_IRQFD:
1974         case KVM_CAP_IOEVENTFD:
1975         case KVM_CAP_PIT2:
1976         case KVM_CAP_PIT_STATE2:
1977         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1978         case KVM_CAP_XEN_HVM:
1979         case KVM_CAP_ADJUST_CLOCK:
1980         case KVM_CAP_VCPU_EVENTS:
1981         case KVM_CAP_HYPERV:
1982         case KVM_CAP_HYPERV_VAPIC:
1983         case KVM_CAP_HYPERV_SPIN:
1984         case KVM_CAP_PCI_SEGMENT:
1985         case KVM_CAP_DEBUGREGS:
1986         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1987         case KVM_CAP_XSAVE:
1988         case KVM_CAP_ASYNC_PF:
1989                 r = 1;
1990                 break;
1991         case KVM_CAP_COALESCED_MMIO:
1992                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1993                 break;
1994         case KVM_CAP_VAPIC:
1995                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1996                 break;
1997         case KVM_CAP_NR_VCPUS:
1998                 r = KVM_MAX_VCPUS;
1999                 break;
2000         case KVM_CAP_NR_MEMSLOTS:
2001                 r = KVM_MEMORY_SLOTS;
2002                 break;
2003         case KVM_CAP_PV_MMU:    /* obsolete */
2004                 r = 0;
2005                 break;
2006         case KVM_CAP_IOMMU:
2007                 r = iommu_found();
2008                 break;
2009         case KVM_CAP_MCE:
2010                 r = KVM_MAX_MCE_BANKS;
2011                 break;
2012         case KVM_CAP_XCRS:
2013                 r = cpu_has_xsave;
2014                 break;
2015         default:
2016                 r = 0;
2017                 break;
2018         }
2019         return r;
2020
2021 }
2022
2023 long kvm_arch_dev_ioctl(struct file *filp,
2024                         unsigned int ioctl, unsigned long arg)
2025 {
2026         void __user *argp = (void __user *)arg;
2027         long r;
2028
2029         switch (ioctl) {
2030         case KVM_GET_MSR_INDEX_LIST: {
2031                 struct kvm_msr_list __user *user_msr_list = argp;
2032                 struct kvm_msr_list msr_list;
2033                 unsigned n;
2034
2035                 r = -EFAULT;
2036                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2037                         goto out;
2038                 n = msr_list.nmsrs;
2039                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2040                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2041                         goto out;
2042                 r = -E2BIG;
2043                 if (n < msr_list.nmsrs)
2044                         goto out;
2045                 r = -EFAULT;
2046                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2047                                  num_msrs_to_save * sizeof(u32)))
2048                         goto out;
2049                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2050                                  &emulated_msrs,
2051                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2052                         goto out;
2053                 r = 0;
2054                 break;
2055         }
2056         case KVM_GET_SUPPORTED_CPUID: {
2057                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2058                 struct kvm_cpuid2 cpuid;
2059
2060                 r = -EFAULT;
2061                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2062                         goto out;
2063                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2064                                                       cpuid_arg->entries);
2065                 if (r)
2066                         goto out;
2067
2068                 r = -EFAULT;
2069                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2070                         goto out;
2071                 r = 0;
2072                 break;
2073         }
2074         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2075                 u64 mce_cap;
2076
2077                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2078                 r = -EFAULT;
2079                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2080                         goto out;
2081                 r = 0;
2082                 break;
2083         }
2084         default:
2085                 r = -EINVAL;
2086         }
2087 out:
2088         return r;
2089 }
2090
2091 static void wbinvd_ipi(void *garbage)
2092 {
2093         wbinvd();
2094 }
2095
2096 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2097 {
2098         return vcpu->kvm->arch.iommu_domain &&
2099                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2100 }
2101
2102 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2103 {
2104         /* Address WBINVD may be executed by guest */
2105         if (need_emulate_wbinvd(vcpu)) {
2106                 if (kvm_x86_ops->has_wbinvd_exit())
2107                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2108                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2109                         smp_call_function_single(vcpu->cpu,
2110                                         wbinvd_ipi, NULL, 1);
2111         }
2112
2113         kvm_x86_ops->vcpu_load(vcpu, cpu);
2114         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2115                 /* Make sure TSC doesn't go backwards */
2116                 s64 tsc_delta;
2117                 u64 tsc;
2118
2119                 kvm_get_msr(vcpu, MSR_IA32_TSC, &tsc);
2120                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2121                              tsc - vcpu->arch.last_guest_tsc;
2122
2123                 if (tsc_delta < 0)
2124                         mark_tsc_unstable("KVM discovered backwards TSC");
2125                 if (check_tsc_unstable()) {
2126                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2127                         vcpu->arch.tsc_catchup = 1;
2128                 }
2129                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2130                 if (vcpu->cpu != cpu)
2131                         kvm_migrate_timers(vcpu);
2132                 vcpu->cpu = cpu;
2133         }
2134 }
2135
2136 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2137 {
2138         kvm_x86_ops->vcpu_put(vcpu);
2139         kvm_put_guest_fpu(vcpu);
2140         vcpu->arch.last_host_tsc = native_read_tsc();
2141 }
2142
2143 static int is_efer_nx(void)
2144 {
2145         unsigned long long efer = 0;
2146
2147         rdmsrl_safe(MSR_EFER, &efer);
2148         return efer & EFER_NX;
2149 }
2150
2151 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2152 {
2153         int i;
2154         struct kvm_cpuid_entry2 *e, *entry;
2155
2156         entry = NULL;
2157         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2158                 e = &vcpu->arch.cpuid_entries[i];
2159                 if (e->function == 0x80000001) {
2160                         entry = e;
2161                         break;
2162                 }
2163         }
2164         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2165                 entry->edx &= ~(1 << 20);
2166                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2167         }
2168 }
2169
2170 /* when an old userspace process fills a new kernel module */
2171 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2172                                     struct kvm_cpuid *cpuid,
2173                                     struct kvm_cpuid_entry __user *entries)
2174 {
2175         int r, i;
2176         struct kvm_cpuid_entry *cpuid_entries;
2177
2178         r = -E2BIG;
2179         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2180                 goto out;
2181         r = -ENOMEM;
2182         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2183         if (!cpuid_entries)
2184                 goto out;
2185         r = -EFAULT;
2186         if (copy_from_user(cpuid_entries, entries,
2187                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2188                 goto out_free;
2189         for (i = 0; i < cpuid->nent; i++) {
2190                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2191                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2192                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2193                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2194                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2195                 vcpu->arch.cpuid_entries[i].index = 0;
2196                 vcpu->arch.cpuid_entries[i].flags = 0;
2197                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2198                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2199                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2200         }
2201         vcpu->arch.cpuid_nent = cpuid->nent;
2202         cpuid_fix_nx_cap(vcpu);
2203         r = 0;
2204         kvm_apic_set_version(vcpu);
2205         kvm_x86_ops->cpuid_update(vcpu);
2206         update_cpuid(vcpu);
2207
2208 out_free:
2209         vfree(cpuid_entries);
2210 out:
2211         return r;
2212 }
2213
2214 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2215                                      struct kvm_cpuid2 *cpuid,
2216                                      struct kvm_cpuid_entry2 __user *entries)
2217 {
2218         int r;
2219
2220         r = -E2BIG;
2221         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2222                 goto out;
2223         r = -EFAULT;
2224         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2225                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2226                 goto out;
2227         vcpu->arch.cpuid_nent = cpuid->nent;
2228         kvm_apic_set_version(vcpu);
2229         kvm_x86_ops->cpuid_update(vcpu);
2230         update_cpuid(vcpu);
2231         return 0;
2232
2233 out:
2234         return r;
2235 }
2236
2237 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2238                                      struct kvm_cpuid2 *cpuid,
2239                                      struct kvm_cpuid_entry2 __user *entries)
2240 {
2241         int r;
2242
2243         r = -E2BIG;
2244         if (cpuid->nent < vcpu->arch.cpuid_nent)
2245                 goto out;
2246         r = -EFAULT;
2247         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2248                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2249                 goto out;
2250         return 0;
2251
2252 out:
2253         cpuid->nent = vcpu->arch.cpuid_nent;
2254         return r;
2255 }
2256
2257 static void cpuid_mask(u32 *word, int wordnum)
2258 {
2259         *word &= boot_cpu_data.x86_capability[wordnum];
2260 }
2261
2262 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2263                            u32 index)
2264 {
2265         entry->function = function;
2266         entry->index = index;
2267         cpuid_count(entry->function, entry->index,
2268                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2269         entry->flags = 0;
2270 }
2271
2272 #define F(x) bit(X86_FEATURE_##x)
2273
2274 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2275                          u32 index, int *nent, int maxnent)
2276 {
2277         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2278 #ifdef CONFIG_X86_64
2279         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2280                                 ? F(GBPAGES) : 0;
2281         unsigned f_lm = F(LM);
2282 #else
2283         unsigned f_gbpages = 0;
2284         unsigned f_lm = 0;
2285 #endif
2286         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2287
2288         /* cpuid 1.edx */
2289         const u32 kvm_supported_word0_x86_features =
2290                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2291                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2292                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2293                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2294                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2295                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2296                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2297                 0 /* HTT, TM, Reserved, PBE */;
2298         /* cpuid 0x80000001.edx */
2299         const u32 kvm_supported_word1_x86_features =
2300                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2301                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2302                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2303                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2304                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2305                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2306                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2307                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2308         /* cpuid 1.ecx */
2309         const u32 kvm_supported_word4_x86_features =
2310                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2311                 0 /* DS-CPL, VMX, SMX, EST */ |
2312                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2313                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2314                 0 /* Reserved, DCA */ | F(XMM4_1) |
2315                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2316                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2317                 F(F16C);
2318         /* cpuid 0x80000001.ecx */
2319         const u32 kvm_supported_word6_x86_features =
2320                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2321                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2322                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2323                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2324
2325         /* all calls to cpuid_count() should be made on the same cpu */
2326         get_cpu();
2327         do_cpuid_1_ent(entry, function, index);
2328         ++*nent;
2329
2330         switch (function) {
2331         case 0:
2332                 entry->eax = min(entry->eax, (u32)0xd);
2333                 break;
2334         case 1:
2335                 entry->edx &= kvm_supported_word0_x86_features;
2336                 cpuid_mask(&entry->edx, 0);
2337                 entry->ecx &= kvm_supported_word4_x86_features;
2338                 cpuid_mask(&entry->ecx, 4);
2339                 /* we support x2apic emulation even if host does not support
2340                  * it since we emulate x2apic in software */
2341                 entry->ecx |= F(X2APIC);
2342                 break;
2343         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2344          * may return different values. This forces us to get_cpu() before
2345          * issuing the first command, and also to emulate this annoying behavior
2346          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2347         case 2: {
2348                 int t, times = entry->eax & 0xff;
2349
2350                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2351                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2352                 for (t = 1; t < times && *nent < maxnent; ++t) {
2353                         do_cpuid_1_ent(&entry[t], function, 0);
2354                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2355                         ++*nent;
2356                 }
2357                 break;
2358         }
2359         /* function 4 and 0xb have additional index. */
2360         case 4: {
2361                 int i, cache_type;
2362
2363                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2364                 /* read more entries until cache_type is zero */
2365                 for (i = 1; *nent < maxnent; ++i) {
2366                         cache_type = entry[i - 1].eax & 0x1f;
2367                         if (!cache_type)
2368                                 break;
2369                         do_cpuid_1_ent(&entry[i], function, i);
2370                         entry[i].flags |=
2371                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2372                         ++*nent;
2373                 }
2374                 break;
2375         }
2376         case 0xb: {
2377                 int i, level_type;
2378
2379                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2380                 /* read more entries until level_type is zero */
2381                 for (i = 1; *nent < maxnent; ++i) {
2382                         level_type = entry[i - 1].ecx & 0xff00;
2383                         if (!level_type)
2384                                 break;
2385                         do_cpuid_1_ent(&entry[i], function, i);
2386                         entry[i].flags |=
2387                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2388                         ++*nent;
2389                 }
2390                 break;
2391         }
2392         case 0xd: {
2393                 int i;
2394
2395                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2396                 for (i = 1; *nent < maxnent && i < 64; ++i) {
2397                         if (entry[i].eax == 0)
2398                                 continue;
2399                         do_cpuid_1_ent(&entry[i], function, i);
2400                         entry[i].flags |=
2401                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2402                         ++*nent;
2403                 }
2404                 break;
2405         }
2406         case KVM_CPUID_SIGNATURE: {
2407                 char signature[12] = "KVMKVMKVM\0\0";
2408                 u32 *sigptr = (u32 *)signature;
2409                 entry->eax = 0;
2410                 entry->ebx = sigptr[0];
2411                 entry->ecx = sigptr[1];
2412                 entry->edx = sigptr[2];
2413                 break;
2414         }
2415         case KVM_CPUID_FEATURES:
2416                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2417                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2418                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2419                              (1 << KVM_FEATURE_ASYNC_PF) |
2420                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2421                 entry->ebx = 0;
2422                 entry->ecx = 0;
2423                 entry->edx = 0;
2424                 break;
2425         case 0x80000000:
2426                 entry->eax = min(entry->eax, 0x8000001a);
2427                 break;
2428         case 0x80000001:
2429                 entry->edx &= kvm_supported_word1_x86_features;
2430                 cpuid_mask(&entry->edx, 1);
2431                 entry->ecx &= kvm_supported_word6_x86_features;
2432                 cpuid_mask(&entry->ecx, 6);
2433                 break;
2434         }
2435
2436         kvm_x86_ops->set_supported_cpuid(function, entry);
2437
2438         put_cpu();
2439 }
2440
2441 #undef F
2442
2443 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2444                                      struct kvm_cpuid_entry2 __user *entries)
2445 {
2446         struct kvm_cpuid_entry2 *cpuid_entries;
2447         int limit, nent = 0, r = -E2BIG;
2448         u32 func;
2449
2450         if (cpuid->nent < 1)
2451                 goto out;
2452         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2453                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2454         r = -ENOMEM;
2455         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2456         if (!cpuid_entries)
2457                 goto out;
2458
2459         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2460         limit = cpuid_entries[0].eax;
2461         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2462                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2463                              &nent, cpuid->nent);
2464         r = -E2BIG;
2465         if (nent >= cpuid->nent)
2466                 goto out_free;
2467
2468         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2469         limit = cpuid_entries[nent - 1].eax;
2470         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2471                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2472                              &nent, cpuid->nent);
2473
2474
2475
2476         r = -E2BIG;
2477         if (nent >= cpuid->nent)
2478                 goto out_free;
2479
2480         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2481                      cpuid->nent);
2482
2483         r = -E2BIG;
2484         if (nent >= cpuid->nent)
2485                 goto out_free;
2486
2487         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2488                      cpuid->nent);
2489
2490         r = -E2BIG;
2491         if (nent >= cpuid->nent)
2492                 goto out_free;
2493
2494         r = -EFAULT;
2495         if (copy_to_user(entries, cpuid_entries,
2496                          nent * sizeof(struct kvm_cpuid_entry2)))
2497                 goto out_free;
2498         cpuid->nent = nent;
2499         r = 0;
2500
2501 out_free:
2502         vfree(cpuid_entries);
2503 out:
2504         return r;
2505 }
2506
2507 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2508                                     struct kvm_lapic_state *s)
2509 {
2510         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2511
2512         return 0;
2513 }
2514
2515 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2516                                     struct kvm_lapic_state *s)
2517 {
2518         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2519         kvm_apic_post_state_restore(vcpu);
2520         update_cr8_intercept(vcpu);
2521
2522         return 0;
2523 }
2524
2525 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2526                                     struct kvm_interrupt *irq)
2527 {
2528         if (irq->irq < 0 || irq->irq >= 256)
2529                 return -EINVAL;
2530         if (irqchip_in_kernel(vcpu->kvm))
2531                 return -ENXIO;
2532
2533         kvm_queue_interrupt(vcpu, irq->irq, false);
2534         kvm_make_request(KVM_REQ_EVENT, vcpu);
2535
2536         return 0;
2537 }
2538
2539 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2540 {
2541         kvm_inject_nmi(vcpu);
2542
2543         return 0;
2544 }
2545
2546 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2547                                            struct kvm_tpr_access_ctl *tac)
2548 {
2549         if (tac->flags)
2550                 return -EINVAL;
2551         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2552         return 0;
2553 }
2554
2555 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2556                                         u64 mcg_cap)
2557 {
2558         int r;
2559         unsigned bank_num = mcg_cap & 0xff, bank;
2560
2561         r = -EINVAL;
2562         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2563                 goto out;
2564         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2565                 goto out;
2566         r = 0;
2567         vcpu->arch.mcg_cap = mcg_cap;
2568         /* Init IA32_MCG_CTL to all 1s */
2569         if (mcg_cap & MCG_CTL_P)
2570                 vcpu->arch.mcg_ctl = ~(u64)0;
2571         /* Init IA32_MCi_CTL to all 1s */
2572         for (bank = 0; bank < bank_num; bank++)
2573                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2574 out:
2575         return r;
2576 }
2577
2578 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2579                                       struct kvm_x86_mce *mce)
2580 {
2581         u64 mcg_cap = vcpu->arch.mcg_cap;
2582         unsigned bank_num = mcg_cap & 0xff;
2583         u64 *banks = vcpu->arch.mce_banks;
2584
2585         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2586                 return -EINVAL;
2587         /*
2588          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2589          * reporting is disabled
2590          */
2591         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2592             vcpu->arch.mcg_ctl != ~(u64)0)
2593                 return 0;
2594         banks += 4 * mce->bank;
2595         /*
2596          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2597          * reporting is disabled for the bank
2598          */
2599         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2600                 return 0;
2601         if (mce->status & MCI_STATUS_UC) {
2602                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2603                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2604                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2605                         return 0;
2606                 }
2607                 if (banks[1] & MCI_STATUS_VAL)
2608                         mce->status |= MCI_STATUS_OVER;
2609                 banks[2] = mce->addr;
2610                 banks[3] = mce->misc;
2611                 vcpu->arch.mcg_status = mce->mcg_status;
2612                 banks[1] = mce->status;
2613                 kvm_queue_exception(vcpu, MC_VECTOR);
2614         } else if (!(banks[1] & MCI_STATUS_VAL)
2615                    || !(banks[1] & MCI_STATUS_UC)) {
2616                 if (banks[1] & MCI_STATUS_VAL)
2617                         mce->status |= MCI_STATUS_OVER;
2618                 banks[2] = mce->addr;
2619                 banks[3] = mce->misc;
2620                 banks[1] = mce->status;
2621         } else
2622                 banks[1] |= MCI_STATUS_OVER;
2623         return 0;
2624 }
2625
2626 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2627                                                struct kvm_vcpu_events *events)
2628 {
2629         events->exception.injected =
2630                 vcpu->arch.exception.pending &&
2631                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2632         events->exception.nr = vcpu->arch.exception.nr;
2633         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2634         events->exception.pad = 0;
2635         events->exception.error_code = vcpu->arch.exception.error_code;
2636
2637         events->interrupt.injected =
2638                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2639         events->interrupt.nr = vcpu->arch.interrupt.nr;
2640         events->interrupt.soft = 0;
2641         events->interrupt.shadow =
2642                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2643                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2644
2645         events->nmi.injected = vcpu->arch.nmi_injected;
2646         events->nmi.pending = vcpu->arch.nmi_pending;
2647         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2648         events->nmi.pad = 0;
2649
2650         events->sipi_vector = vcpu->arch.sipi_vector;
2651
2652         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2653                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2654                          | KVM_VCPUEVENT_VALID_SHADOW);
2655         memset(&events->reserved, 0, sizeof(events->reserved));
2656 }
2657
2658 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2659                                               struct kvm_vcpu_events *events)
2660 {
2661         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2662                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2663                               | KVM_VCPUEVENT_VALID_SHADOW))
2664                 return -EINVAL;
2665
2666         vcpu->arch.exception.pending = events->exception.injected;
2667         vcpu->arch.exception.nr = events->exception.nr;
2668         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2669         vcpu->arch.exception.error_code = events->exception.error_code;
2670
2671         vcpu->arch.interrupt.pending = events->interrupt.injected;
2672         vcpu->arch.interrupt.nr = events->interrupt.nr;
2673         vcpu->arch.interrupt.soft = events->interrupt.soft;
2674         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2675                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2676                                                   events->interrupt.shadow);
2677
2678         vcpu->arch.nmi_injected = events->nmi.injected;
2679         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2680                 vcpu->arch.nmi_pending = events->nmi.pending;
2681         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2682
2683         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2684                 vcpu->arch.sipi_vector = events->sipi_vector;
2685
2686         kvm_make_request(KVM_REQ_EVENT, vcpu);
2687
2688         return 0;
2689 }
2690
2691 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2692                                              struct kvm_debugregs *dbgregs)
2693 {
2694         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2695         dbgregs->dr6 = vcpu->arch.dr6;
2696         dbgregs->dr7 = vcpu->arch.dr7;
2697         dbgregs->flags = 0;
2698         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2699 }
2700
2701 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2702                                             struct kvm_debugregs *dbgregs)
2703 {
2704         if (dbgregs->flags)
2705                 return -EINVAL;
2706
2707         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2708         vcpu->arch.dr6 = dbgregs->dr6;
2709         vcpu->arch.dr7 = dbgregs->dr7;
2710
2711         return 0;
2712 }
2713
2714 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2715                                          struct kvm_xsave *guest_xsave)
2716 {
2717         if (cpu_has_xsave)
2718                 memcpy(guest_xsave->region,
2719                         &vcpu->arch.guest_fpu.state->xsave,
2720                         xstate_size);
2721         else {
2722                 memcpy(guest_xsave->region,
2723                         &vcpu->arch.guest_fpu.state->fxsave,
2724                         sizeof(struct i387_fxsave_struct));
2725                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2726                         XSTATE_FPSSE;
2727         }
2728 }
2729
2730 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2731                                         struct kvm_xsave *guest_xsave)
2732 {
2733         u64 xstate_bv =
2734                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2735
2736         if (cpu_has_xsave)
2737                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2738                         guest_xsave->region, xstate_size);
2739         else {
2740                 if (xstate_bv & ~XSTATE_FPSSE)
2741                         return -EINVAL;
2742                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2743                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2744         }
2745         return 0;
2746 }
2747
2748 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2749                                         struct kvm_xcrs *guest_xcrs)
2750 {
2751         if (!cpu_has_xsave) {
2752                 guest_xcrs->nr_xcrs = 0;
2753                 return;
2754         }
2755
2756         guest_xcrs->nr_xcrs = 1;
2757         guest_xcrs->flags = 0;
2758         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2759         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2760 }
2761
2762 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2763                                        struct kvm_xcrs *guest_xcrs)
2764 {
2765         int i, r = 0;
2766
2767         if (!cpu_has_xsave)
2768                 return -EINVAL;
2769
2770         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2771                 return -EINVAL;
2772
2773         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2774                 /* Only support XCR0 currently */
2775                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2776                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2777                                 guest_xcrs->xcrs[0].value);
2778                         break;
2779                 }
2780         if (r)
2781                 r = -EINVAL;
2782         return r;
2783 }
2784
2785 long kvm_arch_vcpu_ioctl(struct file *filp,
2786                          unsigned int ioctl, unsigned long arg)
2787 {
2788         struct kvm_vcpu *vcpu = filp->private_data;
2789         void __user *argp = (void __user *)arg;
2790         int r;
2791         union {
2792                 struct kvm_lapic_state *lapic;
2793                 struct kvm_xsave *xsave;
2794                 struct kvm_xcrs *xcrs;
2795                 void *buffer;
2796         } u;
2797
2798         u.buffer = NULL;
2799         switch (ioctl) {
2800         case KVM_GET_LAPIC: {
2801                 r = -EINVAL;
2802                 if (!vcpu->arch.apic)
2803                         goto out;
2804                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2805
2806                 r = -ENOMEM;
2807                 if (!u.lapic)
2808                         goto out;
2809                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2810                 if (r)
2811                         goto out;
2812                 r = -EFAULT;
2813                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2814                         goto out;
2815                 r = 0;
2816                 break;
2817         }
2818         case KVM_SET_LAPIC: {
2819                 r = -EINVAL;
2820                 if (!vcpu->arch.apic)
2821                         goto out;
2822                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2823                 r = -ENOMEM;
2824                 if (!u.lapic)
2825                         goto out;
2826                 r = -EFAULT;
2827                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2828                         goto out;
2829                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2830                 if (r)
2831                         goto out;
2832                 r = 0;
2833                 break;
2834         }
2835         case KVM_INTERRUPT: {
2836                 struct kvm_interrupt irq;
2837
2838                 r = -EFAULT;
2839                 if (copy_from_user(&irq, argp, sizeof irq))
2840                         goto out;
2841                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2842                 if (r)
2843                         goto out;
2844                 r = 0;
2845                 break;
2846         }
2847         case KVM_NMI: {
2848                 r = kvm_vcpu_ioctl_nmi(vcpu);
2849                 if (r)
2850                         goto out;
2851                 r = 0;
2852                 break;
2853         }
2854         case KVM_SET_CPUID: {
2855                 struct kvm_cpuid __user *cpuid_arg = argp;
2856                 struct kvm_cpuid cpuid;
2857
2858                 r = -EFAULT;
2859                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2860                         goto out;
2861                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2862                 if (r)
2863                         goto out;
2864                 break;
2865         }
2866         case KVM_SET_CPUID2: {
2867                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2868                 struct kvm_cpuid2 cpuid;
2869
2870                 r = -EFAULT;
2871                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2872                         goto out;
2873                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2874                                               cpuid_arg->entries);
2875                 if (r)
2876                         goto out;
2877                 break;
2878         }
2879         case KVM_GET_CPUID2: {
2880                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2881                 struct kvm_cpuid2 cpuid;
2882
2883                 r = -EFAULT;
2884                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2885                         goto out;
2886                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2887                                               cpuid_arg->entries);
2888                 if (r)
2889                         goto out;
2890                 r = -EFAULT;
2891                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2892                         goto out;
2893                 r = 0;
2894                 break;
2895         }
2896         case KVM_GET_MSRS:
2897                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2898                 break;
2899         case KVM_SET_MSRS:
2900                 r = msr_io(vcpu, argp, do_set_msr, 0);
2901                 break;
2902         case KVM_TPR_ACCESS_REPORTING: {
2903                 struct kvm_tpr_access_ctl tac;
2904
2905                 r = -EFAULT;
2906                 if (copy_from_user(&tac, argp, sizeof tac))
2907                         goto out;
2908                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2909                 if (r)
2910                         goto out;
2911                 r = -EFAULT;
2912                 if (copy_to_user(argp, &tac, sizeof tac))
2913                         goto out;
2914                 r = 0;
2915                 break;
2916         };
2917         case KVM_SET_VAPIC_ADDR: {
2918                 struct kvm_vapic_addr va;
2919
2920                 r = -EINVAL;
2921                 if (!irqchip_in_kernel(vcpu->kvm))
2922                         goto out;
2923                 r = -EFAULT;
2924                 if (copy_from_user(&va, argp, sizeof va))
2925                         goto out;
2926                 r = 0;
2927                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2928                 break;
2929         }
2930         case KVM_X86_SETUP_MCE: {
2931                 u64 mcg_cap;
2932
2933                 r = -EFAULT;
2934                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2935                         goto out;
2936                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2937                 break;
2938         }
2939         case KVM_X86_SET_MCE: {
2940                 struct kvm_x86_mce mce;
2941
2942                 r = -EFAULT;
2943                 if (copy_from_user(&mce, argp, sizeof mce))
2944                         goto out;
2945                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2946                 break;
2947         }
2948         case KVM_GET_VCPU_EVENTS: {
2949                 struct kvm_vcpu_events events;
2950
2951                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2952
2953                 r = -EFAULT;
2954                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2955                         break;
2956                 r = 0;
2957                 break;
2958         }
2959         case KVM_SET_VCPU_EVENTS: {
2960                 struct kvm_vcpu_events events;
2961
2962                 r = -EFAULT;
2963                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2964                         break;
2965
2966                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2967                 break;
2968         }
2969         case KVM_GET_DEBUGREGS: {
2970                 struct kvm_debugregs dbgregs;
2971
2972                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2973
2974                 r = -EFAULT;
2975                 if (copy_to_user(argp, &dbgregs,
2976                                  sizeof(struct kvm_debugregs)))
2977                         break;
2978                 r = 0;
2979                 break;
2980         }
2981         case KVM_SET_DEBUGREGS: {
2982                 struct kvm_debugregs dbgregs;
2983
2984                 r = -EFAULT;
2985                 if (copy_from_user(&dbgregs, argp,
2986                                    sizeof(struct kvm_debugregs)))
2987                         break;
2988
2989                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2990                 break;
2991         }
2992         case KVM_GET_XSAVE: {
2993                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2994                 r = -ENOMEM;
2995                 if (!u.xsave)
2996                         break;
2997
2998                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2999
3000                 r = -EFAULT;
3001                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3002                         break;
3003                 r = 0;
3004                 break;
3005         }
3006         case KVM_SET_XSAVE: {
3007                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3008                 r = -ENOMEM;
3009                 if (!u.xsave)
3010                         break;
3011
3012                 r = -EFAULT;
3013                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3014                         break;
3015
3016                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3017                 break;
3018         }
3019         case KVM_GET_XCRS: {
3020                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3021                 r = -ENOMEM;
3022                 if (!u.xcrs)
3023                         break;
3024
3025                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3026
3027                 r = -EFAULT;
3028                 if (copy_to_user(argp, u.xcrs,
3029                                  sizeof(struct kvm_xcrs)))
3030                         break;
3031                 r = 0;
3032                 break;
3033         }
3034         case KVM_SET_XCRS: {
3035                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3036                 r = -ENOMEM;
3037                 if (!u.xcrs)
3038                         break;
3039
3040                 r = -EFAULT;
3041                 if (copy_from_user(u.xcrs, argp,
3042                                    sizeof(struct kvm_xcrs)))
3043                         break;
3044
3045                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3046                 break;
3047         }
3048         default:
3049                 r = -EINVAL;
3050         }
3051 out:
3052         kfree(u.buffer);
3053         return r;
3054 }
3055
3056 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3057 {
3058         int ret;
3059
3060         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3061                 return -1;
3062         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3063         return ret;
3064 }
3065
3066 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3067                                               u64 ident_addr)
3068 {
3069         kvm->arch.ept_identity_map_addr = ident_addr;
3070         return 0;
3071 }
3072
3073 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3074                                           u32 kvm_nr_mmu_pages)
3075 {
3076         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3077                 return -EINVAL;
3078
3079         mutex_lock(&kvm->slots_lock);
3080         spin_lock(&kvm->mmu_lock);
3081
3082         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3083         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3084
3085         spin_unlock(&kvm->mmu_lock);
3086         mutex_unlock(&kvm->slots_lock);
3087         return 0;
3088 }
3089
3090 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3091 {
3092         return kvm->arch.n_max_mmu_pages;
3093 }
3094
3095 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3096 {
3097         int r;
3098
3099         r = 0;
3100         switch (chip->chip_id) {
3101         case KVM_IRQCHIP_PIC_MASTER:
3102                 memcpy(&chip->chip.pic,
3103                         &pic_irqchip(kvm)->pics[0],
3104                         sizeof(struct kvm_pic_state));
3105                 break;
3106         case KVM_IRQCHIP_PIC_SLAVE:
3107                 memcpy(&chip->chip.pic,
3108                         &pic_irqchip(kvm)->pics[1],
3109                         sizeof(struct kvm_pic_state));
3110                 break;
3111         case KVM_IRQCHIP_IOAPIC:
3112                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3113                 break;
3114         default:
3115                 r = -EINVAL;
3116                 break;
3117         }
3118         return r;
3119 }
3120
3121 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3122 {
3123         int r;
3124
3125         r = 0;
3126         switch (chip->chip_id) {
3127         case KVM_IRQCHIP_PIC_MASTER:
3128                 spin_lock(&pic_irqchip(kvm)->lock);
3129                 memcpy(&pic_irqchip(kvm)->pics[0],
3130                         &chip->chip.pic,
3131                         sizeof(struct kvm_pic_state));
3132                 spin_unlock(&pic_irqchip(kvm)->lock);
3133                 break;
3134         case KVM_IRQCHIP_PIC_SLAVE:
3135                 spin_lock(&pic_irqchip(kvm)->lock);
3136                 memcpy(&pic_irqchip(kvm)->pics[1],
3137                         &chip->chip.pic,
3138                         sizeof(struct kvm_pic_state));
3139                 spin_unlock(&pic_irqchip(kvm)->lock);
3140                 break;
3141         case KVM_IRQCHIP_IOAPIC:
3142                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3143                 break;
3144         default:
3145                 r = -EINVAL;
3146                 break;
3147         }
3148         kvm_pic_update_irq(pic_irqchip(kvm));
3149         return r;
3150 }
3151
3152 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3153 {
3154         int r = 0;
3155
3156         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3157         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3158         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3159         return r;
3160 }
3161
3162 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3163 {
3164         int r = 0;
3165
3166         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3167         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3168         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3169         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3170         return r;
3171 }
3172
3173 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3174 {
3175         int r = 0;
3176
3177         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3178         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3179                 sizeof(ps->channels));
3180         ps->flags = kvm->arch.vpit->pit_state.flags;
3181         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3182         memset(&ps->reserved, 0, sizeof(ps->reserved));
3183         return r;
3184 }
3185
3186 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3187 {
3188         int r = 0, start = 0;
3189         u32 prev_legacy, cur_legacy;
3190         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3191         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3192         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3193         if (!prev_legacy && cur_legacy)
3194                 start = 1;
3195         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3196                sizeof(kvm->arch.vpit->pit_state.channels));
3197         kvm->arch.vpit->pit_state.flags = ps->flags;
3198         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3199         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3200         return r;
3201 }
3202
3203 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3204                                  struct kvm_reinject_control *control)
3205 {
3206         if (!kvm->arch.vpit)
3207                 return -ENXIO;
3208         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3209         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3210         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3211         return 0;
3212 }
3213
3214 /*
3215  * Get (and clear) the dirty memory log for a memory slot.
3216  */
3217 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3218                                       struct kvm_dirty_log *log)
3219 {
3220         int r, i;
3221         struct kvm_memory_slot *memslot;
3222         unsigned long n;
3223         unsigned long is_dirty = 0;
3224
3225         mutex_lock(&kvm->slots_lock);
3226
3227         r = -EINVAL;
3228         if (log->slot >= KVM_MEMORY_SLOTS)
3229                 goto out;
3230
3231         memslot = &kvm->memslots->memslots[log->slot];
3232         r = -ENOENT;
3233         if (!memslot->dirty_bitmap)
3234                 goto out;
3235
3236         n = kvm_dirty_bitmap_bytes(memslot);
3237
3238         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3239                 is_dirty = memslot->dirty_bitmap[i];
3240
3241         /* If nothing is dirty, don't bother messing with page tables. */
3242         if (is_dirty) {
3243                 struct kvm_memslots *slots, *old_slots;
3244                 unsigned long *dirty_bitmap;
3245
3246                 dirty_bitmap = memslot->dirty_bitmap_head;
3247                 if (memslot->dirty_bitmap == dirty_bitmap)
3248                         dirty_bitmap += n / sizeof(long);
3249                 memset(dirty_bitmap, 0, n);
3250
3251                 r = -ENOMEM;
3252                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3253                 if (!slots)
3254                         goto out;
3255                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3256                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3257                 slots->generation++;
3258
3259                 old_slots = kvm->memslots;
3260                 rcu_assign_pointer(kvm->memslots, slots);
3261                 synchronize_srcu_expedited(&kvm->srcu);
3262                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3263                 kfree(old_slots);
3264
3265                 spin_lock(&kvm->mmu_lock);
3266                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3267                 spin_unlock(&kvm->mmu_lock);
3268
3269                 r = -EFAULT;
3270                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3271                         goto out;
3272         } else {
3273                 r = -EFAULT;
3274                 if (clear_user(log->dirty_bitmap, n))
3275                         goto out;
3276         }
3277
3278         r = 0;
3279 out:
3280         mutex_unlock(&kvm->slots_lock);
3281         return r;
3282 }
3283
3284 long kvm_arch_vm_ioctl(struct file *filp,
3285                        unsigned int ioctl, unsigned long arg)
3286 {
3287         struct kvm *kvm = filp->private_data;
3288         void __user *argp = (void __user *)arg;
3289         int r = -ENOTTY;
3290         /*
3291          * This union makes it completely explicit to gcc-3.x
3292          * that these two variables' stack usage should be
3293          * combined, not added together.
3294          */
3295         union {
3296                 struct kvm_pit_state ps;
3297                 struct kvm_pit_state2 ps2;
3298                 struct kvm_pit_config pit_config;
3299         } u;
3300
3301         switch (ioctl) {
3302         case KVM_SET_TSS_ADDR:
3303                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3304                 if (r < 0)
3305                         goto out;
3306                 break;
3307         case KVM_SET_IDENTITY_MAP_ADDR: {
3308                 u64 ident_addr;
3309
3310                 r = -EFAULT;
3311                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3312                         goto out;
3313                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3314                 if (r < 0)
3315                         goto out;
3316                 break;
3317         }
3318         case KVM_SET_NR_MMU_PAGES:
3319                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3320                 if (r)
3321                         goto out;
3322                 break;
3323         case KVM_GET_NR_MMU_PAGES:
3324                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3325                 break;
3326         case KVM_CREATE_IRQCHIP: {
3327                 struct kvm_pic *vpic;
3328
3329                 mutex_lock(&kvm->lock);
3330                 r = -EEXIST;
3331                 if (kvm->arch.vpic)
3332                         goto create_irqchip_unlock;
3333                 r = -ENOMEM;
3334                 vpic = kvm_create_pic(kvm);
3335                 if (vpic) {
3336                         r = kvm_ioapic_init(kvm);
3337                         if (r) {
3338                                 mutex_lock(&kvm->slots_lock);
3339                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3340                                                           &vpic->dev);
3341                                 mutex_unlock(&kvm->slots_lock);
3342                                 kfree(vpic);
3343                                 goto create_irqchip_unlock;
3344                         }
3345                 } else
3346                         goto create_irqchip_unlock;
3347                 smp_wmb();
3348                 kvm->arch.vpic = vpic;
3349                 smp_wmb();
3350                 r = kvm_setup_default_irq_routing(kvm);
3351                 if (r) {
3352                         mutex_lock(&kvm->slots_lock);
3353                         mutex_lock(&kvm->irq_lock);
3354                         kvm_ioapic_destroy(kvm);
3355                         kvm_destroy_pic(kvm);
3356                         mutex_unlock(&kvm->irq_lock);
3357                         mutex_unlock(&kvm->slots_lock);
3358                 }
3359         create_irqchip_unlock:
3360                 mutex_unlock(&kvm->lock);
3361                 break;
3362         }
3363         case KVM_CREATE_PIT:
3364                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3365                 goto create_pit;
3366         case KVM_CREATE_PIT2:
3367                 r = -EFAULT;
3368                 if (copy_from_user(&u.pit_config, argp,
3369                                    sizeof(struct kvm_pit_config)))
3370                         goto out;
3371         create_pit:
3372                 mutex_lock(&kvm->slots_lock);
3373                 r = -EEXIST;
3374                 if (kvm->arch.vpit)
3375                         goto create_pit_unlock;
3376                 r = -ENOMEM;
3377                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3378                 if (kvm->arch.vpit)
3379                         r = 0;
3380         create_pit_unlock:
3381                 mutex_unlock(&kvm->slots_lock);
3382                 break;
3383         case KVM_IRQ_LINE_STATUS:
3384         case KVM_IRQ_LINE: {
3385                 struct kvm_irq_level irq_event;
3386
3387                 r = -EFAULT;
3388                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3389                         goto out;
3390                 r = -ENXIO;
3391                 if (irqchip_in_kernel(kvm)) {
3392                         __s32 status;
3393                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3394                                         irq_event.irq, irq_event.level);
3395                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3396                                 r = -EFAULT;
3397                                 irq_event.status = status;
3398                                 if (copy_to_user(argp, &irq_event,
3399                                                         sizeof irq_event))
3400                                         goto out;
3401                         }
3402                         r = 0;
3403                 }
3404                 break;
3405         }
3406         case KVM_GET_IRQCHIP: {
3407                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3408                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3409
3410                 r = -ENOMEM;
3411                 if (!chip)
3412                         goto out;
3413                 r = -EFAULT;
3414                 if (copy_from_user(chip, argp, sizeof *chip))
3415                         goto get_irqchip_out;
3416                 r = -ENXIO;
3417                 if (!irqchip_in_kernel(kvm))
3418                         goto get_irqchip_out;
3419                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3420                 if (r)
3421                         goto get_irqchip_out;
3422                 r = -EFAULT;
3423                 if (copy_to_user(argp, chip, sizeof *chip))
3424                         goto get_irqchip_out;
3425                 r = 0;
3426         get_irqchip_out:
3427                 kfree(chip);
3428                 if (r)
3429                         goto out;
3430                 break;
3431         }
3432         case KVM_SET_IRQCHIP: {
3433                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3434                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3435
3436                 r = -ENOMEM;
3437                 if (!chip)
3438                         goto out;
3439                 r = -EFAULT;
3440                 if (copy_from_user(chip, argp, sizeof *chip))
3441                         goto set_irqchip_out;
3442                 r = -ENXIO;
3443                 if (!irqchip_in_kernel(kvm))
3444                         goto set_irqchip_out;
3445                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3446                 if (r)
3447                         goto set_irqchip_out;
3448                 r = 0;
3449         set_irqchip_out:
3450                 kfree(chip);
3451                 if (r)
3452                         goto out;
3453                 break;
3454         }
3455         case KVM_GET_PIT: {
3456                 r = -EFAULT;
3457                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3458                         goto out;
3459                 r = -ENXIO;
3460                 if (!kvm->arch.vpit)
3461                         goto out;
3462                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3463                 if (r)
3464                         goto out;
3465                 r = -EFAULT;
3466                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3467                         goto out;
3468                 r = 0;
3469                 break;
3470         }
3471         case KVM_SET_PIT: {
3472                 r = -EFAULT;
3473                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3474                         goto out;
3475                 r = -ENXIO;
3476                 if (!kvm->arch.vpit)
3477                         goto out;
3478                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3479                 if (r)
3480                         goto out;
3481                 r = 0;
3482                 break;
3483         }
3484         case KVM_GET_PIT2: {
3485                 r = -ENXIO;
3486                 if (!kvm->arch.vpit)
3487                         goto out;
3488                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3489                 if (r)
3490                         goto out;
3491                 r = -EFAULT;
3492                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3493                         goto out;
3494                 r = 0;
3495                 break;
3496         }
3497         case KVM_SET_PIT2: {
3498                 r = -EFAULT;
3499                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3500                         goto out;
3501                 r = -ENXIO;
3502                 if (!kvm->arch.vpit)
3503                         goto out;
3504                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3505                 if (r)
3506                         goto out;
3507                 r = 0;
3508                 break;
3509         }
3510         case KVM_REINJECT_CONTROL: {
3511                 struct kvm_reinject_control control;
3512                 r =  -EFAULT;
3513                 if (copy_from_user(&control, argp, sizeof(control)))
3514                         goto out;
3515                 r = kvm_vm_ioctl_reinject(kvm, &control);
3516                 if (r)
3517                         goto out;
3518                 r = 0;
3519                 break;
3520         }
3521         case KVM_XEN_HVM_CONFIG: {
3522                 r = -EFAULT;
3523                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3524                                    sizeof(struct kvm_xen_hvm_config)))
3525                         goto out;
3526                 r = -EINVAL;
3527                 if (kvm->arch.xen_hvm_config.flags)
3528                         goto out;
3529                 r = 0;
3530                 break;
3531         }
3532         case KVM_SET_CLOCK: {
3533                 struct kvm_clock_data user_ns;
3534                 u64 now_ns;
3535                 s64 delta;
3536
3537                 r = -EFAULT;
3538                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3539                         goto out;
3540
3541                 r = -EINVAL;
3542                 if (user_ns.flags)
3543                         goto out;
3544
3545                 r = 0;
3546                 local_irq_disable();
3547                 now_ns = get_kernel_ns();
3548                 delta = user_ns.clock - now_ns;
3549                 local_irq_enable();
3550                 kvm->arch.kvmclock_offset = delta;
3551                 break;
3552         }
3553         case KVM_GET_CLOCK: {
3554                 struct kvm_clock_data user_ns;
3555                 u64 now_ns;
3556
3557                 local_irq_disable();
3558                 now_ns = get_kernel_ns();
3559                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3560                 local_irq_enable();
3561                 user_ns.flags = 0;
3562                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3563
3564                 r = -EFAULT;
3565                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3566                         goto out;
3567                 r = 0;
3568                 break;
3569         }
3570
3571         default:
3572                 ;
3573         }
3574 out:
3575         return r;
3576 }
3577
3578 static void kvm_init_msr_list(void)
3579 {
3580         u32 dummy[2];
3581         unsigned i, j;
3582
3583         /* skip the first msrs in the list. KVM-specific */
3584         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3585                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3586                         continue;
3587                 if (j < i)
3588                         msrs_to_save[j] = msrs_to_save[i];
3589                 j++;
3590         }
3591         num_msrs_to_save = j;
3592 }
3593
3594 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3595                            const void *v)
3596 {
3597         int handled = 0;
3598         int n;
3599
3600         do {
3601                 n = min(len, 8);
3602                 if (!(vcpu->arch.apic &&
3603                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3604                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3605                         break;
3606                 handled += n;
3607                 addr += n;
3608                 len -= n;
3609                 v += n;
3610         } while (len);
3611
3612         return handled;
3613 }
3614
3615 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3616 {
3617         int handled = 0;
3618         int n;
3619
3620         do {
3621                 n = min(len, 8);
3622                 if (!(vcpu->arch.apic &&
3623                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3624                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3625                         break;
3626                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3627                 handled += n;
3628                 addr += n;
3629                 len -= n;
3630                 v += n;
3631         } while (len);
3632
3633         return handled;
3634 }
3635
3636 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3637                         struct kvm_segment *var, int seg)
3638 {
3639         kvm_x86_ops->set_segment(vcpu, var, seg);
3640 }
3641
3642 void kvm_get_segment(struct kvm_vcpu *vcpu,
3643                      struct kvm_segment *var, int seg)
3644 {
3645         kvm_x86_ops->get_segment(vcpu, var, seg);
3646 }
3647
3648 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3649 {
3650         return gpa;
3651 }
3652
3653 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3654 {
3655         gpa_t t_gpa;
3656         struct x86_exception exception;
3657
3658         BUG_ON(!mmu_is_nested(vcpu));
3659
3660         /* NPT walks are always user-walks */
3661         access |= PFERR_USER_MASK;
3662         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3663
3664         return t_gpa;
3665 }
3666
3667 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3668                               struct x86_exception *exception)
3669 {
3670         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3671         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3672 }
3673
3674  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3675                                 struct x86_exception *exception)
3676 {
3677         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3678         access |= PFERR_FETCH_MASK;
3679         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3680 }
3681
3682 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3683                                struct x86_exception *exception)
3684 {
3685         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3686         access |= PFERR_WRITE_MASK;
3687         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3688 }
3689
3690 /* uses this to access any guest's mapped memory without checking CPL */
3691 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3692                                 struct x86_exception *exception)
3693 {
3694         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3695 }
3696
3697 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3698                                       struct kvm_vcpu *vcpu, u32 access,
3699                                       struct x86_exception *exception)
3700 {
3701         void *data = val;
3702         int r = X86EMUL_CONTINUE;
3703
3704         while (bytes) {
3705                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3706                                                             exception);
3707                 unsigned offset = addr & (PAGE_SIZE-1);
3708                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3709                 int ret;
3710
3711                 if (gpa == UNMAPPED_GVA)
3712                         return X86EMUL_PROPAGATE_FAULT;
3713                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3714                 if (ret < 0) {
3715                         r = X86EMUL_IO_NEEDED;
3716                         goto out;
3717                 }
3718
3719                 bytes -= toread;
3720                 data += toread;
3721                 addr += toread;
3722         }
3723 out:
3724         return r;
3725 }
3726
3727 /* used for instruction fetching */
3728 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3729                                 struct kvm_vcpu *vcpu,
3730                                 struct x86_exception *exception)
3731 {
3732         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3733         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3734                                           access | PFERR_FETCH_MASK,
3735                                           exception);
3736 }
3737
3738 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3739                                struct kvm_vcpu *vcpu,
3740                                struct x86_exception *exception)
3741 {
3742         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3743         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3744                                           exception);
3745 }
3746
3747 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3748                                       struct kvm_vcpu *vcpu,
3749                                       struct x86_exception *exception)
3750 {
3751         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3752 }
3753
3754 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3755                                        unsigned int bytes,
3756                                        struct kvm_vcpu *vcpu,
3757                                        struct x86_exception *exception)
3758 {
3759         void *data = val;
3760         int r = X86EMUL_CONTINUE;
3761
3762         while (bytes) {
3763                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3764                                                              PFERR_WRITE_MASK,
3765                                                              exception);
3766                 unsigned offset = addr & (PAGE_SIZE-1);
3767                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3768                 int ret;
3769
3770                 if (gpa == UNMAPPED_GVA)
3771                         return X86EMUL_PROPAGATE_FAULT;
3772                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3773                 if (ret < 0) {
3774                         r = X86EMUL_IO_NEEDED;
3775                         goto out;
3776                 }
3777
3778                 bytes -= towrite;
3779                 data += towrite;
3780                 addr += towrite;
3781         }
3782 out:
3783         return r;
3784 }
3785
3786 static int emulator_read_emulated(unsigned long addr,
3787                                   void *val,
3788                                   unsigned int bytes,
3789                                   struct x86_exception *exception,
3790                                   struct kvm_vcpu *vcpu)
3791 {
3792         gpa_t                 gpa;
3793         int handled;
3794
3795         if (vcpu->mmio_read_completed) {
3796                 memcpy(val, vcpu->mmio_data, bytes);
3797                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3798                                vcpu->mmio_phys_addr, *(u64 *)val);
3799                 vcpu->mmio_read_completed = 0;
3800                 return X86EMUL_CONTINUE;
3801         }
3802
3803         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, exception);
3804
3805         if (gpa == UNMAPPED_GVA)
3806                 return X86EMUL_PROPAGATE_FAULT;
3807
3808         /* For APIC access vmexit */
3809         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3810                 goto mmio;
3811
3812         if (kvm_read_guest_virt(addr, val, bytes, vcpu, exception)
3813             == X86EMUL_CONTINUE)
3814                 return X86EMUL_CONTINUE;
3815
3816 mmio:
3817         /*
3818          * Is this MMIO handled locally?
3819          */
3820         handled = vcpu_mmio_read(vcpu, gpa, bytes, val);
3821
3822         if (handled == bytes)
3823                 return X86EMUL_CONTINUE;
3824
3825         gpa += handled;
3826         bytes -= handled;
3827         val += handled;
3828
3829         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3830
3831         vcpu->mmio_needed = 1;
3832         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3833         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3834         vcpu->mmio_size = bytes;
3835         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3836         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3837         vcpu->mmio_index = 0;
3838
3839         return X86EMUL_IO_NEEDED;
3840 }
3841
3842 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3843                         const void *val, int bytes)
3844 {
3845         int ret;
3846
3847         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3848         if (ret < 0)
3849                 return 0;
3850         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3851         return 1;
3852 }
3853
3854 static int emulator_write_emulated_onepage(unsigned long addr,
3855                                            const void *val,
3856                                            unsigned int bytes,
3857                                            struct x86_exception *exception,
3858                                            struct kvm_vcpu *vcpu)
3859 {
3860         gpa_t                 gpa;
3861         int handled;
3862
3863         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, exception);
3864
3865         if (gpa == UNMAPPED_GVA)
3866                 return X86EMUL_PROPAGATE_FAULT;
3867
3868         /* For APIC access vmexit */
3869         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3870                 goto mmio;
3871
3872         if (emulator_write_phys(vcpu, gpa, val, bytes))
3873                 return X86EMUL_CONTINUE;
3874
3875 mmio:
3876         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3877         /*
3878          * Is this MMIO handled locally?
3879          */
3880         handled = vcpu_mmio_write(vcpu, gpa, bytes, val);
3881         if (handled == bytes)
3882                 return X86EMUL_CONTINUE;
3883
3884         gpa += handled;
3885         bytes -= handled;
3886         val += handled;
3887
3888         vcpu->mmio_needed = 1;
3889         memcpy(vcpu->mmio_data, val, bytes);
3890         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3891         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3892         vcpu->mmio_size = bytes;
3893         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3894         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3895         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
3896         vcpu->mmio_index = 0;
3897
3898         return X86EMUL_CONTINUE;
3899 }
3900
3901 int emulator_write_emulated(unsigned long addr,
3902                             const void *val,
3903                             unsigned int bytes,
3904                             struct x86_exception *exception,
3905                             struct kvm_vcpu *vcpu)
3906 {
3907         /* Crossing a page boundary? */
3908         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3909                 int rc, now;
3910
3911                 now = -addr & ~PAGE_MASK;
3912                 rc = emulator_write_emulated_onepage(addr, val, now, exception,
3913                                                      vcpu);
3914                 if (rc != X86EMUL_CONTINUE)
3915                         return rc;
3916                 addr += now;
3917                 val += now;
3918                 bytes -= now;
3919         }
3920         return emulator_write_emulated_onepage(addr, val, bytes, exception,
3921                                                vcpu);
3922 }
3923
3924 #define CMPXCHG_TYPE(t, ptr, old, new) \
3925         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3926
3927 #ifdef CONFIG_X86_64
3928 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3929 #else
3930 #  define CMPXCHG64(ptr, old, new) \
3931         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3932 #endif
3933
3934 static int emulator_cmpxchg_emulated(unsigned long addr,
3935                                      const void *old,
3936                                      const void *new,
3937                                      unsigned int bytes,
3938                                      struct x86_exception *exception,
3939                                      struct kvm_vcpu *vcpu)
3940 {
3941         gpa_t gpa;
3942         struct page *page;
3943         char *kaddr;
3944         bool exchanged;
3945
3946         /* guests cmpxchg8b have to be emulated atomically */
3947         if (bytes > 8 || (bytes & (bytes - 1)))
3948                 goto emul_write;
3949
3950         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3951
3952         if (gpa == UNMAPPED_GVA ||
3953             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3954                 goto emul_write;
3955
3956         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3957                 goto emul_write;
3958
3959         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3960         if (is_error_page(page)) {
3961                 kvm_release_page_clean(page);
3962                 goto emul_write;
3963         }
3964
3965         kaddr = kmap_atomic(page, KM_USER0);
3966         kaddr += offset_in_page(gpa);
3967         switch (bytes) {
3968         case 1:
3969                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3970                 break;
3971         case 2:
3972                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3973                 break;
3974         case 4:
3975                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3976                 break;
3977         case 8:
3978                 exchanged = CMPXCHG64(kaddr, old, new);
3979                 break;
3980         default:
3981                 BUG();
3982         }
3983         kunmap_atomic(kaddr, KM_USER0);
3984         kvm_release_page_dirty(page);
3985
3986         if (!exchanged)
3987                 return X86EMUL_CMPXCHG_FAILED;
3988
3989         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3990
3991         return X86EMUL_CONTINUE;
3992
3993 emul_write:
3994         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3995
3996         return emulator_write_emulated(addr, new, bytes, exception, vcpu);
3997 }
3998
3999 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4000 {
4001         /* TODO: String I/O for in kernel device */
4002         int r;
4003
4004         if (vcpu->arch.pio.in)
4005                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4006                                     vcpu->arch.pio.size, pd);
4007         else
4008                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4009                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4010                                      pd);
4011         return r;
4012 }
4013
4014
4015 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
4016                              unsigned int count, struct kvm_vcpu *vcpu)
4017 {
4018         if (vcpu->arch.pio.count)
4019                 goto data_avail;
4020
4021         trace_kvm_pio(0, port, size, count);
4022
4023         vcpu->arch.pio.port = port;
4024         vcpu->arch.pio.in = 1;
4025         vcpu->arch.pio.count  = count;
4026         vcpu->arch.pio.size = size;
4027
4028         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4029         data_avail:
4030                 memcpy(val, vcpu->arch.pio_data, size * count);
4031                 vcpu->arch.pio.count = 0;
4032                 return 1;
4033         }
4034
4035         vcpu->run->exit_reason = KVM_EXIT_IO;
4036         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4037         vcpu->run->io.size = size;
4038         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4039         vcpu->run->io.count = count;
4040         vcpu->run->io.port = port;
4041
4042         return 0;
4043 }
4044
4045 static int emulator_pio_out_emulated(int size, unsigned short port,
4046                               const void *val, unsigned int count,
4047                               struct kvm_vcpu *vcpu)
4048 {
4049         trace_kvm_pio(1, port, size, count);
4050
4051         vcpu->arch.pio.port = port;
4052         vcpu->arch.pio.in = 0;
4053         vcpu->arch.pio.count = count;
4054         vcpu->arch.pio.size = size;
4055
4056         memcpy(vcpu->arch.pio_data, val, size * count);
4057
4058         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4059                 vcpu->arch.pio.count = 0;
4060                 return 1;
4061         }
4062
4063         vcpu->run->exit_reason = KVM_EXIT_IO;
4064         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4065         vcpu->run->io.size = size;
4066         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4067         vcpu->run->io.count = count;
4068         vcpu->run->io.port = port;
4069
4070         return 0;
4071 }
4072
4073 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4074 {
4075         return kvm_x86_ops->get_segment_base(vcpu, seg);
4076 }
4077
4078 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
4079 {
4080         kvm_mmu_invlpg(vcpu, address);
4081         return X86EMUL_CONTINUE;
4082 }
4083
4084 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4085 {
4086         if (!need_emulate_wbinvd(vcpu))
4087                 return X86EMUL_CONTINUE;
4088
4089         if (kvm_x86_ops->has_wbinvd_exit()) {
4090                 int cpu = get_cpu();
4091
4092                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4093                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4094                                 wbinvd_ipi, NULL, 1);
4095                 put_cpu();
4096                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4097         } else
4098                 wbinvd();
4099         return X86EMUL_CONTINUE;
4100 }
4101 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4102
4103 int emulate_clts(struct kvm_vcpu *vcpu)
4104 {
4105         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
4106         kvm_x86_ops->fpu_activate(vcpu);
4107         return X86EMUL_CONTINUE;
4108 }
4109
4110 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
4111 {
4112         return _kvm_get_dr(vcpu, dr, dest);
4113 }
4114
4115 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
4116 {
4117
4118         return __kvm_set_dr(vcpu, dr, value);
4119 }
4120
4121 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4122 {
4123         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4124 }
4125
4126 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
4127 {
4128         unsigned long value;
4129
4130         switch (cr) {
4131         case 0:
4132                 value = kvm_read_cr0(vcpu);
4133                 break;
4134         case 2:
4135                 value = vcpu->arch.cr2;
4136                 break;
4137         case 3:
4138                 value = kvm_read_cr3(vcpu);
4139                 break;
4140         case 4:
4141                 value = kvm_read_cr4(vcpu);
4142                 break;
4143         case 8:
4144                 value = kvm_get_cr8(vcpu);
4145                 break;
4146         default:
4147                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4148                 return 0;
4149         }
4150
4151         return value;
4152 }
4153
4154 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
4155 {
4156         int res = 0;
4157
4158         switch (cr) {
4159         case 0:
4160                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4161                 break;
4162         case 2:
4163                 vcpu->arch.cr2 = val;
4164                 break;
4165         case 3:
4166                 res = kvm_set_cr3(vcpu, val);
4167                 break;
4168         case 4:
4169                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4170                 break;
4171         case 8:
4172                 res = kvm_set_cr8(vcpu, val);
4173                 break;
4174         default:
4175                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4176                 res = -1;
4177         }
4178
4179         return res;
4180 }
4181
4182 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4183 {
4184         return kvm_x86_ops->get_cpl(vcpu);
4185 }
4186
4187 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4188 {
4189         kvm_x86_ops->get_gdt(vcpu, dt);
4190 }
4191
4192 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4193 {
4194         kvm_x86_ops->get_idt(vcpu, dt);
4195 }
4196
4197 static unsigned long emulator_get_cached_segment_base(int seg,
4198                                                       struct kvm_vcpu *vcpu)
4199 {
4200         return get_segment_base(vcpu, seg);
4201 }
4202
4203 static bool emulator_get_cached_descriptor(struct desc_struct *desc, u32 *base3,
4204                                            int seg, struct kvm_vcpu *vcpu)
4205 {
4206         struct kvm_segment var;
4207
4208         kvm_get_segment(vcpu, &var, seg);
4209
4210         if (var.unusable)
4211                 return false;
4212
4213         if (var.g)
4214                 var.limit >>= 12;
4215         set_desc_limit(desc, var.limit);
4216         set_desc_base(desc, (unsigned long)var.base);
4217 #ifdef CONFIG_X86_64
4218         if (base3)
4219                 *base3 = var.base >> 32;
4220 #endif
4221         desc->type = var.type;
4222         desc->s = var.s;
4223         desc->dpl = var.dpl;
4224         desc->p = var.present;
4225         desc->avl = var.avl;
4226         desc->l = var.l;
4227         desc->d = var.db;
4228         desc->g = var.g;
4229
4230         return true;
4231 }
4232
4233 static void emulator_set_cached_descriptor(struct desc_struct *desc, u32 base3,
4234                                            int seg, struct kvm_vcpu *vcpu)
4235 {
4236         struct kvm_segment var;
4237
4238         /* needed to preserve selector */
4239         kvm_get_segment(vcpu, &var, seg);
4240
4241         var.base = get_desc_base(desc);
4242 #ifdef CONFIG_X86_64
4243         var.base |= ((u64)base3) << 32;
4244 #endif
4245         var.limit = get_desc_limit(desc);
4246         if (desc->g)
4247                 var.limit = (var.limit << 12) | 0xfff;
4248         var.type = desc->type;
4249         var.present = desc->p;
4250         var.dpl = desc->dpl;
4251         var.db = desc->d;
4252         var.s = desc->s;
4253         var.l = desc->l;
4254         var.g = desc->g;
4255         var.avl = desc->avl;
4256         var.present = desc->p;
4257         var.unusable = !var.present;
4258         var.padding = 0;
4259
4260         kvm_set_segment(vcpu, &var, seg);
4261         return;
4262 }
4263
4264 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4265 {
4266         struct kvm_segment kvm_seg;
4267
4268         kvm_get_segment(vcpu, &kvm_seg, seg);
4269         return kvm_seg.selector;
4270 }
4271
4272 static void emulator_set_segment_selector(u16 sel, int seg,
4273                                           struct kvm_vcpu *vcpu)
4274 {
4275         struct kvm_segment kvm_seg;
4276
4277         kvm_get_segment(vcpu, &kvm_seg, seg);
4278         kvm_seg.selector = sel;
4279         kvm_set_segment(vcpu, &kvm_seg, seg);
4280 }
4281
4282 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4283 {
4284         preempt_disable();
4285         kvm_load_guest_fpu(ctxt->vcpu);
4286         /*
4287          * CR0.TS may reference the host fpu state, not the guest fpu state,
4288          * so it may be clear at this point.
4289          */
4290         clts();
4291 }
4292
4293 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4294 {
4295         preempt_enable();
4296 }
4297
4298 static int emulator_intercept(struct kvm_vcpu *vcpu,
4299                               struct x86_instruction_info *info,
4300                               enum x86_intercept_stage stage)
4301 {
4302         return kvm_x86_ops->check_intercept(vcpu, info, stage);
4303 }
4304
4305 static struct x86_emulate_ops emulate_ops = {
4306         .read_std            = kvm_read_guest_virt_system,
4307         .write_std           = kvm_write_guest_virt_system,
4308         .fetch               = kvm_fetch_guest_virt,
4309         .read_emulated       = emulator_read_emulated,
4310         .write_emulated      = emulator_write_emulated,
4311         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4312         .pio_in_emulated     = emulator_pio_in_emulated,
4313         .pio_out_emulated    = emulator_pio_out_emulated,
4314         .get_cached_descriptor = emulator_get_cached_descriptor,
4315         .set_cached_descriptor = emulator_set_cached_descriptor,
4316         .get_segment_selector = emulator_get_segment_selector,
4317         .set_segment_selector = emulator_set_segment_selector,
4318         .get_cached_segment_base = emulator_get_cached_segment_base,
4319         .get_gdt             = emulator_get_gdt,
4320         .get_idt             = emulator_get_idt,
4321         .get_cr              = emulator_get_cr,
4322         .set_cr              = emulator_set_cr,
4323         .cpl                 = emulator_get_cpl,
4324         .get_dr              = emulator_get_dr,
4325         .set_dr              = emulator_set_dr,
4326         .set_msr             = kvm_set_msr,
4327         .get_msr             = kvm_get_msr,
4328         .get_fpu             = emulator_get_fpu,
4329         .put_fpu             = emulator_put_fpu,
4330         .intercept           = emulator_intercept,
4331 };
4332
4333 static void cache_all_regs(struct kvm_vcpu *vcpu)
4334 {
4335         kvm_register_read(vcpu, VCPU_REGS_RAX);
4336         kvm_register_read(vcpu, VCPU_REGS_RSP);
4337         kvm_register_read(vcpu, VCPU_REGS_RIP);
4338         vcpu->arch.regs_dirty = ~0;
4339 }
4340
4341 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4342 {
4343         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4344         /*
4345          * an sti; sti; sequence only disable interrupts for the first
4346          * instruction. So, if the last instruction, be it emulated or
4347          * not, left the system with the INT_STI flag enabled, it
4348          * means that the last instruction is an sti. We should not
4349          * leave the flag on in this case. The same goes for mov ss
4350          */
4351         if (!(int_shadow & mask))
4352                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4353 }
4354
4355 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4356 {
4357         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4358         if (ctxt->exception.vector == PF_VECTOR)
4359                 kvm_propagate_fault(vcpu, &ctxt->exception);
4360         else if (ctxt->exception.error_code_valid)
4361                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4362                                       ctxt->exception.error_code);
4363         else
4364                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4365 }
4366
4367 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4368 {
4369         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4370         int cs_db, cs_l;
4371
4372         cache_all_regs(vcpu);
4373
4374         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4375
4376         vcpu->arch.emulate_ctxt.vcpu = vcpu;
4377         vcpu->arch.emulate_ctxt.eflags = kvm_get_rflags(vcpu);
4378         vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4379         vcpu->arch.emulate_ctxt.mode =
4380                 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4381                 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4382                 ? X86EMUL_MODE_VM86 : cs_l
4383                 ? X86EMUL_MODE_PROT64 : cs_db
4384                 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4385         vcpu->arch.emulate_ctxt.guest_mode = is_guest_mode(vcpu);
4386         memset(c, 0, sizeof(struct decode_cache));
4387         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4388 }
4389
4390 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq)
4391 {
4392         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4393         int ret;
4394
4395         init_emulate_ctxt(vcpu);
4396
4397         vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4398         vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4399         vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip;
4400         ret = emulate_int_real(&vcpu->arch.emulate_ctxt, &emulate_ops, irq);
4401
4402         if (ret != X86EMUL_CONTINUE)
4403                 return EMULATE_FAIL;
4404
4405         vcpu->arch.emulate_ctxt.eip = c->eip;
4406         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4407         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4408         kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4409
4410         if (irq == NMI_VECTOR)
4411                 vcpu->arch.nmi_pending = false;
4412         else
4413                 vcpu->arch.interrupt.pending = false;
4414
4415         return EMULATE_DONE;
4416 }
4417 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4418
4419 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4420 {
4421         int r = EMULATE_DONE;
4422
4423         ++vcpu->stat.insn_emulation_fail;
4424         trace_kvm_emulate_insn_failed(vcpu);
4425         if (!is_guest_mode(vcpu)) {
4426                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4427                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4428                 vcpu->run->internal.ndata = 0;
4429                 r = EMULATE_FAIL;
4430         }
4431         kvm_queue_exception(vcpu, UD_VECTOR);
4432
4433         return r;
4434 }
4435
4436 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4437 {
4438         gpa_t gpa;
4439
4440         if (tdp_enabled)
4441                 return false;
4442
4443         /*
4444          * if emulation was due to access to shadowed page table
4445          * and it failed try to unshadow page and re-entetr the
4446          * guest to let CPU execute the instruction.
4447          */
4448         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4449                 return true;
4450
4451         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4452
4453         if (gpa == UNMAPPED_GVA)
4454                 return true; /* let cpu generate fault */
4455
4456         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4457                 return true;
4458
4459         return false;
4460 }
4461
4462 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4463                             unsigned long cr2,
4464                             int emulation_type,
4465                             void *insn,
4466                             int insn_len)
4467 {
4468         int r;
4469         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4470
4471         kvm_clear_exception_queue(vcpu);
4472         vcpu->arch.mmio_fault_cr2 = cr2;
4473         /*
4474          * TODO: fix emulate.c to use guest_read/write_register
4475          * instead of direct ->regs accesses, can save hundred cycles
4476          * on Intel for instructions that don't read/change RSP, for
4477          * for example.
4478          */
4479         cache_all_regs(vcpu);
4480
4481         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4482                 init_emulate_ctxt(vcpu);
4483                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4484                 vcpu->arch.emulate_ctxt.have_exception = false;
4485                 vcpu->arch.emulate_ctxt.perm_ok = false;
4486
4487                 vcpu->arch.emulate_ctxt.only_vendor_specific_insn
4488                         = emulation_type & EMULTYPE_TRAP_UD;
4489
4490                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, insn, insn_len);
4491
4492                 trace_kvm_emulate_insn_start(vcpu);
4493                 ++vcpu->stat.insn_emulation;
4494                 if (r)  {
4495                         if (emulation_type & EMULTYPE_TRAP_UD)
4496                                 return EMULATE_FAIL;
4497                         if (reexecute_instruction(vcpu, cr2))
4498                                 return EMULATE_DONE;
4499                         if (emulation_type & EMULTYPE_SKIP)
4500                                 return EMULATE_FAIL;
4501                         return handle_emulation_failure(vcpu);
4502                 }
4503         }
4504
4505         if (emulation_type & EMULTYPE_SKIP) {
4506                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4507                 return EMULATE_DONE;
4508         }
4509
4510         /* this is needed for vmware backdor interface to work since it
4511            changes registers values  during IO operation */
4512         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4513
4514 restart:
4515         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4516
4517         if (r == EMULATION_INTERCEPTED)
4518                 return EMULATE_DONE;
4519
4520         if (r == EMULATION_FAILED) {
4521                 if (reexecute_instruction(vcpu, cr2))
4522                         return EMULATE_DONE;
4523
4524                 return handle_emulation_failure(vcpu);
4525         }
4526
4527         if (vcpu->arch.emulate_ctxt.have_exception) {
4528                 inject_emulated_exception(vcpu);
4529                 r = EMULATE_DONE;
4530         } else if (vcpu->arch.pio.count) {
4531                 if (!vcpu->arch.pio.in)
4532                         vcpu->arch.pio.count = 0;
4533                 r = EMULATE_DO_MMIO;
4534         } else if (vcpu->mmio_needed)
4535                 r = EMULATE_DO_MMIO;
4536         else if (r == EMULATION_RESTART)
4537                 goto restart;
4538         else
4539                 r = EMULATE_DONE;
4540
4541         toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4542         kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4543         kvm_make_request(KVM_REQ_EVENT, vcpu);
4544         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4545         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4546
4547         return r;
4548 }
4549 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4550
4551 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4552 {
4553         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4554         int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4555         /* do not return to emulator after return from userspace */
4556         vcpu->arch.pio.count = 0;
4557         return ret;
4558 }
4559 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4560
4561 static void tsc_bad(void *info)
4562 {
4563         __this_cpu_write(cpu_tsc_khz, 0);
4564 }
4565
4566 static void tsc_khz_changed(void *data)
4567 {
4568         struct cpufreq_freqs *freq = data;
4569         unsigned long khz = 0;
4570
4571         if (data)
4572                 khz = freq->new;
4573         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4574                 khz = cpufreq_quick_get(raw_smp_processor_id());
4575         if (!khz)
4576                 khz = tsc_khz;
4577         __this_cpu_write(cpu_tsc_khz, khz);
4578 }
4579
4580 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4581                                      void *data)
4582 {
4583         struct cpufreq_freqs *freq = data;
4584         struct kvm *kvm;
4585         struct kvm_vcpu *vcpu;
4586         int i, send_ipi = 0;
4587
4588         /*
4589          * We allow guests to temporarily run on slowing clocks,
4590          * provided we notify them after, or to run on accelerating
4591          * clocks, provided we notify them before.  Thus time never
4592          * goes backwards.
4593          *
4594          * However, we have a problem.  We can't atomically update
4595          * the frequency of a given CPU from this function; it is
4596          * merely a notifier, which can be called from any CPU.
4597          * Changing the TSC frequency at arbitrary points in time
4598          * requires a recomputation of local variables related to
4599          * the TSC for each VCPU.  We must flag these local variables
4600          * to be updated and be sure the update takes place with the
4601          * new frequency before any guests proceed.
4602          *
4603          * Unfortunately, the combination of hotplug CPU and frequency
4604          * change creates an intractable locking scenario; the order
4605          * of when these callouts happen is undefined with respect to
4606          * CPU hotplug, and they can race with each other.  As such,
4607          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4608          * undefined; you can actually have a CPU frequency change take
4609          * place in between the computation of X and the setting of the
4610          * variable.  To protect against this problem, all updates of
4611          * the per_cpu tsc_khz variable are done in an interrupt
4612          * protected IPI, and all callers wishing to update the value
4613          * must wait for a synchronous IPI to complete (which is trivial
4614          * if the caller is on the CPU already).  This establishes the
4615          * necessary total order on variable updates.
4616          *
4617          * Note that because a guest time update may take place
4618          * anytime after the setting of the VCPU's request bit, the
4619          * correct TSC value must be set before the request.  However,
4620          * to ensure the update actually makes it to any guest which
4621          * starts running in hardware virtualization between the set
4622          * and the acquisition of the spinlock, we must also ping the
4623          * CPU after setting the request bit.
4624          *
4625          */
4626
4627         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4628                 return 0;
4629         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4630                 return 0;
4631
4632         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4633
4634         raw_spin_lock(&kvm_lock);
4635         list_for_each_entry(kvm, &vm_list, vm_list) {
4636                 kvm_for_each_vcpu(i, vcpu, kvm) {
4637                         if (vcpu->cpu != freq->cpu)
4638                                 continue;
4639                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4640                         if (vcpu->cpu != smp_processor_id())
4641                                 send_ipi = 1;
4642                 }
4643         }
4644         raw_spin_unlock(&kvm_lock);
4645
4646         if (freq->old < freq->new && send_ipi) {
4647                 /*
4648                  * We upscale the frequency.  Must make the guest
4649                  * doesn't see old kvmclock values while running with
4650                  * the new frequency, otherwise we risk the guest sees
4651                  * time go backwards.
4652                  *
4653                  * In case we update the frequency for another cpu
4654                  * (which might be in guest context) send an interrupt
4655                  * to kick the cpu out of guest context.  Next time
4656                  * guest context is entered kvmclock will be updated,
4657                  * so the guest will not see stale values.
4658                  */
4659                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4660         }
4661         return 0;
4662 }
4663
4664 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4665         .notifier_call  = kvmclock_cpufreq_notifier
4666 };
4667
4668 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4669                                         unsigned long action, void *hcpu)
4670 {
4671         unsigned int cpu = (unsigned long)hcpu;
4672
4673         switch (action) {
4674                 case CPU_ONLINE:
4675                 case CPU_DOWN_FAILED:
4676                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4677                         break;
4678                 case CPU_DOWN_PREPARE:
4679                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4680                         break;
4681         }
4682         return NOTIFY_OK;
4683 }
4684
4685 static struct notifier_block kvmclock_cpu_notifier_block = {
4686         .notifier_call  = kvmclock_cpu_notifier,
4687         .priority = -INT_MAX
4688 };
4689
4690 static void kvm_timer_init(void)
4691 {
4692         int cpu;
4693
4694         max_tsc_khz = tsc_khz;
4695         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4696         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4697 #ifdef CONFIG_CPU_FREQ
4698                 struct cpufreq_policy policy;
4699                 memset(&policy, 0, sizeof(policy));
4700                 cpu = get_cpu();
4701                 cpufreq_get_policy(&policy, cpu);
4702                 if (policy.cpuinfo.max_freq)
4703                         max_tsc_khz = policy.cpuinfo.max_freq;
4704                 put_cpu();
4705 #endif
4706                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4707                                           CPUFREQ_TRANSITION_NOTIFIER);
4708         }
4709         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4710         for_each_online_cpu(cpu)
4711                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4712 }
4713
4714 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4715
4716 static int kvm_is_in_guest(void)
4717 {
4718         return percpu_read(current_vcpu) != NULL;
4719 }
4720
4721 static int kvm_is_user_mode(void)
4722 {
4723         int user_mode = 3;
4724
4725         if (percpu_read(current_vcpu))
4726                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4727
4728         return user_mode != 0;
4729 }
4730
4731 static unsigned long kvm_get_guest_ip(void)
4732 {
4733         unsigned long ip = 0;
4734
4735         if (percpu_read(current_vcpu))
4736                 ip = kvm_rip_read(percpu_read(current_vcpu));
4737
4738         return ip;
4739 }
4740
4741 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4742         .is_in_guest            = kvm_is_in_guest,
4743         .is_user_mode           = kvm_is_user_mode,
4744         .get_guest_ip           = kvm_get_guest_ip,
4745 };
4746
4747 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4748 {
4749         percpu_write(current_vcpu, vcpu);
4750 }
4751 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4752
4753 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4754 {
4755         percpu_write(current_vcpu, NULL);
4756 }
4757 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4758
4759 int kvm_arch_init(void *opaque)
4760 {
4761         int r;
4762         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4763
4764         if (kvm_x86_ops) {
4765                 printk(KERN_ERR "kvm: already loaded the other module\n");
4766                 r = -EEXIST;
4767                 goto out;
4768         }
4769
4770         if (!ops->cpu_has_kvm_support()) {
4771                 printk(KERN_ERR "kvm: no hardware support\n");
4772                 r = -EOPNOTSUPP;
4773                 goto out;
4774         }
4775         if (ops->disabled_by_bios()) {
4776                 printk(KERN_ERR "kvm: disabled by bios\n");
4777                 r = -EOPNOTSUPP;
4778                 goto out;
4779         }
4780
4781         r = kvm_mmu_module_init();
4782         if (r)
4783                 goto out;
4784
4785         kvm_init_msr_list();
4786
4787         kvm_x86_ops = ops;
4788         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4789         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4790                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4791
4792         kvm_timer_init();
4793
4794         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4795
4796         if (cpu_has_xsave)
4797                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4798
4799         return 0;
4800
4801 out:
4802         return r;
4803 }
4804
4805 void kvm_arch_exit(void)
4806 {
4807         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4808
4809         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4810                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4811                                             CPUFREQ_TRANSITION_NOTIFIER);
4812         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4813         kvm_x86_ops = NULL;
4814         kvm_mmu_module_exit();
4815 }
4816
4817 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4818 {
4819         ++vcpu->stat.halt_exits;
4820         if (irqchip_in_kernel(vcpu->kvm)) {
4821                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4822                 return 1;
4823         } else {
4824                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4825                 return 0;
4826         }
4827 }
4828 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4829
4830 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4831                            unsigned long a1)
4832 {
4833         if (is_long_mode(vcpu))
4834                 return a0;
4835         else
4836                 return a0 | ((gpa_t)a1 << 32);
4837 }
4838
4839 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4840 {
4841         u64 param, ingpa, outgpa, ret;
4842         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4843         bool fast, longmode;
4844         int cs_db, cs_l;
4845
4846         /*
4847          * hypercall generates UD from non zero cpl and real mode
4848          * per HYPER-V spec
4849          */
4850         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4851                 kvm_queue_exception(vcpu, UD_VECTOR);
4852                 return 0;
4853         }
4854
4855         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4856         longmode = is_long_mode(vcpu) && cs_l == 1;
4857
4858         if (!longmode) {
4859                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4860                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4861                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4862                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4863                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4864                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4865         }
4866 #ifdef CONFIG_X86_64
4867         else {
4868                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4869                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4870                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4871         }
4872 #endif
4873
4874         code = param & 0xffff;
4875         fast = (param >> 16) & 0x1;
4876         rep_cnt = (param >> 32) & 0xfff;
4877         rep_idx = (param >> 48) & 0xfff;
4878
4879         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4880
4881         switch (code) {
4882         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4883                 kvm_vcpu_on_spin(vcpu);
4884                 break;
4885         default:
4886                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4887                 break;
4888         }
4889
4890         ret = res | (((u64)rep_done & 0xfff) << 32);
4891         if (longmode) {
4892                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4893         } else {
4894                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4895                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4896         }
4897
4898         return 1;
4899 }
4900
4901 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4902 {
4903         unsigned long nr, a0, a1, a2, a3, ret;
4904         int r = 1;
4905
4906         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4907                 return kvm_hv_hypercall(vcpu);
4908
4909         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4910         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4911         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4912         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4913         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4914
4915         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4916
4917         if (!is_long_mode(vcpu)) {
4918                 nr &= 0xFFFFFFFF;
4919                 a0 &= 0xFFFFFFFF;
4920                 a1 &= 0xFFFFFFFF;
4921                 a2 &= 0xFFFFFFFF;
4922                 a3 &= 0xFFFFFFFF;
4923         }
4924
4925         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4926                 ret = -KVM_EPERM;
4927                 goto out;
4928         }
4929
4930         switch (nr) {
4931         case KVM_HC_VAPIC_POLL_IRQ:
4932                 ret = 0;
4933                 break;
4934         case KVM_HC_MMU_OP:
4935                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4936                 break;
4937         default:
4938                 ret = -KVM_ENOSYS;
4939                 break;
4940         }
4941 out:
4942         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4943         ++vcpu->stat.hypercalls;
4944         return r;
4945 }
4946 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4947
4948 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4949 {
4950         char instruction[3];
4951         unsigned long rip = kvm_rip_read(vcpu);
4952
4953         /*
4954          * Blow out the MMU to ensure that no other VCPU has an active mapping
4955          * to ensure that the updated hypercall appears atomically across all
4956          * VCPUs.
4957          */
4958         kvm_mmu_zap_all(vcpu->kvm);
4959
4960         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4961
4962         return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4963 }
4964
4965 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4966 {
4967         struct desc_ptr dt = { limit, base };
4968
4969         kvm_x86_ops->set_gdt(vcpu, &dt);
4970 }
4971
4972 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4973 {
4974         struct desc_ptr dt = { limit, base };
4975
4976         kvm_x86_ops->set_idt(vcpu, &dt);
4977 }
4978
4979 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4980 {
4981         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4982         int j, nent = vcpu->arch.cpuid_nent;
4983
4984         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4985         /* when no next entry is found, the current entry[i] is reselected */
4986         for (j = i + 1; ; j = (j + 1) % nent) {
4987                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4988                 if (ej->function == e->function) {
4989                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4990                         return j;
4991                 }
4992         }
4993         return 0; /* silence gcc, even though control never reaches here */
4994 }
4995
4996 /* find an entry with matching function, matching index (if needed), and that
4997  * should be read next (if it's stateful) */
4998 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4999         u32 function, u32 index)
5000 {
5001         if (e->function != function)
5002                 return 0;
5003         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5004                 return 0;
5005         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5006             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5007                 return 0;
5008         return 1;
5009 }
5010
5011 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5012                                               u32 function, u32 index)
5013 {
5014         int i;
5015         struct kvm_cpuid_entry2 *best = NULL;
5016
5017         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5018                 struct kvm_cpuid_entry2 *e;
5019
5020                 e = &vcpu->arch.cpuid_entries[i];
5021                 if (is_matching_cpuid_entry(e, function, index)) {
5022                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5023                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5024                         best = e;
5025                         break;
5026                 }
5027         }
5028         return best;
5029 }
5030 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5031
5032 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5033 {
5034         struct kvm_cpuid_entry2 *best;
5035
5036         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5037         if (!best || best->eax < 0x80000008)
5038                 goto not_found;
5039         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5040         if (best)
5041                 return best->eax & 0xff;
5042 not_found:
5043         return 36;
5044 }
5045
5046 /*
5047  * If no match is found, check whether we exceed the vCPU's limit
5048  * and return the content of the highest valid _standard_ leaf instead.
5049  * This is to satisfy the CPUID specification.
5050  */
5051 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5052                                                   u32 function, u32 index)
5053 {
5054         struct kvm_cpuid_entry2 *maxlevel;
5055
5056         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5057         if (!maxlevel || maxlevel->eax >= function)
5058                 return NULL;
5059         if (function & 0x80000000) {
5060                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5061                 if (!maxlevel)
5062                         return NULL;
5063         }
5064         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5065 }
5066
5067 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5068 {
5069         u32 function, index;
5070         struct kvm_cpuid_entry2 *best;
5071
5072         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5073         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5074         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5075         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5076         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5077         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5078         best = kvm_find_cpuid_entry(vcpu, function, index);
5079
5080         if (!best)
5081                 best = check_cpuid_limit(vcpu, function, index);
5082
5083         if (best) {
5084                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5085                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5086                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5087                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5088         }
5089         kvm_x86_ops->skip_emulated_instruction(vcpu);
5090         trace_kvm_cpuid(function,
5091                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5092                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5093                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5094                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5095 }
5096 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5097
5098 /*
5099  * Check if userspace requested an interrupt window, and that the
5100  * interrupt window is open.
5101  *
5102  * No need to exit to userspace if we already have an interrupt queued.
5103  */
5104 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5105 {
5106         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5107                 vcpu->run->request_interrupt_window &&
5108                 kvm_arch_interrupt_allowed(vcpu));
5109 }
5110
5111 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5112 {
5113         struct kvm_run *kvm_run = vcpu->run;
5114
5115         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5116         kvm_run->cr8 = kvm_get_cr8(vcpu);
5117         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5118         if (irqchip_in_kernel(vcpu->kvm))
5119                 kvm_run->ready_for_interrupt_injection = 1;
5120         else
5121                 kvm_run->ready_for_interrupt_injection =
5122                         kvm_arch_interrupt_allowed(vcpu) &&
5123                         !kvm_cpu_has_interrupt(vcpu) &&
5124                         !kvm_event_needs_reinjection(vcpu);
5125 }
5126
5127 static void vapic_enter(struct kvm_vcpu *vcpu)
5128 {
5129         struct kvm_lapic *apic = vcpu->arch.apic;
5130         struct page *page;
5131
5132         if (!apic || !apic->vapic_addr)
5133                 return;
5134
5135         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5136
5137         vcpu->arch.apic->vapic_page = page;
5138 }
5139
5140 static void vapic_exit(struct kvm_vcpu *vcpu)
5141 {
5142         struct kvm_lapic *apic = vcpu->arch.apic;
5143         int idx;
5144
5145         if (!apic || !apic->vapic_addr)
5146                 return;
5147
5148         idx = srcu_read_lock(&vcpu->kvm->srcu);
5149         kvm_release_page_dirty(apic->vapic_page);
5150         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5151         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5152 }
5153
5154 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5155 {
5156         int max_irr, tpr;
5157
5158         if (!kvm_x86_ops->update_cr8_intercept)
5159                 return;
5160
5161         if (!vcpu->arch.apic)
5162                 return;
5163
5164         if (!vcpu->arch.apic->vapic_addr)
5165                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5166         else
5167                 max_irr = -1;
5168
5169         if (max_irr != -1)
5170                 max_irr >>= 4;
5171
5172         tpr = kvm_lapic_get_cr8(vcpu);
5173
5174         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5175 }
5176
5177 static void inject_pending_event(struct kvm_vcpu *vcpu)
5178 {
5179         /* try to reinject previous events if any */
5180         if (vcpu->arch.exception.pending) {
5181                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5182                                         vcpu->arch.exception.has_error_code,
5183                                         vcpu->arch.exception.error_code);
5184                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5185                                           vcpu->arch.exception.has_error_code,
5186                                           vcpu->arch.exception.error_code,
5187                                           vcpu->arch.exception.reinject);
5188                 return;
5189         }
5190
5191         if (vcpu->arch.nmi_injected) {
5192                 kvm_x86_ops->set_nmi(vcpu);
5193                 return;
5194         }
5195
5196         if (vcpu->arch.interrupt.pending) {
5197                 kvm_x86_ops->set_irq(vcpu);
5198                 return;
5199         }
5200
5201         /* try to inject new event if pending */
5202         if (vcpu->arch.nmi_pending) {
5203                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5204                         vcpu->arch.nmi_pending = false;
5205                         vcpu->arch.nmi_injected = true;
5206                         kvm_x86_ops->set_nmi(vcpu);
5207                 }
5208         } else if (kvm_cpu_has_interrupt(vcpu)) {
5209                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5210                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5211                                             false);
5212                         kvm_x86_ops->set_irq(vcpu);
5213                 }
5214         }
5215 }
5216
5217 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5218 {
5219         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5220                         !vcpu->guest_xcr0_loaded) {
5221                 /* kvm_set_xcr() also depends on this */
5222                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5223                 vcpu->guest_xcr0_loaded = 1;
5224         }
5225 }
5226
5227 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5228 {
5229         if (vcpu->guest_xcr0_loaded) {
5230                 if (vcpu->arch.xcr0 != host_xcr0)
5231                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5232                 vcpu->guest_xcr0_loaded = 0;
5233         }
5234 }
5235
5236 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5237 {
5238         int r;
5239         bool nmi_pending;
5240         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5241                 vcpu->run->request_interrupt_window;
5242
5243         if (vcpu->requests) {
5244                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5245                         kvm_mmu_unload(vcpu);
5246                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5247                         __kvm_migrate_timers(vcpu);
5248                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5249                         r = kvm_guest_time_update(vcpu);
5250                         if (unlikely(r))
5251                                 goto out;
5252                 }
5253                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5254                         kvm_mmu_sync_roots(vcpu);
5255                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5256                         kvm_x86_ops->tlb_flush(vcpu);
5257                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5258                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5259                         r = 0;
5260                         goto out;
5261                 }
5262                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5263                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5264                         r = 0;
5265                         goto out;
5266                 }
5267                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5268                         vcpu->fpu_active = 0;
5269                         kvm_x86_ops->fpu_deactivate(vcpu);
5270                 }
5271                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5272                         /* Page is swapped out. Do synthetic halt */
5273                         vcpu->arch.apf.halted = true;
5274                         r = 1;
5275                         goto out;
5276                 }
5277         }
5278
5279         r = kvm_mmu_reload(vcpu);
5280         if (unlikely(r))
5281                 goto out;
5282
5283         /*
5284          * An NMI can be injected between local nmi_pending read and
5285          * vcpu->arch.nmi_pending read inside inject_pending_event().
5286          * But in that case, KVM_REQ_EVENT will be set, which makes
5287          * the race described above benign.
5288          */
5289         nmi_pending = ACCESS_ONCE(vcpu->arch.nmi_pending);
5290
5291         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5292                 inject_pending_event(vcpu);
5293
5294                 /* enable NMI/IRQ window open exits if needed */
5295                 if (nmi_pending)
5296                         kvm_x86_ops->enable_nmi_window(vcpu);
5297                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5298                         kvm_x86_ops->enable_irq_window(vcpu);
5299
5300                 if (kvm_lapic_enabled(vcpu)) {
5301                         update_cr8_intercept(vcpu);
5302                         kvm_lapic_sync_to_vapic(vcpu);
5303                 }
5304         }
5305
5306         preempt_disable();
5307
5308         kvm_x86_ops->prepare_guest_switch(vcpu);
5309         if (vcpu->fpu_active)
5310                 kvm_load_guest_fpu(vcpu);
5311         kvm_load_guest_xcr0(vcpu);
5312
5313         vcpu->mode = IN_GUEST_MODE;
5314
5315         /* We should set ->mode before check ->requests,
5316          * see the comment in make_all_cpus_request.
5317          */
5318         smp_mb();
5319
5320         local_irq_disable();
5321
5322         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5323             || need_resched() || signal_pending(current)) {
5324                 vcpu->mode = OUTSIDE_GUEST_MODE;
5325                 smp_wmb();
5326                 local_irq_enable();
5327                 preempt_enable();
5328                 kvm_x86_ops->cancel_injection(vcpu);
5329                 r = 1;
5330                 goto out;
5331         }
5332
5333         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5334
5335         kvm_guest_enter();
5336
5337         if (unlikely(vcpu->arch.switch_db_regs)) {
5338                 set_debugreg(0, 7);
5339                 set_debugreg(vcpu->arch.eff_db[0], 0);
5340                 set_debugreg(vcpu->arch.eff_db[1], 1);
5341                 set_debugreg(vcpu->arch.eff_db[2], 2);
5342                 set_debugreg(vcpu->arch.eff_db[3], 3);
5343         }
5344
5345         trace_kvm_entry(vcpu->vcpu_id);
5346         kvm_x86_ops->run(vcpu);
5347
5348         /*
5349          * If the guest has used debug registers, at least dr7
5350          * will be disabled while returning to the host.
5351          * If we don't have active breakpoints in the host, we don't
5352          * care about the messed up debug address registers. But if
5353          * we have some of them active, restore the old state.
5354          */
5355         if (hw_breakpoint_active())
5356                 hw_breakpoint_restore();
5357
5358         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5359
5360         vcpu->mode = OUTSIDE_GUEST_MODE;
5361         smp_wmb();
5362         local_irq_enable();
5363
5364         ++vcpu->stat.exits;
5365
5366         /*
5367          * We must have an instruction between local_irq_enable() and
5368          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5369          * the interrupt shadow.  The stat.exits increment will do nicely.
5370          * But we need to prevent reordering, hence this barrier():
5371          */
5372         barrier();
5373
5374         kvm_guest_exit();
5375
5376         preempt_enable();
5377
5378         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5379
5380         /*
5381          * Profile KVM exit RIPs:
5382          */
5383         if (unlikely(prof_on == KVM_PROFILING)) {
5384                 unsigned long rip = kvm_rip_read(vcpu);
5385                 profile_hit(KVM_PROFILING, (void *)rip);
5386         }
5387
5388
5389         kvm_lapic_sync_from_vapic(vcpu);
5390
5391         r = kvm_x86_ops->handle_exit(vcpu);
5392 out:
5393         return r;
5394 }
5395
5396
5397 static int __vcpu_run(struct kvm_vcpu *vcpu)
5398 {
5399         int r;
5400         struct kvm *kvm = vcpu->kvm;
5401
5402         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5403                 pr_debug("vcpu %d received sipi with vector # %x\n",
5404                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5405                 kvm_lapic_reset(vcpu);
5406                 r = kvm_arch_vcpu_reset(vcpu);
5407                 if (r)
5408                         return r;
5409                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5410         }
5411
5412         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5413         vapic_enter(vcpu);
5414
5415         r = 1;
5416         while (r > 0) {
5417                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5418                     !vcpu->arch.apf.halted)
5419                         r = vcpu_enter_guest(vcpu);
5420                 else {
5421                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5422                         kvm_vcpu_block(vcpu);
5423                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5424                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5425                         {
5426                                 switch(vcpu->arch.mp_state) {
5427                                 case KVM_MP_STATE_HALTED:
5428                                         vcpu->arch.mp_state =
5429                                                 KVM_MP_STATE_RUNNABLE;
5430                                 case KVM_MP_STATE_RUNNABLE:
5431                                         vcpu->arch.apf.halted = false;
5432                                         break;
5433                                 case KVM_MP_STATE_SIPI_RECEIVED:
5434                                 default:
5435                                         r = -EINTR;
5436                                         break;
5437                                 }
5438                         }
5439                 }
5440
5441                 if (r <= 0)
5442                         break;
5443
5444                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5445                 if (kvm_cpu_has_pending_timer(vcpu))
5446                         kvm_inject_pending_timer_irqs(vcpu);
5447
5448                 if (dm_request_for_irq_injection(vcpu)) {
5449                         r = -EINTR;
5450                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5451                         ++vcpu->stat.request_irq_exits;
5452                 }
5453
5454                 kvm_check_async_pf_completion(vcpu);
5455
5456                 if (signal_pending(current)) {
5457                         r = -EINTR;
5458                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5459                         ++vcpu->stat.signal_exits;
5460                 }
5461                 if (need_resched()) {
5462                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5463                         kvm_resched(vcpu);
5464                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5465                 }
5466         }
5467
5468         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5469
5470         vapic_exit(vcpu);
5471
5472         return r;
5473 }
5474
5475 static int complete_mmio(struct kvm_vcpu *vcpu)
5476 {
5477         struct kvm_run *run = vcpu->run;
5478         int r;
5479
5480         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5481                 return 1;
5482
5483         if (vcpu->mmio_needed) {
5484                 vcpu->mmio_needed = 0;
5485                 if (!vcpu->mmio_is_write)
5486                         memcpy(vcpu->mmio_data, run->mmio.data, 8);
5487                 vcpu->mmio_index += 8;
5488                 if (vcpu->mmio_index < vcpu->mmio_size) {
5489                         run->exit_reason = KVM_EXIT_MMIO;
5490                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5491                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5492                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5493                         run->mmio.is_write = vcpu->mmio_is_write;
5494                         vcpu->mmio_needed = 1;
5495                         return 0;
5496                 }
5497                 if (vcpu->mmio_is_write)
5498                         return 1;
5499                 vcpu->mmio_read_completed = 1;
5500         }
5501         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5502         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5503         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5504         if (r != EMULATE_DONE)
5505                 return 0;
5506         return 1;
5507 }
5508
5509 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5510 {
5511         int r;
5512         sigset_t sigsaved;
5513
5514         if (!tsk_used_math(current) && init_fpu(current))
5515                 return -ENOMEM;
5516
5517         if (vcpu->sigset_active)
5518                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5519
5520         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5521                 kvm_vcpu_block(vcpu);
5522                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5523                 r = -EAGAIN;
5524                 goto out;
5525         }
5526
5527         /* re-sync apic's tpr */
5528         if (!irqchip_in_kernel(vcpu->kvm)) {
5529                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5530                         r = -EINVAL;
5531                         goto out;
5532                 }
5533         }
5534
5535         r = complete_mmio(vcpu);
5536         if (r <= 0)
5537                 goto out;
5538
5539         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5540                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5541                                      kvm_run->hypercall.ret);
5542
5543         r = __vcpu_run(vcpu);
5544
5545 out:
5546         post_kvm_run_save(vcpu);
5547         if (vcpu->sigset_active)
5548                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5549
5550         return r;
5551 }
5552
5553 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5554 {
5555         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5556         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5557         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5558         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5559         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5560         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5561         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5562         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5563 #ifdef CONFIG_X86_64
5564         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5565         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5566         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5567         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5568         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5569         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5570         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5571         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5572 #endif
5573
5574         regs->rip = kvm_rip_read(vcpu);
5575         regs->rflags = kvm_get_rflags(vcpu);
5576
5577         return 0;
5578 }
5579
5580 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5581 {
5582         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5583         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5584         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5585         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5586         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5587         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5588         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5589         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5590 #ifdef CONFIG_X86_64
5591         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5592         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5593         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5594         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5595         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5596         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5597         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5598         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5599 #endif
5600
5601         kvm_rip_write(vcpu, regs->rip);
5602         kvm_set_rflags(vcpu, regs->rflags);
5603
5604         vcpu->arch.exception.pending = false;
5605
5606         kvm_make_request(KVM_REQ_EVENT, vcpu);
5607
5608         return 0;
5609 }
5610
5611 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5612 {
5613         struct kvm_segment cs;
5614
5615         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5616         *db = cs.db;
5617         *l = cs.l;
5618 }
5619 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5620
5621 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5622                                   struct kvm_sregs *sregs)
5623 {
5624         struct desc_ptr dt;
5625
5626         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5627         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5628         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5629         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5630         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5631         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5632
5633         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5634         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5635
5636         kvm_x86_ops->get_idt(vcpu, &dt);
5637         sregs->idt.limit = dt.size;
5638         sregs->idt.base = dt.address;
5639         kvm_x86_ops->get_gdt(vcpu, &dt);
5640         sregs->gdt.limit = dt.size;
5641         sregs->gdt.base = dt.address;
5642
5643         sregs->cr0 = kvm_read_cr0(vcpu);
5644         sregs->cr2 = vcpu->arch.cr2;
5645         sregs->cr3 = kvm_read_cr3(vcpu);
5646         sregs->cr4 = kvm_read_cr4(vcpu);
5647         sregs->cr8 = kvm_get_cr8(vcpu);
5648         sregs->efer = vcpu->arch.efer;
5649         sregs->apic_base = kvm_get_apic_base(vcpu);
5650
5651         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5652
5653         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5654                 set_bit(vcpu->arch.interrupt.nr,
5655                         (unsigned long *)sregs->interrupt_bitmap);
5656
5657         return 0;
5658 }
5659
5660 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5661                                     struct kvm_mp_state *mp_state)
5662 {
5663         mp_state->mp_state = vcpu->arch.mp_state;
5664         return 0;
5665 }
5666
5667 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5668                                     struct kvm_mp_state *mp_state)
5669 {
5670         vcpu->arch.mp_state = mp_state->mp_state;
5671         kvm_make_request(KVM_REQ_EVENT, vcpu);
5672         return 0;
5673 }
5674
5675 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5676                     bool has_error_code, u32 error_code)
5677 {
5678         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5679         int ret;
5680
5681         init_emulate_ctxt(vcpu);
5682
5683         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5684                                    tss_selector, reason, has_error_code,
5685                                    error_code);
5686
5687         if (ret)
5688                 return EMULATE_FAIL;
5689
5690         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5691         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5692         kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5693         kvm_make_request(KVM_REQ_EVENT, vcpu);
5694         return EMULATE_DONE;
5695 }
5696 EXPORT_SYMBOL_GPL(kvm_task_switch);
5697
5698 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5699                                   struct kvm_sregs *sregs)
5700 {
5701         int mmu_reset_needed = 0;
5702         int pending_vec, max_bits, idx;
5703         struct desc_ptr dt;
5704
5705         dt.size = sregs->idt.limit;
5706         dt.address = sregs->idt.base;
5707         kvm_x86_ops->set_idt(vcpu, &dt);
5708         dt.size = sregs->gdt.limit;
5709         dt.address = sregs->gdt.base;
5710         kvm_x86_ops->set_gdt(vcpu, &dt);
5711
5712         vcpu->arch.cr2 = sregs->cr2;
5713         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5714         vcpu->arch.cr3 = sregs->cr3;
5715         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5716
5717         kvm_set_cr8(vcpu, sregs->cr8);
5718
5719         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5720         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5721         kvm_set_apic_base(vcpu, sregs->apic_base);
5722
5723         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5724         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5725         vcpu->arch.cr0 = sregs->cr0;
5726
5727         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5728         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5729         if (sregs->cr4 & X86_CR4_OSXSAVE)
5730                 update_cpuid(vcpu);
5731
5732         idx = srcu_read_lock(&vcpu->kvm->srcu);
5733         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5734                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5735                 mmu_reset_needed = 1;
5736         }
5737         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5738
5739         if (mmu_reset_needed)
5740                 kvm_mmu_reset_context(vcpu);
5741
5742         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5743         pending_vec = find_first_bit(
5744                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5745         if (pending_vec < max_bits) {
5746                 kvm_queue_interrupt(vcpu, pending_vec, false);
5747                 pr_debug("Set back pending irq %d\n", pending_vec);
5748         }
5749
5750         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5751         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5752         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5753         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5754         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5755         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5756
5757         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5758         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5759
5760         update_cr8_intercept(vcpu);
5761
5762         /* Older userspace won't unhalt the vcpu on reset. */
5763         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5764             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5765             !is_protmode(vcpu))
5766                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5767
5768         kvm_make_request(KVM_REQ_EVENT, vcpu);
5769
5770         return 0;
5771 }
5772
5773 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5774                                         struct kvm_guest_debug *dbg)
5775 {
5776         unsigned long rflags;
5777         int i, r;
5778
5779         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5780                 r = -EBUSY;
5781                 if (vcpu->arch.exception.pending)
5782                         goto out;
5783                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5784                         kvm_queue_exception(vcpu, DB_VECTOR);
5785                 else
5786                         kvm_queue_exception(vcpu, BP_VECTOR);
5787         }
5788
5789         /*
5790          * Read rflags as long as potentially injected trace flags are still
5791          * filtered out.
5792          */
5793         rflags = kvm_get_rflags(vcpu);
5794
5795         vcpu->guest_debug = dbg->control;
5796         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5797                 vcpu->guest_debug = 0;
5798
5799         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5800                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5801                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5802                 vcpu->arch.switch_db_regs =
5803                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5804         } else {
5805                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5806                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5807                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5808         }
5809
5810         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5811                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5812                         get_segment_base(vcpu, VCPU_SREG_CS);
5813
5814         /*
5815          * Trigger an rflags update that will inject or remove the trace
5816          * flags.
5817          */
5818         kvm_set_rflags(vcpu, rflags);
5819
5820         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5821
5822         r = 0;
5823
5824 out:
5825
5826         return r;
5827 }
5828
5829 /*
5830  * Translate a guest virtual address to a guest physical address.
5831  */
5832 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5833                                     struct kvm_translation *tr)
5834 {
5835         unsigned long vaddr = tr->linear_address;
5836         gpa_t gpa;
5837         int idx;
5838
5839         idx = srcu_read_lock(&vcpu->kvm->srcu);
5840         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5841         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5842         tr->physical_address = gpa;
5843         tr->valid = gpa != UNMAPPED_GVA;
5844         tr->writeable = 1;
5845         tr->usermode = 0;
5846
5847         return 0;
5848 }
5849
5850 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5851 {
5852         struct i387_fxsave_struct *fxsave =
5853                         &vcpu->arch.guest_fpu.state->fxsave;
5854
5855         memcpy(fpu->fpr, fxsave->st_space, 128);
5856         fpu->fcw = fxsave->cwd;
5857         fpu->fsw = fxsave->swd;
5858         fpu->ftwx = fxsave->twd;
5859         fpu->last_opcode = fxsave->fop;
5860         fpu->last_ip = fxsave->rip;
5861         fpu->last_dp = fxsave->rdp;
5862         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5863
5864         return 0;
5865 }
5866
5867 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5868 {
5869         struct i387_fxsave_struct *fxsave =
5870                         &vcpu->arch.guest_fpu.state->fxsave;
5871
5872         memcpy(fxsave->st_space, fpu->fpr, 128);
5873         fxsave->cwd = fpu->fcw;
5874         fxsave->swd = fpu->fsw;
5875         fxsave->twd = fpu->ftwx;
5876         fxsave->fop = fpu->last_opcode;
5877         fxsave->rip = fpu->last_ip;
5878         fxsave->rdp = fpu->last_dp;
5879         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5880
5881         return 0;
5882 }
5883
5884 int fx_init(struct kvm_vcpu *vcpu)
5885 {
5886         int err;
5887
5888         err = fpu_alloc(&vcpu->arch.guest_fpu);
5889         if (err)
5890                 return err;
5891
5892         fpu_finit(&vcpu->arch.guest_fpu);
5893
5894         /*
5895          * Ensure guest xcr0 is valid for loading
5896          */
5897         vcpu->arch.xcr0 = XSTATE_FP;
5898
5899         vcpu->arch.cr0 |= X86_CR0_ET;
5900
5901         return 0;
5902 }
5903 EXPORT_SYMBOL_GPL(fx_init);
5904
5905 static void fx_free(struct kvm_vcpu *vcpu)
5906 {
5907         fpu_free(&vcpu->arch.guest_fpu);
5908 }
5909
5910 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5911 {
5912         if (vcpu->guest_fpu_loaded)
5913                 return;
5914
5915         /*
5916          * Restore all possible states in the guest,
5917          * and assume host would use all available bits.
5918          * Guest xcr0 would be loaded later.
5919          */
5920         kvm_put_guest_xcr0(vcpu);
5921         vcpu->guest_fpu_loaded = 1;
5922         unlazy_fpu(current);
5923         fpu_restore_checking(&vcpu->arch.guest_fpu);
5924         trace_kvm_fpu(1);
5925 }
5926
5927 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5928 {
5929         kvm_put_guest_xcr0(vcpu);
5930
5931         if (!vcpu->guest_fpu_loaded)
5932                 return;
5933
5934         vcpu->guest_fpu_loaded = 0;
5935         fpu_save_init(&vcpu->arch.guest_fpu);
5936         ++vcpu->stat.fpu_reload;
5937         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5938         trace_kvm_fpu(0);
5939 }
5940
5941 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5942 {
5943         kvmclock_reset(vcpu);
5944
5945         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5946         fx_free(vcpu);
5947         kvm_x86_ops->vcpu_free(vcpu);
5948 }
5949
5950 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5951                                                 unsigned int id)
5952 {
5953         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5954                 printk_once(KERN_WARNING
5955                 "kvm: SMP vm created on host with unstable TSC; "
5956                 "guest TSC will not be reliable\n");
5957         return kvm_x86_ops->vcpu_create(kvm, id);
5958 }
5959
5960 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5961 {
5962         int r;
5963
5964         vcpu->arch.mtrr_state.have_fixed = 1;
5965         vcpu_load(vcpu);
5966         r = kvm_arch_vcpu_reset(vcpu);
5967         if (r == 0)
5968                 r = kvm_mmu_setup(vcpu);
5969         vcpu_put(vcpu);
5970         if (r < 0)
5971                 goto free_vcpu;
5972
5973         return 0;
5974 free_vcpu:
5975         kvm_x86_ops->vcpu_free(vcpu);
5976         return r;
5977 }
5978
5979 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5980 {
5981         vcpu->arch.apf.msr_val = 0;
5982
5983         vcpu_load(vcpu);
5984         kvm_mmu_unload(vcpu);
5985         vcpu_put(vcpu);
5986
5987         fx_free(vcpu);
5988         kvm_x86_ops->vcpu_free(vcpu);
5989 }
5990
5991 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5992 {
5993         vcpu->arch.nmi_pending = false;
5994         vcpu->arch.nmi_injected = false;
5995
5996         vcpu->arch.switch_db_regs = 0;
5997         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5998         vcpu->arch.dr6 = DR6_FIXED_1;
5999         vcpu->arch.dr7 = DR7_FIXED_1;
6000
6001         kvm_make_request(KVM_REQ_EVENT, vcpu);
6002         vcpu->arch.apf.msr_val = 0;
6003
6004         kvmclock_reset(vcpu);
6005
6006         kvm_clear_async_pf_completion_queue(vcpu);
6007         kvm_async_pf_hash_reset(vcpu);
6008         vcpu->arch.apf.halted = false;
6009
6010         return kvm_x86_ops->vcpu_reset(vcpu);
6011 }
6012
6013 int kvm_arch_hardware_enable(void *garbage)
6014 {
6015         struct kvm *kvm;
6016         struct kvm_vcpu *vcpu;
6017         int i;
6018
6019         kvm_shared_msr_cpu_online();
6020         list_for_each_entry(kvm, &vm_list, vm_list)
6021                 kvm_for_each_vcpu(i, vcpu, kvm)
6022                         if (vcpu->cpu == smp_processor_id())
6023                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6024         return kvm_x86_ops->hardware_enable(garbage);
6025 }
6026
6027 void kvm_arch_hardware_disable(void *garbage)
6028 {
6029         kvm_x86_ops->hardware_disable(garbage);
6030         drop_user_return_notifiers(garbage);
6031 }
6032
6033 int kvm_arch_hardware_setup(void)
6034 {
6035         return kvm_x86_ops->hardware_setup();
6036 }
6037
6038 void kvm_arch_hardware_unsetup(void)
6039 {
6040         kvm_x86_ops->hardware_unsetup();
6041 }
6042
6043 void kvm_arch_check_processor_compat(void *rtn)
6044 {
6045         kvm_x86_ops->check_processor_compatibility(rtn);
6046 }
6047
6048 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6049 {
6050         struct page *page;
6051         struct kvm *kvm;
6052         int r;
6053
6054         BUG_ON(vcpu->kvm == NULL);
6055         kvm = vcpu->kvm;
6056
6057         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6058         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6059         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6060         vcpu->arch.mmu.translate_gpa = translate_gpa;
6061         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6062         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6063                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6064         else
6065                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6066
6067         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6068         if (!page) {
6069                 r = -ENOMEM;
6070                 goto fail;
6071         }
6072         vcpu->arch.pio_data = page_address(page);
6073
6074         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6075
6076         r = kvm_mmu_create(vcpu);
6077         if (r < 0)
6078                 goto fail_free_pio_data;
6079
6080         if (irqchip_in_kernel(kvm)) {
6081                 r = kvm_create_lapic(vcpu);
6082                 if (r < 0)
6083                         goto fail_mmu_destroy;
6084         }
6085
6086         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6087                                        GFP_KERNEL);
6088         if (!vcpu->arch.mce_banks) {
6089                 r = -ENOMEM;
6090                 goto fail_free_lapic;
6091         }
6092         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6093
6094         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6095                 goto fail_free_mce_banks;
6096
6097         kvm_async_pf_hash_reset(vcpu);
6098
6099         return 0;
6100 fail_free_mce_banks:
6101         kfree(vcpu->arch.mce_banks);
6102 fail_free_lapic:
6103         kvm_free_lapic(vcpu);
6104 fail_mmu_destroy:
6105         kvm_mmu_destroy(vcpu);
6106 fail_free_pio_data:
6107         free_page((unsigned long)vcpu->arch.pio_data);
6108 fail:
6109         return r;
6110 }
6111
6112 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6113 {
6114         int idx;
6115
6116         kfree(vcpu->arch.mce_banks);
6117         kvm_free_lapic(vcpu);
6118         idx = srcu_read_lock(&vcpu->kvm->srcu);
6119         kvm_mmu_destroy(vcpu);
6120         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6121         free_page((unsigned long)vcpu->arch.pio_data);
6122 }
6123
6124 int kvm_arch_init_vm(struct kvm *kvm)
6125 {
6126         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6127         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6128
6129         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6130         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6131
6132         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6133
6134         return 0;
6135 }
6136
6137 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6138 {
6139         vcpu_load(vcpu);
6140         kvm_mmu_unload(vcpu);
6141         vcpu_put(vcpu);
6142 }
6143
6144 static void kvm_free_vcpus(struct kvm *kvm)
6145 {
6146         unsigned int i;
6147         struct kvm_vcpu *vcpu;
6148
6149         /*
6150          * Unpin any mmu pages first.
6151          */
6152         kvm_for_each_vcpu(i, vcpu, kvm) {
6153                 kvm_clear_async_pf_completion_queue(vcpu);
6154                 kvm_unload_vcpu_mmu(vcpu);
6155         }
6156         kvm_for_each_vcpu(i, vcpu, kvm)
6157                 kvm_arch_vcpu_free(vcpu);
6158
6159         mutex_lock(&kvm->lock);
6160         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6161                 kvm->vcpus[i] = NULL;
6162
6163         atomic_set(&kvm->online_vcpus, 0);
6164         mutex_unlock(&kvm->lock);
6165 }
6166
6167 void kvm_arch_sync_events(struct kvm *kvm)
6168 {
6169         kvm_free_all_assigned_devices(kvm);
6170         kvm_free_pit(kvm);
6171 }
6172
6173 void kvm_arch_destroy_vm(struct kvm *kvm)
6174 {
6175         kvm_iommu_unmap_guest(kvm);
6176         kfree(kvm->arch.vpic);
6177         kfree(kvm->arch.vioapic);
6178         kvm_free_vcpus(kvm);
6179         if (kvm->arch.apic_access_page)
6180                 put_page(kvm->arch.apic_access_page);
6181         if (kvm->arch.ept_identity_pagetable)
6182                 put_page(kvm->arch.ept_identity_pagetable);
6183 }
6184
6185 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6186                                 struct kvm_memory_slot *memslot,
6187                                 struct kvm_memory_slot old,
6188                                 struct kvm_userspace_memory_region *mem,
6189                                 int user_alloc)
6190 {
6191         int npages = memslot->npages;
6192         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6193
6194         /* Prevent internal slot pages from being moved by fork()/COW. */
6195         if (memslot->id >= KVM_MEMORY_SLOTS)
6196                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6197
6198         /*To keep backward compatibility with older userspace,
6199          *x86 needs to hanlde !user_alloc case.
6200          */
6201         if (!user_alloc) {
6202                 if (npages && !old.rmap) {
6203                         unsigned long userspace_addr;
6204
6205                         down_write(&current->mm->mmap_sem);
6206                         userspace_addr = do_mmap(NULL, 0,
6207                                                  npages * PAGE_SIZE,
6208                                                  PROT_READ | PROT_WRITE,
6209                                                  map_flags,
6210                                                  0);
6211                         up_write(&current->mm->mmap_sem);
6212
6213                         if (IS_ERR((void *)userspace_addr))
6214                                 return PTR_ERR((void *)userspace_addr);
6215
6216                         memslot->userspace_addr = userspace_addr;
6217                 }
6218         }
6219
6220
6221         return 0;
6222 }
6223
6224 void kvm_arch_commit_memory_region(struct kvm *kvm,
6225                                 struct kvm_userspace_memory_region *mem,
6226                                 struct kvm_memory_slot old,
6227                                 int user_alloc)
6228 {
6229
6230         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6231
6232         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6233                 int ret;
6234
6235                 down_write(&current->mm->mmap_sem);
6236                 ret = do_munmap(current->mm, old.userspace_addr,
6237                                 old.npages * PAGE_SIZE);
6238                 up_write(&current->mm->mmap_sem);
6239                 if (ret < 0)
6240                         printk(KERN_WARNING
6241                                "kvm_vm_ioctl_set_memory_region: "
6242                                "failed to munmap memory\n");
6243         }
6244
6245         if (!kvm->arch.n_requested_mmu_pages)
6246                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6247
6248         spin_lock(&kvm->mmu_lock);
6249         if (nr_mmu_pages)
6250                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6251         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6252         spin_unlock(&kvm->mmu_lock);
6253 }
6254