KVM: nVMX: Implement VMPTRST
[linux-3.10.git] / arch / x86 / kvm / x86.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * derived from drivers/kvm/kvm_main.c
5  *
6  * Copyright (C) 2006 Qumranet, Inc.
7  * Copyright (C) 2008 Qumranet, Inc.
8  * Copyright IBM Corporation, 2008
9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
10  *
11  * Authors:
12  *   Avi Kivity   <avi@qumranet.com>
13  *   Yaniv Kamay  <yaniv@qumranet.com>
14  *   Amit Shah    <amit.shah@qumranet.com>
15  *   Ben-Ami Yassour <benami@il.ibm.com>
16  *
17  * This work is licensed under the terms of the GNU GPL, version 2.  See
18  * the COPYING file in the top-level directory.
19  *
20  */
21
22 #include <linux/kvm_host.h>
23 #include "irq.h"
24 #include "mmu.h"
25 #include "i8254.h"
26 #include "tss.h"
27 #include "kvm_cache_regs.h"
28 #include "x86.h"
29
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
33 #include <linux/fs.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <trace/events/kvm.h>
48
49 #define CREATE_TRACE_POINTS
50 #include "trace.h"
51
52 #include <asm/debugreg.h>
53 #include <asm/msr.h>
54 #include <asm/desc.h>
55 #include <asm/mtrr.h>
56 #include <asm/mce.h>
57 #include <asm/i387.h>
58 #include <asm/xcr.h>
59 #include <asm/pvclock.h>
60 #include <asm/div64.h>
61
62 #define MAX_IO_MSRS 256
63 #define KVM_MAX_MCE_BANKS 32
64 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
65
66 #define emul_to_vcpu(ctxt) \
67         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
68
69 /* EFER defaults:
70  * - enable syscall per default because its emulated by KVM
71  * - enable LME and LMA per default on 64 bit KVM
72  */
73 #ifdef CONFIG_X86_64
74 static
75 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
76 #else
77 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
78 #endif
79
80 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
81 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
82
83 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
84 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
85                                     struct kvm_cpuid_entry2 __user *entries);
86
87 struct kvm_x86_ops *kvm_x86_ops;
88 EXPORT_SYMBOL_GPL(kvm_x86_ops);
89
90 int ignore_msrs = 0;
91 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
92
93 bool kvm_has_tsc_control;
94 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
95 u32  kvm_max_guest_tsc_khz;
96 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
97
98 #define KVM_NR_SHARED_MSRS 16
99
100 struct kvm_shared_msrs_global {
101         int nr;
102         u32 msrs[KVM_NR_SHARED_MSRS];
103 };
104
105 struct kvm_shared_msrs {
106         struct user_return_notifier urn;
107         bool registered;
108         struct kvm_shared_msr_values {
109                 u64 host;
110                 u64 curr;
111         } values[KVM_NR_SHARED_MSRS];
112 };
113
114 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
115 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
116
117 struct kvm_stats_debugfs_item debugfs_entries[] = {
118         { "pf_fixed", VCPU_STAT(pf_fixed) },
119         { "pf_guest", VCPU_STAT(pf_guest) },
120         { "tlb_flush", VCPU_STAT(tlb_flush) },
121         { "invlpg", VCPU_STAT(invlpg) },
122         { "exits", VCPU_STAT(exits) },
123         { "io_exits", VCPU_STAT(io_exits) },
124         { "mmio_exits", VCPU_STAT(mmio_exits) },
125         { "signal_exits", VCPU_STAT(signal_exits) },
126         { "irq_window", VCPU_STAT(irq_window_exits) },
127         { "nmi_window", VCPU_STAT(nmi_window_exits) },
128         { "halt_exits", VCPU_STAT(halt_exits) },
129         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
130         { "hypercalls", VCPU_STAT(hypercalls) },
131         { "request_irq", VCPU_STAT(request_irq_exits) },
132         { "irq_exits", VCPU_STAT(irq_exits) },
133         { "host_state_reload", VCPU_STAT(host_state_reload) },
134         { "efer_reload", VCPU_STAT(efer_reload) },
135         { "fpu_reload", VCPU_STAT(fpu_reload) },
136         { "insn_emulation", VCPU_STAT(insn_emulation) },
137         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
138         { "irq_injections", VCPU_STAT(irq_injections) },
139         { "nmi_injections", VCPU_STAT(nmi_injections) },
140         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
141         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
142         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
143         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
144         { "mmu_flooded", VM_STAT(mmu_flooded) },
145         { "mmu_recycled", VM_STAT(mmu_recycled) },
146         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
147         { "mmu_unsync", VM_STAT(mmu_unsync) },
148         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
149         { "largepages", VM_STAT(lpages) },
150         { NULL }
151 };
152
153 u64 __read_mostly host_xcr0;
154
155 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
156
157 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
158 {
159         int i;
160         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
161                 vcpu->arch.apf.gfns[i] = ~0;
162 }
163
164 static void kvm_on_user_return(struct user_return_notifier *urn)
165 {
166         unsigned slot;
167         struct kvm_shared_msrs *locals
168                 = container_of(urn, struct kvm_shared_msrs, urn);
169         struct kvm_shared_msr_values *values;
170
171         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
172                 values = &locals->values[slot];
173                 if (values->host != values->curr) {
174                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
175                         values->curr = values->host;
176                 }
177         }
178         locals->registered = false;
179         user_return_notifier_unregister(urn);
180 }
181
182 static void shared_msr_update(unsigned slot, u32 msr)
183 {
184         struct kvm_shared_msrs *smsr;
185         u64 value;
186
187         smsr = &__get_cpu_var(shared_msrs);
188         /* only read, and nobody should modify it at this time,
189          * so don't need lock */
190         if (slot >= shared_msrs_global.nr) {
191                 printk(KERN_ERR "kvm: invalid MSR slot!");
192                 return;
193         }
194         rdmsrl_safe(msr, &value);
195         smsr->values[slot].host = value;
196         smsr->values[slot].curr = value;
197 }
198
199 void kvm_define_shared_msr(unsigned slot, u32 msr)
200 {
201         if (slot >= shared_msrs_global.nr)
202                 shared_msrs_global.nr = slot + 1;
203         shared_msrs_global.msrs[slot] = msr;
204         /* we need ensured the shared_msr_global have been updated */
205         smp_wmb();
206 }
207 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
208
209 static void kvm_shared_msr_cpu_online(void)
210 {
211         unsigned i;
212
213         for (i = 0; i < shared_msrs_global.nr; ++i)
214                 shared_msr_update(i, shared_msrs_global.msrs[i]);
215 }
216
217 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
218 {
219         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
220
221         if (((value ^ smsr->values[slot].curr) & mask) == 0)
222                 return;
223         smsr->values[slot].curr = value;
224         wrmsrl(shared_msrs_global.msrs[slot], value);
225         if (!smsr->registered) {
226                 smsr->urn.on_user_return = kvm_on_user_return;
227                 user_return_notifier_register(&smsr->urn);
228                 smsr->registered = true;
229         }
230 }
231 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
232
233 static void drop_user_return_notifiers(void *ignore)
234 {
235         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
236
237         if (smsr->registered)
238                 kvm_on_user_return(&smsr->urn);
239 }
240
241 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
242 {
243         if (irqchip_in_kernel(vcpu->kvm))
244                 return vcpu->arch.apic_base;
245         else
246                 return vcpu->arch.apic_base;
247 }
248 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
249
250 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
251 {
252         /* TODO: reserve bits check */
253         if (irqchip_in_kernel(vcpu->kvm))
254                 kvm_lapic_set_base(vcpu, data);
255         else
256                 vcpu->arch.apic_base = data;
257 }
258 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
259
260 #define EXCPT_BENIGN            0
261 #define EXCPT_CONTRIBUTORY      1
262 #define EXCPT_PF                2
263
264 static int exception_class(int vector)
265 {
266         switch (vector) {
267         case PF_VECTOR:
268                 return EXCPT_PF;
269         case DE_VECTOR:
270         case TS_VECTOR:
271         case NP_VECTOR:
272         case SS_VECTOR:
273         case GP_VECTOR:
274                 return EXCPT_CONTRIBUTORY;
275         default:
276                 break;
277         }
278         return EXCPT_BENIGN;
279 }
280
281 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
282                 unsigned nr, bool has_error, u32 error_code,
283                 bool reinject)
284 {
285         u32 prev_nr;
286         int class1, class2;
287
288         kvm_make_request(KVM_REQ_EVENT, vcpu);
289
290         if (!vcpu->arch.exception.pending) {
291         queue:
292                 vcpu->arch.exception.pending = true;
293                 vcpu->arch.exception.has_error_code = has_error;
294                 vcpu->arch.exception.nr = nr;
295                 vcpu->arch.exception.error_code = error_code;
296                 vcpu->arch.exception.reinject = reinject;
297                 return;
298         }
299
300         /* to check exception */
301         prev_nr = vcpu->arch.exception.nr;
302         if (prev_nr == DF_VECTOR) {
303                 /* triple fault -> shutdown */
304                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
305                 return;
306         }
307         class1 = exception_class(prev_nr);
308         class2 = exception_class(nr);
309         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
310                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
311                 /* generate double fault per SDM Table 5-5 */
312                 vcpu->arch.exception.pending = true;
313                 vcpu->arch.exception.has_error_code = true;
314                 vcpu->arch.exception.nr = DF_VECTOR;
315                 vcpu->arch.exception.error_code = 0;
316         } else
317                 /* replace previous exception with a new one in a hope
318                    that instruction re-execution will regenerate lost
319                    exception */
320                 goto queue;
321 }
322
323 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
324 {
325         kvm_multiple_exception(vcpu, nr, false, 0, false);
326 }
327 EXPORT_SYMBOL_GPL(kvm_queue_exception);
328
329 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
330 {
331         kvm_multiple_exception(vcpu, nr, false, 0, true);
332 }
333 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
334
335 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
336 {
337         if (err)
338                 kvm_inject_gp(vcpu, 0);
339         else
340                 kvm_x86_ops->skip_emulated_instruction(vcpu);
341 }
342 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
343
344 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
345 {
346         ++vcpu->stat.pf_guest;
347         vcpu->arch.cr2 = fault->address;
348         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
349 }
350 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
351
352 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
353 {
354         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
355                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
356         else
357                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
358 }
359
360 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
361 {
362         kvm_make_request(KVM_REQ_EVENT, vcpu);
363         vcpu->arch.nmi_pending = 1;
364 }
365 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
366
367 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
368 {
369         kvm_multiple_exception(vcpu, nr, true, error_code, false);
370 }
371 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
372
373 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
374 {
375         kvm_multiple_exception(vcpu, nr, true, error_code, true);
376 }
377 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
378
379 /*
380  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
381  * a #GP and return false.
382  */
383 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
384 {
385         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
386                 return true;
387         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
388         return false;
389 }
390 EXPORT_SYMBOL_GPL(kvm_require_cpl);
391
392 /*
393  * This function will be used to read from the physical memory of the currently
394  * running guest. The difference to kvm_read_guest_page is that this function
395  * can read from guest physical or from the guest's guest physical memory.
396  */
397 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
398                             gfn_t ngfn, void *data, int offset, int len,
399                             u32 access)
400 {
401         gfn_t real_gfn;
402         gpa_t ngpa;
403
404         ngpa     = gfn_to_gpa(ngfn);
405         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
406         if (real_gfn == UNMAPPED_GVA)
407                 return -EFAULT;
408
409         real_gfn = gpa_to_gfn(real_gfn);
410
411         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
412 }
413 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
414
415 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
416                                void *data, int offset, int len, u32 access)
417 {
418         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
419                                        data, offset, len, access);
420 }
421
422 /*
423  * Load the pae pdptrs.  Return true is they are all valid.
424  */
425 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
426 {
427         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
428         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
429         int i;
430         int ret;
431         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
432
433         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
434                                       offset * sizeof(u64), sizeof(pdpte),
435                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
436         if (ret < 0) {
437                 ret = 0;
438                 goto out;
439         }
440         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
441                 if (is_present_gpte(pdpte[i]) &&
442                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
443                         ret = 0;
444                         goto out;
445                 }
446         }
447         ret = 1;
448
449         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
450         __set_bit(VCPU_EXREG_PDPTR,
451                   (unsigned long *)&vcpu->arch.regs_avail);
452         __set_bit(VCPU_EXREG_PDPTR,
453                   (unsigned long *)&vcpu->arch.regs_dirty);
454 out:
455
456         return ret;
457 }
458 EXPORT_SYMBOL_GPL(load_pdptrs);
459
460 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
461 {
462         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
463         bool changed = true;
464         int offset;
465         gfn_t gfn;
466         int r;
467
468         if (is_long_mode(vcpu) || !is_pae(vcpu))
469                 return false;
470
471         if (!test_bit(VCPU_EXREG_PDPTR,
472                       (unsigned long *)&vcpu->arch.regs_avail))
473                 return true;
474
475         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
476         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
477         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
478                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
479         if (r < 0)
480                 goto out;
481         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
482 out:
483
484         return changed;
485 }
486
487 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
488 {
489         unsigned long old_cr0 = kvm_read_cr0(vcpu);
490         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
491                                     X86_CR0_CD | X86_CR0_NW;
492
493         cr0 |= X86_CR0_ET;
494
495 #ifdef CONFIG_X86_64
496         if (cr0 & 0xffffffff00000000UL)
497                 return 1;
498 #endif
499
500         cr0 &= ~CR0_RESERVED_BITS;
501
502         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
503                 return 1;
504
505         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
506                 return 1;
507
508         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
509 #ifdef CONFIG_X86_64
510                 if ((vcpu->arch.efer & EFER_LME)) {
511                         int cs_db, cs_l;
512
513                         if (!is_pae(vcpu))
514                                 return 1;
515                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
516                         if (cs_l)
517                                 return 1;
518                 } else
519 #endif
520                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
521                                                  kvm_read_cr3(vcpu)))
522                         return 1;
523         }
524
525         kvm_x86_ops->set_cr0(vcpu, cr0);
526
527         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
528                 kvm_clear_async_pf_completion_queue(vcpu);
529                 kvm_async_pf_hash_reset(vcpu);
530         }
531
532         if ((cr0 ^ old_cr0) & update_bits)
533                 kvm_mmu_reset_context(vcpu);
534         return 0;
535 }
536 EXPORT_SYMBOL_GPL(kvm_set_cr0);
537
538 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
539 {
540         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
541 }
542 EXPORT_SYMBOL_GPL(kvm_lmsw);
543
544 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
545 {
546         u64 xcr0;
547
548         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
549         if (index != XCR_XFEATURE_ENABLED_MASK)
550                 return 1;
551         xcr0 = xcr;
552         if (kvm_x86_ops->get_cpl(vcpu) != 0)
553                 return 1;
554         if (!(xcr0 & XSTATE_FP))
555                 return 1;
556         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
557                 return 1;
558         if (xcr0 & ~host_xcr0)
559                 return 1;
560         vcpu->arch.xcr0 = xcr0;
561         vcpu->guest_xcr0_loaded = 0;
562         return 0;
563 }
564
565 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
566 {
567         if (__kvm_set_xcr(vcpu, index, xcr)) {
568                 kvm_inject_gp(vcpu, 0);
569                 return 1;
570         }
571         return 0;
572 }
573 EXPORT_SYMBOL_GPL(kvm_set_xcr);
574
575 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
576 {
577         struct kvm_cpuid_entry2 *best;
578
579         best = kvm_find_cpuid_entry(vcpu, 1, 0);
580         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
581 }
582
583 static void update_cpuid(struct kvm_vcpu *vcpu)
584 {
585         struct kvm_cpuid_entry2 *best;
586
587         best = kvm_find_cpuid_entry(vcpu, 1, 0);
588         if (!best)
589                 return;
590
591         /* Update OSXSAVE bit */
592         if (cpu_has_xsave && best->function == 0x1) {
593                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
594                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
595                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
596         }
597 }
598
599 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
600 {
601         unsigned long old_cr4 = kvm_read_cr4(vcpu);
602         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
603
604         if (cr4 & CR4_RESERVED_BITS)
605                 return 1;
606
607         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
608                 return 1;
609
610         if (is_long_mode(vcpu)) {
611                 if (!(cr4 & X86_CR4_PAE))
612                         return 1;
613         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
614                    && ((cr4 ^ old_cr4) & pdptr_bits)
615                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
616                                    kvm_read_cr3(vcpu)))
617                 return 1;
618
619         if (kvm_x86_ops->set_cr4(vcpu, cr4))
620                 return 1;
621
622         if ((cr4 ^ old_cr4) & pdptr_bits)
623                 kvm_mmu_reset_context(vcpu);
624
625         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
626                 update_cpuid(vcpu);
627
628         return 0;
629 }
630 EXPORT_SYMBOL_GPL(kvm_set_cr4);
631
632 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
633 {
634         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
635                 kvm_mmu_sync_roots(vcpu);
636                 kvm_mmu_flush_tlb(vcpu);
637                 return 0;
638         }
639
640         if (is_long_mode(vcpu)) {
641                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
642                         return 1;
643         } else {
644                 if (is_pae(vcpu)) {
645                         if (cr3 & CR3_PAE_RESERVED_BITS)
646                                 return 1;
647                         if (is_paging(vcpu) &&
648                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
649                                 return 1;
650                 }
651                 /*
652                  * We don't check reserved bits in nonpae mode, because
653                  * this isn't enforced, and VMware depends on this.
654                  */
655         }
656
657         /*
658          * Does the new cr3 value map to physical memory? (Note, we
659          * catch an invalid cr3 even in real-mode, because it would
660          * cause trouble later on when we turn on paging anyway.)
661          *
662          * A real CPU would silently accept an invalid cr3 and would
663          * attempt to use it - with largely undefined (and often hard
664          * to debug) behavior on the guest side.
665          */
666         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
667                 return 1;
668         vcpu->arch.cr3 = cr3;
669         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
670         vcpu->arch.mmu.new_cr3(vcpu);
671         return 0;
672 }
673 EXPORT_SYMBOL_GPL(kvm_set_cr3);
674
675 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
676 {
677         if (cr8 & CR8_RESERVED_BITS)
678                 return 1;
679         if (irqchip_in_kernel(vcpu->kvm))
680                 kvm_lapic_set_tpr(vcpu, cr8);
681         else
682                 vcpu->arch.cr8 = cr8;
683         return 0;
684 }
685 EXPORT_SYMBOL_GPL(kvm_set_cr8);
686
687 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
688 {
689         if (irqchip_in_kernel(vcpu->kvm))
690                 return kvm_lapic_get_cr8(vcpu);
691         else
692                 return vcpu->arch.cr8;
693 }
694 EXPORT_SYMBOL_GPL(kvm_get_cr8);
695
696 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
697 {
698         switch (dr) {
699         case 0 ... 3:
700                 vcpu->arch.db[dr] = val;
701                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
702                         vcpu->arch.eff_db[dr] = val;
703                 break;
704         case 4:
705                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
706                         return 1; /* #UD */
707                 /* fall through */
708         case 6:
709                 if (val & 0xffffffff00000000ULL)
710                         return -1; /* #GP */
711                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
712                 break;
713         case 5:
714                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
715                         return 1; /* #UD */
716                 /* fall through */
717         default: /* 7 */
718                 if (val & 0xffffffff00000000ULL)
719                         return -1; /* #GP */
720                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
721                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
722                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
723                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
724                 }
725                 break;
726         }
727
728         return 0;
729 }
730
731 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
732 {
733         int res;
734
735         res = __kvm_set_dr(vcpu, dr, val);
736         if (res > 0)
737                 kvm_queue_exception(vcpu, UD_VECTOR);
738         else if (res < 0)
739                 kvm_inject_gp(vcpu, 0);
740
741         return res;
742 }
743 EXPORT_SYMBOL_GPL(kvm_set_dr);
744
745 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
746 {
747         switch (dr) {
748         case 0 ... 3:
749                 *val = vcpu->arch.db[dr];
750                 break;
751         case 4:
752                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
753                         return 1;
754                 /* fall through */
755         case 6:
756                 *val = vcpu->arch.dr6;
757                 break;
758         case 5:
759                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
760                         return 1;
761                 /* fall through */
762         default: /* 7 */
763                 *val = vcpu->arch.dr7;
764                 break;
765         }
766
767         return 0;
768 }
769
770 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
771 {
772         if (_kvm_get_dr(vcpu, dr, val)) {
773                 kvm_queue_exception(vcpu, UD_VECTOR);
774                 return 1;
775         }
776         return 0;
777 }
778 EXPORT_SYMBOL_GPL(kvm_get_dr);
779
780 /*
781  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
782  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
783  *
784  * This list is modified at module load time to reflect the
785  * capabilities of the host cpu. This capabilities test skips MSRs that are
786  * kvm-specific. Those are put in the beginning of the list.
787  */
788
789 #define KVM_SAVE_MSRS_BEGIN     8
790 static u32 msrs_to_save[] = {
791         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
792         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
793         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
794         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
795         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
796         MSR_STAR,
797 #ifdef CONFIG_X86_64
798         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
799 #endif
800         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
801 };
802
803 static unsigned num_msrs_to_save;
804
805 static u32 emulated_msrs[] = {
806         MSR_IA32_MISC_ENABLE,
807         MSR_IA32_MCG_STATUS,
808         MSR_IA32_MCG_CTL,
809 };
810
811 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
812 {
813         u64 old_efer = vcpu->arch.efer;
814
815         if (efer & efer_reserved_bits)
816                 return 1;
817
818         if (is_paging(vcpu)
819             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
820                 return 1;
821
822         if (efer & EFER_FFXSR) {
823                 struct kvm_cpuid_entry2 *feat;
824
825                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
826                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
827                         return 1;
828         }
829
830         if (efer & EFER_SVME) {
831                 struct kvm_cpuid_entry2 *feat;
832
833                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
834                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
835                         return 1;
836         }
837
838         efer &= ~EFER_LMA;
839         efer |= vcpu->arch.efer & EFER_LMA;
840
841         kvm_x86_ops->set_efer(vcpu, efer);
842
843         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
844
845         /* Update reserved bits */
846         if ((efer ^ old_efer) & EFER_NX)
847                 kvm_mmu_reset_context(vcpu);
848
849         return 0;
850 }
851
852 void kvm_enable_efer_bits(u64 mask)
853 {
854        efer_reserved_bits &= ~mask;
855 }
856 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
857
858
859 /*
860  * Writes msr value into into the appropriate "register".
861  * Returns 0 on success, non-0 otherwise.
862  * Assumes vcpu_load() was already called.
863  */
864 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
865 {
866         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
867 }
868
869 /*
870  * Adapt set_msr() to msr_io()'s calling convention
871  */
872 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
873 {
874         return kvm_set_msr(vcpu, index, *data);
875 }
876
877 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
878 {
879         int version;
880         int r;
881         struct pvclock_wall_clock wc;
882         struct timespec boot;
883
884         if (!wall_clock)
885                 return;
886
887         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
888         if (r)
889                 return;
890
891         if (version & 1)
892                 ++version;  /* first time write, random junk */
893
894         ++version;
895
896         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
897
898         /*
899          * The guest calculates current wall clock time by adding
900          * system time (updated by kvm_guest_time_update below) to the
901          * wall clock specified here.  guest system time equals host
902          * system time for us, thus we must fill in host boot time here.
903          */
904         getboottime(&boot);
905
906         wc.sec = boot.tv_sec;
907         wc.nsec = boot.tv_nsec;
908         wc.version = version;
909
910         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
911
912         version++;
913         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
914 }
915
916 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
917 {
918         uint32_t quotient, remainder;
919
920         /* Don't try to replace with do_div(), this one calculates
921          * "(dividend << 32) / divisor" */
922         __asm__ ( "divl %4"
923                   : "=a" (quotient), "=d" (remainder)
924                   : "0" (0), "1" (dividend), "r" (divisor) );
925         return quotient;
926 }
927
928 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
929                                s8 *pshift, u32 *pmultiplier)
930 {
931         uint64_t scaled64;
932         int32_t  shift = 0;
933         uint64_t tps64;
934         uint32_t tps32;
935
936         tps64 = base_khz * 1000LL;
937         scaled64 = scaled_khz * 1000LL;
938         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
939                 tps64 >>= 1;
940                 shift--;
941         }
942
943         tps32 = (uint32_t)tps64;
944         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
945                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
946                         scaled64 >>= 1;
947                 else
948                         tps32 <<= 1;
949                 shift++;
950         }
951
952         *pshift = shift;
953         *pmultiplier = div_frac(scaled64, tps32);
954
955         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
956                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
957 }
958
959 static inline u64 get_kernel_ns(void)
960 {
961         struct timespec ts;
962
963         WARN_ON(preemptible());
964         ktime_get_ts(&ts);
965         monotonic_to_bootbased(&ts);
966         return timespec_to_ns(&ts);
967 }
968
969 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
970 unsigned long max_tsc_khz;
971
972 static inline int kvm_tsc_changes_freq(void)
973 {
974         int cpu = get_cpu();
975         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
976                   cpufreq_quick_get(cpu) != 0;
977         put_cpu();
978         return ret;
979 }
980
981 static u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
982 {
983         if (vcpu->arch.virtual_tsc_khz)
984                 return vcpu->arch.virtual_tsc_khz;
985         else
986                 return __this_cpu_read(cpu_tsc_khz);
987 }
988
989 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
990 {
991         u64 ret;
992
993         WARN_ON(preemptible());
994         if (kvm_tsc_changes_freq())
995                 printk_once(KERN_WARNING
996                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
997         ret = nsec * vcpu_tsc_khz(vcpu);
998         do_div(ret, USEC_PER_SEC);
999         return ret;
1000 }
1001
1002 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1003 {
1004         /* Compute a scale to convert nanoseconds in TSC cycles */
1005         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1006                            &vcpu->arch.tsc_catchup_shift,
1007                            &vcpu->arch.tsc_catchup_mult);
1008 }
1009
1010 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1011 {
1012         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1013                                       vcpu->arch.tsc_catchup_mult,
1014                                       vcpu->arch.tsc_catchup_shift);
1015         tsc += vcpu->arch.last_tsc_write;
1016         return tsc;
1017 }
1018
1019 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1020 {
1021         struct kvm *kvm = vcpu->kvm;
1022         u64 offset, ns, elapsed;
1023         unsigned long flags;
1024         s64 sdiff;
1025
1026         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1027         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1028         ns = get_kernel_ns();
1029         elapsed = ns - kvm->arch.last_tsc_nsec;
1030         sdiff = data - kvm->arch.last_tsc_write;
1031         if (sdiff < 0)
1032                 sdiff = -sdiff;
1033
1034         /*
1035          * Special case: close write to TSC within 5 seconds of
1036          * another CPU is interpreted as an attempt to synchronize
1037          * The 5 seconds is to accommodate host load / swapping as
1038          * well as any reset of TSC during the boot process.
1039          *
1040          * In that case, for a reliable TSC, we can match TSC offsets,
1041          * or make a best guest using elapsed value.
1042          */
1043         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1044             elapsed < 5ULL * NSEC_PER_SEC) {
1045                 if (!check_tsc_unstable()) {
1046                         offset = kvm->arch.last_tsc_offset;
1047                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1048                 } else {
1049                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1050                         offset += delta;
1051                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1052                 }
1053                 ns = kvm->arch.last_tsc_nsec;
1054         }
1055         kvm->arch.last_tsc_nsec = ns;
1056         kvm->arch.last_tsc_write = data;
1057         kvm->arch.last_tsc_offset = offset;
1058         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1059         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1060
1061         /* Reset of TSC must disable overshoot protection below */
1062         vcpu->arch.hv_clock.tsc_timestamp = 0;
1063         vcpu->arch.last_tsc_write = data;
1064         vcpu->arch.last_tsc_nsec = ns;
1065 }
1066 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1067
1068 static int kvm_guest_time_update(struct kvm_vcpu *v)
1069 {
1070         unsigned long flags;
1071         struct kvm_vcpu_arch *vcpu = &v->arch;
1072         void *shared_kaddr;
1073         unsigned long this_tsc_khz;
1074         s64 kernel_ns, max_kernel_ns;
1075         u64 tsc_timestamp;
1076
1077         /* Keep irq disabled to prevent changes to the clock */
1078         local_irq_save(flags);
1079         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1080         kernel_ns = get_kernel_ns();
1081         this_tsc_khz = vcpu_tsc_khz(v);
1082         if (unlikely(this_tsc_khz == 0)) {
1083                 local_irq_restore(flags);
1084                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1085                 return 1;
1086         }
1087
1088         /*
1089          * We may have to catch up the TSC to match elapsed wall clock
1090          * time for two reasons, even if kvmclock is used.
1091          *   1) CPU could have been running below the maximum TSC rate
1092          *   2) Broken TSC compensation resets the base at each VCPU
1093          *      entry to avoid unknown leaps of TSC even when running
1094          *      again on the same CPU.  This may cause apparent elapsed
1095          *      time to disappear, and the guest to stand still or run
1096          *      very slowly.
1097          */
1098         if (vcpu->tsc_catchup) {
1099                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1100                 if (tsc > tsc_timestamp) {
1101                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1102                         tsc_timestamp = tsc;
1103                 }
1104         }
1105
1106         local_irq_restore(flags);
1107
1108         if (!vcpu->time_page)
1109                 return 0;
1110
1111         /*
1112          * Time as measured by the TSC may go backwards when resetting the base
1113          * tsc_timestamp.  The reason for this is that the TSC resolution is
1114          * higher than the resolution of the other clock scales.  Thus, many
1115          * possible measurments of the TSC correspond to one measurement of any
1116          * other clock, and so a spread of values is possible.  This is not a
1117          * problem for the computation of the nanosecond clock; with TSC rates
1118          * around 1GHZ, there can only be a few cycles which correspond to one
1119          * nanosecond value, and any path through this code will inevitably
1120          * take longer than that.  However, with the kernel_ns value itself,
1121          * the precision may be much lower, down to HZ granularity.  If the
1122          * first sampling of TSC against kernel_ns ends in the low part of the
1123          * range, and the second in the high end of the range, we can get:
1124          *
1125          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1126          *
1127          * As the sampling errors potentially range in the thousands of cycles,
1128          * it is possible such a time value has already been observed by the
1129          * guest.  To protect against this, we must compute the system time as
1130          * observed by the guest and ensure the new system time is greater.
1131          */
1132         max_kernel_ns = 0;
1133         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1134                 max_kernel_ns = vcpu->last_guest_tsc -
1135                                 vcpu->hv_clock.tsc_timestamp;
1136                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1137                                     vcpu->hv_clock.tsc_to_system_mul,
1138                                     vcpu->hv_clock.tsc_shift);
1139                 max_kernel_ns += vcpu->last_kernel_ns;
1140         }
1141
1142         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1143                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1144                                    &vcpu->hv_clock.tsc_shift,
1145                                    &vcpu->hv_clock.tsc_to_system_mul);
1146                 vcpu->hw_tsc_khz = this_tsc_khz;
1147         }
1148
1149         if (max_kernel_ns > kernel_ns)
1150                 kernel_ns = max_kernel_ns;
1151
1152         /* With all the info we got, fill in the values */
1153         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1154         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1155         vcpu->last_kernel_ns = kernel_ns;
1156         vcpu->last_guest_tsc = tsc_timestamp;
1157         vcpu->hv_clock.flags = 0;
1158
1159         /*
1160          * The interface expects us to write an even number signaling that the
1161          * update is finished. Since the guest won't see the intermediate
1162          * state, we just increase by 2 at the end.
1163          */
1164         vcpu->hv_clock.version += 2;
1165
1166         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1167
1168         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1169                sizeof(vcpu->hv_clock));
1170
1171         kunmap_atomic(shared_kaddr, KM_USER0);
1172
1173         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1174         return 0;
1175 }
1176
1177 static bool msr_mtrr_valid(unsigned msr)
1178 {
1179         switch (msr) {
1180         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1181         case MSR_MTRRfix64K_00000:
1182         case MSR_MTRRfix16K_80000:
1183         case MSR_MTRRfix16K_A0000:
1184         case MSR_MTRRfix4K_C0000:
1185         case MSR_MTRRfix4K_C8000:
1186         case MSR_MTRRfix4K_D0000:
1187         case MSR_MTRRfix4K_D8000:
1188         case MSR_MTRRfix4K_E0000:
1189         case MSR_MTRRfix4K_E8000:
1190         case MSR_MTRRfix4K_F0000:
1191         case MSR_MTRRfix4K_F8000:
1192         case MSR_MTRRdefType:
1193         case MSR_IA32_CR_PAT:
1194                 return true;
1195         case 0x2f8:
1196                 return true;
1197         }
1198         return false;
1199 }
1200
1201 static bool valid_pat_type(unsigned t)
1202 {
1203         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1204 }
1205
1206 static bool valid_mtrr_type(unsigned t)
1207 {
1208         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1209 }
1210
1211 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1212 {
1213         int i;
1214
1215         if (!msr_mtrr_valid(msr))
1216                 return false;
1217
1218         if (msr == MSR_IA32_CR_PAT) {
1219                 for (i = 0; i < 8; i++)
1220                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1221                                 return false;
1222                 return true;
1223         } else if (msr == MSR_MTRRdefType) {
1224                 if (data & ~0xcff)
1225                         return false;
1226                 return valid_mtrr_type(data & 0xff);
1227         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1228                 for (i = 0; i < 8 ; i++)
1229                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1230                                 return false;
1231                 return true;
1232         }
1233
1234         /* variable MTRRs */
1235         return valid_mtrr_type(data & 0xff);
1236 }
1237
1238 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1239 {
1240         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1241
1242         if (!mtrr_valid(vcpu, msr, data))
1243                 return 1;
1244
1245         if (msr == MSR_MTRRdefType) {
1246                 vcpu->arch.mtrr_state.def_type = data;
1247                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1248         } else if (msr == MSR_MTRRfix64K_00000)
1249                 p[0] = data;
1250         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1251                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1252         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1253                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1254         else if (msr == MSR_IA32_CR_PAT)
1255                 vcpu->arch.pat = data;
1256         else {  /* Variable MTRRs */
1257                 int idx, is_mtrr_mask;
1258                 u64 *pt;
1259
1260                 idx = (msr - 0x200) / 2;
1261                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1262                 if (!is_mtrr_mask)
1263                         pt =
1264                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1265                 else
1266                         pt =
1267                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1268                 *pt = data;
1269         }
1270
1271         kvm_mmu_reset_context(vcpu);
1272         return 0;
1273 }
1274
1275 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1276 {
1277         u64 mcg_cap = vcpu->arch.mcg_cap;
1278         unsigned bank_num = mcg_cap & 0xff;
1279
1280         switch (msr) {
1281         case MSR_IA32_MCG_STATUS:
1282                 vcpu->arch.mcg_status = data;
1283                 break;
1284         case MSR_IA32_MCG_CTL:
1285                 if (!(mcg_cap & MCG_CTL_P))
1286                         return 1;
1287                 if (data != 0 && data != ~(u64)0)
1288                         return -1;
1289                 vcpu->arch.mcg_ctl = data;
1290                 break;
1291         default:
1292                 if (msr >= MSR_IA32_MC0_CTL &&
1293                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1294                         u32 offset = msr - MSR_IA32_MC0_CTL;
1295                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1296                          * some Linux kernels though clear bit 10 in bank 4 to
1297                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1298                          * this to avoid an uncatched #GP in the guest
1299                          */
1300                         if ((offset & 0x3) == 0 &&
1301                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1302                                 return -1;
1303                         vcpu->arch.mce_banks[offset] = data;
1304                         break;
1305                 }
1306                 return 1;
1307         }
1308         return 0;
1309 }
1310
1311 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1312 {
1313         struct kvm *kvm = vcpu->kvm;
1314         int lm = is_long_mode(vcpu);
1315         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1316                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1317         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1318                 : kvm->arch.xen_hvm_config.blob_size_32;
1319         u32 page_num = data & ~PAGE_MASK;
1320         u64 page_addr = data & PAGE_MASK;
1321         u8 *page;
1322         int r;
1323
1324         r = -E2BIG;
1325         if (page_num >= blob_size)
1326                 goto out;
1327         r = -ENOMEM;
1328         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1329         if (!page)
1330                 goto out;
1331         r = -EFAULT;
1332         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1333                 goto out_free;
1334         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1335                 goto out_free;
1336         r = 0;
1337 out_free:
1338         kfree(page);
1339 out:
1340         return r;
1341 }
1342
1343 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1344 {
1345         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1346 }
1347
1348 static bool kvm_hv_msr_partition_wide(u32 msr)
1349 {
1350         bool r = false;
1351         switch (msr) {
1352         case HV_X64_MSR_GUEST_OS_ID:
1353         case HV_X64_MSR_HYPERCALL:
1354                 r = true;
1355                 break;
1356         }
1357
1358         return r;
1359 }
1360
1361 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1362 {
1363         struct kvm *kvm = vcpu->kvm;
1364
1365         switch (msr) {
1366         case HV_X64_MSR_GUEST_OS_ID:
1367                 kvm->arch.hv_guest_os_id = data;
1368                 /* setting guest os id to zero disables hypercall page */
1369                 if (!kvm->arch.hv_guest_os_id)
1370                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1371                 break;
1372         case HV_X64_MSR_HYPERCALL: {
1373                 u64 gfn;
1374                 unsigned long addr;
1375                 u8 instructions[4];
1376
1377                 /* if guest os id is not set hypercall should remain disabled */
1378                 if (!kvm->arch.hv_guest_os_id)
1379                         break;
1380                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1381                         kvm->arch.hv_hypercall = data;
1382                         break;
1383                 }
1384                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1385                 addr = gfn_to_hva(kvm, gfn);
1386                 if (kvm_is_error_hva(addr))
1387                         return 1;
1388                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1389                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1390                 if (__copy_to_user((void __user *)addr, instructions, 4))
1391                         return 1;
1392                 kvm->arch.hv_hypercall = data;
1393                 break;
1394         }
1395         default:
1396                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1397                           "data 0x%llx\n", msr, data);
1398                 return 1;
1399         }
1400         return 0;
1401 }
1402
1403 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1404 {
1405         switch (msr) {
1406         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1407                 unsigned long addr;
1408
1409                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1410                         vcpu->arch.hv_vapic = data;
1411                         break;
1412                 }
1413                 addr = gfn_to_hva(vcpu->kvm, data >>
1414                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1415                 if (kvm_is_error_hva(addr))
1416                         return 1;
1417                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1418                         return 1;
1419                 vcpu->arch.hv_vapic = data;
1420                 break;
1421         }
1422         case HV_X64_MSR_EOI:
1423                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1424         case HV_X64_MSR_ICR:
1425                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1426         case HV_X64_MSR_TPR:
1427                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1428         default:
1429                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1430                           "data 0x%llx\n", msr, data);
1431                 return 1;
1432         }
1433
1434         return 0;
1435 }
1436
1437 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1438 {
1439         gpa_t gpa = data & ~0x3f;
1440
1441         /* Bits 2:5 are resrved, Should be zero */
1442         if (data & 0x3c)
1443                 return 1;
1444
1445         vcpu->arch.apf.msr_val = data;
1446
1447         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1448                 kvm_clear_async_pf_completion_queue(vcpu);
1449                 kvm_async_pf_hash_reset(vcpu);
1450                 return 0;
1451         }
1452
1453         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1454                 return 1;
1455
1456         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1457         kvm_async_pf_wakeup_all(vcpu);
1458         return 0;
1459 }
1460
1461 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1462 {
1463         if (vcpu->arch.time_page) {
1464                 kvm_release_page_dirty(vcpu->arch.time_page);
1465                 vcpu->arch.time_page = NULL;
1466         }
1467 }
1468
1469 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1470 {
1471         switch (msr) {
1472         case MSR_EFER:
1473                 return set_efer(vcpu, data);
1474         case MSR_K7_HWCR:
1475                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1476                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1477                 if (data != 0) {
1478                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1479                                 data);
1480                         return 1;
1481                 }
1482                 break;
1483         case MSR_FAM10H_MMIO_CONF_BASE:
1484                 if (data != 0) {
1485                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1486                                 "0x%llx\n", data);
1487                         return 1;
1488                 }
1489                 break;
1490         case MSR_AMD64_NB_CFG:
1491                 break;
1492         case MSR_IA32_DEBUGCTLMSR:
1493                 if (!data) {
1494                         /* We support the non-activated case already */
1495                         break;
1496                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1497                         /* Values other than LBR and BTF are vendor-specific,
1498                            thus reserved and should throw a #GP */
1499                         return 1;
1500                 }
1501                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1502                         __func__, data);
1503                 break;
1504         case MSR_IA32_UCODE_REV:
1505         case MSR_IA32_UCODE_WRITE:
1506         case MSR_VM_HSAVE_PA:
1507         case MSR_AMD64_PATCH_LOADER:
1508                 break;
1509         case 0x200 ... 0x2ff:
1510                 return set_msr_mtrr(vcpu, msr, data);
1511         case MSR_IA32_APICBASE:
1512                 kvm_set_apic_base(vcpu, data);
1513                 break;
1514         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1515                 return kvm_x2apic_msr_write(vcpu, msr, data);
1516         case MSR_IA32_MISC_ENABLE:
1517                 vcpu->arch.ia32_misc_enable_msr = data;
1518                 break;
1519         case MSR_KVM_WALL_CLOCK_NEW:
1520         case MSR_KVM_WALL_CLOCK:
1521                 vcpu->kvm->arch.wall_clock = data;
1522                 kvm_write_wall_clock(vcpu->kvm, data);
1523                 break;
1524         case MSR_KVM_SYSTEM_TIME_NEW:
1525         case MSR_KVM_SYSTEM_TIME: {
1526                 kvmclock_reset(vcpu);
1527
1528                 vcpu->arch.time = data;
1529                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1530
1531                 /* we verify if the enable bit is set... */
1532                 if (!(data & 1))
1533                         break;
1534
1535                 /* ...but clean it before doing the actual write */
1536                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1537
1538                 vcpu->arch.time_page =
1539                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1540
1541                 if (is_error_page(vcpu->arch.time_page)) {
1542                         kvm_release_page_clean(vcpu->arch.time_page);
1543                         vcpu->arch.time_page = NULL;
1544                 }
1545                 break;
1546         }
1547         case MSR_KVM_ASYNC_PF_EN:
1548                 if (kvm_pv_enable_async_pf(vcpu, data))
1549                         return 1;
1550                 break;
1551         case MSR_IA32_MCG_CTL:
1552         case MSR_IA32_MCG_STATUS:
1553         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1554                 return set_msr_mce(vcpu, msr, data);
1555
1556         /* Performance counters are not protected by a CPUID bit,
1557          * so we should check all of them in the generic path for the sake of
1558          * cross vendor migration.
1559          * Writing a zero into the event select MSRs disables them,
1560          * which we perfectly emulate ;-). Any other value should be at least
1561          * reported, some guests depend on them.
1562          */
1563         case MSR_P6_EVNTSEL0:
1564         case MSR_P6_EVNTSEL1:
1565         case MSR_K7_EVNTSEL0:
1566         case MSR_K7_EVNTSEL1:
1567         case MSR_K7_EVNTSEL2:
1568         case MSR_K7_EVNTSEL3:
1569                 if (data != 0)
1570                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1571                                 "0x%x data 0x%llx\n", msr, data);
1572                 break;
1573         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1574          * so we ignore writes to make it happy.
1575          */
1576         case MSR_P6_PERFCTR0:
1577         case MSR_P6_PERFCTR1:
1578         case MSR_K7_PERFCTR0:
1579         case MSR_K7_PERFCTR1:
1580         case MSR_K7_PERFCTR2:
1581         case MSR_K7_PERFCTR3:
1582                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1583                         "0x%x data 0x%llx\n", msr, data);
1584                 break;
1585         case MSR_K7_CLK_CTL:
1586                 /*
1587                  * Ignore all writes to this no longer documented MSR.
1588                  * Writes are only relevant for old K7 processors,
1589                  * all pre-dating SVM, but a recommended workaround from
1590                  * AMD for these chips. It is possible to speicify the
1591                  * affected processor models on the command line, hence
1592                  * the need to ignore the workaround.
1593                  */
1594                 break;
1595         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1596                 if (kvm_hv_msr_partition_wide(msr)) {
1597                         int r;
1598                         mutex_lock(&vcpu->kvm->lock);
1599                         r = set_msr_hyperv_pw(vcpu, msr, data);
1600                         mutex_unlock(&vcpu->kvm->lock);
1601                         return r;
1602                 } else
1603                         return set_msr_hyperv(vcpu, msr, data);
1604                 break;
1605         case MSR_IA32_BBL_CR_CTL3:
1606                 /* Drop writes to this legacy MSR -- see rdmsr
1607                  * counterpart for further detail.
1608                  */
1609                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1610                 break;
1611         default:
1612                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1613                         return xen_hvm_config(vcpu, data);
1614                 if (!ignore_msrs) {
1615                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1616                                 msr, data);
1617                         return 1;
1618                 } else {
1619                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1620                                 msr, data);
1621                         break;
1622                 }
1623         }
1624         return 0;
1625 }
1626 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1627
1628
1629 /*
1630  * Reads an msr value (of 'msr_index') into 'pdata'.
1631  * Returns 0 on success, non-0 otherwise.
1632  * Assumes vcpu_load() was already called.
1633  */
1634 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1635 {
1636         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1637 }
1638
1639 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1640 {
1641         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1642
1643         if (!msr_mtrr_valid(msr))
1644                 return 1;
1645
1646         if (msr == MSR_MTRRdefType)
1647                 *pdata = vcpu->arch.mtrr_state.def_type +
1648                          (vcpu->arch.mtrr_state.enabled << 10);
1649         else if (msr == MSR_MTRRfix64K_00000)
1650                 *pdata = p[0];
1651         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1652                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1653         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1654                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1655         else if (msr == MSR_IA32_CR_PAT)
1656                 *pdata = vcpu->arch.pat;
1657         else {  /* Variable MTRRs */
1658                 int idx, is_mtrr_mask;
1659                 u64 *pt;
1660
1661                 idx = (msr - 0x200) / 2;
1662                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1663                 if (!is_mtrr_mask)
1664                         pt =
1665                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1666                 else
1667                         pt =
1668                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1669                 *pdata = *pt;
1670         }
1671
1672         return 0;
1673 }
1674
1675 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1676 {
1677         u64 data;
1678         u64 mcg_cap = vcpu->arch.mcg_cap;
1679         unsigned bank_num = mcg_cap & 0xff;
1680
1681         switch (msr) {
1682         case MSR_IA32_P5_MC_ADDR:
1683         case MSR_IA32_P5_MC_TYPE:
1684                 data = 0;
1685                 break;
1686         case MSR_IA32_MCG_CAP:
1687                 data = vcpu->arch.mcg_cap;
1688                 break;
1689         case MSR_IA32_MCG_CTL:
1690                 if (!(mcg_cap & MCG_CTL_P))
1691                         return 1;
1692                 data = vcpu->arch.mcg_ctl;
1693                 break;
1694         case MSR_IA32_MCG_STATUS:
1695                 data = vcpu->arch.mcg_status;
1696                 break;
1697         default:
1698                 if (msr >= MSR_IA32_MC0_CTL &&
1699                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1700                         u32 offset = msr - MSR_IA32_MC0_CTL;
1701                         data = vcpu->arch.mce_banks[offset];
1702                         break;
1703                 }
1704                 return 1;
1705         }
1706         *pdata = data;
1707         return 0;
1708 }
1709
1710 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1711 {
1712         u64 data = 0;
1713         struct kvm *kvm = vcpu->kvm;
1714
1715         switch (msr) {
1716         case HV_X64_MSR_GUEST_OS_ID:
1717                 data = kvm->arch.hv_guest_os_id;
1718                 break;
1719         case HV_X64_MSR_HYPERCALL:
1720                 data = kvm->arch.hv_hypercall;
1721                 break;
1722         default:
1723                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1724                 return 1;
1725         }
1726
1727         *pdata = data;
1728         return 0;
1729 }
1730
1731 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1732 {
1733         u64 data = 0;
1734
1735         switch (msr) {
1736         case HV_X64_MSR_VP_INDEX: {
1737                 int r;
1738                 struct kvm_vcpu *v;
1739                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1740                         if (v == vcpu)
1741                                 data = r;
1742                 break;
1743         }
1744         case HV_X64_MSR_EOI:
1745                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1746         case HV_X64_MSR_ICR:
1747                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1748         case HV_X64_MSR_TPR:
1749                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1750         default:
1751                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1752                 return 1;
1753         }
1754         *pdata = data;
1755         return 0;
1756 }
1757
1758 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1759 {
1760         u64 data;
1761
1762         switch (msr) {
1763         case MSR_IA32_PLATFORM_ID:
1764         case MSR_IA32_UCODE_REV:
1765         case MSR_IA32_EBL_CR_POWERON:
1766         case MSR_IA32_DEBUGCTLMSR:
1767         case MSR_IA32_LASTBRANCHFROMIP:
1768         case MSR_IA32_LASTBRANCHTOIP:
1769         case MSR_IA32_LASTINTFROMIP:
1770         case MSR_IA32_LASTINTTOIP:
1771         case MSR_K8_SYSCFG:
1772         case MSR_K7_HWCR:
1773         case MSR_VM_HSAVE_PA:
1774         case MSR_P6_PERFCTR0:
1775         case MSR_P6_PERFCTR1:
1776         case MSR_P6_EVNTSEL0:
1777         case MSR_P6_EVNTSEL1:
1778         case MSR_K7_EVNTSEL0:
1779         case MSR_K7_PERFCTR0:
1780         case MSR_K8_INT_PENDING_MSG:
1781         case MSR_AMD64_NB_CFG:
1782         case MSR_FAM10H_MMIO_CONF_BASE:
1783                 data = 0;
1784                 break;
1785         case MSR_MTRRcap:
1786                 data = 0x500 | KVM_NR_VAR_MTRR;
1787                 break;
1788         case 0x200 ... 0x2ff:
1789                 return get_msr_mtrr(vcpu, msr, pdata);
1790         case 0xcd: /* fsb frequency */
1791                 data = 3;
1792                 break;
1793                 /*
1794                  * MSR_EBC_FREQUENCY_ID
1795                  * Conservative value valid for even the basic CPU models.
1796                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1797                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1798                  * and 266MHz for model 3, or 4. Set Core Clock
1799                  * Frequency to System Bus Frequency Ratio to 1 (bits
1800                  * 31:24) even though these are only valid for CPU
1801                  * models > 2, however guests may end up dividing or
1802                  * multiplying by zero otherwise.
1803                  */
1804         case MSR_EBC_FREQUENCY_ID:
1805                 data = 1 << 24;
1806                 break;
1807         case MSR_IA32_APICBASE:
1808                 data = kvm_get_apic_base(vcpu);
1809                 break;
1810         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1811                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1812                 break;
1813         case MSR_IA32_MISC_ENABLE:
1814                 data = vcpu->arch.ia32_misc_enable_msr;
1815                 break;
1816         case MSR_IA32_PERF_STATUS:
1817                 /* TSC increment by tick */
1818                 data = 1000ULL;
1819                 /* CPU multiplier */
1820                 data |= (((uint64_t)4ULL) << 40);
1821                 break;
1822         case MSR_EFER:
1823                 data = vcpu->arch.efer;
1824                 break;
1825         case MSR_KVM_WALL_CLOCK:
1826         case MSR_KVM_WALL_CLOCK_NEW:
1827                 data = vcpu->kvm->arch.wall_clock;
1828                 break;
1829         case MSR_KVM_SYSTEM_TIME:
1830         case MSR_KVM_SYSTEM_TIME_NEW:
1831                 data = vcpu->arch.time;
1832                 break;
1833         case MSR_KVM_ASYNC_PF_EN:
1834                 data = vcpu->arch.apf.msr_val;
1835                 break;
1836         case MSR_IA32_P5_MC_ADDR:
1837         case MSR_IA32_P5_MC_TYPE:
1838         case MSR_IA32_MCG_CAP:
1839         case MSR_IA32_MCG_CTL:
1840         case MSR_IA32_MCG_STATUS:
1841         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1842                 return get_msr_mce(vcpu, msr, pdata);
1843         case MSR_K7_CLK_CTL:
1844                 /*
1845                  * Provide expected ramp-up count for K7. All other
1846                  * are set to zero, indicating minimum divisors for
1847                  * every field.
1848                  *
1849                  * This prevents guest kernels on AMD host with CPU
1850                  * type 6, model 8 and higher from exploding due to
1851                  * the rdmsr failing.
1852                  */
1853                 data = 0x20000000;
1854                 break;
1855         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1856                 if (kvm_hv_msr_partition_wide(msr)) {
1857                         int r;
1858                         mutex_lock(&vcpu->kvm->lock);
1859                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1860                         mutex_unlock(&vcpu->kvm->lock);
1861                         return r;
1862                 } else
1863                         return get_msr_hyperv(vcpu, msr, pdata);
1864                 break;
1865         case MSR_IA32_BBL_CR_CTL3:
1866                 /* This legacy MSR exists but isn't fully documented in current
1867                  * silicon.  It is however accessed by winxp in very narrow
1868                  * scenarios where it sets bit #19, itself documented as
1869                  * a "reserved" bit.  Best effort attempt to source coherent
1870                  * read data here should the balance of the register be
1871                  * interpreted by the guest:
1872                  *
1873                  * L2 cache control register 3: 64GB range, 256KB size,
1874                  * enabled, latency 0x1, configured
1875                  */
1876                 data = 0xbe702111;
1877                 break;
1878         default:
1879                 if (!ignore_msrs) {
1880                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1881                         return 1;
1882                 } else {
1883                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1884                         data = 0;
1885                 }
1886                 break;
1887         }
1888         *pdata = data;
1889         return 0;
1890 }
1891 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1892
1893 /*
1894  * Read or write a bunch of msrs. All parameters are kernel addresses.
1895  *
1896  * @return number of msrs set successfully.
1897  */
1898 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1899                     struct kvm_msr_entry *entries,
1900                     int (*do_msr)(struct kvm_vcpu *vcpu,
1901                                   unsigned index, u64 *data))
1902 {
1903         int i, idx;
1904
1905         idx = srcu_read_lock(&vcpu->kvm->srcu);
1906         for (i = 0; i < msrs->nmsrs; ++i)
1907                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1908                         break;
1909         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1910
1911         return i;
1912 }
1913
1914 /*
1915  * Read or write a bunch of msrs. Parameters are user addresses.
1916  *
1917  * @return number of msrs set successfully.
1918  */
1919 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1920                   int (*do_msr)(struct kvm_vcpu *vcpu,
1921                                 unsigned index, u64 *data),
1922                   int writeback)
1923 {
1924         struct kvm_msrs msrs;
1925         struct kvm_msr_entry *entries;
1926         int r, n;
1927         unsigned size;
1928
1929         r = -EFAULT;
1930         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1931                 goto out;
1932
1933         r = -E2BIG;
1934         if (msrs.nmsrs >= MAX_IO_MSRS)
1935                 goto out;
1936
1937         r = -ENOMEM;
1938         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1939         entries = kmalloc(size, GFP_KERNEL);
1940         if (!entries)
1941                 goto out;
1942
1943         r = -EFAULT;
1944         if (copy_from_user(entries, user_msrs->entries, size))
1945                 goto out_free;
1946
1947         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1948         if (r < 0)
1949                 goto out_free;
1950
1951         r = -EFAULT;
1952         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1953                 goto out_free;
1954
1955         r = n;
1956
1957 out_free:
1958         kfree(entries);
1959 out:
1960         return r;
1961 }
1962
1963 int kvm_dev_ioctl_check_extension(long ext)
1964 {
1965         int r;
1966
1967         switch (ext) {
1968         case KVM_CAP_IRQCHIP:
1969         case KVM_CAP_HLT:
1970         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1971         case KVM_CAP_SET_TSS_ADDR:
1972         case KVM_CAP_EXT_CPUID:
1973         case KVM_CAP_CLOCKSOURCE:
1974         case KVM_CAP_PIT:
1975         case KVM_CAP_NOP_IO_DELAY:
1976         case KVM_CAP_MP_STATE:
1977         case KVM_CAP_SYNC_MMU:
1978         case KVM_CAP_USER_NMI:
1979         case KVM_CAP_REINJECT_CONTROL:
1980         case KVM_CAP_IRQ_INJECT_STATUS:
1981         case KVM_CAP_ASSIGN_DEV_IRQ:
1982         case KVM_CAP_IRQFD:
1983         case KVM_CAP_IOEVENTFD:
1984         case KVM_CAP_PIT2:
1985         case KVM_CAP_PIT_STATE2:
1986         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1987         case KVM_CAP_XEN_HVM:
1988         case KVM_CAP_ADJUST_CLOCK:
1989         case KVM_CAP_VCPU_EVENTS:
1990         case KVM_CAP_HYPERV:
1991         case KVM_CAP_HYPERV_VAPIC:
1992         case KVM_CAP_HYPERV_SPIN:
1993         case KVM_CAP_PCI_SEGMENT:
1994         case KVM_CAP_DEBUGREGS:
1995         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1996         case KVM_CAP_XSAVE:
1997         case KVM_CAP_ASYNC_PF:
1998         case KVM_CAP_GET_TSC_KHZ:
1999                 r = 1;
2000                 break;
2001         case KVM_CAP_COALESCED_MMIO:
2002                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2003                 break;
2004         case KVM_CAP_VAPIC:
2005                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2006                 break;
2007         case KVM_CAP_NR_VCPUS:
2008                 r = KVM_MAX_VCPUS;
2009                 break;
2010         case KVM_CAP_NR_MEMSLOTS:
2011                 r = KVM_MEMORY_SLOTS;
2012                 break;
2013         case KVM_CAP_PV_MMU:    /* obsolete */
2014                 r = 0;
2015                 break;
2016         case KVM_CAP_IOMMU:
2017                 r = iommu_found();
2018                 break;
2019         case KVM_CAP_MCE:
2020                 r = KVM_MAX_MCE_BANKS;
2021                 break;
2022         case KVM_CAP_XCRS:
2023                 r = cpu_has_xsave;
2024                 break;
2025         case KVM_CAP_TSC_CONTROL:
2026                 r = kvm_has_tsc_control;
2027                 break;
2028         default:
2029                 r = 0;
2030                 break;
2031         }
2032         return r;
2033
2034 }
2035
2036 long kvm_arch_dev_ioctl(struct file *filp,
2037                         unsigned int ioctl, unsigned long arg)
2038 {
2039         void __user *argp = (void __user *)arg;
2040         long r;
2041
2042         switch (ioctl) {
2043         case KVM_GET_MSR_INDEX_LIST: {
2044                 struct kvm_msr_list __user *user_msr_list = argp;
2045                 struct kvm_msr_list msr_list;
2046                 unsigned n;
2047
2048                 r = -EFAULT;
2049                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2050                         goto out;
2051                 n = msr_list.nmsrs;
2052                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2053                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2054                         goto out;
2055                 r = -E2BIG;
2056                 if (n < msr_list.nmsrs)
2057                         goto out;
2058                 r = -EFAULT;
2059                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2060                                  num_msrs_to_save * sizeof(u32)))
2061                         goto out;
2062                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2063                                  &emulated_msrs,
2064                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2065                         goto out;
2066                 r = 0;
2067                 break;
2068         }
2069         case KVM_GET_SUPPORTED_CPUID: {
2070                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2071                 struct kvm_cpuid2 cpuid;
2072
2073                 r = -EFAULT;
2074                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2075                         goto out;
2076                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2077                                                       cpuid_arg->entries);
2078                 if (r)
2079                         goto out;
2080
2081                 r = -EFAULT;
2082                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2083                         goto out;
2084                 r = 0;
2085                 break;
2086         }
2087         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2088                 u64 mce_cap;
2089
2090                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2091                 r = -EFAULT;
2092                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2093                         goto out;
2094                 r = 0;
2095                 break;
2096         }
2097         default:
2098                 r = -EINVAL;
2099         }
2100 out:
2101         return r;
2102 }
2103
2104 static void wbinvd_ipi(void *garbage)
2105 {
2106         wbinvd();
2107 }
2108
2109 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2110 {
2111         return vcpu->kvm->arch.iommu_domain &&
2112                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2113 }
2114
2115 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2116 {
2117         /* Address WBINVD may be executed by guest */
2118         if (need_emulate_wbinvd(vcpu)) {
2119                 if (kvm_x86_ops->has_wbinvd_exit())
2120                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2121                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2122                         smp_call_function_single(vcpu->cpu,
2123                                         wbinvd_ipi, NULL, 1);
2124         }
2125
2126         kvm_x86_ops->vcpu_load(vcpu, cpu);
2127         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2128                 /* Make sure TSC doesn't go backwards */
2129                 s64 tsc_delta;
2130                 u64 tsc;
2131
2132                 kvm_get_msr(vcpu, MSR_IA32_TSC, &tsc);
2133                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2134                              tsc - vcpu->arch.last_guest_tsc;
2135
2136                 if (tsc_delta < 0)
2137                         mark_tsc_unstable("KVM discovered backwards TSC");
2138                 if (check_tsc_unstable()) {
2139                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2140                         vcpu->arch.tsc_catchup = 1;
2141                 }
2142                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2143                 if (vcpu->cpu != cpu)
2144                         kvm_migrate_timers(vcpu);
2145                 vcpu->cpu = cpu;
2146         }
2147 }
2148
2149 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2150 {
2151         kvm_x86_ops->vcpu_put(vcpu);
2152         kvm_put_guest_fpu(vcpu);
2153         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
2154 }
2155
2156 static int is_efer_nx(void)
2157 {
2158         unsigned long long efer = 0;
2159
2160         rdmsrl_safe(MSR_EFER, &efer);
2161         return efer & EFER_NX;
2162 }
2163
2164 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2165 {
2166         int i;
2167         struct kvm_cpuid_entry2 *e, *entry;
2168
2169         entry = NULL;
2170         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2171                 e = &vcpu->arch.cpuid_entries[i];
2172                 if (e->function == 0x80000001) {
2173                         entry = e;
2174                         break;
2175                 }
2176         }
2177         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2178                 entry->edx &= ~(1 << 20);
2179                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2180         }
2181 }
2182
2183 /* when an old userspace process fills a new kernel module */
2184 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2185                                     struct kvm_cpuid *cpuid,
2186                                     struct kvm_cpuid_entry __user *entries)
2187 {
2188         int r, i;
2189         struct kvm_cpuid_entry *cpuid_entries;
2190
2191         r = -E2BIG;
2192         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2193                 goto out;
2194         r = -ENOMEM;
2195         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2196         if (!cpuid_entries)
2197                 goto out;
2198         r = -EFAULT;
2199         if (copy_from_user(cpuid_entries, entries,
2200                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2201                 goto out_free;
2202         for (i = 0; i < cpuid->nent; i++) {
2203                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2204                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2205                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2206                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2207                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2208                 vcpu->arch.cpuid_entries[i].index = 0;
2209                 vcpu->arch.cpuid_entries[i].flags = 0;
2210                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2211                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2212                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2213         }
2214         vcpu->arch.cpuid_nent = cpuid->nent;
2215         cpuid_fix_nx_cap(vcpu);
2216         r = 0;
2217         kvm_apic_set_version(vcpu);
2218         kvm_x86_ops->cpuid_update(vcpu);
2219         update_cpuid(vcpu);
2220
2221 out_free:
2222         vfree(cpuid_entries);
2223 out:
2224         return r;
2225 }
2226
2227 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2228                                      struct kvm_cpuid2 *cpuid,
2229                                      struct kvm_cpuid_entry2 __user *entries)
2230 {
2231         int r;
2232
2233         r = -E2BIG;
2234         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2235                 goto out;
2236         r = -EFAULT;
2237         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2238                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2239                 goto out;
2240         vcpu->arch.cpuid_nent = cpuid->nent;
2241         kvm_apic_set_version(vcpu);
2242         kvm_x86_ops->cpuid_update(vcpu);
2243         update_cpuid(vcpu);
2244         return 0;
2245
2246 out:
2247         return r;
2248 }
2249
2250 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2251                                      struct kvm_cpuid2 *cpuid,
2252                                      struct kvm_cpuid_entry2 __user *entries)
2253 {
2254         int r;
2255
2256         r = -E2BIG;
2257         if (cpuid->nent < vcpu->arch.cpuid_nent)
2258                 goto out;
2259         r = -EFAULT;
2260         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2261                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2262                 goto out;
2263         return 0;
2264
2265 out:
2266         cpuid->nent = vcpu->arch.cpuid_nent;
2267         return r;
2268 }
2269
2270 static void cpuid_mask(u32 *word, int wordnum)
2271 {
2272         *word &= boot_cpu_data.x86_capability[wordnum];
2273 }
2274
2275 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2276                            u32 index)
2277 {
2278         entry->function = function;
2279         entry->index = index;
2280         cpuid_count(entry->function, entry->index,
2281                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2282         entry->flags = 0;
2283 }
2284
2285 static bool supported_xcr0_bit(unsigned bit)
2286 {
2287         u64 mask = ((u64)1 << bit);
2288
2289         return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2290 }
2291
2292 #define F(x) bit(X86_FEATURE_##x)
2293
2294 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2295                          u32 index, int *nent, int maxnent)
2296 {
2297         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2298 #ifdef CONFIG_X86_64
2299         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2300                                 ? F(GBPAGES) : 0;
2301         unsigned f_lm = F(LM);
2302 #else
2303         unsigned f_gbpages = 0;
2304         unsigned f_lm = 0;
2305 #endif
2306         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2307
2308         /* cpuid 1.edx */
2309         const u32 kvm_supported_word0_x86_features =
2310                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2311                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2312                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2313                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2314                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2315                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2316                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2317                 0 /* HTT, TM, Reserved, PBE */;
2318         /* cpuid 0x80000001.edx */
2319         const u32 kvm_supported_word1_x86_features =
2320                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2321                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2322                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2323                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2324                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2325                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2326                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2327                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2328         /* cpuid 1.ecx */
2329         const u32 kvm_supported_word4_x86_features =
2330                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2331                 0 /* DS-CPL, VMX, SMX, EST */ |
2332                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2333                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2334                 0 /* Reserved, DCA */ | F(XMM4_1) |
2335                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2336                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2337                 F(F16C);
2338         /* cpuid 0x80000001.ecx */
2339         const u32 kvm_supported_word6_x86_features =
2340                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2341                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2342                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2343                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2344
2345         /* cpuid 0xC0000001.edx */
2346         const u32 kvm_supported_word5_x86_features =
2347                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2348                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2349                 F(PMM) | F(PMM_EN);
2350
2351         /* all calls to cpuid_count() should be made on the same cpu */
2352         get_cpu();
2353         do_cpuid_1_ent(entry, function, index);
2354         ++*nent;
2355
2356         switch (function) {
2357         case 0:
2358                 entry->eax = min(entry->eax, (u32)0xd);
2359                 break;
2360         case 1:
2361                 entry->edx &= kvm_supported_word0_x86_features;
2362                 cpuid_mask(&entry->edx, 0);
2363                 entry->ecx &= kvm_supported_word4_x86_features;
2364                 cpuid_mask(&entry->ecx, 4);
2365                 /* we support x2apic emulation even if host does not support
2366                  * it since we emulate x2apic in software */
2367                 entry->ecx |= F(X2APIC);
2368                 break;
2369         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2370          * may return different values. This forces us to get_cpu() before
2371          * issuing the first command, and also to emulate this annoying behavior
2372          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2373         case 2: {
2374                 int t, times = entry->eax & 0xff;
2375
2376                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2377                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2378                 for (t = 1; t < times && *nent < maxnent; ++t) {
2379                         do_cpuid_1_ent(&entry[t], function, 0);
2380                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2381                         ++*nent;
2382                 }
2383                 break;
2384         }
2385         /* function 4 and 0xb have additional index. */
2386         case 4: {
2387                 int i, cache_type;
2388
2389                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2390                 /* read more entries until cache_type is zero */
2391                 for (i = 1; *nent < maxnent; ++i) {
2392                         cache_type = entry[i - 1].eax & 0x1f;
2393                         if (!cache_type)
2394                                 break;
2395                         do_cpuid_1_ent(&entry[i], function, i);
2396                         entry[i].flags |=
2397                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2398                         ++*nent;
2399                 }
2400                 break;
2401         }
2402         case 9:
2403                 break;
2404         case 0xb: {
2405                 int i, level_type;
2406
2407                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2408                 /* read more entries until level_type is zero */
2409                 for (i = 1; *nent < maxnent; ++i) {
2410                         level_type = entry[i - 1].ecx & 0xff00;
2411                         if (!level_type)
2412                                 break;
2413                         do_cpuid_1_ent(&entry[i], function, i);
2414                         entry[i].flags |=
2415                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2416                         ++*nent;
2417                 }
2418                 break;
2419         }
2420         case 0xd: {
2421                 int i;
2422
2423                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2424                 for (i = 1; *nent < maxnent && i < 64; ++i) {
2425                         if (entry[i].eax == 0 || !supported_xcr0_bit(i))
2426                                 continue;
2427                         do_cpuid_1_ent(&entry[i], function, i);
2428                         entry[i].flags |=
2429                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2430                         ++*nent;
2431                 }
2432                 break;
2433         }
2434         case KVM_CPUID_SIGNATURE: {
2435                 char signature[12] = "KVMKVMKVM\0\0";
2436                 u32 *sigptr = (u32 *)signature;
2437                 entry->eax = 0;
2438                 entry->ebx = sigptr[0];
2439                 entry->ecx = sigptr[1];
2440                 entry->edx = sigptr[2];
2441                 break;
2442         }
2443         case KVM_CPUID_FEATURES:
2444                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2445                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2446                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2447                              (1 << KVM_FEATURE_ASYNC_PF) |
2448                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2449                 entry->ebx = 0;
2450                 entry->ecx = 0;
2451                 entry->edx = 0;
2452                 break;
2453         case 0x80000000:
2454                 entry->eax = min(entry->eax, 0x8000001a);
2455                 break;
2456         case 0x80000001:
2457                 entry->edx &= kvm_supported_word1_x86_features;
2458                 cpuid_mask(&entry->edx, 1);
2459                 entry->ecx &= kvm_supported_word6_x86_features;
2460                 cpuid_mask(&entry->ecx, 6);
2461                 break;
2462         case 0x80000008: {
2463                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2464                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2465                 unsigned phys_as = entry->eax & 0xff;
2466
2467                 if (!g_phys_as)
2468                         g_phys_as = phys_as;
2469                 entry->eax = g_phys_as | (virt_as << 8);
2470                 entry->ebx = entry->edx = 0;
2471                 break;
2472         }
2473         case 0x80000019:
2474                 entry->ecx = entry->edx = 0;
2475                 break;
2476         case 0x8000001a:
2477                 break;
2478         case 0x8000001d:
2479                 break;
2480         /*Add support for Centaur's CPUID instruction*/
2481         case 0xC0000000:
2482                 /*Just support up to 0xC0000004 now*/
2483                 entry->eax = min(entry->eax, 0xC0000004);
2484                 break;
2485         case 0xC0000001:
2486                 entry->edx &= kvm_supported_word5_x86_features;
2487                 cpuid_mask(&entry->edx, 5);
2488                 break;
2489         case 3: /* Processor serial number */
2490         case 5: /* MONITOR/MWAIT */
2491         case 6: /* Thermal management */
2492         case 0xA: /* Architectural Performance Monitoring */
2493         case 0x80000007: /* Advanced power management */
2494         case 0xC0000002:
2495         case 0xC0000003:
2496         case 0xC0000004:
2497         default:
2498                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2499                 break;
2500         }
2501
2502         kvm_x86_ops->set_supported_cpuid(function, entry);
2503
2504         put_cpu();
2505 }
2506
2507 #undef F
2508
2509 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2510                                      struct kvm_cpuid_entry2 __user *entries)
2511 {
2512         struct kvm_cpuid_entry2 *cpuid_entries;
2513         int limit, nent = 0, r = -E2BIG;
2514         u32 func;
2515
2516         if (cpuid->nent < 1)
2517                 goto out;
2518         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2519                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2520         r = -ENOMEM;
2521         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2522         if (!cpuid_entries)
2523                 goto out;
2524
2525         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2526         limit = cpuid_entries[0].eax;
2527         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2528                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2529                              &nent, cpuid->nent);
2530         r = -E2BIG;
2531         if (nent >= cpuid->nent)
2532                 goto out_free;
2533
2534         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2535         limit = cpuid_entries[nent - 1].eax;
2536         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2537                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2538                              &nent, cpuid->nent);
2539
2540
2541
2542         r = -E2BIG;
2543         if (nent >= cpuid->nent)
2544                 goto out_free;
2545
2546         /* Add support for Centaur's CPUID instruction. */
2547         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2548                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2549                                 &nent, cpuid->nent);
2550
2551                 r = -E2BIG;
2552                 if (nent >= cpuid->nent)
2553                         goto out_free;
2554
2555                 limit = cpuid_entries[nent - 1].eax;
2556                 for (func = 0xC0000001;
2557                         func <= limit && nent < cpuid->nent; ++func)
2558                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2559                                         &nent, cpuid->nent);
2560
2561                 r = -E2BIG;
2562                 if (nent >= cpuid->nent)
2563                         goto out_free;
2564         }
2565
2566         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2567                      cpuid->nent);
2568
2569         r = -E2BIG;
2570         if (nent >= cpuid->nent)
2571                 goto out_free;
2572
2573         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2574                      cpuid->nent);
2575
2576         r = -E2BIG;
2577         if (nent >= cpuid->nent)
2578                 goto out_free;
2579
2580         r = -EFAULT;
2581         if (copy_to_user(entries, cpuid_entries,
2582                          nent * sizeof(struct kvm_cpuid_entry2)))
2583                 goto out_free;
2584         cpuid->nent = nent;
2585         r = 0;
2586
2587 out_free:
2588         vfree(cpuid_entries);
2589 out:
2590         return r;
2591 }
2592
2593 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2594                                     struct kvm_lapic_state *s)
2595 {
2596         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2597
2598         return 0;
2599 }
2600
2601 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2602                                     struct kvm_lapic_state *s)
2603 {
2604         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2605         kvm_apic_post_state_restore(vcpu);
2606         update_cr8_intercept(vcpu);
2607
2608         return 0;
2609 }
2610
2611 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2612                                     struct kvm_interrupt *irq)
2613 {
2614         if (irq->irq < 0 || irq->irq >= 256)
2615                 return -EINVAL;
2616         if (irqchip_in_kernel(vcpu->kvm))
2617                 return -ENXIO;
2618
2619         kvm_queue_interrupt(vcpu, irq->irq, false);
2620         kvm_make_request(KVM_REQ_EVENT, vcpu);
2621
2622         return 0;
2623 }
2624
2625 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2626 {
2627         kvm_inject_nmi(vcpu);
2628
2629         return 0;
2630 }
2631
2632 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2633                                            struct kvm_tpr_access_ctl *tac)
2634 {
2635         if (tac->flags)
2636                 return -EINVAL;
2637         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2638         return 0;
2639 }
2640
2641 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2642                                         u64 mcg_cap)
2643 {
2644         int r;
2645         unsigned bank_num = mcg_cap & 0xff, bank;
2646
2647         r = -EINVAL;
2648         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2649                 goto out;
2650         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2651                 goto out;
2652         r = 0;
2653         vcpu->arch.mcg_cap = mcg_cap;
2654         /* Init IA32_MCG_CTL to all 1s */
2655         if (mcg_cap & MCG_CTL_P)
2656                 vcpu->arch.mcg_ctl = ~(u64)0;
2657         /* Init IA32_MCi_CTL to all 1s */
2658         for (bank = 0; bank < bank_num; bank++)
2659                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2660 out:
2661         return r;
2662 }
2663
2664 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2665                                       struct kvm_x86_mce *mce)
2666 {
2667         u64 mcg_cap = vcpu->arch.mcg_cap;
2668         unsigned bank_num = mcg_cap & 0xff;
2669         u64 *banks = vcpu->arch.mce_banks;
2670
2671         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2672                 return -EINVAL;
2673         /*
2674          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2675          * reporting is disabled
2676          */
2677         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2678             vcpu->arch.mcg_ctl != ~(u64)0)
2679                 return 0;
2680         banks += 4 * mce->bank;
2681         /*
2682          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2683          * reporting is disabled for the bank
2684          */
2685         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2686                 return 0;
2687         if (mce->status & MCI_STATUS_UC) {
2688                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2689                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2690                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2691                         return 0;
2692                 }
2693                 if (banks[1] & MCI_STATUS_VAL)
2694                         mce->status |= MCI_STATUS_OVER;
2695                 banks[2] = mce->addr;
2696                 banks[3] = mce->misc;
2697                 vcpu->arch.mcg_status = mce->mcg_status;
2698                 banks[1] = mce->status;
2699                 kvm_queue_exception(vcpu, MC_VECTOR);
2700         } else if (!(banks[1] & MCI_STATUS_VAL)
2701                    || !(banks[1] & MCI_STATUS_UC)) {
2702                 if (banks[1] & MCI_STATUS_VAL)
2703                         mce->status |= MCI_STATUS_OVER;
2704                 banks[2] = mce->addr;
2705                 banks[3] = mce->misc;
2706                 banks[1] = mce->status;
2707         } else
2708                 banks[1] |= MCI_STATUS_OVER;
2709         return 0;
2710 }
2711
2712 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2713                                                struct kvm_vcpu_events *events)
2714 {
2715         events->exception.injected =
2716                 vcpu->arch.exception.pending &&
2717                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2718         events->exception.nr = vcpu->arch.exception.nr;
2719         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2720         events->exception.pad = 0;
2721         events->exception.error_code = vcpu->arch.exception.error_code;
2722
2723         events->interrupt.injected =
2724                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2725         events->interrupt.nr = vcpu->arch.interrupt.nr;
2726         events->interrupt.soft = 0;
2727         events->interrupt.shadow =
2728                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2729                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2730
2731         events->nmi.injected = vcpu->arch.nmi_injected;
2732         events->nmi.pending = vcpu->arch.nmi_pending;
2733         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2734         events->nmi.pad = 0;
2735
2736         events->sipi_vector = vcpu->arch.sipi_vector;
2737
2738         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2739                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2740                          | KVM_VCPUEVENT_VALID_SHADOW);
2741         memset(&events->reserved, 0, sizeof(events->reserved));
2742 }
2743
2744 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2745                                               struct kvm_vcpu_events *events)
2746 {
2747         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2748                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2749                               | KVM_VCPUEVENT_VALID_SHADOW))
2750                 return -EINVAL;
2751
2752         vcpu->arch.exception.pending = events->exception.injected;
2753         vcpu->arch.exception.nr = events->exception.nr;
2754         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2755         vcpu->arch.exception.error_code = events->exception.error_code;
2756
2757         vcpu->arch.interrupt.pending = events->interrupt.injected;
2758         vcpu->arch.interrupt.nr = events->interrupt.nr;
2759         vcpu->arch.interrupt.soft = events->interrupt.soft;
2760         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2761                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2762                                                   events->interrupt.shadow);
2763
2764         vcpu->arch.nmi_injected = events->nmi.injected;
2765         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2766                 vcpu->arch.nmi_pending = events->nmi.pending;
2767         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2768
2769         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2770                 vcpu->arch.sipi_vector = events->sipi_vector;
2771
2772         kvm_make_request(KVM_REQ_EVENT, vcpu);
2773
2774         return 0;
2775 }
2776
2777 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2778                                              struct kvm_debugregs *dbgregs)
2779 {
2780         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2781         dbgregs->dr6 = vcpu->arch.dr6;
2782         dbgregs->dr7 = vcpu->arch.dr7;
2783         dbgregs->flags = 0;
2784         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2785 }
2786
2787 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2788                                             struct kvm_debugregs *dbgregs)
2789 {
2790         if (dbgregs->flags)
2791                 return -EINVAL;
2792
2793         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2794         vcpu->arch.dr6 = dbgregs->dr6;
2795         vcpu->arch.dr7 = dbgregs->dr7;
2796
2797         return 0;
2798 }
2799
2800 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2801                                          struct kvm_xsave *guest_xsave)
2802 {
2803         if (cpu_has_xsave)
2804                 memcpy(guest_xsave->region,
2805                         &vcpu->arch.guest_fpu.state->xsave,
2806                         xstate_size);
2807         else {
2808                 memcpy(guest_xsave->region,
2809                         &vcpu->arch.guest_fpu.state->fxsave,
2810                         sizeof(struct i387_fxsave_struct));
2811                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2812                         XSTATE_FPSSE;
2813         }
2814 }
2815
2816 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2817                                         struct kvm_xsave *guest_xsave)
2818 {
2819         u64 xstate_bv =
2820                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2821
2822         if (cpu_has_xsave)
2823                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2824                         guest_xsave->region, xstate_size);
2825         else {
2826                 if (xstate_bv & ~XSTATE_FPSSE)
2827                         return -EINVAL;
2828                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2829                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2830         }
2831         return 0;
2832 }
2833
2834 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2835                                         struct kvm_xcrs *guest_xcrs)
2836 {
2837         if (!cpu_has_xsave) {
2838                 guest_xcrs->nr_xcrs = 0;
2839                 return;
2840         }
2841
2842         guest_xcrs->nr_xcrs = 1;
2843         guest_xcrs->flags = 0;
2844         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2845         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2846 }
2847
2848 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2849                                        struct kvm_xcrs *guest_xcrs)
2850 {
2851         int i, r = 0;
2852
2853         if (!cpu_has_xsave)
2854                 return -EINVAL;
2855
2856         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2857                 return -EINVAL;
2858
2859         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2860                 /* Only support XCR0 currently */
2861                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2862                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2863                                 guest_xcrs->xcrs[0].value);
2864                         break;
2865                 }
2866         if (r)
2867                 r = -EINVAL;
2868         return r;
2869 }
2870
2871 long kvm_arch_vcpu_ioctl(struct file *filp,
2872                          unsigned int ioctl, unsigned long arg)
2873 {
2874         struct kvm_vcpu *vcpu = filp->private_data;
2875         void __user *argp = (void __user *)arg;
2876         int r;
2877         union {
2878                 struct kvm_lapic_state *lapic;
2879                 struct kvm_xsave *xsave;
2880                 struct kvm_xcrs *xcrs;
2881                 void *buffer;
2882         } u;
2883
2884         u.buffer = NULL;
2885         switch (ioctl) {
2886         case KVM_GET_LAPIC: {
2887                 r = -EINVAL;
2888                 if (!vcpu->arch.apic)
2889                         goto out;
2890                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2891
2892                 r = -ENOMEM;
2893                 if (!u.lapic)
2894                         goto out;
2895                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2896                 if (r)
2897                         goto out;
2898                 r = -EFAULT;
2899                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2900                         goto out;
2901                 r = 0;
2902                 break;
2903         }
2904         case KVM_SET_LAPIC: {
2905                 r = -EINVAL;
2906                 if (!vcpu->arch.apic)
2907                         goto out;
2908                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2909                 r = -ENOMEM;
2910                 if (!u.lapic)
2911                         goto out;
2912                 r = -EFAULT;
2913                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2914                         goto out;
2915                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2916                 if (r)
2917                         goto out;
2918                 r = 0;
2919                 break;
2920         }
2921         case KVM_INTERRUPT: {
2922                 struct kvm_interrupt irq;
2923
2924                 r = -EFAULT;
2925                 if (copy_from_user(&irq, argp, sizeof irq))
2926                         goto out;
2927                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2928                 if (r)
2929                         goto out;
2930                 r = 0;
2931                 break;
2932         }
2933         case KVM_NMI: {
2934                 r = kvm_vcpu_ioctl_nmi(vcpu);
2935                 if (r)
2936                         goto out;
2937                 r = 0;
2938                 break;
2939         }
2940         case KVM_SET_CPUID: {
2941                 struct kvm_cpuid __user *cpuid_arg = argp;
2942                 struct kvm_cpuid cpuid;
2943
2944                 r = -EFAULT;
2945                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2946                         goto out;
2947                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2948                 if (r)
2949                         goto out;
2950                 break;
2951         }
2952         case KVM_SET_CPUID2: {
2953                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2954                 struct kvm_cpuid2 cpuid;
2955
2956                 r = -EFAULT;
2957                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2958                         goto out;
2959                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2960                                               cpuid_arg->entries);
2961                 if (r)
2962                         goto out;
2963                 break;
2964         }
2965         case KVM_GET_CPUID2: {
2966                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2967                 struct kvm_cpuid2 cpuid;
2968
2969                 r = -EFAULT;
2970                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2971                         goto out;
2972                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2973                                               cpuid_arg->entries);
2974                 if (r)
2975                         goto out;
2976                 r = -EFAULT;
2977                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2978                         goto out;
2979                 r = 0;
2980                 break;
2981         }
2982         case KVM_GET_MSRS:
2983                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2984                 break;
2985         case KVM_SET_MSRS:
2986                 r = msr_io(vcpu, argp, do_set_msr, 0);
2987                 break;
2988         case KVM_TPR_ACCESS_REPORTING: {
2989                 struct kvm_tpr_access_ctl tac;
2990
2991                 r = -EFAULT;
2992                 if (copy_from_user(&tac, argp, sizeof tac))
2993                         goto out;
2994                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2995                 if (r)
2996                         goto out;
2997                 r = -EFAULT;
2998                 if (copy_to_user(argp, &tac, sizeof tac))
2999                         goto out;
3000                 r = 0;
3001                 break;
3002         };
3003         case KVM_SET_VAPIC_ADDR: {
3004                 struct kvm_vapic_addr va;
3005
3006                 r = -EINVAL;
3007                 if (!irqchip_in_kernel(vcpu->kvm))
3008                         goto out;
3009                 r = -EFAULT;
3010                 if (copy_from_user(&va, argp, sizeof va))
3011                         goto out;
3012                 r = 0;
3013                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3014                 break;
3015         }
3016         case KVM_X86_SETUP_MCE: {
3017                 u64 mcg_cap;
3018
3019                 r = -EFAULT;
3020                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3021                         goto out;
3022                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3023                 break;
3024         }
3025         case KVM_X86_SET_MCE: {
3026                 struct kvm_x86_mce mce;
3027
3028                 r = -EFAULT;
3029                 if (copy_from_user(&mce, argp, sizeof mce))
3030                         goto out;
3031                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3032                 break;
3033         }
3034         case KVM_GET_VCPU_EVENTS: {
3035                 struct kvm_vcpu_events events;
3036
3037                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3038
3039                 r = -EFAULT;
3040                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3041                         break;
3042                 r = 0;
3043                 break;
3044         }
3045         case KVM_SET_VCPU_EVENTS: {
3046                 struct kvm_vcpu_events events;
3047
3048                 r = -EFAULT;
3049                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3050                         break;
3051
3052                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3053                 break;
3054         }
3055         case KVM_GET_DEBUGREGS: {
3056                 struct kvm_debugregs dbgregs;
3057
3058                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3059
3060                 r = -EFAULT;
3061                 if (copy_to_user(argp, &dbgregs,
3062                                  sizeof(struct kvm_debugregs)))
3063                         break;
3064                 r = 0;
3065                 break;
3066         }
3067         case KVM_SET_DEBUGREGS: {
3068                 struct kvm_debugregs dbgregs;
3069
3070                 r = -EFAULT;
3071                 if (copy_from_user(&dbgregs, argp,
3072                                    sizeof(struct kvm_debugregs)))
3073                         break;
3074
3075                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3076                 break;
3077         }
3078         case KVM_GET_XSAVE: {
3079                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3080                 r = -ENOMEM;
3081                 if (!u.xsave)
3082                         break;
3083
3084                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3085
3086                 r = -EFAULT;
3087                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3088                         break;
3089                 r = 0;
3090                 break;
3091         }
3092         case KVM_SET_XSAVE: {
3093                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3094                 r = -ENOMEM;
3095                 if (!u.xsave)
3096                         break;
3097
3098                 r = -EFAULT;
3099                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3100                         break;
3101
3102                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3103                 break;
3104         }
3105         case KVM_GET_XCRS: {
3106                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3107                 r = -ENOMEM;
3108                 if (!u.xcrs)
3109                         break;
3110
3111                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3112
3113                 r = -EFAULT;
3114                 if (copy_to_user(argp, u.xcrs,
3115                                  sizeof(struct kvm_xcrs)))
3116                         break;
3117                 r = 0;
3118                 break;
3119         }
3120         case KVM_SET_XCRS: {
3121                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3122                 r = -ENOMEM;
3123                 if (!u.xcrs)
3124                         break;
3125
3126                 r = -EFAULT;
3127                 if (copy_from_user(u.xcrs, argp,
3128                                    sizeof(struct kvm_xcrs)))
3129                         break;
3130
3131                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3132                 break;
3133         }
3134         case KVM_SET_TSC_KHZ: {
3135                 u32 user_tsc_khz;
3136
3137                 r = -EINVAL;
3138                 if (!kvm_has_tsc_control)
3139                         break;
3140
3141                 user_tsc_khz = (u32)arg;
3142
3143                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3144                         goto out;
3145
3146                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3147
3148                 r = 0;
3149                 goto out;
3150         }
3151         case KVM_GET_TSC_KHZ: {
3152                 r = -EIO;
3153                 if (check_tsc_unstable())
3154                         goto out;
3155
3156                 r = vcpu_tsc_khz(vcpu);
3157
3158                 goto out;
3159         }
3160         default:
3161                 r = -EINVAL;
3162         }
3163 out:
3164         kfree(u.buffer);
3165         return r;
3166 }
3167
3168 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3169 {
3170         int ret;
3171
3172         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3173                 return -1;
3174         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3175         return ret;
3176 }
3177
3178 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3179                                               u64 ident_addr)
3180 {
3181         kvm->arch.ept_identity_map_addr = ident_addr;
3182         return 0;
3183 }
3184
3185 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3186                                           u32 kvm_nr_mmu_pages)
3187 {
3188         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3189                 return -EINVAL;
3190
3191         mutex_lock(&kvm->slots_lock);
3192         spin_lock(&kvm->mmu_lock);
3193
3194         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3195         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3196
3197         spin_unlock(&kvm->mmu_lock);
3198         mutex_unlock(&kvm->slots_lock);
3199         return 0;
3200 }
3201
3202 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3203 {
3204         return kvm->arch.n_max_mmu_pages;
3205 }
3206
3207 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3208 {
3209         int r;
3210
3211         r = 0;
3212         switch (chip->chip_id) {
3213         case KVM_IRQCHIP_PIC_MASTER:
3214                 memcpy(&chip->chip.pic,
3215                         &pic_irqchip(kvm)->pics[0],
3216                         sizeof(struct kvm_pic_state));
3217                 break;
3218         case KVM_IRQCHIP_PIC_SLAVE:
3219                 memcpy(&chip->chip.pic,
3220                         &pic_irqchip(kvm)->pics[1],
3221                         sizeof(struct kvm_pic_state));
3222                 break;
3223         case KVM_IRQCHIP_IOAPIC:
3224                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3225                 break;
3226         default:
3227                 r = -EINVAL;
3228                 break;
3229         }
3230         return r;
3231 }
3232
3233 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3234 {
3235         int r;
3236
3237         r = 0;
3238         switch (chip->chip_id) {
3239         case KVM_IRQCHIP_PIC_MASTER:
3240                 spin_lock(&pic_irqchip(kvm)->lock);
3241                 memcpy(&pic_irqchip(kvm)->pics[0],
3242                         &chip->chip.pic,
3243                         sizeof(struct kvm_pic_state));
3244                 spin_unlock(&pic_irqchip(kvm)->lock);
3245                 break;
3246         case KVM_IRQCHIP_PIC_SLAVE:
3247                 spin_lock(&pic_irqchip(kvm)->lock);
3248                 memcpy(&pic_irqchip(kvm)->pics[1],
3249                         &chip->chip.pic,
3250                         sizeof(struct kvm_pic_state));
3251                 spin_unlock(&pic_irqchip(kvm)->lock);
3252                 break;
3253         case KVM_IRQCHIP_IOAPIC:
3254                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3255                 break;
3256         default:
3257                 r = -EINVAL;
3258                 break;
3259         }
3260         kvm_pic_update_irq(pic_irqchip(kvm));
3261         return r;
3262 }
3263
3264 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3265 {
3266         int r = 0;
3267
3268         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3269         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3270         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3271         return r;
3272 }
3273
3274 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3275 {
3276         int r = 0;
3277
3278         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3279         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3280         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3281         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3282         return r;
3283 }
3284
3285 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3286 {
3287         int r = 0;
3288
3289         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3290         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3291                 sizeof(ps->channels));
3292         ps->flags = kvm->arch.vpit->pit_state.flags;
3293         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3294         memset(&ps->reserved, 0, sizeof(ps->reserved));
3295         return r;
3296 }
3297
3298 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3299 {
3300         int r = 0, start = 0;
3301         u32 prev_legacy, cur_legacy;
3302         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3303         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3304         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3305         if (!prev_legacy && cur_legacy)
3306                 start = 1;
3307         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3308                sizeof(kvm->arch.vpit->pit_state.channels));
3309         kvm->arch.vpit->pit_state.flags = ps->flags;
3310         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3311         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3312         return r;
3313 }
3314
3315 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3316                                  struct kvm_reinject_control *control)
3317 {
3318         if (!kvm->arch.vpit)
3319                 return -ENXIO;
3320         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3321         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3322         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3323         return 0;
3324 }
3325
3326 /*
3327  * Get (and clear) the dirty memory log for a memory slot.
3328  */
3329 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3330                                       struct kvm_dirty_log *log)
3331 {
3332         int r, i;
3333         struct kvm_memory_slot *memslot;
3334         unsigned long n;
3335         unsigned long is_dirty = 0;
3336
3337         mutex_lock(&kvm->slots_lock);
3338
3339         r = -EINVAL;
3340         if (log->slot >= KVM_MEMORY_SLOTS)
3341                 goto out;
3342
3343         memslot = &kvm->memslots->memslots[log->slot];
3344         r = -ENOENT;
3345         if (!memslot->dirty_bitmap)
3346                 goto out;
3347
3348         n = kvm_dirty_bitmap_bytes(memslot);
3349
3350         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3351                 is_dirty = memslot->dirty_bitmap[i];
3352
3353         /* If nothing is dirty, don't bother messing with page tables. */
3354         if (is_dirty) {
3355                 struct kvm_memslots *slots, *old_slots;
3356                 unsigned long *dirty_bitmap;
3357
3358                 dirty_bitmap = memslot->dirty_bitmap_head;
3359                 if (memslot->dirty_bitmap == dirty_bitmap)
3360                         dirty_bitmap += n / sizeof(long);
3361                 memset(dirty_bitmap, 0, n);
3362
3363                 r = -ENOMEM;
3364                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3365                 if (!slots)
3366                         goto out;
3367                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3368                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3369                 slots->generation++;
3370
3371                 old_slots = kvm->memslots;
3372                 rcu_assign_pointer(kvm->memslots, slots);
3373                 synchronize_srcu_expedited(&kvm->srcu);
3374                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3375                 kfree(old_slots);
3376
3377                 spin_lock(&kvm->mmu_lock);
3378                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3379                 spin_unlock(&kvm->mmu_lock);
3380
3381                 r = -EFAULT;
3382                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3383                         goto out;
3384         } else {
3385                 r = -EFAULT;
3386                 if (clear_user(log->dirty_bitmap, n))
3387                         goto out;
3388         }
3389
3390         r = 0;
3391 out:
3392         mutex_unlock(&kvm->slots_lock);
3393         return r;
3394 }
3395
3396 long kvm_arch_vm_ioctl(struct file *filp,
3397                        unsigned int ioctl, unsigned long arg)
3398 {
3399         struct kvm *kvm = filp->private_data;
3400         void __user *argp = (void __user *)arg;
3401         int r = -ENOTTY;
3402         /*
3403          * This union makes it completely explicit to gcc-3.x
3404          * that these two variables' stack usage should be
3405          * combined, not added together.
3406          */
3407         union {
3408                 struct kvm_pit_state ps;
3409                 struct kvm_pit_state2 ps2;
3410                 struct kvm_pit_config pit_config;
3411         } u;
3412
3413         switch (ioctl) {
3414         case KVM_SET_TSS_ADDR:
3415                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3416                 if (r < 0)
3417                         goto out;
3418                 break;
3419         case KVM_SET_IDENTITY_MAP_ADDR: {
3420                 u64 ident_addr;
3421
3422                 r = -EFAULT;
3423                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3424                         goto out;
3425                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3426                 if (r < 0)
3427                         goto out;
3428                 break;
3429         }
3430         case KVM_SET_NR_MMU_PAGES:
3431                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3432                 if (r)
3433                         goto out;
3434                 break;
3435         case KVM_GET_NR_MMU_PAGES:
3436                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3437                 break;
3438         case KVM_CREATE_IRQCHIP: {
3439                 struct kvm_pic *vpic;
3440
3441                 mutex_lock(&kvm->lock);
3442                 r = -EEXIST;
3443                 if (kvm->arch.vpic)
3444                         goto create_irqchip_unlock;
3445                 r = -ENOMEM;
3446                 vpic = kvm_create_pic(kvm);
3447                 if (vpic) {
3448                         r = kvm_ioapic_init(kvm);
3449                         if (r) {
3450                                 mutex_lock(&kvm->slots_lock);
3451                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3452                                                           &vpic->dev);
3453                                 mutex_unlock(&kvm->slots_lock);
3454                                 kfree(vpic);
3455                                 goto create_irqchip_unlock;
3456                         }
3457                 } else
3458                         goto create_irqchip_unlock;
3459                 smp_wmb();
3460                 kvm->arch.vpic = vpic;
3461                 smp_wmb();
3462                 r = kvm_setup_default_irq_routing(kvm);
3463                 if (r) {
3464                         mutex_lock(&kvm->slots_lock);
3465                         mutex_lock(&kvm->irq_lock);
3466                         kvm_ioapic_destroy(kvm);
3467                         kvm_destroy_pic(kvm);
3468                         mutex_unlock(&kvm->irq_lock);
3469                         mutex_unlock(&kvm->slots_lock);
3470                 }
3471         create_irqchip_unlock:
3472                 mutex_unlock(&kvm->lock);
3473                 break;
3474         }
3475         case KVM_CREATE_PIT:
3476                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3477                 goto create_pit;
3478         case KVM_CREATE_PIT2:
3479                 r = -EFAULT;
3480                 if (copy_from_user(&u.pit_config, argp,
3481                                    sizeof(struct kvm_pit_config)))
3482                         goto out;
3483         create_pit:
3484                 mutex_lock(&kvm->slots_lock);
3485                 r = -EEXIST;
3486                 if (kvm->arch.vpit)
3487                         goto create_pit_unlock;
3488                 r = -ENOMEM;
3489                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3490                 if (kvm->arch.vpit)
3491                         r = 0;
3492         create_pit_unlock:
3493                 mutex_unlock(&kvm->slots_lock);
3494                 break;
3495         case KVM_IRQ_LINE_STATUS:
3496         case KVM_IRQ_LINE: {
3497                 struct kvm_irq_level irq_event;
3498
3499                 r = -EFAULT;
3500                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3501                         goto out;
3502                 r = -ENXIO;
3503                 if (irqchip_in_kernel(kvm)) {
3504                         __s32 status;
3505                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3506                                         irq_event.irq, irq_event.level);
3507                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3508                                 r = -EFAULT;
3509                                 irq_event.status = status;
3510                                 if (copy_to_user(argp, &irq_event,
3511                                                         sizeof irq_event))
3512                                         goto out;
3513                         }
3514                         r = 0;
3515                 }
3516                 break;
3517         }
3518         case KVM_GET_IRQCHIP: {
3519                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3520                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3521
3522                 r = -ENOMEM;
3523                 if (!chip)
3524                         goto out;
3525                 r = -EFAULT;
3526                 if (copy_from_user(chip, argp, sizeof *chip))
3527                         goto get_irqchip_out;
3528                 r = -ENXIO;
3529                 if (!irqchip_in_kernel(kvm))
3530                         goto get_irqchip_out;
3531                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3532                 if (r)
3533                         goto get_irqchip_out;
3534                 r = -EFAULT;
3535                 if (copy_to_user(argp, chip, sizeof *chip))
3536                         goto get_irqchip_out;
3537                 r = 0;
3538         get_irqchip_out:
3539                 kfree(chip);
3540                 if (r)
3541                         goto out;
3542                 break;
3543         }
3544         case KVM_SET_IRQCHIP: {
3545                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3546                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3547
3548                 r = -ENOMEM;
3549                 if (!chip)
3550                         goto out;
3551                 r = -EFAULT;
3552                 if (copy_from_user(chip, argp, sizeof *chip))
3553                         goto set_irqchip_out;
3554                 r = -ENXIO;
3555                 if (!irqchip_in_kernel(kvm))
3556                         goto set_irqchip_out;
3557                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3558                 if (r)
3559                         goto set_irqchip_out;
3560                 r = 0;
3561         set_irqchip_out:
3562                 kfree(chip);
3563                 if (r)
3564                         goto out;
3565                 break;
3566         }
3567         case KVM_GET_PIT: {
3568                 r = -EFAULT;
3569                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3570                         goto out;
3571                 r = -ENXIO;
3572                 if (!kvm->arch.vpit)
3573                         goto out;
3574                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3575                 if (r)
3576                         goto out;
3577                 r = -EFAULT;
3578                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3579                         goto out;
3580                 r = 0;
3581                 break;
3582         }
3583         case KVM_SET_PIT: {
3584                 r = -EFAULT;
3585                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3586                         goto out;
3587                 r = -ENXIO;
3588                 if (!kvm->arch.vpit)
3589                         goto out;
3590                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3591                 if (r)
3592                         goto out;
3593                 r = 0;
3594                 break;
3595         }
3596         case KVM_GET_PIT2: {
3597                 r = -ENXIO;
3598                 if (!kvm->arch.vpit)
3599                         goto out;
3600                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3601                 if (r)
3602                         goto out;
3603                 r = -EFAULT;
3604                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3605                         goto out;
3606                 r = 0;
3607                 break;
3608         }
3609         case KVM_SET_PIT2: {
3610                 r = -EFAULT;
3611                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3612                         goto out;
3613                 r = -ENXIO;
3614                 if (!kvm->arch.vpit)
3615                         goto out;
3616                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3617                 if (r)
3618                         goto out;
3619                 r = 0;
3620                 break;
3621         }
3622         case KVM_REINJECT_CONTROL: {
3623                 struct kvm_reinject_control control;
3624                 r =  -EFAULT;
3625                 if (copy_from_user(&control, argp, sizeof(control)))
3626                         goto out;
3627                 r = kvm_vm_ioctl_reinject(kvm, &control);
3628                 if (r)
3629                         goto out;
3630                 r = 0;
3631                 break;
3632         }
3633         case KVM_XEN_HVM_CONFIG: {
3634                 r = -EFAULT;
3635                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3636                                    sizeof(struct kvm_xen_hvm_config)))
3637                         goto out;
3638                 r = -EINVAL;
3639                 if (kvm->arch.xen_hvm_config.flags)
3640                         goto out;
3641                 r = 0;
3642                 break;
3643         }
3644         case KVM_SET_CLOCK: {
3645                 struct kvm_clock_data user_ns;
3646                 u64 now_ns;
3647                 s64 delta;
3648
3649                 r = -EFAULT;
3650                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3651                         goto out;
3652
3653                 r = -EINVAL;
3654                 if (user_ns.flags)
3655                         goto out;
3656
3657                 r = 0;
3658                 local_irq_disable();
3659                 now_ns = get_kernel_ns();
3660                 delta = user_ns.clock - now_ns;
3661                 local_irq_enable();
3662                 kvm->arch.kvmclock_offset = delta;
3663                 break;
3664         }
3665         case KVM_GET_CLOCK: {
3666                 struct kvm_clock_data user_ns;
3667                 u64 now_ns;
3668
3669                 local_irq_disable();
3670                 now_ns = get_kernel_ns();
3671                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3672                 local_irq_enable();
3673                 user_ns.flags = 0;
3674                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3675
3676                 r = -EFAULT;
3677                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3678                         goto out;
3679                 r = 0;
3680                 break;
3681         }
3682
3683         default:
3684                 ;
3685         }
3686 out:
3687         return r;
3688 }
3689
3690 static void kvm_init_msr_list(void)
3691 {
3692         u32 dummy[2];
3693         unsigned i, j;
3694
3695         /* skip the first msrs in the list. KVM-specific */
3696         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3697                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3698                         continue;
3699                 if (j < i)
3700                         msrs_to_save[j] = msrs_to_save[i];
3701                 j++;
3702         }
3703         num_msrs_to_save = j;
3704 }
3705
3706 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3707                            const void *v)
3708 {
3709         int handled = 0;
3710         int n;
3711
3712         do {
3713                 n = min(len, 8);
3714                 if (!(vcpu->arch.apic &&
3715                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3716                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3717                         break;
3718                 handled += n;
3719                 addr += n;
3720                 len -= n;
3721                 v += n;
3722         } while (len);
3723
3724         return handled;
3725 }
3726
3727 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3728 {
3729         int handled = 0;
3730         int n;
3731
3732         do {
3733                 n = min(len, 8);
3734                 if (!(vcpu->arch.apic &&
3735                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3736                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3737                         break;
3738                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3739                 handled += n;
3740                 addr += n;
3741                 len -= n;
3742                 v += n;
3743         } while (len);
3744
3745         return handled;
3746 }
3747
3748 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3749                         struct kvm_segment *var, int seg)
3750 {
3751         kvm_x86_ops->set_segment(vcpu, var, seg);
3752 }
3753
3754 void kvm_get_segment(struct kvm_vcpu *vcpu,
3755                      struct kvm_segment *var, int seg)
3756 {
3757         kvm_x86_ops->get_segment(vcpu, var, seg);
3758 }
3759
3760 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3761 {
3762         return gpa;
3763 }
3764
3765 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3766 {
3767         gpa_t t_gpa;
3768         struct x86_exception exception;
3769
3770         BUG_ON(!mmu_is_nested(vcpu));
3771
3772         /* NPT walks are always user-walks */
3773         access |= PFERR_USER_MASK;
3774         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3775
3776         return t_gpa;
3777 }
3778
3779 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3780                               struct x86_exception *exception)
3781 {
3782         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3783         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3784 }
3785
3786  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3787                                 struct x86_exception *exception)
3788 {
3789         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3790         access |= PFERR_FETCH_MASK;
3791         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3792 }
3793
3794 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3795                                struct x86_exception *exception)
3796 {
3797         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3798         access |= PFERR_WRITE_MASK;
3799         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3800 }
3801
3802 /* uses this to access any guest's mapped memory without checking CPL */
3803 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3804                                 struct x86_exception *exception)
3805 {
3806         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3807 }
3808
3809 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3810                                       struct kvm_vcpu *vcpu, u32 access,
3811                                       struct x86_exception *exception)
3812 {
3813         void *data = val;
3814         int r = X86EMUL_CONTINUE;
3815
3816         while (bytes) {
3817                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3818                                                             exception);
3819                 unsigned offset = addr & (PAGE_SIZE-1);
3820                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3821                 int ret;
3822
3823                 if (gpa == UNMAPPED_GVA)
3824                         return X86EMUL_PROPAGATE_FAULT;
3825                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3826                 if (ret < 0) {
3827                         r = X86EMUL_IO_NEEDED;
3828                         goto out;
3829                 }
3830
3831                 bytes -= toread;
3832                 data += toread;
3833                 addr += toread;
3834         }
3835 out:
3836         return r;
3837 }
3838
3839 /* used for instruction fetching */
3840 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3841                                 gva_t addr, void *val, unsigned int bytes,
3842                                 struct x86_exception *exception)
3843 {
3844         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3845         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3846
3847         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3848                                           access | PFERR_FETCH_MASK,
3849                                           exception);
3850 }
3851
3852 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3853                                gva_t addr, void *val, unsigned int bytes,
3854                                struct x86_exception *exception)
3855 {
3856         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3857         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3858
3859         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3860                                           exception);
3861 }
3862 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3863
3864 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3865                                       gva_t addr, void *val, unsigned int bytes,
3866                                       struct x86_exception *exception)
3867 {
3868         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3869         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3870 }
3871
3872 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3873                                        gva_t addr, void *val,
3874                                        unsigned int bytes,
3875                                        struct x86_exception *exception)
3876 {
3877         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3878         void *data = val;
3879         int r = X86EMUL_CONTINUE;
3880
3881         while (bytes) {
3882                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3883                                                              PFERR_WRITE_MASK,
3884                                                              exception);
3885                 unsigned offset = addr & (PAGE_SIZE-1);
3886                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3887                 int ret;
3888
3889                 if (gpa == UNMAPPED_GVA)
3890                         return X86EMUL_PROPAGATE_FAULT;
3891                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3892                 if (ret < 0) {
3893                         r = X86EMUL_IO_NEEDED;
3894                         goto out;
3895                 }
3896
3897                 bytes -= towrite;
3898                 data += towrite;
3899                 addr += towrite;
3900         }
3901 out:
3902         return r;
3903 }
3904 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3905
3906 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3907                                   unsigned long addr,
3908                                   void *val,
3909                                   unsigned int bytes,
3910                                   struct x86_exception *exception)
3911 {
3912         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3913         gpa_t                 gpa;
3914         int handled;
3915
3916         if (vcpu->mmio_read_completed) {
3917                 memcpy(val, vcpu->mmio_data, bytes);
3918                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3919                                vcpu->mmio_phys_addr, *(u64 *)val);
3920                 vcpu->mmio_read_completed = 0;
3921                 return X86EMUL_CONTINUE;
3922         }
3923
3924         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, exception);
3925
3926         if (gpa == UNMAPPED_GVA)
3927                 return X86EMUL_PROPAGATE_FAULT;
3928
3929         /* For APIC access vmexit */
3930         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3931                 goto mmio;
3932
3933         if (kvm_read_guest_virt(ctxt, addr, val, bytes, exception)
3934             == X86EMUL_CONTINUE)
3935                 return X86EMUL_CONTINUE;
3936
3937 mmio:
3938         /*
3939          * Is this MMIO handled locally?
3940          */
3941         handled = vcpu_mmio_read(vcpu, gpa, bytes, val);
3942
3943         if (handled == bytes)
3944                 return X86EMUL_CONTINUE;
3945
3946         gpa += handled;
3947         bytes -= handled;
3948         val += handled;
3949
3950         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3951
3952         vcpu->mmio_needed = 1;
3953         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3954         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3955         vcpu->mmio_size = bytes;
3956         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3957         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3958         vcpu->mmio_index = 0;
3959
3960         return X86EMUL_IO_NEEDED;
3961 }
3962
3963 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3964                         const void *val, int bytes)
3965 {
3966         int ret;
3967
3968         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3969         if (ret < 0)
3970                 return 0;
3971         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3972         return 1;
3973 }
3974
3975 static int emulator_write_emulated_onepage(unsigned long addr,
3976                                            const void *val,
3977                                            unsigned int bytes,
3978                                            struct x86_exception *exception,
3979                                            struct kvm_vcpu *vcpu)
3980 {
3981         gpa_t                 gpa;
3982         int handled;
3983
3984         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, exception);
3985
3986         if (gpa == UNMAPPED_GVA)
3987                 return X86EMUL_PROPAGATE_FAULT;
3988
3989         /* For APIC access vmexit */
3990         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3991                 goto mmio;
3992
3993         if (emulator_write_phys(vcpu, gpa, val, bytes))
3994                 return X86EMUL_CONTINUE;
3995
3996 mmio:
3997         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3998         /*
3999          * Is this MMIO handled locally?
4000          */
4001         handled = vcpu_mmio_write(vcpu, gpa, bytes, val);
4002         if (handled == bytes)
4003                 return X86EMUL_CONTINUE;
4004
4005         gpa += handled;
4006         bytes -= handled;
4007         val += handled;
4008
4009         vcpu->mmio_needed = 1;
4010         memcpy(vcpu->mmio_data, val, bytes);
4011         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4012         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4013         vcpu->mmio_size = bytes;
4014         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4015         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
4016         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4017         vcpu->mmio_index = 0;
4018
4019         return X86EMUL_CONTINUE;
4020 }
4021
4022 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4023                             unsigned long addr,
4024                             const void *val,
4025                             unsigned int bytes,
4026                             struct x86_exception *exception)
4027 {
4028         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4029
4030         /* Crossing a page boundary? */
4031         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4032                 int rc, now;
4033
4034                 now = -addr & ~PAGE_MASK;
4035                 rc = emulator_write_emulated_onepage(addr, val, now, exception,
4036                                                      vcpu);
4037                 if (rc != X86EMUL_CONTINUE)
4038                         return rc;
4039                 addr += now;
4040                 val += now;
4041                 bytes -= now;
4042         }
4043         return emulator_write_emulated_onepage(addr, val, bytes, exception,
4044                                                vcpu);
4045 }
4046
4047 #define CMPXCHG_TYPE(t, ptr, old, new) \
4048         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4049
4050 #ifdef CONFIG_X86_64
4051 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4052 #else
4053 #  define CMPXCHG64(ptr, old, new) \
4054         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4055 #endif
4056
4057 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4058                                      unsigned long addr,
4059                                      const void *old,
4060                                      const void *new,
4061                                      unsigned int bytes,
4062                                      struct x86_exception *exception)
4063 {
4064         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4065         gpa_t gpa;
4066         struct page *page;
4067         char *kaddr;
4068         bool exchanged;
4069
4070         /* guests cmpxchg8b have to be emulated atomically */
4071         if (bytes > 8 || (bytes & (bytes - 1)))
4072                 goto emul_write;
4073
4074         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4075
4076         if (gpa == UNMAPPED_GVA ||
4077             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4078                 goto emul_write;
4079
4080         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4081                 goto emul_write;
4082
4083         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4084         if (is_error_page(page)) {
4085                 kvm_release_page_clean(page);
4086                 goto emul_write;
4087         }
4088
4089         kaddr = kmap_atomic(page, KM_USER0);
4090         kaddr += offset_in_page(gpa);
4091         switch (bytes) {
4092         case 1:
4093                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4094                 break;
4095         case 2:
4096                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4097                 break;
4098         case 4:
4099                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4100                 break;
4101         case 8:
4102                 exchanged = CMPXCHG64(kaddr, old, new);
4103                 break;
4104         default:
4105                 BUG();
4106         }
4107         kunmap_atomic(kaddr, KM_USER0);
4108         kvm_release_page_dirty(page);
4109
4110         if (!exchanged)
4111                 return X86EMUL_CMPXCHG_FAILED;
4112
4113         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4114
4115         return X86EMUL_CONTINUE;
4116
4117 emul_write:
4118         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4119
4120         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4121 }
4122
4123 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4124 {
4125         /* TODO: String I/O for in kernel device */
4126         int r;
4127
4128         if (vcpu->arch.pio.in)
4129                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4130                                     vcpu->arch.pio.size, pd);
4131         else
4132                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4133                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4134                                      pd);
4135         return r;
4136 }
4137
4138
4139 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4140                                     int size, unsigned short port, void *val,
4141                                     unsigned int count)
4142 {
4143         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4144
4145         if (vcpu->arch.pio.count)
4146                 goto data_avail;
4147
4148         trace_kvm_pio(0, port, size, count);
4149
4150         vcpu->arch.pio.port = port;
4151         vcpu->arch.pio.in = 1;
4152         vcpu->arch.pio.count  = count;
4153         vcpu->arch.pio.size = size;
4154
4155         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4156         data_avail:
4157                 memcpy(val, vcpu->arch.pio_data, size * count);
4158                 vcpu->arch.pio.count = 0;
4159                 return 1;
4160         }
4161
4162         vcpu->run->exit_reason = KVM_EXIT_IO;
4163         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4164         vcpu->run->io.size = size;
4165         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4166         vcpu->run->io.count = count;
4167         vcpu->run->io.port = port;
4168
4169         return 0;
4170 }
4171
4172 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4173                                      int size, unsigned short port,
4174                                      const void *val, unsigned int count)
4175 {
4176         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4177
4178         trace_kvm_pio(1, port, size, count);
4179
4180         vcpu->arch.pio.port = port;
4181         vcpu->arch.pio.in = 0;
4182         vcpu->arch.pio.count = count;
4183         vcpu->arch.pio.size = size;
4184
4185         memcpy(vcpu->arch.pio_data, val, size * count);
4186
4187         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4188                 vcpu->arch.pio.count = 0;
4189                 return 1;
4190         }
4191
4192         vcpu->run->exit_reason = KVM_EXIT_IO;
4193         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4194         vcpu->run->io.size = size;
4195         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4196         vcpu->run->io.count = count;
4197         vcpu->run->io.port = port;
4198
4199         return 0;
4200 }
4201
4202 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4203 {
4204         return kvm_x86_ops->get_segment_base(vcpu, seg);
4205 }
4206
4207 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4208 {
4209         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4210 }
4211
4212 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4213 {
4214         if (!need_emulate_wbinvd(vcpu))
4215                 return X86EMUL_CONTINUE;
4216
4217         if (kvm_x86_ops->has_wbinvd_exit()) {
4218                 int cpu = get_cpu();
4219
4220                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4221                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4222                                 wbinvd_ipi, NULL, 1);
4223                 put_cpu();
4224                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4225         } else
4226                 wbinvd();
4227         return X86EMUL_CONTINUE;
4228 }
4229 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4230
4231 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4232 {
4233         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4234 }
4235
4236 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4237 {
4238         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4239 }
4240
4241 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4242 {
4243
4244         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4245 }
4246
4247 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4248 {
4249         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4250 }
4251
4252 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4253 {
4254         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4255         unsigned long value;
4256
4257         switch (cr) {
4258         case 0:
4259                 value = kvm_read_cr0(vcpu);
4260                 break;
4261         case 2:
4262                 value = vcpu->arch.cr2;
4263                 break;
4264         case 3:
4265                 value = kvm_read_cr3(vcpu);
4266                 break;
4267         case 4:
4268                 value = kvm_read_cr4(vcpu);
4269                 break;
4270         case 8:
4271                 value = kvm_get_cr8(vcpu);
4272                 break;
4273         default:
4274                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4275                 return 0;
4276         }
4277
4278         return value;
4279 }
4280
4281 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4282 {
4283         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4284         int res = 0;
4285
4286         switch (cr) {
4287         case 0:
4288                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4289                 break;
4290         case 2:
4291                 vcpu->arch.cr2 = val;
4292                 break;
4293         case 3:
4294                 res = kvm_set_cr3(vcpu, val);
4295                 break;
4296         case 4:
4297                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4298                 break;
4299         case 8:
4300                 res = kvm_set_cr8(vcpu, val);
4301                 break;
4302         default:
4303                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4304                 res = -1;
4305         }
4306
4307         return res;
4308 }
4309
4310 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4311 {
4312         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4313 }
4314
4315 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4316 {
4317         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4318 }
4319
4320 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4321 {
4322         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4323 }
4324
4325 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4326 {
4327         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4328 }
4329
4330 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4331 {
4332         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4333 }
4334
4335 static unsigned long emulator_get_cached_segment_base(
4336         struct x86_emulate_ctxt *ctxt, int seg)
4337 {
4338         return get_segment_base(emul_to_vcpu(ctxt), seg);
4339 }
4340
4341 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4342                                  struct desc_struct *desc, u32 *base3,
4343                                  int seg)
4344 {
4345         struct kvm_segment var;
4346
4347         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4348         *selector = var.selector;
4349
4350         if (var.unusable)
4351                 return false;
4352
4353         if (var.g)
4354                 var.limit >>= 12;
4355         set_desc_limit(desc, var.limit);
4356         set_desc_base(desc, (unsigned long)var.base);
4357 #ifdef CONFIG_X86_64
4358         if (base3)
4359                 *base3 = var.base >> 32;
4360 #endif
4361         desc->type = var.type;
4362         desc->s = var.s;
4363         desc->dpl = var.dpl;
4364         desc->p = var.present;
4365         desc->avl = var.avl;
4366         desc->l = var.l;
4367         desc->d = var.db;
4368         desc->g = var.g;
4369
4370         return true;
4371 }
4372
4373 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4374                                  struct desc_struct *desc, u32 base3,
4375                                  int seg)
4376 {
4377         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4378         struct kvm_segment var;
4379
4380         var.selector = selector;
4381         var.base = get_desc_base(desc);
4382 #ifdef CONFIG_X86_64
4383         var.base |= ((u64)base3) << 32;
4384 #endif
4385         var.limit = get_desc_limit(desc);
4386         if (desc->g)
4387                 var.limit = (var.limit << 12) | 0xfff;
4388         var.type = desc->type;
4389         var.present = desc->p;
4390         var.dpl = desc->dpl;
4391         var.db = desc->d;
4392         var.s = desc->s;
4393         var.l = desc->l;
4394         var.g = desc->g;
4395         var.avl = desc->avl;
4396         var.present = desc->p;
4397         var.unusable = !var.present;
4398         var.padding = 0;
4399
4400         kvm_set_segment(vcpu, &var, seg);
4401         return;
4402 }
4403
4404 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4405                             u32 msr_index, u64 *pdata)
4406 {
4407         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4408 }
4409
4410 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4411                             u32 msr_index, u64 data)
4412 {
4413         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4414 }
4415
4416 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4417 {
4418         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4419 }
4420
4421 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4422 {
4423         preempt_disable();
4424         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4425         /*
4426          * CR0.TS may reference the host fpu state, not the guest fpu state,
4427          * so it may be clear at this point.
4428          */
4429         clts();
4430 }
4431
4432 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4433 {
4434         preempt_enable();
4435 }
4436
4437 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4438                               struct x86_instruction_info *info,
4439                               enum x86_intercept_stage stage)
4440 {
4441         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4442 }
4443
4444 static struct x86_emulate_ops emulate_ops = {
4445         .read_std            = kvm_read_guest_virt_system,
4446         .write_std           = kvm_write_guest_virt_system,
4447         .fetch               = kvm_fetch_guest_virt,
4448         .read_emulated       = emulator_read_emulated,
4449         .write_emulated      = emulator_write_emulated,
4450         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4451         .invlpg              = emulator_invlpg,
4452         .pio_in_emulated     = emulator_pio_in_emulated,
4453         .pio_out_emulated    = emulator_pio_out_emulated,
4454         .get_segment         = emulator_get_segment,
4455         .set_segment         = emulator_set_segment,
4456         .get_cached_segment_base = emulator_get_cached_segment_base,
4457         .get_gdt             = emulator_get_gdt,
4458         .get_idt             = emulator_get_idt,
4459         .set_gdt             = emulator_set_gdt,
4460         .set_idt             = emulator_set_idt,
4461         .get_cr              = emulator_get_cr,
4462         .set_cr              = emulator_set_cr,
4463         .cpl                 = emulator_get_cpl,
4464         .get_dr              = emulator_get_dr,
4465         .set_dr              = emulator_set_dr,
4466         .set_msr             = emulator_set_msr,
4467         .get_msr             = emulator_get_msr,
4468         .halt                = emulator_halt,
4469         .wbinvd              = emulator_wbinvd,
4470         .fix_hypercall       = emulator_fix_hypercall,
4471         .get_fpu             = emulator_get_fpu,
4472         .put_fpu             = emulator_put_fpu,
4473         .intercept           = emulator_intercept,
4474 };
4475
4476 static void cache_all_regs(struct kvm_vcpu *vcpu)
4477 {
4478         kvm_register_read(vcpu, VCPU_REGS_RAX);
4479         kvm_register_read(vcpu, VCPU_REGS_RSP);
4480         kvm_register_read(vcpu, VCPU_REGS_RIP);
4481         vcpu->arch.regs_dirty = ~0;
4482 }
4483
4484 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4485 {
4486         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4487         /*
4488          * an sti; sti; sequence only disable interrupts for the first
4489          * instruction. So, if the last instruction, be it emulated or
4490          * not, left the system with the INT_STI flag enabled, it
4491          * means that the last instruction is an sti. We should not
4492          * leave the flag on in this case. The same goes for mov ss
4493          */
4494         if (!(int_shadow & mask))
4495                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4496 }
4497
4498 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4499 {
4500         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4501         if (ctxt->exception.vector == PF_VECTOR)
4502                 kvm_propagate_fault(vcpu, &ctxt->exception);
4503         else if (ctxt->exception.error_code_valid)
4504                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4505                                       ctxt->exception.error_code);
4506         else
4507                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4508 }
4509
4510 static void init_decode_cache(struct decode_cache *c,
4511                               const unsigned long *regs)
4512 {
4513         memset(c, 0, offsetof(struct decode_cache, regs));
4514         memcpy(c->regs, regs, sizeof(c->regs));
4515
4516         c->fetch.start = 0;
4517         c->fetch.end = 0;
4518         c->io_read.pos = 0;
4519         c->io_read.end = 0;
4520         c->mem_read.pos = 0;
4521         c->mem_read.end = 0;
4522 }
4523
4524 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4525 {
4526         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4527         struct decode_cache *c = &ctxt->decode;
4528         int cs_db, cs_l;
4529
4530         /*
4531          * TODO: fix emulate.c to use guest_read/write_register
4532          * instead of direct ->regs accesses, can save hundred cycles
4533          * on Intel for instructions that don't read/change RSP, for
4534          * for example.
4535          */
4536         cache_all_regs(vcpu);
4537
4538         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4539
4540         ctxt->eflags = kvm_get_rflags(vcpu);
4541         ctxt->eip = kvm_rip_read(vcpu);
4542         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4543                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4544                      cs_l                               ? X86EMUL_MODE_PROT64 :
4545                      cs_db                              ? X86EMUL_MODE_PROT32 :
4546                                                           X86EMUL_MODE_PROT16;
4547         ctxt->guest_mode = is_guest_mode(vcpu);
4548
4549         init_decode_cache(c, vcpu->arch.regs);
4550         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4551 }
4552
4553 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4554 {
4555         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4556         int ret;
4557
4558         init_emulate_ctxt(vcpu);
4559
4560         vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4561         vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4562         vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip +
4563                                                                  inc_eip;
4564         ret = emulate_int_real(&vcpu->arch.emulate_ctxt, irq);
4565
4566         if (ret != X86EMUL_CONTINUE)
4567                 return EMULATE_FAIL;
4568
4569         vcpu->arch.emulate_ctxt.eip = c->eip;
4570         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4571         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4572         kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4573
4574         if (irq == NMI_VECTOR)
4575                 vcpu->arch.nmi_pending = false;
4576         else
4577                 vcpu->arch.interrupt.pending = false;
4578
4579         return EMULATE_DONE;
4580 }
4581 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4582
4583 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4584 {
4585         int r = EMULATE_DONE;
4586
4587         ++vcpu->stat.insn_emulation_fail;
4588         trace_kvm_emulate_insn_failed(vcpu);
4589         if (!is_guest_mode(vcpu)) {
4590                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4591                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4592                 vcpu->run->internal.ndata = 0;
4593                 r = EMULATE_FAIL;
4594         }
4595         kvm_queue_exception(vcpu, UD_VECTOR);
4596
4597         return r;
4598 }
4599
4600 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4601 {
4602         gpa_t gpa;
4603
4604         if (tdp_enabled)
4605                 return false;
4606
4607         /*
4608          * if emulation was due to access to shadowed page table
4609          * and it failed try to unshadow page and re-entetr the
4610          * guest to let CPU execute the instruction.
4611          */
4612         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4613                 return true;
4614
4615         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4616
4617         if (gpa == UNMAPPED_GVA)
4618                 return true; /* let cpu generate fault */
4619
4620         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4621                 return true;
4622
4623         return false;
4624 }
4625
4626 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4627                             unsigned long cr2,
4628                             int emulation_type,
4629                             void *insn,
4630                             int insn_len)
4631 {
4632         int r;
4633         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4634         bool writeback = true;
4635
4636         kvm_clear_exception_queue(vcpu);
4637
4638         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4639                 init_emulate_ctxt(vcpu);
4640                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4641                 vcpu->arch.emulate_ctxt.have_exception = false;
4642                 vcpu->arch.emulate_ctxt.perm_ok = false;
4643
4644                 vcpu->arch.emulate_ctxt.only_vendor_specific_insn
4645                         = emulation_type & EMULTYPE_TRAP_UD;
4646
4647                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, insn, insn_len);
4648
4649                 trace_kvm_emulate_insn_start(vcpu);
4650                 ++vcpu->stat.insn_emulation;
4651                 if (r)  {
4652                         if (emulation_type & EMULTYPE_TRAP_UD)
4653                                 return EMULATE_FAIL;
4654                         if (reexecute_instruction(vcpu, cr2))
4655                                 return EMULATE_DONE;
4656                         if (emulation_type & EMULTYPE_SKIP)
4657                                 return EMULATE_FAIL;
4658                         return handle_emulation_failure(vcpu);
4659                 }
4660         }
4661
4662         if (emulation_type & EMULTYPE_SKIP) {
4663                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4664                 return EMULATE_DONE;
4665         }
4666
4667         /* this is needed for vmware backdoor interface to work since it
4668            changes registers values  during IO operation */
4669         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4670                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4671                 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4672         }
4673
4674 restart:
4675         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4676
4677         if (r == EMULATION_INTERCEPTED)
4678                 return EMULATE_DONE;
4679
4680         if (r == EMULATION_FAILED) {
4681                 if (reexecute_instruction(vcpu, cr2))
4682                         return EMULATE_DONE;
4683
4684                 return handle_emulation_failure(vcpu);
4685         }
4686
4687         if (vcpu->arch.emulate_ctxt.have_exception) {
4688                 inject_emulated_exception(vcpu);
4689                 r = EMULATE_DONE;
4690         } else if (vcpu->arch.pio.count) {
4691                 if (!vcpu->arch.pio.in)
4692                         vcpu->arch.pio.count = 0;
4693                 else
4694                         writeback = false;
4695                 r = EMULATE_DO_MMIO;
4696         } else if (vcpu->mmio_needed) {
4697                 if (!vcpu->mmio_is_write)
4698                         writeback = false;
4699                 r = EMULATE_DO_MMIO;
4700         } else if (r == EMULATION_RESTART)
4701                 goto restart;
4702         else
4703                 r = EMULATE_DONE;
4704
4705         if (writeback) {
4706                 toggle_interruptibility(vcpu,
4707                                 vcpu->arch.emulate_ctxt.interruptibility);
4708                 kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4709                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4710                 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4711                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4712                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4713         } else
4714                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4715
4716         return r;
4717 }
4718 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4719
4720 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4721 {
4722         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4723         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4724                                             size, port, &val, 1);
4725         /* do not return to emulator after return from userspace */
4726         vcpu->arch.pio.count = 0;
4727         return ret;
4728 }
4729 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4730
4731 static void tsc_bad(void *info)
4732 {
4733         __this_cpu_write(cpu_tsc_khz, 0);
4734 }
4735
4736 static void tsc_khz_changed(void *data)
4737 {
4738         struct cpufreq_freqs *freq = data;
4739         unsigned long khz = 0;
4740
4741         if (data)
4742                 khz = freq->new;
4743         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4744                 khz = cpufreq_quick_get(raw_smp_processor_id());
4745         if (!khz)
4746                 khz = tsc_khz;
4747         __this_cpu_write(cpu_tsc_khz, khz);
4748 }
4749
4750 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4751                                      void *data)
4752 {
4753         struct cpufreq_freqs *freq = data;
4754         struct kvm *kvm;
4755         struct kvm_vcpu *vcpu;
4756         int i, send_ipi = 0;
4757
4758         /*
4759          * We allow guests to temporarily run on slowing clocks,
4760          * provided we notify them after, or to run on accelerating
4761          * clocks, provided we notify them before.  Thus time never
4762          * goes backwards.
4763          *
4764          * However, we have a problem.  We can't atomically update
4765          * the frequency of a given CPU from this function; it is
4766          * merely a notifier, which can be called from any CPU.
4767          * Changing the TSC frequency at arbitrary points in time
4768          * requires a recomputation of local variables related to
4769          * the TSC for each VCPU.  We must flag these local variables
4770          * to be updated and be sure the update takes place with the
4771          * new frequency before any guests proceed.
4772          *
4773          * Unfortunately, the combination of hotplug CPU and frequency
4774          * change creates an intractable locking scenario; the order
4775          * of when these callouts happen is undefined with respect to
4776          * CPU hotplug, and they can race with each other.  As such,
4777          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4778          * undefined; you can actually have a CPU frequency change take
4779          * place in between the computation of X and the setting of the
4780          * variable.  To protect against this problem, all updates of
4781          * the per_cpu tsc_khz variable are done in an interrupt
4782          * protected IPI, and all callers wishing to update the value
4783          * must wait for a synchronous IPI to complete (which is trivial
4784          * if the caller is on the CPU already).  This establishes the
4785          * necessary total order on variable updates.
4786          *
4787          * Note that because a guest time update may take place
4788          * anytime after the setting of the VCPU's request bit, the
4789          * correct TSC value must be set before the request.  However,
4790          * to ensure the update actually makes it to any guest which
4791          * starts running in hardware virtualization between the set
4792          * and the acquisition of the spinlock, we must also ping the
4793          * CPU after setting the request bit.
4794          *
4795          */
4796
4797         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4798                 return 0;
4799         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4800                 return 0;
4801
4802         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4803
4804         raw_spin_lock(&kvm_lock);
4805         list_for_each_entry(kvm, &vm_list, vm_list) {
4806                 kvm_for_each_vcpu(i, vcpu, kvm) {
4807                         if (vcpu->cpu != freq->cpu)
4808                                 continue;
4809                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4810                         if (vcpu->cpu != smp_processor_id())
4811                                 send_ipi = 1;
4812                 }
4813         }
4814         raw_spin_unlock(&kvm_lock);
4815
4816         if (freq->old < freq->new && send_ipi) {
4817                 /*
4818                  * We upscale the frequency.  Must make the guest
4819                  * doesn't see old kvmclock values while running with
4820                  * the new frequency, otherwise we risk the guest sees
4821                  * time go backwards.
4822                  *
4823                  * In case we update the frequency for another cpu
4824                  * (which might be in guest context) send an interrupt
4825                  * to kick the cpu out of guest context.  Next time
4826                  * guest context is entered kvmclock will be updated,
4827                  * so the guest will not see stale values.
4828                  */
4829                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4830         }
4831         return 0;
4832 }
4833
4834 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4835         .notifier_call  = kvmclock_cpufreq_notifier
4836 };
4837
4838 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4839                                         unsigned long action, void *hcpu)
4840 {
4841         unsigned int cpu = (unsigned long)hcpu;
4842
4843         switch (action) {
4844                 case CPU_ONLINE:
4845                 case CPU_DOWN_FAILED:
4846                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4847                         break;
4848                 case CPU_DOWN_PREPARE:
4849                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4850                         break;
4851         }
4852         return NOTIFY_OK;
4853 }
4854
4855 static struct notifier_block kvmclock_cpu_notifier_block = {
4856         .notifier_call  = kvmclock_cpu_notifier,
4857         .priority = -INT_MAX
4858 };
4859
4860 static void kvm_timer_init(void)
4861 {
4862         int cpu;
4863
4864         max_tsc_khz = tsc_khz;
4865         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4866         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4867 #ifdef CONFIG_CPU_FREQ
4868                 struct cpufreq_policy policy;
4869                 memset(&policy, 0, sizeof(policy));
4870                 cpu = get_cpu();
4871                 cpufreq_get_policy(&policy, cpu);
4872                 if (policy.cpuinfo.max_freq)
4873                         max_tsc_khz = policy.cpuinfo.max_freq;
4874                 put_cpu();
4875 #endif
4876                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4877                                           CPUFREQ_TRANSITION_NOTIFIER);
4878         }
4879         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4880         for_each_online_cpu(cpu)
4881                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4882 }
4883
4884 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4885
4886 static int kvm_is_in_guest(void)
4887 {
4888         return percpu_read(current_vcpu) != NULL;
4889 }
4890
4891 static int kvm_is_user_mode(void)
4892 {
4893         int user_mode = 3;
4894
4895         if (percpu_read(current_vcpu))
4896                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4897
4898         return user_mode != 0;
4899 }
4900
4901 static unsigned long kvm_get_guest_ip(void)
4902 {
4903         unsigned long ip = 0;
4904
4905         if (percpu_read(current_vcpu))
4906                 ip = kvm_rip_read(percpu_read(current_vcpu));
4907
4908         return ip;
4909 }
4910
4911 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4912         .is_in_guest            = kvm_is_in_guest,
4913         .is_user_mode           = kvm_is_user_mode,
4914         .get_guest_ip           = kvm_get_guest_ip,
4915 };
4916
4917 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4918 {
4919         percpu_write(current_vcpu, vcpu);
4920 }
4921 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4922
4923 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4924 {
4925         percpu_write(current_vcpu, NULL);
4926 }
4927 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4928
4929 int kvm_arch_init(void *opaque)
4930 {
4931         int r;
4932         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4933
4934         if (kvm_x86_ops) {
4935                 printk(KERN_ERR "kvm: already loaded the other module\n");
4936                 r = -EEXIST;
4937                 goto out;
4938         }
4939
4940         if (!ops->cpu_has_kvm_support()) {
4941                 printk(KERN_ERR "kvm: no hardware support\n");
4942                 r = -EOPNOTSUPP;
4943                 goto out;
4944         }
4945         if (ops->disabled_by_bios()) {
4946                 printk(KERN_ERR "kvm: disabled by bios\n");
4947                 r = -EOPNOTSUPP;
4948                 goto out;
4949         }
4950
4951         r = kvm_mmu_module_init();
4952         if (r)
4953                 goto out;
4954
4955         kvm_init_msr_list();
4956
4957         kvm_x86_ops = ops;
4958         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4959         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4960                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4961
4962         kvm_timer_init();
4963
4964         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4965
4966         if (cpu_has_xsave)
4967                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4968
4969         return 0;
4970
4971 out:
4972         return r;
4973 }
4974
4975 void kvm_arch_exit(void)
4976 {
4977         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4978
4979         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4980                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4981                                             CPUFREQ_TRANSITION_NOTIFIER);
4982         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4983         kvm_x86_ops = NULL;
4984         kvm_mmu_module_exit();
4985 }
4986
4987 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4988 {
4989         ++vcpu->stat.halt_exits;
4990         if (irqchip_in_kernel(vcpu->kvm)) {
4991                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4992                 return 1;
4993         } else {
4994                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4995                 return 0;
4996         }
4997 }
4998 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4999
5000 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
5001                            unsigned long a1)
5002 {
5003         if (is_long_mode(vcpu))
5004                 return a0;
5005         else
5006                 return a0 | ((gpa_t)a1 << 32);
5007 }
5008
5009 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5010 {
5011         u64 param, ingpa, outgpa, ret;
5012         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5013         bool fast, longmode;
5014         int cs_db, cs_l;
5015
5016         /*
5017          * hypercall generates UD from non zero cpl and real mode
5018          * per HYPER-V spec
5019          */
5020         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5021                 kvm_queue_exception(vcpu, UD_VECTOR);
5022                 return 0;
5023         }
5024
5025         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5026         longmode = is_long_mode(vcpu) && cs_l == 1;
5027
5028         if (!longmode) {
5029                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5030                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5031                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5032                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5033                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5034                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5035         }
5036 #ifdef CONFIG_X86_64
5037         else {
5038                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5039                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5040                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5041         }
5042 #endif
5043
5044         code = param & 0xffff;
5045         fast = (param >> 16) & 0x1;
5046         rep_cnt = (param >> 32) & 0xfff;
5047         rep_idx = (param >> 48) & 0xfff;
5048
5049         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5050
5051         switch (code) {
5052         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5053                 kvm_vcpu_on_spin(vcpu);
5054                 break;
5055         default:
5056                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5057                 break;
5058         }
5059
5060         ret = res | (((u64)rep_done & 0xfff) << 32);
5061         if (longmode) {
5062                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5063         } else {
5064                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5065                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5066         }
5067
5068         return 1;
5069 }
5070
5071 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5072 {
5073         unsigned long nr, a0, a1, a2, a3, ret;
5074         int r = 1;
5075
5076         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5077                 return kvm_hv_hypercall(vcpu);
5078
5079         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5080         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5081         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5082         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5083         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5084
5085         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5086
5087         if (!is_long_mode(vcpu)) {
5088                 nr &= 0xFFFFFFFF;
5089                 a0 &= 0xFFFFFFFF;
5090                 a1 &= 0xFFFFFFFF;
5091                 a2 &= 0xFFFFFFFF;
5092                 a3 &= 0xFFFFFFFF;
5093         }
5094
5095         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5096                 ret = -KVM_EPERM;
5097                 goto out;
5098         }
5099
5100         switch (nr) {
5101         case KVM_HC_VAPIC_POLL_IRQ:
5102                 ret = 0;
5103                 break;
5104         case KVM_HC_MMU_OP:
5105                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5106                 break;
5107         default:
5108                 ret = -KVM_ENOSYS;
5109                 break;
5110         }
5111 out:
5112         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5113         ++vcpu->stat.hypercalls;
5114         return r;
5115 }
5116 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5117
5118 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5119 {
5120         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5121         char instruction[3];
5122         unsigned long rip = kvm_rip_read(vcpu);
5123
5124         /*
5125          * Blow out the MMU to ensure that no other VCPU has an active mapping
5126          * to ensure that the updated hypercall appears atomically across all
5127          * VCPUs.
5128          */
5129         kvm_mmu_zap_all(vcpu->kvm);
5130
5131         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5132
5133         return emulator_write_emulated(&vcpu->arch.emulate_ctxt,
5134                                        rip, instruction, 3, NULL);
5135 }
5136
5137 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5138 {
5139         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5140         int j, nent = vcpu->arch.cpuid_nent;
5141
5142         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5143         /* when no next entry is found, the current entry[i] is reselected */
5144         for (j = i + 1; ; j = (j + 1) % nent) {
5145                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5146                 if (ej->function == e->function) {
5147                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5148                         return j;
5149                 }
5150         }
5151         return 0; /* silence gcc, even though control never reaches here */
5152 }
5153
5154 /* find an entry with matching function, matching index (if needed), and that
5155  * should be read next (if it's stateful) */
5156 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5157         u32 function, u32 index)
5158 {
5159         if (e->function != function)
5160                 return 0;
5161         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5162                 return 0;
5163         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5164             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5165                 return 0;
5166         return 1;
5167 }
5168
5169 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5170                                               u32 function, u32 index)
5171 {
5172         int i;
5173         struct kvm_cpuid_entry2 *best = NULL;
5174
5175         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5176                 struct kvm_cpuid_entry2 *e;
5177
5178                 e = &vcpu->arch.cpuid_entries[i];
5179                 if (is_matching_cpuid_entry(e, function, index)) {
5180                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5181                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5182                         best = e;
5183                         break;
5184                 }
5185         }
5186         return best;
5187 }
5188 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5189
5190 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5191 {
5192         struct kvm_cpuid_entry2 *best;
5193
5194         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5195         if (!best || best->eax < 0x80000008)
5196                 goto not_found;
5197         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5198         if (best)
5199                 return best->eax & 0xff;
5200 not_found:
5201         return 36;
5202 }
5203
5204 /*
5205  * If no match is found, check whether we exceed the vCPU's limit
5206  * and return the content of the highest valid _standard_ leaf instead.
5207  * This is to satisfy the CPUID specification.
5208  */
5209 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5210                                                   u32 function, u32 index)
5211 {
5212         struct kvm_cpuid_entry2 *maxlevel;
5213
5214         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5215         if (!maxlevel || maxlevel->eax >= function)
5216                 return NULL;
5217         if (function & 0x80000000) {
5218                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5219                 if (!maxlevel)
5220                         return NULL;
5221         }
5222         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5223 }
5224
5225 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5226 {
5227         u32 function, index;
5228         struct kvm_cpuid_entry2 *best;
5229
5230         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5231         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5232         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5233         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5234         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5235         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5236         best = kvm_find_cpuid_entry(vcpu, function, index);
5237
5238         if (!best)
5239                 best = check_cpuid_limit(vcpu, function, index);
5240
5241         if (best) {
5242                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5243                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5244                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5245                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5246         }
5247         kvm_x86_ops->skip_emulated_instruction(vcpu);
5248         trace_kvm_cpuid(function,
5249                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5250                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5251                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5252                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5253 }
5254 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5255
5256 /*
5257  * Check if userspace requested an interrupt window, and that the
5258  * interrupt window is open.
5259  *
5260  * No need to exit to userspace if we already have an interrupt queued.
5261  */
5262 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5263 {
5264         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5265                 vcpu->run->request_interrupt_window &&
5266                 kvm_arch_interrupt_allowed(vcpu));
5267 }
5268
5269 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5270 {
5271         struct kvm_run *kvm_run = vcpu->run;
5272
5273         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5274         kvm_run->cr8 = kvm_get_cr8(vcpu);
5275         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5276         if (irqchip_in_kernel(vcpu->kvm))
5277                 kvm_run->ready_for_interrupt_injection = 1;
5278         else
5279                 kvm_run->ready_for_interrupt_injection =
5280                         kvm_arch_interrupt_allowed(vcpu) &&
5281                         !kvm_cpu_has_interrupt(vcpu) &&
5282                         !kvm_event_needs_reinjection(vcpu);
5283 }
5284
5285 static void vapic_enter(struct kvm_vcpu *vcpu)
5286 {
5287         struct kvm_lapic *apic = vcpu->arch.apic;
5288         struct page *page;
5289
5290         if (!apic || !apic->vapic_addr)
5291                 return;
5292
5293         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5294
5295         vcpu->arch.apic->vapic_page = page;
5296 }
5297
5298 static void vapic_exit(struct kvm_vcpu *vcpu)
5299 {
5300         struct kvm_lapic *apic = vcpu->arch.apic;
5301         int idx;
5302
5303         if (!apic || !apic->vapic_addr)
5304                 return;
5305
5306         idx = srcu_read_lock(&vcpu->kvm->srcu);
5307         kvm_release_page_dirty(apic->vapic_page);
5308         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5309         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5310 }
5311
5312 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5313 {
5314         int max_irr, tpr;
5315
5316         if (!kvm_x86_ops->update_cr8_intercept)
5317                 return;
5318
5319         if (!vcpu->arch.apic)
5320                 return;
5321
5322         if (!vcpu->arch.apic->vapic_addr)
5323                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5324         else
5325                 max_irr = -1;
5326
5327         if (max_irr != -1)
5328                 max_irr >>= 4;
5329
5330         tpr = kvm_lapic_get_cr8(vcpu);
5331
5332         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5333 }
5334
5335 static void inject_pending_event(struct kvm_vcpu *vcpu)
5336 {
5337         /* try to reinject previous events if any */
5338         if (vcpu->arch.exception.pending) {
5339                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5340                                         vcpu->arch.exception.has_error_code,
5341                                         vcpu->arch.exception.error_code);
5342                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5343                                           vcpu->arch.exception.has_error_code,
5344                                           vcpu->arch.exception.error_code,
5345                                           vcpu->arch.exception.reinject);
5346                 return;
5347         }
5348
5349         if (vcpu->arch.nmi_injected) {
5350                 kvm_x86_ops->set_nmi(vcpu);
5351                 return;
5352         }
5353
5354         if (vcpu->arch.interrupt.pending) {
5355                 kvm_x86_ops->set_irq(vcpu);
5356                 return;
5357         }
5358
5359         /* try to inject new event if pending */
5360         if (vcpu->arch.nmi_pending) {
5361                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5362                         vcpu->arch.nmi_pending = false;
5363                         vcpu->arch.nmi_injected = true;
5364                         kvm_x86_ops->set_nmi(vcpu);
5365                 }
5366         } else if (kvm_cpu_has_interrupt(vcpu)) {
5367                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5368                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5369                                             false);
5370                         kvm_x86_ops->set_irq(vcpu);
5371                 }
5372         }
5373 }
5374
5375 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5376 {
5377         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5378                         !vcpu->guest_xcr0_loaded) {
5379                 /* kvm_set_xcr() also depends on this */
5380                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5381                 vcpu->guest_xcr0_loaded = 1;
5382         }
5383 }
5384
5385 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5386 {
5387         if (vcpu->guest_xcr0_loaded) {
5388                 if (vcpu->arch.xcr0 != host_xcr0)
5389                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5390                 vcpu->guest_xcr0_loaded = 0;
5391         }
5392 }
5393
5394 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5395 {
5396         int r;
5397         bool nmi_pending;
5398         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5399                 vcpu->run->request_interrupt_window;
5400
5401         if (vcpu->requests) {
5402                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5403                         kvm_mmu_unload(vcpu);
5404                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5405                         __kvm_migrate_timers(vcpu);
5406                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5407                         r = kvm_guest_time_update(vcpu);
5408                         if (unlikely(r))
5409                                 goto out;
5410                 }
5411                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5412                         kvm_mmu_sync_roots(vcpu);
5413                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5414                         kvm_x86_ops->tlb_flush(vcpu);
5415                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5416                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5417                         r = 0;
5418                         goto out;
5419                 }
5420                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5421                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5422                         r = 0;
5423                         goto out;
5424                 }
5425                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5426                         vcpu->fpu_active = 0;
5427                         kvm_x86_ops->fpu_deactivate(vcpu);
5428                 }
5429                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5430                         /* Page is swapped out. Do synthetic halt */
5431                         vcpu->arch.apf.halted = true;
5432                         r = 1;
5433                         goto out;
5434                 }
5435         }
5436
5437         r = kvm_mmu_reload(vcpu);
5438         if (unlikely(r))
5439                 goto out;
5440
5441         /*
5442          * An NMI can be injected between local nmi_pending read and
5443          * vcpu->arch.nmi_pending read inside inject_pending_event().
5444          * But in that case, KVM_REQ_EVENT will be set, which makes
5445          * the race described above benign.
5446          */
5447         nmi_pending = ACCESS_ONCE(vcpu->arch.nmi_pending);
5448
5449         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5450                 inject_pending_event(vcpu);
5451
5452                 /* enable NMI/IRQ window open exits if needed */
5453                 if (nmi_pending)
5454                         kvm_x86_ops->enable_nmi_window(vcpu);
5455                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5456                         kvm_x86_ops->enable_irq_window(vcpu);
5457
5458                 if (kvm_lapic_enabled(vcpu)) {
5459                         update_cr8_intercept(vcpu);
5460                         kvm_lapic_sync_to_vapic(vcpu);
5461                 }
5462         }
5463
5464         preempt_disable();
5465
5466         kvm_x86_ops->prepare_guest_switch(vcpu);
5467         if (vcpu->fpu_active)
5468                 kvm_load_guest_fpu(vcpu);
5469         kvm_load_guest_xcr0(vcpu);
5470
5471         vcpu->mode = IN_GUEST_MODE;
5472
5473         /* We should set ->mode before check ->requests,
5474          * see the comment in make_all_cpus_request.
5475          */
5476         smp_mb();
5477
5478         local_irq_disable();
5479
5480         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5481             || need_resched() || signal_pending(current)) {
5482                 vcpu->mode = OUTSIDE_GUEST_MODE;
5483                 smp_wmb();
5484                 local_irq_enable();
5485                 preempt_enable();
5486                 kvm_x86_ops->cancel_injection(vcpu);
5487                 r = 1;
5488                 goto out;
5489         }
5490
5491         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5492
5493         kvm_guest_enter();
5494
5495         if (unlikely(vcpu->arch.switch_db_regs)) {
5496                 set_debugreg(0, 7);
5497                 set_debugreg(vcpu->arch.eff_db[0], 0);
5498                 set_debugreg(vcpu->arch.eff_db[1], 1);
5499                 set_debugreg(vcpu->arch.eff_db[2], 2);
5500                 set_debugreg(vcpu->arch.eff_db[3], 3);
5501         }
5502
5503         trace_kvm_entry(vcpu->vcpu_id);
5504         kvm_x86_ops->run(vcpu);
5505
5506         /*
5507          * If the guest has used debug registers, at least dr7
5508          * will be disabled while returning to the host.
5509          * If we don't have active breakpoints in the host, we don't
5510          * care about the messed up debug address registers. But if
5511          * we have some of them active, restore the old state.
5512          */
5513         if (hw_breakpoint_active())
5514                 hw_breakpoint_restore();
5515
5516         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5517
5518         vcpu->mode = OUTSIDE_GUEST_MODE;
5519         smp_wmb();
5520         local_irq_enable();
5521
5522         ++vcpu->stat.exits;
5523
5524         /*
5525          * We must have an instruction between local_irq_enable() and
5526          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5527          * the interrupt shadow.  The stat.exits increment will do nicely.
5528          * But we need to prevent reordering, hence this barrier():
5529          */
5530         barrier();
5531
5532         kvm_guest_exit();
5533
5534         preempt_enable();
5535
5536         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5537
5538         /*
5539          * Profile KVM exit RIPs:
5540          */
5541         if (unlikely(prof_on == KVM_PROFILING)) {
5542                 unsigned long rip = kvm_rip_read(vcpu);
5543                 profile_hit(KVM_PROFILING, (void *)rip);
5544         }
5545
5546
5547         kvm_lapic_sync_from_vapic(vcpu);
5548
5549         r = kvm_x86_ops->handle_exit(vcpu);
5550 out:
5551         return r;
5552 }
5553
5554
5555 static int __vcpu_run(struct kvm_vcpu *vcpu)
5556 {
5557         int r;
5558         struct kvm *kvm = vcpu->kvm;
5559
5560         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5561                 pr_debug("vcpu %d received sipi with vector # %x\n",
5562                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5563                 kvm_lapic_reset(vcpu);
5564                 r = kvm_arch_vcpu_reset(vcpu);
5565                 if (r)
5566                         return r;
5567                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5568         }
5569
5570         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5571         vapic_enter(vcpu);
5572
5573         r = 1;
5574         while (r > 0) {
5575                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5576                     !vcpu->arch.apf.halted)
5577                         r = vcpu_enter_guest(vcpu);
5578                 else {
5579                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5580                         kvm_vcpu_block(vcpu);
5581                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5582                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5583                         {
5584                                 switch(vcpu->arch.mp_state) {
5585                                 case KVM_MP_STATE_HALTED:
5586                                         vcpu->arch.mp_state =
5587                                                 KVM_MP_STATE_RUNNABLE;
5588                                 case KVM_MP_STATE_RUNNABLE:
5589                                         vcpu->arch.apf.halted = false;
5590                                         break;
5591                                 case KVM_MP_STATE_SIPI_RECEIVED:
5592                                 default:
5593                                         r = -EINTR;
5594                                         break;
5595                                 }
5596                         }
5597                 }
5598
5599                 if (r <= 0)
5600                         break;
5601
5602                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5603                 if (kvm_cpu_has_pending_timer(vcpu))
5604                         kvm_inject_pending_timer_irqs(vcpu);
5605
5606                 if (dm_request_for_irq_injection(vcpu)) {
5607                         r = -EINTR;
5608                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5609                         ++vcpu->stat.request_irq_exits;
5610                 }
5611
5612                 kvm_check_async_pf_completion(vcpu);
5613
5614                 if (signal_pending(current)) {
5615                         r = -EINTR;
5616                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5617                         ++vcpu->stat.signal_exits;
5618                 }
5619                 if (need_resched()) {
5620                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5621                         kvm_resched(vcpu);
5622                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5623                 }
5624         }
5625
5626         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5627
5628         vapic_exit(vcpu);
5629
5630         return r;
5631 }
5632
5633 static int complete_mmio(struct kvm_vcpu *vcpu)
5634 {
5635         struct kvm_run *run = vcpu->run;
5636         int r;
5637
5638         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5639                 return 1;
5640
5641         if (vcpu->mmio_needed) {
5642                 vcpu->mmio_needed = 0;
5643                 if (!vcpu->mmio_is_write)
5644                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5645                                run->mmio.data, 8);
5646                 vcpu->mmio_index += 8;
5647                 if (vcpu->mmio_index < vcpu->mmio_size) {
5648                         run->exit_reason = KVM_EXIT_MMIO;
5649                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5650                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5651                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5652                         run->mmio.is_write = vcpu->mmio_is_write;
5653                         vcpu->mmio_needed = 1;
5654                         return 0;
5655                 }
5656                 if (vcpu->mmio_is_write)
5657                         return 1;
5658                 vcpu->mmio_read_completed = 1;
5659         }
5660         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5661         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5662         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5663         if (r != EMULATE_DONE)
5664                 return 0;
5665         return 1;
5666 }
5667
5668 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5669 {
5670         int r;
5671         sigset_t sigsaved;
5672
5673         if (!tsk_used_math(current) && init_fpu(current))
5674                 return -ENOMEM;
5675
5676         if (vcpu->sigset_active)
5677                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5678
5679         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5680                 kvm_vcpu_block(vcpu);
5681                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5682                 r = -EAGAIN;
5683                 goto out;
5684         }
5685
5686         /* re-sync apic's tpr */
5687         if (!irqchip_in_kernel(vcpu->kvm)) {
5688                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5689                         r = -EINVAL;
5690                         goto out;
5691                 }
5692         }
5693
5694         r = complete_mmio(vcpu);
5695         if (r <= 0)
5696                 goto out;
5697
5698         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5699                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5700                                      kvm_run->hypercall.ret);
5701
5702         r = __vcpu_run(vcpu);
5703
5704 out:
5705         post_kvm_run_save(vcpu);
5706         if (vcpu->sigset_active)
5707                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5708
5709         return r;
5710 }
5711
5712 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5713 {
5714         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5715                 /*
5716                  * We are here if userspace calls get_regs() in the middle of
5717                  * instruction emulation. Registers state needs to be copied
5718                  * back from emulation context to vcpu. Usrapace shouldn't do
5719                  * that usually, but some bad designed PV devices (vmware
5720                  * backdoor interface) need this to work
5721                  */
5722                 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5723                 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5724                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5725         }
5726         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5727         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5728         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5729         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5730         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5731         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5732         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5733         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5734 #ifdef CONFIG_X86_64
5735         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5736         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5737         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5738         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5739         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5740         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5741         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5742         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5743 #endif
5744
5745         regs->rip = kvm_rip_read(vcpu);
5746         regs->rflags = kvm_get_rflags(vcpu);
5747
5748         return 0;
5749 }
5750
5751 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5752 {
5753         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5754         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5755
5756         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5757         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5758         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5759         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5760         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5761         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5762         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5763         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5764 #ifdef CONFIG_X86_64
5765         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5766         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5767         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5768         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5769         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5770         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5771         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5772         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5773 #endif
5774
5775         kvm_rip_write(vcpu, regs->rip);
5776         kvm_set_rflags(vcpu, regs->rflags);
5777
5778         vcpu->arch.exception.pending = false;
5779
5780         kvm_make_request(KVM_REQ_EVENT, vcpu);
5781
5782         return 0;
5783 }
5784
5785 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5786 {
5787         struct kvm_segment cs;
5788
5789         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5790         *db = cs.db;
5791         *l = cs.l;
5792 }
5793 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5794
5795 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5796                                   struct kvm_sregs *sregs)
5797 {
5798         struct desc_ptr dt;
5799
5800         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5801         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5802         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5803         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5804         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5805         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5806
5807         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5808         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5809
5810         kvm_x86_ops->get_idt(vcpu, &dt);
5811         sregs->idt.limit = dt.size;
5812         sregs->idt.base = dt.address;
5813         kvm_x86_ops->get_gdt(vcpu, &dt);
5814         sregs->gdt.limit = dt.size;
5815         sregs->gdt.base = dt.address;
5816
5817         sregs->cr0 = kvm_read_cr0(vcpu);
5818         sregs->cr2 = vcpu->arch.cr2;
5819         sregs->cr3 = kvm_read_cr3(vcpu);
5820         sregs->cr4 = kvm_read_cr4(vcpu);
5821         sregs->cr8 = kvm_get_cr8(vcpu);
5822         sregs->efer = vcpu->arch.efer;
5823         sregs->apic_base = kvm_get_apic_base(vcpu);
5824
5825         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5826
5827         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5828                 set_bit(vcpu->arch.interrupt.nr,
5829                         (unsigned long *)sregs->interrupt_bitmap);
5830
5831         return 0;
5832 }
5833
5834 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5835                                     struct kvm_mp_state *mp_state)
5836 {
5837         mp_state->mp_state = vcpu->arch.mp_state;
5838         return 0;
5839 }
5840
5841 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5842                                     struct kvm_mp_state *mp_state)
5843 {
5844         vcpu->arch.mp_state = mp_state->mp_state;
5845         kvm_make_request(KVM_REQ_EVENT, vcpu);
5846         return 0;
5847 }
5848
5849 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5850                     bool has_error_code, u32 error_code)
5851 {
5852         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5853         int ret;
5854
5855         init_emulate_ctxt(vcpu);
5856
5857         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5858                                    tss_selector, reason, has_error_code,
5859                                    error_code);
5860
5861         if (ret)
5862                 return EMULATE_FAIL;
5863
5864         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5865         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5866         kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5867         kvm_make_request(KVM_REQ_EVENT, vcpu);
5868         return EMULATE_DONE;
5869 }
5870 EXPORT_SYMBOL_GPL(kvm_task_switch);
5871
5872 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5873                                   struct kvm_sregs *sregs)
5874 {
5875         int mmu_reset_needed = 0;
5876         int pending_vec, max_bits, idx;
5877         struct desc_ptr dt;
5878
5879         dt.size = sregs->idt.limit;
5880         dt.address = sregs->idt.base;
5881         kvm_x86_ops->set_idt(vcpu, &dt);
5882         dt.size = sregs->gdt.limit;
5883         dt.address = sregs->gdt.base;
5884         kvm_x86_ops->set_gdt(vcpu, &dt);
5885
5886         vcpu->arch.cr2 = sregs->cr2;
5887         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5888         vcpu->arch.cr3 = sregs->cr3;
5889         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5890
5891         kvm_set_cr8(vcpu, sregs->cr8);
5892
5893         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5894         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5895         kvm_set_apic_base(vcpu, sregs->apic_base);
5896
5897         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5898         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5899         vcpu->arch.cr0 = sregs->cr0;
5900
5901         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5902         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5903         if (sregs->cr4 & X86_CR4_OSXSAVE)
5904                 update_cpuid(vcpu);
5905
5906         idx = srcu_read_lock(&vcpu->kvm->srcu);
5907         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5908                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5909                 mmu_reset_needed = 1;
5910         }
5911         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5912
5913         if (mmu_reset_needed)
5914                 kvm_mmu_reset_context(vcpu);
5915
5916         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5917         pending_vec = find_first_bit(
5918                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5919         if (pending_vec < max_bits) {
5920                 kvm_queue_interrupt(vcpu, pending_vec, false);
5921                 pr_debug("Set back pending irq %d\n", pending_vec);
5922         }
5923
5924         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5925         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5926         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5927         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5928         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5929         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5930
5931         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5932         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5933
5934         update_cr8_intercept(vcpu);
5935
5936         /* Older userspace won't unhalt the vcpu on reset. */
5937         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5938             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5939             !is_protmode(vcpu))
5940                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5941
5942         kvm_make_request(KVM_REQ_EVENT, vcpu);
5943
5944         return 0;
5945 }
5946
5947 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5948                                         struct kvm_guest_debug *dbg)
5949 {
5950         unsigned long rflags;
5951         int i, r;
5952
5953         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5954                 r = -EBUSY;
5955                 if (vcpu->arch.exception.pending)
5956                         goto out;
5957                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5958                         kvm_queue_exception(vcpu, DB_VECTOR);
5959                 else
5960                         kvm_queue_exception(vcpu, BP_VECTOR);
5961         }
5962
5963         /*
5964          * Read rflags as long as potentially injected trace flags are still
5965          * filtered out.
5966          */
5967         rflags = kvm_get_rflags(vcpu);
5968
5969         vcpu->guest_debug = dbg->control;
5970         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5971                 vcpu->guest_debug = 0;
5972
5973         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5974                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5975                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5976                 vcpu->arch.switch_db_regs =
5977                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5978         } else {
5979                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5980                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5981                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5982         }
5983
5984         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5985                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5986                         get_segment_base(vcpu, VCPU_SREG_CS);
5987
5988         /*
5989          * Trigger an rflags update that will inject or remove the trace
5990          * flags.
5991          */
5992         kvm_set_rflags(vcpu, rflags);
5993
5994         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5995
5996         r = 0;
5997
5998 out:
5999
6000         return r;
6001 }
6002
6003 /*
6004  * Translate a guest virtual address to a guest physical address.
6005  */
6006 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6007                                     struct kvm_translation *tr)
6008 {
6009         unsigned long vaddr = tr->linear_address;
6010         gpa_t gpa;
6011         int idx;
6012
6013         idx = srcu_read_lock(&vcpu->kvm->srcu);
6014         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6015         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6016         tr->physical_address = gpa;
6017         tr->valid = gpa != UNMAPPED_GVA;
6018         tr->writeable = 1;
6019         tr->usermode = 0;
6020
6021         return 0;
6022 }
6023
6024 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6025 {
6026         struct i387_fxsave_struct *fxsave =
6027                         &vcpu->arch.guest_fpu.state->fxsave;
6028
6029         memcpy(fpu->fpr, fxsave->st_space, 128);
6030         fpu->fcw = fxsave->cwd;
6031         fpu->fsw = fxsave->swd;
6032         fpu->ftwx = fxsave->twd;
6033         fpu->last_opcode = fxsave->fop;
6034         fpu->last_ip = fxsave->rip;
6035         fpu->last_dp = fxsave->rdp;
6036         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6037
6038         return 0;
6039 }
6040
6041 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6042 {
6043         struct i387_fxsave_struct *fxsave =
6044                         &vcpu->arch.guest_fpu.state->fxsave;
6045
6046         memcpy(fxsave->st_space, fpu->fpr, 128);
6047         fxsave->cwd = fpu->fcw;
6048         fxsave->swd = fpu->fsw;
6049         fxsave->twd = fpu->ftwx;
6050         fxsave->fop = fpu->last_opcode;
6051         fxsave->rip = fpu->last_ip;
6052         fxsave->rdp = fpu->last_dp;
6053         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6054
6055         return 0;
6056 }
6057
6058 int fx_init(struct kvm_vcpu *vcpu)
6059 {
6060         int err;
6061
6062         err = fpu_alloc(&vcpu->arch.guest_fpu);
6063         if (err)
6064                 return err;
6065
6066         fpu_finit(&vcpu->arch.guest_fpu);
6067
6068         /*
6069          * Ensure guest xcr0 is valid for loading
6070          */
6071         vcpu->arch.xcr0 = XSTATE_FP;
6072
6073         vcpu->arch.cr0 |= X86_CR0_ET;
6074
6075         return 0;
6076 }
6077 EXPORT_SYMBOL_GPL(fx_init);
6078
6079 static void fx_free(struct kvm_vcpu *vcpu)
6080 {
6081         fpu_free(&vcpu->arch.guest_fpu);
6082 }
6083
6084 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6085 {
6086         if (vcpu->guest_fpu_loaded)
6087                 return;
6088
6089         /*
6090          * Restore all possible states in the guest,
6091          * and assume host would use all available bits.
6092          * Guest xcr0 would be loaded later.
6093          */
6094         kvm_put_guest_xcr0(vcpu);
6095         vcpu->guest_fpu_loaded = 1;
6096         unlazy_fpu(current);
6097         fpu_restore_checking(&vcpu->arch.guest_fpu);
6098         trace_kvm_fpu(1);
6099 }
6100
6101 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6102 {
6103         kvm_put_guest_xcr0(vcpu);
6104
6105         if (!vcpu->guest_fpu_loaded)
6106                 return;
6107
6108         vcpu->guest_fpu_loaded = 0;
6109         fpu_save_init(&vcpu->arch.guest_fpu);
6110         ++vcpu->stat.fpu_reload;
6111         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6112         trace_kvm_fpu(0);
6113 }
6114
6115 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6116 {
6117         kvmclock_reset(vcpu);
6118
6119         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6120         fx_free(vcpu);
6121         kvm_x86_ops->vcpu_free(vcpu);
6122 }
6123
6124 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6125                                                 unsigned int id)
6126 {
6127         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6128                 printk_once(KERN_WARNING
6129                 "kvm: SMP vm created on host with unstable TSC; "
6130                 "guest TSC will not be reliable\n");
6131         return kvm_x86_ops->vcpu_create(kvm, id);
6132 }
6133
6134 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6135 {
6136         int r;
6137
6138         vcpu->arch.mtrr_state.have_fixed = 1;
6139         vcpu_load(vcpu);
6140         r = kvm_arch_vcpu_reset(vcpu);
6141         if (r == 0)
6142                 r = kvm_mmu_setup(vcpu);
6143         vcpu_put(vcpu);
6144
6145         return r;
6146 }
6147
6148 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6149 {
6150         vcpu->arch.apf.msr_val = 0;
6151
6152         vcpu_load(vcpu);
6153         kvm_mmu_unload(vcpu);
6154         vcpu_put(vcpu);
6155
6156         fx_free(vcpu);
6157         kvm_x86_ops->vcpu_free(vcpu);
6158 }
6159
6160 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6161 {
6162         vcpu->arch.nmi_pending = false;
6163         vcpu->arch.nmi_injected = false;
6164
6165         vcpu->arch.switch_db_regs = 0;
6166         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6167         vcpu->arch.dr6 = DR6_FIXED_1;
6168         vcpu->arch.dr7 = DR7_FIXED_1;
6169
6170         kvm_make_request(KVM_REQ_EVENT, vcpu);
6171         vcpu->arch.apf.msr_val = 0;
6172
6173         kvmclock_reset(vcpu);
6174
6175         kvm_clear_async_pf_completion_queue(vcpu);
6176         kvm_async_pf_hash_reset(vcpu);
6177         vcpu->arch.apf.halted = false;
6178
6179         return kvm_x86_ops->vcpu_reset(vcpu);
6180 }
6181
6182 int kvm_arch_hardware_enable(void *garbage)
6183 {
6184         struct kvm *kvm;
6185         struct kvm_vcpu *vcpu;
6186         int i;
6187
6188         kvm_shared_msr_cpu_online();
6189         list_for_each_entry(kvm, &vm_list, vm_list)
6190                 kvm_for_each_vcpu(i, vcpu, kvm)
6191                         if (vcpu->cpu == smp_processor_id())
6192                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6193         return kvm_x86_ops->hardware_enable(garbage);
6194 }
6195
6196 void kvm_arch_hardware_disable(void *garbage)
6197 {
6198         kvm_x86_ops->hardware_disable(garbage);
6199         drop_user_return_notifiers(garbage);
6200 }
6201
6202 int kvm_arch_hardware_setup(void)
6203 {
6204         return kvm_x86_ops->hardware_setup();
6205 }
6206
6207 void kvm_arch_hardware_unsetup(void)
6208 {
6209         kvm_x86_ops->hardware_unsetup();
6210 }
6211
6212 void kvm_arch_check_processor_compat(void *rtn)
6213 {
6214         kvm_x86_ops->check_processor_compatibility(rtn);
6215 }
6216
6217 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6218 {
6219         struct page *page;
6220         struct kvm *kvm;
6221