KVM: x86: fix pvclock guest stopped flag reporting
[linux-3.10.git] / arch / x86 / kvm / x86.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * derived from drivers/kvm/kvm_main.c
5  *
6  * Copyright (C) 2006 Qumranet, Inc.
7  * Copyright (C) 2008 Qumranet, Inc.
8  * Copyright IBM Corporation, 2008
9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
10  *
11  * Authors:
12  *   Avi Kivity   <avi@qumranet.com>
13  *   Yaniv Kamay  <yaniv@qumranet.com>
14  *   Amit Shah    <amit.shah@qumranet.com>
15  *   Ben-Ami Yassour <benami@il.ibm.com>
16  *
17  * This work is licensed under the terms of the GNU GPL, version 2.  See
18  * the COPYING file in the top-level directory.
19  *
20  */
21
22 #include <linux/kvm_host.h>
23 #include "irq.h"
24 #include "mmu.h"
25 #include "i8254.h"
26 #include "tss.h"
27 #include "kvm_cache_regs.h"
28 #include "x86.h"
29 #include "cpuid.h"
30
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
34 #include <linux/fs.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <trace/events/kvm.h>
50
51 #define CREATE_TRACE_POINTS
52 #include "trace.h"
53
54 #include <asm/debugreg.h>
55 #include <asm/msr.h>
56 #include <asm/desc.h>
57 #include <asm/mtrr.h>
58 #include <asm/mce.h>
59 #include <asm/i387.h>
60 #include <asm/fpu-internal.h> /* Ugh! */
61 #include <asm/xcr.h>
62 #include <asm/pvclock.h>
63 #include <asm/div64.h>
64
65 #define MAX_IO_MSRS 256
66 #define KVM_MAX_MCE_BANKS 32
67 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
68
69 #define emul_to_vcpu(ctxt) \
70         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
71
72 /* EFER defaults:
73  * - enable syscall per default because its emulated by KVM
74  * - enable LME and LMA per default on 64 bit KVM
75  */
76 #ifdef CONFIG_X86_64
77 static
78 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
79 #else
80 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
81 #endif
82
83 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
84 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
85
86 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
87 static void process_nmi(struct kvm_vcpu *vcpu);
88
89 struct kvm_x86_ops *kvm_x86_ops;
90 EXPORT_SYMBOL_GPL(kvm_x86_ops);
91
92 static bool ignore_msrs = 0;
93 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
94
95 bool kvm_has_tsc_control;
96 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
97 u32  kvm_max_guest_tsc_khz;
98 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
99
100 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
101 static u32 tsc_tolerance_ppm = 250;
102 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
103
104 #define KVM_NR_SHARED_MSRS 16
105
106 struct kvm_shared_msrs_global {
107         int nr;
108         u32 msrs[KVM_NR_SHARED_MSRS];
109 };
110
111 struct kvm_shared_msrs {
112         struct user_return_notifier urn;
113         bool registered;
114         struct kvm_shared_msr_values {
115                 u64 host;
116                 u64 curr;
117         } values[KVM_NR_SHARED_MSRS];
118 };
119
120 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
121 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
122
123 struct kvm_stats_debugfs_item debugfs_entries[] = {
124         { "pf_fixed", VCPU_STAT(pf_fixed) },
125         { "pf_guest", VCPU_STAT(pf_guest) },
126         { "tlb_flush", VCPU_STAT(tlb_flush) },
127         { "invlpg", VCPU_STAT(invlpg) },
128         { "exits", VCPU_STAT(exits) },
129         { "io_exits", VCPU_STAT(io_exits) },
130         { "mmio_exits", VCPU_STAT(mmio_exits) },
131         { "signal_exits", VCPU_STAT(signal_exits) },
132         { "irq_window", VCPU_STAT(irq_window_exits) },
133         { "nmi_window", VCPU_STAT(nmi_window_exits) },
134         { "halt_exits", VCPU_STAT(halt_exits) },
135         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
136         { "hypercalls", VCPU_STAT(hypercalls) },
137         { "request_irq", VCPU_STAT(request_irq_exits) },
138         { "irq_exits", VCPU_STAT(irq_exits) },
139         { "host_state_reload", VCPU_STAT(host_state_reload) },
140         { "efer_reload", VCPU_STAT(efer_reload) },
141         { "fpu_reload", VCPU_STAT(fpu_reload) },
142         { "insn_emulation", VCPU_STAT(insn_emulation) },
143         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
144         { "irq_injections", VCPU_STAT(irq_injections) },
145         { "nmi_injections", VCPU_STAT(nmi_injections) },
146         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
147         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
148         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
149         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
150         { "mmu_flooded", VM_STAT(mmu_flooded) },
151         { "mmu_recycled", VM_STAT(mmu_recycled) },
152         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
153         { "mmu_unsync", VM_STAT(mmu_unsync) },
154         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
155         { "largepages", VM_STAT(lpages) },
156         { NULL }
157 };
158
159 u64 __read_mostly host_xcr0;
160
161 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
162
163 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
164 {
165         int i;
166         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
167                 vcpu->arch.apf.gfns[i] = ~0;
168 }
169
170 static void kvm_on_user_return(struct user_return_notifier *urn)
171 {
172         unsigned slot;
173         struct kvm_shared_msrs *locals
174                 = container_of(urn, struct kvm_shared_msrs, urn);
175         struct kvm_shared_msr_values *values;
176
177         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
178                 values = &locals->values[slot];
179                 if (values->host != values->curr) {
180                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
181                         values->curr = values->host;
182                 }
183         }
184         locals->registered = false;
185         user_return_notifier_unregister(urn);
186 }
187
188 static void shared_msr_update(unsigned slot, u32 msr)
189 {
190         struct kvm_shared_msrs *smsr;
191         u64 value;
192
193         smsr = &__get_cpu_var(shared_msrs);
194         /* only read, and nobody should modify it at this time,
195          * so don't need lock */
196         if (slot >= shared_msrs_global.nr) {
197                 printk(KERN_ERR "kvm: invalid MSR slot!");
198                 return;
199         }
200         rdmsrl_safe(msr, &value);
201         smsr->values[slot].host = value;
202         smsr->values[slot].curr = value;
203 }
204
205 void kvm_define_shared_msr(unsigned slot, u32 msr)
206 {
207         if (slot >= shared_msrs_global.nr)
208                 shared_msrs_global.nr = slot + 1;
209         shared_msrs_global.msrs[slot] = msr;
210         /* we need ensured the shared_msr_global have been updated */
211         smp_wmb();
212 }
213 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
214
215 static void kvm_shared_msr_cpu_online(void)
216 {
217         unsigned i;
218
219         for (i = 0; i < shared_msrs_global.nr; ++i)
220                 shared_msr_update(i, shared_msrs_global.msrs[i]);
221 }
222
223 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
224 {
225         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
226
227         if (((value ^ smsr->values[slot].curr) & mask) == 0)
228                 return;
229         smsr->values[slot].curr = value;
230         wrmsrl(shared_msrs_global.msrs[slot], value);
231         if (!smsr->registered) {
232                 smsr->urn.on_user_return = kvm_on_user_return;
233                 user_return_notifier_register(&smsr->urn);
234                 smsr->registered = true;
235         }
236 }
237 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
238
239 static void drop_user_return_notifiers(void *ignore)
240 {
241         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
242
243         if (smsr->registered)
244                 kvm_on_user_return(&smsr->urn);
245 }
246
247 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
248 {
249         return vcpu->arch.apic_base;
250 }
251 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
252
253 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
254 {
255         /* TODO: reserve bits check */
256         kvm_lapic_set_base(vcpu, data);
257 }
258 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
259
260 #define EXCPT_BENIGN            0
261 #define EXCPT_CONTRIBUTORY      1
262 #define EXCPT_PF                2
263
264 static int exception_class(int vector)
265 {
266         switch (vector) {
267         case PF_VECTOR:
268                 return EXCPT_PF;
269         case DE_VECTOR:
270         case TS_VECTOR:
271         case NP_VECTOR:
272         case SS_VECTOR:
273         case GP_VECTOR:
274                 return EXCPT_CONTRIBUTORY;
275         default:
276                 break;
277         }
278         return EXCPT_BENIGN;
279 }
280
281 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
282                 unsigned nr, bool has_error, u32 error_code,
283                 bool reinject)
284 {
285         u32 prev_nr;
286         int class1, class2;
287
288         kvm_make_request(KVM_REQ_EVENT, vcpu);
289
290         if (!vcpu->arch.exception.pending) {
291         queue:
292                 vcpu->arch.exception.pending = true;
293                 vcpu->arch.exception.has_error_code = has_error;
294                 vcpu->arch.exception.nr = nr;
295                 vcpu->arch.exception.error_code = error_code;
296                 vcpu->arch.exception.reinject = reinject;
297                 return;
298         }
299
300         /* to check exception */
301         prev_nr = vcpu->arch.exception.nr;
302         if (prev_nr == DF_VECTOR) {
303                 /* triple fault -> shutdown */
304                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
305                 return;
306         }
307         class1 = exception_class(prev_nr);
308         class2 = exception_class(nr);
309         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
310                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
311                 /* generate double fault per SDM Table 5-5 */
312                 vcpu->arch.exception.pending = true;
313                 vcpu->arch.exception.has_error_code = true;
314                 vcpu->arch.exception.nr = DF_VECTOR;
315                 vcpu->arch.exception.error_code = 0;
316         } else
317                 /* replace previous exception with a new one in a hope
318                    that instruction re-execution will regenerate lost
319                    exception */
320                 goto queue;
321 }
322
323 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
324 {
325         kvm_multiple_exception(vcpu, nr, false, 0, false);
326 }
327 EXPORT_SYMBOL_GPL(kvm_queue_exception);
328
329 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
330 {
331         kvm_multiple_exception(vcpu, nr, false, 0, true);
332 }
333 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
334
335 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
336 {
337         if (err)
338                 kvm_inject_gp(vcpu, 0);
339         else
340                 kvm_x86_ops->skip_emulated_instruction(vcpu);
341 }
342 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
343
344 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
345 {
346         ++vcpu->stat.pf_guest;
347         vcpu->arch.cr2 = fault->address;
348         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
349 }
350 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
351
352 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
353 {
354         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
355                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
356         else
357                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
358 }
359
360 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
361 {
362         atomic_inc(&vcpu->arch.nmi_queued);
363         kvm_make_request(KVM_REQ_NMI, vcpu);
364 }
365 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
366
367 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
368 {
369         kvm_multiple_exception(vcpu, nr, true, error_code, false);
370 }
371 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
372
373 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
374 {
375         kvm_multiple_exception(vcpu, nr, true, error_code, true);
376 }
377 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
378
379 /*
380  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
381  * a #GP and return false.
382  */
383 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
384 {
385         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
386                 return true;
387         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
388         return false;
389 }
390 EXPORT_SYMBOL_GPL(kvm_require_cpl);
391
392 /*
393  * This function will be used to read from the physical memory of the currently
394  * running guest. The difference to kvm_read_guest_page is that this function
395  * can read from guest physical or from the guest's guest physical memory.
396  */
397 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
398                             gfn_t ngfn, void *data, int offset, int len,
399                             u32 access)
400 {
401         gfn_t real_gfn;
402         gpa_t ngpa;
403
404         ngpa     = gfn_to_gpa(ngfn);
405         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
406         if (real_gfn == UNMAPPED_GVA)
407                 return -EFAULT;
408
409         real_gfn = gpa_to_gfn(real_gfn);
410
411         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
412 }
413 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
414
415 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
416                                void *data, int offset, int len, u32 access)
417 {
418         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
419                                        data, offset, len, access);
420 }
421
422 /*
423  * Load the pae pdptrs.  Return true is they are all valid.
424  */
425 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
426 {
427         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
428         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
429         int i;
430         int ret;
431         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
432
433         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
434                                       offset * sizeof(u64), sizeof(pdpte),
435                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
436         if (ret < 0) {
437                 ret = 0;
438                 goto out;
439         }
440         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
441                 if (is_present_gpte(pdpte[i]) &&
442                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
443                         ret = 0;
444                         goto out;
445                 }
446         }
447         ret = 1;
448
449         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
450         __set_bit(VCPU_EXREG_PDPTR,
451                   (unsigned long *)&vcpu->arch.regs_avail);
452         __set_bit(VCPU_EXREG_PDPTR,
453                   (unsigned long *)&vcpu->arch.regs_dirty);
454 out:
455
456         return ret;
457 }
458 EXPORT_SYMBOL_GPL(load_pdptrs);
459
460 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
461 {
462         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
463         bool changed = true;
464         int offset;
465         gfn_t gfn;
466         int r;
467
468         if (is_long_mode(vcpu) || !is_pae(vcpu))
469                 return false;
470
471         if (!test_bit(VCPU_EXREG_PDPTR,
472                       (unsigned long *)&vcpu->arch.regs_avail))
473                 return true;
474
475         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
476         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
477         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
478                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
479         if (r < 0)
480                 goto out;
481         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
482 out:
483
484         return changed;
485 }
486
487 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
488 {
489         unsigned long old_cr0 = kvm_read_cr0(vcpu);
490         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
491                                     X86_CR0_CD | X86_CR0_NW;
492
493         cr0 |= X86_CR0_ET;
494
495 #ifdef CONFIG_X86_64
496         if (cr0 & 0xffffffff00000000UL)
497                 return 1;
498 #endif
499
500         cr0 &= ~CR0_RESERVED_BITS;
501
502         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
503                 return 1;
504
505         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
506                 return 1;
507
508         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
509 #ifdef CONFIG_X86_64
510                 if ((vcpu->arch.efer & EFER_LME)) {
511                         int cs_db, cs_l;
512
513                         if (!is_pae(vcpu))
514                                 return 1;
515                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
516                         if (cs_l)
517                                 return 1;
518                 } else
519 #endif
520                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
521                                                  kvm_read_cr3(vcpu)))
522                         return 1;
523         }
524
525         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
526                 return 1;
527
528         kvm_x86_ops->set_cr0(vcpu, cr0);
529
530         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
531                 kvm_clear_async_pf_completion_queue(vcpu);
532                 kvm_async_pf_hash_reset(vcpu);
533         }
534
535         if ((cr0 ^ old_cr0) & update_bits)
536                 kvm_mmu_reset_context(vcpu);
537         return 0;
538 }
539 EXPORT_SYMBOL_GPL(kvm_set_cr0);
540
541 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
542 {
543         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
544 }
545 EXPORT_SYMBOL_GPL(kvm_lmsw);
546
547 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
548 {
549         u64 xcr0;
550
551         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
552         if (index != XCR_XFEATURE_ENABLED_MASK)
553                 return 1;
554         xcr0 = xcr;
555         if (kvm_x86_ops->get_cpl(vcpu) != 0)
556                 return 1;
557         if (!(xcr0 & XSTATE_FP))
558                 return 1;
559         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
560                 return 1;
561         if (xcr0 & ~host_xcr0)
562                 return 1;
563         vcpu->arch.xcr0 = xcr0;
564         vcpu->guest_xcr0_loaded = 0;
565         return 0;
566 }
567
568 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
569 {
570         if (__kvm_set_xcr(vcpu, index, xcr)) {
571                 kvm_inject_gp(vcpu, 0);
572                 return 1;
573         }
574         return 0;
575 }
576 EXPORT_SYMBOL_GPL(kvm_set_xcr);
577
578 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
579 {
580         unsigned long old_cr4 = kvm_read_cr4(vcpu);
581         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
582                                    X86_CR4_PAE | X86_CR4_SMEP;
583         if (cr4 & CR4_RESERVED_BITS)
584                 return 1;
585
586         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
587                 return 1;
588
589         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
590                 return 1;
591
592         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
593                 return 1;
594
595         if (is_long_mode(vcpu)) {
596                 if (!(cr4 & X86_CR4_PAE))
597                         return 1;
598         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
599                    && ((cr4 ^ old_cr4) & pdptr_bits)
600                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
601                                    kvm_read_cr3(vcpu)))
602                 return 1;
603
604         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
605                 if (!guest_cpuid_has_pcid(vcpu))
606                         return 1;
607
608                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
609                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
610                         return 1;
611         }
612
613         if (kvm_x86_ops->set_cr4(vcpu, cr4))
614                 return 1;
615
616         if (((cr4 ^ old_cr4) & pdptr_bits) ||
617             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
618                 kvm_mmu_reset_context(vcpu);
619
620         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
621                 kvm_update_cpuid(vcpu);
622
623         return 0;
624 }
625 EXPORT_SYMBOL_GPL(kvm_set_cr4);
626
627 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
628 {
629         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
630                 kvm_mmu_sync_roots(vcpu);
631                 kvm_mmu_flush_tlb(vcpu);
632                 return 0;
633         }
634
635         if (is_long_mode(vcpu)) {
636                 if (kvm_read_cr4(vcpu) & X86_CR4_PCIDE) {
637                         if (cr3 & CR3_PCID_ENABLED_RESERVED_BITS)
638                                 return 1;
639                 } else
640                         if (cr3 & CR3_L_MODE_RESERVED_BITS)
641                                 return 1;
642         } else {
643                 if (is_pae(vcpu)) {
644                         if (cr3 & CR3_PAE_RESERVED_BITS)
645                                 return 1;
646                         if (is_paging(vcpu) &&
647                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
648                                 return 1;
649                 }
650                 /*
651                  * We don't check reserved bits in nonpae mode, because
652                  * this isn't enforced, and VMware depends on this.
653                  */
654         }
655
656         /*
657          * Does the new cr3 value map to physical memory? (Note, we
658          * catch an invalid cr3 even in real-mode, because it would
659          * cause trouble later on when we turn on paging anyway.)
660          *
661          * A real CPU would silently accept an invalid cr3 and would
662          * attempt to use it - with largely undefined (and often hard
663          * to debug) behavior on the guest side.
664          */
665         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
666                 return 1;
667         vcpu->arch.cr3 = cr3;
668         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
669         vcpu->arch.mmu.new_cr3(vcpu);
670         return 0;
671 }
672 EXPORT_SYMBOL_GPL(kvm_set_cr3);
673
674 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
675 {
676         if (cr8 & CR8_RESERVED_BITS)
677                 return 1;
678         if (irqchip_in_kernel(vcpu->kvm))
679                 kvm_lapic_set_tpr(vcpu, cr8);
680         else
681                 vcpu->arch.cr8 = cr8;
682         return 0;
683 }
684 EXPORT_SYMBOL_GPL(kvm_set_cr8);
685
686 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
687 {
688         if (irqchip_in_kernel(vcpu->kvm))
689                 return kvm_lapic_get_cr8(vcpu);
690         else
691                 return vcpu->arch.cr8;
692 }
693 EXPORT_SYMBOL_GPL(kvm_get_cr8);
694
695 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
696 {
697         switch (dr) {
698         case 0 ... 3:
699                 vcpu->arch.db[dr] = val;
700                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
701                         vcpu->arch.eff_db[dr] = val;
702                 break;
703         case 4:
704                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
705                         return 1; /* #UD */
706                 /* fall through */
707         case 6:
708                 if (val & 0xffffffff00000000ULL)
709                         return -1; /* #GP */
710                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
711                 break;
712         case 5:
713                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
714                         return 1; /* #UD */
715                 /* fall through */
716         default: /* 7 */
717                 if (val & 0xffffffff00000000ULL)
718                         return -1; /* #GP */
719                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
720                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
721                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
722                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
723                 }
724                 break;
725         }
726
727         return 0;
728 }
729
730 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
731 {
732         int res;
733
734         res = __kvm_set_dr(vcpu, dr, val);
735         if (res > 0)
736                 kvm_queue_exception(vcpu, UD_VECTOR);
737         else if (res < 0)
738                 kvm_inject_gp(vcpu, 0);
739
740         return res;
741 }
742 EXPORT_SYMBOL_GPL(kvm_set_dr);
743
744 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
745 {
746         switch (dr) {
747         case 0 ... 3:
748                 *val = vcpu->arch.db[dr];
749                 break;
750         case 4:
751                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
752                         return 1;
753                 /* fall through */
754         case 6:
755                 *val = vcpu->arch.dr6;
756                 break;
757         case 5:
758                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
759                         return 1;
760                 /* fall through */
761         default: /* 7 */
762                 *val = vcpu->arch.dr7;
763                 break;
764         }
765
766         return 0;
767 }
768
769 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
770 {
771         if (_kvm_get_dr(vcpu, dr, val)) {
772                 kvm_queue_exception(vcpu, UD_VECTOR);
773                 return 1;
774         }
775         return 0;
776 }
777 EXPORT_SYMBOL_GPL(kvm_get_dr);
778
779 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
780 {
781         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
782         u64 data;
783         int err;
784
785         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
786         if (err)
787                 return err;
788         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
789         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
790         return err;
791 }
792 EXPORT_SYMBOL_GPL(kvm_rdpmc);
793
794 /*
795  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
796  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
797  *
798  * This list is modified at module load time to reflect the
799  * capabilities of the host cpu. This capabilities test skips MSRs that are
800  * kvm-specific. Those are put in the beginning of the list.
801  */
802
803 #define KVM_SAVE_MSRS_BEGIN     10
804 static u32 msrs_to_save[] = {
805         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
806         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
807         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
808         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
809         MSR_KVM_PV_EOI_EN,
810         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
811         MSR_STAR,
812 #ifdef CONFIG_X86_64
813         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
814 #endif
815         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
816 };
817
818 static unsigned num_msrs_to_save;
819
820 static u32 emulated_msrs[] = {
821         MSR_IA32_TSCDEADLINE,
822         MSR_IA32_MISC_ENABLE,
823         MSR_IA32_MCG_STATUS,
824         MSR_IA32_MCG_CTL,
825 };
826
827 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
828 {
829         u64 old_efer = vcpu->arch.efer;
830
831         if (efer & efer_reserved_bits)
832                 return 1;
833
834         if (is_paging(vcpu)
835             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
836                 return 1;
837
838         if (efer & EFER_FFXSR) {
839                 struct kvm_cpuid_entry2 *feat;
840
841                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
842                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
843                         return 1;
844         }
845
846         if (efer & EFER_SVME) {
847                 struct kvm_cpuid_entry2 *feat;
848
849                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
850                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
851                         return 1;
852         }
853
854         efer &= ~EFER_LMA;
855         efer |= vcpu->arch.efer & EFER_LMA;
856
857         kvm_x86_ops->set_efer(vcpu, efer);
858
859         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
860
861         /* Update reserved bits */
862         if ((efer ^ old_efer) & EFER_NX)
863                 kvm_mmu_reset_context(vcpu);
864
865         return 0;
866 }
867
868 void kvm_enable_efer_bits(u64 mask)
869 {
870        efer_reserved_bits &= ~mask;
871 }
872 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
873
874
875 /*
876  * Writes msr value into into the appropriate "register".
877  * Returns 0 on success, non-0 otherwise.
878  * Assumes vcpu_load() was already called.
879  */
880 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
881 {
882         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
883 }
884
885 /*
886  * Adapt set_msr() to msr_io()'s calling convention
887  */
888 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
889 {
890         return kvm_set_msr(vcpu, index, *data);
891 }
892
893 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
894 {
895         int version;
896         int r;
897         struct pvclock_wall_clock wc;
898         struct timespec boot;
899
900         if (!wall_clock)
901                 return;
902
903         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
904         if (r)
905                 return;
906
907         if (version & 1)
908                 ++version;  /* first time write, random junk */
909
910         ++version;
911
912         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
913
914         /*
915          * The guest calculates current wall clock time by adding
916          * system time (updated by kvm_guest_time_update below) to the
917          * wall clock specified here.  guest system time equals host
918          * system time for us, thus we must fill in host boot time here.
919          */
920         getboottime(&boot);
921
922         if (kvm->arch.kvmclock_offset) {
923                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
924                 boot = timespec_sub(boot, ts);
925         }
926         wc.sec = boot.tv_sec;
927         wc.nsec = boot.tv_nsec;
928         wc.version = version;
929
930         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
931
932         version++;
933         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
934 }
935
936 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
937 {
938         uint32_t quotient, remainder;
939
940         /* Don't try to replace with do_div(), this one calculates
941          * "(dividend << 32) / divisor" */
942         __asm__ ( "divl %4"
943                   : "=a" (quotient), "=d" (remainder)
944                   : "0" (0), "1" (dividend), "r" (divisor) );
945         return quotient;
946 }
947
948 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
949                                s8 *pshift, u32 *pmultiplier)
950 {
951         uint64_t scaled64;
952         int32_t  shift = 0;
953         uint64_t tps64;
954         uint32_t tps32;
955
956         tps64 = base_khz * 1000LL;
957         scaled64 = scaled_khz * 1000LL;
958         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
959                 tps64 >>= 1;
960                 shift--;
961         }
962
963         tps32 = (uint32_t)tps64;
964         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
965                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
966                         scaled64 >>= 1;
967                 else
968                         tps32 <<= 1;
969                 shift++;
970         }
971
972         *pshift = shift;
973         *pmultiplier = div_frac(scaled64, tps32);
974
975         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
976                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
977 }
978
979 static inline u64 get_kernel_ns(void)
980 {
981         struct timespec ts;
982
983         WARN_ON(preemptible());
984         ktime_get_ts(&ts);
985         monotonic_to_bootbased(&ts);
986         return timespec_to_ns(&ts);
987 }
988
989 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
990 unsigned long max_tsc_khz;
991
992 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
993 {
994         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
995                                    vcpu->arch.virtual_tsc_shift);
996 }
997
998 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
999 {
1000         u64 v = (u64)khz * (1000000 + ppm);
1001         do_div(v, 1000000);
1002         return v;
1003 }
1004
1005 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1006 {
1007         u32 thresh_lo, thresh_hi;
1008         int use_scaling = 0;
1009
1010         /* Compute a scale to convert nanoseconds in TSC cycles */
1011         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1012                            &vcpu->arch.virtual_tsc_shift,
1013                            &vcpu->arch.virtual_tsc_mult);
1014         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1015
1016         /*
1017          * Compute the variation in TSC rate which is acceptable
1018          * within the range of tolerance and decide if the
1019          * rate being applied is within that bounds of the hardware
1020          * rate.  If so, no scaling or compensation need be done.
1021          */
1022         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1023         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1024         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1025                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1026                 use_scaling = 1;
1027         }
1028         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1029 }
1030
1031 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1032 {
1033         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1034                                       vcpu->arch.virtual_tsc_mult,
1035                                       vcpu->arch.virtual_tsc_shift);
1036         tsc += vcpu->arch.this_tsc_write;
1037         return tsc;
1038 }
1039
1040 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1041 {
1042         struct kvm *kvm = vcpu->kvm;
1043         u64 offset, ns, elapsed;
1044         unsigned long flags;
1045         s64 usdiff;
1046
1047         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1048         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1049         ns = get_kernel_ns();
1050         elapsed = ns - kvm->arch.last_tsc_nsec;
1051
1052         /* n.b - signed multiplication and division required */
1053         usdiff = data - kvm->arch.last_tsc_write;
1054 #ifdef CONFIG_X86_64
1055         usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1056 #else
1057         /* do_div() only does unsigned */
1058         asm("idivl %2; xor %%edx, %%edx"
1059             : "=A"(usdiff)
1060             : "A"(usdiff * 1000), "rm"(vcpu->arch.virtual_tsc_khz));
1061 #endif
1062         do_div(elapsed, 1000);
1063         usdiff -= elapsed;
1064         if (usdiff < 0)
1065                 usdiff = -usdiff;
1066
1067         /*
1068          * Special case: TSC write with a small delta (1 second) of virtual
1069          * cycle time against real time is interpreted as an attempt to
1070          * synchronize the CPU.
1071          *
1072          * For a reliable TSC, we can match TSC offsets, and for an unstable
1073          * TSC, we add elapsed time in this computation.  We could let the
1074          * compensation code attempt to catch up if we fall behind, but
1075          * it's better to try to match offsets from the beginning.
1076          */
1077         if (usdiff < USEC_PER_SEC &&
1078             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1079                 if (!check_tsc_unstable()) {
1080                         offset = kvm->arch.cur_tsc_offset;
1081                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1082                 } else {
1083                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1084                         data += delta;
1085                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1086                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1087                 }
1088         } else {
1089                 /*
1090                  * We split periods of matched TSC writes into generations.
1091                  * For each generation, we track the original measured
1092                  * nanosecond time, offset, and write, so if TSCs are in
1093                  * sync, we can match exact offset, and if not, we can match
1094                  * exact software computation in compute_guest_tsc()
1095                  *
1096                  * These values are tracked in kvm->arch.cur_xxx variables.
1097                  */
1098                 kvm->arch.cur_tsc_generation++;
1099                 kvm->arch.cur_tsc_nsec = ns;
1100                 kvm->arch.cur_tsc_write = data;
1101                 kvm->arch.cur_tsc_offset = offset;
1102                 pr_debug("kvm: new tsc generation %u, clock %llu\n",
1103                          kvm->arch.cur_tsc_generation, data);
1104         }
1105
1106         /*
1107          * We also track th most recent recorded KHZ, write and time to
1108          * allow the matching interval to be extended at each write.
1109          */
1110         kvm->arch.last_tsc_nsec = ns;
1111         kvm->arch.last_tsc_write = data;
1112         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1113
1114         /* Reset of TSC must disable overshoot protection below */
1115         vcpu->arch.hv_clock.tsc_timestamp = 0;
1116         vcpu->arch.last_guest_tsc = data;
1117
1118         /* Keep track of which generation this VCPU has synchronized to */
1119         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1120         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1121         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1122
1123         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1124         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1125 }
1126
1127 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1128
1129 static int kvm_guest_time_update(struct kvm_vcpu *v)
1130 {
1131         unsigned long flags;
1132         struct kvm_vcpu_arch *vcpu = &v->arch;
1133         void *shared_kaddr;
1134         unsigned long this_tsc_khz;
1135         s64 kernel_ns, max_kernel_ns;
1136         u64 tsc_timestamp;
1137         u8 pvclock_flags;
1138
1139         /* Keep irq disabled to prevent changes to the clock */
1140         local_irq_save(flags);
1141         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1142         kernel_ns = get_kernel_ns();
1143         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1144         if (unlikely(this_tsc_khz == 0)) {
1145                 local_irq_restore(flags);
1146                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1147                 return 1;
1148         }
1149
1150         /*
1151          * We may have to catch up the TSC to match elapsed wall clock
1152          * time for two reasons, even if kvmclock is used.
1153          *   1) CPU could have been running below the maximum TSC rate
1154          *   2) Broken TSC compensation resets the base at each VCPU
1155          *      entry to avoid unknown leaps of TSC even when running
1156          *      again on the same CPU.  This may cause apparent elapsed
1157          *      time to disappear, and the guest to stand still or run
1158          *      very slowly.
1159          */
1160         if (vcpu->tsc_catchup) {
1161                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1162                 if (tsc > tsc_timestamp) {
1163                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1164                         tsc_timestamp = tsc;
1165                 }
1166         }
1167
1168         local_irq_restore(flags);
1169
1170         if (!vcpu->time_page)
1171                 return 0;
1172
1173         /*
1174          * Time as measured by the TSC may go backwards when resetting the base
1175          * tsc_timestamp.  The reason for this is that the TSC resolution is
1176          * higher than the resolution of the other clock scales.  Thus, many
1177          * possible measurments of the TSC correspond to one measurement of any
1178          * other clock, and so a spread of values is possible.  This is not a
1179          * problem for the computation of the nanosecond clock; with TSC rates
1180          * around 1GHZ, there can only be a few cycles which correspond to one
1181          * nanosecond value, and any path through this code will inevitably
1182          * take longer than that.  However, with the kernel_ns value itself,
1183          * the precision may be much lower, down to HZ granularity.  If the
1184          * first sampling of TSC against kernel_ns ends in the low part of the
1185          * range, and the second in the high end of the range, we can get:
1186          *
1187          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1188          *
1189          * As the sampling errors potentially range in the thousands of cycles,
1190          * it is possible such a time value has already been observed by the
1191          * guest.  To protect against this, we must compute the system time as
1192          * observed by the guest and ensure the new system time is greater.
1193          */
1194         max_kernel_ns = 0;
1195         if (vcpu->hv_clock.tsc_timestamp) {
1196                 max_kernel_ns = vcpu->last_guest_tsc -
1197                                 vcpu->hv_clock.tsc_timestamp;
1198                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1199                                     vcpu->hv_clock.tsc_to_system_mul,
1200                                     vcpu->hv_clock.tsc_shift);
1201                 max_kernel_ns += vcpu->last_kernel_ns;
1202         }
1203
1204         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1205                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1206                                    &vcpu->hv_clock.tsc_shift,
1207                                    &vcpu->hv_clock.tsc_to_system_mul);
1208                 vcpu->hw_tsc_khz = this_tsc_khz;
1209         }
1210
1211         if (max_kernel_ns > kernel_ns)
1212                 kernel_ns = max_kernel_ns;
1213
1214         /* With all the info we got, fill in the values */
1215         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1216         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1217         vcpu->last_kernel_ns = kernel_ns;
1218         vcpu->last_guest_tsc = tsc_timestamp;
1219
1220         pvclock_flags = 0;
1221         if (vcpu->pvclock_set_guest_stopped_request) {
1222                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1223                 vcpu->pvclock_set_guest_stopped_request = false;
1224         }
1225
1226         vcpu->hv_clock.flags = pvclock_flags;
1227
1228         /*
1229          * The interface expects us to write an even number signaling that the
1230          * update is finished. Since the guest won't see the intermediate
1231          * state, we just increase by 2 at the end.
1232          */
1233         vcpu->hv_clock.version += 2;
1234
1235         shared_kaddr = kmap_atomic(vcpu->time_page);
1236
1237         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1238                sizeof(vcpu->hv_clock));
1239
1240         kunmap_atomic(shared_kaddr);
1241
1242         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1243         return 0;
1244 }
1245
1246 static bool msr_mtrr_valid(unsigned msr)
1247 {
1248         switch (msr) {
1249         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1250         case MSR_MTRRfix64K_00000:
1251         case MSR_MTRRfix16K_80000:
1252         case MSR_MTRRfix16K_A0000:
1253         case MSR_MTRRfix4K_C0000:
1254         case MSR_MTRRfix4K_C8000:
1255         case MSR_MTRRfix4K_D0000:
1256         case MSR_MTRRfix4K_D8000:
1257         case MSR_MTRRfix4K_E0000:
1258         case MSR_MTRRfix4K_E8000:
1259         case MSR_MTRRfix4K_F0000:
1260         case MSR_MTRRfix4K_F8000:
1261         case MSR_MTRRdefType:
1262         case MSR_IA32_CR_PAT:
1263                 return true;
1264         case 0x2f8:
1265                 return true;
1266         }
1267         return false;
1268 }
1269
1270 static bool valid_pat_type(unsigned t)
1271 {
1272         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1273 }
1274
1275 static bool valid_mtrr_type(unsigned t)
1276 {
1277         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1278 }
1279
1280 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1281 {
1282         int i;
1283
1284         if (!msr_mtrr_valid(msr))
1285                 return false;
1286
1287         if (msr == MSR_IA32_CR_PAT) {
1288                 for (i = 0; i < 8; i++)
1289                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1290                                 return false;
1291                 return true;
1292         } else if (msr == MSR_MTRRdefType) {
1293                 if (data & ~0xcff)
1294                         return false;
1295                 return valid_mtrr_type(data & 0xff);
1296         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1297                 for (i = 0; i < 8 ; i++)
1298                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1299                                 return false;
1300                 return true;
1301         }
1302
1303         /* variable MTRRs */
1304         return valid_mtrr_type(data & 0xff);
1305 }
1306
1307 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1308 {
1309         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1310
1311         if (!mtrr_valid(vcpu, msr, data))
1312                 return 1;
1313
1314         if (msr == MSR_MTRRdefType) {
1315                 vcpu->arch.mtrr_state.def_type = data;
1316                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1317         } else if (msr == MSR_MTRRfix64K_00000)
1318                 p[0] = data;
1319         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1320                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1321         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1322                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1323         else if (msr == MSR_IA32_CR_PAT)
1324                 vcpu->arch.pat = data;
1325         else {  /* Variable MTRRs */
1326                 int idx, is_mtrr_mask;
1327                 u64 *pt;
1328
1329                 idx = (msr - 0x200) / 2;
1330                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1331                 if (!is_mtrr_mask)
1332                         pt =
1333                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1334                 else
1335                         pt =
1336                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1337                 *pt = data;
1338         }
1339
1340         kvm_mmu_reset_context(vcpu);
1341         return 0;
1342 }
1343
1344 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1345 {
1346         u64 mcg_cap = vcpu->arch.mcg_cap;
1347         unsigned bank_num = mcg_cap & 0xff;
1348
1349         switch (msr) {
1350         case MSR_IA32_MCG_STATUS:
1351                 vcpu->arch.mcg_status = data;
1352                 break;
1353         case MSR_IA32_MCG_CTL:
1354                 if (!(mcg_cap & MCG_CTL_P))
1355                         return 1;
1356                 if (data != 0 && data != ~(u64)0)
1357                         return -1;
1358                 vcpu->arch.mcg_ctl = data;
1359                 break;
1360         default:
1361                 if (msr >= MSR_IA32_MC0_CTL &&
1362                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1363                         u32 offset = msr - MSR_IA32_MC0_CTL;
1364                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1365                          * some Linux kernels though clear bit 10 in bank 4 to
1366                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1367                          * this to avoid an uncatched #GP in the guest
1368                          */
1369                         if ((offset & 0x3) == 0 &&
1370                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1371                                 return -1;
1372                         vcpu->arch.mce_banks[offset] = data;
1373                         break;
1374                 }
1375                 return 1;
1376         }
1377         return 0;
1378 }
1379
1380 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1381 {
1382         struct kvm *kvm = vcpu->kvm;
1383         int lm = is_long_mode(vcpu);
1384         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1385                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1386         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1387                 : kvm->arch.xen_hvm_config.blob_size_32;
1388         u32 page_num = data & ~PAGE_MASK;
1389         u64 page_addr = data & PAGE_MASK;
1390         u8 *page;
1391         int r;
1392
1393         r = -E2BIG;
1394         if (page_num >= blob_size)
1395                 goto out;
1396         r = -ENOMEM;
1397         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1398         if (IS_ERR(page)) {
1399                 r = PTR_ERR(page);
1400                 goto out;
1401         }
1402         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1403                 goto out_free;
1404         r = 0;
1405 out_free:
1406         kfree(page);
1407 out:
1408         return r;
1409 }
1410
1411 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1412 {
1413         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1414 }
1415
1416 static bool kvm_hv_msr_partition_wide(u32 msr)
1417 {
1418         bool r = false;
1419         switch (msr) {
1420         case HV_X64_MSR_GUEST_OS_ID:
1421         case HV_X64_MSR_HYPERCALL:
1422                 r = true;
1423                 break;
1424         }
1425
1426         return r;
1427 }
1428
1429 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1430 {
1431         struct kvm *kvm = vcpu->kvm;
1432
1433         switch (msr) {
1434         case HV_X64_MSR_GUEST_OS_ID:
1435                 kvm->arch.hv_guest_os_id = data;
1436                 /* setting guest os id to zero disables hypercall page */
1437                 if (!kvm->arch.hv_guest_os_id)
1438                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1439                 break;
1440         case HV_X64_MSR_HYPERCALL: {
1441                 u64 gfn;
1442                 unsigned long addr;
1443                 u8 instructions[4];
1444
1445                 /* if guest os id is not set hypercall should remain disabled */
1446                 if (!kvm->arch.hv_guest_os_id)
1447                         break;
1448                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1449                         kvm->arch.hv_hypercall = data;
1450                         break;
1451                 }
1452                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1453                 addr = gfn_to_hva(kvm, gfn);
1454                 if (kvm_is_error_hva(addr))
1455                         return 1;
1456                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1457                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1458                 if (__copy_to_user((void __user *)addr, instructions, 4))
1459                         return 1;
1460                 kvm->arch.hv_hypercall = data;
1461                 break;
1462         }
1463         default:
1464                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1465                             "data 0x%llx\n", msr, data);
1466                 return 1;
1467         }
1468         return 0;
1469 }
1470
1471 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1472 {
1473         switch (msr) {
1474         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1475                 unsigned long addr;
1476
1477                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1478                         vcpu->arch.hv_vapic = data;
1479                         break;
1480                 }
1481                 addr = gfn_to_hva(vcpu->kvm, data >>
1482                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1483                 if (kvm_is_error_hva(addr))
1484                         return 1;
1485                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1486                         return 1;
1487                 vcpu->arch.hv_vapic = data;
1488                 break;
1489         }
1490         case HV_X64_MSR_EOI:
1491                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1492         case HV_X64_MSR_ICR:
1493                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1494         case HV_X64_MSR_TPR:
1495                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1496         default:
1497                 vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1498                             "data 0x%llx\n", msr, data);
1499                 return 1;
1500         }
1501
1502         return 0;
1503 }
1504
1505 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1506 {
1507         gpa_t gpa = data & ~0x3f;
1508
1509         /* Bits 2:5 are reserved, Should be zero */
1510         if (data & 0x3c)
1511                 return 1;
1512
1513         vcpu->arch.apf.msr_val = data;
1514
1515         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1516                 kvm_clear_async_pf_completion_queue(vcpu);
1517                 kvm_async_pf_hash_reset(vcpu);
1518                 return 0;
1519         }
1520
1521         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1522                 return 1;
1523
1524         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1525         kvm_async_pf_wakeup_all(vcpu);
1526         return 0;
1527 }
1528
1529 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1530 {
1531         if (vcpu->arch.time_page) {
1532                 kvm_release_page_dirty(vcpu->arch.time_page);
1533                 vcpu->arch.time_page = NULL;
1534         }
1535 }
1536
1537 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1538 {
1539         u64 delta;
1540
1541         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1542                 return;
1543
1544         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1545         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1546         vcpu->arch.st.accum_steal = delta;
1547 }
1548
1549 static void record_steal_time(struct kvm_vcpu *vcpu)
1550 {
1551         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1552                 return;
1553
1554         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1555                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1556                 return;
1557
1558         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1559         vcpu->arch.st.steal.version += 2;
1560         vcpu->arch.st.accum_steal = 0;
1561
1562         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1563                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1564 }
1565
1566 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1567 {
1568         bool pr = false;
1569
1570         switch (msr) {
1571         case MSR_EFER:
1572                 return set_efer(vcpu, data);
1573         case MSR_K7_HWCR:
1574                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1575                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1576                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1577                 if (data != 0) {
1578                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1579                                     data);
1580                         return 1;
1581                 }
1582                 break;
1583         case MSR_FAM10H_MMIO_CONF_BASE:
1584                 if (data != 0) {
1585                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1586                                     "0x%llx\n", data);
1587                         return 1;
1588                 }
1589                 break;
1590         case MSR_AMD64_NB_CFG:
1591                 break;
1592         case MSR_IA32_DEBUGCTLMSR:
1593                 if (!data) {
1594                         /* We support the non-activated case already */
1595                         break;
1596                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1597                         /* Values other than LBR and BTF are vendor-specific,
1598                            thus reserved and should throw a #GP */
1599                         return 1;
1600                 }
1601                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1602                             __func__, data);
1603                 break;
1604         case MSR_IA32_UCODE_REV:
1605         case MSR_IA32_UCODE_WRITE:
1606         case MSR_VM_HSAVE_PA:
1607         case MSR_AMD64_PATCH_LOADER:
1608                 break;
1609         case 0x200 ... 0x2ff:
1610                 return set_msr_mtrr(vcpu, msr, data);
1611         case MSR_IA32_APICBASE:
1612                 kvm_set_apic_base(vcpu, data);
1613                 break;
1614         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1615                 return kvm_x2apic_msr_write(vcpu, msr, data);
1616         case MSR_IA32_TSCDEADLINE:
1617                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1618                 break;
1619         case MSR_IA32_MISC_ENABLE:
1620                 vcpu->arch.ia32_misc_enable_msr = data;
1621                 break;
1622         case MSR_KVM_WALL_CLOCK_NEW:
1623         case MSR_KVM_WALL_CLOCK:
1624                 vcpu->kvm->arch.wall_clock = data;
1625                 kvm_write_wall_clock(vcpu->kvm, data);
1626                 break;
1627         case MSR_KVM_SYSTEM_TIME_NEW:
1628         case MSR_KVM_SYSTEM_TIME: {
1629                 kvmclock_reset(vcpu);
1630
1631                 vcpu->arch.time = data;
1632                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1633
1634                 /* we verify if the enable bit is set... */
1635                 if (!(data & 1))
1636                         break;
1637
1638                 /* ...but clean it before doing the actual write */
1639                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1640
1641                 vcpu->arch.time_page =
1642                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1643
1644                 if (is_error_page(vcpu->arch.time_page))
1645                         vcpu->arch.time_page = NULL;
1646
1647                 break;
1648         }
1649         case MSR_KVM_ASYNC_PF_EN:
1650                 if (kvm_pv_enable_async_pf(vcpu, data))
1651                         return 1;
1652                 break;
1653         case MSR_KVM_STEAL_TIME:
1654
1655                 if (unlikely(!sched_info_on()))
1656                         return 1;
1657
1658                 if (data & KVM_STEAL_RESERVED_MASK)
1659                         return 1;
1660
1661                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1662                                                         data & KVM_STEAL_VALID_BITS))
1663                         return 1;
1664
1665                 vcpu->arch.st.msr_val = data;
1666
1667                 if (!(data & KVM_MSR_ENABLED))
1668                         break;
1669
1670                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1671
1672                 preempt_disable();
1673                 accumulate_steal_time(vcpu);
1674                 preempt_enable();
1675
1676                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1677
1678                 break;
1679         case MSR_KVM_PV_EOI_EN:
1680                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
1681                         return 1;
1682                 break;
1683
1684         case MSR_IA32_MCG_CTL:
1685         case MSR_IA32_MCG_STATUS:
1686         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1687                 return set_msr_mce(vcpu, msr, data);
1688
1689         /* Performance counters are not protected by a CPUID bit,
1690          * so we should check all of them in the generic path for the sake of
1691          * cross vendor migration.
1692          * Writing a zero into the event select MSRs disables them,
1693          * which we perfectly emulate ;-). Any other value should be at least
1694          * reported, some guests depend on them.
1695          */
1696         case MSR_K7_EVNTSEL0:
1697         case MSR_K7_EVNTSEL1:
1698         case MSR_K7_EVNTSEL2:
1699         case MSR_K7_EVNTSEL3:
1700                 if (data != 0)
1701                         vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1702                                     "0x%x data 0x%llx\n", msr, data);
1703                 break;
1704         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1705          * so we ignore writes to make it happy.
1706          */
1707         case MSR_K7_PERFCTR0:
1708         case MSR_K7_PERFCTR1:
1709         case MSR_K7_PERFCTR2:
1710         case MSR_K7_PERFCTR3:
1711                 vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1712                             "0x%x data 0x%llx\n", msr, data);
1713                 break;
1714         case MSR_P6_PERFCTR0:
1715         case MSR_P6_PERFCTR1:
1716                 pr = true;
1717         case MSR_P6_EVNTSEL0:
1718         case MSR_P6_EVNTSEL1:
1719                 if (kvm_pmu_msr(vcpu, msr))
1720                         return kvm_pmu_set_msr(vcpu, msr, data);
1721
1722                 if (pr || data != 0)
1723                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
1724                                     "0x%x data 0x%llx\n", msr, data);
1725                 break;
1726         case MSR_K7_CLK_CTL:
1727                 /*
1728                  * Ignore all writes to this no longer documented MSR.
1729                  * Writes are only relevant for old K7 processors,
1730                  * all pre-dating SVM, but a recommended workaround from
1731                  * AMD for these chips. It is possible to specify the
1732                  * affected processor models on the command line, hence
1733                  * the need to ignore the workaround.
1734                  */
1735                 break;
1736         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1737                 if (kvm_hv_msr_partition_wide(msr)) {
1738                         int r;
1739                         mutex_lock(&vcpu->kvm->lock);
1740                         r = set_msr_hyperv_pw(vcpu, msr, data);
1741                         mutex_unlock(&vcpu->kvm->lock);
1742                         return r;
1743                 } else
1744                         return set_msr_hyperv(vcpu, msr, data);
1745                 break;
1746         case MSR_IA32_BBL_CR_CTL3:
1747                 /* Drop writes to this legacy MSR -- see rdmsr
1748                  * counterpart for further detail.
1749                  */
1750                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1751                 break;
1752         case MSR_AMD64_OSVW_ID_LENGTH:
1753                 if (!guest_cpuid_has_osvw(vcpu))
1754                         return 1;
1755                 vcpu->arch.osvw.length = data;
1756                 break;
1757         case MSR_AMD64_OSVW_STATUS:
1758                 if (!guest_cpuid_has_osvw(vcpu))
1759                         return 1;
1760                 vcpu->arch.osvw.status = data;
1761                 break;
1762         default:
1763                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1764                         return xen_hvm_config(vcpu, data);
1765                 if (kvm_pmu_msr(vcpu, msr))
1766                         return kvm_pmu_set_msr(vcpu, msr, data);
1767                 if (!ignore_msrs) {
1768                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1769                                     msr, data);
1770                         return 1;
1771                 } else {
1772                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1773                                     msr, data);
1774                         break;
1775                 }
1776         }
1777         return 0;
1778 }
1779 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1780
1781
1782 /*
1783  * Reads an msr value (of 'msr_index') into 'pdata'.
1784  * Returns 0 on success, non-0 otherwise.
1785  * Assumes vcpu_load() was already called.
1786  */
1787 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1788 {
1789         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1790 }
1791
1792 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1793 {
1794         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1795
1796         if (!msr_mtrr_valid(msr))
1797                 return 1;
1798
1799         if (msr == MSR_MTRRdefType)
1800                 *pdata = vcpu->arch.mtrr_state.def_type +
1801                          (vcpu->arch.mtrr_state.enabled << 10);
1802         else if (msr == MSR_MTRRfix64K_00000)
1803                 *pdata = p[0];
1804         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1805                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1806         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1807                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1808         else if (msr == MSR_IA32_CR_PAT)
1809                 *pdata = vcpu->arch.pat;
1810         else {  /* Variable MTRRs */
1811                 int idx, is_mtrr_mask;
1812                 u64 *pt;
1813
1814                 idx = (msr - 0x200) / 2;
1815                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1816                 if (!is_mtrr_mask)
1817                         pt =
1818                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1819                 else
1820                         pt =
1821                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1822                 *pdata = *pt;
1823         }
1824
1825         return 0;
1826 }
1827
1828 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1829 {
1830         u64 data;
1831         u64 mcg_cap = vcpu->arch.mcg_cap;
1832         unsigned bank_num = mcg_cap & 0xff;
1833
1834         switch (msr) {
1835         case MSR_IA32_P5_MC_ADDR:
1836         case MSR_IA32_P5_MC_TYPE:
1837                 data = 0;
1838                 break;
1839         case MSR_IA32_MCG_CAP:
1840                 data = vcpu->arch.mcg_cap;
1841                 break;
1842         case MSR_IA32_MCG_CTL:
1843                 if (!(mcg_cap & MCG_CTL_P))
1844                         return 1;
1845                 data = vcpu->arch.mcg_ctl;
1846                 break;
1847         case MSR_IA32_MCG_STATUS:
1848                 data = vcpu->arch.mcg_status;
1849                 break;
1850         default:
1851                 if (msr >= MSR_IA32_MC0_CTL &&
1852                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1853                         u32 offset = msr - MSR_IA32_MC0_CTL;
1854                         data = vcpu->arch.mce_banks[offset];
1855                         break;
1856                 }
1857                 return 1;
1858         }
1859         *pdata = data;
1860         return 0;
1861 }
1862
1863 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1864 {
1865         u64 data = 0;
1866         struct kvm *kvm = vcpu->kvm;
1867
1868         switch (msr) {
1869         case HV_X64_MSR_GUEST_OS_ID:
1870                 data = kvm->arch.hv_guest_os_id;
1871                 break;
1872         case HV_X64_MSR_HYPERCALL:
1873                 data = kvm->arch.hv_hypercall;
1874                 break;
1875         default:
1876                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1877                 return 1;
1878         }
1879
1880         *pdata = data;
1881         return 0;
1882 }
1883
1884 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1885 {
1886         u64 data = 0;
1887
1888         switch (msr) {
1889         case HV_X64_MSR_VP_INDEX: {
1890                 int r;
1891                 struct kvm_vcpu *v;
1892                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1893                         if (v == vcpu)
1894                                 data = r;
1895                 break;
1896         }
1897         case HV_X64_MSR_EOI:
1898                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1899         case HV_X64_MSR_ICR:
1900                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1901         case HV_X64_MSR_TPR:
1902                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1903         case HV_X64_MSR_APIC_ASSIST_PAGE:
1904                 data = vcpu->arch.hv_vapic;
1905                 break;
1906         default:
1907                 vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1908                 return 1;
1909         }
1910         *pdata = data;
1911         return 0;
1912 }
1913
1914 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1915 {
1916         u64 data;
1917
1918         switch (msr) {
1919         case MSR_IA32_PLATFORM_ID:
1920         case MSR_IA32_EBL_CR_POWERON:
1921         case MSR_IA32_DEBUGCTLMSR:
1922         case MSR_IA32_LASTBRANCHFROMIP:
1923         case MSR_IA32_LASTBRANCHTOIP:
1924         case MSR_IA32_LASTINTFROMIP:
1925         case MSR_IA32_LASTINTTOIP:
1926         case MSR_K8_SYSCFG:
1927         case MSR_K7_HWCR:
1928         case MSR_VM_HSAVE_PA:
1929         case MSR_K7_EVNTSEL0:
1930         case MSR_K7_PERFCTR0:
1931         case MSR_K8_INT_PENDING_MSG:
1932         case MSR_AMD64_NB_CFG:
1933         case MSR_FAM10H_MMIO_CONF_BASE:
1934                 data = 0;
1935                 break;
1936         case MSR_P6_PERFCTR0:
1937         case MSR_P6_PERFCTR1:
1938         case MSR_P6_EVNTSEL0:
1939         case MSR_P6_EVNTSEL1:
1940                 if (kvm_pmu_msr(vcpu, msr))
1941                         return kvm_pmu_get_msr(vcpu, msr, pdata);
1942                 data = 0;
1943                 break;
1944         case MSR_IA32_UCODE_REV:
1945                 data = 0x100000000ULL;
1946                 break;
1947         case MSR_MTRRcap:
1948                 data = 0x500 | KVM_NR_VAR_MTRR;
1949                 break;
1950         case 0x200 ... 0x2ff:
1951                 return get_msr_mtrr(vcpu, msr, pdata);
1952         case 0xcd: /* fsb frequency */
1953                 data = 3;
1954                 break;
1955                 /*
1956                  * MSR_EBC_FREQUENCY_ID
1957                  * Conservative value valid for even the basic CPU models.
1958                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1959                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1960                  * and 266MHz for model 3, or 4. Set Core Clock
1961                  * Frequency to System Bus Frequency Ratio to 1 (bits
1962                  * 31:24) even though these are only valid for CPU
1963                  * models > 2, however guests may end up dividing or
1964                  * multiplying by zero otherwise.
1965                  */
1966         case MSR_EBC_FREQUENCY_ID:
1967                 data = 1 << 24;
1968                 break;
1969         case MSR_IA32_APICBASE:
1970                 data = kvm_get_apic_base(vcpu);
1971                 break;
1972         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1973                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1974                 break;
1975         case MSR_IA32_TSCDEADLINE:
1976                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1977                 break;
1978         case MSR_IA32_MISC_ENABLE:
1979                 data = vcpu->arch.ia32_misc_enable_msr;
1980                 break;
1981         case MSR_IA32_PERF_STATUS:
1982                 /* TSC increment by tick */
1983                 data = 1000ULL;
1984                 /* CPU multiplier */
1985                 data |= (((uint64_t)4ULL) << 40);
1986                 break;
1987         case MSR_EFER:
1988                 data = vcpu->arch.efer;
1989                 break;
1990         case MSR_KVM_WALL_CLOCK:
1991         case MSR_KVM_WALL_CLOCK_NEW:
1992                 data = vcpu->kvm->arch.wall_clock;
1993                 break;
1994         case MSR_KVM_SYSTEM_TIME:
1995         case MSR_KVM_SYSTEM_TIME_NEW:
1996                 data = vcpu->arch.time;
1997                 break;
1998         case MSR_KVM_ASYNC_PF_EN:
1999                 data = vcpu->arch.apf.msr_val;
2000                 break;
2001         case MSR_KVM_STEAL_TIME:
2002                 data = vcpu->arch.st.msr_val;
2003                 break;
2004         case MSR_IA32_P5_MC_ADDR:
2005         case MSR_IA32_P5_MC_TYPE:
2006         case MSR_IA32_MCG_CAP:
2007         case MSR_IA32_MCG_CTL:
2008         case MSR_IA32_MCG_STATUS:
2009         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
2010                 return get_msr_mce(vcpu, msr, pdata);
2011         case MSR_K7_CLK_CTL:
2012                 /*
2013                  * Provide expected ramp-up count for K7. All other
2014                  * are set to zero, indicating minimum divisors for
2015                  * every field.
2016                  *
2017                  * This prevents guest kernels on AMD host with CPU
2018                  * type 6, model 8 and higher from exploding due to
2019                  * the rdmsr failing.
2020                  */
2021                 data = 0x20000000;
2022                 break;
2023         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2024                 if (kvm_hv_msr_partition_wide(msr)) {
2025                         int r;
2026                         mutex_lock(&vcpu->kvm->lock);
2027                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
2028                         mutex_unlock(&vcpu->kvm->lock);
2029                         return r;
2030                 } else
2031                         return get_msr_hyperv(vcpu, msr, pdata);
2032                 break;
2033         case MSR_IA32_BBL_CR_CTL3:
2034                 /* This legacy MSR exists but isn't fully documented in current
2035                  * silicon.  It is however accessed by winxp in very narrow
2036                  * scenarios where it sets bit #19, itself documented as
2037                  * a "reserved" bit.  Best effort attempt to source coherent
2038                  * read data here should the balance of the register be
2039                  * interpreted by the guest:
2040                  *
2041                  * L2 cache control register 3: 64GB range, 256KB size,
2042                  * enabled, latency 0x1, configured
2043                  */
2044                 data = 0xbe702111;
2045                 break;
2046         case MSR_AMD64_OSVW_ID_LENGTH:
2047                 if (!guest_cpuid_has_osvw(vcpu))
2048                         return 1;
2049                 data = vcpu->arch.osvw.length;
2050                 break;
2051         case MSR_AMD64_OSVW_STATUS:
2052                 if (!guest_cpuid_has_osvw(vcpu))
2053                         return 1;
2054                 data = vcpu->arch.osvw.status;
2055                 break;
2056         default:
2057                 if (kvm_pmu_msr(vcpu, msr))
2058                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2059                 if (!ignore_msrs) {
2060                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2061                         return 1;
2062                 } else {
2063                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2064                         data = 0;
2065                 }
2066                 break;
2067         }
2068         *pdata = data;
2069         return 0;
2070 }
2071 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2072
2073 /*
2074  * Read or write a bunch of msrs. All parameters are kernel addresses.
2075  *
2076  * @return number of msrs set successfully.
2077  */
2078 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2079                     struct kvm_msr_entry *entries,
2080                     int (*do_msr)(struct kvm_vcpu *vcpu,
2081                                   unsigned index, u64 *data))
2082 {
2083         int i, idx;
2084
2085         idx = srcu_read_lock(&vcpu->kvm->srcu);
2086         for (i = 0; i < msrs->nmsrs; ++i)
2087                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2088                         break;
2089         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2090
2091         return i;
2092 }
2093
2094 /*
2095  * Read or write a bunch of msrs. Parameters are user addresses.
2096  *
2097  * @return number of msrs set successfully.
2098  */
2099 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2100                   int (*do_msr)(struct kvm_vcpu *vcpu,
2101                                 unsigned index, u64 *data),
2102                   int writeback)
2103 {
2104         struct kvm_msrs msrs;
2105         struct kvm_msr_entry *entries;
2106         int r, n;
2107         unsigned size;
2108
2109         r = -EFAULT;
2110         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2111                 goto out;
2112
2113         r = -E2BIG;
2114         if (msrs.nmsrs >= MAX_IO_MSRS)
2115                 goto out;
2116
2117         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2118         entries = memdup_user(user_msrs->entries, size);
2119         if (IS_ERR(entries)) {
2120                 r = PTR_ERR(entries);
2121                 goto out;
2122         }
2123
2124         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2125         if (r < 0)
2126                 goto out_free;
2127
2128         r = -EFAULT;
2129         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2130                 goto out_free;
2131
2132         r = n;
2133
2134 out_free:
2135         kfree(entries);
2136 out:
2137         return r;
2138 }
2139
2140 int kvm_dev_ioctl_check_extension(long ext)
2141 {
2142         int r;
2143
2144         switch (ext) {
2145         case KVM_CAP_IRQCHIP:
2146         case KVM_CAP_HLT:
2147         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2148         case KVM_CAP_SET_TSS_ADDR:
2149         case KVM_CAP_EXT_CPUID:
2150         case KVM_CAP_CLOCKSOURCE:
2151         case KVM_CAP_PIT:
2152         case KVM_CAP_NOP_IO_DELAY:
2153         case KVM_CAP_MP_STATE:
2154         case KVM_CAP_SYNC_MMU:
2155         case KVM_CAP_USER_NMI:
2156         case KVM_CAP_REINJECT_CONTROL:
2157         case KVM_CAP_IRQ_INJECT_STATUS:
2158         case KVM_CAP_ASSIGN_DEV_IRQ:
2159         case KVM_CAP_IRQFD:
2160         case KVM_CAP_IOEVENTFD:
2161         case KVM_CAP_PIT2:
2162         case KVM_CAP_PIT_STATE2:
2163         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2164         case KVM_CAP_XEN_HVM:
2165         case KVM_CAP_ADJUST_CLOCK:
2166         case KVM_CAP_VCPU_EVENTS:
2167         case KVM_CAP_HYPERV:
2168         case KVM_CAP_HYPERV_VAPIC:
2169         case KVM_CAP_HYPERV_SPIN:
2170         case KVM_CAP_PCI_SEGMENT:
2171         case KVM_CAP_DEBUGREGS:
2172         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2173         case KVM_CAP_XSAVE:
2174         case KVM_CAP_ASYNC_PF:
2175         case KVM_CAP_GET_TSC_KHZ:
2176         case KVM_CAP_PCI_2_3:
2177         case KVM_CAP_KVMCLOCK_CTRL:
2178                 r = 1;
2179                 break;
2180         case KVM_CAP_COALESCED_MMIO:
2181                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2182                 break;
2183         case KVM_CAP_VAPIC:
2184                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2185                 break;
2186         case KVM_CAP_NR_VCPUS:
2187                 r = KVM_SOFT_MAX_VCPUS;
2188                 break;
2189         case KVM_CAP_MAX_VCPUS:
2190                 r = KVM_MAX_VCPUS;
2191                 break;
2192         case KVM_CAP_NR_MEMSLOTS:
2193                 r = KVM_MEMORY_SLOTS;
2194                 break;
2195         case KVM_CAP_PV_MMU:    /* obsolete */
2196                 r = 0;
2197                 break;
2198         case KVM_CAP_IOMMU:
2199                 r = iommu_present(&pci_bus_type);
2200                 break;
2201         case KVM_CAP_MCE:
2202                 r = KVM_MAX_MCE_BANKS;
2203                 break;
2204         case KVM_CAP_XCRS:
2205                 r = cpu_has_xsave;
2206                 break;
2207         case KVM_CAP_TSC_CONTROL:
2208                 r = kvm_has_tsc_control;
2209                 break;
2210         case KVM_CAP_TSC_DEADLINE_TIMER:
2211                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2212                 break;
2213         default:
2214                 r = 0;
2215                 break;
2216         }
2217         return r;
2218
2219 }
2220
2221 long kvm_arch_dev_ioctl(struct file *filp,
2222                         unsigned int ioctl, unsigned long arg)
2223 {
2224         void __user *argp = (void __user *)arg;
2225         long r;
2226
2227         switch (ioctl) {
2228         case KVM_GET_MSR_INDEX_LIST: {
2229                 struct kvm_msr_list __user *user_msr_list = argp;
2230                 struct kvm_msr_list msr_list;
2231                 unsigned n;
2232
2233                 r = -EFAULT;
2234                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2235                         goto out;
2236                 n = msr_list.nmsrs;
2237                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2238                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2239                         goto out;
2240                 r = -E2BIG;
2241                 if (n < msr_list.nmsrs)
2242                         goto out;
2243                 r = -EFAULT;
2244                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2245                                  num_msrs_to_save * sizeof(u32)))
2246                         goto out;
2247                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2248                                  &emulated_msrs,
2249                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2250                         goto out;
2251                 r = 0;
2252                 break;
2253         }
2254         case KVM_GET_SUPPORTED_CPUID: {
2255                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2256                 struct kvm_cpuid2 cpuid;
2257
2258                 r = -EFAULT;
2259                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2260                         goto out;
2261                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2262                                                       cpuid_arg->entries);
2263                 if (r)
2264                         goto out;
2265
2266                 r = -EFAULT;
2267                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2268                         goto out;
2269                 r = 0;
2270                 break;
2271         }
2272         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2273                 u64 mce_cap;
2274
2275                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2276                 r = -EFAULT;
2277                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2278                         goto out;
2279                 r = 0;
2280                 break;
2281         }
2282         default:
2283                 r = -EINVAL;
2284         }
2285 out:
2286         return r;
2287 }
2288
2289 static void wbinvd_ipi(void *garbage)
2290 {
2291         wbinvd();
2292 }
2293
2294 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2295 {
2296         return vcpu->kvm->arch.iommu_domain &&
2297                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2298 }
2299
2300 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2301 {
2302         /* Address WBINVD may be executed by guest */
2303         if (need_emulate_wbinvd(vcpu)) {
2304                 if (kvm_x86_ops->has_wbinvd_exit())
2305                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2306                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2307                         smp_call_function_single(vcpu->cpu,
2308                                         wbinvd_ipi, NULL, 1);
2309         }
2310
2311         kvm_x86_ops->vcpu_load(vcpu, cpu);
2312
2313         /* Apply any externally detected TSC adjustments (due to suspend) */
2314         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2315                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2316                 vcpu->arch.tsc_offset_adjustment = 0;
2317                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
2318         }
2319
2320         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2321                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2322                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2323                 if (tsc_delta < 0)
2324                         mark_tsc_unstable("KVM discovered backwards TSC");
2325                 if (check_tsc_unstable()) {
2326                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2327                                                 vcpu->arch.last_guest_tsc);
2328                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2329                         vcpu->arch.tsc_catchup = 1;
2330                 }
2331                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2332                 if (vcpu->cpu != cpu)
2333                         kvm_migrate_timers(vcpu);
2334                 vcpu->cpu = cpu;
2335         }
2336
2337         accumulate_steal_time(vcpu);
2338         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2339 }
2340
2341 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2342 {
2343         kvm_x86_ops->vcpu_put(vcpu);
2344         kvm_put_guest_fpu(vcpu);
2345         vcpu->arch.last_host_tsc = native_read_tsc();
2346 }
2347
2348 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2349                                     struct kvm_lapic_state *s)
2350 {
2351         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2352
2353         return 0;
2354 }
2355
2356 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2357                                     struct kvm_lapic_state *s)
2358 {
2359         kvm_apic_post_state_restore(vcpu, s);
2360         update_cr8_intercept(vcpu);
2361
2362         return 0;
2363 }
2364
2365 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2366                                     struct kvm_interrupt *irq)
2367 {
2368         if (irq->irq < 0 || irq->irq >= 256)
2369                 return -EINVAL;
2370         if (irqchip_in_kernel(vcpu->kvm))
2371                 return -ENXIO;
2372
2373         kvm_queue_interrupt(vcpu, irq->irq, false);
2374         kvm_make_request(KVM_REQ_EVENT, vcpu);
2375
2376         return 0;
2377 }
2378
2379 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2380 {
2381         kvm_inject_nmi(vcpu);
2382
2383         return 0;
2384 }
2385
2386 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2387                                            struct kvm_tpr_access_ctl *tac)
2388 {
2389         if (tac->flags)
2390                 return -EINVAL;
2391         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2392         return 0;
2393 }
2394
2395 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2396                                         u64 mcg_cap)
2397 {
2398         int r;
2399         unsigned bank_num = mcg_cap & 0xff, bank;
2400
2401         r = -EINVAL;
2402         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2403                 goto out;
2404         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2405                 goto out;
2406         r = 0;
2407         vcpu->arch.mcg_cap = mcg_cap;
2408         /* Init IA32_MCG_CTL to all 1s */
2409         if (mcg_cap & MCG_CTL_P)
2410                 vcpu->arch.mcg_ctl = ~(u64)0;
2411         /* Init IA32_MCi_CTL to all 1s */
2412         for (bank = 0; bank < bank_num; bank++)
2413                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2414 out:
2415         return r;
2416 }
2417
2418 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2419                                       struct kvm_x86_mce *mce)
2420 {
2421         u64 mcg_cap = vcpu->arch.mcg_cap;
2422         unsigned bank_num = mcg_cap & 0xff;
2423         u64 *banks = vcpu->arch.mce_banks;
2424
2425         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2426                 return -EINVAL;
2427         /*
2428          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2429          * reporting is disabled
2430          */
2431         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2432             vcpu->arch.mcg_ctl != ~(u64)0)
2433                 return 0;
2434         banks += 4 * mce->bank;
2435         /*
2436          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2437          * reporting is disabled for the bank
2438          */
2439         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2440                 return 0;
2441         if (mce->status & MCI_STATUS_UC) {
2442                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2443                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2444                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2445                         return 0;
2446                 }
2447                 if (banks[1] & MCI_STATUS_VAL)
2448                         mce->status |= MCI_STATUS_OVER;
2449                 banks[2] = mce->addr;
2450                 banks[3] = mce->misc;
2451                 vcpu->arch.mcg_status = mce->mcg_status;
2452                 banks[1] = mce->status;
2453                 kvm_queue_exception(vcpu, MC_VECTOR);
2454         } else if (!(banks[1] & MCI_STATUS_VAL)
2455                    || !(banks[1] & MCI_STATUS_UC)) {
2456                 if (banks[1] & MCI_STATUS_VAL)
2457                         mce->status |= MCI_STATUS_OVER;
2458                 banks[2] = mce->addr;
2459                 banks[3] = mce->misc;
2460                 banks[1] = mce->status;
2461         } else
2462                 banks[1] |= MCI_STATUS_OVER;
2463         return 0;
2464 }
2465
2466 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2467                                                struct kvm_vcpu_events *events)
2468 {
2469         process_nmi(vcpu);
2470         events->exception.injected =
2471                 vcpu->arch.exception.pending &&
2472                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2473         events->exception.nr = vcpu->arch.exception.nr;
2474         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2475         events->exception.pad = 0;
2476         events->exception.error_code = vcpu->arch.exception.error_code;
2477
2478         events->interrupt.injected =
2479                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2480         events->interrupt.nr = vcpu->arch.interrupt.nr;
2481         events->interrupt.soft = 0;
2482         events->interrupt.shadow =
2483                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2484                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2485
2486         events->nmi.injected = vcpu->arch.nmi_injected;
2487         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2488         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2489         events->nmi.pad = 0;
2490
2491         events->sipi_vector = vcpu->arch.sipi_vector;
2492
2493         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2494                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2495                          | KVM_VCPUEVENT_VALID_SHADOW);
2496         memset(&events->reserved, 0, sizeof(events->reserved));
2497 }
2498
2499 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2500                                               struct kvm_vcpu_events *events)
2501 {
2502         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2503                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2504                               | KVM_VCPUEVENT_VALID_SHADOW))
2505                 return -EINVAL;
2506
2507         process_nmi(vcpu);
2508         vcpu->arch.exception.pending = events->exception.injected;
2509         vcpu->arch.exception.nr = events->exception.nr;
2510         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2511         vcpu->arch.exception.error_code = events->exception.error_code;
2512
2513         vcpu->arch.interrupt.pending = events->interrupt.injected;
2514         vcpu->arch.interrupt.nr = events->interrupt.nr;
2515         vcpu->arch.interrupt.soft = events->interrupt.soft;
2516         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2517                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2518                                                   events->interrupt.shadow);
2519
2520         vcpu->arch.nmi_injected = events->nmi.injected;
2521         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2522                 vcpu->arch.nmi_pending = events->nmi.pending;
2523         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2524
2525         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2526                 vcpu->arch.sipi_vector = events->sipi_vector;
2527
2528         kvm_make_request(KVM_REQ_EVENT, vcpu);
2529
2530         return 0;
2531 }
2532
2533 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2534                                              struct kvm_debugregs *dbgregs)
2535 {
2536         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2537         dbgregs->dr6 = vcpu->arch.dr6;
2538         dbgregs->dr7 = vcpu->arch.dr7;
2539         dbgregs->flags = 0;
2540         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2541 }
2542
2543 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2544                                             struct kvm_debugregs *dbgregs)
2545 {
2546         if (dbgregs->flags)
2547                 return -EINVAL;
2548
2549         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2550         vcpu->arch.dr6 = dbgregs->dr6;
2551         vcpu->arch.dr7 = dbgregs->dr7;
2552
2553         return 0;
2554 }
2555
2556 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2557                                          struct kvm_xsave *guest_xsave)
2558 {
2559         if (cpu_has_xsave)
2560                 memcpy(guest_xsave->region,
2561                         &vcpu->arch.guest_fpu.state->xsave,
2562                         xstate_size);
2563         else {
2564                 memcpy(guest_xsave->region,
2565                         &vcpu->arch.guest_fpu.state->fxsave,
2566                         sizeof(struct i387_fxsave_struct));
2567                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2568                         XSTATE_FPSSE;
2569         }
2570 }
2571
2572 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2573                                         struct kvm_xsave *guest_xsave)
2574 {
2575         u64 xstate_bv =
2576                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2577
2578         if (cpu_has_xsave)
2579                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2580                         guest_xsave->region, xstate_size);
2581         else {
2582                 if (xstate_bv & ~XSTATE_FPSSE)
2583                         return -EINVAL;
2584                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2585                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2586         }
2587         return 0;
2588 }
2589
2590 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2591                                         struct kvm_xcrs *guest_xcrs)
2592 {
2593         if (!cpu_has_xsave) {
2594                 guest_xcrs->nr_xcrs = 0;
2595                 return;
2596         }
2597
2598         guest_xcrs->nr_xcrs = 1;
2599         guest_xcrs->flags = 0;
2600         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2601         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2602 }
2603
2604 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2605                                        struct kvm_xcrs *guest_xcrs)
2606 {
2607         int i, r = 0;
2608
2609         if (!cpu_has_xsave)
2610                 return -EINVAL;
2611
2612         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2613                 return -EINVAL;
2614
2615         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2616                 /* Only support XCR0 currently */
2617                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2618                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2619                                 guest_xcrs->xcrs[0].value);
2620                         break;
2621                 }
2622         if (r)
2623                 r = -EINVAL;
2624         return r;
2625 }
2626
2627 /*
2628  * kvm_set_guest_paused() indicates to the guest kernel that it has been
2629  * stopped by the hypervisor.  This function will be called from the host only.
2630  * EINVAL is returned when the host attempts to set the flag for a guest that
2631  * does not support pv clocks.
2632  */
2633 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
2634 {
2635         if (!vcpu->arch.time_page)
2636                 return -EINVAL;
2637         vcpu->arch.pvclock_set_guest_stopped_request = true;
2638         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2639         return 0;
2640 }
2641
2642 long kvm_arch_vcpu_ioctl(struct file *filp,
2643                          unsigned int ioctl, unsigned long arg)
2644 {
2645         struct kvm_vcpu *vcpu = filp->private_data;
2646         void __user *argp = (void __user *)arg;
2647         int r;
2648         union {
2649                 struct kvm_lapic_state *lapic;
2650                 struct kvm_xsave *xsave;
2651                 struct kvm_xcrs *xcrs;
2652                 void *buffer;
2653         } u;
2654
2655         u.buffer = NULL;
2656         switch (ioctl) {
2657         case KVM_GET_LAPIC: {
2658                 r = -EINVAL;
2659                 if (!vcpu->arch.apic)
2660                         goto out;
2661                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2662
2663                 r = -ENOMEM;
2664                 if (!u.lapic)
2665                         goto out;
2666                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2667                 if (r)
2668                         goto out;
2669                 r = -EFAULT;
2670                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2671                         goto out;
2672                 r = 0;
2673                 break;
2674         }
2675         case KVM_SET_LAPIC: {
2676                 r = -EINVAL;
2677                 if (!vcpu->arch.apic)
2678                         goto out;
2679                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
2680                 if (IS_ERR(u.lapic)) {
2681                         r = PTR_ERR(u.lapic);
2682                         goto out;
2683                 }
2684
2685                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2686                 if (r)
2687                         goto out;
2688                 r = 0;
2689                 break;
2690         }
2691         case KVM_INTERRUPT: {
2692                 struct kvm_interrupt irq;
2693
2694                 r = -EFAULT;
2695                 if (copy_from_user(&irq, argp, sizeof irq))
2696                         goto out;
2697                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2698                 if (r)
2699                         goto out;
2700                 r = 0;
2701                 break;
2702         }
2703         case KVM_NMI: {
2704                 r = kvm_vcpu_ioctl_nmi(vcpu);
2705                 if (r)
2706                         goto out;
2707                 r = 0;
2708                 break;
2709         }
2710         case KVM_SET_CPUID: {
2711                 struct kvm_cpuid __user *cpuid_arg = argp;
2712                 struct kvm_cpuid cpuid;
2713
2714                 r = -EFAULT;
2715                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2716                         goto out;
2717                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2718                 if (r)
2719                         goto out;
2720                 break;
2721         }
2722         case KVM_SET_CPUID2: {
2723                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2724                 struct kvm_cpuid2 cpuid;
2725
2726                 r = -EFAULT;
2727                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2728                         goto out;
2729                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2730                                               cpuid_arg->entries);
2731                 if (r)
2732                         goto out;
2733                 break;
2734         }
2735         case KVM_GET_CPUID2: {
2736                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2737                 struct kvm_cpuid2 cpuid;
2738
2739                 r = -EFAULT;
2740                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2741                         goto out;
2742                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2743                                               cpuid_arg->entries);
2744                 if (r)
2745                         goto out;
2746                 r = -EFAULT;
2747                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2748                         goto out;
2749                 r = 0;
2750                 break;
2751         }
2752         case KVM_GET_MSRS:
2753                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2754                 break;
2755         case KVM_SET_MSRS:
2756                 r = msr_io(vcpu, argp, do_set_msr, 0);
2757                 break;
2758         case KVM_TPR_ACCESS_REPORTING: {
2759                 struct kvm_tpr_access_ctl tac;
2760
2761                 r = -EFAULT;
2762                 if (copy_from_user(&tac, argp, sizeof tac))
2763                         goto out;
2764                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2765                 if (r)
2766                         goto out;
2767                 r = -EFAULT;
2768                 if (copy_to_user(argp, &tac, sizeof tac))
2769                         goto out;
2770                 r = 0;
2771                 break;
2772         };
2773         case KVM_SET_VAPIC_ADDR: {
2774                 struct kvm_vapic_addr va;
2775
2776                 r = -EINVAL;
2777                 if (!irqchip_in_kernel(vcpu->kvm))
2778                         goto out;
2779                 r = -EFAULT;
2780                 if (copy_from_user(&va, argp, sizeof va))
2781                         goto out;
2782                 r = 0;
2783                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2784                 break;
2785         }
2786         case KVM_X86_SETUP_MCE: {
2787                 u64 mcg_cap;
2788
2789                 r = -EFAULT;
2790                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2791                         goto out;
2792                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2793                 break;
2794         }
2795         case KVM_X86_SET_MCE: {
2796                 struct kvm_x86_mce mce;
2797
2798                 r = -EFAULT;
2799                 if (copy_from_user(&mce, argp, sizeof mce))
2800                         goto out;
2801                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2802                 break;
2803         }
2804         case KVM_GET_VCPU_EVENTS: {
2805                 struct kvm_vcpu_events events;
2806
2807                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2808
2809                 r = -EFAULT;
2810                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2811                         break;
2812                 r = 0;
2813                 break;
2814         }
2815         case KVM_SET_VCPU_EVENTS: {
2816                 struct kvm_vcpu_events events;
2817
2818                 r = -EFAULT;
2819                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2820                         break;
2821
2822                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2823                 break;
2824         }
2825         case KVM_GET_DEBUGREGS: {
2826                 struct kvm_debugregs dbgregs;
2827
2828                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2829
2830                 r = -EFAULT;
2831                 if (copy_to_user(argp, &dbgregs,
2832                                  sizeof(struct kvm_debugregs)))
2833                         break;
2834                 r = 0;
2835                 break;
2836         }
2837         case KVM_SET_DEBUGREGS: {
2838                 struct kvm_debugregs dbgregs;
2839
2840                 r = -EFAULT;
2841                 if (copy_from_user(&dbgregs, argp,
2842                                    sizeof(struct kvm_debugregs)))
2843                         break;
2844
2845                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2846                 break;
2847         }
2848         case KVM_GET_XSAVE: {
2849                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2850                 r = -ENOMEM;
2851                 if (!u.xsave)
2852                         break;
2853
2854                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2855
2856                 r = -EFAULT;
2857                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2858                         break;
2859                 r = 0;
2860                 break;
2861         }
2862         case KVM_SET_XSAVE: {
2863                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
2864                 if (IS_ERR(u.xsave)) {
2865                         r = PTR_ERR(u.xsave);
2866                         goto out;
2867                 }
2868
2869                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2870                 break;
2871         }
2872         case KVM_GET_XCRS: {
2873                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2874                 r = -ENOMEM;
2875                 if (!u.xcrs)
2876                         break;
2877
2878                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2879
2880                 r = -EFAULT;
2881                 if (copy_to_user(argp, u.xcrs,
2882                                  sizeof(struct kvm_xcrs)))
2883                         break;
2884                 r = 0;
2885                 break;
2886         }
2887         case KVM_SET_XCRS: {
2888                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
2889                 if (IS_ERR(u.xcrs)) {
2890                         r = PTR_ERR(u.xcrs);
2891                         goto out;
2892                 }
2893
2894                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2895                 break;
2896         }
2897         case KVM_SET_TSC_KHZ: {
2898                 u32 user_tsc_khz;
2899
2900                 r = -EINVAL;
2901                 user_tsc_khz = (u32)arg;
2902
2903                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
2904                         goto out;
2905
2906                 if (user_tsc_khz == 0)
2907                         user_tsc_khz = tsc_khz;
2908
2909                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
2910
2911                 r = 0;
2912                 goto out;
2913         }
2914         case KVM_GET_TSC_KHZ: {
2915                 r = vcpu->arch.virtual_tsc_khz;
2916                 goto out;
2917         }
2918         case KVM_KVMCLOCK_CTRL: {
2919                 r = kvm_set_guest_paused(vcpu);
2920                 goto out;
2921         }
2922         default:
2923                 r = -EINVAL;
2924         }
2925 out:
2926         kfree(u.buffer);
2927         return r;
2928 }
2929
2930 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
2931 {
2932         return VM_FAULT_SIGBUS;
2933 }
2934
2935 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2936 {
2937         int ret;
2938
2939         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2940                 return -1;
2941         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2942         return ret;
2943 }
2944
2945 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2946                                               u64 ident_addr)
2947 {
2948         kvm->arch.ept_identity_map_addr = ident_addr;
2949         return 0;
2950 }
2951
2952 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2953                                           u32 kvm_nr_mmu_pages)
2954 {
2955         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2956                 return -EINVAL;
2957
2958         mutex_lock(&kvm->slots_lock);
2959         spin_lock(&kvm->mmu_lock);
2960
2961         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2962         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2963
2964         spin_unlock(&kvm->mmu_lock);
2965         mutex_unlock(&kvm->slots_lock);
2966         return 0;
2967 }
2968
2969 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2970 {
2971         return kvm->arch.n_max_mmu_pages;
2972 }
2973
2974 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2975 {
2976         int r;
2977
2978         r = 0;
2979         switch (chip->chip_id) {
2980         case KVM_IRQCHIP_PIC_MASTER:
2981                 memcpy(&chip->chip.pic,
2982                         &pic_irqchip(kvm)->pics[0],
2983                         sizeof(struct kvm_pic_state));
2984                 break;
2985         case KVM_IRQCHIP_PIC_SLAVE:
2986                 memcpy(&chip->chip.pic,
2987                         &pic_irqchip(kvm)->pics[1],
2988                         sizeof(struct kvm_pic_state));
2989                 break;
2990         case KVM_IRQCHIP_IOAPIC:
2991                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2992                 break;
2993         default:
2994                 r = -EINVAL;
2995                 break;
2996         }
2997         return r;
2998 }
2999
3000 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3001 {
3002         int r;
3003
3004         r = 0;
3005         switch (chip->chip_id) {
3006         case KVM_IRQCHIP_PIC_MASTER:
3007                 spin_lock(&pic_irqchip(kvm)->lock);
3008                 memcpy(&pic_irqchip(kvm)->pics[0],
3009                         &chip->chip.pic,
3010                         sizeof(struct kvm_pic_state));
3011                 spin_unlock(&pic_irqchip(kvm)->lock);
3012                 break;
3013         case KVM_IRQCHIP_PIC_SLAVE:
3014                 spin_lock(&pic_irqchip(kvm)->lock);
3015                 memcpy(&pic_irqchip(kvm)->pics[1],
3016                         &chip->chip.pic,
3017                         sizeof(struct kvm_pic_state));
3018                 spin_unlock(&pic_irqchip(kvm)->lock);
3019                 break;
3020         case KVM_IRQCHIP_IOAPIC:
3021                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3022                 break;
3023         default:
3024                 r = -EINVAL;
3025                 break;
3026         }
3027         kvm_pic_update_irq(pic_irqchip(kvm));
3028         return r;
3029 }
3030
3031 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3032 {
3033         int r = 0;
3034
3035         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3036         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3037         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3038         return r;
3039 }
3040
3041 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3042 {
3043         int r = 0;
3044
3045         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3046         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3047         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3048         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3049         return r;
3050 }
3051
3052 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3053 {
3054         int r = 0;
3055
3056         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3057         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3058                 sizeof(ps->channels));
3059         ps->flags = kvm->arch.vpit->pit_state.flags;
3060         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3061         memset(&ps->reserved, 0, sizeof(ps->reserved));
3062         return r;
3063 }
3064
3065 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3066 {
3067         int r = 0, start = 0;
3068         u32 prev_legacy, cur_legacy;
3069         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3070         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3071         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3072         if (!prev_legacy && cur_legacy)
3073                 start = 1;
3074         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3075                sizeof(kvm->arch.vpit->pit_state.channels));
3076         kvm->arch.vpit->pit_state.flags = ps->flags;
3077         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3078         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3079         return r;
3080 }
3081
3082 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3083                                  struct kvm_reinject_control *control)
3084 {
3085         if (!kvm->arch.vpit)
3086                 return -ENXIO;
3087         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3088         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3089         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3090         return 0;
3091 }
3092
3093 /**
3094  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3095  * @kvm: kvm instance
3096  * @log: slot id and address to which we copy the log
3097  *
3098  * We need to keep it in mind that VCPU threads can write to the bitmap
3099  * concurrently.  So, to avoid losing data, we keep the following order for
3100  * each bit:
3101  *
3102  *   1. Take a snapshot of the bit and clear it if needed.
3103  *   2. Write protect the corresponding page.
3104  *   3. Flush TLB's if needed.
3105  *   4. Copy the snapshot to the userspace.
3106  *
3107  * Between 2 and 3, the guest may write to the page using the remaining TLB
3108  * entry.  This is not a problem because the page will be reported dirty at
3109  * step 4 using the snapshot taken before and step 3 ensures that successive
3110  * writes will be logged for the next call.
3111  */
3112 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3113 {
3114         int r;
3115         struct kvm_memory_slot *memslot;
3116         unsigned long n, i;
3117         unsigned long *dirty_bitmap;
3118         unsigned long *dirty_bitmap_buffer;
3119         bool is_dirty = false;
3120
3121         mutex_lock(&kvm->slots_lock);
3122
3123         r = -EINVAL;
3124         if (log->slot >= KVM_MEMORY_SLOTS)
3125                 goto out;
3126
3127         memslot = id_to_memslot(kvm->memslots, log->slot);
3128
3129         dirty_bitmap = memslot->dirty_bitmap;
3130         r = -ENOENT;
3131         if (!dirty_bitmap)
3132                 goto out;
3133
3134         n = kvm_dirty_bitmap_bytes(memslot);
3135
3136         dirty_bitmap_buffer = dirty_bitmap + n / sizeof(long);
3137         memset(dirty_bitmap_buffer, 0, n);
3138
3139         spin_lock(&kvm->mmu_lock);
3140
3141         for (i = 0; i < n / sizeof(long); i++) {
3142                 unsigned long mask;
3143                 gfn_t offset;
3144
3145                 if (!dirty_bitmap[i])
3146                         continue;
3147
3148                 is_dirty = true;
3149
3150                 mask = xchg(&dirty_bitmap[i], 0);
3151                 dirty_bitmap_buffer[i] = mask;
3152
3153                 offset = i * BITS_PER_LONG;
3154                 kvm_mmu_write_protect_pt_masked(kvm, memslot, offset, mask);
3155         }
3156         if (is_dirty)
3157                 kvm_flush_remote_tlbs(kvm);
3158
3159         spin_unlock(&kvm->mmu_lock);
3160
3161         r = -EFAULT;
3162         if (copy_to_user(log->dirty_bitmap, dirty_bitmap_buffer, n))
3163                 goto out;
3164
3165         r = 0;
3166 out:
3167         mutex_unlock(&kvm->slots_lock);
3168         return r;
3169 }
3170
3171 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event)
3172 {
3173         if (!irqchip_in_kernel(kvm))
3174                 return -ENXIO;
3175
3176         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3177                                         irq_event->irq, irq_event->level);
3178         return 0;
3179 }
3180
3181 long kvm_arch_vm_ioctl(struct file *filp,
3182                        unsigned int ioctl, unsigned long arg)
3183 {
3184         struct kvm *kvm = filp->private_data;
3185         void __user *argp = (void __user *)arg;
3186         int r = -ENOTTY;
3187         /*
3188          * This union makes it completely explicit to gcc-3.x
3189          * that these two variables' stack usage should be
3190          * combined, not added together.
3191          */
3192         union {
3193                 struct kvm_pit_state ps;
3194                 struct kvm_pit_state2 ps2;
3195                 struct kvm_pit_config pit_config;
3196         } u;
3197
3198         switch (ioctl) {
3199         case KVM_SET_TSS_ADDR:
3200                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3201                 if (r < 0)
3202                         goto out;
3203                 break;
3204         case KVM_SET_IDENTITY_MAP_ADDR: {
3205                 u64 ident_addr;
3206
3207                 r = -EFAULT;
3208                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3209                         goto out;
3210                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3211                 if (r < 0)
3212                         goto out;
3213                 break;
3214         }
3215         case KVM_SET_NR_MMU_PAGES:
3216                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3217                 if (r)
3218                         goto out;
3219                 break;
3220         case KVM_GET_NR_MMU_PAGES:
3221                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3222                 break;
3223         case KVM_CREATE_IRQCHIP: {
3224                 struct kvm_pic *vpic;
3225
3226                 mutex_lock(&kvm->lock);
3227                 r = -EEXIST;
3228                 if (kvm->arch.vpic)
3229                         goto create_irqchip_unlock;
3230                 r = -EINVAL;
3231                 if (atomic_read(&kvm->online_vcpus))
3232                         goto create_irqchip_unlock;
3233                 r = -ENOMEM;
3234                 vpic = kvm_create_pic(kvm);
3235                 if (vpic) {
3236                         r = kvm_ioapic_init(kvm);
3237                         if (r) {
3238                                 mutex_lock(&kvm->slots_lock);
3239                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3240                                                           &vpic->dev_master);
3241                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3242                                                           &vpic->dev_slave);
3243                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3244                                                           &vpic->dev_eclr);
3245                                 mutex_unlock(&kvm->slots_lock);
3246                                 kfree(vpic);
3247                                 goto create_irqchip_unlock;
3248                         }
3249                 } else
3250                         goto create_irqchip_unlock;
3251                 smp_wmb();
3252                 kvm->arch.vpic = vpic;
3253                 smp_wmb();
3254                 r = kvm_setup_default_irq_routing(kvm);
3255                 if (r) {
3256                         mutex_lock(&kvm->slots_lock);
3257                         mutex_lock(&kvm->irq_lock);
3258                         kvm_ioapic_destroy(kvm);
3259                         kvm_destroy_pic(kvm);
3260                         mutex_unlock(&kvm->irq_lock);
3261                         mutex_unlock(&kvm->slots_lock);
3262                 }
3263         create_irqchip_unlock:
3264                 mutex_unlock(&kvm->lock);
3265                 break;
3266         }
3267         case KVM_CREATE_PIT:
3268                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3269                 goto create_pit;
3270         case KVM_CREATE_PIT2:
3271                 r = -EFAULT;
3272                 if (copy_from_user(&u.pit_config, argp,
3273                                    sizeof(struct kvm_pit_config)))
3274                         goto out;
3275         create_pit:
3276                 mutex_lock(&kvm->slots_lock);
3277                 r = -EEXIST;
3278                 if (kvm->arch.vpit)
3279                         goto create_pit_unlock;
3280                 r = -ENOMEM;
3281                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3282                 if (kvm->arch.vpit)
3283                         r = 0;
3284         create_pit_unlock:
3285                 mutex_unlock(&kvm->slots_lock);
3286                 break;
3287         case KVM_GET_IRQCHIP: {
3288                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3289                 struct kvm_irqchip *chip;
3290
3291                 chip = memdup_user(argp, sizeof(*chip));
3292                 if (IS_ERR(chip)) {
3293                         r = PTR_ERR(chip);
3294                         goto out;
3295                 }
3296
3297                 r = -ENXIO;
3298                 if (!irqchip_in_kernel(kvm))
3299                         goto get_irqchip_out;
3300                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3301                 if (r)
3302                         goto get_irqchip_out;
3303                 r = -EFAULT;
3304                 if (copy_to_user(argp, chip, sizeof *chip))
3305                         goto get_irqchip_out;
3306                 r = 0;
3307         get_irqchip_out:
3308                 kfree(chip);
3309                 if (r)
3310                         goto out;
3311                 break;
3312         }
3313         case KVM_SET_IRQCHIP: {
3314                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3315                 struct kvm_irqchip *chip;
3316
3317                 chip = memdup_user(argp, sizeof(*chip));
3318                 if (IS_ERR(chip)) {
3319                         r = PTR_ERR(chip);
3320                         goto out;
3321                 }
3322
3323                 r = -ENXIO;
3324                 if (!irqchip_in_kernel(kvm))
3325                         goto set_irqchip_out;
3326                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3327                 if (r)
3328                         goto set_irqchip_out;
3329                 r = 0;
3330         set_irqchip_out:
3331                 kfree(chip);
3332                 if (r)
3333                         goto out;
3334                 break;
3335         }
3336         case KVM_GET_PIT: {
3337                 r = -EFAULT;
3338                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3339                         goto out;
3340                 r = -ENXIO;
3341                 if (!kvm->arch.vpit)
3342                         goto out;
3343                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3344                 if (r)
3345                         goto out;
3346                 r = -EFAULT;
3347                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3348                         goto out;
3349                 r = 0;
3350                 break;
3351         }
3352         case KVM_SET_PIT: {
3353                 r = -EFAULT;
3354                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3355                         goto out;
3356                 r = -ENXIO;
3357                 if (!kvm->arch.vpit)
3358                         goto out;
3359                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3360                 if (r)
3361                         goto out;
3362                 r = 0;
3363                 break;
3364         }
3365         case KVM_GET_PIT2: {
3366                 r = -ENXIO;
3367                 if (!kvm->arch.vpit)
3368                         goto out;
3369                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3370                 if (r)
3371                         goto out;
3372                 r = -EFAULT;
3373                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3374                         goto out;
3375                 r = 0;
3376                 break;
3377         }
3378         case KVM_SET_PIT2: {
3379                 r = -EFAULT;
3380                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3381                         goto out;
3382                 r = -ENXIO;
3383                 if (!kvm->arch.vpit)
3384                         goto out;
3385                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3386                 if (r)
3387                         goto out;
3388                 r = 0;
3389                 break;
3390         }
3391         case KVM_REINJECT_CONTROL: {
3392                 struct kvm_reinject_control control;
3393                 r =  -EFAULT;
3394                 if (copy_from_user(&control, argp, sizeof(control)))
3395                         goto out;
3396                 r = kvm_vm_ioctl_reinject(kvm, &control);
3397                 if (r)
3398                         goto out;
3399                 r = 0;
3400                 break;
3401         }
3402         case KVM_XEN_HVM_CONFIG: {
3403                 r = -EFAULT;
3404                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3405                                    sizeof(struct kvm_xen_hvm_config)))
3406                         goto out;
3407                 r = -EINVAL;
3408                 if (kvm->arch.xen_hvm_config.flags)
3409                         goto out;
3410                 r = 0;
3411                 break;
3412         }
3413         case KVM_SET_CLOCK: {
3414                 struct kvm_clock_data user_ns;
3415                 u64 now_ns;
3416                 s64 delta;
3417
3418                 r = -EFAULT;
3419                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3420                         goto out;
3421
3422                 r = -EINVAL;
3423                 if (user_ns.flags)
3424                         goto out;
3425
3426                 r = 0;
3427                 local_irq_disable();
3428                 now_ns = get_kernel_ns();
3429                 delta = user_ns.clock - now_ns;
3430                 local_irq_enable();
3431                 kvm->arch.kvmclock_offset = delta;
3432                 break;
3433         }
3434         case KVM_GET_CLOCK: {
3435                 struct kvm_clock_data user_ns;
3436                 u64 now_ns;
3437
3438                 local_irq_disable();
3439                 now_ns = get_kernel_ns();
3440                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3441                 local_irq_enable();
3442                 user_ns.flags = 0;
3443                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3444
3445                 r = -EFAULT;
3446                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3447                         goto out;
3448                 r = 0;
3449                 break;
3450         }
3451
3452         default:
3453                 ;
3454         }
3455 out:
3456         return r;
3457 }
3458
3459 static void kvm_init_msr_list(void)
3460 {
3461         u32 dummy[2];
3462         unsigned i, j;
3463
3464         /* skip the first msrs in the list. KVM-specific */
3465         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3466                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3467                         continue;
3468                 if (j < i)
3469                         msrs_to_save[j] = msrs_to_save[i];
3470                 j++;
3471         }
3472         num_msrs_to_save = j;
3473 }
3474
3475 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3476                            const void *v)
3477 {
3478         int handled = 0;
3479         int n;
3480
3481         do {
3482                 n = min(len, 8);
3483                 if (!(vcpu->arch.apic &&
3484                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3485                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3486                         break;
3487                 handled += n;
3488                 addr += n;
3489                 len -= n;
3490                 v += n;
3491         } while (len);
3492
3493         return handled;
3494 }
3495
3496 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3497 {
3498         int handled = 0;
3499         int n;
3500
3501         do {
3502                 n = min(len, 8);
3503                 if (!(vcpu->arch.apic &&
3504                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3505                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3506                         break;
3507                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3508                 handled += n;
3509                 addr += n;
3510                 len -= n;
3511                 v += n;
3512         } while (len);
3513
3514         return handled;
3515 }
3516
3517 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3518                         struct kvm_segment *var, int seg)
3519 {
3520         kvm_x86_ops->set_segment(vcpu, var, seg);
3521 }
3522
3523 void kvm_get_segment(struct kvm_vcpu *vcpu,
3524                      struct kvm_segment *var, int seg)
3525 {
3526         kvm_x86_ops->get_segment(vcpu, var, seg);
3527 }
3528
3529 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3530 {
3531         gpa_t t_gpa;
3532         struct x86_exception exception;
3533
3534         BUG_ON(!mmu_is_nested(vcpu));
3535
3536         /* NPT walks are always user-walks */
3537         access |= PFERR_USER_MASK;
3538         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3539
3540         return t_gpa;
3541 }
3542
3543 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3544                               struct x86_exception *exception)
3545 {
3546         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3547         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3548 }
3549
3550  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3551                                 struct x86_exception *exception)
3552 {
3553         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3554         access |= PFERR_FETCH_MASK;
3555         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3556 }
3557
3558 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3559                                struct x86_exception *exception)
3560 {
3561         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3562         access |= PFERR_WRITE_MASK;
3563         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3564 }
3565
3566 /* uses this to access any guest's mapped memory without checking CPL */
3567 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3568                                 struct x86_exception *exception)
3569 {
3570         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3571 }
3572
3573 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3574                                       struct kvm_vcpu *vcpu, u32 access,
3575                                       struct x86_exception *exception)
3576 {
3577         void *data = val;
3578         int r = X86EMUL_CONTINUE;
3579
3580         while (bytes) {
3581                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3582                                                             exception);
3583                 unsigned offset = addr & (PAGE_SIZE-1);
3584                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3585                 int ret;
3586
3587                 if (gpa == UNMAPPED_GVA)
3588                         return X86EMUL_PROPAGATE_FAULT;
3589                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3590                 if (ret < 0) {
3591                         r = X86EMUL_IO_NEEDED;
3592                         goto out;
3593                 }
3594
3595                 bytes -= toread;
3596                 data += toread;
3597                 addr += toread;
3598         }
3599 out:
3600         return r;
3601 }
3602
3603 /* used for instruction fetching */
3604 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3605                                 gva_t addr, void *val, unsigned int bytes,
3606                                 struct x86_exception *exception)
3607 {
3608         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3609         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3610
3611         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3612                                           access | PFERR_FETCH_MASK,
3613                                           exception);
3614 }
3615
3616 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3617                                gva_t addr, void *val, unsigned int bytes,
3618                                struct x86_exception *exception)
3619 {
3620         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3621         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3622
3623         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3624                                           exception);
3625 }
3626 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3627
3628 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3629                                       gva_t addr, void *val, unsigned int bytes,
3630                                       struct x86_exception *exception)
3631 {
3632         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3633         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3634 }
3635
3636 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3637                                        gva_t addr, void *val,
3638                                        unsigned int bytes,
3639                                        struct x86_exception *exception)
3640 {
3641         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3642         void *data = val;
3643         int r = X86EMUL_CONTINUE;
3644
3645         while (bytes) {
3646                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3647                                                              PFERR_WRITE_MASK,
3648                                                              exception);
3649                 unsigned offset = addr & (PAGE_SIZE-1);
3650                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3651                 int ret;
3652
3653                 if (gpa == UNMAPPED_GVA)
3654                         return X86EMUL_PROPAGATE_FAULT;
3655                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3656                 if (ret < 0) {
3657                         r = X86EMUL_IO_NEEDED;
3658                         goto out;
3659                 }
3660
3661                 bytes -= towrite;
3662                 data += towrite;
3663                 addr += towrite;
3664         }
3665 out:
3666         return r;
3667 }
3668 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3669
3670 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3671                                 gpa_t *gpa, struct x86_exception *exception,
3672                                 bool write)
3673 {
3674         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3675
3676         if (vcpu_match_mmio_gva(vcpu, gva) &&
3677                   check_write_user_access(vcpu, write, access,
3678                   vcpu->arch.access)) {
3679                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3680                                         (gva & (PAGE_SIZE - 1));
3681                 trace_vcpu_match_mmio(gva, *gpa, write, false);
3682                 return 1;
3683         }
3684
3685         if (write)
3686                 access |= PFERR_WRITE_MASK;
3687
3688         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3689
3690         if (*gpa == UNMAPPED_GVA)
3691                 return -1;
3692
3693         /* For APIC access vmexit */
3694         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3695                 return 1;
3696
3697         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3698                 trace_vcpu_match_mmio(gva, *gpa, write, true);
3699                 return 1;
3700         }
3701
3702         return 0;
3703 }
3704
3705 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3706                         const void *val, int bytes)
3707 {
3708         int ret;
3709
3710         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3711         if (ret < 0)
3712                 return 0;
3713         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
3714         return 1;
3715 }
3716
3717 struct read_write_emulator_ops {
3718         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
3719                                   int bytes);
3720         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
3721                                   void *val, int bytes);
3722         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3723                                int bytes, void *val);
3724         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3725                                     void *val, int bytes);
3726         bool write;
3727 };
3728
3729 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
3730 {
3731         if (vcpu->mmio_read_completed) {
3732                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3733                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
3734                 vcpu->mmio_read_completed = 0;
3735                 return 1;
3736         }
3737
3738         return 0;
3739 }
3740
3741 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3742                         void *val, int bytes)
3743 {
3744         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
3745 }
3746
3747 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3748                          void *val, int bytes)
3749 {
3750         return emulator_write_phys(vcpu, gpa, val, bytes);
3751 }
3752
3753 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
3754 {
3755         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3756         return vcpu_mmio_write(vcpu, gpa, bytes, val);
3757 }
3758
3759 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3760                           void *val, int bytes)
3761 {
3762         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3763         return X86EMUL_IO_NEEDED;
3764 }
3765
3766 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3767                            void *val, int bytes)
3768 {
3769         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
3770
3771         memcpy(vcpu->run->mmio.data, frag->data, frag->len);
3772         return X86EMUL_CONTINUE;
3773 }
3774
3775 static struct read_write_emulator_ops read_emultor = {
3776         .read_write_prepare = read_prepare,
3777         .read_write_emulate = read_emulate,
3778         .read_write_mmio = vcpu_mmio_read,
3779         .read_write_exit_mmio = read_exit_mmio,
3780 };
3781
3782 static struct read_write_emulator_ops write_emultor = {
3783         .read_write_emulate = write_emulate,
3784         .read_write_mmio = write_mmio,
3785         .read_write_exit_mmio = write_exit_mmio,
3786         .write = true,
3787 };
3788
3789 static int emulator_read_write_onepage(unsigned long addr, void *val,
3790                                        unsigned int bytes,
3791                                        struct x86_exception *exception,
3792                                        struct kvm_vcpu *vcpu,
3793                                        struct read_write_emulator_ops *ops)
3794 {
3795         gpa_t gpa;
3796         int handled, ret;
3797         bool write = ops->write;
3798         struct kvm_mmio_fragment *frag;
3799
3800         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
3801
3802         if (ret < 0)
3803                 return X86EMUL_PROPAGATE_FAULT;
3804
3805         /* For APIC access vmexit */
3806         if (ret)
3807                 goto mmio;
3808
3809         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
3810                 return X86EMUL_CONTINUE;
3811
3812 mmio:
3813         /*
3814          * Is this MMIO handled locally?
3815          */
3816         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
3817         if (handled == bytes)
3818                 return X86EMUL_CONTINUE;
3819
3820         gpa += handled;
3821         bytes -= handled;
3822         val += handled;
3823
3824         while (bytes) {
3825                 unsigned now = min(bytes, 8U);
3826
3827                 frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
3828                 frag->gpa = gpa;
3829                 frag->data = val;
3830                 frag->len = now;
3831
3832                 gpa += now;
3833                 val += now;
3834                 bytes -= now;
3835         }
3836         return X86EMUL_CONTINUE;
3837 }
3838
3839 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
3840                         void *val, unsigned int bytes,
3841                         struct x86_exception *exception,
3842                         struct read_write_emulator_ops *ops)
3843 {
3844         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3845         gpa_t gpa;
3846         int rc;
3847
3848         if (ops->read_write_prepare &&
3849                   ops->read_write_prepare(vcpu, val, bytes))
3850                 return X86EMUL_CONTINUE;
3851
3852         vcpu->mmio_nr_fragments = 0;
3853
3854         /* Crossing a page boundary? */
3855         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3856                 int now;
3857
3858                 now = -addr & ~PAGE_MASK;
3859                 rc = emulator_read_write_onepage(addr, val, now, exception,
3860                                                  vcpu, ops);
3861
3862                 if (rc != X86EMUL_CONTINUE)
3863                         return rc;
3864                 addr += now;
3865                 val += now;
3866                 bytes -= now;
3867         }
3868
3869         rc = emulator_read_write_onepage(addr, val, bytes, exception,
3870                                          vcpu, ops);
3871         if (rc != X86EMUL_CONTINUE)
3872                 return rc;
3873
3874         if (!vcpu->mmio_nr_fragments)
3875                 return rc;
3876
3877         gpa = vcpu->mmio_fragments[0].gpa;
3878
3879         vcpu->mmio_needed = 1;
3880         vcpu->mmio_cur_fragment = 0;
3881
3882         vcpu->run->mmio.len = vcpu->mmio_fragments[0].len;
3883         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
3884         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3885         vcpu->run->mmio.phys_addr = gpa;
3886
3887         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
3888 }
3889
3890 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3891                                   unsigned long addr,
3892                                   void *val,
3893                                   unsigned int bytes,
3894                                   struct x86_exception *exception)
3895 {
3896         return emulator_read_write(ctxt, addr, val, bytes,
3897                                    exception, &read_emultor);
3898 }
3899
3900 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
3901                             unsigned long addr,
3902                             const void *val,
3903                             unsigned int bytes,
3904                             struct x86_exception *exception)
3905 {
3906         return emulator_read_write(ctxt, addr, (void *)val, bytes,
3907                                    exception, &write_emultor);
3908 }
3909
3910 #define CMPXCHG_TYPE(t, ptr, old, new) \
3911         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3912
3913 #ifdef CONFIG_X86_64
3914 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3915 #else
3916 #  define CMPXCHG64(ptr, old, new) \
3917         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3918 #endif
3919
3920 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
3921                                      unsigned long addr,
3922                                      const void *old,
3923                                      const void *new,
3924                                      unsigned int bytes,
3925                                      struct x86_exception *exception)
3926 {
3927         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3928         gpa_t gpa;
3929         struct page *page;
3930         char *kaddr;
3931         bool exchanged;
3932
3933         /* guests cmpxchg8b have to be emulated atomically */
3934         if (bytes > 8 || (bytes & (bytes - 1)))
3935                 goto emul_write;
3936
3937         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3938
3939         if (gpa == UNMAPPED_GVA ||
3940             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3941                 goto emul_write;
3942
3943         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3944                 goto emul_write;
3945
3946         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3947         if (is_error_page(page))
3948                 goto emul_write;
3949
3950         kaddr = kmap_atomic(page);
3951         kaddr += offset_in_page(gpa);
3952         switch (bytes) {
3953         case 1:
3954                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3955                 break;
3956         case 2:
3957                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3958                 break;
3959         case 4:
3960                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3961                 break;
3962         case 8:
3963                 exchanged = CMPXCHG64(kaddr, old, new);
3964                 break;
3965         default:
3966                 BUG();
3967         }
3968         kunmap_atomic(kaddr);
3969         kvm_release_page_dirty(page);
3970
3971         if (!exchanged)
3972                 return X86EMUL_CMPXCHG_FAILED;
3973
3974         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
3975
3976         return X86EMUL_CONTINUE;
3977
3978 emul_write:
3979         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3980
3981         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
3982 }
3983
3984 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3985 {
3986         /* TODO: String I/O for in kernel device */
3987         int r;
3988
3989         if (vcpu->arch.pio.in)
3990                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3991                                     vcpu->arch.pio.size, pd);
3992         else
3993                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3994                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3995                                      pd);
3996         return r;
3997 }
3998
3999 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4000                                unsigned short port, void *val,
4001                                unsigned int count, bool in)
4002 {
4003         trace_kvm_pio(!in, port, size, count);
4004
4005         vcpu->arch.pio.port = port;
4006         vcpu->arch.pio.in = in;
4007         vcpu->arch.pio.count  = count;
4008         vcpu->arch.pio.size = size;
4009
4010         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4011                 vcpu->arch.pio.count = 0;
4012                 return 1;
4013         }
4014
4015         vcpu->run->exit_reason = KVM_EXIT_IO;
4016         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4017         vcpu->run->io.size = size;
4018         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4019         vcpu->run->io.count = count;
4020         vcpu->run->io.port = port;
4021
4022         return 0;
4023 }
4024
4025 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4026                                     int size, unsigned short port, void *val,
4027                                     unsigned int count)
4028 {
4029         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4030         int ret;
4031
4032         if (vcpu->arch.pio.count)
4033                 goto data_avail;
4034
4035         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4036         if (ret) {
4037 data_avail:
4038                 memcpy(val, vcpu->arch.pio_data, size * count);
4039                 vcpu->arch.pio.count = 0;
4040                 return 1;
4041         }
4042
4043         return 0;
4044 }
4045
4046 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4047                                      int size, unsigned short port,
4048                                      const void *val, unsigned int count)
4049 {
4050         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4051
4052         memcpy(vcpu->arch.pio_data, val, size * count);
4053         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4054 }
4055
4056 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4057 {
4058         return kvm_x86_ops->get_segment_base(vcpu, seg);
4059 }
4060
4061 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4062 {
4063         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4064 }
4065
4066 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4067 {
4068         if (!need_emulate_wbinvd(vcpu))
4069                 return X86EMUL_CONTINUE;
4070
4071         if (kvm_x86_ops->has_wbinvd_exit()) {
4072                 int cpu = get_cpu();
4073
4074                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4075                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4076                                 wbinvd_ipi, NULL, 1);
4077                 put_cpu();
4078                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4079         } else
4080                 wbinvd();
4081         return X86EMUL_CONTINUE;
4082 }
4083 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4084
4085 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4086 {
4087         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4088 }
4089
4090 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4091 {
4092         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4093 }
4094
4095 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4096 {
4097
4098         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4099 }
4100
4101 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4102 {
4103         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4104 }
4105
4106 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4107 {
4108         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4109         unsigned long value;
4110
4111         switch (cr) {
4112         case 0:
4113                 value = kvm_read_cr0(vcpu);
4114                 break;
4115         case 2:
4116                 value = vcpu->arch.cr2;
4117                 break;
4118         case 3:
4119                 value = kvm_read_cr3(vcpu);
4120                 break;
4121         case 4:
4122                 value = kvm_read_cr4(vcpu);
4123                 break;
4124         case 8:
4125                 value = kvm_get_cr8(vcpu);
4126                 break;
4127         default:
4128                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4129                 return 0;
4130         }
4131
4132         return value;
4133 }
4134
4135 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4136 {
4137         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4138         int res = 0;
4139
4140         switch (cr) {
4141         case 0:
4142                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4143                 break;
4144         case 2:
4145                 vcpu->arch.cr2 = val;
4146                 break;
4147         case 3:
4148                 res = kvm_set_cr3(vcpu, val);
4149                 break;
4150         case 4:
4151                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4152                 break;
4153         case 8:
4154                 res = kvm_set_cr8(vcpu, val);
4155                 break;
4156         default:
4157                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4158                 res = -1;
4159         }
4160
4161         return res;
4162 }
4163
4164 static void emulator_set_rflags(struct x86_emulate_ctxt *ctxt, ulong val)
4165 {
4166         kvm_set_rflags(emul_to_vcpu(ctxt), val);
4167 }
4168
4169 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4170 {
4171         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4172 }
4173
4174 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4175 {
4176         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4177 }
4178
4179 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4180 {
4181         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4182 }
4183
4184 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4185 {
4186         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4187 }
4188
4189 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4190 {
4191         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4192 }
4193
4194 static unsigned long emulator_get_cached_segment_base(
4195         struct x86_emulate_ctxt *ctxt, int seg)
4196 {
4197         return get_segment_base(emul_to_vcpu(ctxt), seg);
4198 }
4199
4200 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4201                                  struct desc_struct *desc, u32 *base3,
4202                                  int seg)
4203 {
4204         struct kvm_segment var;
4205
4206         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4207         *selector = var.selector;
4208
4209         if (var.unusable)
4210                 return false;
4211
4212         if (var.g)
4213                 var.limit >>= 12;
4214         set_desc_limit(desc, var.limit);
4215         set_desc_base(desc, (unsigned long)var.base);
4216 #ifdef CONFIG_X86_64
4217         if (base3)
4218                 *base3 = var.base >> 32;
4219 #endif
4220         desc->type = var.type;
4221         desc->s = var.s;
4222         desc->dpl = var.dpl;
4223         desc->p = var.present;
4224         desc->avl = var.avl;
4225         desc->l = var.l;
4226         desc->d = var.db;
4227         desc->g = var.g;
4228
4229         return true;
4230 }
4231
4232 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4233                                  struct desc_struct *desc, u32 base3,
4234                                  int seg)
4235 {
4236         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4237         struct kvm_segment var;
4238
4239         var.selector = selector;
4240         var.base = get_desc_base(desc);
4241 #ifdef CONFIG_X86_64
4242         var.base |= ((u64)base3) << 32;
4243 #endif
4244         var.limit = get_desc_limit(desc);
4245         if (desc->g)
4246                 var.limit = (var.limit << 12) | 0xfff;
4247         var.type = desc->type;
4248         var.present = desc->p;
4249         var.dpl = desc->dpl;
4250         var.db = desc->d;
4251         var.s = desc->s;
4252         var.l = desc->l;
4253         var.g = desc->g;
4254         var.avl = desc->avl;
4255         var.present = desc->p;
4256         var.unusable = !var.present;
4257         var.padding = 0;
4258
4259         kvm_set_segment(vcpu, &var, seg);
4260         return;
4261 }
4262
4263 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4264                             u32 msr_index, u64 *pdata)
4265 {
4266         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4267 }
4268
4269 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4270                             u32 msr_index, u64 data)
4271 {
4272         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4273 }
4274
4275 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4276                              u32 pmc, u64 *pdata)
4277 {
4278         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4279 }
4280
4281 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4282 {
4283         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4284 }
4285
4286 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4287 {
4288         preempt_disable();
4289         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4290         /*
4291          * CR0.TS may reference the host fpu state, not the guest fpu state,
4292          * so it may be clear at this point.
4293          */
4294         clts();
4295 }
4296
4297 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4298 {
4299         preempt_enable();
4300 }
4301
4302 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4303                               struct x86_instruction_info *info,
4304                               enum x86_intercept_stage stage)
4305 {
4306         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4307 }
4308
4309 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4310                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4311 {
4312         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4313 }
4314
4315 static struct x86_emulate_ops emulate_ops = {
4316         .read_std            = kvm_read_guest_virt_system,
4317         .write_std           = kvm_write_guest_virt_system,
4318         .fetch               = kvm_fetch_guest_virt,
4319         .read_emulated       = emulator_read_emulated,
4320         .write_emulated      = emulator_write_emulated,
4321         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4322         .invlpg              = emulator_invlpg,
4323         .pio_in_emulated     = emulator_pio_in_emulated,
4324         .pio_out_emulated    = emulator_pio_out_emulated,
4325         .get_segment         = emulator_get_segment,
4326         .set_segment         = emulator_set_segment,
4327         .get_cached_segment_base = emulator_get_cached_segment_base,
4328         .get_gdt             = emulator_get_gdt,
4329         .get_idt             = emulator_get_idt,
4330         .set_gdt             = emulator_set_gdt,
4331         .set_idt             = emulator_set_idt,
4332         .get_cr              = emulator_get_cr,
4333         .set_cr              = emulator_set_cr,
4334         .set_rflags          = emulator_set_rflags,
4335         .cpl                 = emulator_get_cpl,
4336         .get_dr              = emulator_get_dr,
4337         .set_dr              = emulator_set_dr,
4338         .set_msr             = emulator_set_msr,
4339         .get_msr             = emulator_get_msr,
4340         .read_pmc            = emulator_read_pmc,
4341         .halt                = emulator_halt,
4342         .wbinvd              = emulator_wbinvd,
4343         .fix_hypercall       = emulator_fix_hypercall,
4344         .get_fpu             = emulator_get_fpu,
4345         .put_fpu             = emulator_put_fpu,
4346         .intercept           = emulator_intercept,
4347         .get_cpuid           = emulator_get_cpuid,
4348 };
4349
4350 static void cache_all_regs(struct kvm_vcpu *vcpu)
4351 {
4352         kvm_register_read(vcpu, VCPU_REGS_RAX);
4353         kvm_register_read(vcpu, VCPU_REGS_RSP);
4354         kvm_register_read(vcpu, VCPU_REGS_RIP);
4355         vcpu->arch.regs_dirty = ~0;
4356 }
4357
4358 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4359 {
4360         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4361         /*
4362          * an sti; sti; sequence only disable interrupts for the first
4363          * instruction. So, if the last instruction, be it emulated or
4364          * not, left the system with the INT_STI flag enabled, it
4365          * means that the last instruction is an sti. We should not
4366          * leave the flag on in this case. The same goes for mov ss
4367          */
4368         if (!(int_shadow & mask))
4369                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4370 }
4371
4372 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4373 {
4374         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4375         if (ctxt->exception.vector == PF_VECTOR)
4376                 kvm_propagate_fault(vcpu, &ctxt->exception);
4377         else if (ctxt->exception.error_code_valid)
4378                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4379                                       ctxt->exception.error_code);
4380         else
4381                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4382 }
4383
4384 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4385                               const unsigned long *regs)
4386 {
4387         memset(&ctxt->twobyte, 0,
4388                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4389         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4390
4391         ctxt->fetch.start = 0;
4392         ctxt->fetch.end = 0;
4393         ctxt->io_read.pos = 0;
4394         ctxt->io_read.end = 0;
4395         ctxt->mem_read.pos = 0;
4396         ctxt->mem_read.end = 0;
4397 }
4398
4399 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4400 {
4401         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4402         int cs_db, cs_l;
4403
4404         /*
4405          * TODO: fix emulate.c to use guest_read/write_register
4406          * instead of direct ->regs accesses, can save hundred cycles
4407          * on Intel for instructions that don't read/change RSP, for
4408          * for example.
4409          */
4410         cache_all_regs(vcpu);
4411
4412         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4413
4414         ctxt->eflags = kvm_get_rflags(vcpu);
4415         ctxt->eip = kvm_rip_read(vcpu);
4416         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4417                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4418                      cs_l                               ? X86EMUL_MODE_PROT64 :
4419                      cs_db                              ? X86EMUL_MODE_PROT32 :
4420                                                           X86EMUL_MODE_PROT16;
4421         ctxt->guest_mode = is_guest_mode(vcpu);
4422
4423         init_decode_cache(ctxt, vcpu->arch.regs);
4424         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4425 }
4426
4427 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4428 {
4429         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4430         int ret;
4431
4432         init_emulate_ctxt(vcpu);
4433
4434         ctxt->op_bytes = 2;
4435         ctxt->ad_bytes = 2;
4436         ctxt->_eip = ctxt->eip + inc_eip;
4437         ret = emulate_int_real(ctxt, irq);
4438
4439         if (ret != X86EMUL_CONTINUE)
4440                 return EMULATE_FAIL;
4441
4442         ctxt->eip = ctxt->_eip;
4443         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4444         kvm_rip_write(vcpu, ctxt->eip);
4445         kvm_set_rflags(vcpu, ctxt->eflags);
4446
4447         if (irq == NMI_VECTOR)
4448                 vcpu->arch.nmi_pending = 0;
4449         else
4450                 vcpu->arch.interrupt.pending = false;
4451
4452         return EMULATE_DONE;
4453 }
4454 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4455
4456 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4457 {
4458         int r = EMULATE_DONE;
4459
4460         ++vcpu->stat.insn_emulation_fail;
4461         trace_kvm_emulate_insn_failed(vcpu);
4462         if (!is_guest_mode(vcpu)) {
4463                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4464                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4465                 vcpu->run->internal.ndata = 0;
4466                 r = EMULATE_FAIL;
4467         }
4468         kvm_queue_exception(vcpu, UD_VECTOR);
4469
4470         return r;
4471 }
4472
4473 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4474 {
4475         gpa_t gpa;
4476
4477         if (tdp_enabled)
4478                 return false;
4479
4480         /*
4481          * if emulation was due to access to shadowed page table
4482          * and it failed try to unshadow page and re-enter the
4483          * guest to let CPU execute the instruction.
4484          */
4485         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4486                 return true;
4487
4488         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4489
4490         if (gpa == UNMAPPED_GVA)
4491                 return true; /* let cpu generate fault */
4492
4493         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4494                 return true;
4495
4496         return false;
4497 }
4498
4499 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4500                               unsigned long cr2,  int emulation_type)
4501 {
4502         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4503         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4504
4505         last_retry_eip = vcpu->arch.last_retry_eip;
4506         last_retry_addr = vcpu->arch.last_retry_addr;
4507
4508         /*
4509          * If the emulation is caused by #PF and it is non-page_table
4510          * writing instruction, it means the VM-EXIT is caused by shadow
4511          * page protected, we can zap the shadow page and retry this
4512          * instruction directly.
4513          *
4514          * Note: if the guest uses a non-page-table modifying instruction
4515          * on the PDE that points to the instruction, then we will unmap
4516          * the instruction and go to an infinite loop. So, we cache the
4517          * last retried eip and the last fault address, if we meet the eip
4518          * and the address again, we can break out of the potential infinite
4519          * loop.
4520          */
4521         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4522
4523         if (!(emulation_type & EMULTYPE_RETRY))
4524                 return false;
4525
4526         if (x86_page_table_writing_insn(ctxt))
4527                 return false;
4528
4529         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4530                 return false;
4531
4532         vcpu->arch.last_retry_eip = ctxt->eip;
4533         vcpu->arch.last_retry_addr = cr2;
4534
4535         if (!vcpu->arch.mmu.direct_map)
4536                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4537
4538         kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4539
4540         return true;
4541 }
4542
4543 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4544                             unsigned long cr2,
4545                             int emulation_type,
4546                             void *insn,
4547                             int insn_len)
4548 {
4549         int r;
4550         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4551         bool writeback = true;
4552
4553         kvm_clear_exception_queue(vcpu);
4554
4555         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4556                 init_emulate_ctxt(vcpu);
4557                 ctxt->interruptibility = 0;
4558                 ctxt->have_exception = false;
4559                 ctxt->perm_ok = false;
4560
4561                 ctxt->only_vendor_specific_insn
4562                         = emulation_type & EMULTYPE_TRAP_UD;
4563
4564                 r = x86_decode_insn(ctxt, insn, insn_len);
4565
4566                 trace_kvm_emulate_insn_start(vcpu);
4567                 ++vcpu->stat.insn_emulation;
4568                 if (r != EMULATION_OK)  {
4569                         if (emulation_type & EMULTYPE_TRAP_UD)
4570                                 return EMULATE_FAIL;
4571                         if (reexecute_instruction(vcpu, cr2))
4572                                 return EMULATE_DONE;
4573                         if (emulation_type & EMULTYPE_SKIP)
4574                                 return EMULATE_FAIL;
4575                         return handle_emulation_failure(vcpu);
4576                 }
4577         }
4578
4579         if (emulation_type & EMULTYPE_SKIP) {
4580                 kvm_rip_write(vcpu, ctxt->_eip);
4581                 return EMULATE_DONE;
4582         }
4583
4584         if (retry_instruction(ctxt, cr2, emulation_type))
4585                 return EMULATE_DONE;
4586
4587         /* this is needed for vmware backdoor interface to work since it
4588            changes registers values  during IO operation */
4589         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4590                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4591                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4592         }
4593
4594 restart:
4595         r = x86_emulate_insn(ctxt);
4596
4597         if (r == EMULATION_INTERCEPTED)
4598                 return EMULATE_DONE;
4599
4600         if (r == EMULATION_FAILED) {
4601                 if (reexecute_instruction(vcpu, cr2))
4602                         return EMULATE_DONE;
4603
4604                 return handle_emulation_failure(vcpu);
4605         }
4606
4607         if (ctxt->have_exception) {
4608                 inject_emulated_exception(vcpu);
4609                 r = EMULATE_DONE;
4610         } else if (vcpu->arch.pio.count) {
4611                 if (!vcpu->arch.pio.in)
4612                         vcpu->arch.pio.count = 0;
4613                 else
4614                         writeback = false;
4615                 r = EMULATE_DO_MMIO;
4616         } else if (vcpu->mmio_needed) {
4617                 if (!vcpu->mmio_is_write)
4618                         writeback = false;
4619                 r = EMULATE_DO_MMIO;
4620         } else if (r == EMULATION_RESTART)
4621                 goto restart;
4622         else
4623                 r = EMULATE_DONE;
4624
4625         if (writeback) {
4626                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4627                 kvm_set_rflags(vcpu, ctxt->eflags);
4628                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4629                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4630                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4631                 kvm_rip_write(vcpu, ctxt->eip);
4632         } else
4633                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4634
4635         return r;
4636 }
4637 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4638
4639 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4640 {
4641         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4642         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4643                                             size, port, &val, 1);
4644         /* do not return to emulator after return from userspace */
4645         vcpu->arch.pio.count = 0;
4646         return ret;
4647 }
4648 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4649
4650 static void tsc_bad(void *info)
4651 {
4652         __this_cpu_write(cpu_tsc_khz, 0);
4653 }
4654
4655 static void tsc_khz_changed(void *data)
4656 {
4657         struct cpufreq_freqs *freq = data;
4658         unsigned long khz = 0;
4659
4660         if (data)
4661                 khz = freq->new;
4662         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4663                 khz = cpufreq_quick_get(raw_smp_processor_id());
4664         if (!khz)
4665                 khz = tsc_khz;
4666         __this_cpu_write(cpu_tsc_khz, khz);
4667 }
4668
4669 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4670                                      void *data)
4671 {
4672         struct cpufreq_freqs *freq = data;
4673         struct kvm *kvm;
4674         struct kvm_vcpu *vcpu;
4675         int i, send_ipi = 0;
4676
4677         /*
4678          * We allow guests to temporarily run on slowing clocks,
4679          * provided we notify them after, or to run on accelerating
4680          * clocks, provided we notify them before.  Thus time never
4681          * goes backwards.
4682          *
4683          * However, we have a problem.  We can't atomically update
4684          * the frequency of a given CPU from this function; it is
4685          * merely a notifier, which can be called from any CPU.
4686          * Changing the TSC frequency at arbitrary points in time
4687          * requires a recomputation of local variables related to
4688          * the TSC for each VCPU.  We must flag these local variables
4689          * to be updated and be sure the update takes place with the
4690          * new frequency before any guests proceed.
4691          *
4692          * Unfortunately, the combination of hotplug CPU and frequency
4693          * change creates an intractable locking scenario; the order
4694          * of when these callouts happen is undefined with respect to
4695          * CPU hotplug, and they can race with each other.  As such,
4696          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4697          * undefined; you can actually have a CPU frequency change take
4698          * place in between the computation of X and the setting of the
4699          * variable.  To protect against this problem, all updates of
4700          * the per_cpu tsc_khz variable are done in an interrupt
4701          * protected IPI, and all callers wishing to update the value
4702          * must wait for a synchronous IPI to complete (which is trivial
4703          * if the caller is on the CPU already).  This establishes the
4704          * necessary total order on variable updates.
4705          *
4706          * Note that because a guest time update may take place
4707          * anytime after the setting of the VCPU's request bit, the
4708          * correct TSC value must be set before the request.  However,
4709          * to ensure the update actually makes it to any guest which
4710          * starts running in hardware virtualization between the set
4711          * and the acquisition of the spinlock, we must also ping the
4712          * CPU after setting the request bit.
4713          *
4714          */
4715
4716         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4717                 return 0;
4718         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4719                 return 0;
4720
4721         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4722
4723         raw_spin_lock(&kvm_lock);
4724         list_for_each_entry(kvm, &vm_list, vm_list) {
4725                 kvm_for_each_vcpu(i, vcpu, kvm) {
4726                         if (vcpu->cpu != freq->cpu)
4727                                 continue;
4728                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4729                         if (vcpu->cpu != smp_processor_id())
4730                                 send_ipi = 1;
4731                 }
4732         }
4733         raw_spin_unlock(&kvm_lock);
4734
4735         if (freq->old < freq->new && send_ipi) {
4736                 /*
4737                  * We upscale the frequency.  Must make the guest
4738                  * doesn't see old kvmclock values while running with
4739                  * the new frequency, otherwise we risk the guest sees
4740                  * time go backwards.
4741                  *
4742                  * In case we update the frequency for another cpu
4743                  * (which might be in guest context) send an interrupt
4744                  * to kick the cpu out of guest context.  Next time
4745                  * guest context is entered kvmclock will be updated,
4746                  * so the guest will not see stale values.
4747                  */
4748                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4749         }
4750         return 0;
4751 }
4752
4753 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4754         .notifier_call  = kvmclock_cpufreq_notifier
4755 };
4756
4757 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4758                                         unsigned long action, void *hcpu)
4759 {
4760         unsigned int cpu = (unsigned long)hcpu;
4761
4762         switch (action) {
4763                 case CPU_ONLINE:
4764                 case CPU_DOWN_FAILED:
4765                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4766                         break;
4767                 case CPU_DOWN_PREPARE:
4768                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4769                         break;
4770         }
4771         return NOTIFY_OK;
4772 }
4773
4774 static struct notifier_block kvmclock_cpu_notifier_block = {
4775         .notifier_call  = kvmclock_cpu_notifier,
4776         .priority = -INT_MAX
4777 };
4778
4779 static void kvm_timer_init(void)
4780 {
4781         int cpu;
4782
4783         max_tsc_khz = tsc_khz;
4784         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4785         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4786 #ifdef CONFIG_CPU_FREQ
4787                 struct cpufreq_policy policy;
4788                 memset(&policy, 0, sizeof(policy));
4789                 cpu = get_cpu();
4790                 cpufreq_get_policy(&policy, cpu);
4791                 if (policy.cpuinfo.max_freq)
4792                         max_tsc_khz = policy.cpuinfo.max_freq;
4793                 put_cpu();
4794 #endif
4795                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4796                                           CPUFREQ_TRANSITION_NOTIFIER);
4797         }
4798         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4799         for_each_online_cpu(cpu)
4800                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4801 }
4802
4803 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4804
4805 int kvm_is_in_guest(void)
4806 {
4807         return __this_cpu_read(current_vcpu) != NULL;
4808 }
4809
4810 static int kvm_is_user_mode(void)
4811 {
4812         int user_mode = 3;
4813
4814         if (__this_cpu_read(current_vcpu))
4815                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
4816
4817         return user_mode != 0;
4818 }
4819
4820 static unsigned long kvm_get_guest_ip(void)
4821 {
4822         unsigned long ip = 0;
4823
4824         if (__this_cpu_read(current_vcpu))
4825                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
4826
4827         return ip;
4828 }
4829
4830 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4831         .is_in_guest            = kvm_is_in_guest,
4832         .is_user_mode           = kvm_is_user_mode,
4833         .get_guest_ip           = kvm_get_guest_ip,
4834 };
4835
4836 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4837 {
4838         __this_cpu_write(current_vcpu, vcpu);
4839 }
4840 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4841
4842 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4843 {
4844         __this_cpu_write(current_vcpu, NULL);
4845 }
4846 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4847
4848 static void kvm_set_mmio_spte_mask(void)
4849 {
4850         u64 mask;
4851         int maxphyaddr = boot_cpu_data.x86_phys_bits;
4852
4853         /*
4854          * Set the reserved bits and the present bit of an paging-structure
4855          * entry to generate page fault with PFER.RSV = 1.
4856          */
4857         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
4858         mask |= 1ull;
4859
4860 #ifdef CONFIG_X86_64
4861         /*
4862          * If reserved bit is not supported, clear the present bit to disable
4863          * mmio page fault.
4864          */
4865         if (maxphyaddr == 52)
4866                 mask &= ~1ull;
4867 #endif
4868
4869         kvm_mmu_set_mmio_spte_mask(mask);
4870 }
4871
4872 int kvm_arch_init(void *opaque)
4873 {
4874         int r;
4875         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4876
4877         if (kvm_x86_ops) {
4878                 printk(KERN_ERR "kvm: already loaded the other module\n");
4879                 r = -EEXIST;
4880                 goto out;
4881         }
4882
4883         if (!ops->cpu_has_kvm_support()) {
4884                 printk(KERN_ERR "kvm: no hardware support\n");
4885                 r = -EOPNOTSUPP;
4886                 goto out;
4887         }
4888         if (ops->disabled_by_bios()) {
4889                 printk(KERN_ERR "kvm: disabled by bios\n");
4890                 r = -EOPNOTSUPP;
4891                 goto out;
4892         }
4893
4894         r = kvm_mmu_module_init();
4895         if (r)
4896                 goto out;
4897
4898         kvm_set_mmio_spte_mask();
4899         kvm_init_msr_list();
4900
4901         kvm_x86_ops = ops;
4902         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4903                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4904
4905         kvm_timer_init();
4906
4907         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4908
4909         if (cpu_has_xsave)
4910                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4911
4912         kvm_lapic_init();
4913         return 0;
4914
4915 out:
4916         return r;
4917 }
4918
4919 void kvm_arch_exit(void)
4920 {
4921         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4922
4923         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4924                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4925                                             CPUFREQ_TRANSITION_NOTIFIER);
4926         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4927         kvm_x86_ops = NULL;
4928         kvm_mmu_module_exit();
4929 }
4930
4931 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4932 {
4933         ++vcpu->stat.halt_exits;
4934         if (irqchip_in_kernel(vcpu->kvm)) {
4935                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4936                 return 1;
4937         } else {
4938                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4939                 return 0;
4940         }
4941 }
4942 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4943
4944 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4945 {
4946         u64 param, ingpa, outgpa, ret;
4947         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4948         bool fast, longmode;
4949         int cs_db, cs_l;
4950
4951         /*
4952          * hypercall generates UD from non zero cpl and real mode
4953          * per HYPER-V spec
4954          */
4955         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4956                 kvm_queue_exception(vcpu, UD_VECTOR);
4957                 return 0;
4958         }
4959
4960         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4961         longmode = is_long_mode(vcpu) && cs_l == 1;
4962
4963         if (!longmode) {
4964                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4965                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4966                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4967                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4968                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4969                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4970         }
4971 #ifdef CONFIG_X86_64
4972         else {
4973                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4974                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4975                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4976         }
4977 #endif
4978
4979         code = param & 0xffff;
4980         fast = (param >> 16) & 0x1;
4981         rep_cnt = (param >> 32) & 0xfff;
4982         rep_idx = (param >> 48) & 0xfff;
4983
4984         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4985
4986         switch (code) {
4987         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4988                 kvm_vcpu_on_spin(vcpu);
4989                 break;
4990         default:
4991                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4992                 break;
4993         }
4994
4995         ret = res | (((u64)rep_done & 0xfff) << 32);
4996         if (longmode) {
4997                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4998         } else {
4999                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5000                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5001         }
5002
5003         return 1;
5004 }
5005
5006 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5007 {
5008         unsigned long nr, a0, a1, a2, a3, ret;
5009         int r = 1;
5010
5011         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5012                 return kvm_hv_hypercall(vcpu);
5013
5014         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5015         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5016         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5017         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5018         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5019
5020         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5021
5022         if (!is_long_mode(vcpu)) {
5023                 nr &= 0xFFFFFFFF;
5024                 a0 &= 0xFFFFFFFF;
5025                 a1 &= 0xFFFFFFFF;
5026                 a2 &= 0xFFFFFFFF;
5027                 a3 &= 0xFFFFFFFF;
5028         }
5029
5030         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5031                 ret = -KVM_EPERM;
5032                 goto out;
5033         }
5034
5035         switch (nr) {
5036         case KVM_HC_VAPIC_POLL_IRQ:
5037                 ret = 0;
5038                 break;
5039         default:
5040                 ret = -KVM_ENOSYS;
5041                 break;
5042         }
5043 out:
5044         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5045         ++vcpu->stat.hypercalls;
5046         return r;
5047 }
5048 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5049
5050 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5051 {
5052         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5053         char instruction[3];
5054         unsigned long rip = kvm_rip_read(vcpu);
5055
5056         /*
5057          * Blow out the MMU to ensure that no other VCPU has an active mapping
5058          * to ensure that the updated hypercall appears atomically across all
5059          * VCPUs.
5060          */
5061         kvm_mmu_zap_all(vcpu->kvm);
5062
5063         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5064
5065         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5066 }
5067
5068 /*
5069  * Check if userspace requested an interrupt window, and that the
5070  * interrupt window is open.
5071  *
5072  * No need to exit to userspace if we already have an interrupt queued.
5073  */
5074 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5075 {
5076         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5077                 vcpu->run->request_interrupt_window &&
5078                 kvm_arch_interrupt_allowed(vcpu));
5079 }
5080
5081 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5082 {
5083         struct kvm_run *kvm_run = vcpu->run;
5084
5085         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5086         kvm_run->cr8 = kvm_get_cr8(vcpu);
5087         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5088         if (irqchip_in_kernel(vcpu->kvm))
5089                 kvm_run->ready_for_interrupt_injection = 1;
5090         else
5091                 kvm_run->ready_for_interrupt_injection =
5092                         kvm_arch_interrupt_allowed(vcpu) &&
5093                         !kvm_cpu_has_interrupt(vcpu) &&
5094                         !kvm_event_needs_reinjection(vcpu);
5095 }
5096
5097 static void vapic_enter(struct kvm_vcpu *vcpu)
5098 {
5099         struct kvm_lapic *apic = vcpu->arch.apic;
5100         struct page *page;
5101
5102         if (!apic || !apic->vapic_addr)
5103                 return;
5104
5105         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5106
5107         vcpu->arch.apic->vapic_page = page;
5108 }
5109
5110 static void vapic_exit(struct kvm_vcpu *vcpu)
5111 {
5112         struct kvm_lapic *apic = vcpu->arch.apic;
5113         int idx;
5114
5115         if (!apic || !apic->vapic_addr)
5116                 return;
5117
5118         idx = srcu_read_lock(&vcpu->kvm->srcu);
5119         kvm_release_page_dirty(apic->vapic_page);
5120         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5121         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5122 }
5123
5124 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5125 {
5126         int max_irr, tpr;
5127
5128         if (!kvm_x86_ops->update_cr8_intercept)
5129                 return;
5130
5131         if (!vcpu->arch.apic)
5132                 return;
5133
5134         if (!vcpu->arch.apic->vapic_addr)
5135                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5136         else
5137                 max_irr = -1;
5138
5139         if (max_irr != -1)
5140                 max_irr >>= 4;
5141
5142         tpr = kvm_lapic_get_cr8(vcpu);
5143
5144         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5145 }
5146
5147 static void inject_pending_event(struct kvm_vcpu *vcpu)
5148 {
5149         /* try to reinject previous events if any */
5150         if (vcpu->arch.exception.pending) {
5151                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5152                                         vcpu->arch.exception.has_error_code,
5153                                         vcpu->arch.exception.error_code);
5154                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5155                                           vcpu->arch.exception.has_error_code,
5156                                           vcpu->arch.exception.error_code,
5157                                           vcpu->arch.exception.reinject);
5158                 return;
5159         }
5160
5161         if (vcpu->arch.nmi_injected) {
5162                 kvm_x86_ops->set_nmi(vcpu);
5163                 return;
5164         }
5165
5166         if (vcpu->arch.interrupt.pending) {
5167                 kvm_x86_ops->set_irq(vcpu);
5168                 return;
5169         }
5170
5171         /* try to inject new event if pending */
5172         if (vcpu->arch.nmi_pending) {
5173                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5174                         --vcpu->arch.nmi_pending;
5175                         vcpu->arch.nmi_injected = true;
5176                         kvm_x86_ops->set_nmi(vcpu);
5177                 }
5178         } else if (kvm_cpu_has_interrupt(vcpu)) {
5179                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5180                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5181                                             false);
5182                         kvm_x86_ops->set_irq(vcpu);
5183                 }
5184         }
5185 }
5186
5187 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5188 {
5189         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5190                         !vcpu->guest_xcr0_loaded) {
5191                 /* kvm_set_xcr() also depends on this */
5192                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5193                 vcpu->guest_xcr0_loaded = 1;
5194         }
5195 }
5196
5197 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5198 {
5199         if (vcpu->guest_xcr0_loaded) {
5200                 if (vcpu->arch.xcr0 != host_xcr0)
5201                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5202                 vcpu->guest_xcr0_loaded = 0;
5203         }
5204 }
5205
5206 static void process_nmi(struct kvm_vcpu *vcpu)
5207 {
5208         unsigned limit = 2;
5209
5210         /*
5211          * x86 is limited to one NMI running, and one NMI pending after it.
5212          * If an NMI is already in progress, limit further NMIs to just one.
5213          * Otherwise, allow two (and we'll inject the first one immediately).
5214          */
5215         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5216                 limit = 1;
5217
5218         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5219         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5220         kvm_make_request(KVM_REQ_EVENT, vcpu);
5221 }
5222
5223 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5224 {
5225         int r;
5226         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5227                 vcpu->run->request_interrupt_window;
5228         bool req_immediate_exit = 0;
5229
5230         if (vcpu->requests) {
5231                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5232                         kvm_mmu_unload(vcpu);
5233                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5234                         __kvm_migrate_timers(vcpu);
5235                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5236                         r = kvm_guest_time_update(vcpu);
5237                         if (unlikely(r))
5238                                 goto out;
5239                 }
5240                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5241                         kvm_mmu_sync_roots(vcpu);
5242                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5243                         kvm_x86_ops->tlb_flush(vcpu);
5244                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5245                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5246                         r = 0;
5247                         goto out;
5248                 }
5249                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5250                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5251                         r = 0;
5252                         goto out;
5253                 }
5254                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5255                         vcpu->fpu_active = 0;
5256                         kvm_x86_ops->fpu_deactivate(vcpu);
5257                 }
5258                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5259                         /* Page is swapped out. Do synthetic halt */
5260                         vcpu->arch.apf.halted = true;
5261                         r = 1;
5262                         goto out;
5263                 }
5264                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5265                         record_steal_time(vcpu);
5266                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5267                         process_nmi(vcpu);
5268                 req_immediate_exit =
5269                         kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5270                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5271                         kvm_handle_pmu_event(vcpu);
5272                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5273                         kvm_deliver_pmi(vcpu);
5274         }
5275
5276         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5277                 inject_pending_event(vcpu);
5278
5279                 /* enable NMI/IRQ window open exits if needed */
5280                 if (vcpu->arch.nmi_pending)
5281                         kvm_x86_ops->enable_nmi_window(vcpu);
5282                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5283                         kvm_x86_ops->enable_irq_window(vcpu);
5284
5285                 if (kvm_lapic_enabled(vcpu)) {
5286                         update_cr8_intercept(vcpu);
5287                         kvm_lapic_sync_to_vapic(vcpu);
5288                 }
5289         }
5290
5291         r = kvm_mmu_reload(vcpu);
5292         if (unlikely(r)) {
5293                 goto cancel_injection;
5294         }
5295
5296         preempt_disable();
5297
5298         kvm_x86_ops->prepare_guest_switch(vcpu);
5299         if (vcpu->fpu_active)
5300                 kvm_load_guest_fpu(vcpu);
5301         kvm_load_guest_xcr0(vcpu);
5302
5303         vcpu->mode = IN_GUEST_MODE;
5304
5305         /* We should set ->mode before check ->requests,
5306          * see the comment in make_all_cpus_request.
5307          */
5308         smp_mb();
5309
5310         local_irq_disable();
5311
5312         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5313             || need_resched() || signal_pending(current)) {
5314                 vcpu->mode = OUTSIDE_GUEST_MODE;
5315                 smp_wmb();
5316                 local_irq_enable();
5317                 preempt_enable();
5318                 r = 1;
5319                 goto cancel_injection;
5320         }
5321
5322         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5323
5324         if (req_immediate_exit)
5325                 smp_send_reschedule(vcpu->cpu);
5326
5327         kvm_guest_enter();
5328
5329         if (unlikely(vcpu->arch.switch_db_regs)) {
5330                 set_debugreg(0, 7);
5331                 set_debugreg(vcpu->arch.eff_db[0], 0);
5332                 set_debugreg(vcpu->arch.eff_db[1], 1);
5333                 set_debugreg(vcpu->arch.eff_db[2], 2);
5334                 set_debugreg(vcpu->arch.eff_db[3], 3);
5335         }
5336
5337         trace_kvm_entry(vcpu->vcpu_id);
5338         kvm_x86_ops->run(vcpu);
5339
5340         /*
5341          * If the guest has used debug registers, at least dr7
5342          * will be disabled while returning to the host.
5343          * If we don't have active breakpoints in the host, we don't
5344          * care about the messed up debug address registers. But if
5345          * we have some of them active, restore the old state.
5346          */
5347         if (hw_breakpoint_active())
5348                 hw_breakpoint_restore();
5349
5350         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5351
5352         vcpu->mode = OUTSIDE_GUEST_MODE;
5353         smp_wmb();
5354         local_irq_enable();
5355
5356         ++vcpu->stat.exits;
5357
5358         /*
5359          * We must have an instruction between local_irq_enable() and
5360          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5361          * the interrupt shadow.  The stat.exits increment will do nicely.
5362          * But we need to prevent reordering, hence this barrier():
5363          */
5364         barrier();
5365
5366         kvm_guest_exit();
5367
5368         preempt_enable();
5369
5370         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5371
5372         /*
5373          * Profile KVM exit RIPs:
5374          */
5375         if (unlikely(prof_on == KVM_PROFILING)) {
5376                 unsigned long rip = kvm_rip_read(vcpu);
5377                 profile_hit(KVM_PROFILING, (void *)rip);
5378         }
5379
5380         if (unlikely(vcpu->arch.tsc_always_catchup))
5381                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5382
5383         if (vcpu->arch.apic_attention)
5384                 kvm_lapic_sync_from_vapic(vcpu);
5385
5386         r = kvm_x86_ops->handle_exit(vcpu);
5387         return r;
5388
5389 cancel_injection:
5390         kvm_x86_ops->cancel_injection(vcpu);
5391         if (unlikely(vcpu->arch.apic_attention))
5392                 kvm_lapic_sync_from_vapic(vcpu);
5393 out:
5394         return r;
5395 }
5396
5397
5398 static int __vcpu_run(struct kvm_vcpu *vcpu)
5399 {
5400         int r;
5401         struct kvm *kvm = vcpu->kvm;
5402
5403         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5404                 pr_debug("vcpu %d received sipi with vector # %x\n",
5405                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5406                 kvm_lapic_reset(vcpu);
5407                 r = kvm_arch_vcpu_reset(vcpu);
5408                 if (r)
5409                         return r;
5410                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5411         }
5412
5413         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5414         vapic_enter(vcpu);
5415
5416         r = 1;
5417         while (r > 0) {
5418                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5419                     !vcpu->arch.apf.halted)
5420                         r = vcpu_enter_guest(vcpu);
5421                 else {
5422                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5423                         kvm_vcpu_block(vcpu);
5424                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5425                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5426                         {
5427                                 switch(vcpu->arch.mp_state) {
5428                                 case KVM_MP_STATE_HALTED:
5429                                         vcpu->arch.mp_state =
5430                                                 KVM_MP_STATE_RUNNABLE;
5431                                 case KVM_MP_STATE_RUNNABLE:
5432                                         vcpu->arch.apf.halted = false;
5433                                         break;
5434                                 case KVM_MP_STATE_SIPI_RECEIVED:
5435                                 default:
5436                                         r = -EINTR;
5437                                         break;
5438                                 }
5439                         }
5440                 }
5441
5442                 if (r <= 0)
5443                         break;
5444
5445                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5446                 if (kvm_cpu_has_pending_timer(vcpu))
5447                         kvm_inject_pending_timer_irqs(vcpu);
5448
5449                 if (dm_request_for_irq_injection(vcpu)) {
5450                         r = -EINTR;
5451                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5452                         ++vcpu->stat.request_irq_exits;
5453                 }
5454
5455                 kvm_check_async_pf_completion(vcpu);
5456
5457                 if (signal_pending(current)) {
5458                         r = -EINTR;
5459                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5460                         ++vcpu->stat.signal_exits;
5461                 }
5462                 if (need_resched()) {
5463                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5464                         kvm_resched(vcpu);
5465                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5466                 }
5467         }
5468
5469         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5470
5471         vapic_exit(vcpu);
5472
5473         return r;
5474 }
5475
5476 /*
5477  * Implements the following, as a state machine:
5478  *
5479  * read:
5480  *   for each fragment
5481  *     write gpa, len
5482  *     exit
5483  *     copy data
5484  *   execute insn
5485  *
5486  * write:
5487  *   for each fragment
5488  *      write gpa, len
5489  *      copy data
5490  *      exit
5491  */
5492 static int complete_mmio(struct kvm_vcpu *vcpu)
5493 {
5494         struct kvm_run *run = vcpu->run;
5495         struct kvm_mmio_fragment *frag;
5496         int r;
5497
5498         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5499                 return 1;
5500
5501         if (vcpu->mmio_needed) {
5502                 /* Complete previous fragment */
5503                 frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment++];
5504                 if (!vcpu->mmio_is_write)
5505                         memcpy(frag->data, run->mmio.data, frag->len);
5506                 if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
5507                         vcpu->mmio_needed = 0;
5508                         if (vcpu->mmio_is_write)
5509                                 return 1;
5510                         vcpu->mmio_read_completed = 1;
5511                         goto done;
5512                 }
5513                 /* Initiate next fragment */
5514                 ++frag;
5515                 run->exit_reason = KVM_EXIT_MMIO;
5516                 run->mmio.phys_addr = frag->gpa;
5517                 if (vcpu->mmio_is_write)
5518                         memcpy(run->mmio.data, frag->data, frag->len);
5519                 run->mmio.len = frag->len;
5520                 run->mmio.is_write = vcpu->mmio_is_write;
5521                 return 0;
5522
5523         }
5524 done:
5525         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5526         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5527         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5528         if (r != EMULATE_DONE)
5529                 return 0;
5530         return 1;
5531 }
5532
5533 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5534 {
5535         int r;
5536         sigset_t sigsaved;
5537
5538         if (!tsk_used_math(current) && init_fpu(current))
5539                 return -ENOMEM;
5540
5541         if (vcpu->sigset_active)
5542                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5543
5544         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5545                 kvm_vcpu_block(vcpu);
5546                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5547                 r = -EAGAIN;
5548                 goto out;
5549         }
5550
5551         /* re-sync apic's tpr */
5552         if (!irqchip_in_kernel(vcpu->kvm)) {
5553                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5554                         r = -EINVAL;
5555                         goto out;
5556                 }
5557         }
5558
5559         r = complete_mmio(vcpu);
5560         if (r <= 0)
5561                 goto out;
5562
5563         r = __vcpu_run(vcpu);
5564
5565 out:
5566         post_kvm_run_save(vcpu);
5567         if (vcpu->sigset_active)
5568                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5569
5570         return r;
5571 }
5572
5573 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5574 {
5575         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5576                 /*
5577                  * We are here if userspace calls get_regs() in the middle of
5578                  * instruction emulation. Registers state needs to be copied
5579                  * back from emulation context to vcpu. Userspace shouldn't do
5580                  * that usually, but some bad designed PV devices (vmware
5581                  * backdoor interface) need this to work
5582                  */
5583                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5584                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5585                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5586         }
5587         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5588         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5589         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5590         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5591         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5592         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5593         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5594         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5595 #ifdef CONFIG_X86_64
5596         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5597         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5598         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5599         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5600         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5601         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5602         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5603         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5604 #endif
5605
5606         regs->rip = kvm_rip_read(vcpu);
5607         regs->rflags = kvm_get_rflags(vcpu);
5608
5609         return 0;
5610 }
5611
5612 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5613 {
5614         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5615         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5616
5617         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5618         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5619         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5620         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5621         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5622         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5623         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5624         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5625 #ifdef CONFIG_X86_64
5626         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5627         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5628         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5629         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5630         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5631         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5632         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5633         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5634 #endif
5635
5636         kvm_rip_write(vcpu, regs->rip);
5637         kvm_set_rflags(vcpu, regs->rflags);
5638
5639         vcpu->arch.exception.pending = false;
5640
5641         kvm_make_request(KVM_REQ_EVENT, vcpu);
5642
5643         return 0;
5644 }
5645
5646 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5647 {
5648         struct kvm_segment cs;
5649
5650         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5651         *db = cs.db;
5652         *l = cs.l;
5653 }
5654 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5655
5656 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5657                                   struct kvm_sregs *sregs)
5658 {
5659         struct desc_ptr dt;
5660
5661         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5662         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5663         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5664         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5665         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5666         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5667
5668         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5669         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5670
5671         kvm_x86_ops->get_idt(vcpu, &dt);
5672         sregs->idt.limit = dt.size;
5673         sregs->idt.base = dt.address;
5674         kvm_x86_ops->get_gdt(vcpu, &dt);
5675         sregs->gdt.limit = dt.size;
5676         sregs->gdt.base = dt.address;
5677
5678         sregs->cr0 = kvm_read_cr0(vcpu);
5679         sregs->cr2 = vcpu->arch.cr2;
5680         sregs->cr3 = kvm_read_cr3(vcpu);
5681         sregs->cr4 = kvm_read_cr4(vcpu);
5682         sregs->cr8 = kvm_get_cr8(vcpu);
5683         sregs->efer = vcpu->arch.efer;
5684         sregs->apic_base = kvm_get_apic_base(vcpu);
5685
5686         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5687
5688         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5689                 set_bit(vcpu->arch.interrupt.nr,
5690                         (unsigned long *)sregs->interrupt_bitmap);
5691
5692         return 0;
5693 }
5694
5695 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5696                                     struct kvm_mp_state *mp_state)
5697 {
5698         mp_state->mp_state = vcpu->arch.mp_state;
5699         return 0;
5700 }
5701
5702 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5703                                     struct kvm_mp_state *mp_state)
5704 {
5705         vcpu->arch.mp_state = mp_state->mp_state;
5706         kvm_make_request(KVM_REQ_EVENT, vcpu);
5707         return 0;
5708 }
5709
5710 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
5711                     int reason, bool has_error_code, u32 error_code)
5712 {
5713         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5714         int ret;
5715
5716         init_emulate_ctxt(vcpu);
5717
5718         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
5719                                    has_error_code, error_code);
5720
5721         if (ret)
5722                 return EMULATE_FAIL;
5723
5724         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5725         kvm_rip_write(vcpu, ctxt->eip);
5726         kvm_set_rflags(vcpu, ctxt->eflags);
5727         kvm_make_request(KVM_REQ_EVENT, vcpu);
5728         return EMULATE_DONE;
5729 }
5730 EXPORT_SYMBOL_GPL(kvm_task_switch);
5731
5732 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5733                                   struct kvm_sregs *sregs)
5734 {
5735         int mmu_reset_needed = 0;
5736         int pending_vec, max_bits, idx;
5737         struct desc_ptr dt;
5738
5739         dt.size = sregs->idt.limit;
5740         dt.address = sregs->idt.base;
5741         kvm_x86_ops->set_idt(vcpu, &dt);
5742         dt.size = sregs->gdt.limit;
5743         dt.address = sregs->gdt.base;
5744         kvm_x86_ops->set_gdt(vcpu, &dt);
5745
5746         vcpu->arch.cr2 = sregs->cr2;
5747         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5748         vcpu->arch.cr3 = sregs->cr3;
5749         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5750
5751         kvm_set_cr8(vcpu, sregs->cr8);
5752
5753         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5754         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5755         kvm_set_apic_base(vcpu, sregs->apic_base);
5756
5757         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5758         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5759         vcpu->arch.cr0 = sregs->cr0;
5760
5761         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5762         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5763         if (sregs->cr4 & X86_CR4_OSXSAVE)
5764                 kvm_update_cpuid(vcpu);
5765
5766         idx = srcu_read_lock(&vcpu->kvm->srcu);
5767         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5768                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5769                 mmu_reset_needed = 1;
5770         }
5771         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5772
5773         if (mmu_reset_needed)
5774                 kvm_mmu_reset_context(vcpu);
5775
5776         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5777         pending_vec = find_first_bit(
5778                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5779         if (pending_vec < max_bits) {
5780                 kvm_queue_interrupt(vcpu, pending_vec, false);
5781                 pr_debug("Set back pending irq %d\n", pending_vec);
5782         }
5783
5784         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5785         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5786         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5787         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5788         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5789         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5790
5791         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5792         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5793
5794         update_cr8_intercept(vcpu);
5795
5796         /* Older userspace won't unhalt the vcpu on reset. */
5797         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5798             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5799             !is_protmode(vcpu))
5800                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5801
5802         kvm_make_request(KVM_REQ_EVENT, vcpu);
5803
5804         return 0;
5805 }
5806
5807 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5808                                         struct kvm_guest_debug *dbg)
5809 {
5810         unsigned long rflags;
5811         int i, r;
5812
5813         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5814                 r = -EBUSY;
5815                 if (vcpu->arch.exception.pending)
5816                         goto out;
5817                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5818                         kvm_queue_exception(vcpu, DB_VECTOR);
5819                 else
5820                         kvm_queue_exception(vcpu, BP_VECTOR);
5821         }
5822
5823         /*
5824          * Read rflags as long as potentially injected trace flags are still
5825          * filtered out.
5826          */
5827         rflags = kvm_get_rflags(vcpu);
5828
5829         vcpu->guest_debug = dbg->control;
5830         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5831                 vcpu->guest_debug = 0;
5832
5833         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5834                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5835                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5836                 vcpu->arch.switch_db_regs =
5837                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5838         } else {
5839                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5840                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5841                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5842         }
5843
5844         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5845                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5846                         get_segment_base(vcpu, VCPU_SREG_CS);
5847
5848         /*
5849          * Trigger an rflags update that will inject or remove the trace
5850          * flags.
5851          */
5852         kvm_set_rflags(vcpu, rflags);
5853
5854         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5855
5856         r = 0;
5857
5858 out:
5859
5860         return r;
5861 }
5862
5863 /*
5864  * Translate a guest virtual address to a guest physical address.
5865  */
5866 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5867                                     struct kvm_translation *tr)
5868 {
5869         unsigned long vaddr = tr->linear_address;
5870         gpa_t gpa;
5871         int idx;
5872
5873         idx = srcu_read_lock(&vcpu->kvm->srcu);
5874         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5875         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5876         tr->physical_address = gpa;
5877         tr->valid = gpa != UNMAPPED_GVA;
5878         tr->writeable = 1;
5879         tr->usermode = 0;
5880
5881         return 0;
5882 }
5883
5884 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5885 {
5886         struct i387_fxsave_struct *fxsave =
5887                         &vcpu->arch.guest_fpu.state->fxsave;
5888
5889         memcpy(fpu->fpr, fxsave->st_space, 128);
5890         fpu->fcw = fxsave->cwd;
5891         fpu->fsw = fxsave->swd;
5892         fpu->ftwx = fxsave->twd;
5893         fpu->last_opcode = fxsave->fop;
5894         fpu->last_ip = fxsave->rip;
5895         fpu->last_dp = fxsave->rdp;
5896         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5897
5898         return 0;
5899 }
5900
5901 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5902 {
5903         struct i387_fxsave_struct *fxsave =
5904                         &vcpu->arch.guest_fpu.state->fxsave;
5905
5906         memcpy(fxsave->st_space, fpu->fpr, 128);
5907         fxsave->cwd = fpu->fcw;
5908         fxsave->swd = fpu->fsw;
5909         fxsave->twd = fpu->ftwx;
5910         fxsave->fop = fpu->last_opcode;
5911         fxsave->rip = fpu->last_ip;
5912         fxsave->rdp = fpu->last_dp;
5913         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5914
5915         return 0;
5916 }
5917
5918 int fx_init(struct kvm_vcpu *vcpu)
5919 {
5920         int err;
5921
5922         err = fpu_alloc(&vcpu->arch.guest_fpu);
5923         if (err)
5924                 return err;
5925
5926         fpu_finit(&vcpu->arch.guest_fpu);
5927
5928         /*
5929          * Ensure guest xcr0 is valid for loading
5930          */
5931         vcpu->arch.xcr0 = XSTATE_FP;
5932
5933         vcpu->arch.cr0 |= X86_CR0_ET;
5934
5935         return 0;
5936 }
5937 EXPORT_SYMBOL_GPL(fx_init);
5938
5939 static void fx_free(struct kvm_vcpu *vcpu)
5940 {
5941         fpu_free(&vcpu->arch.guest_fpu);
5942 }
5943
5944 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5945 {
5946         if (vcpu->guest_fpu_loaded)
5947                 return;
5948
5949         /*
5950          * Restore all possible states in the guest,
5951          * and assume host would use all available bits.
5952          * Guest xcr0 would be loaded later.
5953          */
5954         kvm_put_guest_xcr0(vcpu);
5955         vcpu->guest_fpu_loaded = 1;
5956         unlazy_fpu(current);
5957         fpu_restore_checking(&vcpu->arch.guest_fpu);
5958         trace_kvm_fpu(1);
5959 }
5960
5961 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5962 {
5963         kvm_put_guest_xcr0(vcpu);
5964
5965         if (!vcpu->guest_fpu_loaded)
5966                 return;
5967
5968         vcpu->guest_fpu_loaded = 0;
5969         fpu_save_init(&vcpu->arch.guest_fpu);
5970         ++vcpu->stat.fpu_reload;
5971         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5972         trace_kvm_fpu(0);
5973 }
5974
5975 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5976 {
5977         kvmclock_reset(vcpu);
5978
5979         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5980         fx_free(vcpu);
5981         kvm_x86_ops->vcpu_free(vcpu);
5982 }
5983
5984 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5985                                                 unsigned int id)
5986 {
5987         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5988                 printk_once(KERN_WARNING
5989                 "kvm: SMP vm created on host with unstable TSC; "
5990                 "guest TSC will not be reliable\n");
5991         return kvm_x86_ops->vcpu_create(kvm, id);
5992 }
5993
5994 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5995 {
5996         int r;
5997
5998         vcpu->arch.mtrr_state.have_fixed = 1;
5999         vcpu_load(vcpu);
6000         r = kvm_arch_vcpu_reset(vcpu);
6001         if (r == 0)
6002                 r = kvm_mmu_setup(vcpu);
6003         vcpu_put(vcpu);
6004
6005         return r;
6006 }
6007
6008 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6009 {
6010         vcpu->arch.apf.msr_val = 0;
6011
6012         vcpu_load(vcpu);
6013         kvm_mmu_unload(vcpu);
6014         vcpu_put(vcpu);
6015
6016         fx_free(vcpu);
6017         kvm_x86_ops->vcpu_free(vcpu);
6018 }
6019
6020 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6021 {
6022         atomic_set(&vcpu->arch.nmi_queued, 0);
6023         vcpu->arch.nmi_pending = 0;
6024         vcpu->arch.nmi_injected = false;
6025
6026         vcpu->arch.switch_db_regs = 0;
6027         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6028         vcpu->arch.dr6 = DR6_FIXED_1;
6029         vcpu->arch.dr7 = DR7_FIXED_1;
6030
6031         kvm_make_request(KVM_REQ_EVENT, vcpu);
6032         vcpu->arch.apf.msr_val = 0;
6033         vcpu->arch.st.msr_val = 0;
6034
6035         kvmclock_reset(vcpu);
6036
6037         kvm_clear_async_pf_completion_queue(vcpu);
6038         kvm_async_pf_hash_reset(vcpu);
6039         vcpu->arch.apf.halted = false;
6040
6041         kvm_pmu_reset(vcpu);
6042
6043         return kvm_x86_ops->vcpu_reset(vcpu);
6044 }
6045
6046 int kvm_arch_hardware_enable(void *garbage)
6047 {
6048         struct kvm *kvm;
6049         struct kvm_vcpu *vcpu;
6050         int i;
6051         int ret;
6052         u64 local_tsc;
6053         u64 max_tsc = 0;
6054         bool stable, backwards_tsc = false;
6055
6056         kvm_shared_msr_cpu_online();
6057         ret = kvm_x86_ops->hardware_enable(garbage);
6058         if (ret != 0)
6059                 return ret;
6060
6061         local_tsc = native_read_tsc();
6062         stable = !check_tsc_unstable();
6063         list_for_each_entry(kvm, &vm_list, vm_list) {
6064                 kvm_for_each_vcpu(i, vcpu, kvm) {
6065                         if (!stable && vcpu->cpu == smp_processor_id())
6066                                 set_bit(KVM_REQ_CLOCK_UPDATE, &vcpu->requests);
6067                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
6068                                 backwards_tsc = true;
6069                                 if (vcpu->arch.last_host_tsc > max_tsc)
6070                                         max_tsc = vcpu->arch.last_host_tsc;
6071                         }
6072                 }
6073         }
6074
6075         /*
6076          * Sometimes, even reliable TSCs go backwards.  This happens on
6077          * platforms that reset TSC during suspend or hibernate actions, but
6078          * maintain synchronization.  We must compensate.  Fortunately, we can
6079          * detect that condition here, which happens early in CPU bringup,
6080          * before any KVM threads can be running.  Unfortunately, we can't
6081          * bring the TSCs fully up to date with real time, as we aren't yet far
6082          * enough into CPU bringup that we know how much real time has actually
6083          * elapsed; our helper function, get_kernel_ns() will be using boot
6084          * variables that haven't been updated yet.
6085          *
6086          * So we simply find the maximum observed TSC above, then record the
6087          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
6088          * the adjustment will be applied.  Note that we accumulate
6089          * adjustments, in case multiple suspend cycles happen before some VCPU
6090          * gets a chance to run again.  In the event that no KVM threads get a
6091          * chance to run, we will miss the entire elapsed period, as we'll have
6092          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
6093          * loose cycle time.  This isn't too big a deal, since the loss will be
6094          * uniform across all VCPUs (not to mention the scenario is extremely
6095          * unlikely). It is possible that a second hibernate recovery happens
6096          * much faster than a first, causing the observed TSC here to be
6097          * smaller; this would require additional padding adjustment, which is
6098          * why we set last_host_tsc to the local tsc observed here.
6099          *
6100          * N.B. - this code below runs only on platforms with reliable TSC,
6101          * as that is the only way backwards_tsc is set above.  Also note
6102          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
6103          * have the same delta_cyc adjustment applied if backwards_tsc
6104          * is detected.  Note further, this adjustment is only done once,
6105          * as we reset last_host_tsc on all VCPUs to stop this from being
6106          * called multiple times (one for each physical CPU bringup).
6107          *
6108          * Platforms with unreliable TSCs don't have to deal with this, they
6109          * will be compensated by the logic in vcpu_load, which sets the TSC to
6110          * catchup mode.  This will catchup all VCPUs to real time, but cannot
6111          * guarantee that they stay in perfect synchronization.
6112          */
6113         if (backwards_tsc) {
6114                 u64 delta_cyc = max_tsc - local_tsc;
6115                 list_for_each_entry(kvm, &vm_list, vm_list) {
6116                         kvm_for_each_vcpu(i, vcpu, kvm) {
6117                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
6118                                 vcpu->arch.last_host_tsc = local_tsc;
6119                         }
6120
6121                         /*
6122                          * We have to disable TSC offset matching.. if you were
6123                          * booting a VM while issuing an S4 host suspend....
6124                          * you may have some problem.  Solving this issue is
6125                          * left as an exercise to the reader.
6126                          */
6127                         kvm->arch.last_tsc_nsec = 0;
6128                         kvm->arch.last_tsc_write = 0;
6129                 }
6130
6131         }
6132         return 0;
6133 }
6134
6135 void kvm_arch_hardware_disable(void *garbage)
6136 {
6137         kvm_x86_ops->hardware_disable(garbage);
6138         drop_user_return_notifiers(garbage);
6139 }
6140
6141 int kvm_arch_hardware_setup(void)
6142 {
6143         return kvm_x86_ops->hardware_setup();
6144 }
6145
6146 void kvm_arch_hardware_unsetup(void)
6147 {
6148         kvm_x86_ops->hardware_unsetup();
6149 }
6150
6151 void kvm_arch_check_processor_compat(void *rtn)
6152 {
6153         kvm_x86_ops->check_processor_compatibility(rtn);
6154 }
6155
6156 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
6157 {
6158         return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
6159 }
6160
6161 struct static_key kvm_no_apic_vcpu __read_mostly;
6162
6163 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6164 {
6165         struct page *page;
6166         struct kvm *kvm;
6167         int r;
6168
6169         BUG_ON(vcpu->kvm == NULL);
6170         kvm = vcpu->kvm;
6171
6172         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6173         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6174                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6175         else
6176                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6177
6178         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6179         if (!page) {
6180                 r = -ENOMEM;
6181                 goto fail;
6182         }
6183         vcpu->arch.pio_data = page_address(page);
6184
6185         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6186
6187         r = kvm_mmu_create(vcpu);
6188         if (r < 0)
6189                 goto fail_free_pio_data;
6190
6191         if (irqchip_in_kernel(kvm)) {
6192                 r = kvm_create_lapic(vcpu);
6193                 if (r < 0)
6194                         goto fail_mmu_destroy;
6195         } else
6196                 static_key_slow_inc(&kvm_no_apic_vcpu);
6197
6198         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6199                                        GFP_KERNEL);
6200         if (!vcpu->arch.mce_banks) {
6201                 r = -ENOMEM;
6202                 goto fail_free_lapic;
6203         }
6204         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6205
6206         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6207                 goto fail_free_mce_banks;
6208
6209         kvm_async_pf_hash_reset(vcpu);
6210         kvm_pmu_init(vcpu);
6211
6212         return 0;
6213 fail_free_mce_banks:
6214         kfree(vcpu->arch.mce_banks);
6215 fail_free_lapic:
6216         kvm_free_lapic(vcpu);
6217 fail_mmu_destroy:
6218         kvm_mmu_destroy(vcpu);
6219 fail_free_pio_data:
6220         free_page((unsigned long)vcpu->arch.pio_data);
6221 fail:
6222         return r;
6223 }
6224
6225 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6226 {
6227         int idx;
6228
6229         kvm_pmu_destroy(vcpu);
6230         kfree(vcpu->arch.mce_banks);
6231         kvm_free_lapic(vcpu);
6232         idx = srcu_read_lock(&vcpu->kvm->srcu);
6233         kvm_mmu_destroy(vcpu);
6234         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6235         free_page((unsigned long)vcpu->arch.pio_data);
6236         if (!irqchip_in_kernel(vcpu->kvm))
6237                 static_key_slow_dec(&kvm_no_apic_vcpu);
6238 }
6239
6240 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6241 {
6242         if (type)
6243                 return -EINVAL;
6244
6245         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6246         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6247
6248         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6249         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6250
6251         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6252
6253         return 0;
6254 }
6255
6256 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6257 {
6258         vcpu_load(vcpu);
6259         kvm_mmu_unload(vcpu);
6260         vcpu_put(vcpu);
6261 }
6262
6263 static void kvm_free_vcpus(struct kvm *kvm)
6264 {
6265         unsigned int i;
6266         struct kvm_vcpu *vcpu;
6267
6268         /*
6269          * Unpin any mmu pages first.
6270          */