KVM: Add generic RDPMC support
[linux-3.10.git] / arch / x86 / kvm / x86.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * derived from drivers/kvm/kvm_main.c
5  *
6  * Copyright (C) 2006 Qumranet, Inc.
7  * Copyright (C) 2008 Qumranet, Inc.
8  * Copyright IBM Corporation, 2008
9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
10  *
11  * Authors:
12  *   Avi Kivity   <avi@qumranet.com>
13  *   Yaniv Kamay  <yaniv@qumranet.com>
14  *   Amit Shah    <amit.shah@qumranet.com>
15  *   Ben-Ami Yassour <benami@il.ibm.com>
16  *
17  * This work is licensed under the terms of the GNU GPL, version 2.  See
18  * the COPYING file in the top-level directory.
19  *
20  */
21
22 #include <linux/kvm_host.h>
23 #include "irq.h"
24 #include "mmu.h"
25 #include "i8254.h"
26 #include "tss.h"
27 #include "kvm_cache_regs.h"
28 #include "x86.h"
29 #include "cpuid.h"
30
31 #include <linux/clocksource.h>
32 #include <linux/interrupt.h>
33 #include <linux/kvm.h>
34 #include <linux/fs.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <trace/events/kvm.h>
50
51 #define CREATE_TRACE_POINTS
52 #include "trace.h"
53
54 #include <asm/debugreg.h>
55 #include <asm/msr.h>
56 #include <asm/desc.h>
57 #include <asm/mtrr.h>
58 #include <asm/mce.h>
59 #include <asm/i387.h>
60 #include <asm/xcr.h>
61 #include <asm/pvclock.h>
62 #include <asm/div64.h>
63
64 #define MAX_IO_MSRS 256
65 #define KVM_MAX_MCE_BANKS 32
66 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
67
68 #define emul_to_vcpu(ctxt) \
69         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
70
71 /* EFER defaults:
72  * - enable syscall per default because its emulated by KVM
73  * - enable LME and LMA per default on 64 bit KVM
74  */
75 #ifdef CONFIG_X86_64
76 static
77 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
78 #else
79 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
80 #endif
81
82 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
83 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
84
85 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
86 static void process_nmi(struct kvm_vcpu *vcpu);
87
88 struct kvm_x86_ops *kvm_x86_ops;
89 EXPORT_SYMBOL_GPL(kvm_x86_ops);
90
91 int ignore_msrs = 0;
92 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
93
94 bool kvm_has_tsc_control;
95 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
96 u32  kvm_max_guest_tsc_khz;
97 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
98
99 #define KVM_NR_SHARED_MSRS 16
100
101 struct kvm_shared_msrs_global {
102         int nr;
103         u32 msrs[KVM_NR_SHARED_MSRS];
104 };
105
106 struct kvm_shared_msrs {
107         struct user_return_notifier urn;
108         bool registered;
109         struct kvm_shared_msr_values {
110                 u64 host;
111                 u64 curr;
112         } values[KVM_NR_SHARED_MSRS];
113 };
114
115 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
116 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
117
118 struct kvm_stats_debugfs_item debugfs_entries[] = {
119         { "pf_fixed", VCPU_STAT(pf_fixed) },
120         { "pf_guest", VCPU_STAT(pf_guest) },
121         { "tlb_flush", VCPU_STAT(tlb_flush) },
122         { "invlpg", VCPU_STAT(invlpg) },
123         { "exits", VCPU_STAT(exits) },
124         { "io_exits", VCPU_STAT(io_exits) },
125         { "mmio_exits", VCPU_STAT(mmio_exits) },
126         { "signal_exits", VCPU_STAT(signal_exits) },
127         { "irq_window", VCPU_STAT(irq_window_exits) },
128         { "nmi_window", VCPU_STAT(nmi_window_exits) },
129         { "halt_exits", VCPU_STAT(halt_exits) },
130         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
131         { "hypercalls", VCPU_STAT(hypercalls) },
132         { "request_irq", VCPU_STAT(request_irq_exits) },
133         { "irq_exits", VCPU_STAT(irq_exits) },
134         { "host_state_reload", VCPU_STAT(host_state_reload) },
135         { "efer_reload", VCPU_STAT(efer_reload) },
136         { "fpu_reload", VCPU_STAT(fpu_reload) },
137         { "insn_emulation", VCPU_STAT(insn_emulation) },
138         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
139         { "irq_injections", VCPU_STAT(irq_injections) },
140         { "nmi_injections", VCPU_STAT(nmi_injections) },
141         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
142         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
143         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
144         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
145         { "mmu_flooded", VM_STAT(mmu_flooded) },
146         { "mmu_recycled", VM_STAT(mmu_recycled) },
147         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
148         { "mmu_unsync", VM_STAT(mmu_unsync) },
149         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
150         { "largepages", VM_STAT(lpages) },
151         { NULL }
152 };
153
154 u64 __read_mostly host_xcr0;
155
156 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
157
158 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
159 {
160         int i;
161         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
162                 vcpu->arch.apf.gfns[i] = ~0;
163 }
164
165 static void kvm_on_user_return(struct user_return_notifier *urn)
166 {
167         unsigned slot;
168         struct kvm_shared_msrs *locals
169                 = container_of(urn, struct kvm_shared_msrs, urn);
170         struct kvm_shared_msr_values *values;
171
172         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
173                 values = &locals->values[slot];
174                 if (values->host != values->curr) {
175                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
176                         values->curr = values->host;
177                 }
178         }
179         locals->registered = false;
180         user_return_notifier_unregister(urn);
181 }
182
183 static void shared_msr_update(unsigned slot, u32 msr)
184 {
185         struct kvm_shared_msrs *smsr;
186         u64 value;
187
188         smsr = &__get_cpu_var(shared_msrs);
189         /* only read, and nobody should modify it at this time,
190          * so don't need lock */
191         if (slot >= shared_msrs_global.nr) {
192                 printk(KERN_ERR "kvm: invalid MSR slot!");
193                 return;
194         }
195         rdmsrl_safe(msr, &value);
196         smsr->values[slot].host = value;
197         smsr->values[slot].curr = value;
198 }
199
200 void kvm_define_shared_msr(unsigned slot, u32 msr)
201 {
202         if (slot >= shared_msrs_global.nr)
203                 shared_msrs_global.nr = slot + 1;
204         shared_msrs_global.msrs[slot] = msr;
205         /* we need ensured the shared_msr_global have been updated */
206         smp_wmb();
207 }
208 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
209
210 static void kvm_shared_msr_cpu_online(void)
211 {
212         unsigned i;
213
214         for (i = 0; i < shared_msrs_global.nr; ++i)
215                 shared_msr_update(i, shared_msrs_global.msrs[i]);
216 }
217
218 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
219 {
220         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
221
222         if (((value ^ smsr->values[slot].curr) & mask) == 0)
223                 return;
224         smsr->values[slot].curr = value;
225         wrmsrl(shared_msrs_global.msrs[slot], value);
226         if (!smsr->registered) {
227                 smsr->urn.on_user_return = kvm_on_user_return;
228                 user_return_notifier_register(&smsr->urn);
229                 smsr->registered = true;
230         }
231 }
232 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
233
234 static void drop_user_return_notifiers(void *ignore)
235 {
236         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
237
238         if (smsr->registered)
239                 kvm_on_user_return(&smsr->urn);
240 }
241
242 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
243 {
244         if (irqchip_in_kernel(vcpu->kvm))
245                 return vcpu->arch.apic_base;
246         else
247                 return vcpu->arch.apic_base;
248 }
249 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
250
251 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
252 {
253         /* TODO: reserve bits check */
254         if (irqchip_in_kernel(vcpu->kvm))
255                 kvm_lapic_set_base(vcpu, data);
256         else
257                 vcpu->arch.apic_base = data;
258 }
259 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
260
261 #define EXCPT_BENIGN            0
262 #define EXCPT_CONTRIBUTORY      1
263 #define EXCPT_PF                2
264
265 static int exception_class(int vector)
266 {
267         switch (vector) {
268         case PF_VECTOR:
269                 return EXCPT_PF;
270         case DE_VECTOR:
271         case TS_VECTOR:
272         case NP_VECTOR:
273         case SS_VECTOR:
274         case GP_VECTOR:
275                 return EXCPT_CONTRIBUTORY;
276         default:
277                 break;
278         }
279         return EXCPT_BENIGN;
280 }
281
282 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
283                 unsigned nr, bool has_error, u32 error_code,
284                 bool reinject)
285 {
286         u32 prev_nr;
287         int class1, class2;
288
289         kvm_make_request(KVM_REQ_EVENT, vcpu);
290
291         if (!vcpu->arch.exception.pending) {
292         queue:
293                 vcpu->arch.exception.pending = true;
294                 vcpu->arch.exception.has_error_code = has_error;
295                 vcpu->arch.exception.nr = nr;
296                 vcpu->arch.exception.error_code = error_code;
297                 vcpu->arch.exception.reinject = reinject;
298                 return;
299         }
300
301         /* to check exception */
302         prev_nr = vcpu->arch.exception.nr;
303         if (prev_nr == DF_VECTOR) {
304                 /* triple fault -> shutdown */
305                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
306                 return;
307         }
308         class1 = exception_class(prev_nr);
309         class2 = exception_class(nr);
310         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
311                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
312                 /* generate double fault per SDM Table 5-5 */
313                 vcpu->arch.exception.pending = true;
314                 vcpu->arch.exception.has_error_code = true;
315                 vcpu->arch.exception.nr = DF_VECTOR;
316                 vcpu->arch.exception.error_code = 0;
317         } else
318                 /* replace previous exception with a new one in a hope
319                    that instruction re-execution will regenerate lost
320                    exception */
321                 goto queue;
322 }
323
324 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
325 {
326         kvm_multiple_exception(vcpu, nr, false, 0, false);
327 }
328 EXPORT_SYMBOL_GPL(kvm_queue_exception);
329
330 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
331 {
332         kvm_multiple_exception(vcpu, nr, false, 0, true);
333 }
334 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
335
336 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
337 {
338         if (err)
339                 kvm_inject_gp(vcpu, 0);
340         else
341                 kvm_x86_ops->skip_emulated_instruction(vcpu);
342 }
343 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
344
345 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
346 {
347         ++vcpu->stat.pf_guest;
348         vcpu->arch.cr2 = fault->address;
349         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
350 }
351 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
352
353 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
354 {
355         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
356                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
357         else
358                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
359 }
360
361 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
362 {
363         atomic_inc(&vcpu->arch.nmi_queued);
364         kvm_make_request(KVM_REQ_NMI, vcpu);
365 }
366 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
367
368 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
369 {
370         kvm_multiple_exception(vcpu, nr, true, error_code, false);
371 }
372 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
373
374 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
375 {
376         kvm_multiple_exception(vcpu, nr, true, error_code, true);
377 }
378 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
379
380 /*
381  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
382  * a #GP and return false.
383  */
384 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
385 {
386         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
387                 return true;
388         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
389         return false;
390 }
391 EXPORT_SYMBOL_GPL(kvm_require_cpl);
392
393 /*
394  * This function will be used to read from the physical memory of the currently
395  * running guest. The difference to kvm_read_guest_page is that this function
396  * can read from guest physical or from the guest's guest physical memory.
397  */
398 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
399                             gfn_t ngfn, void *data, int offset, int len,
400                             u32 access)
401 {
402         gfn_t real_gfn;
403         gpa_t ngpa;
404
405         ngpa     = gfn_to_gpa(ngfn);
406         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
407         if (real_gfn == UNMAPPED_GVA)
408                 return -EFAULT;
409
410         real_gfn = gpa_to_gfn(real_gfn);
411
412         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
413 }
414 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
415
416 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
417                                void *data, int offset, int len, u32 access)
418 {
419         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
420                                        data, offset, len, access);
421 }
422
423 /*
424  * Load the pae pdptrs.  Return true is they are all valid.
425  */
426 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
427 {
428         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
429         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
430         int i;
431         int ret;
432         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
433
434         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
435                                       offset * sizeof(u64), sizeof(pdpte),
436                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
437         if (ret < 0) {
438                 ret = 0;
439                 goto out;
440         }
441         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
442                 if (is_present_gpte(pdpte[i]) &&
443                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
444                         ret = 0;
445                         goto out;
446                 }
447         }
448         ret = 1;
449
450         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
451         __set_bit(VCPU_EXREG_PDPTR,
452                   (unsigned long *)&vcpu->arch.regs_avail);
453         __set_bit(VCPU_EXREG_PDPTR,
454                   (unsigned long *)&vcpu->arch.regs_dirty);
455 out:
456
457         return ret;
458 }
459 EXPORT_SYMBOL_GPL(load_pdptrs);
460
461 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
462 {
463         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
464         bool changed = true;
465         int offset;
466         gfn_t gfn;
467         int r;
468
469         if (is_long_mode(vcpu) || !is_pae(vcpu))
470                 return false;
471
472         if (!test_bit(VCPU_EXREG_PDPTR,
473                       (unsigned long *)&vcpu->arch.regs_avail))
474                 return true;
475
476         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
477         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
478         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
479                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
480         if (r < 0)
481                 goto out;
482         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
483 out:
484
485         return changed;
486 }
487
488 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
489 {
490         unsigned long old_cr0 = kvm_read_cr0(vcpu);
491         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
492                                     X86_CR0_CD | X86_CR0_NW;
493
494         cr0 |= X86_CR0_ET;
495
496 #ifdef CONFIG_X86_64
497         if (cr0 & 0xffffffff00000000UL)
498                 return 1;
499 #endif
500
501         cr0 &= ~CR0_RESERVED_BITS;
502
503         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
504                 return 1;
505
506         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
507                 return 1;
508
509         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
510 #ifdef CONFIG_X86_64
511                 if ((vcpu->arch.efer & EFER_LME)) {
512                         int cs_db, cs_l;
513
514                         if (!is_pae(vcpu))
515                                 return 1;
516                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
517                         if (cs_l)
518                                 return 1;
519                 } else
520 #endif
521                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
522                                                  kvm_read_cr3(vcpu)))
523                         return 1;
524         }
525
526         kvm_x86_ops->set_cr0(vcpu, cr0);
527
528         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
529                 kvm_clear_async_pf_completion_queue(vcpu);
530                 kvm_async_pf_hash_reset(vcpu);
531         }
532
533         if ((cr0 ^ old_cr0) & update_bits)
534                 kvm_mmu_reset_context(vcpu);
535         return 0;
536 }
537 EXPORT_SYMBOL_GPL(kvm_set_cr0);
538
539 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
540 {
541         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
542 }
543 EXPORT_SYMBOL_GPL(kvm_lmsw);
544
545 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
546 {
547         u64 xcr0;
548
549         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
550         if (index != XCR_XFEATURE_ENABLED_MASK)
551                 return 1;
552         xcr0 = xcr;
553         if (kvm_x86_ops->get_cpl(vcpu) != 0)
554                 return 1;
555         if (!(xcr0 & XSTATE_FP))
556                 return 1;
557         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
558                 return 1;
559         if (xcr0 & ~host_xcr0)
560                 return 1;
561         vcpu->arch.xcr0 = xcr0;
562         vcpu->guest_xcr0_loaded = 0;
563         return 0;
564 }
565
566 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
567 {
568         if (__kvm_set_xcr(vcpu, index, xcr)) {
569                 kvm_inject_gp(vcpu, 0);
570                 return 1;
571         }
572         return 0;
573 }
574 EXPORT_SYMBOL_GPL(kvm_set_xcr);
575
576 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
577 {
578         unsigned long old_cr4 = kvm_read_cr4(vcpu);
579         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
580                                    X86_CR4_PAE | X86_CR4_SMEP;
581         if (cr4 & CR4_RESERVED_BITS)
582                 return 1;
583
584         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
585                 return 1;
586
587         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
588                 return 1;
589
590         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
591                 return 1;
592
593         if (is_long_mode(vcpu)) {
594                 if (!(cr4 & X86_CR4_PAE))
595                         return 1;
596         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
597                    && ((cr4 ^ old_cr4) & pdptr_bits)
598                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
599                                    kvm_read_cr3(vcpu)))
600                 return 1;
601
602         if (kvm_x86_ops->set_cr4(vcpu, cr4))
603                 return 1;
604
605         if ((cr4 ^ old_cr4) & pdptr_bits)
606                 kvm_mmu_reset_context(vcpu);
607
608         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
609                 kvm_update_cpuid(vcpu);
610
611         return 0;
612 }
613 EXPORT_SYMBOL_GPL(kvm_set_cr4);
614
615 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
616 {
617         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
618                 kvm_mmu_sync_roots(vcpu);
619                 kvm_mmu_flush_tlb(vcpu);
620                 return 0;
621         }
622
623         if (is_long_mode(vcpu)) {
624                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
625                         return 1;
626         } else {
627                 if (is_pae(vcpu)) {
628                         if (cr3 & CR3_PAE_RESERVED_BITS)
629                                 return 1;
630                         if (is_paging(vcpu) &&
631                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
632                                 return 1;
633                 }
634                 /*
635                  * We don't check reserved bits in nonpae mode, because
636                  * this isn't enforced, and VMware depends on this.
637                  */
638         }
639
640         /*
641          * Does the new cr3 value map to physical memory? (Note, we
642          * catch an invalid cr3 even in real-mode, because it would
643          * cause trouble later on when we turn on paging anyway.)
644          *
645          * A real CPU would silently accept an invalid cr3 and would
646          * attempt to use it - with largely undefined (and often hard
647          * to debug) behavior on the guest side.
648          */
649         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
650                 return 1;
651         vcpu->arch.cr3 = cr3;
652         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
653         vcpu->arch.mmu.new_cr3(vcpu);
654         return 0;
655 }
656 EXPORT_SYMBOL_GPL(kvm_set_cr3);
657
658 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
659 {
660         if (cr8 & CR8_RESERVED_BITS)
661                 return 1;
662         if (irqchip_in_kernel(vcpu->kvm))
663                 kvm_lapic_set_tpr(vcpu, cr8);
664         else
665                 vcpu->arch.cr8 = cr8;
666         return 0;
667 }
668 EXPORT_SYMBOL_GPL(kvm_set_cr8);
669
670 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
671 {
672         if (irqchip_in_kernel(vcpu->kvm))
673                 return kvm_lapic_get_cr8(vcpu);
674         else
675                 return vcpu->arch.cr8;
676 }
677 EXPORT_SYMBOL_GPL(kvm_get_cr8);
678
679 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
680 {
681         switch (dr) {
682         case 0 ... 3:
683                 vcpu->arch.db[dr] = val;
684                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
685                         vcpu->arch.eff_db[dr] = val;
686                 break;
687         case 4:
688                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
689                         return 1; /* #UD */
690                 /* fall through */
691         case 6:
692                 if (val & 0xffffffff00000000ULL)
693                         return -1; /* #GP */
694                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
695                 break;
696         case 5:
697                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
698                         return 1; /* #UD */
699                 /* fall through */
700         default: /* 7 */
701                 if (val & 0xffffffff00000000ULL)
702                         return -1; /* #GP */
703                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
704                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
705                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
706                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
707                 }
708                 break;
709         }
710
711         return 0;
712 }
713
714 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
715 {
716         int res;
717
718         res = __kvm_set_dr(vcpu, dr, val);
719         if (res > 0)
720                 kvm_queue_exception(vcpu, UD_VECTOR);
721         else if (res < 0)
722                 kvm_inject_gp(vcpu, 0);
723
724         return res;
725 }
726 EXPORT_SYMBOL_GPL(kvm_set_dr);
727
728 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
729 {
730         switch (dr) {
731         case 0 ... 3:
732                 *val = vcpu->arch.db[dr];
733                 break;
734         case 4:
735                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
736                         return 1;
737                 /* fall through */
738         case 6:
739                 *val = vcpu->arch.dr6;
740                 break;
741         case 5:
742                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
743                         return 1;
744                 /* fall through */
745         default: /* 7 */
746                 *val = vcpu->arch.dr7;
747                 break;
748         }
749
750         return 0;
751 }
752
753 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
754 {
755         if (_kvm_get_dr(vcpu, dr, val)) {
756                 kvm_queue_exception(vcpu, UD_VECTOR);
757                 return 1;
758         }
759         return 0;
760 }
761 EXPORT_SYMBOL_GPL(kvm_get_dr);
762
763 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
764 {
765         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
766         u64 data;
767         int err;
768
769         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
770         if (err)
771                 return err;
772         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
773         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
774         return err;
775 }
776 EXPORT_SYMBOL_GPL(kvm_rdpmc);
777
778 /*
779  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
780  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
781  *
782  * This list is modified at module load time to reflect the
783  * capabilities of the host cpu. This capabilities test skips MSRs that are
784  * kvm-specific. Those are put in the beginning of the list.
785  */
786
787 #define KVM_SAVE_MSRS_BEGIN     9
788 static u32 msrs_to_save[] = {
789         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
790         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
791         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
792         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
793         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
794         MSR_STAR,
795 #ifdef CONFIG_X86_64
796         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
797 #endif
798         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
799 };
800
801 static unsigned num_msrs_to_save;
802
803 static u32 emulated_msrs[] = {
804         MSR_IA32_TSCDEADLINE,
805         MSR_IA32_MISC_ENABLE,
806         MSR_IA32_MCG_STATUS,
807         MSR_IA32_MCG_CTL,
808 };
809
810 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
811 {
812         u64 old_efer = vcpu->arch.efer;
813
814         if (efer & efer_reserved_bits)
815                 return 1;
816
817         if (is_paging(vcpu)
818             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
819                 return 1;
820
821         if (efer & EFER_FFXSR) {
822                 struct kvm_cpuid_entry2 *feat;
823
824                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
825                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
826                         return 1;
827         }
828
829         if (efer & EFER_SVME) {
830                 struct kvm_cpuid_entry2 *feat;
831
832                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
833                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
834                         return 1;
835         }
836
837         efer &= ~EFER_LMA;
838         efer |= vcpu->arch.efer & EFER_LMA;
839
840         kvm_x86_ops->set_efer(vcpu, efer);
841
842         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
843
844         /* Update reserved bits */
845         if ((efer ^ old_efer) & EFER_NX)
846                 kvm_mmu_reset_context(vcpu);
847
848         return 0;
849 }
850
851 void kvm_enable_efer_bits(u64 mask)
852 {
853        efer_reserved_bits &= ~mask;
854 }
855 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
856
857
858 /*
859  * Writes msr value into into the appropriate "register".
860  * Returns 0 on success, non-0 otherwise.
861  * Assumes vcpu_load() was already called.
862  */
863 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
864 {
865         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
866 }
867
868 /*
869  * Adapt set_msr() to msr_io()'s calling convention
870  */
871 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
872 {
873         return kvm_set_msr(vcpu, index, *data);
874 }
875
876 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
877 {
878         int version;
879         int r;
880         struct pvclock_wall_clock wc;
881         struct timespec boot;
882
883         if (!wall_clock)
884                 return;
885
886         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
887         if (r)
888                 return;
889
890         if (version & 1)
891                 ++version;  /* first time write, random junk */
892
893         ++version;
894
895         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
896
897         /*
898          * The guest calculates current wall clock time by adding
899          * system time (updated by kvm_guest_time_update below) to the
900          * wall clock specified here.  guest system time equals host
901          * system time for us, thus we must fill in host boot time here.
902          */
903         getboottime(&boot);
904
905         wc.sec = boot.tv_sec;
906         wc.nsec = boot.tv_nsec;
907         wc.version = version;
908
909         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
910
911         version++;
912         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
913 }
914
915 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
916 {
917         uint32_t quotient, remainder;
918
919         /* Don't try to replace with do_div(), this one calculates
920          * "(dividend << 32) / divisor" */
921         __asm__ ( "divl %4"
922                   : "=a" (quotient), "=d" (remainder)
923                   : "0" (0), "1" (dividend), "r" (divisor) );
924         return quotient;
925 }
926
927 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
928                                s8 *pshift, u32 *pmultiplier)
929 {
930         uint64_t scaled64;
931         int32_t  shift = 0;
932         uint64_t tps64;
933         uint32_t tps32;
934
935         tps64 = base_khz * 1000LL;
936         scaled64 = scaled_khz * 1000LL;
937         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
938                 tps64 >>= 1;
939                 shift--;
940         }
941
942         tps32 = (uint32_t)tps64;
943         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
944                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
945                         scaled64 >>= 1;
946                 else
947                         tps32 <<= 1;
948                 shift++;
949         }
950
951         *pshift = shift;
952         *pmultiplier = div_frac(scaled64, tps32);
953
954         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
955                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
956 }
957
958 static inline u64 get_kernel_ns(void)
959 {
960         struct timespec ts;
961
962         WARN_ON(preemptible());
963         ktime_get_ts(&ts);
964         monotonic_to_bootbased(&ts);
965         return timespec_to_ns(&ts);
966 }
967
968 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
969 unsigned long max_tsc_khz;
970
971 static inline int kvm_tsc_changes_freq(void)
972 {
973         int cpu = get_cpu();
974         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
975                   cpufreq_quick_get(cpu) != 0;
976         put_cpu();
977         return ret;
978 }
979
980 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
981 {
982         if (vcpu->arch.virtual_tsc_khz)
983                 return vcpu->arch.virtual_tsc_khz;
984         else
985                 return __this_cpu_read(cpu_tsc_khz);
986 }
987
988 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
989 {
990         u64 ret;
991
992         WARN_ON(preemptible());
993         if (kvm_tsc_changes_freq())
994                 printk_once(KERN_WARNING
995                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
996         ret = nsec * vcpu_tsc_khz(vcpu);
997         do_div(ret, USEC_PER_SEC);
998         return ret;
999 }
1000
1001 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1002 {
1003         /* Compute a scale to convert nanoseconds in TSC cycles */
1004         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1005                            &vcpu->arch.tsc_catchup_shift,
1006                            &vcpu->arch.tsc_catchup_mult);
1007 }
1008
1009 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1010 {
1011         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1012                                       vcpu->arch.tsc_catchup_mult,
1013                                       vcpu->arch.tsc_catchup_shift);
1014         tsc += vcpu->arch.last_tsc_write;
1015         return tsc;
1016 }
1017
1018 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1019 {
1020         struct kvm *kvm = vcpu->kvm;
1021         u64 offset, ns, elapsed;
1022         unsigned long flags;
1023         s64 sdiff;
1024
1025         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1026         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1027         ns = get_kernel_ns();
1028         elapsed = ns - kvm->arch.last_tsc_nsec;
1029         sdiff = data - kvm->arch.last_tsc_write;
1030         if (sdiff < 0)
1031                 sdiff = -sdiff;
1032
1033         /*
1034          * Special case: close write to TSC within 5 seconds of
1035          * another CPU is interpreted as an attempt to synchronize
1036          * The 5 seconds is to accommodate host load / swapping as
1037          * well as any reset of TSC during the boot process.
1038          *
1039          * In that case, for a reliable TSC, we can match TSC offsets,
1040          * or make a best guest using elapsed value.
1041          */
1042         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1043             elapsed < 5ULL * NSEC_PER_SEC) {
1044                 if (!check_tsc_unstable()) {
1045                         offset = kvm->arch.last_tsc_offset;
1046                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1047                 } else {
1048                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1049                         offset += delta;
1050                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1051                 }
1052                 ns = kvm->arch.last_tsc_nsec;
1053         }
1054         kvm->arch.last_tsc_nsec = ns;
1055         kvm->arch.last_tsc_write = data;
1056         kvm->arch.last_tsc_offset = offset;
1057         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1058         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1059
1060         /* Reset of TSC must disable overshoot protection below */
1061         vcpu->arch.hv_clock.tsc_timestamp = 0;
1062         vcpu->arch.last_tsc_write = data;
1063         vcpu->arch.last_tsc_nsec = ns;
1064 }
1065 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1066
1067 static int kvm_guest_time_update(struct kvm_vcpu *v)
1068 {
1069         unsigned long flags;
1070         struct kvm_vcpu_arch *vcpu = &v->arch;
1071         void *shared_kaddr;
1072         unsigned long this_tsc_khz;
1073         s64 kernel_ns, max_kernel_ns;
1074         u64 tsc_timestamp;
1075
1076         /* Keep irq disabled to prevent changes to the clock */
1077         local_irq_save(flags);
1078         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1079         kernel_ns = get_kernel_ns();
1080         this_tsc_khz = vcpu_tsc_khz(v);
1081         if (unlikely(this_tsc_khz == 0)) {
1082                 local_irq_restore(flags);
1083                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1084                 return 1;
1085         }
1086
1087         /*
1088          * We may have to catch up the TSC to match elapsed wall clock
1089          * time for two reasons, even if kvmclock is used.
1090          *   1) CPU could have been running below the maximum TSC rate
1091          *   2) Broken TSC compensation resets the base at each VCPU
1092          *      entry to avoid unknown leaps of TSC even when running
1093          *      again on the same CPU.  This may cause apparent elapsed
1094          *      time to disappear, and the guest to stand still or run
1095          *      very slowly.
1096          */
1097         if (vcpu->tsc_catchup) {
1098                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1099                 if (tsc > tsc_timestamp) {
1100                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1101                         tsc_timestamp = tsc;
1102                 }
1103         }
1104
1105         local_irq_restore(flags);
1106
1107         if (!vcpu->time_page)
1108                 return 0;
1109
1110         /*
1111          * Time as measured by the TSC may go backwards when resetting the base
1112          * tsc_timestamp.  The reason for this is that the TSC resolution is
1113          * higher than the resolution of the other clock scales.  Thus, many
1114          * possible measurments of the TSC correspond to one measurement of any
1115          * other clock, and so a spread of values is possible.  This is not a
1116          * problem for the computation of the nanosecond clock; with TSC rates
1117          * around 1GHZ, there can only be a few cycles which correspond to one
1118          * nanosecond value, and any path through this code will inevitably
1119          * take longer than that.  However, with the kernel_ns value itself,
1120          * the precision may be much lower, down to HZ granularity.  If the
1121          * first sampling of TSC against kernel_ns ends in the low part of the
1122          * range, and the second in the high end of the range, we can get:
1123          *
1124          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1125          *
1126          * As the sampling errors potentially range in the thousands of cycles,
1127          * it is possible such a time value has already been observed by the
1128          * guest.  To protect against this, we must compute the system time as
1129          * observed by the guest and ensure the new system time is greater.
1130          */
1131         max_kernel_ns = 0;
1132         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1133                 max_kernel_ns = vcpu->last_guest_tsc -
1134                                 vcpu->hv_clock.tsc_timestamp;
1135                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1136                                     vcpu->hv_clock.tsc_to_system_mul,
1137                                     vcpu->hv_clock.tsc_shift);
1138                 max_kernel_ns += vcpu->last_kernel_ns;
1139         }
1140
1141         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1142                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1143                                    &vcpu->hv_clock.tsc_shift,
1144                                    &vcpu->hv_clock.tsc_to_system_mul);
1145                 vcpu->hw_tsc_khz = this_tsc_khz;
1146         }
1147
1148         if (max_kernel_ns > kernel_ns)
1149                 kernel_ns = max_kernel_ns;
1150
1151         /* With all the info we got, fill in the values */
1152         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1153         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1154         vcpu->last_kernel_ns = kernel_ns;
1155         vcpu->last_guest_tsc = tsc_timestamp;
1156         vcpu->hv_clock.flags = 0;
1157
1158         /*
1159          * The interface expects us to write an even number signaling that the
1160          * update is finished. Since the guest won't see the intermediate
1161          * state, we just increase by 2 at the end.
1162          */
1163         vcpu->hv_clock.version += 2;
1164
1165         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1166
1167         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1168                sizeof(vcpu->hv_clock));
1169
1170         kunmap_atomic(shared_kaddr, KM_USER0);
1171
1172         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1173         return 0;
1174 }
1175
1176 static bool msr_mtrr_valid(unsigned msr)
1177 {
1178         switch (msr) {
1179         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1180         case MSR_MTRRfix64K_00000:
1181         case MSR_MTRRfix16K_80000:
1182         case MSR_MTRRfix16K_A0000:
1183         case MSR_MTRRfix4K_C0000:
1184         case MSR_MTRRfix4K_C8000:
1185         case MSR_MTRRfix4K_D0000:
1186         case MSR_MTRRfix4K_D8000:
1187         case MSR_MTRRfix4K_E0000:
1188         case MSR_MTRRfix4K_E8000:
1189         case MSR_MTRRfix4K_F0000:
1190         case MSR_MTRRfix4K_F8000:
1191         case MSR_MTRRdefType:
1192         case MSR_IA32_CR_PAT:
1193                 return true;
1194         case 0x2f8:
1195                 return true;
1196         }
1197         return false;
1198 }
1199
1200 static bool valid_pat_type(unsigned t)
1201 {
1202         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1203 }
1204
1205 static bool valid_mtrr_type(unsigned t)
1206 {
1207         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1208 }
1209
1210 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1211 {
1212         int i;
1213
1214         if (!msr_mtrr_valid(msr))
1215                 return false;
1216
1217         if (msr == MSR_IA32_CR_PAT) {
1218                 for (i = 0; i < 8; i++)
1219                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1220                                 return false;
1221                 return true;
1222         } else if (msr == MSR_MTRRdefType) {
1223                 if (data & ~0xcff)
1224                         return false;
1225                 return valid_mtrr_type(data & 0xff);
1226         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1227                 for (i = 0; i < 8 ; i++)
1228                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1229                                 return false;
1230                 return true;
1231         }
1232
1233         /* variable MTRRs */
1234         return valid_mtrr_type(data & 0xff);
1235 }
1236
1237 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1238 {
1239         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1240
1241         if (!mtrr_valid(vcpu, msr, data))
1242                 return 1;
1243
1244         if (msr == MSR_MTRRdefType) {
1245                 vcpu->arch.mtrr_state.def_type = data;
1246                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1247         } else if (msr == MSR_MTRRfix64K_00000)
1248                 p[0] = data;
1249         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1250                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1251         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1252                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1253         else if (msr == MSR_IA32_CR_PAT)
1254                 vcpu->arch.pat = data;
1255         else {  /* Variable MTRRs */
1256                 int idx, is_mtrr_mask;
1257                 u64 *pt;
1258
1259                 idx = (msr - 0x200) / 2;
1260                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1261                 if (!is_mtrr_mask)
1262                         pt =
1263                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1264                 else
1265                         pt =
1266                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1267                 *pt = data;
1268         }
1269
1270         kvm_mmu_reset_context(vcpu);
1271         return 0;
1272 }
1273
1274 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1275 {
1276         u64 mcg_cap = vcpu->arch.mcg_cap;
1277         unsigned bank_num = mcg_cap & 0xff;
1278
1279         switch (msr) {
1280         case MSR_IA32_MCG_STATUS:
1281                 vcpu->arch.mcg_status = data;
1282                 break;
1283         case MSR_IA32_MCG_CTL:
1284                 if (!(mcg_cap & MCG_CTL_P))
1285                         return 1;
1286                 if (data != 0 && data != ~(u64)0)
1287                         return -1;
1288                 vcpu->arch.mcg_ctl = data;
1289                 break;
1290         default:
1291                 if (msr >= MSR_IA32_MC0_CTL &&
1292                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1293                         u32 offset = msr - MSR_IA32_MC0_CTL;
1294                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1295                          * some Linux kernels though clear bit 10 in bank 4 to
1296                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1297                          * this to avoid an uncatched #GP in the guest
1298                          */
1299                         if ((offset & 0x3) == 0 &&
1300                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1301                                 return -1;
1302                         vcpu->arch.mce_banks[offset] = data;
1303                         break;
1304                 }
1305                 return 1;
1306         }
1307         return 0;
1308 }
1309
1310 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1311 {
1312         struct kvm *kvm = vcpu->kvm;
1313         int lm = is_long_mode(vcpu);
1314         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1315                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1316         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1317                 : kvm->arch.xen_hvm_config.blob_size_32;
1318         u32 page_num = data & ~PAGE_MASK;
1319         u64 page_addr = data & PAGE_MASK;
1320         u8 *page;
1321         int r;
1322
1323         r = -E2BIG;
1324         if (page_num >= blob_size)
1325                 goto out;
1326         r = -ENOMEM;
1327         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1328         if (IS_ERR(page)) {
1329                 r = PTR_ERR(page);
1330                 goto out;
1331         }
1332         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1333                 goto out_free;
1334         r = 0;
1335 out_free:
1336         kfree(page);
1337 out:
1338         return r;
1339 }
1340
1341 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1342 {
1343         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1344 }
1345
1346 static bool kvm_hv_msr_partition_wide(u32 msr)
1347 {
1348         bool r = false;
1349         switch (msr) {
1350         case HV_X64_MSR_GUEST_OS_ID:
1351         case HV_X64_MSR_HYPERCALL:
1352                 r = true;
1353                 break;
1354         }
1355
1356         return r;
1357 }
1358
1359 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1360 {
1361         struct kvm *kvm = vcpu->kvm;
1362
1363         switch (msr) {
1364         case HV_X64_MSR_GUEST_OS_ID:
1365                 kvm->arch.hv_guest_os_id = data;
1366                 /* setting guest os id to zero disables hypercall page */
1367                 if (!kvm->arch.hv_guest_os_id)
1368                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1369                 break;
1370         case HV_X64_MSR_HYPERCALL: {
1371                 u64 gfn;
1372                 unsigned long addr;
1373                 u8 instructions[4];
1374
1375                 /* if guest os id is not set hypercall should remain disabled */
1376                 if (!kvm->arch.hv_guest_os_id)
1377                         break;
1378                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1379                         kvm->arch.hv_hypercall = data;
1380                         break;
1381                 }
1382                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1383                 addr = gfn_to_hva(kvm, gfn);
1384                 if (kvm_is_error_hva(addr))
1385                         return 1;
1386                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1387                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1388                 if (__copy_to_user((void __user *)addr, instructions, 4))
1389                         return 1;
1390                 kvm->arch.hv_hypercall = data;
1391                 break;
1392         }
1393         default:
1394                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1395                           "data 0x%llx\n", msr, data);
1396                 return 1;
1397         }
1398         return 0;
1399 }
1400
1401 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1402 {
1403         switch (msr) {
1404         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1405                 unsigned long addr;
1406
1407                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1408                         vcpu->arch.hv_vapic = data;
1409                         break;
1410                 }
1411                 addr = gfn_to_hva(vcpu->kvm, data >>
1412                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1413                 if (kvm_is_error_hva(addr))
1414                         return 1;
1415                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1416                         return 1;
1417                 vcpu->arch.hv_vapic = data;
1418                 break;
1419         }
1420         case HV_X64_MSR_EOI:
1421                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1422         case HV_X64_MSR_ICR:
1423                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1424         case HV_X64_MSR_TPR:
1425                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1426         default:
1427                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1428                           "data 0x%llx\n", msr, data);
1429                 return 1;
1430         }
1431
1432         return 0;
1433 }
1434
1435 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1436 {
1437         gpa_t gpa = data & ~0x3f;
1438
1439         /* Bits 2:5 are resrved, Should be zero */
1440         if (data & 0x3c)
1441                 return 1;
1442
1443         vcpu->arch.apf.msr_val = data;
1444
1445         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1446                 kvm_clear_async_pf_completion_queue(vcpu);
1447                 kvm_async_pf_hash_reset(vcpu);
1448                 return 0;
1449         }
1450
1451         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1452                 return 1;
1453
1454         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1455         kvm_async_pf_wakeup_all(vcpu);
1456         return 0;
1457 }
1458
1459 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1460 {
1461         if (vcpu->arch.time_page) {
1462                 kvm_release_page_dirty(vcpu->arch.time_page);
1463                 vcpu->arch.time_page = NULL;
1464         }
1465 }
1466
1467 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1468 {
1469         u64 delta;
1470
1471         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1472                 return;
1473
1474         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1475         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1476         vcpu->arch.st.accum_steal = delta;
1477 }
1478
1479 static void record_steal_time(struct kvm_vcpu *vcpu)
1480 {
1481         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1482                 return;
1483
1484         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1485                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1486                 return;
1487
1488         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1489         vcpu->arch.st.steal.version += 2;
1490         vcpu->arch.st.accum_steal = 0;
1491
1492         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1493                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1494 }
1495
1496 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1497 {
1498         switch (msr) {
1499         case MSR_EFER:
1500                 return set_efer(vcpu, data);
1501         case MSR_K7_HWCR:
1502                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1503                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1504                 if (data != 0) {
1505                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1506                                 data);
1507                         return 1;
1508                 }
1509                 break;
1510         case MSR_FAM10H_MMIO_CONF_BASE:
1511                 if (data != 0) {
1512                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1513                                 "0x%llx\n", data);
1514                         return 1;
1515                 }
1516                 break;
1517         case MSR_AMD64_NB_CFG:
1518                 break;
1519         case MSR_IA32_DEBUGCTLMSR:
1520                 if (!data) {
1521                         /* We support the non-activated case already */
1522                         break;
1523                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1524                         /* Values other than LBR and BTF are vendor-specific,
1525                            thus reserved and should throw a #GP */
1526                         return 1;
1527                 }
1528                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1529                         __func__, data);
1530                 break;
1531         case MSR_IA32_UCODE_REV:
1532         case MSR_IA32_UCODE_WRITE:
1533         case MSR_VM_HSAVE_PA:
1534         case MSR_AMD64_PATCH_LOADER:
1535                 break;
1536         case 0x200 ... 0x2ff:
1537                 return set_msr_mtrr(vcpu, msr, data);
1538         case MSR_IA32_APICBASE:
1539                 kvm_set_apic_base(vcpu, data);
1540                 break;
1541         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1542                 return kvm_x2apic_msr_write(vcpu, msr, data);
1543         case MSR_IA32_TSCDEADLINE:
1544                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1545                 break;
1546         case MSR_IA32_MISC_ENABLE:
1547                 vcpu->arch.ia32_misc_enable_msr = data;
1548                 break;
1549         case MSR_KVM_WALL_CLOCK_NEW:
1550         case MSR_KVM_WALL_CLOCK:
1551                 vcpu->kvm->arch.wall_clock = data;
1552                 kvm_write_wall_clock(vcpu->kvm, data);
1553                 break;
1554         case MSR_KVM_SYSTEM_TIME_NEW:
1555         case MSR_KVM_SYSTEM_TIME: {
1556                 kvmclock_reset(vcpu);
1557
1558                 vcpu->arch.time = data;
1559                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1560
1561                 /* we verify if the enable bit is set... */
1562                 if (!(data & 1))
1563                         break;
1564
1565                 /* ...but clean it before doing the actual write */
1566                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1567
1568                 vcpu->arch.time_page =
1569                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1570
1571                 if (is_error_page(vcpu->arch.time_page)) {
1572                         kvm_release_page_clean(vcpu->arch.time_page);
1573                         vcpu->arch.time_page = NULL;
1574                 }
1575                 break;
1576         }
1577         case MSR_KVM_ASYNC_PF_EN:
1578                 if (kvm_pv_enable_async_pf(vcpu, data))
1579                         return 1;
1580                 break;
1581         case MSR_KVM_STEAL_TIME:
1582
1583                 if (unlikely(!sched_info_on()))
1584                         return 1;
1585
1586                 if (data & KVM_STEAL_RESERVED_MASK)
1587                         return 1;
1588
1589                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1590                                                         data & KVM_STEAL_VALID_BITS))
1591                         return 1;
1592
1593                 vcpu->arch.st.msr_val = data;
1594
1595                 if (!(data & KVM_MSR_ENABLED))
1596                         break;
1597
1598                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1599
1600                 preempt_disable();
1601                 accumulate_steal_time(vcpu);
1602                 preempt_enable();
1603
1604                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1605
1606                 break;
1607
1608         case MSR_IA32_MCG_CTL:
1609         case MSR_IA32_MCG_STATUS:
1610         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1611                 return set_msr_mce(vcpu, msr, data);
1612
1613         /* Performance counters are not protected by a CPUID bit,
1614          * so we should check all of them in the generic path for the sake of
1615          * cross vendor migration.
1616          * Writing a zero into the event select MSRs disables them,
1617          * which we perfectly emulate ;-). Any other value should be at least
1618          * reported, some guests depend on them.
1619          */
1620         case MSR_K7_EVNTSEL0:
1621         case MSR_K7_EVNTSEL1:
1622         case MSR_K7_EVNTSEL2:
1623         case MSR_K7_EVNTSEL3:
1624                 if (data != 0)
1625                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1626                                 "0x%x data 0x%llx\n", msr, data);
1627                 break;
1628         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1629          * so we ignore writes to make it happy.
1630          */
1631         case MSR_K7_PERFCTR0:
1632         case MSR_K7_PERFCTR1:
1633         case MSR_K7_PERFCTR2:
1634         case MSR_K7_PERFCTR3:
1635                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1636                         "0x%x data 0x%llx\n", msr, data);
1637                 break;
1638         case MSR_K7_CLK_CTL:
1639                 /*
1640                  * Ignore all writes to this no longer documented MSR.
1641                  * Writes are only relevant for old K7 processors,
1642                  * all pre-dating SVM, but a recommended workaround from
1643                  * AMD for these chips. It is possible to speicify the
1644                  * affected processor models on the command line, hence
1645                  * the need to ignore the workaround.
1646                  */
1647                 break;
1648         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1649                 if (kvm_hv_msr_partition_wide(msr)) {
1650                         int r;
1651                         mutex_lock(&vcpu->kvm->lock);
1652                         r = set_msr_hyperv_pw(vcpu, msr, data);
1653                         mutex_unlock(&vcpu->kvm->lock);
1654                         return r;
1655                 } else
1656                         return set_msr_hyperv(vcpu, msr, data);
1657                 break;
1658         case MSR_IA32_BBL_CR_CTL3:
1659                 /* Drop writes to this legacy MSR -- see rdmsr
1660                  * counterpart for further detail.
1661                  */
1662                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1663                 break;
1664         default:
1665                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1666                         return xen_hvm_config(vcpu, data);
1667                 if (kvm_pmu_msr(vcpu, msr))
1668                         return kvm_pmu_set_msr(vcpu, msr, data);
1669                 if (!ignore_msrs) {
1670                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1671                                 msr, data);
1672                         return 1;
1673                 } else {
1674                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1675                                 msr, data);
1676                         break;
1677                 }
1678         }
1679         return 0;
1680 }
1681 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1682
1683
1684 /*
1685  * Reads an msr value (of 'msr_index') into 'pdata'.
1686  * Returns 0 on success, non-0 otherwise.
1687  * Assumes vcpu_load() was already called.
1688  */
1689 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1690 {
1691         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1692 }
1693
1694 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1695 {
1696         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1697
1698         if (!msr_mtrr_valid(msr))
1699                 return 1;
1700
1701         if (msr == MSR_MTRRdefType)
1702                 *pdata = vcpu->arch.mtrr_state.def_type +
1703                          (vcpu->arch.mtrr_state.enabled << 10);
1704         else if (msr == MSR_MTRRfix64K_00000)
1705                 *pdata = p[0];
1706         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1707                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1708         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1709                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1710         else if (msr == MSR_IA32_CR_PAT)
1711                 *pdata = vcpu->arch.pat;
1712         else {  /* Variable MTRRs */
1713                 int idx, is_mtrr_mask;
1714                 u64 *pt;
1715
1716                 idx = (msr - 0x200) / 2;
1717                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1718                 if (!is_mtrr_mask)
1719                         pt =
1720                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1721                 else
1722                         pt =
1723                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1724                 *pdata = *pt;
1725         }
1726
1727         return 0;
1728 }
1729
1730 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1731 {
1732         u64 data;
1733         u64 mcg_cap = vcpu->arch.mcg_cap;
1734         unsigned bank_num = mcg_cap & 0xff;
1735
1736         switch (msr) {
1737         case MSR_IA32_P5_MC_ADDR:
1738         case MSR_IA32_P5_MC_TYPE:
1739                 data = 0;
1740                 break;
1741         case MSR_IA32_MCG_CAP:
1742                 data = vcpu->arch.mcg_cap;
1743                 break;
1744         case MSR_IA32_MCG_CTL:
1745                 if (!(mcg_cap & MCG_CTL_P))
1746                         return 1;
1747                 data = vcpu->arch.mcg_ctl;
1748                 break;
1749         case MSR_IA32_MCG_STATUS:
1750                 data = vcpu->arch.mcg_status;
1751                 break;
1752         default:
1753                 if (msr >= MSR_IA32_MC0_CTL &&
1754                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1755                         u32 offset = msr - MSR_IA32_MC0_CTL;
1756                         data = vcpu->arch.mce_banks[offset];
1757                         break;
1758                 }
1759                 return 1;
1760         }
1761         *pdata = data;
1762         return 0;
1763 }
1764
1765 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1766 {
1767         u64 data = 0;
1768         struct kvm *kvm = vcpu->kvm;
1769
1770         switch (msr) {
1771         case HV_X64_MSR_GUEST_OS_ID:
1772                 data = kvm->arch.hv_guest_os_id;
1773                 break;
1774         case HV_X64_MSR_HYPERCALL:
1775                 data = kvm->arch.hv_hypercall;
1776                 break;
1777         default:
1778                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1779                 return 1;
1780         }
1781
1782         *pdata = data;
1783         return 0;
1784 }
1785
1786 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1787 {
1788         u64 data = 0;
1789
1790         switch (msr) {
1791         case HV_X64_MSR_VP_INDEX: {
1792                 int r;
1793                 struct kvm_vcpu *v;
1794                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1795                         if (v == vcpu)
1796                                 data = r;
1797                 break;
1798         }
1799         case HV_X64_MSR_EOI:
1800                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1801         case HV_X64_MSR_ICR:
1802                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1803         case HV_X64_MSR_TPR:
1804                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1805         case HV_X64_MSR_APIC_ASSIST_PAGE:
1806                 data = vcpu->arch.hv_vapic;
1807                 break;
1808         default:
1809                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1810                 return 1;
1811         }
1812         *pdata = data;
1813         return 0;
1814 }
1815
1816 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1817 {
1818         u64 data;
1819
1820         switch (msr) {
1821         case MSR_IA32_PLATFORM_ID:
1822         case MSR_IA32_EBL_CR_POWERON:
1823         case MSR_IA32_DEBUGCTLMSR:
1824         case MSR_IA32_LASTBRANCHFROMIP:
1825         case MSR_IA32_LASTBRANCHTOIP:
1826         case MSR_IA32_LASTINTFROMIP:
1827         case MSR_IA32_LASTINTTOIP:
1828         case MSR_K8_SYSCFG:
1829         case MSR_K7_HWCR:
1830         case MSR_VM_HSAVE_PA:
1831         case MSR_K7_EVNTSEL0:
1832         case MSR_K7_PERFCTR0:
1833         case MSR_K8_INT_PENDING_MSG:
1834         case MSR_AMD64_NB_CFG:
1835         case MSR_FAM10H_MMIO_CONF_BASE:
1836                 data = 0;
1837                 break;
1838         case MSR_IA32_UCODE_REV:
1839                 data = 0x100000000ULL;
1840                 break;
1841         case MSR_MTRRcap:
1842                 data = 0x500 | KVM_NR_VAR_MTRR;
1843                 break;
1844         case 0x200 ... 0x2ff:
1845                 return get_msr_mtrr(vcpu, msr, pdata);
1846         case 0xcd: /* fsb frequency */
1847                 data = 3;
1848                 break;
1849                 /*
1850                  * MSR_EBC_FREQUENCY_ID
1851                  * Conservative value valid for even the basic CPU models.
1852                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1853                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1854                  * and 266MHz for model 3, or 4. Set Core Clock
1855                  * Frequency to System Bus Frequency Ratio to 1 (bits
1856                  * 31:24) even though these are only valid for CPU
1857                  * models > 2, however guests may end up dividing or
1858                  * multiplying by zero otherwise.
1859                  */
1860         case MSR_EBC_FREQUENCY_ID:
1861                 data = 1 << 24;
1862                 break;
1863         case MSR_IA32_APICBASE:
1864                 data = kvm_get_apic_base(vcpu);
1865                 break;
1866         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1867                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1868                 break;
1869         case MSR_IA32_TSCDEADLINE:
1870                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1871                 break;
1872         case MSR_IA32_MISC_ENABLE:
1873                 data = vcpu->arch.ia32_misc_enable_msr;
1874                 break;
1875         case MSR_IA32_PERF_STATUS:
1876                 /* TSC increment by tick */
1877                 data = 1000ULL;
1878                 /* CPU multiplier */
1879                 data |= (((uint64_t)4ULL) << 40);
1880                 break;
1881         case MSR_EFER:
1882                 data = vcpu->arch.efer;
1883                 break;
1884         case MSR_KVM_WALL_CLOCK:
1885         case MSR_KVM_WALL_CLOCK_NEW:
1886                 data = vcpu->kvm->arch.wall_clock;
1887                 break;
1888         case MSR_KVM_SYSTEM_TIME:
1889         case MSR_KVM_SYSTEM_TIME_NEW:
1890                 data = vcpu->arch.time;
1891                 break;
1892         case MSR_KVM_ASYNC_PF_EN:
1893                 data = vcpu->arch.apf.msr_val;
1894                 break;
1895         case MSR_KVM_STEAL_TIME:
1896                 data = vcpu->arch.st.msr_val;
1897                 break;
1898         case MSR_IA32_P5_MC_ADDR:
1899         case MSR_IA32_P5_MC_TYPE:
1900         case MSR_IA32_MCG_CAP:
1901         case MSR_IA32_MCG_CTL:
1902         case MSR_IA32_MCG_STATUS:
1903         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1904                 return get_msr_mce(vcpu, msr, pdata);
1905         case MSR_K7_CLK_CTL:
1906                 /*
1907                  * Provide expected ramp-up count for K7. All other
1908                  * are set to zero, indicating minimum divisors for
1909                  * every field.
1910                  *
1911                  * This prevents guest kernels on AMD host with CPU
1912                  * type 6, model 8 and higher from exploding due to
1913                  * the rdmsr failing.
1914                  */
1915                 data = 0x20000000;
1916                 break;
1917         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1918                 if (kvm_hv_msr_partition_wide(msr)) {
1919                         int r;
1920                         mutex_lock(&vcpu->kvm->lock);
1921                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1922                         mutex_unlock(&vcpu->kvm->lock);
1923                         return r;
1924                 } else
1925                         return get_msr_hyperv(vcpu, msr, pdata);
1926                 break;
1927         case MSR_IA32_BBL_CR_CTL3:
1928                 /* This legacy MSR exists but isn't fully documented in current
1929                  * silicon.  It is however accessed by winxp in very narrow
1930                  * scenarios where it sets bit #19, itself documented as
1931                  * a "reserved" bit.  Best effort attempt to source coherent
1932                  * read data here should the balance of the register be
1933                  * interpreted by the guest:
1934                  *
1935                  * L2 cache control register 3: 64GB range, 256KB size,
1936                  * enabled, latency 0x1, configured
1937                  */
1938                 data = 0xbe702111;
1939                 break;
1940         default:
1941                 if (kvm_pmu_msr(vcpu, msr))
1942                         return kvm_pmu_get_msr(vcpu, msr, pdata);
1943                 if (!ignore_msrs) {
1944                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1945                         return 1;
1946                 } else {
1947                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1948                         data = 0;
1949                 }
1950                 break;
1951         }
1952         *pdata = data;
1953         return 0;
1954 }
1955 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1956
1957 /*
1958  * Read or write a bunch of msrs. All parameters are kernel addresses.
1959  *
1960  * @return number of msrs set successfully.
1961  */
1962 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1963                     struct kvm_msr_entry *entries,
1964                     int (*do_msr)(struct kvm_vcpu *vcpu,
1965                                   unsigned index, u64 *data))
1966 {
1967         int i, idx;
1968
1969         idx = srcu_read_lock(&vcpu->kvm->srcu);
1970         for (i = 0; i < msrs->nmsrs; ++i)
1971                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1972                         break;
1973         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1974
1975         return i;
1976 }
1977
1978 /*
1979  * Read or write a bunch of msrs. Parameters are user addresses.
1980  *
1981  * @return number of msrs set successfully.
1982  */
1983 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1984                   int (*do_msr)(struct kvm_vcpu *vcpu,
1985                                 unsigned index, u64 *data),
1986                   int writeback)
1987 {
1988         struct kvm_msrs msrs;
1989         struct kvm_msr_entry *entries;
1990         int r, n;
1991         unsigned size;
1992
1993         r = -EFAULT;
1994         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1995                 goto out;
1996
1997         r = -E2BIG;
1998         if (msrs.nmsrs >= MAX_IO_MSRS)
1999                 goto out;
2000
2001         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2002         entries = memdup_user(user_msrs->entries, size);
2003         if (IS_ERR(entries)) {
2004                 r = PTR_ERR(entries);
2005                 goto out;
2006         }
2007
2008         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2009         if (r < 0)
2010                 goto out_free;
2011
2012         r = -EFAULT;
2013         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2014                 goto out_free;
2015
2016         r = n;
2017
2018 out_free:
2019         kfree(entries);
2020 out:
2021         return r;
2022 }
2023
2024 int kvm_dev_ioctl_check_extension(long ext)
2025 {
2026         int r;
2027
2028         switch (ext) {
2029         case KVM_CAP_IRQCHIP:
2030         case KVM_CAP_HLT:
2031         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2032         case KVM_CAP_SET_TSS_ADDR:
2033         case KVM_CAP_EXT_CPUID:
2034         case KVM_CAP_CLOCKSOURCE:
2035         case KVM_CAP_PIT:
2036         case KVM_CAP_NOP_IO_DELAY:
2037         case KVM_CAP_MP_STATE:
2038         case KVM_CAP_SYNC_MMU:
2039         case KVM_CAP_USER_NMI:
2040         case KVM_CAP_REINJECT_CONTROL:
2041         case KVM_CAP_IRQ_INJECT_STATUS:
2042         case KVM_CAP_ASSIGN_DEV_IRQ:
2043         case KVM_CAP_IRQFD:
2044         case KVM_CAP_IOEVENTFD:
2045         case KVM_CAP_PIT2:
2046         case KVM_CAP_PIT_STATE2:
2047         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2048         case KVM_CAP_XEN_HVM:
2049         case KVM_CAP_ADJUST_CLOCK:
2050         case KVM_CAP_VCPU_EVENTS:
2051         case KVM_CAP_HYPERV:
2052         case KVM_CAP_HYPERV_VAPIC:
2053         case KVM_CAP_HYPERV_SPIN:
2054         case KVM_CAP_PCI_SEGMENT:
2055         case KVM_CAP_DEBUGREGS:
2056         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2057         case KVM_CAP_XSAVE:
2058         case KVM_CAP_ASYNC_PF:
2059         case KVM_CAP_GET_TSC_KHZ:
2060                 r = 1;
2061                 break;
2062         case KVM_CAP_COALESCED_MMIO:
2063                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2064                 break;
2065         case KVM_CAP_VAPIC:
2066                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2067                 break;
2068         case KVM_CAP_NR_VCPUS:
2069                 r = KVM_SOFT_MAX_VCPUS;
2070                 break;
2071         case KVM_CAP_MAX_VCPUS:
2072                 r = KVM_MAX_VCPUS;
2073                 break;
2074         case KVM_CAP_NR_MEMSLOTS:
2075                 r = KVM_MEMORY_SLOTS;
2076                 break;
2077         case KVM_CAP_PV_MMU:    /* obsolete */
2078                 r = 0;
2079                 break;
2080         case KVM_CAP_IOMMU:
2081                 r = iommu_present(&pci_bus_type);
2082                 break;
2083         case KVM_CAP_MCE:
2084                 r = KVM_MAX_MCE_BANKS;
2085                 break;
2086         case KVM_CAP_XCRS:
2087                 r = cpu_has_xsave;
2088                 break;
2089         case KVM_CAP_TSC_CONTROL:
2090                 r = kvm_has_tsc_control;
2091                 break;
2092         case KVM_CAP_TSC_DEADLINE_TIMER:
2093                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2094                 break;
2095         default:
2096                 r = 0;
2097                 break;
2098         }
2099         return r;
2100
2101 }
2102
2103 long kvm_arch_dev_ioctl(struct file *filp,
2104                         unsigned int ioctl, unsigned long arg)
2105 {
2106         void __user *argp = (void __user *)arg;
2107         long r;
2108
2109         switch (ioctl) {
2110         case KVM_GET_MSR_INDEX_LIST: {
2111                 struct kvm_msr_list __user *user_msr_list = argp;
2112                 struct kvm_msr_list msr_list;
2113                 unsigned n;
2114
2115                 r = -EFAULT;
2116                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2117                         goto out;
2118                 n = msr_list.nmsrs;
2119                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2120                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2121                         goto out;
2122                 r = -E2BIG;
2123                 if (n < msr_list.nmsrs)
2124                         goto out;
2125                 r = -EFAULT;
2126                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2127                                  num_msrs_to_save * sizeof(u32)))
2128                         goto out;
2129                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2130                                  &emulated_msrs,
2131                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2132                         goto out;
2133                 r = 0;
2134                 break;
2135         }
2136         case KVM_GET_SUPPORTED_CPUID: {
2137                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2138                 struct kvm_cpuid2 cpuid;
2139
2140                 r = -EFAULT;
2141                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2142                         goto out;
2143                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2144                                                       cpuid_arg->entries);
2145                 if (r)
2146                         goto out;
2147
2148                 r = -EFAULT;
2149                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2150                         goto out;
2151                 r = 0;
2152                 break;
2153         }
2154         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2155                 u64 mce_cap;
2156
2157                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2158                 r = -EFAULT;
2159                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2160                         goto out;
2161                 r = 0;
2162                 break;
2163         }
2164         default:
2165                 r = -EINVAL;
2166         }
2167 out:
2168         return r;
2169 }
2170
2171 static void wbinvd_ipi(void *garbage)
2172 {
2173         wbinvd();
2174 }
2175
2176 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2177 {
2178         return vcpu->kvm->arch.iommu_domain &&
2179                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2180 }
2181
2182 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2183 {
2184         /* Address WBINVD may be executed by guest */
2185         if (need_emulate_wbinvd(vcpu)) {
2186                 if (kvm_x86_ops->has_wbinvd_exit())
2187                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2188                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2189                         smp_call_function_single(vcpu->cpu,
2190                                         wbinvd_ipi, NULL, 1);
2191         }
2192
2193         kvm_x86_ops->vcpu_load(vcpu, cpu);
2194         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2195                 /* Make sure TSC doesn't go backwards */
2196                 s64 tsc_delta;
2197                 u64 tsc;
2198
2199                 tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2200                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2201                              tsc - vcpu->arch.last_guest_tsc;
2202
2203                 if (tsc_delta < 0)
2204                         mark_tsc_unstable("KVM discovered backwards TSC");
2205                 if (check_tsc_unstable()) {
2206                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2207                         vcpu->arch.tsc_catchup = 1;
2208                 }
2209                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2210                 if (vcpu->cpu != cpu)
2211                         kvm_migrate_timers(vcpu);
2212                 vcpu->cpu = cpu;
2213         }
2214
2215         accumulate_steal_time(vcpu);
2216         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2217 }
2218
2219 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2220 {
2221         kvm_x86_ops->vcpu_put(vcpu);
2222         kvm_put_guest_fpu(vcpu);
2223         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2224 }
2225
2226 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2227                                     struct kvm_lapic_state *s)
2228 {
2229         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2230
2231         return 0;
2232 }
2233
2234 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2235                                     struct kvm_lapic_state *s)
2236 {
2237         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2238         kvm_apic_post_state_restore(vcpu);
2239         update_cr8_intercept(vcpu);
2240
2241         return 0;
2242 }
2243
2244 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2245                                     struct kvm_interrupt *irq)
2246 {
2247         if (irq->irq < 0 || irq->irq >= 256)
2248                 return -EINVAL;
2249         if (irqchip_in_kernel(vcpu->kvm))
2250                 return -ENXIO;
2251
2252         kvm_queue_interrupt(vcpu, irq->irq, false);
2253         kvm_make_request(KVM_REQ_EVENT, vcpu);
2254
2255         return 0;
2256 }
2257
2258 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2259 {
2260         kvm_inject_nmi(vcpu);
2261
2262         return 0;
2263 }
2264
2265 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2266                                            struct kvm_tpr_access_ctl *tac)
2267 {
2268         if (tac->flags)
2269                 return -EINVAL;
2270         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2271         return 0;
2272 }
2273
2274 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2275                                         u64 mcg_cap)
2276 {
2277         int r;
2278         unsigned bank_num = mcg_cap & 0xff, bank;
2279
2280         r = -EINVAL;
2281         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2282                 goto out;
2283         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2284                 goto out;
2285         r = 0;
2286         vcpu->arch.mcg_cap = mcg_cap;
2287         /* Init IA32_MCG_CTL to all 1s */
2288         if (mcg_cap & MCG_CTL_P)
2289                 vcpu->arch.mcg_ctl = ~(u64)0;
2290         /* Init IA32_MCi_CTL to all 1s */
2291         for (bank = 0; bank < bank_num; bank++)
2292                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2293 out:
2294         return r;
2295 }
2296
2297 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2298                                       struct kvm_x86_mce *mce)
2299 {
2300         u64 mcg_cap = vcpu->arch.mcg_cap;
2301         unsigned bank_num = mcg_cap & 0xff;
2302         u64 *banks = vcpu->arch.mce_banks;
2303
2304         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2305                 return -EINVAL;
2306         /*
2307          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2308          * reporting is disabled
2309          */
2310         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2311             vcpu->arch.mcg_ctl != ~(u64)0)
2312                 return 0;
2313         banks += 4 * mce->bank;
2314         /*
2315          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2316          * reporting is disabled for the bank
2317          */
2318         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2319                 return 0;
2320         if (mce->status & MCI_STATUS_UC) {
2321                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2322                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2323                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2324                         return 0;
2325                 }
2326                 if (banks[1] & MCI_STATUS_VAL)
2327                         mce->status |= MCI_STATUS_OVER;
2328                 banks[2] = mce->addr;
2329                 banks[3] = mce->misc;
2330                 vcpu->arch.mcg_status = mce->mcg_status;
2331                 banks[1] = mce->status;
2332                 kvm_queue_exception(vcpu, MC_VECTOR);
2333         } else if (!(banks[1] & MCI_STATUS_VAL)
2334                    || !(banks[1] & MCI_STATUS_UC)) {
2335                 if (banks[1] & MCI_STATUS_VAL)
2336                         mce->status |= MCI_STATUS_OVER;
2337                 banks[2] = mce->addr;
2338                 banks[3] = mce->misc;
2339                 banks[1] = mce->status;
2340         } else
2341                 banks[1] |= MCI_STATUS_OVER;
2342         return 0;
2343 }
2344
2345 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2346                                                struct kvm_vcpu_events *events)
2347 {
2348         process_nmi(vcpu);
2349         events->exception.injected =
2350                 vcpu->arch.exception.pending &&
2351                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2352         events->exception.nr = vcpu->arch.exception.nr;
2353         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2354         events->exception.pad = 0;
2355         events->exception.error_code = vcpu->arch.exception.error_code;
2356
2357         events->interrupt.injected =
2358                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2359         events->interrupt.nr = vcpu->arch.interrupt.nr;
2360         events->interrupt.soft = 0;
2361         events->interrupt.shadow =
2362                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2363                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2364
2365         events->nmi.injected = vcpu->arch.nmi_injected;
2366         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2367         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2368         events->nmi.pad = 0;
2369
2370         events->sipi_vector = vcpu->arch.sipi_vector;
2371
2372         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2373                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2374                          | KVM_VCPUEVENT_VALID_SHADOW);
2375         memset(&events->reserved, 0, sizeof(events->reserved));
2376 }
2377
2378 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2379                                               struct kvm_vcpu_events *events)
2380 {
2381         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2382                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2383                               | KVM_VCPUEVENT_VALID_SHADOW))
2384                 return -EINVAL;
2385
2386         process_nmi(vcpu);
2387         vcpu->arch.exception.pending = events->exception.injected;
2388         vcpu->arch.exception.nr = events->exception.nr;
2389         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2390         vcpu->arch.exception.error_code = events->exception.error_code;
2391
2392         vcpu->arch.interrupt.pending = events->interrupt.injected;
2393         vcpu->arch.interrupt.nr = events->interrupt.nr;
2394         vcpu->arch.interrupt.soft = events->interrupt.soft;
2395         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2396                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2397                                                   events->interrupt.shadow);
2398
2399         vcpu->arch.nmi_injected = events->nmi.injected;
2400         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2401                 vcpu->arch.nmi_pending = events->nmi.pending;
2402         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2403
2404         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2405                 vcpu->arch.sipi_vector = events->sipi_vector;
2406
2407         kvm_make_request(KVM_REQ_EVENT, vcpu);
2408
2409         return 0;
2410 }
2411
2412 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2413                                              struct kvm_debugregs *dbgregs)
2414 {
2415         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2416         dbgregs->dr6 = vcpu->arch.dr6;
2417         dbgregs->dr7 = vcpu->arch.dr7;
2418         dbgregs->flags = 0;
2419         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2420 }
2421
2422 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2423                                             struct kvm_debugregs *dbgregs)
2424 {
2425         if (dbgregs->flags)
2426                 return -EINVAL;
2427
2428         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2429         vcpu->arch.dr6 = dbgregs->dr6;
2430         vcpu->arch.dr7 = dbgregs->dr7;
2431
2432         return 0;
2433 }
2434
2435 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2436                                          struct kvm_xsave *guest_xsave)
2437 {
2438         if (cpu_has_xsave)
2439                 memcpy(guest_xsave->region,
2440                         &vcpu->arch.guest_fpu.state->xsave,
2441                         xstate_size);
2442         else {
2443                 memcpy(guest_xsave->region,
2444                         &vcpu->arch.guest_fpu.state->fxsave,
2445                         sizeof(struct i387_fxsave_struct));
2446                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2447                         XSTATE_FPSSE;
2448         }
2449 }
2450
2451 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2452                                         struct kvm_xsave *guest_xsave)
2453 {
2454         u64 xstate_bv =
2455                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2456
2457         if (cpu_has_xsave)
2458                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2459                         guest_xsave->region, xstate_size);
2460         else {
2461                 if (xstate_bv & ~XSTATE_FPSSE)
2462                         return -EINVAL;
2463                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2464                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2465         }
2466         return 0;
2467 }
2468
2469 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2470                                         struct kvm_xcrs *guest_xcrs)
2471 {
2472         if (!cpu_has_xsave) {
2473                 guest_xcrs->nr_xcrs = 0;
2474                 return;
2475         }
2476
2477         guest_xcrs->nr_xcrs = 1;
2478         guest_xcrs->flags = 0;
2479         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2480         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2481 }
2482
2483 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2484                                        struct kvm_xcrs *guest_xcrs)
2485 {
2486         int i, r = 0;
2487
2488         if (!cpu_has_xsave)
2489                 return -EINVAL;
2490
2491         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2492                 return -EINVAL;
2493
2494         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2495                 /* Only support XCR0 currently */
2496                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2497                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2498                                 guest_xcrs->xcrs[0].value);
2499                         break;
2500                 }
2501         if (r)
2502                 r = -EINVAL;
2503         return r;
2504 }
2505
2506 long kvm_arch_vcpu_ioctl(struct file *filp,
2507                          unsigned int ioctl, unsigned long arg)
2508 {
2509         struct kvm_vcpu *vcpu = filp->private_data;
2510         void __user *argp = (void __user *)arg;
2511         int r;
2512         union {
2513                 struct kvm_lapic_state *lapic;
2514                 struct kvm_xsave *xsave;
2515                 struct kvm_xcrs *xcrs;
2516                 void *buffer;
2517         } u;
2518
2519         u.buffer = NULL;
2520         switch (ioctl) {
2521         case KVM_GET_LAPIC: {
2522                 r = -EINVAL;
2523                 if (!vcpu->arch.apic)
2524                         goto out;
2525                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2526
2527                 r = -ENOMEM;
2528                 if (!u.lapic)
2529                         goto out;
2530                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2531                 if (r)
2532                         goto out;
2533                 r = -EFAULT;
2534                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2535                         goto out;
2536                 r = 0;
2537                 break;
2538         }
2539         case KVM_SET_LAPIC: {
2540                 r = -EINVAL;
2541                 if (!vcpu->arch.apic)
2542                         goto out;
2543                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
2544                 if (IS_ERR(u.lapic)) {
2545                         r = PTR_ERR(u.lapic);
2546                         goto out;
2547                 }
2548
2549                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2550                 if (r)
2551                         goto out;
2552                 r = 0;
2553                 break;
2554         }
2555         case KVM_INTERRUPT: {
2556                 struct kvm_interrupt irq;
2557
2558                 r = -EFAULT;
2559                 if (copy_from_user(&irq, argp, sizeof irq))
2560                         goto out;
2561                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2562                 if (r)
2563                         goto out;
2564                 r = 0;
2565                 break;
2566         }
2567         case KVM_NMI: {
2568                 r = kvm_vcpu_ioctl_nmi(vcpu);
2569                 if (r)
2570                         goto out;
2571                 r = 0;
2572                 break;
2573         }
2574         case KVM_SET_CPUID: {
2575                 struct kvm_cpuid __user *cpuid_arg = argp;
2576                 struct kvm_cpuid cpuid;
2577
2578                 r = -EFAULT;
2579                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2580                         goto out;
2581                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2582                 if (r)
2583                         goto out;
2584                 break;
2585         }
2586         case KVM_SET_CPUID2: {
2587                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2588                 struct kvm_cpuid2 cpuid;
2589
2590                 r = -EFAULT;
2591                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2592                         goto out;
2593                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2594                                               cpuid_arg->entries);
2595                 if (r)
2596                         goto out;
2597                 break;
2598         }
2599         case KVM_GET_CPUID2: {
2600                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2601                 struct kvm_cpuid2 cpuid;
2602
2603                 r = -EFAULT;
2604                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2605                         goto out;
2606                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2607                                               cpuid_arg->entries);
2608                 if (r)
2609                         goto out;
2610                 r = -EFAULT;
2611                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2612                         goto out;
2613                 r = 0;
2614                 break;
2615         }
2616         case KVM_GET_MSRS:
2617                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2618                 break;
2619         case KVM_SET_MSRS:
2620                 r = msr_io(vcpu, argp, do_set_msr, 0);
2621                 break;
2622         case KVM_TPR_ACCESS_REPORTING: {
2623                 struct kvm_tpr_access_ctl tac;
2624
2625                 r = -EFAULT;
2626                 if (copy_from_user(&tac, argp, sizeof tac))
2627                         goto out;
2628                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2629                 if (r)
2630                         goto out;
2631                 r = -EFAULT;
2632                 if (copy_to_user(argp, &tac, sizeof tac))
2633                         goto out;
2634                 r = 0;
2635                 break;
2636         };
2637         case KVM_SET_VAPIC_ADDR: {
2638                 struct kvm_vapic_addr va;
2639
2640                 r = -EINVAL;
2641                 if (!irqchip_in_kernel(vcpu->kvm))
2642                         goto out;
2643                 r = -EFAULT;
2644                 if (copy_from_user(&va, argp, sizeof va))
2645                         goto out;
2646                 r = 0;
2647                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2648                 break;
2649         }
2650         case KVM_X86_SETUP_MCE: {
2651                 u64 mcg_cap;
2652
2653                 r = -EFAULT;
2654                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2655                         goto out;
2656                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2657                 break;
2658         }
2659         case KVM_X86_SET_MCE: {
2660                 struct kvm_x86_mce mce;
2661
2662                 r = -EFAULT;
2663                 if (copy_from_user(&mce, argp, sizeof mce))
2664                         goto out;
2665                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2666                 break;
2667         }
2668         case KVM_GET_VCPU_EVENTS: {
2669                 struct kvm_vcpu_events events;
2670
2671                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2672
2673                 r = -EFAULT;
2674                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2675                         break;
2676                 r = 0;
2677                 break;
2678         }
2679         case KVM_SET_VCPU_EVENTS: {
2680                 struct kvm_vcpu_events events;
2681
2682                 r = -EFAULT;
2683                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2684                         break;
2685
2686                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2687                 break;
2688         }
2689         case KVM_GET_DEBUGREGS: {
2690                 struct kvm_debugregs dbgregs;
2691
2692                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2693
2694                 r = -EFAULT;
2695                 if (copy_to_user(argp, &dbgregs,
2696                                  sizeof(struct kvm_debugregs)))
2697                         break;
2698                 r = 0;
2699                 break;
2700         }
2701         case KVM_SET_DEBUGREGS: {
2702                 struct kvm_debugregs dbgregs;
2703
2704                 r = -EFAULT;
2705                 if (copy_from_user(&dbgregs, argp,
2706                                    sizeof(struct kvm_debugregs)))
2707                         break;
2708
2709                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2710                 break;
2711         }
2712         case KVM_GET_XSAVE: {
2713                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2714                 r = -ENOMEM;
2715                 if (!u.xsave)
2716                         break;
2717
2718                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2719
2720                 r = -EFAULT;
2721                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2722                         break;
2723                 r = 0;
2724                 break;
2725         }
2726         case KVM_SET_XSAVE: {
2727                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
2728                 if (IS_ERR(u.xsave)) {
2729                         r = PTR_ERR(u.xsave);
2730                         goto out;
2731                 }
2732
2733                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2734                 break;
2735         }
2736         case KVM_GET_XCRS: {
2737                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2738                 r = -ENOMEM;
2739                 if (!u.xcrs)
2740                         break;
2741
2742                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2743
2744                 r = -EFAULT;
2745                 if (copy_to_user(argp, u.xcrs,
2746                                  sizeof(struct kvm_xcrs)))
2747                         break;
2748                 r = 0;
2749                 break;
2750         }
2751         case KVM_SET_XCRS: {
2752                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
2753                 if (IS_ERR(u.xcrs)) {
2754                         r = PTR_ERR(u.xcrs);
2755                         goto out;
2756                 }
2757
2758                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2759                 break;
2760         }
2761         case KVM_SET_TSC_KHZ: {
2762                 u32 user_tsc_khz;
2763
2764                 r = -EINVAL;
2765                 if (!kvm_has_tsc_control)
2766                         break;
2767
2768                 user_tsc_khz = (u32)arg;
2769
2770                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
2771                         goto out;
2772
2773                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
2774
2775                 r = 0;
2776                 goto out;
2777         }
2778         case KVM_GET_TSC_KHZ: {
2779                 r = -EIO;
2780                 if (check_tsc_unstable())
2781                         goto out;
2782
2783                 r = vcpu_tsc_khz(vcpu);
2784
2785                 goto out;
2786         }
2787         default:
2788                 r = -EINVAL;
2789         }
2790 out:
2791         kfree(u.buffer);
2792         return r;
2793 }
2794
2795 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2796 {
2797         int ret;
2798
2799         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2800                 return -1;
2801         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2802         return ret;
2803 }
2804
2805 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2806                                               u64 ident_addr)
2807 {
2808         kvm->arch.ept_identity_map_addr = ident_addr;
2809         return 0;
2810 }
2811
2812 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2813                                           u32 kvm_nr_mmu_pages)
2814 {
2815         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2816                 return -EINVAL;
2817
2818         mutex_lock(&kvm->slots_lock);
2819         spin_lock(&kvm->mmu_lock);
2820
2821         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2822         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2823
2824         spin_unlock(&kvm->mmu_lock);
2825         mutex_unlock(&kvm->slots_lock);
2826         return 0;
2827 }
2828
2829 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2830 {
2831         return kvm->arch.n_max_mmu_pages;
2832 }
2833
2834 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2835 {
2836         int r;
2837
2838         r = 0;
2839         switch (chip->chip_id) {
2840         case KVM_IRQCHIP_PIC_MASTER:
2841                 memcpy(&chip->chip.pic,
2842                         &pic_irqchip(kvm)->pics[0],
2843                         sizeof(struct kvm_pic_state));
2844                 break;
2845         case KVM_IRQCHIP_PIC_SLAVE:
2846                 memcpy(&chip->chip.pic,
2847                         &pic_irqchip(kvm)->pics[1],
2848                         sizeof(struct kvm_pic_state));
2849                 break;
2850         case KVM_IRQCHIP_IOAPIC:
2851                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2852                 break;
2853         default:
2854                 r = -EINVAL;
2855                 break;
2856         }
2857         return r;
2858 }
2859
2860 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2861 {
2862         int r;
2863
2864         r = 0;
2865         switch (chip->chip_id) {
2866         case KVM_IRQCHIP_PIC_MASTER:
2867                 spin_lock(&pic_irqchip(kvm)->lock);
2868                 memcpy(&pic_irqchip(kvm)->pics[0],
2869                         &chip->chip.pic,
2870                         sizeof(struct kvm_pic_state));
2871                 spin_unlock(&pic_irqchip(kvm)->lock);
2872                 break;
2873         case KVM_IRQCHIP_PIC_SLAVE:
2874                 spin_lock(&pic_irqchip(kvm)->lock);
2875                 memcpy(&pic_irqchip(kvm)->pics[1],
2876                         &chip->chip.pic,
2877                         sizeof(struct kvm_pic_state));
2878                 spin_unlock(&pic_irqchip(kvm)->lock);
2879                 break;
2880         case KVM_IRQCHIP_IOAPIC:
2881                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2882                 break;
2883         default:
2884                 r = -EINVAL;
2885                 break;
2886         }
2887         kvm_pic_update_irq(pic_irqchip(kvm));
2888         return r;
2889 }
2890
2891 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2892 {
2893         int r = 0;
2894
2895         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2896         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2897         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2898         return r;
2899 }
2900
2901 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2902 {
2903         int r = 0;
2904
2905         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2906         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2907         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2908         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2909         return r;
2910 }
2911
2912 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2913 {
2914         int r = 0;
2915
2916         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2917         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2918                 sizeof(ps->channels));
2919         ps->flags = kvm->arch.vpit->pit_state.flags;
2920         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2921         memset(&ps->reserved, 0, sizeof(ps->reserved));
2922         return r;
2923 }
2924
2925 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2926 {
2927         int r = 0, start = 0;
2928         u32 prev_legacy, cur_legacy;
2929         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2930         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2931         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2932         if (!prev_legacy && cur_legacy)
2933                 start = 1;
2934         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2935                sizeof(kvm->arch.vpit->pit_state.channels));
2936         kvm->arch.vpit->pit_state.flags = ps->flags;
2937         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2938         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2939         return r;
2940 }
2941
2942 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2943                                  struct kvm_reinject_control *control)
2944 {
2945         if (!kvm->arch.vpit)
2946                 return -ENXIO;
2947         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2948         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2949         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2950         return 0;
2951 }
2952
2953 /**
2954  * write_protect_slot - write protect a slot for dirty logging
2955  * @kvm: the kvm instance
2956  * @memslot: the slot we protect
2957  * @dirty_bitmap: the bitmap indicating which pages are dirty
2958  * @nr_dirty_pages: the number of dirty pages
2959  *
2960  * We have two ways to find all sptes to protect:
2961  * 1. Use kvm_mmu_slot_remove_write_access() which walks all shadow pages and
2962  *    checks ones that have a spte mapping a page in the slot.
2963  * 2. Use kvm_mmu_rmap_write_protect() for each gfn found in the bitmap.
2964  *
2965  * Generally speaking, if there are not so many dirty pages compared to the
2966  * number of shadow pages, we should use the latter.
2967  *
2968  * Note that letting others write into a page marked dirty in the old bitmap
2969  * by using the remaining tlb entry is not a problem.  That page will become
2970  * write protected again when we flush the tlb and then be reported dirty to
2971  * the user space by copying the old bitmap.
2972  */
2973 static void write_protect_slot(struct kvm *kvm,
2974                                struct kvm_memory_slot *memslot,
2975                                unsigned long *dirty_bitmap,
2976                                unsigned long nr_dirty_pages)
2977 {
2978         /* Not many dirty pages compared to # of shadow pages. */
2979         if (nr_dirty_pages < kvm->arch.n_used_mmu_pages) {
2980                 unsigned long gfn_offset;
2981
2982                 for_each_set_bit(gfn_offset, dirty_bitmap, memslot->npages) {
2983                         unsigned long gfn = memslot->base_gfn + gfn_offset;
2984
2985                         spin_lock(&kvm->mmu_lock);
2986                         kvm_mmu_rmap_write_protect(kvm, gfn, memslot);
2987                         spin_unlock(&kvm->mmu_lock);
2988                 }
2989                 kvm_flush_remote_tlbs(kvm);
2990         } else {
2991                 spin_lock(&kvm->mmu_lock);
2992                 kvm_mmu_slot_remove_write_access(kvm, memslot->id);
2993                 spin_unlock(&kvm->mmu_lock);
2994         }
2995 }
2996
2997 /*
2998  * Get (and clear) the dirty memory log for a memory slot.
2999  */
3000 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3001                                       struct kvm_dirty_log *log)
3002 {
3003         int r;
3004         struct kvm_memory_slot *memslot;
3005         unsigned long n, nr_dirty_pages;
3006
3007         mutex_lock(&kvm->slots_lock);
3008
3009         r = -EINVAL;
3010         if (log->slot >= KVM_MEMORY_SLOTS)
3011                 goto out;
3012
3013         memslot = id_to_memslot(kvm->memslots, log->slot);
3014         r = -ENOENT;
3015         if (!memslot->dirty_bitmap)
3016                 goto out;
3017
3018         n = kvm_dirty_bitmap_bytes(memslot);
3019         nr_dirty_pages = memslot->nr_dirty_pages;
3020
3021         /* If nothing is dirty, don't bother messing with page tables. */
3022         if (nr_dirty_pages) {
3023                 struct kvm_memslots *slots, *old_slots;
3024                 unsigned long *dirty_bitmap, *dirty_bitmap_head;
3025
3026                 dirty_bitmap = memslot->dirty_bitmap;
3027                 dirty_bitmap_head = memslot->dirty_bitmap_head;
3028                 if (dirty_bitmap == dirty_bitmap_head)
3029                         dirty_bitmap_head += n / sizeof(long);
3030                 memset(dirty_bitmap_head, 0, n);
3031
3032                 r = -ENOMEM;
3033                 slots = kmemdup(kvm->memslots, sizeof(*kvm->memslots), GFP_KERNEL);
3034                 if (!slots)
3035                         goto out;
3036
3037                 memslot = id_to_memslot(slots, log->slot);
3038                 memslot->nr_dirty_pages = 0;
3039                 memslot->dirty_bitmap = dirty_bitmap_head;
3040                 update_memslots(slots, NULL);
3041
3042                 old_slots = kvm->memslots;
3043                 rcu_assign_pointer(kvm->memslots, slots);
3044                 synchronize_srcu_expedited(&kvm->srcu);
3045                 kfree(old_slots);
3046
3047                 write_protect_slot(kvm, memslot, dirty_bitmap, nr_dirty_pages);
3048
3049                 r = -EFAULT;
3050                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3051                         goto out;
3052         } else {
3053                 r = -EFAULT;
3054                 if (clear_user(log->dirty_bitmap, n))
3055                         goto out;
3056         }
3057
3058         r = 0;
3059 out:
3060         mutex_unlock(&kvm->slots_lock);
3061         return r;
3062 }
3063
3064 long kvm_arch_vm_ioctl(struct file *filp,
3065                        unsigned int ioctl, unsigned long arg)
3066 {
3067         struct kvm *kvm = filp->private_data;
3068         void __user *argp = (void __user *)arg;
3069         int r = -ENOTTY;
3070         /*
3071          * This union makes it completely explicit to gcc-3.x
3072          * that these two variables' stack usage should be
3073          * combined, not added together.
3074          */
3075         union {
3076                 struct kvm_pit_state ps;
3077                 struct kvm_pit_state2 ps2;
3078                 struct kvm_pit_config pit_config;
3079         } u;
3080
3081         switch (ioctl) {
3082         case KVM_SET_TSS_ADDR:
3083                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3084                 if (r < 0)
3085                         goto out;
3086                 break;
3087         case KVM_SET_IDENTITY_MAP_ADDR: {
3088                 u64 ident_addr;
3089
3090                 r = -EFAULT;
3091                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3092                         goto out;
3093                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3094                 if (r < 0)
3095                         goto out;
3096                 break;
3097         }
3098         case KVM_SET_NR_MMU_PAGES:
3099                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3100                 if (r)
3101                         goto out;
3102                 break;
3103         case KVM_GET_NR_MMU_PAGES:
3104                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3105                 break;
3106         case KVM_CREATE_IRQCHIP: {
3107                 struct kvm_pic *vpic;
3108
3109                 mutex_lock(&kvm->lock);
3110                 r = -EEXIST;
3111                 if (kvm->arch.vpic)
3112                         goto create_irqchip_unlock;
3113                 r = -ENOMEM;
3114                 vpic = kvm_create_pic(kvm);
3115                 if (vpic) {
3116                         r = kvm_ioapic_init(kvm);
3117                         if (r) {
3118                                 mutex_lock(&kvm->slots_lock);
3119                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3120                                                           &vpic->dev_master);
3121                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3122                                                           &vpic->dev_slave);
3123                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3124                                                           &vpic->dev_eclr);
3125                                 mutex_unlock(&kvm->slots_lock);
3126                                 kfree(vpic);
3127                                 goto create_irqchip_unlock;
3128                         }
3129                 } else
3130                         goto create_irqchip_unlock;
3131                 smp_wmb();
3132                 kvm->arch.vpic = vpic;
3133                 smp_wmb();
3134                 r = kvm_setup_default_irq_routing(kvm);
3135                 if (r) {
3136                         mutex_lock(&kvm->slots_lock);
3137                         mutex_lock(&kvm->irq_lock);
3138                         kvm_ioapic_destroy(kvm);
3139                         kvm_destroy_pic(kvm);
3140                         mutex_unlock(&kvm->irq_lock);
3141                         mutex_unlock(&kvm->slots_lock);
3142                 }
3143         create_irqchip_unlock:
3144                 mutex_unlock(&kvm->lock);
3145                 break;
3146         }
3147         case KVM_CREATE_PIT:
3148                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3149                 goto create_pit;
3150         case KVM_CREATE_PIT2:
3151                 r = -EFAULT;
3152                 if (copy_from_user(&u.pit_config, argp,
3153                                    sizeof(struct kvm_pit_config)))
3154                         goto out;
3155         create_pit:
3156                 mutex_lock(&kvm->slots_lock);
3157                 r = -EEXIST;
3158                 if (kvm->arch.vpit)
3159                         goto create_pit_unlock;
3160                 r = -ENOMEM;
3161                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3162                 if (kvm->arch.vpit)
3163                         r = 0;
3164         create_pit_unlock:
3165                 mutex_unlock(&kvm->slots_lock);
3166                 break;
3167         case KVM_IRQ_LINE_STATUS:
3168         case KVM_IRQ_LINE: {
3169                 struct kvm_irq_level irq_event;
3170
3171                 r = -EFAULT;
3172                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3173                         goto out;
3174                 r = -ENXIO;
3175                 if (irqchip_in_kernel(kvm)) {
3176                         __s32 status;
3177                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3178                                         irq_event.irq, irq_event.level);
3179                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3180                                 r = -EFAULT;
3181                                 irq_event.status = status;
3182                                 if (copy_to_user(argp, &irq_event,
3183                                                         sizeof irq_event))
3184                                         goto out;
3185                         }
3186                         r = 0;
3187                 }
3188                 break;
3189         }
3190         case KVM_GET_IRQCHIP: {
3191                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3192                 struct kvm_irqchip *chip;
3193
3194                 chip = memdup_user(argp, sizeof(*chip));
3195                 if (IS_ERR(chip)) {
3196                         r = PTR_ERR(chip);
3197                         goto out;
3198                 }
3199
3200                 r = -ENXIO;
3201                 if (!irqchip_in_kernel(kvm))
3202                         goto get_irqchip_out;
3203                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3204                 if (r)
3205                         goto get_irqchip_out;
3206                 r = -EFAULT;
3207                 if (copy_to_user(argp, chip, sizeof *chip))
3208                         goto get_irqchip_out;
3209                 r = 0;
3210         get_irqchip_out:
3211                 kfree(chip);
3212                 if (r)
3213                         goto out;
3214                 break;
3215         }
3216         case KVM_SET_IRQCHIP: {
3217                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3218                 struct kvm_irqchip *chip;
3219
3220                 chip = memdup_user(argp, sizeof(*chip));
3221                 if (IS_ERR(chip)) {
3222                         r = PTR_ERR(chip);
3223                         goto out;
3224                 }
3225
3226                 r = -ENXIO;
3227                 if (!irqchip_in_kernel(kvm))
3228                         goto set_irqchip_out;
3229                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3230                 if (r)
3231                         goto set_irqchip_out;
3232                 r = 0;
3233         set_irqchip_out:
3234                 kfree(chip);
3235                 if (r)
3236                         goto out;
3237                 break;
3238         }
3239         case KVM_GET_PIT: {
3240                 r = -EFAULT;
3241                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3242                         goto out;
3243                 r = -ENXIO;
3244                 if (!kvm->arch.vpit)
3245                         goto out;
3246                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3247                 if (r)
3248                         goto out;
3249                 r = -EFAULT;
3250                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3251                         goto out;
3252                 r = 0;
3253                 break;
3254         }
3255         case KVM_SET_PIT: {
3256                 r = -EFAULT;
3257                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3258                         goto out;
3259                 r = -ENXIO;
3260                 if (!kvm->arch.vpit)
3261                         goto out;
3262                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3263                 if (r)
3264                         goto out;
3265                 r = 0;
3266                 break;
3267         }
3268         case KVM_GET_PIT2: {
3269                 r = -ENXIO;
3270                 if (!kvm->arch.vpit)
3271                         goto out;
3272                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3273                 if (r)
3274                         goto out;
3275                 r = -EFAULT;
3276                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3277                         goto out;
3278                 r = 0;
3279                 break;
3280         }
3281         case KVM_SET_PIT2: {
3282                 r = -EFAULT;
3283                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3284                         goto out;
3285                 r = -ENXIO;
3286                 if (!kvm->arch.vpit)
3287                         goto out;
3288                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3289                 if (r)
3290                         goto out;
3291                 r = 0;
3292                 break;
3293         }
3294         case KVM_REINJECT_CONTROL: {
3295                 struct kvm_reinject_control control;
3296                 r =  -EFAULT;
3297                 if (copy_from_user(&control, argp, sizeof(control)))
3298                         goto out;
3299                 r = kvm_vm_ioctl_reinject(kvm, &control);
3300                 if (r)
3301                         goto out;
3302                 r = 0;
3303                 break;
3304         }
3305         case KVM_XEN_HVM_CONFIG: {
3306                 r = -EFAULT;
3307                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3308                                    sizeof(struct kvm_xen_hvm_config)))
3309                         goto out;
3310                 r = -EINVAL;
3311                 if (kvm->arch.xen_hvm_config.flags)
3312                         goto out;
3313                 r = 0;
3314                 break;
3315         }
3316         case KVM_SET_CLOCK: {
3317                 struct kvm_clock_data user_ns;
3318                 u64 now_ns;
3319                 s64 delta;
3320
3321                 r = -EFAULT;
3322                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3323                         goto out;
3324
3325                 r = -EINVAL;
3326                 if (user_ns.flags)
3327                         goto out;
3328
3329                 r = 0;
3330                 local_irq_disable();
3331                 now_ns = get_kernel_ns();
3332                 delta = user_ns.clock - now_ns;
3333                 local_irq_enable();
3334                 kvm->arch.kvmclock_offset = delta;
3335                 break;
3336         }
3337         case KVM_GET_CLOCK: {
3338                 struct kvm_clock_data user_ns;
3339                 u64 now_ns;
3340
3341                 local_irq_disable();
3342                 now_ns = get_kernel_ns();
3343                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3344                 local_irq_enable();
3345                 user_ns.flags = 0;
3346                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3347
3348                 r = -EFAULT;
3349                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3350                         goto out;
3351                 r = 0;
3352                 break;
3353         }
3354
3355         default:
3356                 ;
3357         }
3358 out:
3359         return r;
3360 }
3361
3362 static void kvm_init_msr_list(void)
3363 {
3364         u32 dummy[2];
3365         unsigned i, j;
3366
3367         /* skip the first msrs in the list. KVM-specific */
3368         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3369                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3370                         continue;
3371                 if (j < i)
3372                         msrs_to_save[j] = msrs_to_save[i];
3373                 j++;
3374         }
3375         num_msrs_to_save = j;
3376 }
3377
3378 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3379                            const void *v)
3380 {
3381         int handled = 0;
3382         int n;
3383
3384         do {
3385                 n = min(len, 8);
3386                 if (!(vcpu->arch.apic &&
3387                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3388                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3389                         break;
3390                 handled += n;
3391                 addr += n;
3392                 len -= n;
3393                 v += n;
3394         } while (len);
3395
3396         return handled;
3397 }
3398
3399 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3400 {
3401         int handled = 0;
3402         int n;
3403
3404         do {
3405                 n = min(len, 8);
3406                 if (!(vcpu->arch.apic &&
3407                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3408                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3409                         break;
3410                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3411                 handled += n;
3412                 addr += n;
3413                 len -= n;
3414                 v += n;
3415         } while (len);
3416
3417         return handled;
3418 }
3419
3420 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3421                         struct kvm_segment *var, int seg)
3422 {
3423         kvm_x86_ops->set_segment(vcpu, var, seg);
3424 }
3425
3426 void kvm_get_segment(struct kvm_vcpu *vcpu,
3427                      struct kvm_segment *var, int seg)
3428 {
3429         kvm_x86_ops->get_segment(vcpu, var, seg);
3430 }
3431
3432 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3433 {
3434         gpa_t t_gpa;
3435         struct x86_exception exception;
3436
3437         BUG_ON(!mmu_is_nested(vcpu));
3438
3439         /* NPT walks are always user-walks */
3440         access |= PFERR_USER_MASK;
3441         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3442
3443         return t_gpa;
3444 }
3445
3446 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3447                               struct x86_exception *exception)
3448 {
3449         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3450         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3451 }
3452
3453  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3454                                 struct x86_exception *exception)
3455 {
3456         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3457         access |= PFERR_FETCH_MASK;
3458         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3459 }
3460
3461 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3462                                struct x86_exception *exception)
3463 {
3464         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3465         access |= PFERR_WRITE_MASK;
3466         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3467 }
3468
3469 /* uses this to access any guest's mapped memory without checking CPL */
3470 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3471                                 struct x86_exception *exception)
3472 {
3473         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3474 }
3475
3476 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3477                                       struct kvm_vcpu *vcpu, u32 access,
3478                                       struct x86_exception *exception)
3479 {
3480         void *data = val;
3481         int r = X86EMUL_CONTINUE;
3482
3483         while (bytes) {
3484                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3485                                                             exception);
3486                 unsigned offset = addr & (PAGE_SIZE-1);
3487                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3488                 int ret;
3489
3490                 if (gpa == UNMAPPED_GVA)
3491                         return X86EMUL_PROPAGATE_FAULT;
3492                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3493                 if (ret < 0) {
3494                         r = X86EMUL_IO_NEEDED;
3495                         goto out;
3496                 }
3497
3498                 bytes -= toread;
3499                 data += toread;
3500                 addr += toread;
3501         }
3502 out:
3503         return r;
3504 }
3505
3506 /* used for instruction fetching */
3507 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3508                                 gva_t addr, void *val, unsigned int bytes,
3509                                 struct x86_exception *exception)
3510 {
3511         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3512         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3513
3514         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3515                                           access | PFERR_FETCH_MASK,
3516                                           exception);
3517 }
3518
3519 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3520                                gva_t addr, void *val, unsigned int bytes,
3521                                struct x86_exception *exception)
3522 {
3523         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3524         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3525
3526         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3527                                           exception);
3528 }
3529 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3530
3531 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3532                                       gva_t addr, void *val, unsigned int bytes,
3533                                       struct x86_exception *exception)
3534 {
3535         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3536         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3537 }
3538
3539 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3540                                        gva_t addr, void *val,
3541                                        unsigned int bytes,
3542                                        struct x86_exception *exception)
3543 {
3544         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3545         void *data = val;
3546         int r = X86EMUL_CONTINUE;
3547
3548         while (bytes) {
3549                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3550                                                              PFERR_WRITE_MASK,
3551                                                              exception);
3552                 unsigned offset = addr & (PAGE_SIZE-1);
3553                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3554                 int ret;
3555
3556                 if (gpa == UNMAPPED_GVA)
3557                         return X86EMUL_PROPAGATE_FAULT;
3558                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3559                 if (ret < 0) {
3560                         r = X86EMUL_IO_NEEDED;
3561                         goto out;
3562                 }
3563
3564                 bytes -= towrite;
3565                 data += towrite;
3566                 addr += towrite;
3567         }
3568 out:
3569         return r;
3570 }
3571 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3572
3573 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3574                                 gpa_t *gpa, struct x86_exception *exception,
3575                                 bool write)
3576 {
3577         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3578
3579         if (vcpu_match_mmio_gva(vcpu, gva) &&
3580                   check_write_user_access(vcpu, write, access,
3581                   vcpu->arch.access)) {
3582                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3583                                         (gva & (PAGE_SIZE - 1));
3584                 trace_vcpu_match_mmio(gva, *gpa, write, false);
3585                 return 1;
3586         }
3587
3588         if (write)
3589                 access |= PFERR_WRITE_MASK;
3590
3591         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3592
3593         if (*gpa == UNMAPPED_GVA)
3594                 return -1;
3595
3596         /* For APIC access vmexit */
3597         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3598                 return 1;
3599
3600         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3601                 trace_vcpu_match_mmio(gva, *gpa, write, true);
3602                 return 1;
3603         }
3604
3605         return 0;
3606 }
3607
3608 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3609                         const void *val, int bytes)
3610 {
3611         int ret;
3612
3613         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3614         if (ret < 0)
3615                 return 0;
3616         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
3617         return 1;
3618 }
3619
3620 struct read_write_emulator_ops {
3621         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
3622                                   int bytes);
3623         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
3624                                   void *val, int bytes);
3625         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3626                                int bytes, void *val);
3627         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3628                                     void *val, int bytes);
3629         bool write;
3630 };
3631
3632 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
3633 {
3634         if (vcpu->mmio_read_completed) {
3635                 memcpy(val, vcpu->mmio_data, bytes);
3636                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3637                                vcpu->mmio_phys_addr, *(u64 *)val);
3638                 vcpu->mmio_read_completed = 0;
3639                 return 1;
3640         }
3641
3642         return 0;
3643 }
3644
3645 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3646                         void *val, int bytes)
3647 {
3648         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
3649 }
3650
3651 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3652                          void *val, int bytes)
3653 {
3654         return emulator_write_phys(vcpu, gpa, val, bytes);
3655 }
3656
3657 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
3658 {
3659         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3660         return vcpu_mmio_write(vcpu, gpa, bytes, val);
3661 }
3662
3663 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3664                           void *val, int bytes)
3665 {
3666         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3667         return X86EMUL_IO_NEEDED;
3668 }
3669
3670 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3671                            void *val, int bytes)
3672 {
3673         memcpy(vcpu->mmio_data, val, bytes);
3674         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
3675         return X86EMUL_CONTINUE;
3676 }
3677
3678 static struct read_write_emulator_ops read_emultor = {
3679         .read_write_prepare = read_prepare,
3680         .read_write_emulate = read_emulate,
3681         .read_write_mmio = vcpu_mmio_read,
3682         .read_write_exit_mmio = read_exit_mmio,
3683 };
3684
3685 static struct read_write_emulator_ops write_emultor = {
3686         .read_write_emulate = write_emulate,
3687         .read_write_mmio = write_mmio,
3688         .read_write_exit_mmio = write_exit_mmio,
3689         .write = true,
3690 };
3691
3692 static int emulator_read_write_onepage(unsigned long addr, void *val,
3693                                        unsigned int bytes,
3694                                        struct x86_exception *exception,
3695                                        struct kvm_vcpu *vcpu,
3696                                        struct read_write_emulator_ops *ops)
3697 {
3698         gpa_t gpa;
3699         int handled, ret;
3700         bool write = ops->write;
3701
3702         if (ops->read_write_prepare &&
3703                   ops->read_write_prepare(vcpu, val, bytes))
3704                 return X86EMUL_CONTINUE;
3705
3706         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
3707
3708         if (ret < 0)
3709                 return X86EMUL_PROPAGATE_FAULT;
3710
3711         /* For APIC access vmexit */
3712         if (ret)
3713                 goto mmio;
3714
3715         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
3716                 return X86EMUL_CONTINUE;
3717
3718 mmio:
3719         /*
3720          * Is this MMIO handled locally?
3721          */
3722         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
3723         if (handled == bytes)
3724                 return X86EMUL_CONTINUE;
3725
3726         gpa += handled;
3727         bytes -= handled;
3728         val += handled;
3729
3730         vcpu->mmio_needed = 1;
3731         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3732         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3733         vcpu->mmio_size = bytes;
3734         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3735         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
3736         vcpu->mmio_index = 0;
3737
3738         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
3739 }
3740
3741 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
3742                         void *val, unsigned int bytes,
3743                         struct x86_exception *exception,
3744                         struct read_write_emulator_ops *ops)
3745 {
3746         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3747
3748         /* Crossing a page boundary? */
3749         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3750                 int rc, now;
3751
3752                 now = -addr & ~PAGE_MASK;
3753                 rc = emulator_read_write_onepage(addr, val, now, exception,
3754                                                  vcpu, ops);
3755
3756                 if (rc != X86EMUL_CONTINUE)
3757                         return rc;
3758                 addr += now;
3759                 val += now;
3760                 bytes -= now;
3761         }
3762
3763         return emulator_read_write_onepage(addr, val, bytes, exception,
3764                                            vcpu, ops);
3765 }
3766
3767 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3768                                   unsigned long addr,
3769                                   void *val,
3770                                   unsigned int bytes,
3771                                   struct x86_exception *exception)
3772 {
3773         return emulator_read_write(ctxt, addr, val, bytes,
3774                                    exception, &read_emultor);
3775 }
3776
3777 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
3778                             unsigned long addr,
3779                             const void *val,
3780                             unsigned int bytes,
3781                             struct x86_exception *exception)
3782 {
3783         return emulator_read_write(ctxt, addr, (void *)val, bytes,
3784                                    exception, &write_emultor);
3785 }
3786
3787 #define CMPXCHG_TYPE(t, ptr, old, new) \
3788         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3789
3790 #ifdef CONFIG_X86_64
3791 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3792 #else
3793 #  define CMPXCHG64(ptr, old, new) \
3794         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3795 #endif
3796
3797 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
3798                                      unsigned long addr,
3799                                      const void *old,
3800                                      const void *new,
3801                                      unsigned int bytes,
3802                                      struct x86_exception *exception)
3803 {
3804         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3805         gpa_t gpa;
3806         struct page *page;
3807         char *kaddr;
3808         bool exchanged;
3809
3810         /* guests cmpxchg8b have to be emulated atomically */
3811         if (bytes > 8 || (bytes & (bytes - 1)))
3812                 goto emul_write;
3813
3814         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3815
3816         if (gpa == UNMAPPED_GVA ||
3817             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3818                 goto emul_write;
3819
3820         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3821                 goto emul_write;
3822
3823         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3824         if (is_error_page(page)) {
3825                 kvm_release_page_clean(page);
3826                 goto emul_write;
3827         }
3828
3829         kaddr = kmap_atomic(page, KM_USER0);
3830         kaddr += offset_in_page(gpa);
3831         switch (bytes) {
3832         case 1:
3833                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3834                 break;
3835         case 2:
3836                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3837                 break;
3838         case 4:
3839                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3840                 break;
3841         case 8:
3842                 exchanged = CMPXCHG64(kaddr, old, new);
3843                 break;
3844         default:
3845                 BUG();
3846         }
3847         kunmap_atomic(kaddr, KM_USER0);
3848         kvm_release_page_dirty(page);
3849
3850         if (!exchanged)
3851                 return X86EMUL_CMPXCHG_FAILED;
3852
3853         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
3854
3855         return X86EMUL_CONTINUE;
3856
3857 emul_write:
3858         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3859
3860         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
3861 }
3862
3863 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3864 {
3865         /* TODO: String I/O for in kernel device */
3866         int r;
3867
3868         if (vcpu->arch.pio.in)
3869                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3870                                     vcpu->arch.pio.size, pd);
3871         else
3872                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3873                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3874                                      pd);
3875         return r;
3876 }
3877
3878 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
3879                                unsigned short port, void *val,
3880                                unsigned int count, bool in)
3881 {
3882         trace_kvm_pio(!in, port, size, count);
3883
3884         vcpu->arch.pio.port = port;
3885         vcpu->arch.pio.in = in;
3886         vcpu->arch.pio.count  = count;
3887         vcpu->arch.pio.size = size;
3888
3889         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3890                 vcpu->arch.pio.count = 0;
3891                 return 1;
3892         }
3893
3894         vcpu->run->exit_reason = KVM_EXIT_IO;
3895         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3896         vcpu->run->io.size = size;
3897         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3898         vcpu->run->io.count = count;
3899         vcpu->run->io.port = port;
3900
3901         return 0;
3902 }
3903
3904 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
3905                                     int size, unsigned short port, void *val,
3906                                     unsigned int count)
3907 {
3908         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3909         int ret;
3910
3911         if (vcpu->arch.pio.count)
3912                 goto data_avail;
3913
3914         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
3915         if (ret) {
3916 data_avail:
3917                 memcpy(val, vcpu->arch.pio_data, size * count);
3918                 vcpu->arch.pio.count = 0;
3919                 return 1;
3920         }
3921
3922         return 0;
3923 }
3924
3925 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
3926                                      int size, unsigned short port,
3927                                      const void *val, unsigned int count)
3928 {
3929         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3930
3931         memcpy(vcpu->arch.pio_data, val, size * count);
3932         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
3933 }
3934
3935 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3936 {
3937         return kvm_x86_ops->get_segment_base(vcpu, seg);
3938 }
3939
3940 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
3941 {
3942         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
3943 }
3944
3945 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3946 {
3947         if (!need_emulate_wbinvd(vcpu))
3948                 return X86EMUL_CONTINUE;
3949
3950         if (kvm_x86_ops->has_wbinvd_exit()) {
3951                 int cpu = get_cpu();
3952
3953                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3954                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3955                                 wbinvd_ipi, NULL, 1);
3956                 put_cpu();
3957                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3958         } else
3959                 wbinvd();
3960         return X86EMUL_CONTINUE;
3961 }
3962 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3963
3964 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
3965 {
3966         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
3967 }
3968
3969 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
3970 {
3971         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
3972 }
3973
3974 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
3975 {
3976
3977         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
3978 }
3979
3980 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
3981 {
3982         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
3983 }
3984
3985 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
3986 {
3987         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3988         unsigned long value;
3989
3990         switch (cr) {
3991         case 0:
3992                 value = kvm_read_cr0(vcpu);
3993                 break;
3994         case 2:
3995                 value = vcpu->arch.cr2;
3996                 break;
3997         case 3:
3998                 value = kvm_read_cr3(vcpu);
3999                 break;
4000         case 4:
4001                 value = kvm_read_cr4(vcpu);
4002                 break;
4003         case 8:
4004                 value = kvm_get_cr8(vcpu);
4005                 break;
4006         default:
4007                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4008                 return 0;
4009         }
4010
4011         return value;
4012 }
4013
4014 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4015 {
4016         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4017         int res = 0;
4018
4019         switch (cr) {
4020         case 0:
4021                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4022                 break;
4023         case 2:
4024                 vcpu->arch.cr2 = val;
4025                 break;
4026         case 3:
4027                 res = kvm_set_cr3(vcpu, val);
4028                 break;
4029         case 4:
4030                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4031                 break;
4032         case 8:
4033                 res = kvm_set_cr8(vcpu, val);
4034                 break;
4035         default:
4036                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4037                 res = -1;
4038         }
4039
4040         return res;
4041 }
4042
4043 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4044 {
4045         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4046 }
4047
4048 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4049 {
4050         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4051 }
4052
4053 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4054 {
4055         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4056 }
4057
4058 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4059 {
4060         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4061 }
4062
4063 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4064 {
4065         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4066 }
4067
4068 static unsigned long emulator_get_cached_segment_base(
4069         struct x86_emulate_ctxt *ctxt, int seg)
4070 {
4071         return get_segment_base(emul_to_vcpu(ctxt), seg);
4072 }
4073
4074 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4075                                  struct desc_struct *desc, u32 *base3,
4076                                  int seg)
4077 {
4078         struct kvm_segment var;
4079
4080         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4081         *selector = var.selector;
4082
4083         if (var.unusable)
4084                 return false;
4085
4086         if (var.g)
4087                 var.limit >>= 12;
4088         set_desc_limit(desc, var.limit);
4089         set_desc_base(desc, (unsigned long)var.base);
4090 #ifdef CONFIG_X86_64
4091         if (base3)
4092                 *base3 = var.base >> 32;
4093 #endif
4094         desc->type = var.type;
4095         desc->s = var.s;
4096         desc->dpl = var.dpl;
4097         desc->p = var.present;
4098         desc->avl = var.avl;
4099         desc->l = var.l;
4100         desc->d = var.db;
4101         desc->g = var.g;
4102
4103         return true;
4104 }
4105
4106 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4107                                  struct desc_struct *desc, u32 base3,
4108                                  int seg)
4109 {
4110         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4111         struct kvm_segment var;
4112
4113         var.selector = selector;
4114         var.base = get_desc_base(desc);
4115 #ifdef CONFIG_X86_64
4116         var.base |= ((u64)base3) << 32;
4117 #endif
4118         var.limit = get_desc_limit(desc);
4119         if (desc->g)
4120                 var.limit = (var.limit << 12) | 0xfff;
4121         var.type = desc->type;
4122         var.present = desc->p;
4123         var.dpl = desc->dpl;
4124         var.db = desc->d;
4125         var.s = desc->s;
4126         var.l = desc->l;
4127         var.g = desc->g;
4128         var.avl = desc->avl;
4129         var.present = desc->p;
4130         var.unusable = !var.present;
4131         var.padding = 0;
4132
4133         kvm_set_segment(vcpu, &var, seg);
4134         return;
4135 }
4136
4137 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4138                             u32 msr_index, u64 *pdata)
4139 {
4140         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4141 }
4142
4143 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4144                             u32 msr_index, u64 data)
4145 {
4146         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4147 }
4148
4149 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4150 {
4151         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4152 }
4153
4154 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4155 {
4156         preempt_disable();
4157         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4158         /*
4159          * CR0.TS may reference the host fpu state, not the guest fpu state,
4160          * so it may be clear at this point.
4161          */
4162         clts();
4163 }
4164
4165 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4166 {
4167         preempt_enable();
4168 }
4169
4170 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4171                               struct x86_instruction_info *info,
4172                               enum x86_intercept_stage stage)
4173 {
4174         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4175 }
4176
4177 static struct x86_emulate_ops emulate_ops = {
4178         .read_std            = kvm_read_guest_virt_system,
4179         .write_std           = kvm_write_guest_virt_system,
4180         .fetch               = kvm_fetch_guest_virt,
4181         .read_emulated       = emulator_read_emulated,
4182         .write_emulated      = emulator_write_emulated,
4183         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4184         .invlpg              = emulator_invlpg,
4185         .pio_in_emulated     = emulator_pio_in_emulated,
4186         .pio_out_emulated    = emulator_pio_out_emulated,
4187         .get_segment         = emulator_get_segment,
4188         .set_segment         = emulator_set_segment,
4189         .get_cached_segment_base = emulator_get_cached_segment_base,
4190         .get_gdt             = emulator_get_gdt,
4191         .get_idt             = emulator_get_idt,
4192         .set_gdt             = emulator_set_gdt,
4193         .set_idt             = emulator_set_idt,
4194         .get_cr              = emulator_get_cr,
4195         .set_cr              = emulator_set_cr,
4196         .cpl                 = emulator_get_cpl,
4197         .get_dr              = emulator_get_dr,
4198         .set_dr              = emulator_set_dr,
4199         .set_msr             = emulator_set_msr,
4200         .get_msr             = emulator_get_msr,
4201         .halt                = emulator_halt,
4202         .wbinvd              = emulator_wbinvd,
4203         .fix_hypercall       = emulator_fix_hypercall,
4204         .get_fpu             = emulator_get_fpu,
4205         .put_fpu             = emulator_put_fpu,
4206         .intercept           = emulator_intercept,
4207 };
4208
4209 static void cache_all_regs(struct kvm_vcpu *vcpu)
4210 {
4211         kvm_register_read(vcpu, VCPU_REGS_RAX);
4212         kvm_register_read(vcpu, VCPU_REGS_RSP);
4213         kvm_register_read(vcpu, VCPU_REGS_RIP);
4214         vcpu->arch.regs_dirty = ~0;
4215 }
4216
4217 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4218 {
4219         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4220         /*
4221          * an sti; sti; sequence only disable interrupts for the first
4222          * instruction. So, if the last instruction, be it emulated or
4223          * not, left the system with the INT_STI flag enabled, it
4224          * means that the last instruction is an sti. We should not
4225          * leave the flag on in this case. The same goes for mov ss
4226          */
4227         if (!(int_shadow & mask))
4228                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4229 }
4230
4231 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4232 {
4233         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4234         if (ctxt->exception.vector == PF_VECTOR)
4235                 kvm_propagate_fault(vcpu, &ctxt->exception);
4236         else if (ctxt->exception.error_code_valid)
4237                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4238                                       ctxt->exception.error_code);
4239         else
4240                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4241 }
4242
4243 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4244                               const unsigned long *regs)
4245 {
4246         memset(&ctxt->twobyte, 0,
4247                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4248         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4249
4250         ctxt->fetch.start = 0;
4251         ctxt->fetch.end = 0;
4252         ctxt->io_read.pos = 0;
4253         ctxt->io_read.end = 0;
4254         ctxt->mem_read.pos = 0;
4255         ctxt->mem_read.end = 0;
4256 }
4257
4258 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4259 {
4260         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4261         int cs_db, cs_l;
4262
4263         /*
4264          * TODO: fix emulate.c to use guest_read/write_register
4265          * instead of direct ->regs accesses, can save hundred cycles
4266          * on Intel for instructions that don't read/change RSP, for
4267          * for example.
4268          */
4269         cache_all_regs(vcpu);
4270
4271         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4272
4273         ctxt->eflags = kvm_get_rflags(vcpu);
4274         ctxt->eip = kvm_rip_read(vcpu);
4275         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4276                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4277                      cs_l                               ? X86EMUL_MODE_PROT64 :
4278                      cs_db                              ? X86EMUL_MODE_PROT32 :
4279                                                           X86EMUL_MODE_PROT16;
4280         ctxt->guest_mode = is_guest_mode(vcpu);
4281
4282         init_decode_cache(ctxt, vcpu->arch.regs);
4283         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4284 }
4285
4286 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4287 {
4288         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4289         int ret;
4290
4291         init_emulate_ctxt(vcpu);
4292
4293         ctxt->op_bytes = 2;
4294         ctxt->ad_bytes = 2;
4295         ctxt->_eip = ctxt->eip + inc_eip;
4296         ret = emulate_int_real(ctxt, irq);
4297
4298         if (ret != X86EMUL_CONTINUE)
4299                 return EMULATE_FAIL;
4300
4301         ctxt->eip = ctxt->_eip;
4302         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4303         kvm_rip_write(vcpu, ctxt->eip);
4304         kvm_set_rflags(vcpu, ctxt->eflags);
4305
4306         if (irq == NMI_VECTOR)
4307                 vcpu->arch.nmi_pending = 0;
4308         else
4309                 vcpu->arch.interrupt.pending = false;
4310
4311         return EMULATE_DONE;
4312 }
4313 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4314
4315 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4316 {
4317         int r = EMULATE_DONE;
4318
4319         ++vcpu->stat.insn_emulation_fail;
4320         trace_kvm_emulate_insn_failed(vcpu);
4321         if (!is_guest_mode(vcpu)) {
4322                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4323                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4324                 vcpu->run->internal.ndata = 0;
4325                 r = EMULATE_FAIL;
4326         }
4327         kvm_queue_exception(vcpu, UD_VECTOR);
4328
4329         return r;
4330 }
4331
4332 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4333 {
4334         gpa_t gpa;
4335
4336         if (tdp_enabled)
4337                 return false;
4338
4339         /*
4340          * if emulation was due to access to shadowed page table
4341          * and it failed try to unshadow page and re-entetr the
4342          * guest to let CPU execute the instruction.
4343          */
4344         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4345                 return true;
4346
4347         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4348
4349         if (gpa == UNMAPPED_GVA)
4350                 return true; /* let cpu generate fault */
4351
4352         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4353                 return true;
4354
4355         return false;
4356 }
4357
4358 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4359                               unsigned long cr2,  int emulation_type)
4360 {
4361         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4362         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4363
4364         last_retry_eip = vcpu->arch.last_retry_eip;
4365         last_retry_addr = vcpu->arch.last_retry_addr;
4366
4367         /*
4368          * If the emulation is caused by #PF and it is non-page_table
4369          * writing instruction, it means the VM-EXIT is caused by shadow
4370          * page protected, we can zap the shadow page and retry this
4371          * instruction directly.
4372          *
4373          * Note: if the guest uses a non-page-table modifying instruction
4374          * on the PDE that points to the instruction, then we will unmap
4375          * the instruction and go to an infinite loop. So, we cache the
4376          * last retried eip and the last fault address, if we meet the eip
4377          * and the address again, we can break out of the potential infinite
4378          * loop.
4379          */
4380         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4381
4382         if (!(emulation_type & EMULTYPE_RETRY))
4383                 return false;
4384
4385         if (x86_page_table_writing_insn(ctxt))
4386                 return false;
4387
4388         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4389                 return false;
4390
4391         vcpu->arch.last_retry_eip = ctxt->eip;
4392         vcpu->arch.last_retry_addr = cr2;
4393
4394         if (!vcpu->arch.mmu.direct_map)
4395                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4396
4397         kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4398
4399         return true;
4400 }
4401
4402 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4403                             unsigned long cr2,
4404                             int emulation_type,
4405                             void *insn,
4406                             int insn_len)
4407 {
4408         int r;
4409         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4410         bool writeback = true;
4411
4412         kvm_clear_exception_queue(vcpu);
4413
4414         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4415                 init_emulate_ctxt(vcpu);
4416                 ctxt->interruptibility = 0;
4417                 ctxt->have_exception = false;
4418                 ctxt->perm_ok = false;
4419
4420                 ctxt->only_vendor_specific_insn
4421                         = emulation_type & EMULTYPE_TRAP_UD;
4422
4423                 r = x86_decode_insn(ctxt, insn, insn_len);
4424
4425                 trace_kvm_emulate_insn_start(vcpu);
4426                 ++vcpu->stat.insn_emulation;
4427                 if (r != EMULATION_OK)  {
4428                         if (emulation_type & EMULTYPE_TRAP_UD)
4429                                 return EMULATE_FAIL;
4430                         if (reexecute_instruction(vcpu, cr2))
4431                                 return EMULATE_DONE;
4432                         if (emulation_type & EMULTYPE_SKIP)
4433                                 return EMULATE_FAIL;
4434                         return handle_emulation_failure(vcpu);
4435                 }
4436         }
4437
4438         if (emulation_type & EMULTYPE_SKIP) {
4439                 kvm_rip_write(vcpu, ctxt->_eip);
4440                 return EMULATE_DONE;
4441         }
4442
4443         if (retry_instruction(ctxt, cr2, emulation_type))
4444                 return EMULATE_DONE;
4445
4446         /* this is needed for vmware backdoor interface to work since it
4447            changes registers values  during IO operation */
4448         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4449                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4450                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4451         }
4452
4453 restart:
4454         r = x86_emulate_insn(ctxt);
4455
4456         if (r == EMULATION_INTERCEPTED)
4457                 return EMULATE_DONE;
4458
4459         if (r == EMULATION_FAILED) {
4460                 if (reexecute_instruction(vcpu, cr2))
4461                         return EMULATE_DONE;
4462
4463                 return handle_emulation_failure(vcpu);
4464         }
4465
4466         if (ctxt->have_exception) {
4467                 inject_emulated_exception(vcpu);
4468                 r = EMULATE_DONE;
4469         } else if (vcpu->arch.pio.count) {
4470                 if (!vcpu->arch.pio.in)
4471                         vcpu->arch.pio.count = 0;
4472                 else
4473                         writeback = false;
4474                 r = EMULATE_DO_MMIO;
4475         } else if (vcpu->mmio_needed) {
4476                 if (!vcpu->mmio_is_write)
4477                         writeback = false;
4478                 r = EMULATE_DO_MMIO;
4479         } else if (r == EMULATION_RESTART)
4480                 goto restart;
4481         else
4482                 r = EMULATE_DONE;
4483
4484         if (writeback) {
4485                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4486                 kvm_set_rflags(vcpu, ctxt->eflags);
4487                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4488                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4489                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4490                 kvm_rip_write(vcpu, ctxt->eip);
4491         } else
4492                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4493
4494         return r;
4495 }
4496 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4497
4498 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4499 {
4500         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4501         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4502                                             size, port, &val, 1);
4503         /* do not return to emulator after return from userspace */
4504         vcpu->arch.pio.count = 0;
4505         return ret;
4506 }
4507 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4508
4509 static void tsc_bad(void *info)
4510 {
4511         __this_cpu_write(cpu_tsc_khz, 0);
4512 }
4513
4514 static void tsc_khz_changed(void *data)
4515 {
4516         struct cpufreq_freqs *freq = data;
4517         unsigned long khz = 0;
4518
4519         if (data)
4520                 khz = freq->new;
4521         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4522                 khz = cpufreq_quick_get(raw_smp_processor_id());
4523         if (!khz)
4524                 khz = tsc_khz;
4525         __this_cpu_write(cpu_tsc_khz, khz);
4526 }
4527
4528 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4529                                      void *data)
4530 {
4531         struct cpufreq_freqs *freq = data;
4532         struct kvm *kvm;
4533         struct kvm_vcpu *vcpu;
4534         int i, send_ipi = 0;
4535
4536         /*
4537          * We allow guests to temporarily run on slowing clocks,
4538          * provided we notify them after, or to run on accelerating
4539          * clocks, provided we notify them before.  Thus time never
4540          * goes backwards.
4541          *
4542          * However, we have a problem.  We can't atomically update
4543          * the frequency of a given CPU from this function; it is
4544          * merely a notifier, which can be called from any CPU.
4545          * Changing the TSC frequency at arbitrary points in time
4546          * requires a recomputation of local variables related to
4547          * the TSC for each VCPU.  We must flag these local variables
4548          * to be updated and be sure the update takes place with the
4549          * new frequency before any guests proceed.
4550          *
4551          * Unfortunately, the combination of hotplug CPU and frequency
4552          * change creates an intractable locking scenario; the order
4553          * of when these callouts happen is undefined with respect to
4554          * CPU hotplug, and they can race with each other.  As such,
4555          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4556          * undefined; you can actually have a CPU frequency change take
4557          * place in between the computation of X and the setting of the
4558          * variable.  To protect against this problem, all updates of
4559          * the per_cpu tsc_khz variable are done in an interrupt
4560          * protected IPI, and all callers wishing to update the value
4561          * must wait for a synchronous IPI to complete (which is trivial
4562          * if the caller is on the CPU already).  This establishes the
4563          * necessary total order on variable updates.
4564          *
4565          * Note that because a guest time update may take place
4566          * anytime after the setting of the VCPU's request bit, the
4567          * correct TSC value must be set before the request.  However,
4568          * to ensure the update actually makes it to any guest which
4569          * starts running in hardware virtualization between the set
4570          * and the acquisition of the spinlock, we must also ping the
4571          * CPU after setting the request bit.
4572          *
4573          */
4574
4575         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4576                 return 0;
4577         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4578                 return 0;
4579
4580         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4581
4582         raw_spin_lock(&kvm_lock);
4583         list_for_each_entry(kvm, &vm_list, vm_list) {
4584                 kvm_for_each_vcpu(i, vcpu, kvm) {
4585                         if (vcpu->cpu != freq->cpu)
4586                                 continue;
4587                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4588                         if (vcpu->cpu != smp_processor_id())
4589                                 send_ipi = 1;
4590                 }
4591         }
4592         raw_spin_unlock(&kvm_lock);
4593
4594         if (freq->old < freq->new && send_ipi) {
4595                 /*
4596                  * We upscale the frequency.  Must make the guest
4597                  * doesn't see old kvmclock values while running with
4598                  * the new frequency, otherwise we risk the guest sees
4599                  * time go backwards.
4600                  *
4601                  * In case we update the frequency for another cpu
4602                  * (which might be in guest context) send an interrupt
4603                  * to kick the cpu out of guest context.  Next time
4604                  * guest context is entered kvmclock will be updated,
4605                  * so the guest will not see stale values.
4606                  */
4607                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4608         }
4609         return 0;
4610 }
4611
4612 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4613         .notifier_call  = kvmclock_cpufreq_notifier
4614 };
4615
4616 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4617                                         unsigned long action, void *hcpu)
4618 {
4619         unsigned int cpu = (unsigned long)hcpu;
4620
4621         switch (action) {
4622                 case CPU_ONLINE:
4623                 case CPU_DOWN_FAILED:
4624                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4625                         break;
4626                 case CPU_DOWN_PREPARE:
4627                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4628                         break;
4629         }
4630         return NOTIFY_OK;
4631 }
4632
4633 static struct notifier_block kvmclock_cpu_notifier_block = {
4634         .notifier_call  = kvmclock_cpu_notifier,
4635         .priority = -INT_MAX
4636 };
4637
4638 static void kvm_timer_init(void)
4639 {
4640         int cpu;
4641
4642         max_tsc_khz = tsc_khz;
4643         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4644         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4645 #ifdef CONFIG_CPU_FREQ
4646                 struct cpufreq_policy policy;
4647                 memset(&policy, 0, sizeof(policy));
4648                 cpu = get_cpu();
4649                 cpufreq_get_policy(&policy, cpu);
4650                 if (policy.cpuinfo.max_freq)
4651                         max_tsc_khz = policy.cpuinfo.max_freq;
4652                 put_cpu();
4653 #endif
4654                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4655                                           CPUFREQ_TRANSITION_NOTIFIER);
4656         }
4657         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4658         for_each_online_cpu(cpu)
4659                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4660 }
4661
4662 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4663
4664 int kvm_is_in_guest(void)
4665 {
4666         return __this_cpu_read(current_vcpu) != NULL;
4667 }
4668
4669 static int kvm_is_user_mode(void)
4670 {
4671         int user_mode = 3;
4672
4673         if (__this_cpu_read(current_vcpu))
4674                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
4675
4676         return user_mode != 0;
4677 }
4678
4679 static unsigned long kvm_get_guest_ip(void)
4680 {
4681         unsigned long ip = 0;
4682
4683         if (__this_cpu_read(current_vcpu))
4684                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
4685
4686         return ip;
4687 }
4688
4689 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4690         .is_in_guest            = kvm_is_in_guest,
4691         .is_user_mode           = kvm_is_user_mode,
4692         .get_guest_ip           = kvm_get_guest_ip,
4693 };
4694
4695 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4696 {
4697         __this_cpu_write(current_vcpu, vcpu);
4698 }
4699 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4700
4701 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4702 {
4703         __this_cpu_write(current_vcpu, NULL);
4704 }
4705 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4706
4707 static void kvm_set_mmio_spte_mask(void)
4708 {
4709         u64 mask;
4710         int maxphyaddr = boot_cpu_data.x86_phys_bits;
4711
4712         /*
4713          * Set the reserved bits and the present bit of an paging-structure
4714          * entry to generate page fault with PFER.RSV = 1.
4715          */
4716         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
4717         mask |= 1ull;
4718
4719 #ifdef CONFIG_X86_64
4720         /*
4721          * If reserved bit is not supported, clear the present bit to disable
4722          * mmio page fault.
4723          */
4724         if (maxphyaddr == 52)
4725                 mask &= ~1ull;
4726 #endif
4727
4728         kvm_mmu_set_mmio_spte_mask(mask);
4729 }
4730
4731 int kvm_arch_init(void *opaque)
4732 {
4733         int r;
4734         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4735
4736         if (kvm_x86_ops) {
4737                 printk(KERN_ERR "kvm: already loaded the other module\n");
4738                 r = -EEXIST;
4739                 goto out;
4740         }
4741
4742         if (!ops->cpu_has_kvm_support()) {
4743                 printk(KERN_ERR "kvm: no hardware support\n");
4744                 r = -EOPNOTSUPP;
4745                 goto out;
4746         }
4747         if (ops->disabled_by_bios()) {
4748                 printk(KERN_ERR "kvm: disabled by bios\n");
4749                 r = -EOPNOTSUPP;
4750                 goto out;
4751         }
4752
4753         r = kvm_mmu_module_init();
4754         if (r)
4755                 goto out;
4756
4757         kvm_set_mmio_spte_mask();
4758         kvm_init_msr_list();
4759
4760         kvm_x86_ops = ops;
4761         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4762                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4763
4764         kvm_timer_init();
4765
4766         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4767
4768         if (cpu_has_xsave)
4769                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4770
4771         return 0;
4772
4773 out:
4774         return r;
4775 }
4776
4777 void kvm_arch_exit(void)
4778 {
4779         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4780
4781         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4782                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4783                                             CPUFREQ_TRANSITION_NOTIFIER);
4784         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4785         kvm_x86_ops = NULL;
4786         kvm_mmu_module_exit();
4787 }
4788
4789 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4790 {
4791         ++vcpu->stat.halt_exits;
4792         if (irqchip_in_kernel(vcpu->kvm)) {
4793                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4794                 return 1;
4795         } else {
4796                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4797                 return 0;
4798         }
4799 }
4800 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4801
4802 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4803 {
4804         u64 param, ingpa, outgpa, ret;
4805         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4806         bool fast, longmode;
4807         int cs_db, cs_l;
4808
4809         /*
4810          * hypercall generates UD from non zero cpl and real mode
4811          * per HYPER-V spec
4812          */
4813         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4814                 kvm_queue_exception(vcpu, UD_VECTOR);
4815                 return 0;
4816         }
4817
4818         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4819         longmode = is_long_mode(vcpu) && cs_l == 1;
4820
4821         if (!longmode) {
4822                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4823                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4824                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4825                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4826                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4827                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4828         }
4829 #ifdef CONFIG_X86_64
4830         else {
4831                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4832                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4833                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4834         }
4835 #endif
4836
4837         code = param & 0xffff;
4838         fast = (param >> 16) & 0x1;
4839         rep_cnt = (param >> 32) & 0xfff;
4840         rep_idx = (param >> 48) & 0xfff;
4841
4842         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4843
4844         switch (code) {
4845         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4846                 kvm_vcpu_on_spin(vcpu);
4847                 break;
4848         default:
4849                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4850                 break;
4851         }
4852
4853         ret = res | (((u64)rep_done & 0xfff) << 32);
4854         if (longmode) {
4855                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4856         } else {
4857                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4858                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4859         }
4860
4861         return 1;
4862 }
4863
4864 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4865 {
4866         unsigned long nr, a0, a1, a2, a3, ret;
4867         int r = 1;
4868
4869         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4870                 return kvm_hv_hypercall(vcpu);
4871
4872         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4873         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4874         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4875         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4876         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4877
4878         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4879
4880         if (!is_long_mode(vcpu)) {
4881                 nr &= 0xFFFFFFFF;
4882                 a0 &= 0xFFFFFFFF;
4883                 a1 &= 0xFFFFFFFF;
4884                 a2 &= 0xFFFFFFFF;
4885                 a3 &= 0xFFFFFFFF;
4886         }
4887
4888         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4889                 ret = -KVM_EPERM;
4890                 goto out;
4891         }
4892
4893         switch (nr) {
4894         case KVM_HC_VAPIC_POLL_IRQ:
4895                 ret = 0;
4896                 break;
4897         default:
4898                 ret = -KVM_ENOSYS;
4899                 break;
4900         }
4901 out:
4902         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4903         ++vcpu->stat.hypercalls;
4904         return r;
4905 }
4906 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4907
4908 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
4909 {
4910         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4911         char instruction[3];
4912         unsigned long rip = kvm_rip_read(vcpu);
4913
4914         /*
4915          * Blow out the MMU to ensure that no other VCPU has an active mapping
4916          * to ensure that the updated hypercall appears atomically across all
4917          * VCPUs.
4918          */
4919         kvm_mmu_zap_all(vcpu->kvm);
4920
4921         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4922
4923         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
4924 }
4925
4926 /*
4927  * Check if userspace requested an interrupt window, and that the
4928  * interrupt window is open.
4929  *
4930  * No need to exit to userspace if we already have an interrupt queued.
4931  */
4932 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4933 {
4934         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4935                 vcpu->run->request_interrupt_window &&
4936                 kvm_arch_interrupt_allowed(vcpu));
4937 }
4938
4939 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4940 {
4941         struct kvm_run *kvm_run = vcpu->run;
4942
4943         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4944         kvm_run->cr8 = kvm_get_cr8(vcpu);
4945         kvm_run->apic_base = kvm_get_apic_base(vcpu);
4946         if (irqchip_in_kernel(vcpu->kvm))
4947                 kvm_run->ready_for_interrupt_injection = 1;
4948         else
4949                 kvm_run->ready_for_interrupt_injection =
4950                         kvm_arch_interrupt_allowed(vcpu) &&
4951                         !kvm_cpu_has_interrupt(vcpu) &&
4952                         !kvm_event_needs_reinjection(vcpu);
4953 }
4954
4955 static void vapic_enter(struct kvm_vcpu *vcpu)
4956 {
4957         struct kvm_lapic *apic = vcpu->arch.apic;
4958         struct page *page;
4959
4960         if (!apic || !apic->vapic_addr)
4961                 return;
4962
4963         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4964
4965         vcpu->arch.apic->vapic_page = page;
4966 }
4967
4968 static void vapic_exit(struct kvm_vcpu *vcpu)
4969 {
4970         struct kvm_lapic *apic = vcpu->arch.apic;
4971         int idx;
4972
4973         if (!apic || !apic->vapic_addr)
4974                 return;
4975
4976         idx = srcu_read_lock(&vcpu->kvm->srcu);
4977         kvm_release_page_dirty(apic->vapic_page);
4978         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4979         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4980 }
4981
4982 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
4983 {
4984         int max_irr, tpr;
4985
4986         if (!kvm_x86_ops->update_cr8_intercept)
4987                 return;
4988
4989         if (!vcpu->arch.apic)
4990                 return;
4991
4992         if (!vcpu->arch.apic->vapic_addr)
4993                 max_irr = kvm_lapic_find_highest_irr(vcpu);
4994         else
4995                 max_irr = -1;
4996
4997         if (max_irr != -1)
4998                 max_irr >>= 4;
4999
5000         tpr = kvm_lapic_get_cr8(vcpu);
5001
5002         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5003 }
5004
5005 static void inject_pending_event(struct kvm_vcpu *vcpu)
5006 {
5007         /* try to reinject previous events if any */
5008         if (vcpu->arch.exception.pending) {
5009                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5010                                         vcpu->arch.exception.has_error_code,
5011                                         vcpu->arch.exception.error_code);
5012                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5013                                           vcpu->arch.exception.has_error_code,
5014                                           vcpu->arch.exception.error_code,
5015                                           vcpu->arch.exception.reinject);
5016                 return;
5017         }
5018
5019         if (vcpu->arch.nmi_injected) {
5020                 kvm_x86_ops->set_nmi(vcpu);
5021                 return;
5022         }
5023
5024         if (vcpu->arch.interrupt.pending) {
5025                 kvm_x86_ops->set_irq(vcpu);
5026                 return;
5027         }
5028
5029         /* try to inject new event if pending */
5030         if (vcpu->arch.nmi_pending) {
5031                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5032                         --vcpu->arch.nmi_pending;
5033                         vcpu->arch.nmi_injected = true;
5034                         kvm_x86_ops->set_nmi(vcpu);
5035                 }
5036         } else if (kvm_cpu_has_interrupt(vcpu)) {
5037                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5038                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5039                                             false);
5040                         kvm_x86_ops->set_irq(vcpu);
5041                 }
5042         }
5043 }
5044
5045 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5046 {
5047         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5048                         !vcpu->guest_xcr0_loaded) {
5049                 /* kvm_set_xcr() also depends on this */
5050                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5051                 vcpu->guest_xcr0_loaded = 1;
5052         }
5053 }
5054
5055 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5056 {
5057         if (vcpu->guest_xcr0_loaded) {
5058                 if (vcpu->arch.xcr0 != host_xcr0)
5059                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5060                 vcpu->guest_xcr0_loaded = 0;
5061         }
5062 }
5063
5064 static void process_nmi(struct kvm_vcpu *vcpu)
5065 {
5066         unsigned limit = 2;
5067
5068         /*
5069          * x86 is limited to one NMI running, and one NMI pending after it.
5070          * If an NMI is already in progress, limit further NMIs to just one.
5071          * Otherwise, allow two (and we'll inject the first one immediately).
5072          */
5073         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5074                 limit = 1;
5075
5076         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5077         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5078         kvm_make_request(KVM_REQ_EVENT, vcpu);
5079 }
5080
5081 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5082 {
5083         int r;
5084         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5085                 vcpu->run->request_interrupt_window;
5086         bool req_immediate_exit = 0;
5087
5088         if (vcpu->requests) {
5089                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5090                         kvm_mmu_unload(vcpu);
5091                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5092                         __kvm_migrate_timers(vcpu);
5093                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5094                         r = kvm_guest_time_update(vcpu);
5095                         if (unlikely(r))
5096                                 goto out;
5097                 }
5098                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5099                         kvm_mmu_sync_roots(vcpu);
5100                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5101                         kvm_x86_ops->tlb_flush(vcpu);
5102                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5103                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5104                         r = 0;
5105                         goto out;
5106                 }
5107                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5108                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5109                         r = 0;
5110                         goto out;
5111                 }
5112                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5113                         vcpu->fpu_active = 0;
5114                         kvm_x86_ops->fpu_deactivate(vcpu);
5115                 }
5116                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5117                         /* Page is swapped out. Do synthetic halt */
5118                         vcpu->arch.apf.halted = true;
5119                         r = 1;
5120                         goto out;
5121                 }
5122                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5123                         record_steal_time(vcpu);
5124                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5125                         process_nmi(vcpu);
5126                 req_immediate_exit =
5127                         kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5128                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5129                         kvm_handle_pmu_event(vcpu);
5130                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5131                         kvm_deliver_pmi(vcpu);
5132         }
5133
5134         r = kvm_mmu_reload(vcpu);
5135         if (unlikely(r))
5136                 goto out;
5137
5138         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5139                 inject_pending_event(vcpu);
5140
5141                 /* enable NMI/IRQ window open exits if needed */
5142                 if (vcpu->arch.nmi_pending)
5143                         kvm_x86_ops->enable_nmi_window(vcpu);
5144                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5145                         kvm_x86_ops->enable_irq_window(vcpu);
5146
5147                 if (kvm_lapic_enabled(vcpu)) {
5148                         update_cr8_intercept(vcpu);
5149                         kvm_lapic_sync_to_vapic(vcpu);
5150                 }
5151         }
5152
5153         preempt_disable();
5154
5155         kvm_x86_ops->prepare_guest_switch(vcpu);
5156         if (vcpu->fpu_active)
5157                 kvm_load_guest_fpu(vcpu);
5158         kvm_load_guest_xcr0(vcpu);
5159
5160         vcpu->mode = IN_GUEST_MODE;
5161
5162         /* We should set ->mode before check ->requests,
5163          * see the comment in make_all_cpus_request.
5164          */
5165         smp_mb();
5166
5167         local_irq_disable();
5168
5169         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5170             || need_resched() || signal_pending(current)) {
5171                 vcpu->mode = OUTSIDE_GUEST_MODE;
5172                 smp_wmb();
5173                 local_irq_enable();
5174                 preempt_enable();
5175                 kvm_x86_ops->cancel_injection(vcpu);
5176                 r = 1;
5177                 goto out;
5178         }
5179
5180         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5181
5182         if (req_immediate_exit)
5183                 smp_send_reschedule(vcpu->cpu);
5184
5185         kvm_guest_enter();
5186
5187         if (unlikely(vcpu->arch.switch_db_regs)) {
5188                 set_debugreg(0, 7);
5189                 set_debugreg(vcpu->arch.eff_db[0], 0);
5190                 set_debugreg(vcpu->arch.eff_db[1], 1);
5191                 set_debugreg(vcpu->arch.eff_db[2], 2);
5192                 set_debugreg(vcpu->arch.eff_db[3], 3);
5193         }
5194
5195         trace_kvm_entry(vcpu->vcpu_id);
5196         kvm_x86_ops->run(vcpu);
5197
5198         /*
5199          * If the guest has used debug registers, at least dr7
5200          * will be disabled while returning to the host.
5201          * If we don't have active breakpoints in the host, we don't
5202          * care about the messed up debug address registers. But if
5203          * we have some of them active, restore the old state.
5204          */
5205         if (hw_breakpoint_active())
5206                 hw_breakpoint_restore();
5207
5208         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5209
5210         vcpu->mode = OUTSIDE_GUEST_MODE;
5211         smp_wmb();
5212         local_irq_enable();
5213
5214         ++vcpu->stat.exits;
5215
5216         /*
5217          * We must have an instruction between local_irq_enable() and
5218          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5219          * the interrupt shadow.  The stat.exits increment will do nicely.
5220          * But we need to prevent reordering, hence this barrier():
5221          */
5222         barrier();
5223
5224         kvm_guest_exit();
5225
5226         preempt_enable();
5227
5228         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5229
5230         /*
5231          * Profile KVM exit RIPs:
5232          */
5233         if (unlikely(prof_on == KVM_PROFILING)) {
5234                 unsigned long rip = kvm_rip_read(vcpu);
5235                 profile_hit(KVM_PROFILING, (void *)rip);
5236         }
5237
5238
5239         kvm_lapic_sync_from_vapic(vcpu);
5240
5241         r = kvm_x86_ops->handle_exit(vcpu);
5242 out:
5243         return r;
5244 }
5245
5246
5247 static int __vcpu_run(struct kvm_vcpu *vcpu)
5248 {
5249         int r;
5250         struct kvm *kvm = vcpu->kvm;
5251
5252         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5253                 pr_debug("vcpu %d received sipi with vector # %x\n",
5254                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5255                 kvm_lapic_reset(vcpu);
5256                 r = kvm_arch_vcpu_reset(vcpu);
5257                 if (r)
5258                         return r;
5259                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5260         }
5261
5262         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5263         vapic_enter(vcpu);
5264
5265         r = 1;
5266         while (r > 0) {
5267                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5268                     !vcpu->arch.apf.halted)
5269                         r = vcpu_enter_guest(vcpu);
5270                 else {
5271                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5272                         kvm_vcpu_block(vcpu);
5273                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5274                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5275                         {
5276                                 switch(vcpu->arch.mp_state) {
5277                                 case KVM_MP_STATE_HALTED:
5278                                         vcpu->arch.mp_state =
5279                                                 KVM_MP_STATE_RUNNABLE;
5280                                 case KVM_MP_STATE_RUNNABLE:
5281                                         vcpu->arch.apf.halted = false;
5282                                         break;
5283                                 case KVM_MP_STATE_SIPI_RECEIVED:
5284                                 default:
5285                                         r = -EINTR;
5286                                         break;
5287                                 }
5288                         }
5289                 }
5290
5291                 if (r <= 0)
5292                         break;
5293
5294                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5295                 if (kvm_cpu_has_pending_timer(vcpu))
5296                         kvm_inject_pending_timer_irqs(vcpu);
5297
5298                 if (dm_request_for_irq_injection(vcpu)) {
5299                         r = -EINTR;
5300                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5301                         ++vcpu->stat.request_irq_exits;
5302                 }
5303
5304                 kvm_check_async_pf_completion(vcpu);
5305
5306                 if (signal_pending(current)) {
5307                         r = -EINTR;
5308                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5309                         ++vcpu->stat.signal_exits;
5310                 }
5311                 if (need_resched()) {
5312                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5313                         kvm_resched(vcpu);
5314                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5315                 }
5316         }
5317
5318         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5319
5320         vapic_exit(vcpu);
5321
5322         return r;
5323 }
5324
5325 static int complete_mmio(struct kvm_vcpu *vcpu)
5326 {
5327         struct kvm_run *run = vcpu->run;
5328         int r;
5329
5330         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5331                 return 1;
5332
5333         if (vcpu->mmio_needed) {
5334                 vcpu->mmio_needed = 0;
5335                 if (!vcpu->mmio_is_write)
5336                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5337                                run->mmio.data, 8);
5338                 vcpu->mmio_index += 8;
5339                 if (vcpu->mmio_index < vcpu->mmio_size) {
5340                         run->exit_reason = KVM_EXIT_MMIO;
5341                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5342                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5343                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5344                         run->mmio.is_write = vcpu->mmio_is_write;
5345                         vcpu->mmio_needed = 1;
5346                         return 0;
5347                 }
5348                 if (vcpu->mmio_is_write)
5349                         return 1;
5350                 vcpu->mmio_read_completed = 1;
5351         }
5352         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5353         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5354         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5355         if (r != EMULATE_DONE)
5356                 return 0;
5357         return 1;
5358 }
5359
5360 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5361 {
5362         int r;
5363         sigset_t sigsaved;
5364
5365         if (!tsk_used_math(current) && init_fpu(current))
5366                 return -ENOMEM;
5367
5368         if (vcpu->sigset_active)
5369                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5370
5371         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5372                 kvm_vcpu_block(vcpu);
5373                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5374                 r = -EAGAIN;
5375                 goto out;
5376         }
5377
5378         /* re-sync apic's tpr */
5379         if (!irqchip_in_kernel(vcpu->kvm)) {
5380                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5381                         r = -EINVAL;
5382                         goto out;
5383                 }
5384         }
5385
5386         r = complete_mmio(vcpu);
5387         if (r <= 0)
5388                 goto out;
5389
5390         r = __vcpu_run(vcpu);
5391
5392 out:
5393         post_kvm_run_save(vcpu);
5394         if (vcpu->sigset_active)
5395                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5396
5397         return r;
5398 }
5399
5400 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5401 {
5402         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5403                 /*
5404                  * We are here if userspace calls get_regs() in the middle of
5405                  * instruction emulation. Registers state needs to be copied
5406                  * back from emulation context to vcpu. Usrapace shouldn't do
5407                  * that usually, but some bad designed PV devices (vmware
5408                  * backdoor interface) need this to work
5409                  */
5410                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5411                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5412                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5413         }
5414         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5415         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5416         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5417         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5418         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5419         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5420         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5421         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5422 #ifdef CONFIG_X86_64
5423         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5424         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5425         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5426         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5427         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5428         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5429         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5430         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5431 #endif
5432
5433         regs->rip = kvm_rip_read(vcpu);
5434         regs->rflags = kvm_get_rflags(vcpu);
5435
5436         return 0;
5437 }
5438
5439 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5440 {
5441         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5442         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5443
5444         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5445         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5446         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5447         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5448         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5449         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5450         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5451         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5452 #ifdef CONFIG_X86_64
5453         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5454         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5455         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5456         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5457         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5458         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5459         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5460         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5461 #endif
5462
5463         kvm_rip_write(vcpu, regs->rip);
5464         kvm_set_rflags(vcpu, regs->rflags);
5465
5466         vcpu->arch.exception.pending = false;
5467
5468         kvm_make_request(KVM_REQ_EVENT, vcpu);
5469
5470         return 0;
5471 }
5472
5473 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5474 {
5475         struct kvm_segment cs;
5476
5477         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5478         *db = cs.db;
5479         *l = cs.l;
5480 }
5481 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5482
5483 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5484                                   struct kvm_sregs *sregs)
5485 {
5486         struct desc_ptr dt;
5487
5488         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5489         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5490         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5491         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5492         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5493         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5494
5495         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5496         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5497
5498         kvm_x86_ops->get_idt(vcpu, &dt);
5499         sregs->idt.limit = dt.size;
5500         sregs->idt.base = dt.address;
5501         kvm_x86_ops->get_gdt(vcpu, &dt);
5502         sregs->gdt.limit = dt.size;
5503         sregs->gdt.base = dt.address;
5504
5505         sregs->cr0 = kvm_read_cr0(vcpu);
5506         sregs->cr2 = vcpu->arch.cr2;
5507         sregs->cr3 = kvm_read_cr3(vcpu);
5508         sregs->cr4 = kvm_read_cr4(vcpu);
5509         sregs->cr8 = kvm_get_cr8(vcpu);
5510         sregs->efer = vcpu->arch.efer;
5511         sregs->apic_base = kvm_get_apic_base(vcpu);
5512
5513         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5514
5515         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5516                 set_bit(vcpu->arch.interrupt.nr,
5517                         (unsigned long *)sregs->interrupt_bitmap);
5518
5519         return 0;
5520 }
5521
5522 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5523                                     struct kvm_mp_state *mp_state)
5524 {
5525         mp_state->mp_state = vcpu->arch.mp_state;
5526         return 0;
5527 }
5528
5529 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5530                                     struct kvm_mp_state *mp_state)
5531 {
5532         vcpu->arch.mp_state = mp_state->mp_state;
5533         kvm_make_request(KVM_REQ_EVENT, vcpu);
5534         return 0;
5535 }
5536
5537 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5538                     bool has_error_code, u32 error_code)
5539 {
5540         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5541         int ret;
5542
5543         init_emulate_ctxt(vcpu);
5544
5545         ret = emulator_task_switch(ctxt, tss_selector, reason,
5546                                    has_error_code, error_code);
5547
5548         if (ret)
5549                 return EMULATE_FAIL;
5550
5551         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5552         kvm_rip_write(vcpu, ctxt->eip);
5553         kvm_set_rflags(vcpu, ctxt->eflags);
5554         kvm_make_request(KVM_REQ_EVENT, vcpu);
5555         return EMULATE_DONE;
5556 }
5557 EXPORT_SYMBOL_GPL(kvm_task_switch);
5558
5559 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5560                                   struct kvm_sregs *sregs)
5561 {
5562         int mmu_reset_needed = 0;
5563         int pending_vec, max_bits, idx;
5564         struct desc_ptr dt;
5565
5566         dt.size = sregs->idt.limit;
5567         dt.address = sregs->idt.base;
5568         kvm_x86_ops->set_idt(vcpu, &dt);
5569         dt.size = sregs->gdt.limit;
5570         dt.address = sregs->gdt.base;
5571         kvm_x86_ops->set_gdt(vcpu, &dt);
5572
5573         vcpu->arch.cr2 = sregs->cr2;
5574         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5575         vcpu->arch.cr3 = sregs->cr3;
5576         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5577
5578         kvm_set_cr8(vcpu, sregs->cr8);
5579
5580         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5581         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5582         kvm_set_apic_base(vcpu, sregs->apic_base);
5583
5584         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5585         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5586         vcpu->arch.cr0 = sregs->cr0;
5587
5588         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5589         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5590         if (sregs->cr4 & X86_CR4_OSXSAVE)
5591                 kvm_update_cpuid(vcpu);
5592
5593         idx = srcu_read_lock(&vcpu->kvm->srcu);
5594         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5595                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5596                 mmu_reset_needed = 1;
5597         }
5598         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5599
5600         if (mmu_reset_needed)
5601                 kvm_mmu_reset_context(vcpu);
5602
5603         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5604         pending_vec = find_first_bit(
5605                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5606         if (pending_vec < max_bits) {
5607                 kvm_queue_interrupt(vcpu, pending_vec, false);
5608                 pr_debug("Set back pending irq %d\n", pending_vec);
5609         }
5610
5611         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5612         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5613         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5614         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5615         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5616         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5617
5618         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5619         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5620
5621         update_cr8_intercept(vcpu);
5622
5623         /* Older userspace won't unhalt the vcpu on reset. */
5624         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5625             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5626             !is_protmode(vcpu))
5627                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5628
5629         kvm_make_request(KVM_REQ_EVENT, vcpu);
5630
5631         return 0;
5632 }
5633
5634 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5635                                         struct kvm_guest_debug *dbg)
5636 {
5637         unsigned long rflags;
5638         int i, r;
5639
5640         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5641                 r = -EBUSY;
5642                 if (vcpu->arch.exception.pending)
5643                         goto out;
5644                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5645                         kvm_queue_exception(vcpu, DB_VECTOR);
5646                 else
5647                         kvm_queue_exception(vcpu, BP_VECTOR);
5648         }
5649
5650         /*
5651          * Read rflags as long as potentially injected trace flags are still
5652          * filtered out.
5653          */
5654         rflags = kvm_get_rflags(vcpu);
5655
5656         vcpu->guest_debug = dbg->control;
5657         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5658                 vcpu->guest_debug = 0;
5659
5660         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5661                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5662                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5663                 vcpu->arch.switch_db_regs =
5664                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5665         } else {
5666                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5667                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5668                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5669         }
5670
5671         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5672                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5673                         get_segment_base(vcpu, VCPU_SREG_CS);
5674
5675         /*
5676          * Trigger an rflags update that will inject or remove the trace
5677          * flags.
5678          */
5679         kvm_set_rflags(vcpu, rflags);
5680
5681         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5682
5683         r = 0;
5684
5685 out:
5686
5687         return r;
5688 }
5689
5690 /*
5691  * Translate a guest virtual address to a guest physical address.
5692  */
5693 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5694                                     struct kvm_translation *tr)
5695 {
5696         unsigned long vaddr = tr->linear_address;
5697         gpa_t gpa;
5698         int idx;
5699
5700         idx = srcu_read_lock(&vcpu->kvm->srcu);
5701         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5702         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5703         tr->physical_address = gpa;
5704         tr->valid = gpa != UNMAPPED_GVA;
5705         tr->writeable = 1;
5706         tr->usermode = 0;
5707
5708         return 0;
5709 }
5710
5711 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5712 {
5713         struct i387_fxsave_struct *fxsave =
5714                         &vcpu->arch.guest_fpu.state->fxsave;
5715
5716         memcpy(fpu->fpr, fxsave->st_space, 128);
5717         fpu->fcw = fxsave->cwd;
5718         fpu->fsw = fxsave->swd;
5719         fpu->ftwx = fxsave->twd;
5720         fpu->last_opcode = fxsave->fop;
5721         fpu->last_ip = fxsave->rip;
5722         fpu->last_dp = fxsave->rdp;
5723         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5724
5725         return 0;
5726 }
5727
5728 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5729 {
5730         struct i387_fxsave_struct *fxsave =
5731                         &vcpu->arch.guest_fpu.state->fxsave;
5732
5733         memcpy(fxsave->st_space, fpu->fpr, 128);
5734         fxsave->cwd = fpu->fcw;
5735         fxsave->swd = fpu->fsw;
5736         fxsave->twd = fpu->ftwx;
5737         fxsave->fop = fpu->last_opcode;
5738         fxsave->rip = fpu->last_ip;
5739         fxsave->rdp = fpu->last_dp;
5740         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5741
5742         return 0;
5743 }
5744
5745 int fx_init(struct kvm_vcpu *vcpu)
5746 {
5747         int err;
5748
5749         err = fpu_alloc(&vcpu->arch.guest_fpu);
5750         if (err)
5751                 return err;
5752
5753         fpu_finit(&vcpu->arch.guest_fpu);
5754
5755         /*
5756          * Ensure guest xcr0 is valid for loading
5757          */
5758         vcpu->arch.xcr0 = XSTATE_FP;
5759
5760         vcpu->arch.cr0 |= X86_CR0_ET;
5761
5762         return 0;
5763 }
5764 EXPORT_SYMBOL_GPL(fx_init);
5765
5766 static void fx_free(struct kvm_vcpu *vcpu)
5767 {
5768         fpu_free(&vcpu->arch.guest_fpu);
5769 }
5770
5771 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5772 {
5773         if (vcpu->guest_fpu_loaded)
5774                 return;
5775
5776         /*
5777          * Restore all possible states in the guest,
5778          * and assume host would use all available bits.
5779          * Guest xcr0 would be loaded later.
5780          */
5781         kvm_put_guest_xcr0(vcpu);
5782         vcpu->guest_fpu_loaded = 1;
5783         unlazy_fpu(current);
5784         fpu_restore_checking(&vcpu->arch.guest_fpu);
5785         trace_kvm_fpu(1);
5786 }
5787
5788 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5789 {
5790         kvm_put_guest_xcr0(vcpu);
5791
5792         if (!vcpu->guest_fpu_loaded)
5793                 return;
5794
5795         vcpu->guest_fpu_loaded = 0;
5796         fpu_save_init(&vcpu->arch.guest_fpu);
5797         ++vcpu->stat.fpu_reload;
5798         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5799         trace_kvm_fpu(0);
5800 }
5801
5802 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5803 {
5804         kvmclock_reset(vcpu);
5805
5806         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5807         fx_free(vcpu);
5808         kvm_x86_ops->vcpu_free(vcpu);
5809 }
5810
5811 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5812                                                 unsigned int id)
5813 {
5814         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5815                 printk_once(KERN_WARNING
5816                 "kvm: SMP vm created on host with unstable TSC; "
5817                 "guest TSC will not be reliable\n");
5818         return kvm_x86_ops->vcpu_create(kvm, id);
5819 }
5820
5821 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5822 {
5823         int r;
5824
5825         vcpu->arch.mtrr_state.have_fixed = 1;
5826         vcpu_load(vcpu);
5827         r = kvm_arch_vcpu_reset(vcpu);
5828         if (r == 0)
5829                 r = kvm_mmu_setup(vcpu);
5830         vcpu_put(vcpu);
5831
5832         return r;
5833 }
5834
5835 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5836 {
5837         vcpu->arch.apf.msr_val = 0;
5838
5839         vcpu_load(vcpu);
5840         kvm_mmu_unload(vcpu);
5841         vcpu_put(vcpu);
5842
5843         fx_free(vcpu);
5844         kvm_x86_ops->vcpu_free(vcpu);
5845 }
5846
5847 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5848 {
5849         atomic_set(&vcpu->arch.nmi_queued, 0);
5850         vcpu->arch.nmi_pending = 0;
5851         vcpu->arch.nmi_injected = false;
5852
5853         vcpu->arch.switch_db_regs = 0;
5854         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5855         vcpu->arch.dr6 = DR6_FIXED_1;
5856         vcpu->arch.dr7 = DR7_FIXED_1;
5857
5858         kvm_make_request(KVM_REQ_EVENT, vcpu);
5859         vcpu->arch.apf.msr_val = 0;
5860         vcpu->arch.st.msr_val = 0;
5861
5862         kvmclock_reset(vcpu);
5863
5864         kvm_clear_async_pf_completion_queue(vcpu);
5865         kvm_async_pf_hash_reset(vcpu);
5866         vcpu->arch.apf.halted = false;
5867
5868         kvm_pmu_reset(vcpu);
5869
5870         return kvm_x86_ops->vcpu_reset(vcpu);
5871 }
5872
5873 int kvm_arch_hardware_enable(void *garbage)
5874 {
5875         struct kvm *kvm;
5876         struct kvm_vcpu *vcpu;
5877         int i;
5878
5879         kvm_shared_msr_cpu_online();
5880         list_for_each_entry(kvm, &vm_list, vm_list)
5881                 kvm_for_each_vcpu(i, vcpu, kvm)
5882                         if (vcpu->cpu == smp_processor_id())
5883                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5884         return kvm_x86_ops->hardware_enable(garbage);
5885 }
5886
5887 void kvm_arch_hardware_disable(void *garbage)
5888 {
5889         kvm_x86_ops->hardware_disable(garbage);
5890         drop_user_return_notifiers(garbage);
5891 }
5892
5893 int kvm_arch_hardware_setup(void)
5894 {
5895         return kvm_x86_ops->hardware_setup();
5896 }
5897
5898 void kvm_arch_hardware_unsetup(void)
5899 {
5900         kvm_x86_ops->hardware_unsetup();
5901 }
5902
5903 void kvm_arch_check_processor_compat(void *rtn)
5904 {
5905         kvm_x86_ops->check_processor_compatibility(rtn);
5906 }
5907
5908 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5909 {
5910         struct page *page;
5911         struct kvm *kvm;
5912         int r;
5913
5914         BUG_ON(vcpu->kvm == NULL);
5915         kvm = vcpu->kvm;
5916
5917         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5918         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5919                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5920         else
5921                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5922
5923         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5924         if (!page) {
5925                 r = -ENOMEM;
5926                 goto fail;
5927         }
5928         vcpu->arch.pio_data = page_address(page);
5929
5930         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
5931
5932         r = kvm_mmu_create(vcpu);
5933         if (r < 0)
5934                 goto fail_free_pio_data;
5935
5936         if (irqchip_in_kernel(kvm)) {
5937                 r = kvm_create_lapic(vcpu);
5938                 if (r < 0)
5939                         goto fail_mmu_destroy;
5940         }
5941
5942         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5943                                        GFP_KERNEL);
5944         if (!vcpu->arch.mce_banks) {
5945                 r = -ENOMEM;
5946                 goto fail_free_lapic;
5947         }
5948         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5949
5950         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5951                 goto fail_free_mce_banks;
5952
5953         kvm_async_pf_hash_reset(vcpu);
5954         kvm_pmu_init(vcpu);
5955
5956         return 0;
5957 fail_free_mce_banks:
5958         kfree(vcpu->arch.mce_banks);
5959 fail_free_lapic:
5960         kvm_free_lapic(vcpu);
5961 fail_mmu_destroy:
5962         kvm_mmu_destroy(vcpu);
5963 fail_free_pio_data:
5964         free_page((unsigned long)vcpu->arch.pio_data);
5965 fail:
5966         return r;
5967 }
5968
5969 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5970 {
5971         int idx;
5972
5973         kvm_pmu_destroy(vcpu);
5974         kfree(vcpu->arch.mce_banks);
5975         kvm_free_lapic(vcpu);
5976         idx = srcu_read_lock(&vcpu->kvm->srcu);
5977         kvm_mmu_destroy(vcpu);
5978         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5979         free_page((unsigned long)vcpu->arch.pio_data);
5980 }
5981
5982 int kvm_arch_init_vm(struct kvm *kvm)
5983 {
5984         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5985         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5986
5987         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5988         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5989
5990         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
5991
5992         return 0;
5993 }
5994
5995 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5996 {
5997         vcpu_load(vcpu);
5998         kvm_mmu_unload(vcpu);
5999         vcpu_put(vcpu);
6000 }
6001
6002 static void kvm_free_vcpus(struct kvm *kvm)
6003 {
6004         unsigned int i;
6005         struct kvm_vcpu *vcpu;
6006
6007         /*
6008          * Unpin any mmu pages first.
6009          */
6010         kvm_for_each_vcpu(i, vcpu, kvm) {
6011                 kvm_clear_async_pf_completion_queue(vcpu);
6012                 kvm_unload_vcpu_mmu(vcpu);
6013         }
6014         kvm_for_each_vcpu(i, vcpu, kvm)
6015                 kvm_arch_vcpu_free(vcpu);
6016
6017         mutex_lock(&kvm->lock);
6018         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6019                 kvm->vcpus[i] = NULL;
6020
6021         atomic_set(&kvm->online_vcpus, 0);
6022         mutex_unlock(&kvm->lock);
6023 }
6024
6025 void kvm_arch_sync_events(struct kvm *kvm)
6026 {
6027         kvm_free_all_assigned_devices(kvm);
6028         kvm_free_pit(kvm);
6029 }
6030
6031 void kvm_arch_destroy_vm(struct kvm *kvm)
6032 {
6033         kvm_iommu_unmap_guest(kvm);
6034         kfree(kvm->arch.vpic);
6035         kfree(kvm->arch.vioapic);
6036         kvm_free_vcpus(kvm);
6037         if (kvm->arch.apic_access_page)
6038                 put_page(kvm->arch.apic_access_page);
6039         if (kvm->arch.ept_identity_pagetable)
6040                 put_page(kvm->arch.ept_identity_pagetable);
6041 }
6042
6043 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6044                                 struct kvm_memory_slot *memslot,
6045                                 struct kvm_memory_slot old,
6046                                 struct kvm_userspace_memory_region *mem,
6047                                 int user_alloc)
6048 {
6049         int npages = memslot->npages;
6050         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6051
6052         /* Prevent internal slot pages from being moved by fork()/COW. */
6053         if (memslot->id >= KVM_MEMORY_SLOTS)
6054                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6055
6056         /*To keep backward compatibility with older userspace,
6057          *x86 needs to hanlde !user_alloc case.
6058          */
6059         if (!user_alloc) {
6060                 if (npages && !old.rmap) {
6061                         unsigned long userspace_addr;
6062
6063                         down_write(&current->mm->mmap_sem);
6064                         userspace_addr = do_mmap(NULL, 0,
6065                                                  npages * PAGE_SIZE,
6066                                                  PROT_READ | PROT_WRITE,
6067                                                  map_flags,
6068                                                  0);
6069                         up_write(&current->mm->mmap_sem);
6070
6071                         if (IS_ERR((void *)userspace_addr))
6072                                 return PTR_ERR((void *)userspace_addr);
6073
6074                         memslot->userspace_addr = userspace_addr;
6075                 }
6076         }
6077
6078
6079         return 0;
6080 }
6081
6082 void kvm_arch_commit_memory_region(struct kvm *kvm,
6083                                 struct kvm_userspace_memory_region *mem,
6084                                 struct kvm_memory_slot old,
6085                                 int user_alloc)
6086 {
6087
6088         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6089
6090         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6091                 int ret;
6092
6093                 down_write(&current->mm->mmap_sem);
6094                 ret = do_munmap(current->mm, old.userspace_addr,
6095                                 old.npages * PAGE_SIZE);
6096                 up_write(&current->mm->mmap_sem);
6097                 if (ret < 0)
6098                         printk(KERN_WARNING
6099                                "kvm_vm_ioctl_set_memory_region: "
6100                                "failed to munmap memory\n");
6101         }
6102
6103         if (!kvm->arch.n_requested_mmu_pages)
6104                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6105
6106         spin_lock(&kvm->mmu_lock);
6107         if (nr_mmu_pages)
6108                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6109         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6110         spin_unlock(&kvm->mmu_lock);
6111 }
6112
6113 void kvm_arch_flush_shadow(struct kvm *kvm)
6114 {
6115         kvm_mmu_zap_all(kvm);
6116         kvm_reload_remote_mmus(kvm);
6117 }
6118
6119 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6120 {
6121         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6122                 !vcpu->arch.apf.halted)
6123                 || !list_empty_careful(&vcpu->async_pf.done)
6124                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6125                 || atomic_read(&vcpu->arch.nmi_queued) ||
6126                 (kvm_arch_interrupt_allowed(vcpu) &&
6127                  kvm_cpu_has_interrupt(vcpu));
6128 }
6129
6130 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6131 {
6132         int me;
6133         int cpu = vcpu->cpu;
6134
6135         if (waitqueue_active(&vcpu->wq)) {
6136                 wake_up_interruptible(&vcpu->wq);
6137                 ++vcpu->stat.halt_wakeup;
6138         }
6139
6140         me = get_cpu();
6141         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6142                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6143                         smp_send_reschedule(cpu);
6144         put_cpu();
6145 }
6146
6147 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6148 {
6149         return kvm_x86_ops->interrupt_allowed(vcpu);
6150 }
6151
6152 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6153 {
6154         unsigned long current_rip = kvm_rip_read(vcpu) +
6155                 get_segment_base(vcpu, VCPU_SREG_CS);
6156
6157         return current_rip == linear_rip;
6158 }
6159 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6160
6161 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6162 {
6163         unsigned long rflags;
6164
6165         rflags = kvm_x86_ops->get_rflags(vcpu);
6166         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6167                 rflags &= ~X86_EFLAGS_TF;
6168         return rflags;
6169 }
6170 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6171
6172 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6173 {
6174         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6175             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6176                 rflags |= X86_EFLAGS_TF;
6177         kvm_x86_ops->set_rflags(vcpu, rflags);
6178         kvm_make_request(KVM_REQ_EVENT, vcpu);
6179 }
6180 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6181
6182 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6183 {
6184         int r;
6185
6186         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6187               is_error_page(work->page))
6188                 return;
6189
6190         r = kvm_mmu_reload(vcpu);
6191         if (unlikely(r))
6192                 return;
6193
6194         if (!vcpu->arch.mmu.direct_map &&
6195               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6196                 return;
6197
6198         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6199 }
6200
6201 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6202 {
6203         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6204 }
6205
6206 static inline u32 kvm_async_pf_next_probe(u32 key)
6207 {
6208         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6209 }
6210
6211 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6212 {
6213         u32 key = kvm_async_pf_hash_fn(gfn);
6214
6215         while (vcpu->arch.apf.gfns[key] != ~0)
6216                 key = kvm_async_pf_next_probe(key);
6217
6218         vcpu->arch.apf.gfns[key] = gfn;
6219 }
6220
6221 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6222 {
6223         int i;
6224         u32 key = kvm_async_pf_hash_fn(gfn);
6225
6226         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6227                      (vcpu->arch.apf.gfns[key] != gfn &&
6228                       vcpu->arch.apf.gfns[key] != ~0); i++)
6229                 key = kvm_async_pf_next_probe(key);
6230
6231         return key;
6232 }
6233
6234 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6235 {
6236         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6237 }
6238
6239 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6240 {
6241         u32 i, j, k;
6242
6243         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6244         while (true) {
6245                 vcpu->arch.apf.gfns[i] = ~0;
6246                 do {
6247                         j = kvm_async_pf_next_probe(j);
6248                         if (vcpu->arch.apf.gfns[j] == ~0)
6249                                 return;
6250                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6251                         /*
6252                          * k lies cyclically in ]i,j]
6253                          * |    i.k.j |
6254                          * |....j i.k.| or  |.k..j i...|
6255                          */
6256                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6257                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6258                 i = j;
6259         }
6260 }
6261
6262 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6263 {
6264
6265         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6266                                       sizeof(val));
6267 }
6268
6269 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6270                                      struct kvm_async_pf *work)
6271 {
6272         struct x86_exception fault;
6273
6274         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6275         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6276
6277         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6278             (vcpu->arch.apf.send_user_only &&
6279              kvm_x86_ops->get_cpl(vcpu) == 0))
6280                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6281         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6282                 fault.vector = PF_VECTOR;
6283                 fault.error_code_valid = true;
6284                 fault.error_code = 0;
6285                 fault.nested_page_fault = false;
6286                 fault.address = work->arch.token;
6287                 kvm_inject_page_fault(vcpu, &fault);
6288         }
6289 }