KVM: Intelligent device lookup on I/O bus
[linux-3.10.git] / arch / x86 / kvm / x86.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * derived from drivers/kvm/kvm_main.c
5  *
6  * Copyright (C) 2006 Qumranet, Inc.
7  * Copyright (C) 2008 Qumranet, Inc.
8  * Copyright IBM Corporation, 2008
9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
10  *
11  * Authors:
12  *   Avi Kivity   <avi@qumranet.com>
13  *   Yaniv Kamay  <yaniv@qumranet.com>
14  *   Amit Shah    <amit.shah@qumranet.com>
15  *   Ben-Ami Yassour <benami@il.ibm.com>
16  *
17  * This work is licensed under the terms of the GNU GPL, version 2.  See
18  * the COPYING file in the top-level directory.
19  *
20  */
21
22 #include <linux/kvm_host.h>
23 #include "irq.h"
24 #include "mmu.h"
25 #include "i8254.h"
26 #include "tss.h"
27 #include "kvm_cache_regs.h"
28 #include "x86.h"
29
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
33 #include <linux/fs.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <trace/events/kvm.h>
48
49 #define CREATE_TRACE_POINTS
50 #include "trace.h"
51
52 #include <asm/debugreg.h>
53 #include <asm/msr.h>
54 #include <asm/desc.h>
55 #include <asm/mtrr.h>
56 #include <asm/mce.h>
57 #include <asm/i387.h>
58 #include <asm/xcr.h>
59 #include <asm/pvclock.h>
60 #include <asm/div64.h>
61
62 #define MAX_IO_MSRS 256
63 #define KVM_MAX_MCE_BANKS 32
64 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
65
66 #define emul_to_vcpu(ctxt) \
67         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
68
69 /* EFER defaults:
70  * - enable syscall per default because its emulated by KVM
71  * - enable LME and LMA per default on 64 bit KVM
72  */
73 #ifdef CONFIG_X86_64
74 static
75 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
76 #else
77 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
78 #endif
79
80 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
81 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
82
83 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
84 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
85                                     struct kvm_cpuid_entry2 __user *entries);
86
87 struct kvm_x86_ops *kvm_x86_ops;
88 EXPORT_SYMBOL_GPL(kvm_x86_ops);
89
90 int ignore_msrs = 0;
91 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
92
93 bool kvm_has_tsc_control;
94 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
95 u32  kvm_max_guest_tsc_khz;
96 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
97
98 #define KVM_NR_SHARED_MSRS 16
99
100 struct kvm_shared_msrs_global {
101         int nr;
102         u32 msrs[KVM_NR_SHARED_MSRS];
103 };
104
105 struct kvm_shared_msrs {
106         struct user_return_notifier urn;
107         bool registered;
108         struct kvm_shared_msr_values {
109                 u64 host;
110                 u64 curr;
111         } values[KVM_NR_SHARED_MSRS];
112 };
113
114 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
115 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
116
117 struct kvm_stats_debugfs_item debugfs_entries[] = {
118         { "pf_fixed", VCPU_STAT(pf_fixed) },
119         { "pf_guest", VCPU_STAT(pf_guest) },
120         { "tlb_flush", VCPU_STAT(tlb_flush) },
121         { "invlpg", VCPU_STAT(invlpg) },
122         { "exits", VCPU_STAT(exits) },
123         { "io_exits", VCPU_STAT(io_exits) },
124         { "mmio_exits", VCPU_STAT(mmio_exits) },
125         { "signal_exits", VCPU_STAT(signal_exits) },
126         { "irq_window", VCPU_STAT(irq_window_exits) },
127         { "nmi_window", VCPU_STAT(nmi_window_exits) },
128         { "halt_exits", VCPU_STAT(halt_exits) },
129         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
130         { "hypercalls", VCPU_STAT(hypercalls) },
131         { "request_irq", VCPU_STAT(request_irq_exits) },
132         { "irq_exits", VCPU_STAT(irq_exits) },
133         { "host_state_reload", VCPU_STAT(host_state_reload) },
134         { "efer_reload", VCPU_STAT(efer_reload) },
135         { "fpu_reload", VCPU_STAT(fpu_reload) },
136         { "insn_emulation", VCPU_STAT(insn_emulation) },
137         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
138         { "irq_injections", VCPU_STAT(irq_injections) },
139         { "nmi_injections", VCPU_STAT(nmi_injections) },
140         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
141         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
142         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
143         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
144         { "mmu_flooded", VM_STAT(mmu_flooded) },
145         { "mmu_recycled", VM_STAT(mmu_recycled) },
146         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
147         { "mmu_unsync", VM_STAT(mmu_unsync) },
148         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
149         { "largepages", VM_STAT(lpages) },
150         { NULL }
151 };
152
153 u64 __read_mostly host_xcr0;
154
155 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
156
157 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
158 {
159         int i;
160         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
161                 vcpu->arch.apf.gfns[i] = ~0;
162 }
163
164 static void kvm_on_user_return(struct user_return_notifier *urn)
165 {
166         unsigned slot;
167         struct kvm_shared_msrs *locals
168                 = container_of(urn, struct kvm_shared_msrs, urn);
169         struct kvm_shared_msr_values *values;
170
171         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
172                 values = &locals->values[slot];
173                 if (values->host != values->curr) {
174                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
175                         values->curr = values->host;
176                 }
177         }
178         locals->registered = false;
179         user_return_notifier_unregister(urn);
180 }
181
182 static void shared_msr_update(unsigned slot, u32 msr)
183 {
184         struct kvm_shared_msrs *smsr;
185         u64 value;
186
187         smsr = &__get_cpu_var(shared_msrs);
188         /* only read, and nobody should modify it at this time,
189          * so don't need lock */
190         if (slot >= shared_msrs_global.nr) {
191                 printk(KERN_ERR "kvm: invalid MSR slot!");
192                 return;
193         }
194         rdmsrl_safe(msr, &value);
195         smsr->values[slot].host = value;
196         smsr->values[slot].curr = value;
197 }
198
199 void kvm_define_shared_msr(unsigned slot, u32 msr)
200 {
201         if (slot >= shared_msrs_global.nr)
202                 shared_msrs_global.nr = slot + 1;
203         shared_msrs_global.msrs[slot] = msr;
204         /* we need ensured the shared_msr_global have been updated */
205         smp_wmb();
206 }
207 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
208
209 static void kvm_shared_msr_cpu_online(void)
210 {
211         unsigned i;
212
213         for (i = 0; i < shared_msrs_global.nr; ++i)
214                 shared_msr_update(i, shared_msrs_global.msrs[i]);
215 }
216
217 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
218 {
219         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
220
221         if (((value ^ smsr->values[slot].curr) & mask) == 0)
222                 return;
223         smsr->values[slot].curr = value;
224         wrmsrl(shared_msrs_global.msrs[slot], value);
225         if (!smsr->registered) {
226                 smsr->urn.on_user_return = kvm_on_user_return;
227                 user_return_notifier_register(&smsr->urn);
228                 smsr->registered = true;
229         }
230 }
231 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
232
233 static void drop_user_return_notifiers(void *ignore)
234 {
235         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
236
237         if (smsr->registered)
238                 kvm_on_user_return(&smsr->urn);
239 }
240
241 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
242 {
243         if (irqchip_in_kernel(vcpu->kvm))
244                 return vcpu->arch.apic_base;
245         else
246                 return vcpu->arch.apic_base;
247 }
248 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
249
250 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
251 {
252         /* TODO: reserve bits check */
253         if (irqchip_in_kernel(vcpu->kvm))
254                 kvm_lapic_set_base(vcpu, data);
255         else
256                 vcpu->arch.apic_base = data;
257 }
258 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
259
260 #define EXCPT_BENIGN            0
261 #define EXCPT_CONTRIBUTORY      1
262 #define EXCPT_PF                2
263
264 static int exception_class(int vector)
265 {
266         switch (vector) {
267         case PF_VECTOR:
268                 return EXCPT_PF;
269         case DE_VECTOR:
270         case TS_VECTOR:
271         case NP_VECTOR:
272         case SS_VECTOR:
273         case GP_VECTOR:
274                 return EXCPT_CONTRIBUTORY;
275         default:
276                 break;
277         }
278         return EXCPT_BENIGN;
279 }
280
281 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
282                 unsigned nr, bool has_error, u32 error_code,
283                 bool reinject)
284 {
285         u32 prev_nr;
286         int class1, class2;
287
288         kvm_make_request(KVM_REQ_EVENT, vcpu);
289
290         if (!vcpu->arch.exception.pending) {
291         queue:
292                 vcpu->arch.exception.pending = true;
293                 vcpu->arch.exception.has_error_code = has_error;
294                 vcpu->arch.exception.nr = nr;
295                 vcpu->arch.exception.error_code = error_code;
296                 vcpu->arch.exception.reinject = reinject;
297                 return;
298         }
299
300         /* to check exception */
301         prev_nr = vcpu->arch.exception.nr;
302         if (prev_nr == DF_VECTOR) {
303                 /* triple fault -> shutdown */
304                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
305                 return;
306         }
307         class1 = exception_class(prev_nr);
308         class2 = exception_class(nr);
309         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
310                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
311                 /* generate double fault per SDM Table 5-5 */
312                 vcpu->arch.exception.pending = true;
313                 vcpu->arch.exception.has_error_code = true;
314                 vcpu->arch.exception.nr = DF_VECTOR;
315                 vcpu->arch.exception.error_code = 0;
316         } else
317                 /* replace previous exception with a new one in a hope
318                    that instruction re-execution will regenerate lost
319                    exception */
320                 goto queue;
321 }
322
323 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
324 {
325         kvm_multiple_exception(vcpu, nr, false, 0, false);
326 }
327 EXPORT_SYMBOL_GPL(kvm_queue_exception);
328
329 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
330 {
331         kvm_multiple_exception(vcpu, nr, false, 0, true);
332 }
333 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
334
335 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
336 {
337         if (err)
338                 kvm_inject_gp(vcpu, 0);
339         else
340                 kvm_x86_ops->skip_emulated_instruction(vcpu);
341 }
342 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
343
344 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
345 {
346         ++vcpu->stat.pf_guest;
347         vcpu->arch.cr2 = fault->address;
348         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
349 }
350 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
351
352 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
353 {
354         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
355                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
356         else
357                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
358 }
359
360 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
361 {
362         kvm_make_request(KVM_REQ_EVENT, vcpu);
363         vcpu->arch.nmi_pending = 1;
364 }
365 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
366
367 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
368 {
369         kvm_multiple_exception(vcpu, nr, true, error_code, false);
370 }
371 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
372
373 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
374 {
375         kvm_multiple_exception(vcpu, nr, true, error_code, true);
376 }
377 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
378
379 /*
380  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
381  * a #GP and return false.
382  */
383 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
384 {
385         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
386                 return true;
387         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
388         return false;
389 }
390 EXPORT_SYMBOL_GPL(kvm_require_cpl);
391
392 /*
393  * This function will be used to read from the physical memory of the currently
394  * running guest. The difference to kvm_read_guest_page is that this function
395  * can read from guest physical or from the guest's guest physical memory.
396  */
397 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
398                             gfn_t ngfn, void *data, int offset, int len,
399                             u32 access)
400 {
401         gfn_t real_gfn;
402         gpa_t ngpa;
403
404         ngpa     = gfn_to_gpa(ngfn);
405         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
406         if (real_gfn == UNMAPPED_GVA)
407                 return -EFAULT;
408
409         real_gfn = gpa_to_gfn(real_gfn);
410
411         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
412 }
413 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
414
415 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
416                                void *data, int offset, int len, u32 access)
417 {
418         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
419                                        data, offset, len, access);
420 }
421
422 /*
423  * Load the pae pdptrs.  Return true is they are all valid.
424  */
425 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
426 {
427         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
428         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
429         int i;
430         int ret;
431         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
432
433         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
434                                       offset * sizeof(u64), sizeof(pdpte),
435                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
436         if (ret < 0) {
437                 ret = 0;
438                 goto out;
439         }
440         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
441                 if (is_present_gpte(pdpte[i]) &&
442                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
443                         ret = 0;
444                         goto out;
445                 }
446         }
447         ret = 1;
448
449         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
450         __set_bit(VCPU_EXREG_PDPTR,
451                   (unsigned long *)&vcpu->arch.regs_avail);
452         __set_bit(VCPU_EXREG_PDPTR,
453                   (unsigned long *)&vcpu->arch.regs_dirty);
454 out:
455
456         return ret;
457 }
458 EXPORT_SYMBOL_GPL(load_pdptrs);
459
460 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
461 {
462         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
463         bool changed = true;
464         int offset;
465         gfn_t gfn;
466         int r;
467
468         if (is_long_mode(vcpu) || !is_pae(vcpu))
469                 return false;
470
471         if (!test_bit(VCPU_EXREG_PDPTR,
472                       (unsigned long *)&vcpu->arch.regs_avail))
473                 return true;
474
475         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
476         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
477         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
478                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
479         if (r < 0)
480                 goto out;
481         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
482 out:
483
484         return changed;
485 }
486
487 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
488 {
489         unsigned long old_cr0 = kvm_read_cr0(vcpu);
490         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
491                                     X86_CR0_CD | X86_CR0_NW;
492
493         cr0 |= X86_CR0_ET;
494
495 #ifdef CONFIG_X86_64
496         if (cr0 & 0xffffffff00000000UL)
497                 return 1;
498 #endif
499
500         cr0 &= ~CR0_RESERVED_BITS;
501
502         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
503                 return 1;
504
505         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
506                 return 1;
507
508         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
509 #ifdef CONFIG_X86_64
510                 if ((vcpu->arch.efer & EFER_LME)) {
511                         int cs_db, cs_l;
512
513                         if (!is_pae(vcpu))
514                                 return 1;
515                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
516                         if (cs_l)
517                                 return 1;
518                 } else
519 #endif
520                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
521                                                  kvm_read_cr3(vcpu)))
522                         return 1;
523         }
524
525         kvm_x86_ops->set_cr0(vcpu, cr0);
526
527         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
528                 kvm_clear_async_pf_completion_queue(vcpu);
529                 kvm_async_pf_hash_reset(vcpu);
530         }
531
532         if ((cr0 ^ old_cr0) & update_bits)
533                 kvm_mmu_reset_context(vcpu);
534         return 0;
535 }
536 EXPORT_SYMBOL_GPL(kvm_set_cr0);
537
538 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
539 {
540         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
541 }
542 EXPORT_SYMBOL_GPL(kvm_lmsw);
543
544 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
545 {
546         u64 xcr0;
547
548         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
549         if (index != XCR_XFEATURE_ENABLED_MASK)
550                 return 1;
551         xcr0 = xcr;
552         if (kvm_x86_ops->get_cpl(vcpu) != 0)
553                 return 1;
554         if (!(xcr0 & XSTATE_FP))
555                 return 1;
556         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
557                 return 1;
558         if (xcr0 & ~host_xcr0)
559                 return 1;
560         vcpu->arch.xcr0 = xcr0;
561         vcpu->guest_xcr0_loaded = 0;
562         return 0;
563 }
564
565 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
566 {
567         if (__kvm_set_xcr(vcpu, index, xcr)) {
568                 kvm_inject_gp(vcpu, 0);
569                 return 1;
570         }
571         return 0;
572 }
573 EXPORT_SYMBOL_GPL(kvm_set_xcr);
574
575 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
576 {
577         struct kvm_cpuid_entry2 *best;
578
579         best = kvm_find_cpuid_entry(vcpu, 1, 0);
580         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
581 }
582
583 static bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
584 {
585         struct kvm_cpuid_entry2 *best;
586
587         best = kvm_find_cpuid_entry(vcpu, 7, 0);
588         return best && (best->ebx & bit(X86_FEATURE_SMEP));
589 }
590
591 static bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
592 {
593         struct kvm_cpuid_entry2 *best;
594
595         best = kvm_find_cpuid_entry(vcpu, 7, 0);
596         return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
597 }
598
599 static void update_cpuid(struct kvm_vcpu *vcpu)
600 {
601         struct kvm_cpuid_entry2 *best;
602
603         best = kvm_find_cpuid_entry(vcpu, 1, 0);
604         if (!best)
605                 return;
606
607         /* Update OSXSAVE bit */
608         if (cpu_has_xsave && best->function == 0x1) {
609                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
610                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
611                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
612         }
613 }
614
615 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
616 {
617         unsigned long old_cr4 = kvm_read_cr4(vcpu);
618         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
619                                    X86_CR4_PAE | X86_CR4_SMEP;
620         if (cr4 & CR4_RESERVED_BITS)
621                 return 1;
622
623         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
624                 return 1;
625
626         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
627                 return 1;
628
629         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
630                 return 1;
631
632         if (is_long_mode(vcpu)) {
633                 if (!(cr4 & X86_CR4_PAE))
634                         return 1;
635         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
636                    && ((cr4 ^ old_cr4) & pdptr_bits)
637                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
638                                    kvm_read_cr3(vcpu)))
639                 return 1;
640
641         if (kvm_x86_ops->set_cr4(vcpu, cr4))
642                 return 1;
643
644         if ((cr4 ^ old_cr4) & pdptr_bits)
645                 kvm_mmu_reset_context(vcpu);
646
647         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
648                 update_cpuid(vcpu);
649
650         return 0;
651 }
652 EXPORT_SYMBOL_GPL(kvm_set_cr4);
653
654 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
655 {
656         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
657                 kvm_mmu_sync_roots(vcpu);
658                 kvm_mmu_flush_tlb(vcpu);
659                 return 0;
660         }
661
662         if (is_long_mode(vcpu)) {
663                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
664                         return 1;
665         } else {
666                 if (is_pae(vcpu)) {
667                         if (cr3 & CR3_PAE_RESERVED_BITS)
668                                 return 1;
669                         if (is_paging(vcpu) &&
670                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
671                                 return 1;
672                 }
673                 /*
674                  * We don't check reserved bits in nonpae mode, because
675                  * this isn't enforced, and VMware depends on this.
676                  */
677         }
678
679         /*
680          * Does the new cr3 value map to physical memory? (Note, we
681          * catch an invalid cr3 even in real-mode, because it would
682          * cause trouble later on when we turn on paging anyway.)
683          *
684          * A real CPU would silently accept an invalid cr3 and would
685          * attempt to use it - with largely undefined (and often hard
686          * to debug) behavior on the guest side.
687          */
688         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
689                 return 1;
690         vcpu->arch.cr3 = cr3;
691         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
692         vcpu->arch.mmu.new_cr3(vcpu);
693         return 0;
694 }
695 EXPORT_SYMBOL_GPL(kvm_set_cr3);
696
697 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
698 {
699         if (cr8 & CR8_RESERVED_BITS)
700                 return 1;
701         if (irqchip_in_kernel(vcpu->kvm))
702                 kvm_lapic_set_tpr(vcpu, cr8);
703         else
704                 vcpu->arch.cr8 = cr8;
705         return 0;
706 }
707 EXPORT_SYMBOL_GPL(kvm_set_cr8);
708
709 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
710 {
711         if (irqchip_in_kernel(vcpu->kvm))
712                 return kvm_lapic_get_cr8(vcpu);
713         else
714                 return vcpu->arch.cr8;
715 }
716 EXPORT_SYMBOL_GPL(kvm_get_cr8);
717
718 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
719 {
720         switch (dr) {
721         case 0 ... 3:
722                 vcpu->arch.db[dr] = val;
723                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
724                         vcpu->arch.eff_db[dr] = val;
725                 break;
726         case 4:
727                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
728                         return 1; /* #UD */
729                 /* fall through */
730         case 6:
731                 if (val & 0xffffffff00000000ULL)
732                         return -1; /* #GP */
733                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
734                 break;
735         case 5:
736                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
737                         return 1; /* #UD */
738                 /* fall through */
739         default: /* 7 */
740                 if (val & 0xffffffff00000000ULL)
741                         return -1; /* #GP */
742                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
743                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
744                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
745                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
746                 }
747                 break;
748         }
749
750         return 0;
751 }
752
753 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
754 {
755         int res;
756
757         res = __kvm_set_dr(vcpu, dr, val);
758         if (res > 0)
759                 kvm_queue_exception(vcpu, UD_VECTOR);
760         else if (res < 0)
761                 kvm_inject_gp(vcpu, 0);
762
763         return res;
764 }
765 EXPORT_SYMBOL_GPL(kvm_set_dr);
766
767 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
768 {
769         switch (dr) {
770         case 0 ... 3:
771                 *val = vcpu->arch.db[dr];
772                 break;
773         case 4:
774                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
775                         return 1;
776                 /* fall through */
777         case 6:
778                 *val = vcpu->arch.dr6;
779                 break;
780         case 5:
781                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
782                         return 1;
783                 /* fall through */
784         default: /* 7 */
785                 *val = vcpu->arch.dr7;
786                 break;
787         }
788
789         return 0;
790 }
791
792 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
793 {
794         if (_kvm_get_dr(vcpu, dr, val)) {
795                 kvm_queue_exception(vcpu, UD_VECTOR);
796                 return 1;
797         }
798         return 0;
799 }
800 EXPORT_SYMBOL_GPL(kvm_get_dr);
801
802 /*
803  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
804  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
805  *
806  * This list is modified at module load time to reflect the
807  * capabilities of the host cpu. This capabilities test skips MSRs that are
808  * kvm-specific. Those are put in the beginning of the list.
809  */
810
811 #define KVM_SAVE_MSRS_BEGIN     9
812 static u32 msrs_to_save[] = {
813         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
814         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
815         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
816         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
817         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
818         MSR_STAR,
819 #ifdef CONFIG_X86_64
820         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
821 #endif
822         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
823 };
824
825 static unsigned num_msrs_to_save;
826
827 static u32 emulated_msrs[] = {
828         MSR_IA32_MISC_ENABLE,
829         MSR_IA32_MCG_STATUS,
830         MSR_IA32_MCG_CTL,
831 };
832
833 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
834 {
835         u64 old_efer = vcpu->arch.efer;
836
837         if (efer & efer_reserved_bits)
838                 return 1;
839
840         if (is_paging(vcpu)
841             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
842                 return 1;
843
844         if (efer & EFER_FFXSR) {
845                 struct kvm_cpuid_entry2 *feat;
846
847                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
848                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
849                         return 1;
850         }
851
852         if (efer & EFER_SVME) {
853                 struct kvm_cpuid_entry2 *feat;
854
855                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
856                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
857                         return 1;
858         }
859
860         efer &= ~EFER_LMA;
861         efer |= vcpu->arch.efer & EFER_LMA;
862
863         kvm_x86_ops->set_efer(vcpu, efer);
864
865         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
866
867         /* Update reserved bits */
868         if ((efer ^ old_efer) & EFER_NX)
869                 kvm_mmu_reset_context(vcpu);
870
871         return 0;
872 }
873
874 void kvm_enable_efer_bits(u64 mask)
875 {
876        efer_reserved_bits &= ~mask;
877 }
878 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
879
880
881 /*
882  * Writes msr value into into the appropriate "register".
883  * Returns 0 on success, non-0 otherwise.
884  * Assumes vcpu_load() was already called.
885  */
886 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
887 {
888         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
889 }
890
891 /*
892  * Adapt set_msr() to msr_io()'s calling convention
893  */
894 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
895 {
896         return kvm_set_msr(vcpu, index, *data);
897 }
898
899 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
900 {
901         int version;
902         int r;
903         struct pvclock_wall_clock wc;
904         struct timespec boot;
905
906         if (!wall_clock)
907                 return;
908
909         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
910         if (r)
911                 return;
912
913         if (version & 1)
914                 ++version;  /* first time write, random junk */
915
916         ++version;
917
918         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
919
920         /*
921          * The guest calculates current wall clock time by adding
922          * system time (updated by kvm_guest_time_update below) to the
923          * wall clock specified here.  guest system time equals host
924          * system time for us, thus we must fill in host boot time here.
925          */
926         getboottime(&boot);
927
928         wc.sec = boot.tv_sec;
929         wc.nsec = boot.tv_nsec;
930         wc.version = version;
931
932         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
933
934         version++;
935         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
936 }
937
938 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
939 {
940         uint32_t quotient, remainder;
941
942         /* Don't try to replace with do_div(), this one calculates
943          * "(dividend << 32) / divisor" */
944         __asm__ ( "divl %4"
945                   : "=a" (quotient), "=d" (remainder)
946                   : "0" (0), "1" (dividend), "r" (divisor) );
947         return quotient;
948 }
949
950 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
951                                s8 *pshift, u32 *pmultiplier)
952 {
953         uint64_t scaled64;
954         int32_t  shift = 0;
955         uint64_t tps64;
956         uint32_t tps32;
957
958         tps64 = base_khz * 1000LL;
959         scaled64 = scaled_khz * 1000LL;
960         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
961                 tps64 >>= 1;
962                 shift--;
963         }
964
965         tps32 = (uint32_t)tps64;
966         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
967                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
968                         scaled64 >>= 1;
969                 else
970                         tps32 <<= 1;
971                 shift++;
972         }
973
974         *pshift = shift;
975         *pmultiplier = div_frac(scaled64, tps32);
976
977         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
978                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
979 }
980
981 static inline u64 get_kernel_ns(void)
982 {
983         struct timespec ts;
984
985         WARN_ON(preemptible());
986         ktime_get_ts(&ts);
987         monotonic_to_bootbased(&ts);
988         return timespec_to_ns(&ts);
989 }
990
991 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
992 unsigned long max_tsc_khz;
993
994 static inline int kvm_tsc_changes_freq(void)
995 {
996         int cpu = get_cpu();
997         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
998                   cpufreq_quick_get(cpu) != 0;
999         put_cpu();
1000         return ret;
1001 }
1002
1003 static u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
1004 {
1005         if (vcpu->arch.virtual_tsc_khz)
1006                 return vcpu->arch.virtual_tsc_khz;
1007         else
1008                 return __this_cpu_read(cpu_tsc_khz);
1009 }
1010
1011 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1012 {
1013         u64 ret;
1014
1015         WARN_ON(preemptible());
1016         if (kvm_tsc_changes_freq())
1017                 printk_once(KERN_WARNING
1018                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
1019         ret = nsec * vcpu_tsc_khz(vcpu);
1020         do_div(ret, USEC_PER_SEC);
1021         return ret;
1022 }
1023
1024 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1025 {
1026         /* Compute a scale to convert nanoseconds in TSC cycles */
1027         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1028                            &vcpu->arch.tsc_catchup_shift,
1029                            &vcpu->arch.tsc_catchup_mult);
1030 }
1031
1032 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1033 {
1034         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1035                                       vcpu->arch.tsc_catchup_mult,
1036                                       vcpu->arch.tsc_catchup_shift);
1037         tsc += vcpu->arch.last_tsc_write;
1038         return tsc;
1039 }
1040
1041 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1042 {
1043         struct kvm *kvm = vcpu->kvm;
1044         u64 offset, ns, elapsed;
1045         unsigned long flags;
1046         s64 sdiff;
1047
1048         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1049         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1050         ns = get_kernel_ns();
1051         elapsed = ns - kvm->arch.last_tsc_nsec;
1052         sdiff = data - kvm->arch.last_tsc_write;
1053         if (sdiff < 0)
1054                 sdiff = -sdiff;
1055
1056         /*
1057          * Special case: close write to TSC within 5 seconds of
1058          * another CPU is interpreted as an attempt to synchronize
1059          * The 5 seconds is to accommodate host load / swapping as
1060          * well as any reset of TSC during the boot process.
1061          *
1062          * In that case, for a reliable TSC, we can match TSC offsets,
1063          * or make a best guest using elapsed value.
1064          */
1065         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1066             elapsed < 5ULL * NSEC_PER_SEC) {
1067                 if (!check_tsc_unstable()) {
1068                         offset = kvm->arch.last_tsc_offset;
1069                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1070                 } else {
1071                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1072                         offset += delta;
1073                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1074                 }
1075                 ns = kvm->arch.last_tsc_nsec;
1076         }
1077         kvm->arch.last_tsc_nsec = ns;
1078         kvm->arch.last_tsc_write = data;
1079         kvm->arch.last_tsc_offset = offset;
1080         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1081         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1082
1083         /* Reset of TSC must disable overshoot protection below */
1084         vcpu->arch.hv_clock.tsc_timestamp = 0;
1085         vcpu->arch.last_tsc_write = data;
1086         vcpu->arch.last_tsc_nsec = ns;
1087 }
1088 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1089
1090 static int kvm_guest_time_update(struct kvm_vcpu *v)
1091 {
1092         unsigned long flags;
1093         struct kvm_vcpu_arch *vcpu = &v->arch;
1094         void *shared_kaddr;
1095         unsigned long this_tsc_khz;
1096         s64 kernel_ns, max_kernel_ns;
1097         u64 tsc_timestamp;
1098
1099         /* Keep irq disabled to prevent changes to the clock */
1100         local_irq_save(flags);
1101         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1102         kernel_ns = get_kernel_ns();
1103         this_tsc_khz = vcpu_tsc_khz(v);
1104         if (unlikely(this_tsc_khz == 0)) {
1105                 local_irq_restore(flags);
1106                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1107                 return 1;
1108         }
1109
1110         /*
1111          * We may have to catch up the TSC to match elapsed wall clock
1112          * time for two reasons, even if kvmclock is used.
1113          *   1) CPU could have been running below the maximum TSC rate
1114          *   2) Broken TSC compensation resets the base at each VCPU
1115          *      entry to avoid unknown leaps of TSC even when running
1116          *      again on the same CPU.  This may cause apparent elapsed
1117          *      time to disappear, and the guest to stand still or run
1118          *      very slowly.
1119          */
1120         if (vcpu->tsc_catchup) {
1121                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1122                 if (tsc > tsc_timestamp) {
1123                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1124                         tsc_timestamp = tsc;
1125                 }
1126         }
1127
1128         local_irq_restore(flags);
1129
1130         if (!vcpu->time_page)
1131                 return 0;
1132
1133         /*
1134          * Time as measured by the TSC may go backwards when resetting the base
1135          * tsc_timestamp.  The reason for this is that the TSC resolution is
1136          * higher than the resolution of the other clock scales.  Thus, many
1137          * possible measurments of the TSC correspond to one measurement of any
1138          * other clock, and so a spread of values is possible.  This is not a
1139          * problem for the computation of the nanosecond clock; with TSC rates
1140          * around 1GHZ, there can only be a few cycles which correspond to one
1141          * nanosecond value, and any path through this code will inevitably
1142          * take longer than that.  However, with the kernel_ns value itself,
1143          * the precision may be much lower, down to HZ granularity.  If the
1144          * first sampling of TSC against kernel_ns ends in the low part of the
1145          * range, and the second in the high end of the range, we can get:
1146          *
1147          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1148          *
1149          * As the sampling errors potentially range in the thousands of cycles,
1150          * it is possible such a time value has already been observed by the
1151          * guest.  To protect against this, we must compute the system time as
1152          * observed by the guest and ensure the new system time is greater.
1153          */
1154         max_kernel_ns = 0;
1155         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1156                 max_kernel_ns = vcpu->last_guest_tsc -
1157                                 vcpu->hv_clock.tsc_timestamp;
1158                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1159                                     vcpu->hv_clock.tsc_to_system_mul,
1160                                     vcpu->hv_clock.tsc_shift);
1161                 max_kernel_ns += vcpu->last_kernel_ns;
1162         }
1163
1164         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1165                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1166                                    &vcpu->hv_clock.tsc_shift,
1167                                    &vcpu->hv_clock.tsc_to_system_mul);
1168                 vcpu->hw_tsc_khz = this_tsc_khz;
1169         }
1170
1171         if (max_kernel_ns > kernel_ns)
1172                 kernel_ns = max_kernel_ns;
1173
1174         /* With all the info we got, fill in the values */
1175         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1176         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1177         vcpu->last_kernel_ns = kernel_ns;
1178         vcpu->last_guest_tsc = tsc_timestamp;
1179         vcpu->hv_clock.flags = 0;
1180
1181         /*
1182          * The interface expects us to write an even number signaling that the
1183          * update is finished. Since the guest won't see the intermediate
1184          * state, we just increase by 2 at the end.
1185          */
1186         vcpu->hv_clock.version += 2;
1187
1188         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1189
1190         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1191                sizeof(vcpu->hv_clock));
1192
1193         kunmap_atomic(shared_kaddr, KM_USER0);
1194
1195         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1196         return 0;
1197 }
1198
1199 static bool msr_mtrr_valid(unsigned msr)
1200 {
1201         switch (msr) {
1202         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1203         case MSR_MTRRfix64K_00000:
1204         case MSR_MTRRfix16K_80000:
1205         case MSR_MTRRfix16K_A0000:
1206         case MSR_MTRRfix4K_C0000:
1207         case MSR_MTRRfix4K_C8000:
1208         case MSR_MTRRfix4K_D0000:
1209         case MSR_MTRRfix4K_D8000:
1210         case MSR_MTRRfix4K_E0000:
1211         case MSR_MTRRfix4K_E8000:
1212         case MSR_MTRRfix4K_F0000:
1213         case MSR_MTRRfix4K_F8000:
1214         case MSR_MTRRdefType:
1215         case MSR_IA32_CR_PAT:
1216                 return true;
1217         case 0x2f8:
1218                 return true;
1219         }
1220         return false;
1221 }
1222
1223 static bool valid_pat_type(unsigned t)
1224 {
1225         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1226 }
1227
1228 static bool valid_mtrr_type(unsigned t)
1229 {
1230         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1231 }
1232
1233 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1234 {
1235         int i;
1236
1237         if (!msr_mtrr_valid(msr))
1238                 return false;
1239
1240         if (msr == MSR_IA32_CR_PAT) {
1241                 for (i = 0; i < 8; i++)
1242                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1243                                 return false;
1244                 return true;
1245         } else if (msr == MSR_MTRRdefType) {
1246                 if (data & ~0xcff)
1247                         return false;
1248                 return valid_mtrr_type(data & 0xff);
1249         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1250                 for (i = 0; i < 8 ; i++)
1251                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1252                                 return false;
1253                 return true;
1254         }
1255
1256         /* variable MTRRs */
1257         return valid_mtrr_type(data & 0xff);
1258 }
1259
1260 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1261 {
1262         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1263
1264         if (!mtrr_valid(vcpu, msr, data))
1265                 return 1;
1266
1267         if (msr == MSR_MTRRdefType) {
1268                 vcpu->arch.mtrr_state.def_type = data;
1269                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1270         } else if (msr == MSR_MTRRfix64K_00000)
1271                 p[0] = data;
1272         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1273                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1274         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1275                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1276         else if (msr == MSR_IA32_CR_PAT)
1277                 vcpu->arch.pat = data;
1278         else {  /* Variable MTRRs */
1279                 int idx, is_mtrr_mask;
1280                 u64 *pt;
1281
1282                 idx = (msr - 0x200) / 2;
1283                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1284                 if (!is_mtrr_mask)
1285                         pt =
1286                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1287                 else
1288                         pt =
1289                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1290                 *pt = data;
1291         }
1292
1293         kvm_mmu_reset_context(vcpu);
1294         return 0;
1295 }
1296
1297 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1298 {
1299         u64 mcg_cap = vcpu->arch.mcg_cap;
1300         unsigned bank_num = mcg_cap & 0xff;
1301
1302         switch (msr) {
1303         case MSR_IA32_MCG_STATUS:
1304                 vcpu->arch.mcg_status = data;
1305                 break;
1306         case MSR_IA32_MCG_CTL:
1307                 if (!(mcg_cap & MCG_CTL_P))
1308                         return 1;
1309                 if (data != 0 && data != ~(u64)0)
1310                         return -1;
1311                 vcpu->arch.mcg_ctl = data;
1312                 break;
1313         default:
1314                 if (msr >= MSR_IA32_MC0_CTL &&
1315                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1316                         u32 offset = msr - MSR_IA32_MC0_CTL;
1317                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1318                          * some Linux kernels though clear bit 10 in bank 4 to
1319                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1320                          * this to avoid an uncatched #GP in the guest
1321                          */
1322                         if ((offset & 0x3) == 0 &&
1323                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1324                                 return -1;
1325                         vcpu->arch.mce_banks[offset] = data;
1326                         break;
1327                 }
1328                 return 1;
1329         }
1330         return 0;
1331 }
1332
1333 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1334 {
1335         struct kvm *kvm = vcpu->kvm;
1336         int lm = is_long_mode(vcpu);
1337         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1338                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1339         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1340                 : kvm->arch.xen_hvm_config.blob_size_32;
1341         u32 page_num = data & ~PAGE_MASK;
1342         u64 page_addr = data & PAGE_MASK;
1343         u8 *page;
1344         int r;
1345
1346         r = -E2BIG;
1347         if (page_num >= blob_size)
1348                 goto out;
1349         r = -ENOMEM;
1350         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1351         if (!page)
1352                 goto out;
1353         r = -EFAULT;
1354         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1355                 goto out_free;
1356         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1357                 goto out_free;
1358         r = 0;
1359 out_free:
1360         kfree(page);
1361 out:
1362         return r;
1363 }
1364
1365 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1366 {
1367         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1368 }
1369
1370 static bool kvm_hv_msr_partition_wide(u32 msr)
1371 {
1372         bool r = false;
1373         switch (msr) {
1374         case HV_X64_MSR_GUEST_OS_ID:
1375         case HV_X64_MSR_HYPERCALL:
1376                 r = true;
1377                 break;
1378         }
1379
1380         return r;
1381 }
1382
1383 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1384 {
1385         struct kvm *kvm = vcpu->kvm;
1386
1387         switch (msr) {
1388         case HV_X64_MSR_GUEST_OS_ID:
1389                 kvm->arch.hv_guest_os_id = data;
1390                 /* setting guest os id to zero disables hypercall page */
1391                 if (!kvm->arch.hv_guest_os_id)
1392                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1393                 break;
1394         case HV_X64_MSR_HYPERCALL: {
1395                 u64 gfn;
1396                 unsigned long addr;
1397                 u8 instructions[4];
1398
1399                 /* if guest os id is not set hypercall should remain disabled */
1400                 if (!kvm->arch.hv_guest_os_id)
1401                         break;
1402                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1403                         kvm->arch.hv_hypercall = data;
1404                         break;
1405                 }
1406                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1407                 addr = gfn_to_hva(kvm, gfn);
1408                 if (kvm_is_error_hva(addr))
1409                         return 1;
1410                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1411                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1412                 if (__copy_to_user((void __user *)addr, instructions, 4))
1413                         return 1;
1414                 kvm->arch.hv_hypercall = data;
1415                 break;
1416         }
1417         default:
1418                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1419                           "data 0x%llx\n", msr, data);
1420                 return 1;
1421         }
1422         return 0;
1423 }
1424
1425 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1426 {
1427         switch (msr) {
1428         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1429                 unsigned long addr;
1430
1431                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1432                         vcpu->arch.hv_vapic = data;
1433                         break;
1434                 }
1435                 addr = gfn_to_hva(vcpu->kvm, data >>
1436                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1437                 if (kvm_is_error_hva(addr))
1438                         return 1;
1439                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1440                         return 1;
1441                 vcpu->arch.hv_vapic = data;
1442                 break;
1443         }
1444         case HV_X64_MSR_EOI:
1445                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1446         case HV_X64_MSR_ICR:
1447                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1448         case HV_X64_MSR_TPR:
1449                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1450         default:
1451                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1452                           "data 0x%llx\n", msr, data);
1453                 return 1;
1454         }
1455
1456         return 0;
1457 }
1458
1459 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1460 {
1461         gpa_t gpa = data & ~0x3f;
1462
1463         /* Bits 2:5 are resrved, Should be zero */
1464         if (data & 0x3c)
1465                 return 1;
1466
1467         vcpu->arch.apf.msr_val = data;
1468
1469         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1470                 kvm_clear_async_pf_completion_queue(vcpu);
1471                 kvm_async_pf_hash_reset(vcpu);
1472                 return 0;
1473         }
1474
1475         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1476                 return 1;
1477
1478         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1479         kvm_async_pf_wakeup_all(vcpu);
1480         return 0;
1481 }
1482
1483 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1484 {
1485         if (vcpu->arch.time_page) {
1486                 kvm_release_page_dirty(vcpu->arch.time_page);
1487                 vcpu->arch.time_page = NULL;
1488         }
1489 }
1490
1491 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1492 {
1493         u64 delta;
1494
1495         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1496                 return;
1497
1498         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1499         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1500         vcpu->arch.st.accum_steal = delta;
1501 }
1502
1503 static void record_steal_time(struct kvm_vcpu *vcpu)
1504 {
1505         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1506                 return;
1507
1508         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1509                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1510                 return;
1511
1512         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1513         vcpu->arch.st.steal.version += 2;
1514         vcpu->arch.st.accum_steal = 0;
1515
1516         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1517                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1518 }
1519
1520 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1521 {
1522         switch (msr) {
1523         case MSR_EFER:
1524                 return set_efer(vcpu, data);
1525         case MSR_K7_HWCR:
1526                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1527                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1528                 if (data != 0) {
1529                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1530                                 data);
1531                         return 1;
1532                 }
1533                 break;
1534         case MSR_FAM10H_MMIO_CONF_BASE:
1535                 if (data != 0) {
1536                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1537                                 "0x%llx\n", data);
1538                         return 1;
1539                 }
1540                 break;
1541         case MSR_AMD64_NB_CFG:
1542                 break;
1543         case MSR_IA32_DEBUGCTLMSR:
1544                 if (!data) {
1545                         /* We support the non-activated case already */
1546                         break;
1547                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1548                         /* Values other than LBR and BTF are vendor-specific,
1549                            thus reserved and should throw a #GP */
1550                         return 1;
1551                 }
1552                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1553                         __func__, data);
1554                 break;
1555         case MSR_IA32_UCODE_REV:
1556         case MSR_IA32_UCODE_WRITE:
1557         case MSR_VM_HSAVE_PA:
1558         case MSR_AMD64_PATCH_LOADER:
1559                 break;
1560         case 0x200 ... 0x2ff:
1561                 return set_msr_mtrr(vcpu, msr, data);
1562         case MSR_IA32_APICBASE:
1563                 kvm_set_apic_base(vcpu, data);
1564                 break;
1565         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1566                 return kvm_x2apic_msr_write(vcpu, msr, data);
1567         case MSR_IA32_MISC_ENABLE:
1568                 vcpu->arch.ia32_misc_enable_msr = data;
1569                 break;
1570         case MSR_KVM_WALL_CLOCK_NEW:
1571         case MSR_KVM_WALL_CLOCK:
1572                 vcpu->kvm->arch.wall_clock = data;
1573                 kvm_write_wall_clock(vcpu->kvm, data);
1574                 break;
1575         case MSR_KVM_SYSTEM_TIME_NEW:
1576         case MSR_KVM_SYSTEM_TIME: {
1577                 kvmclock_reset(vcpu);
1578
1579                 vcpu->arch.time = data;
1580                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1581
1582                 /* we verify if the enable bit is set... */
1583                 if (!(data & 1))
1584                         break;
1585
1586                 /* ...but clean it before doing the actual write */
1587                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1588
1589                 vcpu->arch.time_page =
1590                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1591
1592                 if (is_error_page(vcpu->arch.time_page)) {
1593                         kvm_release_page_clean(vcpu->arch.time_page);
1594                         vcpu->arch.time_page = NULL;
1595                 }
1596                 break;
1597         }
1598         case MSR_KVM_ASYNC_PF_EN:
1599                 if (kvm_pv_enable_async_pf(vcpu, data))
1600                         return 1;
1601                 break;
1602         case MSR_KVM_STEAL_TIME:
1603
1604                 if (unlikely(!sched_info_on()))
1605                         return 1;
1606
1607                 if (data & KVM_STEAL_RESERVED_MASK)
1608                         return 1;
1609
1610                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1611                                                         data & KVM_STEAL_VALID_BITS))
1612                         return 1;
1613
1614                 vcpu->arch.st.msr_val = data;
1615
1616                 if (!(data & KVM_MSR_ENABLED))
1617                         break;
1618
1619                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1620
1621                 preempt_disable();
1622                 accumulate_steal_time(vcpu);
1623                 preempt_enable();
1624
1625                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1626
1627                 break;
1628
1629         case MSR_IA32_MCG_CTL:
1630         case MSR_IA32_MCG_STATUS:
1631         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1632                 return set_msr_mce(vcpu, msr, data);
1633
1634         /* Performance counters are not protected by a CPUID bit,
1635          * so we should check all of them in the generic path for the sake of
1636          * cross vendor migration.
1637          * Writing a zero into the event select MSRs disables them,
1638          * which we perfectly emulate ;-). Any other value should be at least
1639          * reported, some guests depend on them.
1640          */
1641         case MSR_P6_EVNTSEL0:
1642         case MSR_P6_EVNTSEL1:
1643         case MSR_K7_EVNTSEL0:
1644         case MSR_K7_EVNTSEL1:
1645         case MSR_K7_EVNTSEL2:
1646         case MSR_K7_EVNTSEL3:
1647                 if (data != 0)
1648                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1649                                 "0x%x data 0x%llx\n", msr, data);
1650                 break;
1651         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1652          * so we ignore writes to make it happy.
1653          */
1654         case MSR_P6_PERFCTR0:
1655         case MSR_P6_PERFCTR1:
1656         case MSR_K7_PERFCTR0:
1657         case MSR_K7_PERFCTR1:
1658         case MSR_K7_PERFCTR2:
1659         case MSR_K7_PERFCTR3:
1660                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1661                         "0x%x data 0x%llx\n", msr, data);
1662                 break;
1663         case MSR_K7_CLK_CTL:
1664                 /*
1665                  * Ignore all writes to this no longer documented MSR.
1666                  * Writes are only relevant for old K7 processors,
1667                  * all pre-dating SVM, but a recommended workaround from
1668                  * AMD for these chips. It is possible to speicify the
1669                  * affected processor models on the command line, hence
1670                  * the need to ignore the workaround.
1671                  */
1672                 break;
1673         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1674                 if (kvm_hv_msr_partition_wide(msr)) {
1675                         int r;
1676                         mutex_lock(&vcpu->kvm->lock);
1677                         r = set_msr_hyperv_pw(vcpu, msr, data);
1678                         mutex_unlock(&vcpu->kvm->lock);
1679                         return r;
1680                 } else
1681                         return set_msr_hyperv(vcpu, msr, data);
1682                 break;
1683         case MSR_IA32_BBL_CR_CTL3:
1684                 /* Drop writes to this legacy MSR -- see rdmsr
1685                  * counterpart for further detail.
1686                  */
1687                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1688                 break;
1689         default:
1690                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1691                         return xen_hvm_config(vcpu, data);
1692                 if (!ignore_msrs) {
1693                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1694                                 msr, data);
1695                         return 1;
1696                 } else {
1697                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1698                                 msr, data);
1699                         break;
1700                 }
1701         }
1702         return 0;
1703 }
1704 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1705
1706
1707 /*
1708  * Reads an msr value (of 'msr_index') into 'pdata'.
1709  * Returns 0 on success, non-0 otherwise.
1710  * Assumes vcpu_load() was already called.
1711  */
1712 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1713 {
1714         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1715 }
1716
1717 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1718 {
1719         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1720
1721         if (!msr_mtrr_valid(msr))
1722                 return 1;
1723
1724         if (msr == MSR_MTRRdefType)
1725                 *pdata = vcpu->arch.mtrr_state.def_type +
1726                          (vcpu->arch.mtrr_state.enabled << 10);
1727         else if (msr == MSR_MTRRfix64K_00000)
1728                 *pdata = p[0];
1729         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1730                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1731         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1732                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1733         else if (msr == MSR_IA32_CR_PAT)
1734                 *pdata = vcpu->arch.pat;
1735         else {  /* Variable MTRRs */
1736                 int idx, is_mtrr_mask;
1737                 u64 *pt;
1738
1739                 idx = (msr - 0x200) / 2;
1740                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1741                 if (!is_mtrr_mask)
1742                         pt =
1743                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1744                 else
1745                         pt =
1746                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1747                 *pdata = *pt;
1748         }
1749
1750         return 0;
1751 }
1752
1753 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1754 {
1755         u64 data;
1756         u64 mcg_cap = vcpu->arch.mcg_cap;
1757         unsigned bank_num = mcg_cap & 0xff;
1758
1759         switch (msr) {
1760         case MSR_IA32_P5_MC_ADDR:
1761         case MSR_IA32_P5_MC_TYPE:
1762                 data = 0;
1763                 break;
1764         case MSR_IA32_MCG_CAP:
1765                 data = vcpu->arch.mcg_cap;
1766                 break;
1767         case MSR_IA32_MCG_CTL:
1768                 if (!(mcg_cap & MCG_CTL_P))
1769                         return 1;
1770                 data = vcpu->arch.mcg_ctl;
1771                 break;
1772         case MSR_IA32_MCG_STATUS:
1773                 data = vcpu->arch.mcg_status;
1774                 break;
1775         default:
1776                 if (msr >= MSR_IA32_MC0_CTL &&
1777                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1778                         u32 offset = msr - MSR_IA32_MC0_CTL;
1779                         data = vcpu->arch.mce_banks[offset];
1780                         break;
1781                 }
1782                 return 1;
1783         }
1784         *pdata = data;
1785         return 0;
1786 }
1787
1788 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1789 {
1790         u64 data = 0;
1791         struct kvm *kvm = vcpu->kvm;
1792
1793         switch (msr) {
1794         case HV_X64_MSR_GUEST_OS_ID:
1795                 data = kvm->arch.hv_guest_os_id;
1796                 break;
1797         case HV_X64_MSR_HYPERCALL:
1798                 data = kvm->arch.hv_hypercall;
1799                 break;
1800         default:
1801                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1802                 return 1;
1803         }
1804
1805         *pdata = data;
1806         return 0;
1807 }
1808
1809 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1810 {
1811         u64 data = 0;
1812
1813         switch (msr) {
1814         case HV_X64_MSR_VP_INDEX: {
1815                 int r;
1816                 struct kvm_vcpu *v;
1817                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1818                         if (v == vcpu)
1819                                 data = r;
1820                 break;
1821         }
1822         case HV_X64_MSR_EOI:
1823                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1824         case HV_X64_MSR_ICR:
1825                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1826         case HV_X64_MSR_TPR:
1827                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1828         case HV_X64_MSR_APIC_ASSIST_PAGE:
1829                 data = vcpu->arch.hv_vapic;
1830                 break;
1831         default:
1832                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1833                 return 1;
1834         }
1835         *pdata = data;
1836         return 0;
1837 }
1838
1839 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1840 {
1841         u64 data;
1842
1843         switch (msr) {
1844         case MSR_IA32_PLATFORM_ID:
1845         case MSR_IA32_UCODE_REV:
1846         case MSR_IA32_EBL_CR_POWERON:
1847         case MSR_IA32_DEBUGCTLMSR:
1848         case MSR_IA32_LASTBRANCHFROMIP:
1849         case MSR_IA32_LASTBRANCHTOIP:
1850         case MSR_IA32_LASTINTFROMIP:
1851         case MSR_IA32_LASTINTTOIP:
1852         case MSR_K8_SYSCFG:
1853         case MSR_K7_HWCR:
1854         case MSR_VM_HSAVE_PA:
1855         case MSR_P6_PERFCTR0:
1856         case MSR_P6_PERFCTR1:
1857         case MSR_P6_EVNTSEL0:
1858         case MSR_P6_EVNTSEL1:
1859         case MSR_K7_EVNTSEL0:
1860         case MSR_K7_PERFCTR0:
1861         case MSR_K8_INT_PENDING_MSG:
1862         case MSR_AMD64_NB_CFG:
1863         case MSR_FAM10H_MMIO_CONF_BASE:
1864                 data = 0;
1865                 break;
1866         case MSR_MTRRcap:
1867                 data = 0x500 | KVM_NR_VAR_MTRR;
1868                 break;
1869         case 0x200 ... 0x2ff:
1870                 return get_msr_mtrr(vcpu, msr, pdata);
1871         case 0xcd: /* fsb frequency */
1872                 data = 3;
1873                 break;
1874                 /*
1875                  * MSR_EBC_FREQUENCY_ID
1876                  * Conservative value valid for even the basic CPU models.
1877                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1878                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1879                  * and 266MHz for model 3, or 4. Set Core Clock
1880                  * Frequency to System Bus Frequency Ratio to 1 (bits
1881                  * 31:24) even though these are only valid for CPU
1882                  * models > 2, however guests may end up dividing or
1883                  * multiplying by zero otherwise.
1884                  */
1885         case MSR_EBC_FREQUENCY_ID:
1886                 data = 1 << 24;
1887                 break;
1888         case MSR_IA32_APICBASE:
1889                 data = kvm_get_apic_base(vcpu);
1890                 break;
1891         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1892                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1893                 break;
1894         case MSR_IA32_MISC_ENABLE:
1895                 data = vcpu->arch.ia32_misc_enable_msr;
1896                 break;
1897         case MSR_IA32_PERF_STATUS:
1898                 /* TSC increment by tick */
1899                 data = 1000ULL;
1900                 /* CPU multiplier */
1901                 data |= (((uint64_t)4ULL) << 40);
1902                 break;
1903         case MSR_EFER:
1904                 data = vcpu->arch.efer;
1905                 break;
1906         case MSR_KVM_WALL_CLOCK:
1907         case MSR_KVM_WALL_CLOCK_NEW:
1908                 data = vcpu->kvm->arch.wall_clock;
1909                 break;
1910         case MSR_KVM_SYSTEM_TIME:
1911         case MSR_KVM_SYSTEM_TIME_NEW:
1912                 data = vcpu->arch.time;
1913                 break;
1914         case MSR_KVM_ASYNC_PF_EN:
1915                 data = vcpu->arch.apf.msr_val;
1916                 break;
1917         case MSR_KVM_STEAL_TIME:
1918                 data = vcpu->arch.st.msr_val;
1919                 break;
1920         case MSR_IA32_P5_MC_ADDR:
1921         case MSR_IA32_P5_MC_TYPE:
1922         case MSR_IA32_MCG_CAP:
1923         case MSR_IA32_MCG_CTL:
1924         case MSR_IA32_MCG_STATUS:
1925         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1926                 return get_msr_mce(vcpu, msr, pdata);
1927         case MSR_K7_CLK_CTL:
1928                 /*
1929                  * Provide expected ramp-up count for K7. All other
1930                  * are set to zero, indicating minimum divisors for
1931                  * every field.
1932                  *
1933                  * This prevents guest kernels on AMD host with CPU
1934                  * type 6, model 8 and higher from exploding due to
1935                  * the rdmsr failing.
1936                  */
1937                 data = 0x20000000;
1938                 break;
1939         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1940                 if (kvm_hv_msr_partition_wide(msr)) {
1941                         int r;
1942                         mutex_lock(&vcpu->kvm->lock);
1943                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1944                         mutex_unlock(&vcpu->kvm->lock);
1945                         return r;
1946                 } else
1947                         return get_msr_hyperv(vcpu, msr, pdata);
1948                 break;
1949         case MSR_IA32_BBL_CR_CTL3:
1950                 /* This legacy MSR exists but isn't fully documented in current
1951                  * silicon.  It is however accessed by winxp in very narrow
1952                  * scenarios where it sets bit #19, itself documented as
1953                  * a "reserved" bit.  Best effort attempt to source coherent
1954                  * read data here should the balance of the register be
1955                  * interpreted by the guest:
1956                  *
1957                  * L2 cache control register 3: 64GB range, 256KB size,
1958                  * enabled, latency 0x1, configured
1959                  */
1960                 data = 0xbe702111;
1961                 break;
1962         default:
1963                 if (!ignore_msrs) {
1964                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1965                         return 1;
1966                 } else {
1967                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1968                         data = 0;
1969                 }
1970                 break;
1971         }
1972         *pdata = data;
1973         return 0;
1974 }
1975 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1976
1977 /*
1978  * Read or write a bunch of msrs. All parameters are kernel addresses.
1979  *
1980  * @return number of msrs set successfully.
1981  */
1982 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1983                     struct kvm_msr_entry *entries,
1984                     int (*do_msr)(struct kvm_vcpu *vcpu,
1985                                   unsigned index, u64 *data))
1986 {
1987         int i, idx;
1988
1989         idx = srcu_read_lock(&vcpu->kvm->srcu);
1990         for (i = 0; i < msrs->nmsrs; ++i)
1991                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1992                         break;
1993         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1994
1995         return i;
1996 }
1997
1998 /*
1999  * Read or write a bunch of msrs. Parameters are user addresses.
2000  *
2001  * @return number of msrs set successfully.
2002  */
2003 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2004                   int (*do_msr)(struct kvm_vcpu *vcpu,
2005                                 unsigned index, u64 *data),
2006                   int writeback)
2007 {
2008         struct kvm_msrs msrs;
2009         struct kvm_msr_entry *entries;
2010         int r, n;
2011         unsigned size;
2012
2013         r = -EFAULT;
2014         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2015                 goto out;
2016
2017         r = -E2BIG;
2018         if (msrs.nmsrs >= MAX_IO_MSRS)
2019                 goto out;
2020
2021         r = -ENOMEM;
2022         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2023         entries = kmalloc(size, GFP_KERNEL);
2024         if (!entries)
2025                 goto out;
2026
2027         r = -EFAULT;
2028         if (copy_from_user(entries, user_msrs->entries, size))
2029                 goto out_free;
2030
2031         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2032         if (r < 0)
2033                 goto out_free;
2034
2035         r = -EFAULT;
2036         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2037                 goto out_free;
2038
2039         r = n;
2040
2041 out_free:
2042         kfree(entries);
2043 out:
2044         return r;
2045 }
2046
2047 int kvm_dev_ioctl_check_extension(long ext)
2048 {
2049         int r;
2050
2051         switch (ext) {
2052         case KVM_CAP_IRQCHIP:
2053         case KVM_CAP_HLT:
2054         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2055         case KVM_CAP_SET_TSS_ADDR:
2056         case KVM_CAP_EXT_CPUID:
2057         case KVM_CAP_CLOCKSOURCE:
2058         case KVM_CAP_PIT:
2059         case KVM_CAP_NOP_IO_DELAY:
2060         case KVM_CAP_MP_STATE:
2061         case KVM_CAP_SYNC_MMU:
2062         case KVM_CAP_USER_NMI:
2063         case KVM_CAP_REINJECT_CONTROL:
2064         case KVM_CAP_IRQ_INJECT_STATUS:
2065         case KVM_CAP_ASSIGN_DEV_IRQ:
2066         case KVM_CAP_IRQFD:
2067         case KVM_CAP_IOEVENTFD:
2068         case KVM_CAP_PIT2:
2069         case KVM_CAP_PIT_STATE2:
2070         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2071         case KVM_CAP_XEN_HVM:
2072         case KVM_CAP_ADJUST_CLOCK:
2073         case KVM_CAP_VCPU_EVENTS:
2074         case KVM_CAP_HYPERV:
2075         case KVM_CAP_HYPERV_VAPIC:
2076         case KVM_CAP_HYPERV_SPIN:
2077         case KVM_CAP_PCI_SEGMENT:
2078         case KVM_CAP_DEBUGREGS:
2079         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2080         case KVM_CAP_XSAVE:
2081         case KVM_CAP_ASYNC_PF:
2082         case KVM_CAP_GET_TSC_KHZ:
2083                 r = 1;
2084                 break;
2085         case KVM_CAP_COALESCED_MMIO:
2086                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2087                 break;
2088         case KVM_CAP_VAPIC:
2089                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2090                 break;
2091         case KVM_CAP_NR_VCPUS:
2092                 r = KVM_SOFT_MAX_VCPUS;
2093                 break;
2094         case KVM_CAP_MAX_VCPUS:
2095                 r = KVM_MAX_VCPUS;
2096                 break;
2097         case KVM_CAP_NR_MEMSLOTS:
2098                 r = KVM_MEMORY_SLOTS;
2099                 break;
2100         case KVM_CAP_PV_MMU:    /* obsolete */
2101                 r = 0;
2102                 break;
2103         case KVM_CAP_IOMMU:
2104                 r = iommu_found();
2105                 break;
2106         case KVM_CAP_MCE:
2107                 r = KVM_MAX_MCE_BANKS;
2108                 break;
2109         case KVM_CAP_XCRS:
2110                 r = cpu_has_xsave;
2111                 break;
2112         case KVM_CAP_TSC_CONTROL:
2113                 r = kvm_has_tsc_control;
2114                 break;
2115         default:
2116                 r = 0;
2117                 break;
2118         }
2119         return r;
2120
2121 }
2122
2123 long kvm_arch_dev_ioctl(struct file *filp,
2124                         unsigned int ioctl, unsigned long arg)
2125 {
2126         void __user *argp = (void __user *)arg;
2127         long r;
2128
2129         switch (ioctl) {
2130         case KVM_GET_MSR_INDEX_LIST: {
2131                 struct kvm_msr_list __user *user_msr_list = argp;
2132                 struct kvm_msr_list msr_list;
2133                 unsigned n;
2134
2135                 r = -EFAULT;
2136                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2137                         goto out;
2138                 n = msr_list.nmsrs;
2139                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2140                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2141                         goto out;
2142                 r = -E2BIG;
2143                 if (n < msr_list.nmsrs)
2144                         goto out;
2145                 r = -EFAULT;
2146                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2147                                  num_msrs_to_save * sizeof(u32)))
2148                         goto out;
2149                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2150                                  &emulated_msrs,
2151                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2152                         goto out;
2153                 r = 0;
2154                 break;
2155         }
2156         case KVM_GET_SUPPORTED_CPUID: {
2157                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2158                 struct kvm_cpuid2 cpuid;
2159
2160                 r = -EFAULT;
2161                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2162                         goto out;
2163                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2164                                                       cpuid_arg->entries);
2165                 if (r)
2166                         goto out;
2167
2168                 r = -EFAULT;
2169                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2170                         goto out;
2171                 r = 0;
2172                 break;
2173         }
2174         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2175                 u64 mce_cap;
2176
2177                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2178                 r = -EFAULT;
2179                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2180                         goto out;
2181                 r = 0;
2182                 break;
2183         }
2184         default:
2185                 r = -EINVAL;
2186         }
2187 out:
2188         return r;
2189 }
2190
2191 static void wbinvd_ipi(void *garbage)
2192 {
2193         wbinvd();
2194 }
2195
2196 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2197 {
2198         return vcpu->kvm->arch.iommu_domain &&
2199                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2200 }
2201
2202 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2203 {
2204         /* Address WBINVD may be executed by guest */
2205         if (need_emulate_wbinvd(vcpu)) {
2206                 if (kvm_x86_ops->has_wbinvd_exit())
2207                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2208                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2209                         smp_call_function_single(vcpu->cpu,
2210                                         wbinvd_ipi, NULL, 1);
2211         }
2212
2213         kvm_x86_ops->vcpu_load(vcpu, cpu);
2214         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2215                 /* Make sure TSC doesn't go backwards */
2216                 s64 tsc_delta;
2217                 u64 tsc;
2218
2219                 kvm_get_msr(vcpu, MSR_IA32_TSC, &tsc);
2220                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2221                              tsc - vcpu->arch.last_guest_tsc;
2222
2223                 if (tsc_delta < 0)
2224                         mark_tsc_unstable("KVM discovered backwards TSC");
2225                 if (check_tsc_unstable()) {
2226                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2227                         vcpu->arch.tsc_catchup = 1;
2228                 }
2229                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2230                 if (vcpu->cpu != cpu)
2231                         kvm_migrate_timers(vcpu);
2232                 vcpu->cpu = cpu;
2233         }
2234
2235         accumulate_steal_time(vcpu);
2236         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2237 }
2238
2239 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2240 {
2241         kvm_x86_ops->vcpu_put(vcpu);
2242         kvm_put_guest_fpu(vcpu);
2243         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
2244 }
2245
2246 static int is_efer_nx(void)
2247 {
2248         unsigned long long efer = 0;
2249
2250         rdmsrl_safe(MSR_EFER, &efer);
2251         return efer & EFER_NX;
2252 }
2253
2254 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2255 {
2256         int i;
2257         struct kvm_cpuid_entry2 *e, *entry;
2258
2259         entry = NULL;
2260         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2261                 e = &vcpu->arch.cpuid_entries[i];
2262                 if (e->function == 0x80000001) {
2263                         entry = e;
2264                         break;
2265                 }
2266         }
2267         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2268                 entry->edx &= ~(1 << 20);
2269                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2270         }
2271 }
2272
2273 /* when an old userspace process fills a new kernel module */
2274 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2275                                     struct kvm_cpuid *cpuid,
2276                                     struct kvm_cpuid_entry __user *entries)
2277 {
2278         int r, i;
2279         struct kvm_cpuid_entry *cpuid_entries;
2280
2281         r = -E2BIG;
2282         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2283                 goto out;
2284         r = -ENOMEM;
2285         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2286         if (!cpuid_entries)
2287                 goto out;
2288         r = -EFAULT;
2289         if (copy_from_user(cpuid_entries, entries,
2290                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2291                 goto out_free;
2292         for (i = 0; i < cpuid->nent; i++) {
2293                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2294                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2295                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2296                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2297                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2298                 vcpu->arch.cpuid_entries[i].index = 0;
2299                 vcpu->arch.cpuid_entries[i].flags = 0;
2300                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2301                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2302                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2303         }
2304         vcpu->arch.cpuid_nent = cpuid->nent;
2305         cpuid_fix_nx_cap(vcpu);
2306         r = 0;
2307         kvm_apic_set_version(vcpu);
2308         kvm_x86_ops->cpuid_update(vcpu);
2309         update_cpuid(vcpu);
2310
2311 out_free:
2312         vfree(cpuid_entries);
2313 out:
2314         return r;
2315 }
2316
2317 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2318                                      struct kvm_cpuid2 *cpuid,
2319                                      struct kvm_cpuid_entry2 __user *entries)
2320 {
2321         int r;
2322
2323         r = -E2BIG;
2324         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2325                 goto out;
2326         r = -EFAULT;
2327         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2328                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2329                 goto out;
2330         vcpu->arch.cpuid_nent = cpuid->nent;
2331         kvm_apic_set_version(vcpu);
2332         kvm_x86_ops->cpuid_update(vcpu);
2333         update_cpuid(vcpu);
2334         return 0;
2335
2336 out:
2337         return r;
2338 }
2339
2340 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2341                                      struct kvm_cpuid2 *cpuid,
2342                                      struct kvm_cpuid_entry2 __user *entries)
2343 {
2344         int r;
2345
2346         r = -E2BIG;
2347         if (cpuid->nent < vcpu->arch.cpuid_nent)
2348                 goto out;
2349         r = -EFAULT;
2350         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2351                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2352                 goto out;
2353         return 0;
2354
2355 out:
2356         cpuid->nent = vcpu->arch.cpuid_nent;
2357         return r;
2358 }
2359
2360 static void cpuid_mask(u32 *word, int wordnum)
2361 {
2362         *word &= boot_cpu_data.x86_capability[wordnum];
2363 }
2364
2365 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2366                            u32 index)
2367 {
2368         entry->function = function;
2369         entry->index = index;
2370         cpuid_count(entry->function, entry->index,
2371                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2372         entry->flags = 0;
2373 }
2374
2375 static bool supported_xcr0_bit(unsigned bit)
2376 {
2377         u64 mask = ((u64)1 << bit);
2378
2379         return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2380 }
2381
2382 #define F(x) bit(X86_FEATURE_##x)
2383
2384 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2385                          u32 index, int *nent, int maxnent)
2386 {
2387         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2388 #ifdef CONFIG_X86_64
2389         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2390                                 ? F(GBPAGES) : 0;
2391         unsigned f_lm = F(LM);
2392 #else
2393         unsigned f_gbpages = 0;
2394         unsigned f_lm = 0;
2395 #endif
2396         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2397
2398         /* cpuid 1.edx */
2399         const u32 kvm_supported_word0_x86_features =
2400                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2401                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2402                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2403                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2404                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2405                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2406                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2407                 0 /* HTT, TM, Reserved, PBE */;
2408         /* cpuid 0x80000001.edx */
2409         const u32 kvm_supported_word1_x86_features =
2410                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2411                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2412                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2413                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2414                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2415                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2416                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2417                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2418         /* cpuid 1.ecx */
2419         const u32 kvm_supported_word4_x86_features =
2420                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2421                 0 /* DS-CPL, VMX, SMX, EST */ |
2422                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2423                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2424                 0 /* Reserved, DCA */ | F(XMM4_1) |
2425                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2426                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2427                 F(F16C) | F(RDRAND);
2428         /* cpuid 0x80000001.ecx */
2429         const u32 kvm_supported_word6_x86_features =
2430                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2431                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2432                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2433                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2434
2435         /* cpuid 0xC0000001.edx */
2436         const u32 kvm_supported_word5_x86_features =
2437                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2438                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2439                 F(PMM) | F(PMM_EN);
2440
2441         /* cpuid 7.0.ebx */
2442         const u32 kvm_supported_word9_x86_features =
2443                 F(SMEP) | F(FSGSBASE) | F(ERMS);
2444
2445         /* all calls to cpuid_count() should be made on the same cpu */
2446         get_cpu();
2447         do_cpuid_1_ent(entry, function, index);
2448         ++*nent;
2449
2450         switch (function) {
2451         case 0:
2452                 entry->eax = min(entry->eax, (u32)0xd);
2453                 break;
2454         case 1:
2455                 entry->edx &= kvm_supported_word0_x86_features;
2456                 cpuid_mask(&entry->edx, 0);
2457                 entry->ecx &= kvm_supported_word4_x86_features;
2458                 cpuid_mask(&entry->ecx, 4);
2459                 /* we support x2apic emulation even if host does not support
2460                  * it since we emulate x2apic in software */
2461                 entry->ecx |= F(X2APIC);
2462                 break;
2463         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2464          * may return different values. This forces us to get_cpu() before
2465          * issuing the first command, and also to emulate this annoying behavior
2466          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2467         case 2: {
2468                 int t, times = entry->eax & 0xff;
2469
2470                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2471                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2472                 for (t = 1; t < times && *nent < maxnent; ++t) {
2473                         do_cpuid_1_ent(&entry[t], function, 0);
2474                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2475                         ++*nent;
2476                 }
2477                 break;
2478         }
2479         /* function 4 has additional index. */
2480         case 4: {
2481                 int i, cache_type;
2482
2483                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2484                 /* read more entries until cache_type is zero */
2485                 for (i = 1; *nent < maxnent; ++i) {
2486                         cache_type = entry[i - 1].eax & 0x1f;
2487                         if (!cache_type)
2488                                 break;
2489                         do_cpuid_1_ent(&entry[i], function, i);
2490                         entry[i].flags |=
2491                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2492                         ++*nent;
2493                 }
2494                 break;
2495         }
2496         case 7: {
2497                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2498                 /* Mask ebx against host capbability word 9 */
2499                 if (index == 0) {
2500                         entry->ebx &= kvm_supported_word9_x86_features;
2501                         cpuid_mask(&entry->ebx, 9);
2502                 } else
2503                         entry->ebx = 0;
2504                 entry->eax = 0;
2505                 entry->ecx = 0;
2506                 entry->edx = 0;
2507                 break;
2508         }
2509         case 9:
2510                 break;
2511         /* function 0xb has additional index. */
2512         case 0xb: {
2513                 int i, level_type;
2514
2515                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2516                 /* read more entries until level_type is zero */
2517                 for (i = 1; *nent < maxnent; ++i) {
2518                         level_type = entry[i - 1].ecx & 0xff00;
2519                         if (!level_type)
2520                                 break;
2521                         do_cpuid_1_ent(&entry[i], function, i);
2522                         entry[i].flags |=
2523                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2524                         ++*nent;
2525                 }
2526                 break;
2527         }
2528         case 0xd: {
2529                 int idx, i;
2530
2531                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2532                 for (idx = 1, i = 1; *nent < maxnent && idx < 64; ++idx) {
2533                         do_cpuid_1_ent(&entry[i], function, idx);
2534                         if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
2535                                 continue;
2536                         entry[i].flags |=
2537                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2538                         ++*nent;
2539                         ++i;
2540                 }
2541                 break;
2542         }
2543         case KVM_CPUID_SIGNATURE: {
2544                 char signature[12] = "KVMKVMKVM\0\0";
2545                 u32 *sigptr = (u32 *)signature;
2546                 entry->eax = 0;
2547                 entry->ebx = sigptr[0];
2548                 entry->ecx = sigptr[1];
2549                 entry->edx = sigptr[2];
2550                 break;
2551         }
2552         case KVM_CPUID_FEATURES:
2553                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2554                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2555                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2556                              (1 << KVM_FEATURE_ASYNC_PF) |
2557                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2558
2559                 if (sched_info_on())
2560                         entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
2561
2562                 entry->ebx = 0;
2563                 entry->ecx = 0;
2564                 entry->edx = 0;
2565                 break;
2566         case 0x80000000:
2567                 entry->eax = min(entry->eax, 0x8000001a);
2568                 break;
2569         case 0x80000001:
2570                 entry->edx &= kvm_supported_word1_x86_features;
2571                 cpuid_mask(&entry->edx, 1);
2572                 entry->ecx &= kvm_supported_word6_x86_features;
2573                 cpuid_mask(&entry->ecx, 6);
2574                 break;
2575         case 0x80000008: {
2576                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2577                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2578                 unsigned phys_as = entry->eax & 0xff;
2579
2580                 if (!g_phys_as)
2581                         g_phys_as = phys_as;
2582                 entry->eax = g_phys_as | (virt_as << 8);
2583                 entry->ebx = entry->edx = 0;
2584                 break;
2585         }
2586         case 0x80000019:
2587                 entry->ecx = entry->edx = 0;
2588                 break;
2589         case 0x8000001a:
2590                 break;
2591         case 0x8000001d:
2592                 break;
2593         /*Add support for Centaur's CPUID instruction*/
2594         case 0xC0000000:
2595                 /*Just support up to 0xC0000004 now*/
2596                 entry->eax = min(entry->eax, 0xC0000004);
2597                 break;
2598         case 0xC0000001:
2599                 entry->edx &= kvm_supported_word5_x86_features;
2600                 cpuid_mask(&entry->edx, 5);
2601                 break;
2602         case 3: /* Processor serial number */
2603         case 5: /* MONITOR/MWAIT */
2604         case 6: /* Thermal management */
2605         case 0xA: /* Architectural Performance Monitoring */
2606         case 0x80000007: /* Advanced power management */
2607         case 0xC0000002:
2608         case 0xC0000003:
2609         case 0xC0000004:
2610         default:
2611                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2612                 break;
2613         }
2614
2615         kvm_x86_ops->set_supported_cpuid(function, entry);
2616
2617         put_cpu();
2618 }
2619
2620 #undef F
2621
2622 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2623                                      struct kvm_cpuid_entry2 __user *entries)
2624 {
2625         struct kvm_cpuid_entry2 *cpuid_entries;
2626         int limit, nent = 0, r = -E2BIG;
2627         u32 func;
2628
2629         if (cpuid->nent < 1)
2630                 goto out;
2631         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2632                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2633         r = -ENOMEM;
2634         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2635         if (!cpuid_entries)
2636                 goto out;
2637
2638         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2639         limit = cpuid_entries[0].eax;
2640         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2641                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2642                              &nent, cpuid->nent);
2643         r = -E2BIG;
2644         if (nent >= cpuid->nent)
2645                 goto out_free;
2646
2647         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2648         limit = cpuid_entries[nent - 1].eax;
2649         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2650                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2651                              &nent, cpuid->nent);
2652
2653
2654
2655         r = -E2BIG;
2656         if (nent >= cpuid->nent)
2657                 goto out_free;
2658
2659         /* Add support for Centaur's CPUID instruction. */
2660         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2661                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2662                                 &nent, cpuid->nent);
2663
2664                 r = -E2BIG;
2665                 if (nent >= cpuid->nent)
2666                         goto out_free;
2667
2668                 limit = cpuid_entries[nent - 1].eax;
2669                 for (func = 0xC0000001;
2670                         func <= limit && nent < cpuid->nent; ++func)
2671                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2672                                         &nent, cpuid->nent);
2673
2674                 r = -E2BIG;
2675                 if (nent >= cpuid->nent)
2676                         goto out_free;
2677         }
2678
2679         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2680                      cpuid->nent);
2681
2682         r = -E2BIG;
2683         if (nent >= cpuid->nent)
2684                 goto out_free;
2685
2686         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2687                      cpuid->nent);
2688
2689         r = -E2BIG;
2690         if (nent >= cpuid->nent)
2691                 goto out_free;
2692
2693         r = -EFAULT;
2694         if (copy_to_user(entries, cpuid_entries,
2695                          nent * sizeof(struct kvm_cpuid_entry2)))
2696                 goto out_free;
2697         cpuid->nent = nent;
2698         r = 0;
2699
2700 out_free:
2701         vfree(cpuid_entries);
2702 out:
2703         return r;
2704 }
2705
2706 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2707                                     struct kvm_lapic_state *s)
2708 {
2709         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2710
2711         return 0;
2712 }
2713
2714 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2715                                     struct kvm_lapic_state *s)
2716 {
2717         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2718         kvm_apic_post_state_restore(vcpu);
2719         update_cr8_intercept(vcpu);
2720
2721         return 0;
2722 }
2723
2724 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2725                                     struct kvm_interrupt *irq)
2726 {
2727         if (irq->irq < 0 || irq->irq >= 256)
2728                 return -EINVAL;
2729         if (irqchip_in_kernel(vcpu->kvm))
2730                 return -ENXIO;
2731
2732         kvm_queue_interrupt(vcpu, irq->irq, false);
2733         kvm_make_request(KVM_REQ_EVENT, vcpu);
2734
2735         return 0;
2736 }
2737
2738 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2739 {
2740         kvm_inject_nmi(vcpu);
2741
2742         return 0;
2743 }
2744
2745 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2746                                            struct kvm_tpr_access_ctl *tac)
2747 {
2748         if (tac->flags)
2749                 return -EINVAL;
2750         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2751         return 0;
2752 }
2753
2754 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2755                                         u64 mcg_cap)
2756 {
2757         int r;
2758         unsigned bank_num = mcg_cap & 0xff, bank;
2759
2760         r = -EINVAL;
2761         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2762                 goto out;
2763         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2764                 goto out;
2765         r = 0;
2766         vcpu->arch.mcg_cap = mcg_cap;
2767         /* Init IA32_MCG_CTL to all 1s */
2768         if (mcg_cap & MCG_CTL_P)
2769                 vcpu->arch.mcg_ctl = ~(u64)0;
2770         /* Init IA32_MCi_CTL to all 1s */
2771         for (bank = 0; bank < bank_num; bank++)
2772                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2773 out:
2774         return r;
2775 }
2776
2777 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2778                                       struct kvm_x86_mce *mce)
2779 {
2780         u64 mcg_cap = vcpu->arch.mcg_cap;
2781         unsigned bank_num = mcg_cap & 0xff;
2782         u64 *banks = vcpu->arch.mce_banks;
2783
2784         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2785                 return -EINVAL;
2786         /*
2787          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2788          * reporting is disabled
2789          */
2790         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2791             vcpu->arch.mcg_ctl != ~(u64)0)
2792                 return 0;
2793         banks += 4 * mce->bank;
2794         /*
2795          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2796          * reporting is disabled for the bank
2797          */
2798         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2799                 return 0;
2800         if (mce->status & MCI_STATUS_UC) {
2801                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2802                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2803                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2804                         return 0;
2805                 }
2806                 if (banks[1] & MCI_STATUS_VAL)
2807                         mce->status |= MCI_STATUS_OVER;
2808                 banks[2] = mce->addr;
2809                 banks[3] = mce->misc;
2810                 vcpu->arch.mcg_status = mce->mcg_status;
2811                 banks[1] = mce->status;
2812                 kvm_queue_exception(vcpu, MC_VECTOR);
2813         } else if (!(banks[1] & MCI_STATUS_VAL)
2814                    || !(banks[1] & MCI_STATUS_UC)) {
2815                 if (banks[1] & MCI_STATUS_VAL)
2816                         mce->status |= MCI_STATUS_OVER;
2817                 banks[2] = mce->addr;
2818                 banks[3] = mce->misc;
2819                 banks[1] = mce->status;
2820         } else
2821                 banks[1] |= MCI_STATUS_OVER;
2822         return 0;
2823 }
2824
2825 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2826                                                struct kvm_vcpu_events *events)
2827 {
2828         events->exception.injected =
2829                 vcpu->arch.exception.pending &&
2830                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2831         events->exception.nr = vcpu->arch.exception.nr;
2832         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2833         events->exception.pad = 0;
2834         events->exception.error_code = vcpu->arch.exception.error_code;
2835
2836         events->interrupt.injected =
2837                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2838         events->interrupt.nr = vcpu->arch.interrupt.nr;
2839         events->interrupt.soft = 0;
2840         events->interrupt.shadow =
2841                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2842                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2843
2844         events->nmi.injected = vcpu->arch.nmi_injected;
2845         events->nmi.pending = vcpu->arch.nmi_pending;
2846         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2847         events->nmi.pad = 0;
2848
2849         events->sipi_vector = vcpu->arch.sipi_vector;
2850
2851         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2852                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2853                          | KVM_VCPUEVENT_VALID_SHADOW);
2854         memset(&events->reserved, 0, sizeof(events->reserved));
2855 }
2856
2857 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2858                                               struct kvm_vcpu_events *events)
2859 {
2860         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2861                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2862                               | KVM_VCPUEVENT_VALID_SHADOW))
2863                 return -EINVAL;
2864
2865         vcpu->arch.exception.pending = events->exception.injected;
2866         vcpu->arch.exception.nr = events->exception.nr;
2867         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2868         vcpu->arch.exception.error_code = events->exception.error_code;
2869
2870         vcpu->arch.interrupt.pending = events->interrupt.injected;
2871         vcpu->arch.interrupt.nr = events->interrupt.nr;
2872         vcpu->arch.interrupt.soft = events->interrupt.soft;
2873         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2874                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2875                                                   events->interrupt.shadow);
2876
2877         vcpu->arch.nmi_injected = events->nmi.injected;
2878         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2879                 vcpu->arch.nmi_pending = events->nmi.pending;
2880         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2881
2882         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2883                 vcpu->arch.sipi_vector = events->sipi_vector;
2884
2885         kvm_make_request(KVM_REQ_EVENT, vcpu);
2886
2887         return 0;
2888 }
2889
2890 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2891                                              struct kvm_debugregs *dbgregs)
2892 {
2893         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2894         dbgregs->dr6 = vcpu->arch.dr6;
2895         dbgregs->dr7 = vcpu->arch.dr7;
2896         dbgregs->flags = 0;
2897         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2898 }
2899
2900 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2901                                             struct kvm_debugregs *dbgregs)
2902 {
2903         if (dbgregs->flags)
2904                 return -EINVAL;
2905
2906         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2907         vcpu->arch.dr6 = dbgregs->dr6;
2908         vcpu->arch.dr7 = dbgregs->dr7;
2909
2910         return 0;
2911 }
2912
2913 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2914                                          struct kvm_xsave *guest_xsave)
2915 {
2916         if (cpu_has_xsave)
2917                 memcpy(guest_xsave->region,
2918                         &vcpu->arch.guest_fpu.state->xsave,
2919                         xstate_size);
2920         else {
2921                 memcpy(guest_xsave->region,
2922                         &vcpu->arch.guest_fpu.state->fxsave,
2923                         sizeof(struct i387_fxsave_struct));
2924                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2925                         XSTATE_FPSSE;
2926         }
2927 }
2928
2929 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2930                                         struct kvm_xsave *guest_xsave)
2931 {
2932         u64 xstate_bv =
2933                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2934
2935         if (cpu_has_xsave)
2936                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2937                         guest_xsave->region, xstate_size);
2938         else {
2939                 if (xstate_bv & ~XSTATE_FPSSE)
2940                         return -EINVAL;
2941                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2942                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2943         }
2944         return 0;
2945 }
2946
2947 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2948                                         struct kvm_xcrs *guest_xcrs)
2949 {
2950         if (!cpu_has_xsave) {
2951                 guest_xcrs->nr_xcrs = 0;
2952                 return;
2953         }
2954
2955         guest_xcrs->nr_xcrs = 1;
2956         guest_xcrs->flags = 0;
2957         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2958         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2959 }
2960
2961 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2962                                        struct kvm_xcrs *guest_xcrs)
2963 {
2964         int i, r = 0;
2965
2966         if (!cpu_has_xsave)
2967                 return -EINVAL;
2968
2969         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2970                 return -EINVAL;
2971
2972         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2973                 /* Only support XCR0 currently */
2974                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2975                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2976                                 guest_xcrs->xcrs[0].value);
2977                         break;
2978                 }
2979         if (r)
2980                 r = -EINVAL;
2981         return r;
2982 }
2983
2984 long kvm_arch_vcpu_ioctl(struct file *filp,
2985                          unsigned int ioctl, unsigned long arg)
2986 {
2987         struct kvm_vcpu *vcpu = filp->private_data;
2988         void __user *argp = (void __user *)arg;
2989         int r;
2990         union {
2991                 struct kvm_lapic_state *lapic;
2992                 struct kvm_xsave *xsave;
2993                 struct kvm_xcrs *xcrs;
2994                 void *buffer;
2995         } u;
2996
2997         u.buffer = NULL;
2998         switch (ioctl) {
2999         case KVM_GET_LAPIC: {
3000                 r = -EINVAL;
3001                 if (!vcpu->arch.apic)
3002                         goto out;
3003                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3004
3005                 r = -ENOMEM;
3006                 if (!u.lapic)
3007                         goto out;
3008                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3009                 if (r)
3010                         goto out;
3011                 r = -EFAULT;
3012                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3013                         goto out;
3014                 r = 0;
3015                 break;
3016         }
3017         case KVM_SET_LAPIC: {
3018                 r = -EINVAL;
3019                 if (!vcpu->arch.apic)
3020                         goto out;
3021                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3022                 r = -ENOMEM;
3023                 if (!u.lapic)
3024                         goto out;
3025                 r = -EFAULT;
3026                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
3027                         goto out;
3028                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3029                 if (r)
3030                         goto out;
3031                 r = 0;
3032                 break;
3033         }
3034         case KVM_INTERRUPT: {
3035                 struct kvm_interrupt irq;
3036
3037                 r = -EFAULT;
3038                 if (copy_from_user(&irq, argp, sizeof irq))
3039                         goto out;
3040                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3041                 if (r)
3042                         goto out;
3043                 r = 0;
3044                 break;
3045         }
3046         case KVM_NMI: {
3047                 r = kvm_vcpu_ioctl_nmi(vcpu);
3048                 if (r)
3049                         goto out;
3050                 r = 0;
3051                 break;
3052         }
3053         case KVM_SET_CPUID: {
3054                 struct kvm_cpuid __user *cpuid_arg = argp;
3055                 struct kvm_cpuid cpuid;
3056
3057                 r = -EFAULT;
3058                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3059                         goto out;
3060                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3061                 if (r)
3062                         goto out;
3063                 break;
3064         }
3065         case KVM_SET_CPUID2: {
3066                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3067                 struct kvm_cpuid2 cpuid;
3068
3069                 r = -EFAULT;
3070                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3071                         goto out;
3072                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3073                                               cpuid_arg->entries);
3074                 if (r)
3075                         goto out;
3076                 break;
3077         }
3078         case KVM_GET_CPUID2: {
3079                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3080                 struct kvm_cpuid2 cpuid;
3081
3082                 r = -EFAULT;
3083                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3084                         goto out;
3085                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3086                                               cpuid_arg->entries);
3087                 if (r)
3088                         goto out;
3089                 r = -EFAULT;
3090                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3091                         goto out;
3092                 r = 0;
3093                 break;
3094         }
3095         case KVM_GET_MSRS:
3096                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3097                 break;
3098         case KVM_SET_MSRS:
3099                 r = msr_io(vcpu, argp, do_set_msr, 0);
3100                 break;
3101         case KVM_TPR_ACCESS_REPORTING: {
3102                 struct kvm_tpr_access_ctl tac;
3103
3104                 r = -EFAULT;
3105                 if (copy_from_user(&tac, argp, sizeof tac))
3106                         goto out;
3107                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3108                 if (r)
3109                         goto out;
3110                 r = -EFAULT;
3111                 if (copy_to_user(argp, &tac, sizeof tac))
3112                         goto out;
3113                 r = 0;
3114                 break;
3115         };
3116         case KVM_SET_VAPIC_ADDR: {
3117                 struct kvm_vapic_addr va;
3118
3119                 r = -EINVAL;
3120                 if (!irqchip_in_kernel(vcpu->kvm))
3121                         goto out;
3122                 r = -EFAULT;
3123                 if (copy_from_user(&va, argp, sizeof va))
3124                         goto out;
3125                 r = 0;
3126                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3127                 break;
3128         }
3129         case KVM_X86_SETUP_MCE: {
3130                 u64 mcg_cap;
3131
3132                 r = -EFAULT;
3133                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3134                         goto out;
3135                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3136                 break;
3137         }
3138         case KVM_X86_SET_MCE: {
3139                 struct kvm_x86_mce mce;
3140
3141                 r = -EFAULT;
3142                 if (copy_from_user(&mce, argp, sizeof mce))
3143                         goto out;
3144                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3145                 break;
3146         }
3147         case KVM_GET_VCPU_EVENTS: {
3148                 struct kvm_vcpu_events events;
3149
3150                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3151
3152                 r = -EFAULT;
3153                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3154                         break;
3155                 r = 0;
3156                 break;
3157         }
3158         case KVM_SET_VCPU_EVENTS: {
3159                 struct kvm_vcpu_events events;
3160
3161                 r = -EFAULT;
3162                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3163                         break;
3164
3165                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3166                 break;
3167         }
3168         case KVM_GET_DEBUGREGS: {
3169                 struct kvm_debugregs dbgregs;
3170
3171                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3172
3173                 r = -EFAULT;
3174                 if (copy_to_user(argp, &dbgregs,
3175                                  sizeof(struct kvm_debugregs)))
3176                         break;
3177                 r = 0;
3178                 break;
3179         }
3180         case KVM_SET_DEBUGREGS: {
3181                 struct kvm_debugregs dbgregs;
3182
3183                 r = -EFAULT;
3184                 if (copy_from_user(&dbgregs, argp,
3185                                    sizeof(struct kvm_debugregs)))
3186                         break;
3187
3188                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3189                 break;
3190         }
3191         case KVM_GET_XSAVE: {
3192                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3193                 r = -ENOMEM;
3194                 if (!u.xsave)
3195                         break;
3196
3197                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3198
3199                 r = -EFAULT;
3200                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3201                         break;
3202                 r = 0;
3203                 break;
3204         }
3205         case KVM_SET_XSAVE: {
3206                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3207                 r = -ENOMEM;
3208                 if (!u.xsave)
3209                         break;
3210
3211                 r = -EFAULT;
3212                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3213                         break;
3214
3215                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3216                 break;
3217         }
3218         case KVM_GET_XCRS: {
3219                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3220                 r = -ENOMEM;
3221                 if (!u.xcrs)
3222                         break;
3223
3224                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3225
3226                 r = -EFAULT;
3227                 if (copy_to_user(argp, u.xcrs,
3228                                  sizeof(struct kvm_xcrs)))
3229                         break;
3230                 r = 0;
3231                 break;
3232         }
3233         case KVM_SET_XCRS: {
3234                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3235                 r = -ENOMEM;
3236                 if (!u.xcrs)
3237                         break;
3238
3239                 r = -EFAULT;
3240                 if (copy_from_user(u.xcrs, argp,
3241                                    sizeof(struct kvm_xcrs)))
3242                         break;
3243
3244                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3245                 break;
3246         }
3247         case KVM_SET_TSC_KHZ: {
3248                 u32 user_tsc_khz;
3249
3250                 r = -EINVAL;
3251                 if (!kvm_has_tsc_control)
3252                         break;
3253
3254                 user_tsc_khz = (u32)arg;
3255
3256                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3257                         goto out;
3258
3259                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3260
3261                 r = 0;
3262                 goto out;
3263         }
3264         case KVM_GET_TSC_KHZ: {
3265                 r = -EIO;
3266                 if (check_tsc_unstable())
3267                         goto out;
3268
3269                 r = vcpu_tsc_khz(vcpu);
3270
3271                 goto out;
3272         }
3273         default:
3274                 r = -EINVAL;
3275         }
3276 out:
3277         kfree(u.buffer);
3278         return r;
3279 }
3280
3281 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3282 {
3283         int ret;
3284
3285         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3286                 return -1;
3287         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3288         return ret;
3289 }
3290
3291 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3292                                               u64 ident_addr)
3293 {
3294         kvm->arch.ept_identity_map_addr = ident_addr;
3295         return 0;
3296 }
3297
3298 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3299                                           u32 kvm_nr_mmu_pages)
3300 {
3301         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3302                 return -EINVAL;
3303
3304         mutex_lock(&kvm->slots_lock);
3305         spin_lock(&kvm->mmu_lock);
3306
3307         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3308         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3309
3310         spin_unlock(&kvm->mmu_lock);
3311         mutex_unlock(&kvm->slots_lock);
3312         return 0;
3313 }
3314
3315 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3316 {
3317         return kvm->arch.n_max_mmu_pages;
3318 }
3319
3320 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3321 {
3322         int r;
3323
3324         r = 0;
3325         switch (chip->chip_id) {
3326         case KVM_IRQCHIP_PIC_MASTER:
3327                 memcpy(&chip->chip.pic,
3328                         &pic_irqchip(kvm)->pics[0],
3329                         sizeof(struct kvm_pic_state));
3330                 break;
3331         case KVM_IRQCHIP_PIC_SLAVE:
3332                 memcpy(&chip->chip.pic,
3333                         &pic_irqchip(kvm)->pics[1],
3334                         sizeof(struct kvm_pic_state));
3335                 break;
3336         case KVM_IRQCHIP_IOAPIC:
3337                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3338                 break;
3339         default:
3340                 r = -EINVAL;
3341                 break;
3342         }
3343         return r;
3344 }
3345
3346 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3347 {
3348         int r;
3349
3350         r = 0;
3351         switch (chip->chip_id) {
3352         case KVM_IRQCHIP_PIC_MASTER:
3353                 spin_lock(&pic_irqchip(kvm)->lock);
3354                 memcpy(&pic_irqchip(kvm)->pics[0],
3355                         &chip->chip.pic,
3356                         sizeof(struct kvm_pic_state));
3357                 spin_unlock(&pic_irqchip(kvm)->lock);
3358                 break;
3359         case KVM_IRQCHIP_PIC_SLAVE:
3360                 spin_lock(&pic_irqchip(kvm)->lock);
3361                 memcpy(&pic_irqchip(kvm)->pics[1],
3362                         &chip->chip.pic,
3363                         sizeof(struct kvm_pic_state));
3364                 spin_unlock(&pic_irqchip(kvm)->lock);
3365                 break;
3366         case KVM_IRQCHIP_IOAPIC:
3367                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3368                 break;
3369         default:
3370                 r = -EINVAL;
3371                 break;
3372         }
3373         kvm_pic_update_irq(pic_irqchip(kvm));
3374         return r;
3375 }
3376
3377 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3378 {
3379         int r = 0;
3380
3381         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3382         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3383         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3384         return r;
3385 }
3386
3387 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3388 {
3389         int r = 0;
3390
3391         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3392         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3393         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3394         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3395         return r;
3396 }
3397
3398 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3399 {
3400         int r = 0;
3401
3402         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3403         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3404                 sizeof(ps->channels));
3405         ps->flags = kvm->arch.vpit->pit_state.flags;
3406         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3407         memset(&ps->reserved, 0, sizeof(ps->reserved));
3408         return r;
3409 }
3410
3411 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3412 {
3413         int r = 0, start = 0;
3414         u32 prev_legacy, cur_legacy;
3415         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3416         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3417         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3418         if (!prev_legacy && cur_legacy)
3419                 start = 1;
3420         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3421                sizeof(kvm->arch.vpit->pit_state.channels));
3422         kvm->arch.vpit->pit_state.flags = ps->flags;
3423         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3424         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3425         return r;
3426 }
3427
3428 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3429                                  struct kvm_reinject_control *control)
3430 {
3431         if (!kvm->arch.vpit)
3432                 return -ENXIO;
3433         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3434         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3435         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3436         return 0;
3437 }
3438
3439 /*
3440  * Get (and clear) the dirty memory log for a memory slot.
3441  */
3442 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3443                                       struct kvm_dirty_log *log)
3444 {
3445         int r, i;
3446         struct kvm_memory_slot *memslot;
3447         unsigned long n;
3448         unsigned long is_dirty = 0;
3449
3450         mutex_lock(&kvm->slots_lock);
3451
3452         r = -EINVAL;
3453         if (log->slot >= KVM_MEMORY_SLOTS)
3454                 goto out;
3455
3456         memslot = &kvm->memslots->memslots[log->slot];
3457         r = -ENOENT;
3458         if (!memslot->dirty_bitmap)
3459                 goto out;
3460
3461         n = kvm_dirty_bitmap_bytes(memslot);
3462
3463         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3464                 is_dirty = memslot->dirty_bitmap[i];
3465
3466         /* If nothing is dirty, don't bother messing with page tables. */
3467         if (is_dirty) {
3468                 struct kvm_memslots *slots, *old_slots;
3469                 unsigned long *dirty_bitmap;
3470
3471                 dirty_bitmap = memslot->dirty_bitmap_head;
3472                 if (memslot->dirty_bitmap == dirty_bitmap)
3473                         dirty_bitmap += n / sizeof(long);
3474                 memset(dirty_bitmap, 0, n);
3475
3476                 r = -ENOMEM;
3477                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3478                 if (!slots)
3479                         goto out;
3480                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3481                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3482                 slots->generation++;
3483
3484                 old_slots = kvm->memslots;
3485                 rcu_assign_pointer(kvm->memslots, slots);
3486                 synchronize_srcu_expedited(&kvm->srcu);
3487                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3488                 kfree(old_slots);
3489
3490                 spin_lock(&kvm->mmu_lock);
3491                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3492                 spin_unlock(&kvm->mmu_lock);
3493
3494                 r = -EFAULT;
3495                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3496                         goto out;
3497         } else {
3498                 r = -EFAULT;
3499                 if (clear_user(log->dirty_bitmap, n))
3500                         goto out;
3501         }
3502
3503         r = 0;
3504 out:
3505         mutex_unlock(&kvm->slots_lock);
3506         return r;
3507 }
3508
3509 long kvm_arch_vm_ioctl(struct file *filp,
3510                        unsigned int ioctl, unsigned long arg)
3511 {
3512         struct kvm *kvm = filp->private_data;
3513         void __user *argp = (void __user *)arg;
3514         int r = -ENOTTY;
3515         /*
3516          * This union makes it completely explicit to gcc-3.x
3517          * that these two variables' stack usage should be
3518          * combined, not added together.
3519          */
3520         union {
3521                 struct kvm_pit_state ps;
3522                 struct kvm_pit_state2 ps2;
3523                 struct kvm_pit_config pit_config;
3524         } u;
3525
3526         switch (ioctl) {
3527         case KVM_SET_TSS_ADDR:
3528                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3529                 if (r < 0)
3530                         goto out;
3531                 break;
3532         case KVM_SET_IDENTITY_MAP_ADDR: {
3533                 u64 ident_addr;
3534
3535                 r = -EFAULT;
3536                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3537                         goto out;
3538                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3539                 if (r < 0)
3540                         goto out;
3541                 break;
3542         }
3543         case KVM_SET_NR_MMU_PAGES:
3544                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3545                 if (r)
3546                         goto out;
3547                 break;
3548         case KVM_GET_NR_MMU_PAGES:
3549                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3550                 break;
3551         case KVM_CREATE_IRQCHIP: {
3552                 struct kvm_pic *vpic;
3553
3554                 mutex_lock(&kvm->lock);
3555                 r = -EEXIST;
3556                 if (kvm->arch.vpic)
3557                         goto create_irqchip_unlock;
3558                 r = -ENOMEM;
3559                 vpic = kvm_create_pic(kvm);
3560                 if (vpic) {
3561                         r = kvm_ioapic_init(kvm);
3562                         if (r) {
3563                                 mutex_lock(&kvm->slots_lock);
3564                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3565                                                           &vpic->dev_master);
3566                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3567                                                           &vpic->dev_slave);
3568                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3569                                                           &vpic->dev_eclr);
3570                                 mutex_unlock(&kvm->slots_lock);
3571                                 kfree(vpic);
3572                                 goto create_irqchip_unlock;
3573                         }
3574                 } else
3575                         goto create_irqchip_unlock;
3576                 smp_wmb();
3577                 kvm->arch.vpic = vpic;
3578                 smp_wmb();
3579                 r = kvm_setup_default_irq_routing(kvm);
3580                 if (r) {
3581                         mutex_lock(&kvm->slots_lock);
3582                         mutex_lock(&kvm->irq_lock);
3583                         kvm_ioapic_destroy(kvm);
3584                         kvm_destroy_pic(kvm);
3585                         mutex_unlock(&kvm->irq_lock);
3586                         mutex_unlock(&kvm->slots_lock);
3587                 }
3588         create_irqchip_unlock:
3589                 mutex_unlock(&kvm->lock);
3590                 break;
3591         }
3592         case KVM_CREATE_PIT:
3593                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3594                 goto create_pit;
3595         case KVM_CREATE_PIT2:
3596                 r = -EFAULT;
3597                 if (copy_from_user(&u.pit_config, argp,
3598                                    sizeof(struct kvm_pit_config)))
3599                         goto out;
3600         create_pit:
3601                 mutex_lock(&kvm->slots_lock);
3602                 r = -EEXIST;
3603                 if (kvm->arch.vpit)
3604                         goto create_pit_unlock;
3605                 r = -ENOMEM;
3606                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3607                 if (kvm->arch.vpit)
3608                         r = 0;
3609         create_pit_unlock:
3610                 mutex_unlock(&kvm->slots_lock);
3611                 break;
3612         case KVM_IRQ_LINE_STATUS:
3613         case KVM_IRQ_LINE: {
3614                 struct kvm_irq_level irq_event;
3615
3616                 r = -EFAULT;
3617                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3618                         goto out;
3619                 r = -ENXIO;
3620                 if (irqchip_in_kernel(kvm)) {
3621                         __s32 status;
3622                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3623                                         irq_event.irq, irq_event.level);
3624                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3625                                 r = -EFAULT;
3626                                 irq_event.status = status;
3627                                 if (copy_to_user(argp, &irq_event,
3628                                                         sizeof irq_event))
3629                                         goto out;
3630                         }
3631                         r = 0;
3632                 }
3633                 break;
3634         }
3635         case KVM_GET_IRQCHIP: {
3636                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3637                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3638
3639                 r = -ENOMEM;
3640                 if (!chip)
3641                         goto out;
3642                 r = -EFAULT;
3643                 if (copy_from_user(chip, argp, sizeof *chip))
3644                         goto get_irqchip_out;
3645                 r = -ENXIO;
3646                 if (!irqchip_in_kernel(kvm))
3647                         goto get_irqchip_out;
3648                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3649                 if (r)
3650                         goto get_irqchip_out;
3651                 r = -EFAULT;
3652                 if (copy_to_user(argp, chip, sizeof *chip))
3653                         goto get_irqchip_out;
3654                 r = 0;
3655         get_irqchip_out:
3656                 kfree(chip);
3657                 if (r)
3658                         goto out;
3659                 break;
3660         }
3661         case KVM_SET_IRQCHIP: {
3662                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3663                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3664
3665                 r = -ENOMEM;
3666                 if (!chip)
3667                         goto out;
3668                 r = -EFAULT;
3669                 if (copy_from_user(chip, argp, sizeof *chip))
3670                         goto set_irqchip_out;
3671                 r = -ENXIO;
3672                 if (!irqchip_in_kernel(kvm))
3673                         goto set_irqchip_out;
3674                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3675                 if (r)
3676                         goto set_irqchip_out;
3677                 r = 0;
3678         set_irqchip_out:
3679                 kfree(chip);
3680                 if (r)
3681                         goto out;
3682                 break;
3683         }
3684         case KVM_GET_PIT: {
3685                 r = -EFAULT;
3686                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3687                         goto out;
3688                 r = -ENXIO;
3689                 if (!kvm->arch.vpit)
3690                         goto out;
3691                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3692                 if (r)
3693                         goto out;
3694                 r = -EFAULT;
3695                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3696                         goto out;
3697                 r = 0;
3698                 break;
3699         }
3700         case KVM_SET_PIT: {
3701                 r = -EFAULT;
3702                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3703                         goto out;
3704                 r = -ENXIO;
3705                 if (!kvm->arch.vpit)
3706                         goto out;
3707                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3708                 if (r)
3709                         goto out;
3710                 r = 0;
3711                 break;
3712         }
3713         case KVM_GET_PIT2: {
3714                 r = -ENXIO;
3715                 if (!kvm->arch.vpit)
3716                         goto out;
3717                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3718                 if (r)
3719                         goto out;
3720                 r = -EFAULT;
3721                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3722                         goto out;
3723                 r = 0;
3724                 break;
3725         }
3726         case KVM_SET_PIT2: {
3727                 r = -EFAULT;
3728                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3729                         goto out;
3730                 r = -ENXIO;
3731                 if (!kvm->arch.vpit)
3732                         goto out;
3733                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3734                 if (r)
3735                         goto out;
3736                 r = 0;
3737                 break;
3738         }
3739         case KVM_REINJECT_CONTROL: {
3740                 struct kvm_reinject_control control;
3741                 r =  -EFAULT;
3742                 if (copy_from_user(&control, argp, sizeof(control)))
3743                         goto out;
3744                 r = kvm_vm_ioctl_reinject(kvm, &control);
3745                 if (r)
3746                         goto out;
3747                 r = 0;
3748                 break;
3749         }
3750         case KVM_XEN_HVM_CONFIG: {
3751                 r = -EFAULT;
3752                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3753                                    sizeof(struct kvm_xen_hvm_config)))
3754                         goto out;
3755                 r = -EINVAL;
3756                 if (kvm->arch.xen_hvm_config.flags)
3757                         goto out;
3758                 r = 0;
3759                 break;
3760         }
3761         case KVM_SET_CLOCK: {
3762                 struct kvm_clock_data user_ns;
3763                 u64 now_ns;
3764                 s64 delta;
3765
3766                 r = -EFAULT;
3767                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3768                         goto out;
3769
3770                 r = -EINVAL;
3771                 if (user_ns.flags)
3772                         goto out;
3773
3774                 r = 0;
3775                 local_irq_disable();
3776                 now_ns = get_kernel_ns();
3777                 delta = user_ns.clock - now_ns;
3778                 local_irq_enable();
3779                 kvm->arch.kvmclock_offset = delta;
3780                 break;
3781         }
3782         case KVM_GET_CLOCK: {
3783                 struct kvm_clock_data user_ns;
3784                 u64 now_ns;
3785
3786                 local_irq_disable();
3787                 now_ns = get_kernel_ns();
3788                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3789                 local_irq_enable();
3790                 user_ns.flags = 0;
3791                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3792
3793                 r = -EFAULT;
3794                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3795                         goto out;
3796                 r = 0;
3797                 break;
3798         }
3799
3800         default:
3801                 ;
3802         }
3803 out:
3804         return r;
3805 }
3806
3807 static void kvm_init_msr_list(void)
3808 {
3809         u32 dummy[2];
3810         unsigned i, j;
3811
3812         /* skip the first msrs in the list. KVM-specific */
3813         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3814                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3815                         continue;
3816                 if (j < i)
3817                         msrs_to_save[j] = msrs_to_save[i];
3818                 j++;
3819         }
3820         num_msrs_to_save = j;
3821 }
3822
3823 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3824                            const void *v)
3825 {
3826         int handled = 0;
3827         int n;
3828
3829         do {
3830                 n = min(len, 8);
3831                 if (!(vcpu->arch.apic &&
3832                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3833                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3834                         break;
3835                 handled += n;
3836                 addr += n;
3837                 len -= n;
3838                 v += n;
3839         } while (len);
3840
3841         return handled;
3842 }
3843
3844 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3845 {
3846         int handled = 0;
3847         int n;
3848
3849         do {
3850                 n = min(len, 8);
3851                 if (!(vcpu->arch.apic &&
3852                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3853                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3854                         break;
3855                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3856                 handled += n;
3857                 addr += n;
3858                 len -= n;
3859                 v += n;
3860         } while (len);
3861
3862         return handled;
3863 }
3864
3865 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3866                         struct kvm_segment *var, int seg)
3867 {
3868         kvm_x86_ops->set_segment(vcpu, var, seg);
3869 }
3870
3871 void kvm_get_segment(struct kvm_vcpu *vcpu,
3872                      struct kvm_segment *var, int seg)
3873 {
3874         kvm_x86_ops->get_segment(vcpu, var, seg);
3875 }
3876
3877 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3878 {
3879         return gpa;
3880 }
3881
3882 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3883 {
3884         gpa_t t_gpa;
3885         struct x86_exception exception;
3886
3887         BUG_ON(!mmu_is_nested(vcpu));
3888
3889         /* NPT walks are always user-walks */
3890         access |= PFERR_USER_MASK;
3891         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3892
3893         return t_gpa;
3894 }
3895
3896 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3897                               struct x86_exception *exception)
3898 {
3899         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3900         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3901 }
3902
3903  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3904                                 struct x86_exception *exception)
3905 {
3906         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3907         access |= PFERR_FETCH_MASK;
3908         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3909 }
3910
3911 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3912                                struct x86_exception *exception)
3913 {
3914         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3915         access |= PFERR_WRITE_MASK;
3916         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3917 }
3918
3919 /* uses this to access any guest's mapped memory without checking CPL */
3920 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3921                                 struct x86_exception *exception)
3922 {
3923         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3924 }
3925
3926 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3927                                       struct kvm_vcpu *vcpu, u32 access,
3928                                       struct x86_exception *exception)
3929 {
3930         void *data = val;
3931         int r = X86EMUL_CONTINUE;
3932
3933         while (bytes) {
3934                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3935                                                             exception);
3936                 unsigned offset = addr & (PAGE_SIZE-1);
3937                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3938                 int ret;
3939
3940                 if (gpa == UNMAPPED_GVA)
3941                         return X86EMUL_PROPAGATE_FAULT;
3942                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3943                 if (ret < 0) {
3944                         r = X86EMUL_IO_NEEDED;
3945                         goto out;
3946                 }
3947
3948                 bytes -= toread;
3949                 data += toread;
3950                 addr += toread;
3951         }
3952 out:
3953         return r;
3954 }
3955
3956 /* used for instruction fetching */
3957 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3958                                 gva_t addr, void *val, unsigned int bytes,
3959                                 struct x86_exception *exception)
3960 {
3961         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3962         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3963
3964         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3965                                           access | PFERR_FETCH_MASK,
3966                                           exception);
3967 }
3968
3969 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3970                                gva_t addr, void *val, unsigned int bytes,
3971                                struct x86_exception *exception)
3972 {
3973         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3974         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3975
3976         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3977                                           exception);
3978 }
3979 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3980
3981 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3982                                       gva_t addr, void *val, unsigned int bytes,
3983                                       struct x86_exception *exception)
3984 {
3985         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3986         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3987 }
3988
3989 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3990                                        gva_t addr, void *val,
3991                                        unsigned int bytes,
3992                                        struct x86_exception *exception)
3993 {
3994         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3995         void *data = val;
3996         int r = X86EMUL_CONTINUE;
3997
3998         while (bytes) {
3999                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4000                                                              PFERR_WRITE_MASK,
4001                                                              exception);
4002                 unsigned offset = addr & (PAGE_SIZE-1);
4003                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4004                 int ret;
4005
4006                 if (gpa == UNMAPPED_GVA)
4007                         return X86EMUL_PROPAGATE_FAULT;
4008                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4009                 if (ret < 0) {
4010                         r = X86EMUL_IO_NEEDED;
4011                         goto out;
4012                 }
4013
4014                 bytes -= towrite;
4015                 data += towrite;
4016                 addr += towrite;
4017         }
4018 out:
4019         return r;
4020 }
4021 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4022
4023 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4024                                 gpa_t *gpa, struct x86_exception *exception,
4025                                 bool write)
4026 {
4027         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4028
4029         if (vcpu_match_mmio_gva(vcpu, gva) &&
4030                   check_write_user_access(vcpu, write, access,
4031                   vcpu->arch.access)) {
4032                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4033                                         (gva & (PAGE_SIZE - 1));
4034                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4035                 return 1;
4036         }
4037
4038         if (write)
4039                 access |= PFERR_WRITE_MASK;
4040
4041         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4042
4043         if (*gpa == UNMAPPED_GVA)
4044                 return -1;
4045
4046         /* For APIC access vmexit */
4047         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4048                 return 1;
4049
4050         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4051                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4052                 return 1;
4053         }
4054
4055         return 0;
4056 }
4057
4058 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4059                         const void *val, int bytes)
4060 {
4061         int ret;
4062
4063         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4064         if (ret < 0)
4065                 return 0;
4066         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
4067         return 1;
4068 }
4069
4070 struct read_write_emulator_ops {
4071         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4072                                   int bytes);
4073         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4074                                   void *val, int bytes);
4075         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4076                                int bytes, void *val);
4077         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4078                                     void *val, int bytes);
4079         bool write;
4080 };
4081
4082 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4083 {
4084         if (vcpu->mmio_read_completed) {
4085                 memcpy(val, vcpu->mmio_data, bytes);
4086                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4087                                vcpu->mmio_phys_addr, *(u64 *)val);
4088                 vcpu->mmio_read_completed = 0;
4089                 return 1;
4090         }
4091
4092         return 0;
4093 }
4094
4095 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4096                         void *val, int bytes)
4097 {
4098         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4099 }
4100
4101 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4102                          void *val, int bytes)
4103 {
4104         return emulator_write_phys(vcpu, gpa, val, bytes);
4105 }
4106
4107 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4108 {
4109         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4110         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4111 }
4112
4113 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4114                           void *val, int bytes)
4115 {
4116         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4117         return X86EMUL_IO_NEEDED;
4118 }
4119
4120 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4121                            void *val, int bytes)
4122 {
4123         memcpy(vcpu->mmio_data, val, bytes);
4124         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4125         return X86EMUL_CONTINUE;
4126 }
4127
4128 static struct read_write_emulator_ops read_emultor = {
4129         .read_write_prepare = read_prepare,
4130         .read_write_emulate = read_emulate,
4131         .read_write_mmio = vcpu_mmio_read,
4132         .read_write_exit_mmio = read_exit_mmio,
4133 };
4134
4135 static struct read_write_emulator_ops write_emultor = {
4136         .read_write_emulate = write_emulate,
4137         .read_write_mmio = write_mmio,
4138         .read_write_exit_mmio = write_exit_mmio,
4139         .write = true,
4140 };
4141
4142 static int emulator_read_write_onepage(unsigned long addr, void *val,
4143                                        unsigned int bytes,
4144                                        struct x86_exception *exception,
4145                                        struct kvm_vcpu *vcpu,
4146                                        struct read_write_emulator_ops *ops)
4147 {
4148         gpa_t gpa;
4149         int handled, ret;
4150         bool write = ops->write;
4151
4152         if (ops->read_write_prepare &&
4153                   ops->read_write_prepare(vcpu, val, bytes))
4154                 return X86EMUL_CONTINUE;
4155
4156         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4157
4158         if (ret < 0)
4159                 return X86EMUL_PROPAGATE_FAULT;
4160
4161         /* For APIC access vmexit */
4162         if (ret)
4163                 goto mmio;
4164
4165         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4166                 return X86EMUL_CONTINUE;
4167
4168 mmio:
4169         /*
4170          * Is this MMIO handled locally?
4171          */
4172         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4173         if (handled == bytes)
4174                 return X86EMUL_CONTINUE;
4175
4176         gpa += handled;
4177         bytes -= handled;
4178         val += handled;
4179
4180         vcpu->mmio_needed = 1;
4181         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4182         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4183         vcpu->mmio_size = bytes;
4184         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4185         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
4186         vcpu->mmio_index = 0;
4187
4188         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4189 }
4190
4191 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4192                         void *val, unsigned int bytes,
4193                         struct x86_exception *exception,
4194                         struct read_write_emulator_ops *ops)
4195 {
4196         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4197
4198         /* Crossing a page boundary? */
4199         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4200                 int rc, now;
4201
4202                 now = -addr & ~PAGE_MASK;
4203                 rc = emulator_read_write_onepage(addr, val, now, exception,
4204                                                  vcpu, ops);
4205
4206                 if (rc != X86EMUL_CONTINUE)
4207                         return rc;
4208                 addr += now;
4209                 val += now;
4210                 bytes -= now;
4211         }
4212
4213         return emulator_read_write_onepage(addr, val, bytes, exception,
4214                                            vcpu, ops);
4215 }
4216
4217 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4218                                   unsigned long addr,
4219                                   void *val,
4220                                   unsigned int bytes,
4221                                   struct x86_exception *exception)
4222 {
4223         return emulator_read_write(ctxt, addr, val, bytes,
4224                                    exception, &read_emultor);
4225 }
4226
4227 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4228                             unsigned long addr,
4229                             const void *val,
4230                             unsigned int bytes,
4231                             struct x86_exception *exception)
4232 {
4233         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4234                                    exception, &write_emultor);
4235 }
4236
4237 #define CMPXCHG_TYPE(t, ptr, old, new) \
4238         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4239
4240 #ifdef CONFIG_X86_64
4241 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4242 #else
4243 #  define CMPXCHG64(ptr, old, new) \
4244         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4245 #endif
4246
4247 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4248                                      unsigned long addr,
4249                                      const void *old,
4250                                      const void *new,
4251                                      unsigned int bytes,
4252                                      struct x86_exception *exception)
4253 {
4254         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4255         gpa_t gpa;
4256         struct page *page;
4257         char *kaddr;
4258         bool exchanged;
4259
4260         /* guests cmpxchg8b have to be emulated atomically */
4261         if (bytes > 8 || (bytes & (bytes - 1)))
4262                 goto emul_write;
4263
4264         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4265
4266         if (gpa == UNMAPPED_GVA ||
4267             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4268                 goto emul_write;
4269
4270         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4271                 goto emul_write;
4272
4273         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4274         if (is_error_page(page)) {
4275                 kvm_release_page_clean(page);
4276                 goto emul_write;
4277         }
4278
4279         kaddr = kmap_atomic(page, KM_USER0);
4280         kaddr += offset_in_page(gpa);
4281         switch (bytes) {
4282         case 1:
4283                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4284                 break;
4285         case 2:
4286                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4287                 break;
4288         case 4:
4289                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4290                 break;
4291         case 8:
4292                 exchanged = CMPXCHG64(kaddr, old, new);
4293                 break;
4294         default:
4295                 BUG();
4296         }
4297         kunmap_atomic(kaddr, KM_USER0);
4298         kvm_release_page_dirty(page);
4299
4300         if (!exchanged)
4301                 return X86EMUL_CMPXCHG_FAILED;
4302
4303         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4304
4305         return X86EMUL_CONTINUE;
4306
4307 emul_write:
4308         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4309
4310         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4311 }
4312
4313 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4314 {
4315         /* TODO: String I/O for in kernel device */
4316         int r;
4317
4318         if (vcpu->arch.pio.in)
4319                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4320                                     vcpu->arch.pio.size, pd);
4321         else
4322                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4323                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4324                                      pd);
4325         return r;
4326 }
4327
4328
4329 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4330                                     int size, unsigned short port, void *val,
4331                                     unsigned int count)
4332 {
4333         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4334
4335         if (vcpu->arch.pio.count)
4336                 goto data_avail;
4337
4338         trace_kvm_pio(0, port, size, count);
4339
4340         vcpu->arch.pio.port = port;
4341         vcpu->arch.pio.in = 1;
4342         vcpu->arch.pio.count  = count;
4343         vcpu->arch.pio.size = size;
4344
4345         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4346         data_avail:
4347                 memcpy(val, vcpu->arch.pio_data, size * count);
4348                 vcpu->arch.pio.count = 0;
4349                 return 1;
4350         }
4351
4352         vcpu->run->exit_reason = KVM_EXIT_IO;
4353         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4354         vcpu->run->io.size = size;
4355         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4356         vcpu->run->io.count = count;
4357         vcpu->run->io.port = port;
4358
4359         return 0;
4360 }
4361
4362 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4363                                      int size, unsigned short port,
4364                                      const void *val, unsigned int count)
4365 {
4366         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4367
4368         trace_kvm_pio(1, port, size, count);
4369
4370         vcpu->arch.pio.port = port;
4371         vcpu->arch.pio.in = 0;
4372         vcpu->arch.pio.count = count;
4373         vcpu->arch.pio.size = size;
4374
4375         memcpy(vcpu->arch.pio_data, val, size * count);
4376
4377         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4378                 vcpu->arch.pio.count = 0;
4379                 return 1;
4380         }
4381
4382         vcpu->run->exit_reason = KVM_EXIT_IO;
4383         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4384         vcpu->run->io.size = size;
4385         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4386         vcpu->run->io.count = count;
4387         vcpu->run->io.port = port;
4388
4389         return 0;
4390 }
4391
4392 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4393 {
4394         return kvm_x86_ops->get_segment_base(vcpu, seg);
4395 }
4396
4397 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4398 {
4399         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4400 }
4401
4402 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4403 {
4404         if (!need_emulate_wbinvd(vcpu))
4405                 return X86EMUL_CONTINUE;
4406
4407         if (kvm_x86_ops->has_wbinvd_exit()) {
4408                 int cpu = get_cpu();
4409
4410                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4411                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4412                                 wbinvd_ipi, NULL, 1);
4413                 put_cpu();
4414                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4415         } else
4416                 wbinvd();
4417         return X86EMUL_CONTINUE;
4418 }
4419 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4420
4421 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4422 {
4423         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4424 }
4425
4426 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4427 {
4428         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4429 }
4430
4431 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4432 {
4433
4434         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4435 }
4436
4437 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4438 {
4439         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4440 }
4441
4442 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4443 {
4444         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4445         unsigned long value;
4446
4447         switch (cr) {
4448         case 0:
4449                 value = kvm_read_cr0(vcpu);
4450                 break;
4451         case 2:
4452                 value = vcpu->arch.cr2;
4453                 break;
4454         case 3:
4455                 value = kvm_read_cr3(vcpu);
4456                 break;
4457         case 4:
4458                 value = kvm_read_cr4(vcpu);
4459                 break;
4460         case 8:
4461                 value = kvm_get_cr8(vcpu);
4462                 break;
4463         default:
4464                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4465                 return 0;
4466         }
4467
4468         return value;
4469 }
4470
4471 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4472 {
4473         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4474         int res = 0;
4475
4476         switch (cr) {
4477         case 0:
4478                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4479                 break;
4480         case 2:
4481                 vcpu->arch.cr2 = val;
4482                 break;
4483         case 3:
4484                 res = kvm_set_cr3(vcpu, val);
4485                 break;
4486         case 4:
4487                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4488                 break;
4489         case 8:
4490                 res = kvm_set_cr8(vcpu, val);
4491                 break;
4492         default:
4493                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4494                 res = -1;
4495         }
4496
4497         return res;
4498 }
4499
4500 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4501 {
4502         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4503 }
4504
4505 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4506 {
4507         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4508 }
4509
4510 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4511 {
4512         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4513 }
4514
4515 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4516 {
4517         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4518 }
4519
4520 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4521 {
4522         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4523 }
4524
4525 static unsigned long emulator_get_cached_segment_base(
4526         struct x86_emulate_ctxt *ctxt, int seg)
4527 {
4528         return get_segment_base(emul_to_vcpu(ctxt), seg);
4529 }
4530
4531 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4532                                  struct desc_struct *desc, u32 *base3,
4533                                  int seg)
4534 {
4535         struct kvm_segment var;
4536
4537         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4538         *selector = var.selector;
4539
4540         if (var.unusable)
4541                 return false;
4542
4543         if (var.g)
4544                 var.limit >>= 12;
4545         set_desc_limit(desc, var.limit);
4546         set_desc_base(desc, (unsigned long)var.base);
4547 #ifdef CONFIG_X86_64
4548         if (base3)
4549                 *base3 = var.base >> 32;
4550 #endif
4551         desc->type = var.type;
4552         desc->s = var.s;
4553         desc->dpl = var.dpl;
4554         desc->p = var.present;
4555         desc->avl = var.avl;
4556         desc->l = var.l;
4557         desc->d = var.db;
4558         desc->g = var.g;
4559
4560         return true;
4561 }
4562
4563 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4564                                  struct desc_struct *desc, u32 base3,
4565                                  int seg)
4566 {
4567         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4568         struct kvm_segment var;
4569
4570         var.selector = selector;
4571         var.base = get_desc_base(desc);
4572 #ifdef CONFIG_X86_64
4573         var.base |= ((u64)base3) << 32;
4574 #endif
4575         var.limit = get_desc_limit(desc);
4576         if (desc->g)
4577                 var.limit = (var.limit << 12) | 0xfff;
4578         var.type = desc->type;
4579         var.present = desc->p;
4580         var.dpl = desc->dpl;
4581         var.db = desc->d;
4582         var.s = desc->s;
4583         var.l = desc->l;
4584         var.g = desc->g;
4585         var.avl = desc->avl;
4586         var.present = desc->p;
4587         var.unusable = !var.present;
4588         var.padding = 0;
4589
4590         kvm_set_segment(vcpu, &var, seg);
4591         return;
4592 }
4593
4594 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4595                             u32 msr_index, u64 *pdata)
4596 {
4597         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4598 }
4599
4600 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4601                             u32 msr_index, u64 data)
4602 {
4603         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4604 }
4605
4606 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4607 {
4608         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4609 }
4610
4611 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4612 {
4613         preempt_disable();
4614         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4615         /*
4616          * CR0.TS may reference the host fpu state, not the guest fpu state,
4617          * so it may be clear at this point.
4618          */
4619         clts();
4620 }
4621
4622 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4623 {
4624         preempt_enable();
4625 }
4626
4627 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4628                               struct x86_instruction_info *info,
4629                               enum x86_intercept_stage stage)
4630 {
4631         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4632 }
4633
4634 static struct x86_emulate_ops emulate_ops = {
4635         .read_std            = kvm_read_guest_virt_system,
4636         .write_std           = kvm_write_guest_virt_system,
4637         .fetch               = kvm_fetch_guest_virt,
4638         .read_emulated       = emulator_read_emulated,
4639         .write_emulated      = emulator_write_emulated,
4640         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4641         .invlpg              = emulator_invlpg,
4642         .pio_in_emulated     = emulator_pio_in_emulated,
4643         .pio_out_emulated    = emulator_pio_out_emulated,
4644         .get_segment         = emulator_get_segment,
4645         .set_segment         = emulator_set_segment,
4646         .get_cached_segment_base = emulator_get_cached_segment_base,
4647         .get_gdt             = emulator_get_gdt,
4648         .get_idt             = emulator_get_idt,
4649         .set_gdt             = emulator_set_gdt,
4650         .set_idt             = emulator_set_idt,
4651         .get_cr              = emulator_get_cr,
4652         .set_cr              = emulator_set_cr,
4653         .cpl                 = emulator_get_cpl,
4654         .get_dr              = emulator_get_dr,
4655         .set_dr              = emulator_set_dr,
4656         .set_msr             = emulator_set_msr,
4657         .get_msr             = emulator_get_msr,
4658         .halt                = emulator_halt,
4659         .wbinvd              = emulator_wbinvd,
4660         .fix_hypercall       = emulator_fix_hypercall,
4661         .get_fpu             = emulator_get_fpu,
4662         .put_fpu             = emulator_put_fpu,
4663         .intercept           = emulator_intercept,
4664 };
4665
4666 static void cache_all_regs(struct kvm_vcpu *vcpu)
4667 {
4668         kvm_register_read(vcpu, VCPU_REGS_RAX);
4669         kvm_register_read(vcpu, VCPU_REGS_RSP);
4670         kvm_register_read(vcpu, VCPU_REGS_RIP);
4671         vcpu->arch.regs_dirty = ~0;
4672 }
4673
4674 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4675 {
4676         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4677         /*
4678          * an sti; sti; sequence only disable interrupts for the first
4679          * instruction. So, if the last instruction, be it emulated or
4680          * not, left the system with the INT_STI flag enabled, it
4681          * means that the last instruction is an sti. We should not
4682          * leave the flag on in this case. The same goes for mov ss
4683          */
4684         if (!(int_shadow & mask))
4685                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4686 }
4687
4688 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4689 {
4690         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4691         if (ctxt->exception.vector == PF_VECTOR)
4692                 kvm_propagate_fault(vcpu, &ctxt->exception);
4693         else if (ctxt->exception.error_code_valid)
4694                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4695                                       ctxt->exception.error_code);
4696         else
4697                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4698 }
4699
4700 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4701                               const unsigned long *regs)
4702 {
4703         memset(&ctxt->twobyte, 0,
4704                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4705         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4706
4707         ctxt->fetch.start = 0;
4708         ctxt->fetch.end = 0;
4709         ctxt->io_read.pos = 0;
4710         ctxt->io_read.end = 0;
4711         ctxt->mem_read.pos = 0;
4712         ctxt->mem_read.end = 0;
4713 }
4714
4715 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4716 {
4717         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4718         int cs_db, cs_l;
4719
4720         /*
4721          * TODO: fix emulate.c to use guest_read/write_register
4722          * instead of direct ->regs accesses, can save hundred cycles
4723          * on Intel for instructions that don't read/change RSP, for
4724          * for example.
4725          */
4726         cache_all_regs(vcpu);
4727
4728         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4729
4730         ctxt->eflags = kvm_get_rflags(vcpu);
4731         ctxt->eip = kvm_rip_read(vcpu);
4732         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4733                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4734                      cs_l                               ? X86EMUL_MODE_PROT64 :
4735                      cs_db                              ? X86EMUL_MODE_PROT32 :
4736                                                           X86EMUL_MODE_PROT16;
4737         ctxt->guest_mode = is_guest_mode(vcpu);
4738
4739         init_decode_cache(ctxt, vcpu->arch.regs);
4740         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4741 }
4742
4743 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4744 {
4745         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4746         int ret;
4747
4748         init_emulate_ctxt(vcpu);
4749
4750         ctxt->op_bytes = 2;
4751         ctxt->ad_bytes = 2;
4752         ctxt->_eip = ctxt->eip + inc_eip;
4753         ret = emulate_int_real(ctxt, irq);
4754
4755         if (ret != X86EMUL_CONTINUE)
4756                 return EMULATE_FAIL;
4757
4758         ctxt->eip = ctxt->_eip;
4759         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4760         kvm_rip_write(vcpu, ctxt->eip);
4761         kvm_set_rflags(vcpu, ctxt->eflags);
4762
4763         if (irq == NMI_VECTOR)
4764                 vcpu->arch.nmi_pending = false;
4765         else
4766                 vcpu->arch.interrupt.pending = false;
4767
4768         return EMULATE_DONE;
4769 }
4770 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4771
4772 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4773 {
4774         int r = EMULATE_DONE;
4775
4776         ++vcpu->stat.insn_emulation_fail;
4777         trace_kvm_emulate_insn_failed(vcpu);
4778         if (!is_guest_mode(vcpu)) {
4779                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4780                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4781                 vcpu->run->internal.ndata = 0;
4782                 r = EMULATE_FAIL;
4783         }
4784         kvm_queue_exception(vcpu, UD_VECTOR);
4785
4786         return r;
4787 }
4788
4789 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4790 {
4791         gpa_t gpa;
4792
4793         if (tdp_enabled)
4794                 return false;
4795
4796         /*
4797          * if emulation was due to access to shadowed page table
4798          * and it failed try to unshadow page and re-entetr the
4799          * guest to let CPU execute the instruction.
4800          */
4801         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4802                 return true;
4803
4804         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4805
4806         if (gpa == UNMAPPED_GVA)
4807                 return true; /* let cpu generate fault */
4808
4809         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4810                 return true;
4811
4812         return false;
4813 }
4814
4815 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4816                             unsigned long cr2,
4817                             int emulation_type,
4818                             void *insn,
4819                             int insn_len)
4820 {
4821         int r;
4822         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4823         bool writeback = true;
4824
4825         kvm_clear_exception_queue(vcpu);
4826
4827         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4828                 init_emulate_ctxt(vcpu);
4829                 ctxt->interruptibility = 0;
4830                 ctxt->have_exception = false;
4831                 ctxt->perm_ok = false;
4832
4833                 ctxt->only_vendor_specific_insn
4834                         = emulation_type & EMULTYPE_TRAP_UD;
4835
4836                 r = x86_decode_insn(ctxt, insn, insn_len);
4837
4838                 trace_kvm_emulate_insn_start(vcpu);
4839                 ++vcpu->stat.insn_emulation;
4840                 if (r)  {
4841                         if (emulation_type & EMULTYPE_TRAP_UD)
4842                                 return EMULATE_FAIL;
4843                         if (reexecute_instruction(vcpu, cr2))
4844                                 return EMULATE_DONE;
4845                         if (emulation_type & EMULTYPE_SKIP)
4846                                 return EMULATE_FAIL;
4847                         return handle_emulation_failure(vcpu);
4848                 }
4849         }
4850
4851         if (emulation_type & EMULTYPE_SKIP) {
4852                 kvm_rip_write(vcpu, ctxt->_eip);
4853                 return EMULATE_DONE;
4854         }
4855
4856         /* this is needed for vmware backdoor interface to work since it
4857            changes registers values  during IO operation */
4858         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4859                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4860                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4861         }
4862
4863 restart:
4864         r = x86_emulate_insn(ctxt);
4865
4866         if (r == EMULATION_INTERCEPTED)
4867                 return EMULATE_DONE;
4868
4869         if (r == EMULATION_FAILED) {
4870                 if (reexecute_instruction(vcpu, cr2))
4871                         return EMULATE_DONE;
4872
4873                 return handle_emulation_failure(vcpu);
4874         }
4875
4876         if (ctxt->have_exception) {
4877                 inject_emulated_exception(vcpu);
4878                 r = EMULATE_DONE;
4879         } else if (vcpu->arch.pio.count) {
4880                 if (!vcpu->arch.pio.in)
4881                         vcpu->arch.pio.count = 0;
4882                 else
4883                         writeback = false;
4884                 r = EMULATE_DO_MMIO;
4885         } else if (vcpu->mmio_needed) {
4886                 if (!vcpu->mmio_is_write)
4887                         writeback = false;
4888                 r = EMULATE_DO_MMIO;
4889         } else if (r == EMULATION_RESTART)
4890                 goto restart;
4891         else
4892                 r = EMULATE_DONE;
4893
4894         if (writeback) {
4895                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4896                 kvm_set_rflags(vcpu, ctxt->eflags);
4897                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4898                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4899                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4900                 kvm_rip_write(vcpu, ctxt->eip);
4901         } else
4902                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4903
4904         return r;
4905 }
4906 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4907
4908 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4909 {
4910         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4911         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4912                                             size, port, &val, 1);
4913         /* do not return to emulator after return from userspace */
4914         vcpu->arch.pio.count = 0;
4915         return ret;
4916 }
4917 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4918
4919 static void tsc_bad(void *info)
4920 {
4921         __this_cpu_write(cpu_tsc_khz, 0);
4922 }
4923
4924 static void tsc_khz_changed(void *data)
4925 {
4926         struct cpufreq_freqs *freq = data;
4927         unsigned long khz = 0;
4928
4929         if (data)
4930                 khz = freq->new;
4931         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4932                 khz = cpufreq_quick_get(raw_smp_processor_id());
4933         if (!khz)
4934                 khz = tsc_khz;
4935         __this_cpu_write(cpu_tsc_khz, khz);
4936 }
4937
4938 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4939                                      void *data)
4940 {
4941         struct cpufreq_freqs *freq = data;
4942         struct kvm *kvm;
4943         struct kvm_vcpu *vcpu;
4944         int i, send_ipi = 0;
4945
4946         /*
4947          * We allow guests to temporarily run on slowing clocks,
4948          * provided we notify them after, or to run on accelerating
4949          * clocks, provided we notify them before.  Thus time never
4950          * goes backwards.
4951          *
4952          * However, we have a problem.  We can't atomically update
4953          * the frequency of a given CPU from this function; it is
4954          * merely a notifier, which can be called from any CPU.
4955          * Changing the TSC frequency at arbitrary points in time
4956          * requires a recomputation of local variables related to
4957          * the TSC for each VCPU.  We must flag these local variables
4958          * to be updated and be sure the update takes place with the
4959          * new frequency before any guests proceed.
4960          *
4961          * Unfortunately, the combination of hotplug CPU and frequency
4962          * change creates an intractable locking scenario; the order
4963          * of when these callouts happen is undefined with respect to
4964          * CPU hotplug, and they can race with each other.  As such,
4965          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4966          * undefined; you can actually have a CPU frequency change take
4967          * place in between the computation of X and the setting of the
4968          * variable.  To protect against this problem, all updates of
4969          * the per_cpu tsc_khz variable are done in an interrupt
4970          * protected IPI, and all callers wishing to update the value
4971          * must wait for a synchronous IPI to complete (which is trivial
4972          * if the caller is on the CPU already).  This establishes the
4973          * necessary total order on variable updates.
4974          *
4975          * Note that because a guest time update may take place
4976          * anytime after the setting of the VCPU's request bit, the
4977          * correct TSC value must be set before the request.  However,
4978          * to ensure the update actually makes it to any guest which
4979          * starts running in hardware virtualization between the set
4980          * and the acquisition of the spinlock, we must also ping the
4981          * CPU after setting the request bit.
4982          *
4983          */
4984
4985         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4986                 return 0;
4987         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4988                 return 0;
4989
4990         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4991
4992         raw_spin_lock(&kvm_lock);
4993         list_for_each_entry(kvm, &vm_list, vm_list) {
4994                 kvm_for_each_vcpu(i, vcpu, kvm) {
4995                         if (vcpu->cpu != freq->cpu)
4996                                 continue;
4997                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4998                         if (vcpu->cpu != smp_processor_id())
4999                                 send_ipi = 1;
5000                 }
5001         }
5002         raw_spin_unlock(&kvm_lock);
5003
5004         if (freq->old < freq->new && send_ipi) {
5005                 /*
5006                  * We upscale the frequency.  Must make the guest
5007                  * doesn't see old kvmclock values while running with
5008                  * the new frequency, otherwise we risk the guest sees
5009                  * time go backwards.
5010                  *
5011                  * In case we update the frequency for another cpu
5012                  * (which might be in guest context) send an interrupt
5013                  * to kick the cpu out of guest context.  Next time
5014                  * guest context is entered kvmclock will be updated,
5015                  * so the guest will not see stale values.
5016                  */
5017                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5018         }
5019         return 0;
5020 }
5021
5022 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5023         .notifier_call  = kvmclock_cpufreq_notifier
5024 };
5025
5026 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5027                                         unsigned long action, void *hcpu)
5028 {
5029         unsigned int cpu = (unsigned long)hcpu;
5030
5031         switch (action) {
5032                 case CPU_ONLINE:
5033                 case CPU_DOWN_FAILED:
5034                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5035                         break;
5036                 case CPU_DOWN_PREPARE:
5037                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5038                         break;
5039         }
5040         return NOTIFY_OK;
5041 }
5042
5043 static struct notifier_block kvmclock_cpu_notifier_block = {
5044         .notifier_call  = kvmclock_cpu_notifier,
5045         .priority = -INT_MAX
5046 };
5047
5048 static void kvm_timer_init(void)
5049 {
5050         int cpu;
5051
5052         max_tsc_khz = tsc_khz;
5053         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5054         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5055 #ifdef CONFIG_CPU_FREQ
5056                 struct cpufreq_policy policy;
5057                 memset(&policy, 0, sizeof(policy));
5058                 cpu = get_cpu();
5059                 cpufreq_get_policy(&policy, cpu);
5060                 if (policy.cpuinfo.max_freq)
5061                         max_tsc_khz = policy.cpuinfo.max_freq;
5062                 put_cpu();
5063 #endif
5064                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5065                                           CPUFREQ_TRANSITION_NOTIFIER);
5066         }
5067         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5068         for_each_online_cpu(cpu)
5069                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5070 }
5071
5072 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5073
5074 static int kvm_is_in_guest(void)
5075 {
5076         return percpu_read(current_vcpu) != NULL;
5077 }
5078
5079 static int kvm_is_user_mode(void)
5080 {
5081         int user_mode = 3;
5082
5083         if (percpu_read(current_vcpu))
5084                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
5085
5086         return user_mode != 0;
5087 }
5088
5089 static unsigned long kvm_get_guest_ip(void)
5090 {
5091         unsigned long ip = 0;
5092
5093         if (percpu_read(current_vcpu))
5094                 ip = kvm_rip_read(percpu_read(current_vcpu));
5095
5096         return ip;
5097 }
5098
5099 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5100         .is_in_guest            = kvm_is_in_guest,
5101         .is_user_mode           = kvm_is_user_mode,
5102         .get_guest_ip           = kvm_get_guest_ip,
5103 };
5104
5105 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5106 {
5107         percpu_write(current_vcpu, vcpu);
5108 }
5109 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5110
5111 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5112 {
5113         percpu_write(current_vcpu, NULL);
5114 }
5115 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5116
5117 static void kvm_set_mmio_spte_mask(void)
5118 {
5119         u64 mask;
5120         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5121
5122         /*
5123          * Set the reserved bits and the present bit of an paging-structure
5124          * entry to generate page fault with PFER.RSV = 1.
5125          */
5126         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5127         mask |= 1ull;
5128
5129 #ifdef CONFIG_X86_64
5130         /*
5131          * If reserved bit is not supported, clear the present bit to disable
5132          * mmio page fault.
5133          */
5134         if (maxphyaddr == 52)
5135                 mask &= ~1ull;
5136 #endif
5137
5138         kvm_mmu_set_mmio_spte_mask(mask);
5139 }
5140
5141 int kvm_arch_init(void *opaque)
5142 {
5143         int r;
5144         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5145
5146         if (kvm_x86_ops) {
5147                 printk(KERN_ERR "kvm: already loaded the other module\n");
5148                 r = -EEXIST;
5149                 goto out;
5150         }
5151
5152         if (!ops->cpu_has_kvm_support()) {
5153                 printk(KERN_ERR "kvm: no hardware support\n");
5154                 r = -EOPNOTSUPP;
5155                 goto out;
5156         }
5157         if (ops->disabled_by_bios()) {
5158                 printk(KERN_ERR "kvm: disabled by bios\n");
5159                 r = -EOPNOTSUPP;
5160                 goto out;
5161         }
5162
5163         r = kvm_mmu_module_init();
5164         if (r)
5165                 goto out;
5166
5167         kvm_set_mmio_spte_mask();
5168         kvm_init_msr_list();
5169
5170         kvm_x86_ops = ops;
5171         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5172                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5173
5174         kvm_timer_init();
5175
5176         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5177
5178         if (cpu_has_xsave)
5179                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5180
5181         return 0;
5182
5183 out:
5184         return r;
5185 }
5186
5187 void kvm_arch_exit(void)
5188 {
5189         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5190
5191         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5192                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5193                                             CPUFREQ_TRANSITION_NOTIFIER);
5194         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5195         kvm_x86_ops = NULL;
5196         kvm_mmu_module_exit();
5197 }
5198
5199 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5200 {
5201         ++vcpu->stat.halt_exits;
5202         if (irqchip_in_kernel(vcpu->kvm)) {
5203                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5204                 return 1;
5205         } else {
5206                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5207                 return 0;
5208         }
5209 }
5210 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5211
5212 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
5213                            unsigned long a1)
5214 {
5215         if (is_long_mode(vcpu))
5216                 return a0;
5217         else
5218                 return a0 | ((gpa_t)a1 << 32);
5219 }
5220
5221 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5222 {
5223         u64 param, ingpa, outgpa, ret;
5224         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5225         bool fast, longmode;
5226         int cs_db, cs_l;
5227
5228         /*
5229          * hypercall generates UD from non zero cpl and real mode
5230          * per HYPER-V spec
5231          */
5232         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5233                 kvm_queue_exception(vcpu, UD_VECTOR);
5234                 return 0;
5235         }
5236
5237         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5238         longmode = is_long_mode(vcpu) && cs_l == 1;
5239
5240         if (!longmode) {
5241                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5242                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5243                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5244                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5245                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5246                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5247         }
5248 #ifdef CONFIG_X86_64
5249         else {
5250                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5251                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5252                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5253         }
5254 #endif
5255
5256         code = param & 0xffff;
5257         fast = (param >> 16) & 0x1;
5258         rep_cnt = (param >> 32) & 0xfff;
5259         rep_idx = (param >> 48) & 0xfff;
5260
5261         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5262
5263         switch (code) {
5264         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5265                 kvm_vcpu_on_spin(vcpu);
5266                 break;
5267         default:
5268                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5269                 break;
5270         }
5271
5272         ret = res | (((u64)rep_done & 0xfff) << 32);
5273         if (longmode) {
5274                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5275         } else {
5276                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5277                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5278         }
5279
5280         return 1;
5281 }
5282
5283 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5284 {
5285         unsigned long nr, a0, a1, a2, a3, ret;
5286         int r = 1;
5287
5288         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5289                 return kvm_hv_hypercall(vcpu);
5290
5291         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5292         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5293         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5294         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5295         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5296
5297         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5298
5299         if (!is_long_mode(vcpu)) {
5300                 nr &= 0xFFFFFFFF;
5301                 a0 &= 0xFFFFFFFF;
5302                 a1 &= 0xFFFFFFFF;
5303                 a2 &= 0xFFFFFFFF;
5304                 a3 &= 0xFFFFFFFF;
5305         }
5306
5307         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5308                 ret = -KVM_EPERM;
5309                 goto out;
5310         }
5311
5312         switch (nr) {
5313         case KVM_HC_VAPIC_POLL_IRQ:
5314                 ret = 0;
5315                 break;
5316         case KVM_HC_MMU_OP:
5317                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5318                 break;
5319         default:
5320                 ret = -KVM_ENOSYS;
5321                 break;
5322         }
5323 out:
5324         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5325         ++vcpu->stat.hypercalls;
5326         return r;
5327 }
5328 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5329
5330 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5331 {
5332         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5333         char instruction[3];
5334         unsigned long rip = kvm_rip_read(vcpu);
5335
5336         /*
5337          * Blow out the MMU to ensure that no other VCPU has an active mapping
5338          * to ensure that the updated hypercall appears atomically across all
5339          * VCPUs.
5340          */
5341         kvm_mmu_zap_all(vcpu->kvm);
5342
5343         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5344
5345         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5346 }
5347
5348 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5349 {
5350         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5351         int j, nent = vcpu->arch.cpuid_nent;
5352
5353         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5354         /* when no next entry is found, the current entry[i] is reselected */
5355         for (j = i + 1; ; j = (j + 1) % nent) {
5356                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5357                 if (ej->function == e->function) {
5358                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5359                         return j;
5360                 }
5361         }
5362         return 0; /* silence gcc, even though control never reaches here */
5363 }
5364
5365 /* find an entry with matching function, matching index (if needed), and that
5366  * should be read next (if it's stateful) */
5367 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5368         u32 function, u32 index)
5369 {
5370         if (e->function != function)
5371                 return 0;
5372         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5373                 return 0;
5374         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5375             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5376                 return 0;
5377         return 1;
5378 }
5379
5380 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5381                                               u32 function, u32 index)
5382 {
5383         int i;
5384         struct kvm_cpuid_entry2 *best = NULL;
5385
5386         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5387                 struct kvm_cpuid_entry2 *e;
5388
5389                 e = &vcpu->arch.cpuid_entries[i];
5390                 if (is_matching_cpuid_entry(e, function, index)) {
5391                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5392                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5393                         best = e;
5394                         break;
5395                 }
5396         }
5397         return best;
5398 }
5399 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5400
5401 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5402 {
5403         struct kvm_cpuid_entry2 *best;
5404
5405         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5406         if (!best || best->eax < 0x80000008)
5407                 goto not_found;
5408         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5409         if (best)
5410                 return best->eax & 0xff;
5411 not_found:
5412         return 36;
5413 }
5414
5415 /*
5416  * If no match is found, check whether we exceed the vCPU's limit
5417  * and return the content of the highest valid _standard_ leaf instead.
5418  * This is to satisfy the CPUID specification.
5419  */
5420 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5421                                                   u32 function, u32 index)
5422 {
5423         struct kvm_cpuid_entry2 *maxlevel;
5424
5425         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5426         if (!maxlevel || maxlevel->eax >= function)
5427                 return NULL;
5428         if (function & 0x80000000) {
5429                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5430                 if (!maxlevel)
5431                         return NULL;
5432         }
5433         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5434 }
5435
5436 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5437 {
5438         u32 function, index;
5439         struct kvm_cpuid_entry2 *best;
5440
5441         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5442         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5443         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5444         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5445         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5446         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5447         best = kvm_find_cpuid_entry(vcpu, function, index);
5448
5449         if (!best)
5450                 best = check_cpuid_limit(vcpu, function, index);
5451
5452         if (best) {
5453                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5454                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5455                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5456                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5457         }
5458         kvm_x86_ops->skip_emulated_instruction(vcpu);
5459         trace_kvm_cpuid(function,
5460                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5461                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5462                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5463                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5464 }
5465 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5466
5467 /*
5468  * Check if userspace requested an interrupt window, and that the
5469  * interrupt window is open.
5470  *
5471  * No need to exit to userspace if we already have an interrupt queued.
5472  */
5473 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5474 {
5475         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5476                 vcpu->run->request_interrupt_window &&
5477                 kvm_arch_interrupt_allowed(vcpu));
5478 }
5479
5480 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5481 {
5482         struct kvm_run *kvm_run = vcpu->run;
5483
5484         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5485         kvm_run->cr8 = kvm_get_cr8(vcpu);
5486         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5487         if (irqchip_in_kernel(vcpu->kvm))
5488                 kvm_run->ready_for_interrupt_injection = 1;
5489         else
5490                 kvm_run->ready_for_interrupt_injection =
5491                         kvm_arch_interrupt_allowed(vcpu) &&
5492                         !kvm_cpu_has_interrupt(vcpu) &&
5493                         !kvm_event_needs_reinjection(vcpu);
5494 }
5495
5496 static void vapic_enter(struct kvm_vcpu *vcpu)
5497 {
5498         struct kvm_lapic *apic = vcpu->arch.apic;
5499         struct page *page;
5500
5501         if (!apic || !apic->vapic_addr)
5502                 return;
5503
5504         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5505
5506         vcpu->arch.apic->vapic_page = page;
5507 }
5508
5509 static void vapic_exit(struct kvm_vcpu *vcpu)
5510 {
5511         struct kvm_lapic *apic = vcpu->arch.apic;
5512         int idx;
5513
5514         if (!apic || !apic->vapic_addr)
5515                 return;
5516
5517         idx = srcu_read_lock(&vcpu->kvm->srcu);
5518         kvm_release_page_dirty(apic->vapic_page);
5519         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5520         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5521 }
5522
5523 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5524 {
5525         int max_irr, tpr;
5526
5527         if (!kvm_x86_ops->update_cr8_intercept)
5528                 return;
5529
5530         if (!vcpu->arch.apic)
5531                 return;
5532
5533         if (!vcpu->arch.apic->vapic_addr)
5534                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5535         else
5536                 max_irr = -1;
5537
5538         if (max_irr != -1)
5539                 max_irr >>= 4;
5540
5541         tpr = kvm_lapic_get_cr8(vcpu);
5542
5543         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5544 }
5545
5546 static void inject_pending_event(struct kvm_vcpu *vcpu)
5547 {
5548         /* try to reinject previous events if any */
5549         if (vcpu->arch.exception.pending) {
5550                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5551                                         vcpu->arch.exception.has_error_code,
5552                                         vcpu->arch.exception.error_code);
5553                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5554                                           vcpu->arch.exception.has_error_code,
5555                                           vcpu->arch.exception.error_code,
5556                                           vcpu->arch.exception.reinject);
5557                 return;
5558         }
5559
5560         if (vcpu->arch.nmi_injected) {
5561                 kvm_x86_ops->set_nmi(vcpu);
5562                 return;
5563         }
5564
5565         if (vcpu->arch.interrupt.pending) {
5566                 kvm_x86_ops->set_irq(vcpu);
5567                 return;
5568         }
5569
5570         /* try to inject new event if pending */
5571         if (vcpu->arch.nmi_pending) {
5572                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5573                         vcpu->arch.nmi_pending = false;
5574                         vcpu->arch.nmi_injected = true;
5575                         kvm_x86_ops->set_nmi(vcpu);
5576                 }
5577         } else if (kvm_cpu_has_interrupt(vcpu)) {
5578                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5579                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5580                                             false);
5581                         kvm_x86_ops->set_irq(vcpu);
5582                 }
5583         }
5584 }
5585
5586 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5587 {
5588         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5589                         !vcpu->guest_xcr0_loaded) {
5590                 /* kvm_set_xcr() also depends on this */
5591                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5592                 vcpu->guest_xcr0_loaded = 1;
5593         }
5594 }
5595
5596 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5597 {
5598         if (vcpu->guest_xcr0_loaded) {
5599                 if (vcpu->arch.xcr0 != host_xcr0)
5600                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5601                 vcpu->guest_xcr0_loaded = 0;
5602         }
5603 }
5604
5605 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5606 {
5607         int r;
5608         bool nmi_pending;
5609         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5610                 vcpu->run->request_interrupt_window;
5611
5612         if (vcpu->requests) {
5613                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5614                         kvm_mmu_unload(vcpu);
5615                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5616                         __kvm_migrate_timers(vcpu);
5617                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5618                         r = kvm_guest_time_update(vcpu);
5619                         if (unlikely(r))
5620                                 goto out;
5621                 }
5622                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5623                         kvm_mmu_sync_roots(vcpu);
5624                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5625                         kvm_x86_ops->tlb_flush(vcpu);
5626                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5627                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5628                         r = 0;
5629                         goto out;
5630                 }
5631                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5632                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5633                         r = 0;
5634                         goto out;
5635                 }
5636                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5637                         vcpu->fpu_active = 0;
5638                         kvm_x86_ops->fpu_deactivate(vcpu);
5639                 }
5640                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5641                         /* Page is swapped out. Do synthetic halt */
5642                         vcpu->arch.apf.halted = true;
5643                         r = 1;
5644                         goto out;
5645                 }
5646                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5647                         record_steal_time(vcpu);
5648
5649         }
5650
5651         r = kvm_mmu_reload(vcpu);
5652         if (unlikely(r))
5653                 goto out;
5654
5655         /*
5656          * An NMI can be injected between local nmi_pending read and
5657          * vcpu->arch.nmi_pending read inside inject_pending_event().
5658          * But in that case, KVM_REQ_EVENT will be set, which makes
5659          * the race described above benign.
5660          */
5661         nmi_pending = ACCESS_ONCE(vcpu->arch.nmi_pending);
5662
5663         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5664                 inject_pending_event(vcpu);
5665
5666                 /* enable NMI/IRQ window open exits if needed */
5667                 if (nmi_pending)
5668                         kvm_x86_ops->enable_nmi_window(vcpu);
5669                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5670                         kvm_x86_ops->enable_irq_window(vcpu);
5671
5672                 if (kvm_lapic_enabled(vcpu)) {
5673                         update_cr8_intercept(vcpu);
5674                         kvm_lapic_sync_to_vapic(vcpu);
5675                 }
5676         }
5677
5678         preempt_disable();
5679
5680         kvm_x86_ops->prepare_guest_switch(vcpu);
5681         if (vcpu->fpu_active)
5682                 kvm_load_guest_fpu(vcpu);
5683         kvm_load_guest_xcr0(vcpu);
5684
5685         vcpu->mode = IN_GUEST_MODE;
5686
5687         /* We should set ->mode before check ->requests,
5688          * see the comment in make_all_cpus_request.
5689          */
5690         smp_mb();
5691
5692         local_irq_disable();
5693
5694         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5695             || need_resched() || signal_pending(current)) {
5696                 vcpu->mode = OUTSIDE_GUEST_MODE;
5697                 smp_wmb();
5698                 local_irq_enable();
5699                 preempt_enable();
5700                 kvm_x86_ops->cancel_injection(vcpu);
5701                 r = 1;
5702                 goto out;
5703         }
5704
5705         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5706
5707         kvm_guest_enter();
5708
5709         if (unlikely(vcpu->arch.switch_db_regs)) {
5710                 set_debugreg(0, 7);
5711                 set_debugreg(vcpu->arch.eff_db[0], 0);
5712                 set_debugreg(vcpu->arch.eff_db[1], 1);
5713                 set_debugreg(vcpu->arch.eff_db[2], 2);
5714                 set_debugreg(vcpu->arch.eff_db[3], 3);
5715         }
5716
5717         trace_kvm_entry(vcpu->vcpu_id);
5718         kvm_x86_ops->run(vcpu);
5719
5720         /*
5721          * If the guest has used debug registers, at least dr7
5722          * will be disabled while returning to the host.
5723          * If we don't have active breakpoints in the host, we don't
5724          * care about the messed up debug address registers. But if
5725          * we have some of them active, restore the old state.
5726          */
5727         if (hw_breakpoint_active())
5728                 hw_breakpoint_restore();
5729
5730         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5731
5732         vcpu->mode = OUTSIDE_GUEST_MODE;
5733         smp_wmb();
5734         local_irq_enable();
5735
5736         ++vcpu->stat.exits;
5737
5738         /*
5739          * We must have an instruction between local_irq_enable() and
5740          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5741          * the interrupt shadow.  The stat.exits increment will do nicely.
5742          * But we need to prevent reordering, hence this barrier():
5743          */
5744         barrier();
5745
5746         kvm_guest_exit();
5747
5748         preempt_enable();
5749
5750         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5751
5752         /*
5753          * Profile KVM exit RIPs:
5754          */
5755         if (unlikely(prof_on == KVM_PROFILING)) {
5756                 unsigned long rip = kvm_rip_read(vcpu);
5757                 profile_hit(KVM_PROFILING, (void *)rip);
5758         }
5759
5760
5761         kvm_lapic_sync_from_vapic(vcpu);
5762
5763         r = kvm_x86_ops->handle_exit(vcpu);
5764 out:
5765         return r;
5766 }
5767
5768
5769 static int __vcpu_run(struct kvm_vcpu *vcpu)
5770 {
5771         int r;
5772         struct kvm *kvm = vcpu->kvm;
5773
5774         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5775                 pr_debug("vcpu %d received sipi with vector # %x\n",
5776                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5777                 kvm_lapic_reset(vcpu);
5778                 r = kvm_arch_vcpu_reset(vcpu);
5779                 if (r)
5780                         return r;
5781                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5782         }
5783
5784         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5785         vapic_enter(vcpu);
5786
5787         r = 1;
5788         while (r > 0) {
5789                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5790                     !vcpu->arch.apf.halted)
5791                         r = vcpu_enter_guest(vcpu);
5792                 else {
5793                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5794                         kvm_vcpu_block(vcpu);
5795                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5796                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5797                         {
5798                                 switch(vcpu->arch.mp_state) {
5799                                 case KVM_MP_STATE_HALTED:
5800                                         vcpu->arch.mp_state =
5801                                                 KVM_MP_STATE_RUNNABLE;
5802                                 case KVM_MP_STATE_RUNNABLE:
5803                                         vcpu->arch.apf.halted = false;
5804                                         break;
5805                                 case KVM_MP_STATE_SIPI_RECEIVED:
5806                                 default:
5807                                         r = -EINTR;
5808                                         break;
5809                                 }
5810                         }
5811                 }
5812
5813                 if (r <= 0)
5814                         break;
5815
5816                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5817                 if (kvm_cpu_has_pending_timer(vcpu))
5818                         kvm_inject_pending_timer_irqs(vcpu);
5819
5820                 if (dm_request_for_irq_injection(vcpu)) {
5821                         r = -EINTR;
5822                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5823                         ++vcpu->stat.request_irq_exits;
5824                 }
5825
5826                 kvm_check_async_pf_completion(vcpu);
5827
5828                 if (signal_pending(current)) {
5829                         r = -EINTR;
5830                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5831                         ++vcpu->stat.signal_exits;
5832                 }
5833                 if (need_resched()) {
5834                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5835                         kvm_resched(vcpu);
5836                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5837                 }
5838         }
5839
5840         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5841
5842         vapic_exit(vcpu);
5843
5844         return r;
5845 }
5846
5847 static int complete_mmio(struct kvm_vcpu *vcpu)
5848 {
5849         struct kvm_run *run = vcpu->run;
5850         int r;
5851
5852         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5853                 return 1;
5854
5855         if (vcpu->mmio_needed) {
5856                 vcpu->mmio_needed = 0;
5857                 if (!vcpu->mmio_is_write)
5858                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5859                                run->mmio.data, 8);
5860                 vcpu->mmio_index += 8;
5861                 if (vcpu->mmio_index < vcpu->mmio_size) {
5862                         run->exit_reason = KVM_EXIT_MMIO;
5863                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5864                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5865                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5866                         run->mmio.is_write = vcpu->mmio_is_write;
5867                         vcpu->mmio_needed = 1;
5868                         return 0;
5869                 }
5870                 if (vcpu->mmio_is_write)
5871                         return 1;
5872                 vcpu->mmio_read_completed = 1;
5873         }
5874         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5875         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5876         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5877         if (r != EMULATE_DONE)
5878                 return 0;
5879         return 1;
5880 }
5881
5882 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5883 {
5884         int r;
5885         sigset_t sigsaved;
5886
5887         if (!tsk_used_math(current) && init_fpu(current))
5888                 return -ENOMEM;
5889
5890         if (vcpu->sigset_active)
5891                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5892
5893         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5894                 kvm_vcpu_block(vcpu);
5895                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5896                 r = -EAGAIN;
5897                 goto out;
5898         }
5899
5900         /* re-sync apic's tpr */
5901         if (!irqchip_in_kernel(vcpu->kvm)) {
5902                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5903                         r = -EINVAL;
5904                         goto out;
5905                 }
5906         }
5907
5908         r = complete_mmio(vcpu);
5909         if (r <= 0)
5910                 goto out;
5911
5912         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5913                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5914                                      kvm_run->hypercall.ret);
5915
5916         r = __vcpu_run(vcpu);
5917
5918 out:
5919         post_kvm_run_save(vcpu);
5920         if (vcpu->sigset_active)
5921                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5922
5923         return r;
5924 }
5925
5926 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5927 {
5928         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5929                 /*
5930                  * We are here if userspace calls get_regs() in the middle of
5931                  * instruction emulation. Registers state needs to be copied
5932                  * back from emulation context to vcpu. Usrapace shouldn't do
5933                  * that usually, but some bad designed PV devices (vmware
5934                  * backdoor interface) need this to work
5935                  */
5936                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5937                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5938                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5939         }
5940         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5941         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5942         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5943         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5944         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5945         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5946         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5947         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5948 #ifdef CONFIG_X86_64
5949         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5950         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5951         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5952         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5953         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5954         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5955         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5956         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5957 #endif
5958
5959         regs->rip = kvm_rip_read(vcpu);
5960         regs->rflags = kvm_get_rflags(vcpu);
5961
5962         return 0;
5963 }
5964
5965 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5966 {
5967         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5968         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5969
5970         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5971         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5972         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5973         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5974         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5975         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5976         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5977         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5978 #ifdef CONFIG_X86_64
5979         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5980         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5981         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5982         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5983         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5984         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5985         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5986         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5987 #endif
5988
5989         kvm_rip_write(vcpu, regs->rip);
5990         kvm_set_rflags(vcpu, regs->rflags);
5991
5992         vcpu->arch.exception.pending = false;
5993
5994         kvm_make_request(KVM_REQ_EVENT, vcpu);
5995
5996         return 0;
5997 }
5998
5999 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6000 {
6001         struct kvm_segment cs;
6002
6003         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6004         *db = cs.db;
6005         *l = cs.l;
6006 }
6007 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6008
6009 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6010                                   struct kvm_sregs *sregs)
6011 {
6012         struct desc_ptr dt;
6013
6014         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6015         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6016         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6017         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6018         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6019         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6020
6021         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6022         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6023
6024         kvm_x86_ops->get_idt(vcpu, &dt);
6025         sregs->idt.limit = dt.size;
6026         sregs->idt.base = dt.address;
6027         kvm_x86_ops->get_gdt(vcpu, &dt);
6028         sregs->gdt.limit = dt.size;
6029         sregs->gdt.base = dt.address;
6030
6031         sregs->cr0 = kvm_read_cr0(vcpu);
6032         sregs->cr2 = vcpu->arch.cr2;
6033         sregs->cr3 = kvm_read_cr3(vcpu);
6034         sregs->cr4 = kvm_read_cr4(vcpu);
6035         sregs->cr8 = kvm_get_cr8(vcpu);
6036         sregs->efer = vcpu->arch.efer;
6037         sregs->apic_base = kvm_get_apic_base(vcpu);
6038
6039         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6040
6041         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6042                 set_bit(vcpu->arch.interrupt.nr,
6043                         (unsigned long *)sregs->interrupt_bitmap);
6044
6045         return 0;
6046 }
6047
6048 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6049                                     struct kvm_mp_state *mp_state)
6050 {
6051         mp_state->mp_state = vcpu->arch.mp_state;
6052         return 0;
6053 }
6054
6055 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6056                                     struct kvm_mp_state *mp_state)
6057 {
6058         vcpu->arch.mp_state = mp_state->mp_state;
6059         kvm_make_request(KVM_REQ_EVENT, vcpu);
6060         return 0;
6061 }
6062
6063 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
6064                     bool has_error_code, u32 error_code)
6065 {
6066         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6067         int ret;
6068
6069         init_emulate_ctxt(vcpu);
6070
6071         ret = emulator_task_switch(ctxt, tss_selector, reason,
6072                                    has_error_code, error_code);
6073
6074         if (ret)
6075                 return EMULATE_FAIL;
6076
6077         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
6078         kvm_rip_write(vcpu, ctxt->eip);
6079         kvm_set_rflags(vcpu, ctxt->eflags);
6080         kvm_make_request(KVM_REQ_EVENT, vcpu);
6081         return EMULATE_DONE;
6082 }
6083 EXPORT_SYMBOL_GPL(kvm_task_switch);
6084
6085 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6086                                   struct kvm_sregs *sregs)
6087 {
6088         int mmu_reset_needed = 0;
6089         int pending_vec, max_bits, idx;
6090         struct desc_ptr dt;
6091
6092         dt.size = sregs->idt.limit;
6093         dt.address = sregs->idt.base;
6094         kvm_x86_ops->set_idt(vcpu, &dt);
6095         dt.size = sregs->gdt.limit;
6096         dt.address = sregs->gdt.base;
6097         kvm_x86_ops->set_gdt(vcpu, &dt);
6098
6099         vcpu->arch.cr2 = sregs->cr2;
6100         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6101         vcpu->arch.cr3 = sregs->cr3;
6102         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6103
6104         kvm_set_cr8(vcpu, sregs->cr8);
6105
6106         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6107         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6108         kvm_set_apic_base(vcpu, sregs->apic_base);
6109
6110         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6111         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6112         vcpu->arch.cr0 = sregs->cr0;
6113
6114         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6115         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6116         if (sregs->cr4 & X86_CR4_OSXSAVE)
6117                 update_cpuid(vcpu);
6118
6119         idx = srcu_read_lock(&vcpu->kvm->srcu);
6120         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6121                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6122                 mmu_reset_needed = 1;
6123         }
6124         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6125
6126         if (mmu_reset_needed)
6127                 kvm_mmu_reset_context(vcpu);
6128
6129         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
6130         pending_vec = find_first_bit(
6131                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6132         if (pending_vec < max_bits) {
6133                 kvm_queue_interrupt(vcpu, pending_vec, false);
6134                 pr_debug("Set back pending irq %d\n", pending_vec);
6135         }
6136
6137         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6138         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6139         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6140         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6141         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6142         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6143
6144         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6145         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6146
6147         update_cr8_intercept(vcpu);
6148
6149         /* Older userspace won't unhalt the vcpu on reset. */
6150         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6151             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6152             !is_protmode(vcpu))
6153                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6154
6155         kvm_make_request(KVM_REQ_EVENT, vcpu);
6156
6157         return 0;
6158 }
6159
6160 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6161                                         struct kvm_guest_debug *dbg)
6162 {
6163         unsigned long rflags;
6164         int i, r;
6165
6166         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6167                 r = -EBUSY;
6168                 if (vcpu->arch.exception.pending)
6169                         goto out;
6170                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6171                         kvm_queue_exception(vcpu, DB_VECTOR);
6172                 else
6173                         kvm_queue_exception(vcpu, BP_VECTOR);
6174         }
6175
6176         /*
6177          * Read rflags as long as potentially injected trace flags are still
6178          * filtered out.
6179          */
6180         rflags = kvm_get_rflags(vcpu);
6181
6182         vcpu->guest_debug = dbg->control;
6183         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6184                 vcpu->guest_debug = 0;