Include missing linux/slab.h inclusions
[linux-3.10.git] / arch / x86 / kernel / i387.c
1 /*
2  *  Copyright (C) 1994 Linus Torvalds
3  *
4  *  Pentium III FXSR, SSE support
5  *  General FPU state handling cleanups
6  *      Gareth Hughes <gareth@valinux.com>, May 2000
7  */
8 #include <linux/module.h>
9 #include <linux/regset.h>
10 #include <linux/sched.h>
11 #include <linux/slab.h>
12
13 #include <asm/sigcontext.h>
14 #include <asm/processor.h>
15 #include <asm/math_emu.h>
16 #include <asm/uaccess.h>
17 #include <asm/ptrace.h>
18 #include <asm/i387.h>
19 #include <asm/fpu-internal.h>
20 #include <asm/user.h>
21
22 /*
23  * Were we in an interrupt that interrupted kernel mode?
24  *
25  * For now, with eagerfpu we will return interrupted kernel FPU
26  * state as not-idle. TBD: Ideally we can change the return value
27  * to something like __thread_has_fpu(current). But we need to
28  * be careful of doing __thread_clear_has_fpu() before saving
29  * the FPU etc for supporting nested uses etc. For now, take
30  * the simple route!
31  *
32  * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
33  * pair does nothing at all: the thread must not have fpu (so
34  * that we don't try to save the FPU state), and TS must
35  * be set (so that the clts/stts pair does nothing that is
36  * visible in the interrupted kernel thread).
37  */
38 static inline bool interrupted_kernel_fpu_idle(void)
39 {
40         if (use_eager_fpu())
41                 return 0;
42
43         return !__thread_has_fpu(current) &&
44                 (read_cr0() & X86_CR0_TS);
45 }
46
47 /*
48  * Were we in user mode (or vm86 mode) when we were
49  * interrupted?
50  *
51  * Doing kernel_fpu_begin/end() is ok if we are running
52  * in an interrupt context from user mode - we'll just
53  * save the FPU state as required.
54  */
55 static inline bool interrupted_user_mode(void)
56 {
57         struct pt_regs *regs = get_irq_regs();
58         return regs && user_mode_vm(regs);
59 }
60
61 /*
62  * Can we use the FPU in kernel mode with the
63  * whole "kernel_fpu_begin/end()" sequence?
64  *
65  * It's always ok in process context (ie "not interrupt")
66  * but it is sometimes ok even from an irq.
67  */
68 bool irq_fpu_usable(void)
69 {
70         return !in_interrupt() ||
71                 interrupted_user_mode() ||
72                 interrupted_kernel_fpu_idle();
73 }
74 EXPORT_SYMBOL(irq_fpu_usable);
75
76 void __kernel_fpu_begin(void)
77 {
78         struct task_struct *me = current;
79
80         if (__thread_has_fpu(me)) {
81                 __save_init_fpu(me);
82                 __thread_clear_has_fpu(me);
83                 /* We do 'stts()' in __kernel_fpu_end() */
84         } else if (!use_eager_fpu()) {
85                 this_cpu_write(fpu_owner_task, NULL);
86                 clts();
87         }
88 }
89 EXPORT_SYMBOL(__kernel_fpu_begin);
90
91 void __kernel_fpu_end(void)
92 {
93         if (use_eager_fpu())
94                 math_state_restore();
95         else
96                 stts();
97 }
98 EXPORT_SYMBOL(__kernel_fpu_end);
99
100 void unlazy_fpu(struct task_struct *tsk)
101 {
102         preempt_disable();
103         if (__thread_has_fpu(tsk)) {
104                 __save_init_fpu(tsk);
105                 __thread_fpu_end(tsk);
106         } else
107                 tsk->fpu_counter = 0;
108         preempt_enable();
109 }
110 EXPORT_SYMBOL(unlazy_fpu);
111
112 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
113 unsigned int xstate_size;
114 EXPORT_SYMBOL_GPL(xstate_size);
115 static struct i387_fxsave_struct fx_scratch __cpuinitdata;
116
117 static void __cpuinit mxcsr_feature_mask_init(void)
118 {
119         unsigned long mask = 0;
120
121         if (cpu_has_fxsr) {
122                 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
123                 asm volatile("fxsave %0" : : "m" (fx_scratch));
124                 mask = fx_scratch.mxcsr_mask;
125                 if (mask == 0)
126                         mask = 0x0000ffbf;
127         }
128         mxcsr_feature_mask &= mask;
129 }
130
131 static void __cpuinit init_thread_xstate(void)
132 {
133         /*
134          * Note that xstate_size might be overwriten later during
135          * xsave_init().
136          */
137
138         if (!HAVE_HWFP) {
139                 /*
140                  * Disable xsave as we do not support it if i387
141                  * emulation is enabled.
142                  */
143                 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
144                 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
145                 xstate_size = sizeof(struct i387_soft_struct);
146                 return;
147         }
148
149         if (cpu_has_fxsr)
150                 xstate_size = sizeof(struct i387_fxsave_struct);
151         else
152                 xstate_size = sizeof(struct i387_fsave_struct);
153 }
154
155 /*
156  * Called at bootup to set up the initial FPU state that is later cloned
157  * into all processes.
158  */
159
160 void __cpuinit fpu_init(void)
161 {
162         unsigned long cr0;
163         unsigned long cr4_mask = 0;
164
165         if (cpu_has_fxsr)
166                 cr4_mask |= X86_CR4_OSFXSR;
167         if (cpu_has_xmm)
168                 cr4_mask |= X86_CR4_OSXMMEXCPT;
169         if (cr4_mask)
170                 set_in_cr4(cr4_mask);
171
172         cr0 = read_cr0();
173         cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
174         if (!HAVE_HWFP)
175                 cr0 |= X86_CR0_EM;
176         write_cr0(cr0);
177
178         /*
179          * init_thread_xstate is only called once to avoid overriding
180          * xstate_size during boot time or during CPU hotplug.
181          */
182         if (xstate_size == 0)
183                 init_thread_xstate();
184
185         mxcsr_feature_mask_init();
186         xsave_init();
187         eager_fpu_init();
188 }
189
190 void fpu_finit(struct fpu *fpu)
191 {
192         if (!HAVE_HWFP) {
193                 finit_soft_fpu(&fpu->state->soft);
194                 return;
195         }
196
197         if (cpu_has_fxsr) {
198                 fx_finit(&fpu->state->fxsave);
199         } else {
200                 struct i387_fsave_struct *fp = &fpu->state->fsave;
201                 memset(fp, 0, xstate_size);
202                 fp->cwd = 0xffff037fu;
203                 fp->swd = 0xffff0000u;
204                 fp->twd = 0xffffffffu;
205                 fp->fos = 0xffff0000u;
206         }
207 }
208 EXPORT_SYMBOL_GPL(fpu_finit);
209
210 /*
211  * The _current_ task is using the FPU for the first time
212  * so initialize it and set the mxcsr to its default
213  * value at reset if we support XMM instructions and then
214  * remember the current task has used the FPU.
215  */
216 int init_fpu(struct task_struct *tsk)
217 {
218         int ret;
219
220         if (tsk_used_math(tsk)) {
221                 if (HAVE_HWFP && tsk == current)
222                         unlazy_fpu(tsk);
223                 tsk->thread.fpu.last_cpu = ~0;
224                 return 0;
225         }
226
227         /*
228          * Memory allocation at the first usage of the FPU and other state.
229          */
230         ret = fpu_alloc(&tsk->thread.fpu);
231         if (ret)
232                 return ret;
233
234         fpu_finit(&tsk->thread.fpu);
235
236         set_stopped_child_used_math(tsk);
237         return 0;
238 }
239 EXPORT_SYMBOL_GPL(init_fpu);
240
241 /*
242  * The xstateregs_active() routine is the same as the fpregs_active() routine,
243  * as the "regset->n" for the xstate regset will be updated based on the feature
244  * capabilites supported by the xsave.
245  */
246 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
247 {
248         return tsk_used_math(target) ? regset->n : 0;
249 }
250
251 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
252 {
253         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
254 }
255
256 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
257                 unsigned int pos, unsigned int count,
258                 void *kbuf, void __user *ubuf)
259 {
260         int ret;
261
262         if (!cpu_has_fxsr)
263                 return -ENODEV;
264
265         ret = init_fpu(target);
266         if (ret)
267                 return ret;
268
269         sanitize_i387_state(target);
270
271         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
272                                    &target->thread.fpu.state->fxsave, 0, -1);
273 }
274
275 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
276                 unsigned int pos, unsigned int count,
277                 const void *kbuf, const void __user *ubuf)
278 {
279         int ret;
280
281         if (!cpu_has_fxsr)
282                 return -ENODEV;
283
284         ret = init_fpu(target);
285         if (ret)
286                 return ret;
287
288         sanitize_i387_state(target);
289
290         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
291                                  &target->thread.fpu.state->fxsave, 0, -1);
292
293         /*
294          * mxcsr reserved bits must be masked to zero for security reasons.
295          */
296         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
297
298         /*
299          * update the header bits in the xsave header, indicating the
300          * presence of FP and SSE state.
301          */
302         if (cpu_has_xsave)
303                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
304
305         return ret;
306 }
307
308 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
309                 unsigned int pos, unsigned int count,
310                 void *kbuf, void __user *ubuf)
311 {
312         int ret;
313
314         if (!cpu_has_xsave)
315                 return -ENODEV;
316
317         ret = init_fpu(target);
318         if (ret)
319                 return ret;
320
321         /*
322          * Copy the 48bytes defined by the software first into the xstate
323          * memory layout in the thread struct, so that we can copy the entire
324          * xstateregs to the user using one user_regset_copyout().
325          */
326         memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
327                xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
328
329         /*
330          * Copy the xstate memory layout.
331          */
332         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
333                                   &target->thread.fpu.state->xsave, 0, -1);
334         return ret;
335 }
336
337 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
338                   unsigned int pos, unsigned int count,
339                   const void *kbuf, const void __user *ubuf)
340 {
341         int ret;
342         struct xsave_hdr_struct *xsave_hdr;
343
344         if (!cpu_has_xsave)
345                 return -ENODEV;
346
347         ret = init_fpu(target);
348         if (ret)
349                 return ret;
350
351         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
352                                  &target->thread.fpu.state->xsave, 0, -1);
353
354         /*
355          * mxcsr reserved bits must be masked to zero for security reasons.
356          */
357         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
358
359         xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
360
361         xsave_hdr->xstate_bv &= pcntxt_mask;
362         /*
363          * These bits must be zero.
364          */
365         xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
366
367         return ret;
368 }
369
370 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
371
372 /*
373  * FPU tag word conversions.
374  */
375
376 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
377 {
378         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
379
380         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
381         tmp = ~twd;
382         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
383         /* and move the valid bits to the lower byte. */
384         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
385         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
386         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
387
388         return tmp;
389 }
390
391 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16)
392 #define FP_EXP_TAG_VALID        0
393 #define FP_EXP_TAG_ZERO         1
394 #define FP_EXP_TAG_SPECIAL      2
395 #define FP_EXP_TAG_EMPTY        3
396
397 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
398 {
399         struct _fpxreg *st;
400         u32 tos = (fxsave->swd >> 11) & 7;
401         u32 twd = (unsigned long) fxsave->twd;
402         u32 tag;
403         u32 ret = 0xffff0000u;
404         int i;
405
406         for (i = 0; i < 8; i++, twd >>= 1) {
407                 if (twd & 0x1) {
408                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
409
410                         switch (st->exponent & 0x7fff) {
411                         case 0x7fff:
412                                 tag = FP_EXP_TAG_SPECIAL;
413                                 break;
414                         case 0x0000:
415                                 if (!st->significand[0] &&
416                                     !st->significand[1] &&
417                                     !st->significand[2] &&
418                                     !st->significand[3])
419                                         tag = FP_EXP_TAG_ZERO;
420                                 else
421                                         tag = FP_EXP_TAG_SPECIAL;
422                                 break;
423                         default:
424                                 if (st->significand[3] & 0x8000)
425                                         tag = FP_EXP_TAG_VALID;
426                                 else
427                                         tag = FP_EXP_TAG_SPECIAL;
428                                 break;
429                         }
430                 } else {
431                         tag = FP_EXP_TAG_EMPTY;
432                 }
433                 ret |= tag << (2 * i);
434         }
435         return ret;
436 }
437
438 /*
439  * FXSR floating point environment conversions.
440  */
441
442 void
443 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
444 {
445         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
446         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
447         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
448         int i;
449
450         env->cwd = fxsave->cwd | 0xffff0000u;
451         env->swd = fxsave->swd | 0xffff0000u;
452         env->twd = twd_fxsr_to_i387(fxsave);
453
454 #ifdef CONFIG_X86_64
455         env->fip = fxsave->rip;
456         env->foo = fxsave->rdp;
457         /*
458          * should be actually ds/cs at fpu exception time, but
459          * that information is not available in 64bit mode.
460          */
461         env->fcs = task_pt_regs(tsk)->cs;
462         if (tsk == current) {
463                 savesegment(ds, env->fos);
464         } else {
465                 env->fos = tsk->thread.ds;
466         }
467         env->fos |= 0xffff0000;
468 #else
469         env->fip = fxsave->fip;
470         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
471         env->foo = fxsave->foo;
472         env->fos = fxsave->fos;
473 #endif
474
475         for (i = 0; i < 8; ++i)
476                 memcpy(&to[i], &from[i], sizeof(to[0]));
477 }
478
479 void convert_to_fxsr(struct task_struct *tsk,
480                      const struct user_i387_ia32_struct *env)
481
482 {
483         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
484         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
485         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
486         int i;
487
488         fxsave->cwd = env->cwd;
489         fxsave->swd = env->swd;
490         fxsave->twd = twd_i387_to_fxsr(env->twd);
491         fxsave->fop = (u16) ((u32) env->fcs >> 16);
492 #ifdef CONFIG_X86_64
493         fxsave->rip = env->fip;
494         fxsave->rdp = env->foo;
495         /* cs and ds ignored */
496 #else
497         fxsave->fip = env->fip;
498         fxsave->fcs = (env->fcs & 0xffff);
499         fxsave->foo = env->foo;
500         fxsave->fos = env->fos;
501 #endif
502
503         for (i = 0; i < 8; ++i)
504                 memcpy(&to[i], &from[i], sizeof(from[0]));
505 }
506
507 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
508                unsigned int pos, unsigned int count,
509                void *kbuf, void __user *ubuf)
510 {
511         struct user_i387_ia32_struct env;
512         int ret;
513
514         ret = init_fpu(target);
515         if (ret)
516                 return ret;
517
518         if (!HAVE_HWFP)
519                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
520
521         if (!cpu_has_fxsr) {
522                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
523                                            &target->thread.fpu.state->fsave, 0,
524                                            -1);
525         }
526
527         sanitize_i387_state(target);
528
529         if (kbuf && pos == 0 && count == sizeof(env)) {
530                 convert_from_fxsr(kbuf, target);
531                 return 0;
532         }
533
534         convert_from_fxsr(&env, target);
535
536         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
537 }
538
539 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
540                unsigned int pos, unsigned int count,
541                const void *kbuf, const void __user *ubuf)
542 {
543         struct user_i387_ia32_struct env;
544         int ret;
545
546         ret = init_fpu(target);
547         if (ret)
548                 return ret;
549
550         sanitize_i387_state(target);
551
552         if (!HAVE_HWFP)
553                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
554
555         if (!cpu_has_fxsr) {
556                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
557                                           &target->thread.fpu.state->fsave, 0, -1);
558         }
559
560         if (pos > 0 || count < sizeof(env))
561                 convert_from_fxsr(&env, target);
562
563         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
564         if (!ret)
565                 convert_to_fxsr(target, &env);
566
567         /*
568          * update the header bit in the xsave header, indicating the
569          * presence of FP.
570          */
571         if (cpu_has_xsave)
572                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
573         return ret;
574 }
575
576 /*
577  * FPU state for core dumps.
578  * This is only used for a.out dumps now.
579  * It is declared generically using elf_fpregset_t (which is
580  * struct user_i387_struct) but is in fact only used for 32-bit
581  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
582  */
583 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
584 {
585         struct task_struct *tsk = current;
586         int fpvalid;
587
588         fpvalid = !!used_math();
589         if (fpvalid)
590                 fpvalid = !fpregs_get(tsk, NULL,
591                                       0, sizeof(struct user_i387_ia32_struct),
592                                       fpu, NULL);
593
594         return fpvalid;
595 }
596 EXPORT_SYMBOL(dump_fpu);
597
598 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */