m32r: Convert mappi irq chips
[linux-3.10.git] / arch / m32r / platforms / mappi / setup.c
1 /*
2  *  linux/arch/m32r/platforms/mappi/setup.c
3  *
4  *  Setup routines for Renesas MAPPI Board
5  *
6  *  Copyright (c) 2001-2005  Hiroyuki Kondo, Hirokazu Takata,
7  *                           Hitoshi Yamamoto
8  */
9
10 #include <linux/irq.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14
15 #include <asm/system.h>
16 #include <asm/m32r.h>
17 #include <asm/io.h>
18
19 #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
20
21 icu_data_t icu_data[NR_IRQS];
22
23 static void disable_mappi_irq(unsigned int irq)
24 {
25         unsigned long port, data;
26
27         port = irq2port(irq);
28         data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
29         outl(data, port);
30 }
31
32 static void enable_mappi_irq(unsigned int irq)
33 {
34         unsigned long port, data;
35
36         port = irq2port(irq);
37         data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
38         outl(data, port);
39 }
40
41 static void mask_mappi(struct irq_data *data)
42 {
43         disable_mappi_irq(data->irq);
44 }
45
46 static void unmask_mappi(struct irq_data *data)
47 {
48         enable_mappi_irq(data->irq);
49 }
50
51 static void shutdown_mappi(struct irq_data *data)
52 {
53         unsigned long port;
54
55         port = irq2port(data->irq);
56         outl(M32R_ICUCR_ILEVEL7, port);
57 }
58
59 static struct irq_chip mappi_irq_type =
60 {
61         .name           = "MAPPI-IRQ",
62         .irq_shutdown   = shutdown_mappi,
63         .irq_mask       = mask_mappi,
64         .irq_unmask     = unmask_mappi,
65 };
66
67 void __init init_IRQ(void)
68 {
69         static int once = 0;
70
71         if (once)
72                 return;
73         else
74                 once++;
75
76 #ifdef CONFIG_NE2000
77         /* INT0 : LAN controller (RTL8019AS) */
78         set_irq_chip_and_handler(M32R_IRQ_INT0, &mappi_irq_type,
79                                  handle_level_irq);
80         icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
81         disable_mappi_irq(M32R_IRQ_INT0);
82 #endif /* CONFIG_M32R_NE2000 */
83
84         /* MFT2 : system timer */
85         set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type,
86                                  handle_level_irq);
87         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
88         disable_mappi_irq(M32R_IRQ_MFT2);
89
90 #ifdef CONFIG_SERIAL_M32R_SIO
91         /* SIO0_R : uart receive data */
92         set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type,
93                                  handle_level_irq);
94         icu_data[M32R_IRQ_SIO0_R].icucr = 0;
95         disable_mappi_irq(M32R_IRQ_SIO0_R);
96
97         /* SIO0_S : uart send data */
98         set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type,
99                                  handle_level_irq);
100         icu_data[M32R_IRQ_SIO0_S].icucr = 0;
101         disable_mappi_irq(M32R_IRQ_SIO0_S);
102
103         /* SIO1_R : uart receive data */
104         set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type,
105                                  handle_level_irq);
106         icu_data[M32R_IRQ_SIO1_R].icucr = 0;
107         disable_mappi_irq(M32R_IRQ_SIO1_R);
108
109         /* SIO1_S : uart send data */
110         set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type,
111                                  handle_level_irq);
112         icu_data[M32R_IRQ_SIO1_S].icucr = 0;
113         disable_mappi_irq(M32R_IRQ_SIO1_S);
114 #endif /* CONFIG_SERIAL_M32R_SIO */
115
116 #if defined(CONFIG_M32R_PCC)
117         /* INT1 : pccard0 interrupt */
118         set_irq_chip_and_handler(M32R_IRQ_INT1, &mappi_irq_type,
119                                  handle_level_irq);
120         icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
121         disable_mappi_irq(M32R_IRQ_INT1);
122
123         /* INT2 : pccard1 interrupt */
124         set_irq_chip_and_handler(M32R_IRQ_INT2, &mappi_irq_type,
125                                  handle_level_irq);
126         icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
127         disable_mappi_irq(M32R_IRQ_INT2);
128 #endif /* CONFIG_M32RPCC */
129 }
130
131 #if defined(CONFIG_FB_S1D13XXX)
132
133 #include <video/s1d13xxxfb.h>
134 #include <asm/s1d13806.h>
135
136 static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
137         .initregs               = s1d13xxxfb_initregs,
138         .initregssize           = ARRAY_SIZE(s1d13xxxfb_initregs),
139         .platform_init_video    = NULL,
140 #ifdef CONFIG_PM
141         .platform_suspend_video = NULL,
142         .platform_resume_video  = NULL,
143 #endif
144 };
145
146 static struct resource s1d13xxxfb_resources[] = {
147         [0] = {
148                 .start  = 0x10200000UL,
149                 .end    = 0x1033FFFFUL,
150                 .flags  = IORESOURCE_MEM,
151         },
152         [1] = {
153                 .start  = 0x10000000UL,
154                 .end    = 0x100001FFUL,
155                 .flags  = IORESOURCE_MEM,
156         }
157 };
158
159 static struct platform_device s1d13xxxfb_device = {
160         .name           = S1D_DEVICENAME,
161         .id             = 0,
162         .dev            = {
163                 .platform_data  = &s1d13xxxfb_data,
164         },
165         .num_resources  = ARRAY_SIZE(s1d13xxxfb_resources),
166         .resource       = s1d13xxxfb_resources,
167 };
168
169 static int __init platform_init(void)
170 {
171         platform_device_register(&s1d13xxxfb_device);
172         return 0;
173 }
174 arch_initcall(platform_init);
175 #endif