Merge with master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
[linux-3.10.git] / arch / ia64 / kernel / ptrace.c
1 /*
2  * Kernel support for the ptrace() and syscall tracing interfaces.
3  *
4  * Copyright (C) 1999-2005 Hewlett-Packard Co
5  *      David Mosberger-Tang <davidm@hpl.hp.com>
6  *
7  * Derived from the x86 and Alpha versions.
8  */
9 #include <linux/config.h>
10 #include <linux/kernel.h>
11 #include <linux/sched.h>
12 #include <linux/slab.h>
13 #include <linux/mm.h>
14 #include <linux/errno.h>
15 #include <linux/ptrace.h>
16 #include <linux/smp_lock.h>
17 #include <linux/user.h>
18 #include <linux/security.h>
19 #include <linux/audit.h>
20 #include <linux/signal.h>
21
22 #include <asm/pgtable.h>
23 #include <asm/processor.h>
24 #include <asm/ptrace_offsets.h>
25 #include <asm/rse.h>
26 #include <asm/system.h>
27 #include <asm/uaccess.h>
28 #include <asm/unwind.h>
29 #ifdef CONFIG_PERFMON
30 #include <asm/perfmon.h>
31 #endif
32
33 #include "entry.h"
34
35 /*
36  * Bits in the PSR that we allow ptrace() to change:
37  *      be, up, ac, mfl, mfh (the user mask; five bits total)
38  *      db (debug breakpoint fault; one bit)
39  *      id (instruction debug fault disable; one bit)
40  *      dd (data debug fault disable; one bit)
41  *      ri (restart instruction; two bits)
42  *      is (instruction set; one bit)
43  */
44 #define IPSR_MASK (IA64_PSR_UM | IA64_PSR_DB | IA64_PSR_IS      \
45                    | IA64_PSR_ID | IA64_PSR_DD | IA64_PSR_RI)
46
47 #define MASK(nbits)     ((1UL << (nbits)) - 1)  /* mask with NBITS bits set */
48 #define PFM_MASK        MASK(38)
49
50 #define PTRACE_DEBUG    0
51
52 #if PTRACE_DEBUG
53 # define dprintk(format...)     printk(format)
54 # define inline
55 #else
56 # define dprintk(format...)
57 #endif
58
59 /* Return TRUE if PT was created due to kernel-entry via a system-call.  */
60
61 static inline int
62 in_syscall (struct pt_regs *pt)
63 {
64         return (long) pt->cr_ifs >= 0;
65 }
66
67 /*
68  * Collect the NaT bits for r1-r31 from scratch_unat and return a NaT
69  * bitset where bit i is set iff the NaT bit of register i is set.
70  */
71 unsigned long
72 ia64_get_scratch_nat_bits (struct pt_regs *pt, unsigned long scratch_unat)
73 {
74 #       define GET_BITS(first, last, unat)                              \
75         ({                                                              \
76                 unsigned long bit = ia64_unat_pos(&pt->r##first);       \
77                 unsigned long nbits = (last - first + 1);               \
78                 unsigned long mask = MASK(nbits) << first;              \
79                 unsigned long dist;                                     \
80                 if (bit < first)                                        \
81                         dist = 64 + bit - first;                        \
82                 else                                                    \
83                         dist = bit - first;                             \
84                 ia64_rotr(unat, dist) & mask;                           \
85         })
86         unsigned long val;
87
88         /*
89          * Registers that are stored consecutively in struct pt_regs
90          * can be handled in parallel.  If the register order in
91          * struct_pt_regs changes, this code MUST be updated.
92          */
93         val  = GET_BITS( 1,  1, scratch_unat);
94         val |= GET_BITS( 2,  3, scratch_unat);
95         val |= GET_BITS(12, 13, scratch_unat);
96         val |= GET_BITS(14, 14, scratch_unat);
97         val |= GET_BITS(15, 15, scratch_unat);
98         val |= GET_BITS( 8, 11, scratch_unat);
99         val |= GET_BITS(16, 31, scratch_unat);
100         return val;
101
102 #       undef GET_BITS
103 }
104
105 /*
106  * Set the NaT bits for the scratch registers according to NAT and
107  * return the resulting unat (assuming the scratch registers are
108  * stored in PT).
109  */
110 unsigned long
111 ia64_put_scratch_nat_bits (struct pt_regs *pt, unsigned long nat)
112 {
113 #       define PUT_BITS(first, last, nat)                               \
114         ({                                                              \
115                 unsigned long bit = ia64_unat_pos(&pt->r##first);       \
116                 unsigned long nbits = (last - first + 1);               \
117                 unsigned long mask = MASK(nbits) << first;              \
118                 long dist;                                              \
119                 if (bit < first)                                        \
120                         dist = 64 + bit - first;                        \
121                 else                                                    \
122                         dist = bit - first;                             \
123                 ia64_rotl(nat & mask, dist);                            \
124         })
125         unsigned long scratch_unat;
126
127         /*
128          * Registers that are stored consecutively in struct pt_regs
129          * can be handled in parallel.  If the register order in
130          * struct_pt_regs changes, this code MUST be updated.
131          */
132         scratch_unat  = PUT_BITS( 1,  1, nat);
133         scratch_unat |= PUT_BITS( 2,  3, nat);
134         scratch_unat |= PUT_BITS(12, 13, nat);
135         scratch_unat |= PUT_BITS(14, 14, nat);
136         scratch_unat |= PUT_BITS(15, 15, nat);
137         scratch_unat |= PUT_BITS( 8, 11, nat);
138         scratch_unat |= PUT_BITS(16, 31, nat);
139
140         return scratch_unat;
141
142 #       undef PUT_BITS
143 }
144
145 #define IA64_MLX_TEMPLATE       0x2
146 #define IA64_MOVL_OPCODE        6
147
148 void
149 ia64_increment_ip (struct pt_regs *regs)
150 {
151         unsigned long w0, ri = ia64_psr(regs)->ri + 1;
152
153         if (ri > 2) {
154                 ri = 0;
155                 regs->cr_iip += 16;
156         } else if (ri == 2) {
157                 get_user(w0, (char __user *) regs->cr_iip + 0);
158                 if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) {
159                         /*
160                          * rfi'ing to slot 2 of an MLX bundle causes
161                          * an illegal operation fault.  We don't want
162                          * that to happen...
163                          */
164                         ri = 0;
165                         regs->cr_iip += 16;
166                 }
167         }
168         ia64_psr(regs)->ri = ri;
169 }
170
171 void
172 ia64_decrement_ip (struct pt_regs *regs)
173 {
174         unsigned long w0, ri = ia64_psr(regs)->ri - 1;
175
176         if (ia64_psr(regs)->ri == 0) {
177                 regs->cr_iip -= 16;
178                 ri = 2;
179                 get_user(w0, (char __user *) regs->cr_iip + 0);
180                 if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) {
181                         /*
182                          * rfi'ing to slot 2 of an MLX bundle causes
183                          * an illegal operation fault.  We don't want
184                          * that to happen...
185                          */
186                         ri = 1;
187                 }
188         }
189         ia64_psr(regs)->ri = ri;
190 }
191
192 /*
193  * This routine is used to read an rnat bits that are stored on the
194  * kernel backing store.  Since, in general, the alignment of the user
195  * and kernel are different, this is not completely trivial.  In
196  * essence, we need to construct the user RNAT based on up to two
197  * kernel RNAT values and/or the RNAT value saved in the child's
198  * pt_regs.
199  *
200  * user rbs
201  *
202  * +--------+ <-- lowest address
203  * | slot62 |
204  * +--------+
205  * |  rnat  | 0x....1f8
206  * +--------+
207  * | slot00 | \
208  * +--------+ |
209  * | slot01 | > child_regs->ar_rnat
210  * +--------+ |
211  * | slot02 | /                         kernel rbs
212  * +--------+                           +--------+
213  *          <- child_regs->ar_bspstore  | slot61 | <-- krbs
214  * +- - - - +                           +--------+
215  *                                      | slot62 |
216  * +- - - - +                           +--------+
217  *                                      |  rnat  |
218  * +- - - - +                           +--------+
219  *   vrnat                              | slot00 |
220  * +- - - - +                           +--------+
221  *                                      =        =
222  *                                      +--------+
223  *                                      | slot00 | \
224  *                                      +--------+ |
225  *                                      | slot01 | > child_stack->ar_rnat
226  *                                      +--------+ |
227  *                                      | slot02 | /
228  *                                      +--------+
229  *                                                <--- child_stack->ar_bspstore
230  *
231  * The way to think of this code is as follows: bit 0 in the user rnat
232  * corresponds to some bit N (0 <= N <= 62) in one of the kernel rnat
233  * value.  The kernel rnat value holding this bit is stored in
234  * variable rnat0.  rnat1 is loaded with the kernel rnat value that
235  * form the upper bits of the user rnat value.
236  *
237  * Boundary cases:
238  *
239  * o when reading the rnat "below" the first rnat slot on the kernel
240  *   backing store, rnat0/rnat1 are set to 0 and the low order bits are
241  *   merged in from pt->ar_rnat.
242  *
243  * o when reading the rnat "above" the last rnat slot on the kernel
244  *   backing store, rnat0/rnat1 gets its value from sw->ar_rnat.
245  */
246 static unsigned long
247 get_rnat (struct task_struct *task, struct switch_stack *sw,
248           unsigned long *krbs, unsigned long *urnat_addr,
249           unsigned long *urbs_end)
250 {
251         unsigned long rnat0 = 0, rnat1 = 0, urnat = 0, *slot0_kaddr;
252         unsigned long umask = 0, mask, m;
253         unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift;
254         long num_regs, nbits;
255         struct pt_regs *pt;
256
257         pt = ia64_task_regs(task);
258         kbsp = (unsigned long *) sw->ar_bspstore;
259         ubspstore = (unsigned long *) pt->ar_bspstore;
260
261         if (urbs_end < urnat_addr)
262                 nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_end);
263         else
264                 nbits = 63;
265         mask = MASK(nbits);
266         /*
267          * First, figure out which bit number slot 0 in user-land maps
268          * to in the kernel rnat.  Do this by figuring out how many
269          * register slots we're beyond the user's backingstore and
270          * then computing the equivalent address in kernel space.
271          */
272         num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1);
273         slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);
274         shift = ia64_rse_slot_num(slot0_kaddr);
275         rnat1_kaddr = ia64_rse_rnat_addr(slot0_kaddr);
276         rnat0_kaddr = rnat1_kaddr - 64;
277
278         if (ubspstore + 63 > urnat_addr) {
279                 /* some bits need to be merged in from pt->ar_rnat */
280                 umask = MASK(ia64_rse_slot_num(ubspstore)) & mask;
281                 urnat = (pt->ar_rnat & umask);
282                 mask &= ~umask;
283                 if (!mask)
284                         return urnat;
285         }
286
287         m = mask << shift;
288         if (rnat0_kaddr >= kbsp)
289                 rnat0 = sw->ar_rnat;
290         else if (rnat0_kaddr > krbs)
291                 rnat0 = *rnat0_kaddr;
292         urnat |= (rnat0 & m) >> shift;
293
294         m = mask >> (63 - shift);
295         if (rnat1_kaddr >= kbsp)
296                 rnat1 = sw->ar_rnat;
297         else if (rnat1_kaddr > krbs)
298                 rnat1 = *rnat1_kaddr;
299         urnat |= (rnat1 & m) << (63 - shift);
300         return urnat;
301 }
302
303 /*
304  * The reverse of get_rnat.
305  */
306 static void
307 put_rnat (struct task_struct *task, struct switch_stack *sw,
308           unsigned long *krbs, unsigned long *urnat_addr, unsigned long urnat,
309           unsigned long *urbs_end)
310 {
311         unsigned long rnat0 = 0, rnat1 = 0, *slot0_kaddr, umask = 0, mask, m;
312         unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift;
313         long num_regs, nbits;
314         struct pt_regs *pt;
315         unsigned long cfm, *urbs_kargs;
316
317         pt = ia64_task_regs(task);
318         kbsp = (unsigned long *) sw->ar_bspstore;
319         ubspstore = (unsigned long *) pt->ar_bspstore;
320
321         urbs_kargs = urbs_end;
322         if (in_syscall(pt)) {
323                 /*
324                  * If entered via syscall, don't allow user to set rnat bits
325                  * for syscall args.
326                  */
327                 cfm = pt->cr_ifs;
328                 urbs_kargs = ia64_rse_skip_regs(urbs_end, -(cfm & 0x7f));
329         }
330
331         if (urbs_kargs >= urnat_addr)
332                 nbits = 63;
333         else {
334                 if ((urnat_addr - 63) >= urbs_kargs)
335                         return;
336                 nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_kargs);
337         }
338         mask = MASK(nbits);
339
340         /*
341          * First, figure out which bit number slot 0 in user-land maps
342          * to in the kernel rnat.  Do this by figuring out how many
343          * register slots we're beyond the user's backingstore and
344          * then computing the equivalent address in kernel space.
345          */
346         num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1);
347         slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);
348         shift = ia64_rse_slot_num(slot0_kaddr);
349         rnat1_kaddr = ia64_rse_rnat_addr(slot0_kaddr);
350         rnat0_kaddr = rnat1_kaddr - 64;
351
352         if (ubspstore + 63 > urnat_addr) {
353                 /* some bits need to be place in pt->ar_rnat: */
354                 umask = MASK(ia64_rse_slot_num(ubspstore)) & mask;
355                 pt->ar_rnat = (pt->ar_rnat & ~umask) | (urnat & umask);
356                 mask &= ~umask;
357                 if (!mask)
358                         return;
359         }
360         /*
361          * Note: Section 11.1 of the EAS guarantees that bit 63 of an
362          * rnat slot is ignored. so we don't have to clear it here.
363          */
364         rnat0 = (urnat << shift);
365         m = mask << shift;
366         if (rnat0_kaddr >= kbsp)
367                 sw->ar_rnat = (sw->ar_rnat & ~m) | (rnat0 & m);
368         else if (rnat0_kaddr > krbs)
369                 *rnat0_kaddr = ((*rnat0_kaddr & ~m) | (rnat0 & m));
370
371         rnat1 = (urnat >> (63 - shift));
372         m = mask >> (63 - shift);
373         if (rnat1_kaddr >= kbsp)
374                 sw->ar_rnat = (sw->ar_rnat & ~m) | (rnat1 & m);
375         else if (rnat1_kaddr > krbs)
376                 *rnat1_kaddr = ((*rnat1_kaddr & ~m) | (rnat1 & m));
377 }
378
379 static inline int
380 on_kernel_rbs (unsigned long addr, unsigned long bspstore,
381                unsigned long urbs_end)
382 {
383         unsigned long *rnat_addr = ia64_rse_rnat_addr((unsigned long *)
384                                                       urbs_end);
385         return (addr >= bspstore && addr <= (unsigned long) rnat_addr);
386 }
387
388 /*
389  * Read a word from the user-level backing store of task CHILD.  ADDR
390  * is the user-level address to read the word from, VAL a pointer to
391  * the return value, and USER_BSP gives the end of the user-level
392  * backing store (i.e., it's the address that would be in ar.bsp after
393  * the user executed a "cover" instruction).
394  *
395  * This routine takes care of accessing the kernel register backing
396  * store for those registers that got spilled there.  It also takes
397  * care of calculating the appropriate RNaT collection words.
398  */
399 long
400 ia64_peek (struct task_struct *child, struct switch_stack *child_stack,
401            unsigned long user_rbs_end, unsigned long addr, long *val)
402 {
403         unsigned long *bspstore, *krbs, regnum, *laddr, *urbs_end, *rnat_addr;
404         struct pt_regs *child_regs;
405         size_t copied;
406         long ret;
407
408         urbs_end = (long *) user_rbs_end;
409         laddr = (unsigned long *) addr;
410         child_regs = ia64_task_regs(child);
411         bspstore = (unsigned long *) child_regs->ar_bspstore;
412         krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
413         if (on_kernel_rbs(addr, (unsigned long) bspstore,
414                           (unsigned long) urbs_end))
415         {
416                 /*
417                  * Attempt to read the RBS in an area that's actually
418                  * on the kernel RBS => read the corresponding bits in
419                  * the kernel RBS.
420                  */
421                 rnat_addr = ia64_rse_rnat_addr(laddr);
422                 ret = get_rnat(child, child_stack, krbs, rnat_addr, urbs_end);
423
424                 if (laddr == rnat_addr) {
425                         /* return NaT collection word itself */
426                         *val = ret;
427                         return 0;
428                 }
429
430                 if (((1UL << ia64_rse_slot_num(laddr)) & ret) != 0) {
431                         /*
432                          * It is implementation dependent whether the
433                          * data portion of a NaT value gets saved on a
434                          * st8.spill or RSE spill (e.g., see EAS 2.6,
435                          * 4.4.4.6 Register Spill and Fill).  To get
436                          * consistent behavior across all possible
437                          * IA-64 implementations, we return zero in
438                          * this case.
439                          */
440                         *val = 0;
441                         return 0;
442                 }
443
444                 if (laddr < urbs_end) {
445                         /*
446                          * The desired word is on the kernel RBS and
447                          * is not a NaT.
448                          */
449                         regnum = ia64_rse_num_regs(bspstore, laddr);
450                         *val = *ia64_rse_skip_regs(krbs, regnum);
451                         return 0;
452                 }
453         }
454         copied = access_process_vm(child, addr, &ret, sizeof(ret), 0);
455         if (copied != sizeof(ret))
456                 return -EIO;
457         *val = ret;
458         return 0;
459 }
460
461 long
462 ia64_poke (struct task_struct *child, struct switch_stack *child_stack,
463            unsigned long user_rbs_end, unsigned long addr, long val)
464 {
465         unsigned long *bspstore, *krbs, regnum, *laddr;
466         unsigned long *urbs_end = (long *) user_rbs_end;
467         struct pt_regs *child_regs;
468
469         laddr = (unsigned long *) addr;
470         child_regs = ia64_task_regs(child);
471         bspstore = (unsigned long *) child_regs->ar_bspstore;
472         krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
473         if (on_kernel_rbs(addr, (unsigned long) bspstore,
474                           (unsigned long) urbs_end))
475         {
476                 /*
477                  * Attempt to write the RBS in an area that's actually
478                  * on the kernel RBS => write the corresponding bits
479                  * in the kernel RBS.
480                  */
481                 if (ia64_rse_is_rnat_slot(laddr))
482                         put_rnat(child, child_stack, krbs, laddr, val,
483                                  urbs_end);
484                 else {
485                         if (laddr < urbs_end) {
486                                 regnum = ia64_rse_num_regs(bspstore, laddr);
487                                 *ia64_rse_skip_regs(krbs, regnum) = val;
488                         }
489                 }
490         } else if (access_process_vm(child, addr, &val, sizeof(val), 1)
491                    != sizeof(val))
492                 return -EIO;
493         return 0;
494 }
495
496 /*
497  * Calculate the address of the end of the user-level register backing
498  * store.  This is the address that would have been stored in ar.bsp
499  * if the user had executed a "cover" instruction right before
500  * entering the kernel.  If CFMP is not NULL, it is used to return the
501  * "current frame mask" that was active at the time the kernel was
502  * entered.
503  */
504 unsigned long
505 ia64_get_user_rbs_end (struct task_struct *child, struct pt_regs *pt,
506                        unsigned long *cfmp)
507 {
508         unsigned long *krbs, *bspstore, cfm = pt->cr_ifs;
509         long ndirty;
510
511         krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
512         bspstore = (unsigned long *) pt->ar_bspstore;
513         ndirty = ia64_rse_num_regs(krbs, krbs + (pt->loadrs >> 19));
514
515         if (in_syscall(pt))
516                 ndirty += (cfm & 0x7f);
517         else
518                 cfm &= ~(1UL << 63);    /* clear valid bit */
519
520         if (cfmp)
521                 *cfmp = cfm;
522         return (unsigned long) ia64_rse_skip_regs(bspstore, ndirty);
523 }
524
525 /*
526  * Synchronize (i.e, write) the RSE backing store living in kernel
527  * space to the VM of the CHILD task.  SW and PT are the pointers to
528  * the switch_stack and pt_regs structures, respectively.
529  * USER_RBS_END is the user-level address at which the backing store
530  * ends.
531  */
532 long
533 ia64_sync_user_rbs (struct task_struct *child, struct switch_stack *sw,
534                     unsigned long user_rbs_start, unsigned long user_rbs_end)
535 {
536         unsigned long addr, val;
537         long ret;
538
539         /* now copy word for word from kernel rbs to user rbs: */
540         for (addr = user_rbs_start; addr < user_rbs_end; addr += 8) {
541                 ret = ia64_peek(child, sw, user_rbs_end, addr, &val);
542                 if (ret < 0)
543                         return ret;
544                 if (access_process_vm(child, addr, &val, sizeof(val), 1)
545                     != sizeof(val))
546                         return -EIO;
547         }
548         return 0;
549 }
550
551 static inline int
552 thread_matches (struct task_struct *thread, unsigned long addr)
553 {
554         unsigned long thread_rbs_end;
555         struct pt_regs *thread_regs;
556
557         if (ptrace_check_attach(thread, 0) < 0)
558                 /*
559                  * If the thread is not in an attachable state, we'll
560                  * ignore it.  The net effect is that if ADDR happens
561                  * to overlap with the portion of the thread's
562                  * register backing store that is currently residing
563                  * on the thread's kernel stack, then ptrace() may end
564                  * up accessing a stale value.  But if the thread
565                  * isn't stopped, that's a problem anyhow, so we're
566                  * doing as well as we can...
567                  */
568                 return 0;
569
570         thread_regs = ia64_task_regs(thread);
571         thread_rbs_end = ia64_get_user_rbs_end(thread, thread_regs, NULL);
572         if (!on_kernel_rbs(addr, thread_regs->ar_bspstore, thread_rbs_end))
573                 return 0;
574
575         return 1;       /* looks like we've got a winner */
576 }
577
578 /*
579  * GDB apparently wants to be able to read the register-backing store
580  * of any thread when attached to a given process.  If we are peeking
581  * or poking an address that happens to reside in the kernel-backing
582  * store of another thread, we need to attach to that thread, because
583  * otherwise we end up accessing stale data.
584  *
585  * task_list_lock must be read-locked before calling this routine!
586  */
587 static struct task_struct *
588 find_thread_for_addr (struct task_struct *child, unsigned long addr)
589 {
590         struct task_struct *g, *p;
591         struct mm_struct *mm;
592         int mm_users;
593
594         if (!(mm = get_task_mm(child)))
595                 return child;
596
597         /* -1 because of our get_task_mm(): */
598         mm_users = atomic_read(&mm->mm_users) - 1;
599         if (mm_users <= 1)
600                 goto out;               /* not multi-threaded */
601
602         /*
603          * First, traverse the child's thread-list.  Good for scalability with
604          * NPTL-threads.
605          */
606         p = child;
607         do {
608                 if (thread_matches(p, addr)) {
609                         child = p;
610                         goto out;
611                 }
612                 if (mm_users-- <= 1)
613                         goto out;
614         } while ((p = next_thread(p)) != child);
615
616         do_each_thread(g, p) {
617                 if (child->mm != mm)
618                         continue;
619
620                 if (thread_matches(p, addr)) {
621                         child = p;
622                         goto out;
623                 }
624         } while_each_thread(g, p);
625   out:
626         mmput(mm);
627         return child;
628 }
629
630 /*
631  * Write f32-f127 back to task->thread.fph if it has been modified.
632  */
633 inline void
634 ia64_flush_fph (struct task_struct *task)
635 {
636         struct ia64_psr *psr = ia64_psr(ia64_task_regs(task));
637
638         if (ia64_is_local_fpu_owner(task) && psr->mfh) {
639                 psr->mfh = 0;
640                 task->thread.flags |= IA64_THREAD_FPH_VALID;
641                 ia64_save_fpu(&task->thread.fph[0]);
642         }
643 }
644
645 /*
646  * Sync the fph state of the task so that it can be manipulated
647  * through thread.fph.  If necessary, f32-f127 are written back to
648  * thread.fph or, if the fph state hasn't been used before, thread.fph
649  * is cleared to zeroes.  Also, access to f32-f127 is disabled to
650  * ensure that the task picks up the state from thread.fph when it
651  * executes again.
652  */
653 void
654 ia64_sync_fph (struct task_struct *task)
655 {
656         struct ia64_psr *psr = ia64_psr(ia64_task_regs(task));
657
658         ia64_flush_fph(task);
659         if (!(task->thread.flags & IA64_THREAD_FPH_VALID)) {
660                 task->thread.flags |= IA64_THREAD_FPH_VALID;
661                 memset(&task->thread.fph, 0, sizeof(task->thread.fph));
662         }
663         ia64_drop_fpu(task);
664         psr->dfh = 1;
665 }
666
667 static int
668 access_fr (struct unw_frame_info *info, int regnum, int hi,
669            unsigned long *data, int write_access)
670 {
671         struct ia64_fpreg fpval;
672         int ret;
673
674         ret = unw_get_fr(info, regnum, &fpval);
675         if (ret < 0)
676                 return ret;
677
678         if (write_access) {
679                 fpval.u.bits[hi] = *data;
680                 ret = unw_set_fr(info, regnum, fpval);
681         } else
682                 *data = fpval.u.bits[hi];
683         return ret;
684 }
685
686 /*
687  * Change the machine-state of CHILD such that it will return via the normal
688  * kernel exit-path, rather than the syscall-exit path.
689  */
690 static void
691 convert_to_non_syscall (struct task_struct *child, struct pt_regs  *pt,
692                         unsigned long cfm)
693 {
694         struct unw_frame_info info, prev_info;
695         unsigned long ip, pr;
696
697         unw_init_from_blocked_task(&info, child);
698         while (1) {
699                 prev_info = info;
700                 if (unw_unwind(&info) < 0)
701                         return;
702                 if (unw_get_rp(&info, &ip) < 0)
703                         return;
704                 if (ip < FIXADDR_USER_END)
705                         break;
706         }
707
708         unw_get_pr(&prev_info, &pr);
709         pr &= ~(1UL << PRED_SYSCALL);
710         pr |=  (1UL << PRED_NON_SYSCALL);
711         unw_set_pr(&prev_info, pr);
712
713         pt->cr_ifs = (1UL << 63) | cfm;
714 }
715
716 static int
717 access_nat_bits (struct task_struct *child, struct pt_regs *pt,
718                  struct unw_frame_info *info,
719                  unsigned long *data, int write_access)
720 {
721         unsigned long regnum, nat_bits, scratch_unat, dummy = 0;
722         char nat = 0;
723
724         if (write_access) {
725                 nat_bits = *data;
726                 scratch_unat = ia64_put_scratch_nat_bits(pt, nat_bits);
727                 if (unw_set_ar(info, UNW_AR_UNAT, scratch_unat) < 0) {
728                         dprintk("ptrace: failed to set ar.unat\n");
729                         return -1;
730                 }
731                 for (regnum = 4; regnum <= 7; ++regnum) {
732                         unw_get_gr(info, regnum, &dummy, &nat);
733                         unw_set_gr(info, regnum, dummy,
734                                    (nat_bits >> regnum) & 1);
735                 }
736         } else {
737                 if (unw_get_ar(info, UNW_AR_UNAT, &scratch_unat) < 0) {
738                         dprintk("ptrace: failed to read ar.unat\n");
739                         return -1;
740                 }
741                 nat_bits = ia64_get_scratch_nat_bits(pt, scratch_unat);
742                 for (regnum = 4; regnum <= 7; ++regnum) {
743                         unw_get_gr(info, regnum, &dummy, &nat);
744                         nat_bits |= (nat != 0) << regnum;
745                 }
746                 *data = nat_bits;
747         }
748         return 0;
749 }
750
751 static int
752 access_uarea (struct task_struct *child, unsigned long addr,
753               unsigned long *data, int write_access)
754 {
755         unsigned long *ptr, regnum, urbs_end, rnat_addr, cfm;
756         struct switch_stack *sw;
757         struct pt_regs *pt;
758 #       define pt_reg_addr(pt, reg)     ((void *)                           \
759                                          ((unsigned long) (pt)              \
760                                           + offsetof(struct pt_regs, reg)))
761
762
763         pt = ia64_task_regs(child);
764         sw = (struct switch_stack *) (child->thread.ksp + 16);
765
766         if ((addr & 0x7) != 0) {
767                 dprintk("ptrace: unaligned register address 0x%lx\n", addr);
768                 return -1;
769         }
770
771         if (addr < PT_F127 + 16) {
772                 /* accessing fph */
773                 if (write_access)
774                         ia64_sync_fph(child);
775                 else
776                         ia64_flush_fph(child);
777                 ptr = (unsigned long *)
778                         ((unsigned long) &child->thread.fph + addr);
779         } else if ((addr >= PT_F10) && (addr < PT_F11 + 16)) {
780                 /* scratch registers untouched by kernel (saved in pt_regs) */
781                 ptr = pt_reg_addr(pt, f10) + (addr - PT_F10);
782         } else if (addr >= PT_F12 && addr < PT_F15 + 16) {
783                 /*
784                  * Scratch registers untouched by kernel (saved in
785                  * switch_stack).
786                  */
787                 ptr = (unsigned long *) ((long) sw
788                                          + (addr - PT_NAT_BITS - 32));
789         } else if (addr < PT_AR_LC + 8) {
790                 /* preserved state: */
791                 struct unw_frame_info info;
792                 char nat = 0;
793                 int ret;
794
795                 unw_init_from_blocked_task(&info, child);
796                 if (unw_unwind_to_user(&info) < 0)
797                         return -1;
798
799                 switch (addr) {
800                       case PT_NAT_BITS:
801                         return access_nat_bits(child, pt, &info,
802                                                data, write_access);
803
804                       case PT_R4: case PT_R5: case PT_R6: case PT_R7:
805                         if (write_access) {
806                                 /* read NaT bit first: */
807                                 unsigned long dummy;
808
809                                 ret = unw_get_gr(&info, (addr - PT_R4)/8 + 4,
810                                                  &dummy, &nat);
811                                 if (ret < 0)
812                                         return ret;
813                         }
814                         return unw_access_gr(&info, (addr - PT_R4)/8 + 4, data,
815                                              &nat, write_access);
816
817                       case PT_B1: case PT_B2: case PT_B3:
818                       case PT_B4: case PT_B5:
819                         return unw_access_br(&info, (addr - PT_B1)/8 + 1, data,
820                                              write_access);
821
822                       case PT_AR_EC:
823                         return unw_access_ar(&info, UNW_AR_EC, data,
824                                              write_access);
825
826                       case PT_AR_LC:
827                         return unw_access_ar(&info, UNW_AR_LC, data,
828                                              write_access);
829
830                       default:
831                         if (addr >= PT_F2 && addr < PT_F5 + 16)
832                                 return access_fr(&info, (addr - PT_F2)/16 + 2,
833                                                  (addr & 8) != 0, data,
834                                                  write_access);
835                         else if (addr >= PT_F16 && addr < PT_F31 + 16)
836                                 return access_fr(&info,
837                                                  (addr - PT_F16)/16 + 16,
838                                                  (addr & 8) != 0,
839                                                  data, write_access);
840                         else {
841                                 dprintk("ptrace: rejecting access to register "
842                                         "address 0x%lx\n", addr);
843                                 return -1;
844                         }
845                 }
846         } else if (addr < PT_F9+16) {
847                 /* scratch state */
848                 switch (addr) {
849                       case PT_AR_BSP:
850                         /*
851                          * By convention, we use PT_AR_BSP to refer to
852                          * the end of the user-level backing store.
853                          * Use ia64_rse_skip_regs(PT_AR_BSP, -CFM.sof)
854                          * to get the real value of ar.bsp at the time
855                          * the kernel was entered.
856                          *
857                          * Furthermore, when changing the contents of
858                          * PT_AR_BSP (or PT_CFM) we MUST copy any
859                          * users-level stacked registers that are
860                          * stored on the kernel stack back to
861                          * user-space because otherwise, we might end
862                          * up clobbering kernel stacked registers.
863                          * Also, if this happens while the task is
864                          * blocked in a system call, which convert the
865                          * state such that the non-system-call exit
866                          * path is used.  This ensures that the proper
867                          * state will be picked up when resuming
868                          * execution.  However, it *also* means that
869                          * once we write PT_AR_BSP/PT_CFM, it won't be
870                          * possible to modify the syscall arguments of
871                          * the pending system call any longer.  This
872                          * shouldn't be an issue because modifying
873                          * PT_AR_BSP/PT_CFM generally implies that
874                          * we're either abandoning the pending system
875                          * call or that we defer it's re-execution
876                          * (e.g., due to GDB doing an inferior
877                          * function call).
878                          */
879                         urbs_end = ia64_get_user_rbs_end(child, pt, &cfm);
880                         if (write_access) {
881                                 if (*data != urbs_end) {
882                                         if (ia64_sync_user_rbs(child, sw,
883                                                                pt->ar_bspstore,
884                                                                urbs_end) < 0)
885                                                 return -1;
886                                         if (in_syscall(pt))
887                                                 convert_to_non_syscall(child,
888                                                                        pt,
889                                                                        cfm);
890                                         /*
891                                          * Simulate user-level write
892                                          * of ar.bsp:
893                                          */
894                                         pt->loadrs = 0;
895                                         pt->ar_bspstore = *data;
896                                 }
897                         } else
898                                 *data = urbs_end;
899                         return 0;
900
901                       case PT_CFM:
902                         urbs_end = ia64_get_user_rbs_end(child, pt, &cfm);
903                         if (write_access) {
904                                 if (((cfm ^ *data) & PFM_MASK) != 0) {
905                                         if (ia64_sync_user_rbs(child, sw,
906                                                                pt->ar_bspstore,
907                                                                urbs_end) < 0)
908                                                 return -1;
909                                         if (in_syscall(pt))
910                                                 convert_to_non_syscall(child,
911                                                                        pt,
912                                                                        cfm);
913                                         pt->cr_ifs = ((pt->cr_ifs & ~PFM_MASK)
914                                                       | (*data & PFM_MASK));
915                                 }
916                         } else
917                                 *data = cfm;
918                         return 0;
919
920                       case PT_CR_IPSR:
921                         if (write_access)
922                                 pt->cr_ipsr = ((*data & IPSR_MASK)
923                                                | (pt->cr_ipsr & ~IPSR_MASK));
924                         else
925                                 *data = (pt->cr_ipsr & IPSR_MASK);
926                         return 0;
927
928                       case PT_AR_RNAT:
929                         urbs_end = ia64_get_user_rbs_end(child, pt, NULL);
930                         rnat_addr = (long) ia64_rse_rnat_addr((long *)
931                                                               urbs_end);
932                         if (write_access)
933                                 return ia64_poke(child, sw, urbs_end,
934                                                  rnat_addr, *data);
935                         else
936                                 return ia64_peek(child, sw, urbs_end,
937                                                  rnat_addr, data);
938
939                       case PT_R1:
940                         ptr = pt_reg_addr(pt, r1);
941                         break;
942                       case PT_R2:  case PT_R3:
943                         ptr = pt_reg_addr(pt, r2) + (addr - PT_R2);
944                         break;
945                       case PT_R8:  case PT_R9:  case PT_R10: case PT_R11:
946                         ptr = pt_reg_addr(pt, r8) + (addr - PT_R8);
947                         break;
948                       case PT_R12: case PT_R13:
949                         ptr = pt_reg_addr(pt, r12) + (addr - PT_R12);
950                         break;
951                       case PT_R14:
952                         ptr = pt_reg_addr(pt, r14);
953                         break;
954                       case PT_R15:
955                         ptr = pt_reg_addr(pt, r15);
956                         break;
957                       case PT_R16: case PT_R17: case PT_R18: case PT_R19:
958                       case PT_R20: case PT_R21: case PT_R22: case PT_R23:
959                       case PT_R24: case PT_R25: case PT_R26: case PT_R27:
960                       case PT_R28: case PT_R29: case PT_R30: case PT_R31:
961                         ptr = pt_reg_addr(pt, r16) + (addr - PT_R16);
962                         break;
963                       case PT_B0:
964                         ptr = pt_reg_addr(pt, b0);
965                         break;
966                       case PT_B6:
967                         ptr = pt_reg_addr(pt, b6);
968                         break;
969                       case PT_B7:
970                         ptr = pt_reg_addr(pt, b7);
971                         break;
972                       case PT_F6:  case PT_F6+8: case PT_F7: case PT_F7+8:
973                       case PT_F8:  case PT_F8+8: case PT_F9: case PT_F9+8:
974                         ptr = pt_reg_addr(pt, f6) + (addr - PT_F6);
975                         break;
976                       case PT_AR_BSPSTORE:
977                         ptr = pt_reg_addr(pt, ar_bspstore);
978                         break;
979                       case PT_AR_RSC:
980                         ptr = pt_reg_addr(pt, ar_rsc);
981                         break;
982                       case PT_AR_UNAT:
983                         ptr = pt_reg_addr(pt, ar_unat);
984                         break;
985                       case PT_AR_PFS:
986                         ptr = pt_reg_addr(pt, ar_pfs);
987                         break;
988                       case PT_AR_CCV:
989                         ptr = pt_reg_addr(pt, ar_ccv);
990                         break;
991                       case PT_AR_FPSR:
992                         ptr = pt_reg_addr(pt, ar_fpsr);
993                         break;
994                       case PT_CR_IIP:
995                         ptr = pt_reg_addr(pt, cr_iip);
996                         break;
997                       case PT_PR:
998                         ptr = pt_reg_addr(pt, pr);
999                         break;
1000                         /* scratch register */
1001
1002                       default:
1003                         /* disallow accessing anything else... */
1004                         dprintk("ptrace: rejecting access to register "
1005                                 "address 0x%lx\n", addr);
1006                         return -1;
1007                 }
1008         } else if (addr <= PT_AR_SSD) {
1009                 ptr = pt_reg_addr(pt, ar_csd) + (addr - PT_AR_CSD);
1010         } else {
1011                 /* access debug registers */
1012
1013                 if (addr >= PT_IBR) {
1014                         regnum = (addr - PT_IBR) >> 3;
1015                         ptr = &child->thread.ibr[0];
1016                 } else {
1017                         regnum = (addr - PT_DBR) >> 3;
1018                         ptr = &child->thread.dbr[0];
1019                 }
1020
1021                 if (regnum >= 8) {
1022                         dprintk("ptrace: rejecting access to register "
1023                                 "address 0x%lx\n", addr);
1024                         return -1;
1025                 }
1026 #ifdef CONFIG_PERFMON
1027                 /*
1028                  * Check if debug registers are used by perfmon. This
1029                  * test must be done once we know that we can do the
1030                  * operation, i.e. the arguments are all valid, but
1031                  * before we start modifying the state.
1032                  *
1033                  * Perfmon needs to keep a count of how many processes
1034                  * are trying to modify the debug registers for system
1035                  * wide monitoring sessions.
1036                  *
1037                  * We also include read access here, because they may
1038                  * cause the PMU-installed debug register state
1039                  * (dbr[], ibr[]) to be reset. The two arrays are also
1040                  * used by perfmon, but we do not use
1041                  * IA64_THREAD_DBG_VALID. The registers are restored
1042                  * by the PMU context switch code.
1043                  */
1044                 if (pfm_use_debug_registers(child)) return -1;
1045 #endif
1046
1047                 if (!(child->thread.flags & IA64_THREAD_DBG_VALID)) {
1048                         child->thread.flags |= IA64_THREAD_DBG_VALID;
1049                         memset(child->thread.dbr, 0,
1050                                sizeof(child->thread.dbr));
1051                         memset(child->thread.ibr, 0,
1052                                sizeof(child->thread.ibr));
1053                 }
1054
1055                 ptr += regnum;
1056
1057                 if ((regnum & 1) && write_access) {
1058                         /* don't let the user set kernel-level breakpoints: */
1059                         *ptr = *data & ~(7UL << 56);
1060                         return 0;
1061                 }
1062         }
1063         if (write_access)
1064                 *ptr = *data;
1065         else
1066                 *data = *ptr;
1067         return 0;
1068 }
1069
1070 static long
1071 ptrace_getregs (struct task_struct *child, struct pt_all_user_regs __user *ppr)
1072 {
1073         unsigned long psr, ec, lc, rnat, bsp, cfm, nat_bits, val;
1074         struct unw_frame_info info;
1075         struct ia64_fpreg fpval;
1076         struct switch_stack *sw;
1077         struct pt_regs *pt;
1078         long ret, retval = 0;
1079         char nat = 0;
1080         int i;
1081
1082         if (!access_ok(VERIFY_WRITE, ppr, sizeof(struct pt_all_user_regs)))
1083                 return -EIO;
1084
1085         pt = ia64_task_regs(child);
1086         sw = (struct switch_stack *) (child->thread.ksp + 16);
1087         unw_init_from_blocked_task(&info, child);
1088         if (unw_unwind_to_user(&info) < 0) {
1089                 return -EIO;
1090         }
1091
1092         if (((unsigned long) ppr & 0x7) != 0) {
1093                 dprintk("ptrace:unaligned register address %p\n", ppr);
1094                 return -EIO;
1095         }
1096
1097         if (access_uarea(child, PT_CR_IPSR, &psr, 0) < 0
1098             || access_uarea(child, PT_AR_EC, &ec, 0) < 0
1099             || access_uarea(child, PT_AR_LC, &lc, 0) < 0
1100             || access_uarea(child, PT_AR_RNAT, &rnat, 0) < 0
1101             || access_uarea(child, PT_AR_BSP, &bsp, 0) < 0
1102             || access_uarea(child, PT_CFM, &cfm, 0)
1103             || access_uarea(child, PT_NAT_BITS, &nat_bits, 0))
1104                 return -EIO;
1105
1106         /* control regs */
1107
1108         retval |= __put_user(pt->cr_iip, &ppr->cr_iip);
1109         retval |= __put_user(psr, &ppr->cr_ipsr);
1110
1111         /* app regs */
1112
1113         retval |= __put_user(pt->ar_pfs, &ppr->ar[PT_AUR_PFS]);
1114         retval |= __put_user(pt->ar_rsc, &ppr->ar[PT_AUR_RSC]);
1115         retval |= __put_user(pt->ar_bspstore, &ppr->ar[PT_AUR_BSPSTORE]);
1116         retval |= __put_user(pt->ar_unat, &ppr->ar[PT_AUR_UNAT]);
1117         retval |= __put_user(pt->ar_ccv, &ppr->ar[PT_AUR_CCV]);
1118         retval |= __put_user(pt->ar_fpsr, &ppr->ar[PT_AUR_FPSR]);
1119
1120         retval |= __put_user(ec, &ppr->ar[PT_AUR_EC]);
1121         retval |= __put_user(lc, &ppr->ar[PT_AUR_LC]);
1122         retval |= __put_user(rnat, &ppr->ar[PT_AUR_RNAT]);
1123         retval |= __put_user(bsp, &ppr->ar[PT_AUR_BSP]);
1124         retval |= __put_user(cfm, &ppr->cfm);
1125
1126         /* gr1-gr3 */
1127
1128         retval |= __copy_to_user(&ppr->gr[1], &pt->r1, sizeof(long));
1129         retval |= __copy_to_user(&ppr->gr[2], &pt->r2, sizeof(long) *2);
1130
1131         /* gr4-gr7 */
1132
1133         for (i = 4; i < 8; i++) {
1134                 if (unw_access_gr(&info, i, &val, &nat, 0) < 0)
1135                         return -EIO;
1136                 retval |= __put_user(val, &ppr->gr[i]);
1137         }
1138
1139         /* gr8-gr11 */
1140
1141         retval |= __copy_to_user(&ppr->gr[8], &pt->r8, sizeof(long) * 4);
1142
1143         /* gr12-gr15 */
1144
1145         retval |= __copy_to_user(&ppr->gr[12], &pt->r12, sizeof(long) * 2);
1146         retval |= __copy_to_user(&ppr->gr[14], &pt->r14, sizeof(long));
1147         retval |= __copy_to_user(&ppr->gr[15], &pt->r15, sizeof(long));
1148
1149         /* gr16-gr31 */
1150
1151         retval |= __copy_to_user(&ppr->gr[16], &pt->r16, sizeof(long) * 16);
1152
1153         /* b0 */
1154
1155         retval |= __put_user(pt->b0, &ppr->br[0]);
1156
1157         /* b1-b5 */
1158
1159         for (i = 1; i < 6; i++) {
1160                 if (unw_access_br(&info, i, &val, 0) < 0)
1161                         return -EIO;
1162                 __put_user(val, &ppr->br[i]);
1163         }
1164
1165         /* b6-b7 */
1166
1167         retval |= __put_user(pt->b6, &ppr->br[6]);
1168         retval |= __put_user(pt->b7, &ppr->br[7]);
1169
1170         /* fr2-fr5 */
1171
1172         for (i = 2; i < 6; i++) {
1173                 if (unw_get_fr(&info, i, &fpval) < 0)
1174                         return -EIO;
1175                 retval |= __copy_to_user(&ppr->fr[i], &fpval, sizeof (fpval));
1176         }
1177
1178         /* fr6-fr11 */
1179
1180         retval |= __copy_to_user(&ppr->fr[6], &pt->f6,
1181                                  sizeof(struct ia64_fpreg) * 6);
1182
1183         /* fp scratch regs(12-15) */
1184
1185         retval |= __copy_to_user(&ppr->fr[12], &sw->f12,
1186                                  sizeof(struct ia64_fpreg) * 4);
1187
1188         /* fr16-fr31 */
1189
1190         for (i = 16; i < 32; i++) {
1191                 if (unw_get_fr(&info, i, &fpval) < 0)
1192                         return -EIO;
1193                 retval |= __copy_to_user(&ppr->fr[i], &fpval, sizeof (fpval));
1194         }
1195
1196         /* fph */
1197
1198         ia64_flush_fph(child);
1199         retval |= __copy_to_user(&ppr->fr[32], &child->thread.fph,
1200                                  sizeof(ppr->fr[32]) * 96);
1201
1202         /*  preds */
1203
1204         retval |= __put_user(pt->pr, &ppr->pr);
1205
1206         /* nat bits */
1207
1208         retval |= __put_user(nat_bits, &ppr->nat);
1209
1210         ret = retval ? -EIO : 0;
1211         return ret;
1212 }
1213
1214 static long
1215 ptrace_setregs (struct task_struct *child, struct pt_all_user_regs __user *ppr)
1216 {
1217         unsigned long psr, ec, lc, rnat, bsp, cfm, nat_bits, val = 0;
1218         struct unw_frame_info info;
1219         struct switch_stack *sw;
1220         struct ia64_fpreg fpval;
1221         struct pt_regs *pt;
1222         long ret, retval = 0;
1223         int i;
1224
1225         memset(&fpval, 0, sizeof(fpval));
1226
1227         if (!access_ok(VERIFY_READ, ppr, sizeof(struct pt_all_user_regs)))
1228                 return -EIO;
1229
1230         pt = ia64_task_regs(child);
1231         sw = (struct switch_stack *) (child->thread.ksp + 16);
1232         unw_init_from_blocked_task(&info, child);
1233         if (unw_unwind_to_user(&info) < 0) {
1234                 return -EIO;
1235         }
1236
1237         if (((unsigned long) ppr & 0x7) != 0) {
1238                 dprintk("ptrace:unaligned register address %p\n", ppr);
1239                 return -EIO;
1240         }
1241
1242         /* control regs */
1243
1244         retval |= __get_user(pt->cr_iip, &ppr->cr_iip);
1245         retval |= __get_user(psr, &ppr->cr_ipsr);
1246
1247         /* app regs */
1248
1249         retval |= __get_user(pt->ar_pfs, &ppr->ar[PT_AUR_PFS]);
1250         retval |= __get_user(pt->ar_rsc, &ppr->ar[PT_AUR_RSC]);
1251         retval |= __get_user(pt->ar_bspstore, &ppr->ar[PT_AUR_BSPSTORE]);
1252         retval |= __get_user(pt->ar_unat, &ppr->ar[PT_AUR_UNAT]);
1253         retval |= __get_user(pt->ar_ccv, &ppr->ar[PT_AUR_CCV]);
1254         retval |= __get_user(pt->ar_fpsr, &ppr->ar[PT_AUR_FPSR]);
1255
1256         retval |= __get_user(ec, &ppr->ar[PT_AUR_EC]);
1257         retval |= __get_user(lc, &ppr->ar[PT_AUR_LC]);
1258         retval |= __get_user(rnat, &ppr->ar[PT_AUR_RNAT]);
1259         retval |= __get_user(bsp, &ppr->ar[PT_AUR_BSP]);
1260         retval |= __get_user(cfm, &ppr->cfm);
1261
1262         /* gr1-gr3 */
1263
1264         retval |= __copy_from_user(&pt->r1, &ppr->gr[1], sizeof(long));
1265         retval |= __copy_from_user(&pt->r2, &ppr->gr[2], sizeof(long) * 2);
1266
1267         /* gr4-gr7 */
1268
1269         for (i = 4; i < 8; i++) {
1270                 retval |= __get_user(val, &ppr->gr[i]);
1271                 /* NaT bit will be set via PT_NAT_BITS: */
1272                 if (unw_set_gr(&info, i, val, 0) < 0)
1273                         return -EIO;
1274         }
1275
1276         /* gr8-gr11 */
1277
1278         retval |= __copy_from_user(&pt->r8, &ppr->gr[8], sizeof(long) * 4);
1279
1280         /* gr12-gr15 */
1281
1282         retval |= __copy_from_user(&pt->r12, &ppr->gr[12], sizeof(long) * 2);
1283         retval |= __copy_from_user(&pt->r14, &ppr->gr[14], sizeof(long));
1284         retval |= __copy_from_user(&pt->r15, &ppr->gr[15], sizeof(long));
1285
1286         /* gr16-gr31 */
1287
1288         retval |= __copy_from_user(&pt->r16, &ppr->gr[16], sizeof(long) * 16);
1289
1290         /* b0 */
1291
1292         retval |= __get_user(pt->b0, &ppr->br[0]);
1293
1294         /* b1-b5 */
1295
1296         for (i = 1; i < 6; i++) {
1297                 retval |= __get_user(val, &ppr->br[i]);
1298                 unw_set_br(&info, i, val);
1299         }
1300
1301         /* b6-b7 */
1302
1303         retval |= __get_user(pt->b6, &ppr->br[6]);
1304         retval |= __get_user(pt->b7, &ppr->br[7]);
1305
1306         /* fr2-fr5 */
1307
1308         for (i = 2; i < 6; i++) {
1309                 retval |= __copy_from_user(&fpval, &ppr->fr[i], sizeof(fpval));
1310                 if (unw_set_fr(&info, i, fpval) < 0)
1311                         return -EIO;
1312         }
1313
1314         /* fr6-fr11 */
1315
1316         retval |= __copy_from_user(&pt->f6, &ppr->fr[6],
1317                                    sizeof(ppr->fr[6]) * 6);
1318
1319         /* fp scratch regs(12-15) */
1320
1321         retval |= __copy_from_user(&sw->f12, &ppr->fr[12],
1322                                    sizeof(ppr->fr[12]) * 4);
1323
1324         /* fr16-fr31 */
1325
1326         for (i = 16; i < 32; i++) {
1327                 retval |= __copy_from_user(&fpval, &ppr->fr[i],
1328                                            sizeof(fpval));
1329                 if (unw_set_fr(&info, i, fpval) < 0)
1330                         return -EIO;
1331         }
1332
1333         /* fph */
1334
1335         ia64_sync_fph(child);
1336         retval |= __copy_from_user(&child->thread.fph, &ppr->fr[32],
1337                                    sizeof(ppr->fr[32]) * 96);
1338
1339         /* preds */
1340
1341         retval |= __get_user(pt->pr, &ppr->pr);
1342
1343         /* nat bits */
1344
1345         retval |= __get_user(nat_bits, &ppr->nat);
1346
1347         retval |= access_uarea(child, PT_CR_IPSR, &psr, 1);
1348         retval |= access_uarea(child, PT_AR_EC, &ec, 1);
1349         retval |= access_uarea(child, PT_AR_LC, &lc, 1);
1350         retval |= access_uarea(child, PT_AR_RNAT, &rnat, 1);
1351         retval |= access_uarea(child, PT_AR_BSP, &bsp, 1);
1352         retval |= access_uarea(child, PT_CFM, &cfm, 1);
1353         retval |= access_uarea(child, PT_NAT_BITS, &nat_bits, 1);
1354
1355         ret = retval ? -EIO : 0;
1356         return ret;
1357 }
1358
1359 /*
1360  * Called by kernel/ptrace.c when detaching..
1361  *
1362  * Make sure the single step bit is not set.
1363  */
1364 void
1365 ptrace_disable (struct task_struct *child)
1366 {
1367         struct ia64_psr *child_psr = ia64_psr(ia64_task_regs(child));
1368
1369         /* make sure the single step/taken-branch trap bits are not set: */
1370         child_psr->ss = 0;
1371         child_psr->tb = 0;
1372 }
1373
1374 asmlinkage long
1375 sys_ptrace (long request, pid_t pid, unsigned long addr, unsigned long data)
1376 {
1377         struct pt_regs *pt;
1378         unsigned long urbs_end, peek_or_poke;
1379         struct task_struct *child;
1380         struct switch_stack *sw;
1381         long ret;
1382
1383         lock_kernel();
1384         ret = -EPERM;
1385         if (request == PTRACE_TRACEME) {
1386                 /* are we already being traced? */
1387                 if (current->ptrace & PT_PTRACED)
1388                         goto out;
1389                 ret = security_ptrace(current->parent, current);
1390                 if (ret)
1391                         goto out;
1392                 current->ptrace |= PT_PTRACED;
1393                 ret = 0;
1394                 goto out;
1395         }
1396
1397         peek_or_poke = (request == PTRACE_PEEKTEXT
1398                         || request == PTRACE_PEEKDATA
1399                         || request == PTRACE_POKETEXT
1400                         || request == PTRACE_POKEDATA);
1401         ret = -ESRCH;
1402         read_lock(&tasklist_lock);
1403         {
1404                 child = find_task_by_pid(pid);
1405                 if (child) {
1406                         if (peek_or_poke)
1407                                 child = find_thread_for_addr(child, addr);
1408                         get_task_struct(child);
1409                 }
1410         }
1411         read_unlock(&tasklist_lock);
1412         if (!child)
1413                 goto out;
1414         ret = -EPERM;
1415         if (pid == 1)           /* no messing around with init! */
1416                 goto out_tsk;
1417
1418         if (request == PTRACE_ATTACH) {
1419                 ret = ptrace_attach(child);
1420                 goto out_tsk;
1421         }
1422
1423         ret = ptrace_check_attach(child, request == PTRACE_KILL);
1424         if (ret < 0)
1425                 goto out_tsk;
1426
1427         pt = ia64_task_regs(child);
1428         sw = (struct switch_stack *) (child->thread.ksp + 16);
1429
1430         switch (request) {
1431               case PTRACE_PEEKTEXT:
1432               case PTRACE_PEEKDATA:
1433                 /* read word at location addr */
1434                 urbs_end = ia64_get_user_rbs_end(child, pt, NULL);
1435                 ret = ia64_peek(child, sw, urbs_end, addr, &data);
1436                 if (ret == 0) {
1437                         ret = data;
1438                         /* ensure "ret" is not mistaken as an error code: */
1439                         force_successful_syscall_return();
1440                 }
1441                 goto out_tsk;
1442
1443               case PTRACE_POKETEXT:
1444               case PTRACE_POKEDATA:
1445                 /* write the word at location addr */
1446                 urbs_end = ia64_get_user_rbs_end(child, pt, NULL);
1447                 ret = ia64_poke(child, sw, urbs_end, addr, data);
1448                 goto out_tsk;
1449
1450               case PTRACE_PEEKUSR:
1451                 /* read the word at addr in the USER area */
1452                 if (access_uarea(child, addr, &data, 0) < 0) {
1453                         ret = -EIO;
1454                         goto out_tsk;
1455                 }
1456                 ret = data;
1457                 /* ensure "ret" is not mistaken as an error code */
1458                 force_successful_syscall_return();
1459                 goto out_tsk;
1460
1461               case PTRACE_POKEUSR:
1462                 /* write the word at addr in the USER area */
1463                 if (access_uarea(child, addr, &data, 1) < 0) {
1464                         ret = -EIO;
1465                         goto out_tsk;
1466                 }
1467                 ret = 0;
1468                 goto out_tsk;
1469
1470               case PTRACE_OLD_GETSIGINFO:
1471                 /* for backwards-compatibility */
1472                 ret = ptrace_request(child, PTRACE_GETSIGINFO, addr, data);
1473                 goto out_tsk;
1474
1475               case PTRACE_OLD_SETSIGINFO:
1476                 /* for backwards-compatibility */
1477                 ret = ptrace_request(child, PTRACE_SETSIGINFO, addr, data);
1478                 goto out_tsk;
1479
1480               case PTRACE_SYSCALL:
1481                 /* continue and stop at next (return from) syscall */
1482               case PTRACE_CONT:
1483                 /* restart after signal. */
1484                 ret = -EIO;
1485                 if (!valid_signal(data))
1486                         goto out_tsk;
1487                 if (request == PTRACE_SYSCALL)
1488                         set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
1489                 else
1490                         clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
1491                 child->exit_code = data;
1492
1493                 /*
1494                  * Make sure the single step/taken-branch trap bits
1495                  * are not set:
1496                  */
1497                 ia64_psr(pt)->ss = 0;
1498                 ia64_psr(pt)->tb = 0;
1499
1500                 wake_up_process(child);
1501                 ret = 0;
1502                 goto out_tsk;
1503
1504               case PTRACE_KILL:
1505                 /*
1506                  * Make the child exit.  Best I can do is send it a
1507                  * sigkill.  Perhaps it should be put in the status
1508                  * that it wants to exit.
1509                  */
1510                 if (child->exit_state == EXIT_ZOMBIE)
1511                         /* already dead */
1512                         goto out_tsk;
1513                 child->exit_code = SIGKILL;
1514
1515                 ptrace_disable(child);
1516                 wake_up_process(child);
1517                 ret = 0;
1518                 goto out_tsk;
1519
1520               case PTRACE_SINGLESTEP:
1521                 /* let child execute for one instruction */
1522               case PTRACE_SINGLEBLOCK:
1523                 ret = -EIO;
1524                 if (!valid_signal(data))
1525                         goto out_tsk;
1526
1527                 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
1528                 if (request == PTRACE_SINGLESTEP) {
1529                         ia64_psr(pt)->ss = 1;
1530                 } else {
1531                         ia64_psr(pt)->tb = 1;
1532                 }
1533                 child->exit_code = data;
1534
1535                 /* give it a chance to run. */
1536                 wake_up_process(child);
1537                 ret = 0;
1538                 goto out_tsk;
1539
1540               case PTRACE_DETACH:
1541                 /* detach a process that was attached. */
1542                 ret = ptrace_detach(child, data);
1543                 goto out_tsk;
1544
1545               case PTRACE_GETREGS:
1546                 ret = ptrace_getregs(child,
1547                                      (struct pt_all_user_regs __user *) data);
1548                 goto out_tsk;
1549
1550               case PTRACE_SETREGS:
1551                 ret = ptrace_setregs(child,
1552                                      (struct pt_all_user_regs __user *) data);
1553                 goto out_tsk;
1554
1555               default:
1556                 ret = ptrace_request(child, request, addr, data);
1557                 goto out_tsk;
1558         }
1559   out_tsk:
1560         put_task_struct(child);
1561   out:
1562         unlock_kernel();
1563         return ret;
1564 }
1565
1566
1567 void
1568 syscall_trace (void)
1569 {
1570         if (!test_thread_flag(TIF_SYSCALL_TRACE))
1571                 return;
1572         if (!(current->ptrace & PT_PTRACED))
1573                 return;
1574         /*
1575          * The 0x80 provides a way for the tracing parent to
1576          * distinguish between a syscall stop and SIGTRAP delivery.
1577          */
1578         ptrace_notify(SIGTRAP
1579                       | ((current->ptrace & PT_TRACESYSGOOD) ? 0x80 : 0));
1580
1581         /*
1582          * This isn't the same as continuing with a signal, but it
1583          * will do for normal use.  strace only continues with a
1584          * signal if the stopping signal is not SIGTRAP.  -brl
1585          */
1586         if (current->exit_code) {
1587                 send_sig(current->exit_code, current, 1);
1588                 current->exit_code = 0;
1589         }
1590 }
1591
1592 /* "asmlinkage" so the input arguments are preserved... */
1593
1594 asmlinkage void
1595 syscall_trace_enter (long arg0, long arg1, long arg2, long arg3,
1596                      long arg4, long arg5, long arg6, long arg7,
1597                      struct pt_regs regs)
1598 {
1599         if (test_thread_flag(TIF_SYSCALL_TRACE) 
1600             && (current->ptrace & PT_PTRACED))
1601                 syscall_trace();
1602
1603         if (unlikely(current->audit_context)) {
1604                 long syscall;
1605                 int arch;
1606
1607                 if (IS_IA32_PROCESS(&regs)) {
1608                         syscall = regs.r1;
1609                         arch = AUDIT_ARCH_I386;
1610                 } else {
1611                         syscall = regs.r15;
1612                         arch = AUDIT_ARCH_IA64;
1613                 }
1614
1615                 audit_syscall_entry(current, arch, syscall, arg0, arg1, arg2, arg3);
1616         }
1617
1618 }
1619
1620 /* "asmlinkage" so the input arguments are preserved... */
1621
1622 asmlinkage void
1623 syscall_trace_leave (long arg0, long arg1, long arg2, long arg3,
1624                      long arg4, long arg5, long arg6, long arg7,
1625                      struct pt_regs regs)
1626 {
1627         if (unlikely(current->audit_context))
1628                 audit_syscall_exit(current, AUDITSC_RESULT(regs.r10), regs.r8);
1629
1630         if (test_thread_flag(TIF_SYSCALL_TRACE)
1631             && (current->ptrace & PT_PTRACED))
1632                 syscall_trace();
1633 }