Blackfin: drop per-cpu loops_per_jiffy tracking
[linux-3.10.git] / arch / blackfin / mach-common / smp.c
1 /*
2  * File:         arch/blackfin/kernel/smp.c
3  * Author:       Philippe Gerum <rpm@xenomai.org>
4  * IPI management based on arch/arm/kernel/smp.c.
5  *
6  *               Copyright 2007 Analog Devices Inc.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, see the file COPYING, or write
20  * to the Free Software Foundation, Inc.,
21  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
22  */
23
24 #include <linux/module.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/spinlock.h>
28 #include <linux/sched.h>
29 #include <linux/interrupt.h>
30 #include <linux/cache.h>
31 #include <linux/profile.h>
32 #include <linux/errno.h>
33 #include <linux/mm.h>
34 #include <linux/cpu.h>
35 #include <linux/smp.h>
36 #include <linux/seq_file.h>
37 #include <linux/irq.h>
38 #include <asm/atomic.h>
39 #include <asm/cacheflush.h>
40 #include <asm/mmu_context.h>
41 #include <asm/pgtable.h>
42 #include <asm/pgalloc.h>
43 #include <asm/processor.h>
44 #include <asm/ptrace.h>
45 #include <asm/cpu.h>
46 #include <asm/time.h>
47 #include <linux/err.h>
48
49 /*
50  * Anomaly notes:
51  * 05000120 - we always define corelock as 32-bit integer in L2
52  */
53 struct corelock_slot corelock __attribute__ ((__section__(".l2.bss")));
54
55 void __cpuinitdata *init_retx_coreb, *init_saved_retx_coreb,
56         *init_saved_seqstat_coreb, *init_saved_icplb_fault_addr_coreb,
57         *init_saved_dcplb_fault_addr_coreb;
58
59 cpumask_t cpu_possible_map;
60 EXPORT_SYMBOL(cpu_possible_map);
61
62 cpumask_t cpu_online_map;
63 EXPORT_SYMBOL(cpu_online_map);
64
65 #define BFIN_IPI_RESCHEDULE   0
66 #define BFIN_IPI_CALL_FUNC    1
67 #define BFIN_IPI_CPU_STOP     2
68
69 struct blackfin_flush_data {
70         unsigned long start;
71         unsigned long end;
72 };
73
74 void *secondary_stack;
75
76
77 struct smp_call_struct {
78         void (*func)(void *info);
79         void *info;
80         int wait;
81         cpumask_t pending;
82         cpumask_t waitmask;
83 };
84
85 static struct blackfin_flush_data smp_flush_data;
86
87 static DEFINE_SPINLOCK(stop_lock);
88
89 struct ipi_message {
90         struct list_head list;
91         unsigned long type;
92         struct smp_call_struct call_struct;
93 };
94
95 struct ipi_message_queue {
96         struct list_head head;
97         spinlock_t lock;
98         unsigned long count;
99 };
100
101 static DEFINE_PER_CPU(struct ipi_message_queue, ipi_msg_queue);
102
103 static void ipi_cpu_stop(unsigned int cpu)
104 {
105         spin_lock(&stop_lock);
106         printk(KERN_CRIT "CPU%u: stopping\n", cpu);
107         dump_stack();
108         spin_unlock(&stop_lock);
109
110         cpu_clear(cpu, cpu_online_map);
111
112         local_irq_disable();
113
114         while (1)
115                 SSYNC();
116 }
117
118 static void ipi_flush_icache(void *info)
119 {
120         struct blackfin_flush_data *fdata = info;
121
122         /* Invalidate the memory holding the bounds of the flushed region. */
123         blackfin_dcache_invalidate_range((unsigned long)fdata,
124                                          (unsigned long)fdata + sizeof(*fdata));
125
126         blackfin_icache_flush_range(fdata->start, fdata->end);
127 }
128
129 static void ipi_call_function(unsigned int cpu, struct ipi_message *msg)
130 {
131         int wait;
132         void (*func)(void *info);
133         void *info;
134         func = msg->call_struct.func;
135         info = msg->call_struct.info;
136         wait = msg->call_struct.wait;
137         cpu_clear(cpu, msg->call_struct.pending);
138         func(info);
139         if (wait)
140                 cpu_clear(cpu, msg->call_struct.waitmask);
141         else
142                 kfree(msg);
143 }
144
145 static irqreturn_t ipi_handler(int irq, void *dev_instance)
146 {
147         struct ipi_message *msg;
148         struct ipi_message_queue *msg_queue;
149         unsigned int cpu = smp_processor_id();
150
151         platform_clear_ipi(cpu);
152
153         msg_queue = &__get_cpu_var(ipi_msg_queue);
154         msg_queue->count++;
155
156         spin_lock(&msg_queue->lock);
157         while (!list_empty(&msg_queue->head)) {
158                 msg = list_entry(msg_queue->head.next, typeof(*msg), list);
159                 list_del(&msg->list);
160                 switch (msg->type) {
161                 case BFIN_IPI_RESCHEDULE:
162                         /* That's the easiest one; leave it to
163                          * return_from_int. */
164                         kfree(msg);
165                         break;
166                 case BFIN_IPI_CALL_FUNC:
167                         spin_unlock(&msg_queue->lock);
168                         ipi_call_function(cpu, msg);
169                         spin_lock(&msg_queue->lock);
170                         break;
171                 case BFIN_IPI_CPU_STOP:
172                         spin_unlock(&msg_queue->lock);
173                         ipi_cpu_stop(cpu);
174                         spin_lock(&msg_queue->lock);
175                         kfree(msg);
176                         break;
177                 default:
178                         printk(KERN_CRIT "CPU%u: Unknown IPI message \
179                         0x%lx\n", cpu, msg->type);
180                         kfree(msg);
181                         break;
182                 }
183         }
184         spin_unlock(&msg_queue->lock);
185         return IRQ_HANDLED;
186 }
187
188 static void ipi_queue_init(void)
189 {
190         unsigned int cpu;
191         struct ipi_message_queue *msg_queue;
192         for_each_possible_cpu(cpu) {
193                 msg_queue = &per_cpu(ipi_msg_queue, cpu);
194                 INIT_LIST_HEAD(&msg_queue->head);
195                 spin_lock_init(&msg_queue->lock);
196                 msg_queue->count = 0;
197         }
198 }
199
200 int smp_call_function(void (*func)(void *info), void *info, int wait)
201 {
202         unsigned int cpu;
203         cpumask_t callmap;
204         unsigned long flags;
205         struct ipi_message_queue *msg_queue;
206         struct ipi_message *msg;
207
208         callmap = cpu_online_map;
209         cpu_clear(smp_processor_id(), callmap);
210         if (cpus_empty(callmap))
211                 return 0;
212
213         msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
214         INIT_LIST_HEAD(&msg->list);
215         msg->call_struct.func = func;
216         msg->call_struct.info = info;
217         msg->call_struct.wait = wait;
218         msg->call_struct.pending = callmap;
219         msg->call_struct.waitmask = callmap;
220         msg->type = BFIN_IPI_CALL_FUNC;
221
222         for_each_cpu_mask(cpu, callmap) {
223                 msg_queue = &per_cpu(ipi_msg_queue, cpu);
224                 spin_lock_irqsave(&msg_queue->lock, flags);
225                 list_add_tail(&msg->list, &msg_queue->head);
226                 spin_unlock_irqrestore(&msg_queue->lock, flags);
227                 platform_send_ipi_cpu(cpu);
228         }
229         if (wait) {
230                 while (!cpus_empty(msg->call_struct.waitmask))
231                         blackfin_dcache_invalidate_range(
232                                 (unsigned long)(&msg->call_struct.waitmask),
233                                 (unsigned long)(&msg->call_struct.waitmask));
234                 kfree(msg);
235         }
236         return 0;
237 }
238 EXPORT_SYMBOL_GPL(smp_call_function);
239
240 int smp_call_function_single(int cpuid, void (*func) (void *info), void *info,
241                                 int wait)
242 {
243         unsigned int cpu = cpuid;
244         cpumask_t callmap;
245         unsigned long flags;
246         struct ipi_message_queue *msg_queue;
247         struct ipi_message *msg;
248
249         if (cpu_is_offline(cpu))
250                 return 0;
251         cpus_clear(callmap);
252         cpu_set(cpu, callmap);
253
254         msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
255         INIT_LIST_HEAD(&msg->list);
256         msg->call_struct.func = func;
257         msg->call_struct.info = info;
258         msg->call_struct.wait = wait;
259         msg->call_struct.pending = callmap;
260         msg->call_struct.waitmask = callmap;
261         msg->type = BFIN_IPI_CALL_FUNC;
262
263         msg_queue = &per_cpu(ipi_msg_queue, cpu);
264         spin_lock_irqsave(&msg_queue->lock, flags);
265         list_add_tail(&msg->list, &msg_queue->head);
266         spin_unlock_irqrestore(&msg_queue->lock, flags);
267         platform_send_ipi_cpu(cpu);
268
269         if (wait) {
270                 while (!cpus_empty(msg->call_struct.waitmask))
271                         blackfin_dcache_invalidate_range(
272                                 (unsigned long)(&msg->call_struct.waitmask),
273                                 (unsigned long)(&msg->call_struct.waitmask));
274                 kfree(msg);
275         }
276         return 0;
277 }
278 EXPORT_SYMBOL_GPL(smp_call_function_single);
279
280 void smp_send_reschedule(int cpu)
281 {
282         unsigned long flags;
283         struct ipi_message_queue *msg_queue;
284         struct ipi_message *msg;
285
286         if (cpu_is_offline(cpu))
287                 return;
288
289         msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
290         memset(msg, 0, sizeof(msg));
291         INIT_LIST_HEAD(&msg->list);
292         msg->type = BFIN_IPI_RESCHEDULE;
293
294         msg_queue = &per_cpu(ipi_msg_queue, cpu);
295         spin_lock_irqsave(&msg_queue->lock, flags);
296         list_add_tail(&msg->list, &msg_queue->head);
297         spin_unlock_irqrestore(&msg_queue->lock, flags);
298         platform_send_ipi_cpu(cpu);
299
300         return;
301 }
302
303 void smp_send_stop(void)
304 {
305         unsigned int cpu;
306         cpumask_t callmap;
307         unsigned long flags;
308         struct ipi_message_queue *msg_queue;
309         struct ipi_message *msg;
310
311         callmap = cpu_online_map;
312         cpu_clear(smp_processor_id(), callmap);
313         if (cpus_empty(callmap))
314                 return;
315
316         msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
317         memset(msg, 0, sizeof(msg));
318         INIT_LIST_HEAD(&msg->list);
319         msg->type = BFIN_IPI_CPU_STOP;
320
321         for_each_cpu_mask(cpu, callmap) {
322                 msg_queue = &per_cpu(ipi_msg_queue, cpu);
323                 spin_lock_irqsave(&msg_queue->lock, flags);
324                 list_add_tail(&msg->list, &msg_queue->head);
325                 spin_unlock_irqrestore(&msg_queue->lock, flags);
326                 platform_send_ipi_cpu(cpu);
327         }
328         return;
329 }
330
331 int __cpuinit __cpu_up(unsigned int cpu)
332 {
333         struct task_struct *idle;
334         int ret;
335
336         idle = fork_idle(cpu);
337         if (IS_ERR(idle)) {
338                 printk(KERN_ERR "CPU%u: fork() failed\n", cpu);
339                 return PTR_ERR(idle);
340         }
341
342         secondary_stack = task_stack_page(idle) + THREAD_SIZE;
343         smp_wmb();
344
345         ret = platform_boot_secondary(cpu, idle);
346
347         if (ret) {
348                 cpu_clear(cpu, cpu_present_map);
349                 printk(KERN_CRIT "CPU%u: processor failed to boot (%d)\n", cpu, ret);
350                 free_task(idle);
351         } else
352                 cpu_set(cpu, cpu_online_map);
353
354         secondary_stack = NULL;
355
356         return ret;
357 }
358
359 static void __cpuinit setup_secondary(unsigned int cpu)
360 {
361 #if !defined(CONFIG_TICKSOURCE_GPTMR0)
362         struct irq_desc *timer_desc;
363 #endif
364         unsigned long ilat;
365
366         bfin_write_IMASK(0);
367         CSYNC();
368         ilat = bfin_read_ILAT();
369         CSYNC();
370         bfin_write_ILAT(ilat);
371         CSYNC();
372
373         /* Enable interrupt levels IVG7-15. IARs have been already
374          * programmed by the boot CPU.  */
375         bfin_irq_flags |= IMASK_IVG15 |
376             IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 |
377             IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
378
379 #if defined(CONFIG_TICKSOURCE_GPTMR0)
380         /* Power down the core timer, just to play safe. */
381         bfin_write_TCNTL(0);
382
383         /* system timer0 has been setup by CoreA. */
384 #else
385         timer_desc = irq_desc + IRQ_CORETMR;
386         setup_core_timer();
387         timer_desc->chip->enable(IRQ_CORETMR);
388 #endif
389 }
390
391 void __cpuinit secondary_start_kernel(void)
392 {
393         unsigned int cpu = smp_processor_id();
394         struct mm_struct *mm = &init_mm;
395
396         if (_bfin_swrst & SWRST_DBL_FAULT_B) {
397                 printk(KERN_EMERG "CoreB Recovering from DOUBLE FAULT event\n");
398 #ifdef CONFIG_DEBUG_DOUBLEFAULT
399                 printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
400                         (int)init_saved_seqstat_coreb & SEQSTAT_EXCAUSE, init_saved_retx_coreb);
401                 printk(KERN_NOTICE "   DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr_coreb);
402                 printk(KERN_NOTICE "   ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr_coreb);
403 #endif
404                 printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
405                         init_retx_coreb);
406         }
407
408         /*
409          * We want the D-cache to be enabled early, in case the atomic
410          * support code emulates cache coherence (see
411          * __ARCH_SYNC_CORE_DCACHE).
412          */
413         init_exception_vectors();
414
415         bfin_setup_caches(cpu);
416
417         local_irq_disable();
418
419         /* Attach the new idle task to the global mm. */
420         atomic_inc(&mm->mm_users);
421         atomic_inc(&mm->mm_count);
422         current->active_mm = mm;
423         BUG_ON(current->mm);    /* Can't be, but better be safe than sorry. */
424
425         preempt_disable();
426
427         setup_secondary(cpu);
428
429         local_irq_enable();
430
431         platform_secondary_init(cpu);
432
433         cpu_idle();
434 }
435
436 void __init smp_prepare_boot_cpu(void)
437 {
438 }
439
440 void __init smp_prepare_cpus(unsigned int max_cpus)
441 {
442         platform_prepare_cpus(max_cpus);
443         ipi_queue_init();
444         platform_request_ipi(&ipi_handler);
445 }
446
447 void __init smp_cpus_done(unsigned int max_cpus)
448 {
449         unsigned long bogosum = 0;
450         unsigned int cpu;
451
452         for_each_online_cpu(cpu)
453                 bogosum += loops_per_jiffy;
454
455         printk(KERN_INFO "SMP: Total of %d processors activated "
456                "(%lu.%02lu BogoMIPS).\n",
457                num_online_cpus(),
458                bogosum / (500000/HZ),
459                (bogosum / (5000/HZ)) % 100);
460 }
461
462 void smp_icache_flush_range_others(unsigned long start, unsigned long end)
463 {
464         smp_flush_data.start = start;
465         smp_flush_data.end = end;
466
467         if (smp_call_function(&ipi_flush_icache, &smp_flush_data, 0))
468                 printk(KERN_WARNING "SMP: failed to run I-cache flush request on other CPUs\n");
469 }
470 EXPORT_SYMBOL_GPL(smp_icache_flush_range_others);
471
472 #ifdef __ARCH_SYNC_CORE_ICACHE
473 void resync_core_icache(void)
474 {
475         unsigned int cpu = get_cpu();
476         blackfin_invalidate_entire_icache();
477         ++per_cpu(cpu_data, cpu).icache_invld_count;
478         put_cpu();
479 }
480 EXPORT_SYMBOL(resync_core_icache);
481 #endif
482
483 #ifdef __ARCH_SYNC_CORE_DCACHE
484 unsigned long barrier_mask __attribute__ ((__section__(".l2.bss")));
485
486 void resync_core_dcache(void)
487 {
488         unsigned int cpu = get_cpu();
489         blackfin_invalidate_entire_dcache();
490         ++per_cpu(cpu_data, cpu).dcache_invld_count;
491         put_cpu();
492 }
493 EXPORT_SYMBOL(resync_core_dcache);
494 #endif