arm64: dts: t210: configure GPU EDP management
[linux-3.10.git] / arch / arm64 / mach-tegra / tegra21_memory.c
1 /*
2  * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  */
13
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/platform_data/tegra_emc_pdata.h>
17
18 #include "board.h"
19 #include "devices.h"
20 #include "board-t210.h"
21
22 #define TEGRA_DEBUG_EMC_DVFS_IN_KERNEL 0
23
24 #if TEGRA_DEBUG_EMC_DVFS_IN_KERNEL
25 static struct tegra21_emc_table t210_emc_table_granada[] = {
26         {
27                 0x18,       /* V5.0.12 */
28                 "03_102000_02_V5.0.12_V0.9", /* DVFS table version */
29                 102000,     /* SDRAM frequency */
30                 800,        /* min voltage */
31                 800,        /* gpu min voltage */
32                 "pllp_out0", /* clock source id */
33                 0x40080006, /* CLK_SOURCE_EMC */
34                 164,        /* number of burst_regs */
35                 31,         /* number of up_down_regs */
36                 {
37                         0x00000004, /* EMC_RC */
38                         0x0000001a, /* EMC_RFC */
39                         0x00000000, /* EMC_RFC_SLR */
40                         0x00000003, /* EMC_RAS */
41                         0x00000001, /* EMC_RP */
42                         0x00000004, /* EMC_R2W */
43                         0x0000000a, /* EMC_W2R */
44                         0x00000003, /* EMC_R2P */
45                         0x0000000b, /* EMC_W2P */
46                         0x00000001, /* EMC_RD_RCD */
47                         0x00000001, /* EMC_WR_RCD */
48                         0x00000003, /* EMC_RRD */
49                         0x00000003, /* EMC_REXT */
50                         0x00000000, /* EMC_WEXT */
51                         0x00000006, /* EMC_WDV */
52                         0x00000006, /* EMC_WDV_MASK */
53                         0x00000006, /* EMC_QUSE */
54                         0x00000002, /* EMC_QUSE_WIDTH */
55                         0x00000000, /* EMC_IBDLY */
56                         0x00000005, /* EMC_EINPUT */
57                         0x00000005, /* EMC_EINPUT_DURATION */
58                         0x00010000, /* EMC_PUTERM_EXTRA */
59                         0x00000003, /* EMC_PUTERM_WIDTH */
60                         0x00000000, /* EMC_PUTERM_ADJ */
61                         0x00000000, /* EMC_CDB_CNTL_1 */
62                         0x00000000, /* EMC_CDB_CNTL_2 */
63                         0x00000000, /* MC_CDB_CNTL_3 */
64                         0x00000004, /* EMC_QRST */
65                         0x0000000c, /* EMC_QSAFE */
66                         0x0000000d, /* EMC_RDV */
67                         0x0000000f, /* EMC_RDV_MASK */
68                         0x00000304, /* EMC_REFRESH */
69                         0x00000000, /* EMC_BURST_REFRESH_NUM */
70                         0x000000c1, /* EMC_PRE_REFRESH_REQ_CNT */
71                         0x00000002, /* EMC_PDEX2WR */
72                         0x00000002, /* EMC_PDEX2RD */
73                         0x00000001, /* EMC_PCHG2PDEN */
74                         0x00000000, /* EMC_ACT2PDEN */
75                         0x00000018, /* EMC_AR2PDEN */
76                         0x0000000f, /* EMC_RW2PDEN */
77                         0x0000001c, /* EMC_TXSR */
78                         0x0000001c, /* EMC_TXSRDLL */
79                         0x00000004, /* EMC_TCKE */
80                         0x00000005, /* EMC_TCKESR */
81                         0x00000004, /* EMC_TPD */
82                         0x00000003, /* EMC_TFAW */
83                         0x00000000, /* EMC_TRPAB */
84                         0x00000005, /* EMC_TCLKSTABLE */
85                         0x00000005, /* EMC_TCLKSTOP */
86                         0x0000031c, /* EMC_TREFBW */
87                         0x00000000, /* EMC_FBIO_CFG6 */
88                         0x00000000, /* EMC_ODT_WRITE */
89                         0x00000000, /* EMC_ODT_READ */
90                         0x106aa298, /* EMC_FBIO_CFG5 */
91                         0x002c00a0, /* EMC_CFG_DIG_DLL */
92                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
93                         0x00064000, /* EMC_DLL_XFORM_DQS0 */
94                         0x00064000, /* EMC_DLL_XFORM_DQS1 */
95                         0x00064000, /* EMC_DLL_XFORM_DQS2 */
96                         0x00064000, /* EMC_DLL_XFORM_DQS3 */
97                         0x00064000, /* EMC_DLL_XFORM_DQS4 */
98                         0x00064000, /* EMC_DLL_XFORM_DQS5 */
99                         0x00064000, /* EMC_DLL_XFORM_DQS6 */
100                         0x00064000, /* EMC_DLL_XFORM_DQS7 */
101                         0x00064000, /* EMC_DLL_XFORM_DQS8 */
102                         0x00064000, /* EMC_DLL_XFORM_DQS9 */
103                         0x00064000, /* EMC_DLL_XFORM_DQS10 */
104                         0x00064000, /* EMC_DLL_XFORM_DQS11 */
105                         0x00064000, /* EMC_DLL_XFORM_DQS12 */
106                         0x00064000, /* EMC_DLL_XFORM_DQS13 */
107                         0x00064000, /* EMC_DLL_XFORM_DQS14 */
108                         0x00064000, /* EMC_DLL_XFORM_DQS15 */
109                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
110                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
111                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
112                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
113                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
114                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
115                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
116                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
117                         0x00000000, /* EMC_DLL_XFORM_ADDR0 */
118                         0x00000000, /* EMC_DLL_XFORM_ADDR1 */
119                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
120                         0x00000000, /* EMC_DLL_XFORM_ADDR3 */
121                         0x00000000, /* EMC_DLL_XFORM_ADDR4 */
122                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
123                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
124                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
125                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
126                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
127                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
128                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
129                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
130                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
131                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
132                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
133                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
134                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
135                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
136                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
137                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
138                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
139                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
140                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
141                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
142                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
143                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
144                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
145                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
146                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
147                         0x000fc000, /* EMC_DLL_XFORM_DQ0 */
148                         0x000fc000, /* EMC_DLL_XFORM_DQ1 */
149                         0x000fc000, /* EMC_DLL_XFORM_DQ2 */
150                         0x000fc000, /* EMC_DLL_XFORM_DQ3 */
151                         0x0000fc00, /* EMC_DLL_XFORM_DQ4 */
152                         0x0000fc00, /* EMC_DLL_XFORM_DQ5 */
153                         0x0000fc00, /* EMC_DLL_XFORM_DQ6 */
154                         0x0000fc00, /* EMC_DLL_XFORM_DQ7 */
155                         0x10000280, /* EMC_XM2CMDPADCTRL */
156                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
157                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
158                         0x0130b118, /* EMC_XM2DQSPADCTRL2 */
159                         0x00000000, /* EMC_XM2DQPADCTRL2 */
160                         0x00000000, /* EMC_XM2DQPADCTRL3 */
161                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
162                         0x00000e0e, /* EMC_XM2CLKPADCTRL2 */
163                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
164                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
165                         0x0000003f, /* EMC_XM2VTTGENPADCTRL2 */
166                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
167                         0x51451400, /* EMC_XM2DQSPADCTRL3 */
168                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
169                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
170                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
171                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
172                         0x00000033, /* EMC_TXDSRVTTGEN */
173                         0x00000000, /* EMC_FBIO_SPARE */
174                         0x00000000, /* EMC_ZCAL_INTERVAL */
175                         0x00000042, /* EMC_ZCAL_WAIT_CNT */
176                         0x000e000e, /* EMC_MRS_WAIT_CNT */
177                         0x000e000e, /* EMC_MRS_WAIT_CNT2 */
178                         0x00000000, /* EMC_CTT */
179                         0x00000003, /* EMC_CTT_DURATION */
180                         0x0000f2f3, /* EMC_CFG_PIPE */
181                         0x80000713, /* EMC_DYN_SELF_REF_CONTROL */
182                         0x0000000a, /* EMC_QPOP */
183                         0x08000001, /* MC_EMEM_ARB_CFG */
184                         0x80000026, /* MC_EMEM_ARB_OUTSTANDING_REQ */
185                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
186                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
187                         0x00000003, /* MC_EMEM_ARB_TIMING_RC */
188                         0x00000000, /* MC_EMEM_ARB_TIMING_RAS */
189                         0x00000002, /* MC_EMEM_ARB_TIMING_FAW */
190                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
191                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
192                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
193                         0x00000003, /* MC_EMEM_ARB_TIMING_R2R */
194                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
195                         0x00000003, /* MC_EMEM_ARB_TIMING_R2W */
196                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
197                         0x06030203, /* MC_EMEM_ARB_DA_TURNS */
198                         0x000a0403, /* MC_EMEM_ARB_DA_COVERS */
199                         0x73c30504, /* MC_EMEM_ARB_MISC0 */
200                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
201                 },
202                 {
203                         0x00000001, /* MC_MLL_MPCORER_PTSA_RATE */
204                         0x00000031, /* MC_PTSA_GRANT_DECREMENT */
205                         0x00ff00da, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
206                         0x00ff00da, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
207                         0x00ff0075, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
208                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
209                         0x00ff009d, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
210                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
211                         0x00ff009d, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
212                         0x009b0049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
213                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
214                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
215                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
216                         0x000800ad, /* MC_LATENCY_ALLOWANCE_HC_0 */
217                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
218                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
219                         0x00ff00c6, /* MC_LATENCY_ALLOWANCE_GPU_0 */
220                         0x00ff006d, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
221                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
222                         0x00ff00d6, /* MC_LATENCY_ALLOWANCE_VIC_0 */
223                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
224                         0x0000009f, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
225                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
226                         0x0000009f, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
227                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
228                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
229                         0x009f00a0, /* MC_LATENCY_ALLOWANCE_VDE_1 */
230                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
231                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
232                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_SATA_0 */
233                         0x00ff00da, /* MC_LATENCY_ALLOWANCE_AFI_0 */
234                 },
235                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
236                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
237                 0x00000802, /* EMC_CTT_TERM_CTRL */
238                 0x73240000, /* EMC_CFG */
239                 0x000008c5, /* EMC_CFG_2 */
240                 0x00040128, /* EMC_SEL_DPD_CTRL */
241                 0x002c0068, /* EMC_CFG_DIG_DLL */
242                 0x00000008, /* EMC_BGBIAS_CTL0 */
243                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
244                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
245                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
246                 0x80001221, /* Mode Register 0 */
247                 0x80100003, /* Mode Register 1 */
248                 0x80200008, /* Mode Register 2 */
249                 0x00000000, /* Mode Register 4 */
250                 6890,       /* expected dvfs latency (ns) */
251         },
252         {
253                 0x18,       /* V5.0.12 */
254                 "03_204000_03_V5.0.12_V0.9", /* DVFS table version */
255                 204000,     /* SDRAM frequency */
256                 800,        /* min voltage */
257                 800,        /* gpu min voltage */
258                 "pllp_out0", /* clock source id */
259                 0x40080002, /* CLK_SOURCE_EMC */
260                 164,        /* number of burst_regs */
261                 31,         /* number of up_down_regs */
262                 {
263                         0x00000009, /* EMC_RC */
264                         0x00000035, /* EMC_RFC */
265                         0x00000000, /* EMC_RFC_SLR */
266                         0x00000006, /* EMC_RAS */
267                         0x00000002, /* EMC_RP */
268                         0x00000005, /* EMC_R2W */
269                         0x0000000a, /* EMC_W2R */
270                         0x00000003, /* EMC_R2P */
271                         0x0000000b, /* EMC_W2P */
272                         0x00000002, /* EMC_RD_RCD */
273                         0x00000002, /* EMC_WR_RCD */
274                         0x00000003, /* EMC_RRD */
275                         0x00000003, /* EMC_REXT */
276                         0x00000000, /* EMC_WEXT */
277                         0x00000005, /* EMC_WDV */
278                         0x00000005, /* EMC_WDV_MASK */
279                         0x00000006, /* EMC_QUSE */
280                         0x00000002, /* EMC_QUSE_WIDTH */
281                         0x00000000, /* EMC_IBDLY */
282                         0x00000004, /* EMC_EINPUT */
283                         0x00000006, /* EMC_EINPUT_DURATION */
284                         0x00010000, /* EMC_PUTERM_EXTRA */
285                         0x00000003, /* EMC_PUTERM_WIDTH */
286                         0x00000000, /* EMC_PUTERM_ADJ */
287                         0x00000000, /* EMC_CDB_CNTL_1 */
288                         0x00000000, /* EMC_CDB_CNTL_2 */
289                         0x00000000, /* EMC_CDB_CNTL_3 */
290                         0x00000003, /* EMC_QRST */
291                         0x0000000d, /* EMC_QSAFE */
292                         0x0000000f, /* EMC_RDV */
293                         0x00000011, /* EMC_RDV_MASK */
294                         0x00000607, /* EMC_REFRESH */
295                         0x00000000, /* EMC_BURST_REFRESH_NUM */
296                         0x00000181, /* EMC_PRE_REFRESH_REQ_CNT */
297                         0x00000002, /* EMC_PDEX2WR */
298                         0x00000002, /* EMC_PDEX2RD */
299                         0x00000001, /* EMC_PCHG2PDEN */
300                         0x00000000, /* EMC_ACT2PDEN */
301                         0x00000032, /* EMC_AR2PDEN */
302                         0x0000000f, /* EMC_RW2PDEN */
303                         0x00000038, /* EMC_TXSR */
304                         0x00000038, /* EMC_TXSRDLL */
305                         0x00000004, /* EMC_TCKE */
306                         0x00000005, /* EMC_TCKESR */
307                         0x00000004, /* EMC_TPD */
308                         0x00000007, /* EMC_TFAW */
309                         0x00000000, /* EMC_TRPAB */
310                         0x00000005, /* EMC_TCLKSTABLE */
311                         0x00000005, /* EMC_TCLKSTOP */
312                         0x00000638, /* EMC_TREFBW */
313                         0x00000000, /* EMC_FBIO_CFG6 */
314                         0x00000000, /* EMC_ODT_WRITE */
315                         0x00000000, /* EMC_ODT_READ */
316                         0x106aa298, /* EMC_FBIO_CFG5 */
317                         0x002c00a0, /* EMC_CFG_DIG_DLL */
318                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
319                         0x00064000, /* EMC_DLL_XFORM_DQS0 */
320                         0x00064000, /* EMC_DLL_XFORM_DQS1 */
321                         0x00064000, /* EMC_DLL_XFORM_DQS2 */
322                         0x00064000, /* EMC_DLL_XFORM_DQS3 */
323                         0x00064000, /* EMC_DLL_XFORM_DQS4 */
324                         0x00064000, /* EMC_DLL_XFORM_DQS5 */
325                         0x00064000, /* EMC_DLL_XFORM_DQS6 */
326                         0x00064000, /* EMC_DLL_XFORM_DQS7 */
327                         0x00064000, /* EMC_DLL_XFORM_DQS8 */
328                         0x00064000, /* EMC_DLL_XFORM_DQS9 */
329                         0x00064000, /* EMC_DLL_XFORM_DQS10 */
330                         0x00064000, /* EMC_DLL_XFORM_DQS11 */
331                         0x00064000, /* EMC_DLL_XFORM_DQS12 */
332                         0x00064000, /* EMC_DLL_XFORM_DQS13 */
333                         0x00064000, /* EMC_DLL_XFORM_DQS14 */
334                         0x00064000, /* EMC_DLL_XFORM_DQS15 */
335                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
336                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
337                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
338                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
339                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
340                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
341                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
342                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
343                         0x00000000, /* EMC_DLL_XFORM_ADDR0 */
344                         0x00000000, /* EMC_DLL_XFORM_ADDR1 */
345                         0x00008000, /* EMC_DLL_XFORM_ADDR2 */
346                         0x00000000, /* EMC_DLL_XFORM_ADDR3 */
347                         0x00000000, /* EMC_DLL_XFORM_ADDR4 */
348                         0x00008000, /* EMC_DLL_XFORM_ADDR5 */
349                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
350                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
351                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
352                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
353                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
354                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
355                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
356                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
357                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
358                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
359                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
360                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
361                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
362                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
363                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
364                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
365                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
366                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
367                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
368                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
369                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
370                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
371                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
372                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
373                         0x00090000, /* EMC_DLL_XFORM_DQ0 */
374                         0x00090000, /* EMC_DLL_XFORM_DQ1 */
375                         0x00090000, /* EMC_DLL_XFORM_DQ2 */
376                         0x00090000, /* EMC_DLL_XFORM_DQ3 */
377                         0x00009000, /* EMC_DLL_XFORM_DQ4 */
378                         0x00009000, /* EMC_DLL_XFORM_DQ5 */
379                         0x00009000, /* EMC_DLL_XFORM_DQ6 */
380                         0x00009000, /* EMC_DLL_XFORM_DQ7 */
381                         0x10000280, /* EMC_XM2CMDPADCTRL */
382                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
383                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
384                         0x0130b118, /* EMC_XM2DQSPADCTRL2 */
385                         0x00000000, /* EMC_XM2DQPADCTRL2 */
386                         0x00000000, /* EMC_XM2DQPADCTRL3 */
387                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
388                         0x00000707, /* EMC_XM2CLKPADCTRL2 */
389                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
390                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
391                         0x0000003f, /* EMC_XM2VTTGENPADCTRL2 */
392                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
393                         0x51451400, /* EMC_XM2DQSPADCTRL3 */
394                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
395                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
396                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
397                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
398                         0x00000066, /* EMC_TXDSRVTTGEN */
399                         0x00000000, /* EMC_FBIO_SPARE */
400                         0x00020000, /* EMC_ZCAL_INTERVAL */
401                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
402                         0x000e000e, /* EMC_MRS_WAIT_CNT */
403                         0x000e000e, /* EMC_MRS_WAIT_CNT2 */
404                         0x00000000, /* EMC_CTT */
405                         0x00000003, /* EMC_CTT_DURATION */
406                         0x0000d2b3, /* EMC_CFG_PIPE */
407                         0x80000d22, /* EMC_DYN_SELF_REF_CONTROL */
408                         0x0000000a, /* EMC_QPOP */
409                         0x01000003, /* MC_EMEM_ARB_CFG */
410                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
411                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
412                         0x00000001, /* MC_EMEM_ARB_TIMING_RP */
413                         0x00000004, /* MC_EMEM_ARB_TIMING_RC */
414                         0x00000002, /* MC_EMEM_ARB_TIMING_RAS */
415                         0x00000004, /* MC_EMEM_ARB_TIMING_FAW */
416                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
417                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
418                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
419                         0x00000003, /* MC_EMEM_ARB_TIMING_R2R */
420                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
421                         0x00000004, /* MC_EMEM_ARB_TIMING_R2W */
422                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
423                         0x06040203, /* MC_EMEM_ARB_DA_TURNS */
424                         0x000a0404, /* MC_EMEM_ARB_DA_COVERS */
425                         0x73840a05, /* MC_EMEM_ARB_MISC0 */
426                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
427                 },
428                 {
429                         0x00000001, /* MC_MLL_MPCORER_PTSA_RATE */
430                         0x00000062, /* MC_PTSA_GRANT_DECREMENT */
431                         0x00ff006d, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
432                         0x00ff006d, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
433                         0x00ff003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
434                         0x00ff00af, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
435                         0x00ff004f, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
436                         0x00ff00af, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
437                         0x00ff004f, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
438                         0x004e0049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
439                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
440                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
441                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
442                         0x00080057, /* MC_LATENCY_ALLOWANCE_HC_0 */
443                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
444                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
445                         0x00ff0063, /* MC_LATENCY_ALLOWANCE_GPU_0 */
446                         0x00ff0036, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
447                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
448                         0x00ff006b, /* MC_LATENCY_ALLOWANCE_VIC_0 */
449                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
450                         0x00000050, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
451                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
452                         0x00000050, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
453                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
454                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
455                         0x00510050, /* MC_LATENCY_ALLOWANCE_VDE_1 */
456                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
457                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
458                         0x00ff00c6, /* MC_LATENCY_ALLOWANCE_SATA_0 */
459                         0x00ff006d, /* MC_LATENCY_ALLOWANCE_AFI_0 */
460                 },
461                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
462                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
463                 0x00000802, /* EMC_CTT_TERM_CTRL */
464                 0x73240000, /* EMC_CFG */
465                 0x0000088d, /* EMC_CFG_2 */
466                 0x00040008, /* EMC_SEL_DPD_CTRL */
467                 0x002c0068, /* EMC_CFG_DIG_DLL */
468                 0x00000008, /* EMC_BGBIAS_CTL0 */
469                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
470                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
471                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
472                 0x80001221, /* Mode Register 0 */
473                 0x80100003, /* Mode Register 1 */
474                 0x80200008, /* Mode Register 2 */
475                 0x00000000, /* Mode Register 4 */
476                 3420,       /* expected dvfs latency (ns) */
477         },
478         {
479                 0x18,       /* V5.0.12 */
480                 "03_300000_03_V5.0.12_V0.9", /* DVFS table version */
481                 299000,     /* SDRAM frequency */
482                 820,        /* min voltage */
483                 800,        /* gpu min voltage */
484                 "pllm_out0", /* clock source id */
485                 0x00000002, /* CLK_SOURCE_EMC */
486                 164,        /* number of burst_regs */
487                 31,         /* number of up_down_regs */
488                 {
489                         0x0000000d, /* EMC_RC */
490                         0x0000004d, /* EMC_RFC */
491                         0x00000000, /* EMC_RFC_SLR */
492                         0x00000009, /* EMC_RAS */
493                         0x00000003, /* EMC_RP */
494                         0x00000004, /* EMC_R2W */
495                         0x00000008, /* EMC_W2R */
496                         0x00000002, /* EMC_R2P */
497                         0x00000009, /* EMC_W2P */
498                         0x00000003, /* EMC_RD_RCD */
499                         0x00000003, /* EMC_WR_RCD */
500                         0x00000002, /* EMC_RRD */
501                         0x00000002, /* EMC_REXT */
502                         0x00000000, /* EMC_WEXT */
503                         0x00000003, /* EMC_WDV */
504                         0x00000003, /* EMC_WDV_MASK */
505                         0x00000005, /* EMC_QUSE */
506                         0x00000002, /* EMC_QUSE_WIDTH */
507                         0x00000000, /* EMC_IBDLY */
508                         0x00000002, /* EMC_EINPUT */
509                         0x00000007, /* EMC_EINPUT_DURATION */
510                         0x00020000, /* EMC_PUTERM_EXTRA */
511                         0x00000003, /* EMC_PUTERM_WIDTH */
512                         0x00000000, /* EMC_PUTERM_ADJ */
513                         0x00000000, /* EMC_CDB_CNTL_1 */
514                         0x00000000, /* EMC_CDB_CNTL_2 */
515                         0x00000000, /* EMC_CDB_CNTL_3 */
516                         0x00000001, /* EMC_QRST */
517                         0x0000000e, /* EMC_QSAFE */
518                         0x0000000e, /* EMC_RDV */
519                         0x00000010, /* EMC_RDV_MASK */
520                         0x000008e4, /* EMC_REFRESH */
521                         0x00000000, /* EMC_BURST_REFRESH_NUM */
522                         0x00000239, /* EMC_PRE_REFRESH_REQ_CNT */
523                         0x00000001, /* EMC_PDEX2WR */
524                         0x00000008, /* EMC_PDEX2RD */
525                         0x00000001, /* EMC_PCHG2PDEN */
526                         0x00000000, /* EMC_ACT2PDEN */
527                         0x0000004b, /* EMC_AR2PDEN */
528                         0x0000000e, /* EMC_RW2PDEN */
529                         0x00000052, /* EMC_TXSR */
530                         0x00000200, /* EMC_TXSRDLL */
531                         0x00000004, /* EMC_TCKE */
532                         0x00000005, /* EMC_TCKESR */
533                         0x00000004, /* EMC_TPD */
534                         0x00000009, /* EMC_TFAW */
535                         0x00000000, /* EMC_TRPAB */
536                         0x00000005, /* EMC_TCLKSTABLE */
537                         0x00000005, /* EMC_TCLKSTOP */
538                         0x00000924, /* EMC_TREFBW */
539                         0x00000000, /* EMC_FBIO_CFG6 */
540                         0x00000000, /* EMC_ODT_WRITE */
541                         0x00000000, /* EMC_ODT_READ */
542                         0x104ab098, /* EMC_FBIO_CFG5 */
543                         0x002c00a0, /* EMC_CFG_DIG_DLL */
544                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
545                         0x00030000, /* EMC_DLL_XFORM_DQS0 */
546                         0x00030000, /* EMC_DLL_XFORM_DQS1 */
547                         0x00030000, /* EMC_DLL_XFORM_DQS2 */
548                         0x00030000, /* EMC_DLL_XFORM_DQS3 */
549                         0x00030000, /* EMC_DLL_XFORM_DQS4 */
550                         0x00030000, /* EMC_DLL_XFORM_DQS5 */
551                         0x00030000, /* EMC_DLL_XFORM_DQS6 */
552                         0x00030000, /* EMC_DLL_XFORM_DQS7 */
553                         0x00030000, /* EMC_DLL_XFORM_DQS8 */
554                         0x00030000, /* EMC_DLL_XFORM_DQS9 */
555                         0x00030000, /* EMC_DLL_XFORM_DQS10 */
556                         0x00030000, /* EMC_DLL_XFORM_DQS11 */
557                         0x00030000, /* EMC_DLL_XFORM_DQS12 */
558                         0x00030000, /* EMC_DLL_XFORM_DQS13 */
559                         0x00030000, /* EMC_DLL_XFORM_DQS14 */
560                         0x00030000, /* EMC_DLL_XFORM_DQS15 */
561                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
562                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
563                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
564                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
565                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
566                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
567                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
568                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
569                         0x00098000, /* EMC_DLL_XFORM_ADDR0 */
570                         0x00098000, /* EMC_DLL_XFORM_ADDR1 */
571                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
572                         0x00098000, /* EMC_DLL_XFORM_ADDR3 */
573                         0x00098000, /* EMC_DLL_XFORM_ADDR4 */
574                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
575                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
576                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
577                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
578                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
579                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
580                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
581                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
582                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
583                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
584                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
585                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
586                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
587                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
588                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
589                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
590                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
591                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
592                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
593                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
594                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
595                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
596                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
597                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
598                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
599                         0x00060000, /* EMC_DLL_XFORM_DQ0 */
600                         0x00060000, /* EMC_DLL_XFORM_DQ1 */
601                         0x00060000, /* EMC_DLL_XFORM_DQ2 */
602                         0x00060000, /* EMC_DLL_XFORM_DQ3 */
603                         0x00006000, /* EMC_DLL_XFORM_DQ4 */
604                         0x00006000, /* EMC_DLL_XFORM_DQ5 */
605                         0x00006000, /* EMC_DLL_XFORM_DQ6 */
606                         0x00006000, /* EMC_DLL_XFORM_DQ7 */
607                         0x10000280, /* EMC_XM2CMDPADCTRL */
608                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
609                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
610                         0x01231339, /* EMC_XM2DQSPADCTRL2 */
611                         0x00000000, /* EMC_XM2DQPADCTRL2 */
612                         0x00000000, /* EMC_XM2DQPADCTRL3 */
613                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
614                         0x00000505, /* EMC_XM2CLKPADCTRL2 */
615                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
616                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
617                         0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
618                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
619                         0x51451420, /* EMC_XM2DQSPADCTRL3 */
620                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
621                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
622                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
623                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
624                         0x00000096, /* EMC_TXDSRVTTGEN */
625                         0x00000000, /* EMC_FBIO_SPARE */
626                         0x00020000, /* EMC_ZCAL_INTERVAL */
627                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
628                         0x0173000e, /* EMC_MRS_WAIT_CNT */
629                         0x0173000e, /* EMC_MRS_WAIT_CNT2 */
630                         0x00000000, /* EMC_CTT */
631                         0x00000003, /* EMC_CTT_DURATION */
632                         0x0000d3b3, /* EMC_CFG_PIPE */
633                         0x800012d7, /* EMC_DYN_SELF_REF_CONTROL */
634                         0x00000009, /* EMC_QPOP */
635                         0x08000004, /* MC_EMEM_ARB_CFG */
636                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
637                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
638                         0x00000002, /* MC_EMEM_ARB_TIMING_RP */
639                         0x00000007, /* MC_EMEM_ARB_TIMING_RC */
640                         0x00000004, /* MC_EMEM_ARB_TIMING_RAS */
641                         0x00000005, /* MC_EMEM_ARB_TIMING_FAW */
642                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
643                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
644                         0x00000007, /* MC_EMEM_ARB_TIMING_WAP2PRE */
645                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
646                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
647                         0x00000004, /* MC_EMEM_ARB_TIMING_R2W */
648                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
649                         0x06040202, /* MC_EMEM_ARB_DA_TURNS */
650                         0x000b0607, /* MC_EMEM_ARB_DA_COVERS */
651                         0x77450e08, /* MC_EMEM_ARB_MISC0 */
652                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
653                 },
654                 {
655                         0x00000004, /* MC_MLL_MPCORER_PTSA_RATE */
656                         0x00000090, /* MC_PTSA_GRANT_DECREMENT */
657                         0x00ff004a, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
658                         0x00ff004a, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
659                         0x00ff003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
660                         0x00ff0090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
661                         0x00ff0041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
662                         0x00ff0090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
663                         0x00ff0041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
664                         0x00350049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
665                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
666                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
667                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
668                         0x0008003b, /* MC_LATENCY_ALLOWANCE_HC_0 */
669                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
670                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
671                         0x00ff0043, /* MC_LATENCY_ALLOWANCE_GPU_0 */
672                         0x00ff002d, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
673                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
674                         0x00ff0049, /* MC_LATENCY_ALLOWANCE_VIC_0 */
675                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
676                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
677                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
678                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
679                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
680                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
681                         0x00510036, /* MC_LATENCY_ALLOWANCE_VDE_1 */
682                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
683                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
684                         0x00ff0087, /* MC_LATENCY_ALLOWANCE_SATA_0 */
685                         0x00ff004a, /* MC_LATENCY_ALLOWANCE_AFI_0 */
686                 },
687                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
688                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
689                 0x00000802, /* EMC_CTT_TERM_CTRL */
690                 0x73340000, /* EMC_CFG */
691                 0x000008cd, /* EMC_CFG_2 */
692                 0x00040128, /* EMC_SEL_DPD_CTRL */
693                 0x002c0068, /* EMC_CFG_DIG_DLL */
694                 0x00000000, /* EMC_BGBIAS_CTL0 */
695                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
696                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
697                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
698                 0x80000321, /* Mode Register 0 */
699                 0x80100002, /* Mode Register 1 */
700                 0x80200000, /* Mode Register 2 */
701                 0x00000000, /* Mode Register 4 */
702                 2680,       /* expected dvfs latency (ns) */
703         },
704         {
705                 0x18,       /* V5.0.12 */
706                 "03_396000_04_V5.0.12_V0.9", /* DVFS table version */
707                 396000,     /* SDRAM frequency */
708                 850,        /* min voltage */
709                 900,        /* gpu min voltage */
710                 "pllm_out0", /* clock source id */
711                 0x00000002, /* CLK_SOURCE_EMC */
712                 164,        /* number of burst_regs */
713                 31,         /* number of up_down_regs */
714                 {
715                         0x00000011, /* EMC_RC */
716                         0x00000066, /* EMC_RFC */
717                         0x00000000, /* EMC_RFC_SLR */
718                         0x0000000c, /* EMC_RAS */
719                         0x00000004, /* EMC_RP */
720                         0x00000004, /* EMC_R2W */
721                         0x00000008, /* EMC_W2R */
722                         0x00000002, /* EMC_R2P */
723                         0x0000000a, /* EMC_W2P */
724                         0x00000004, /* EMC_RD_RCD */
725                         0x00000004, /* EMC_WR_RCD */
726                         0x00000002, /* EMC_RRD */
727                         0x00000002, /* EMC_REXT */
728                         0x00000000, /* EMC_WEXT */
729                         0x00000003, /* EMC_WDV */
730                         0x00000003, /* EMC_WDV_MASK */
731                         0x00000005, /* EMC_QUSE */
732                         0x00000002, /* EMC_QUSE_WIDTH */
733                         0x00000000, /* EMC_IBDLY */
734                         0x00000001, /* EMC_EINPUT */
735                         0x00000008, /* EMC_EINPUT_DURATION */
736                         0x00020000, /* EMC_PUTERM_EXTRA */
737                         0x00000003, /* EMC_PUTERM_WIDTH */
738                         0x00000000, /* EMC_PUTERM_ADJ */
739                         0x00000000, /* EMC_CDB_CNTL_1 */
740                         0x00000000, /* EMC_CDB_CNTL_2 */
741                         0x00000000, /* EMC_CDB_CNTL_3 */
742                         0x00000000, /* EMC_QRST */
743                         0x0000000f, /* EMC_QSAFE */
744                         0x00000010, /* EMC_RDV */
745                         0x00000012, /* EMC_RDV_MASK */
746                         0x00000bd1, /* EMC_REFRESH */
747                         0x00000000, /* EMC_BURST_REFRESH_NUM */
748                         0x000002f4, /* EMC_PRE_REFRESH_REQ_CNT */
749                         0x00000001, /* EMC_PDEX2WR */
750                         0x00000008, /* EMC_PDEX2RD */
751                         0x00000001, /* EMC_PCHG2PDEN */
752                         0x00000000, /* EMC_ACT2PDEN */
753                         0x00000063, /* EMC_AR2PDEN */
754                         0x0000000f, /* EMC_RW2PDEN */
755                         0x0000006c, /* EMC_TXSR */
756                         0x00000200, /* EMC_TXSRDLL */
757                         0x00000004, /* EMC_TCKE */
758                         0x00000005, /* EMC_TCKESR */
759                         0x00000004, /* EMC_TPD */
760                         0x0000000d, /* EMC_TFAW */
761                         0x00000000, /* EMC_TRPAB */
762                         0x00000005, /* EMC_TCLKSTABLE */
763                         0x00000005, /* EMC_TCLKSTOP */
764                         0x00000c11, /* EMC_TREFBW */
765                         0x00000000, /* EMC_FBIO_CFG6 */
766                         0x00000000, /* EMC_ODT_WRITE */
767                         0x00000000, /* EMC_ODT_READ */
768                         0x104ab098, /* EMC_FBIO_CFG5 */
769                         0x002c00a0, /* EMC_CFG_DIG_DLL */
770                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
771                         0x00030000, /* EMC_DLL_XFORM_DQS0 */
772                         0x00030000, /* EMC_DLL_XFORM_DQS1 */
773                         0x00030000, /* EMC_DLL_XFORM_DQS2 */
774                         0x00030000, /* EMC_DLL_XFORM_DQS3 */
775                         0x00030000, /* EMC_DLL_XFORM_DQS4 */
776                         0x00030000, /* EMC_DLL_XFORM_DQS5 */
777                         0x00030000, /* EMC_DLL_XFORM_DQS6 */
778                         0x00030000, /* EMC_DLL_XFORM_DQS7 */
779                         0x00030000, /* EMC_DLL_XFORM_DQS8 */
780                         0x00030000, /* EMC_DLL_XFORM_DQS9 */
781                         0x00030000, /* EMC_DLL_XFORM_DQS10 */
782                         0x00030000, /* EMC_DLL_XFORM_DQS11 */
783                         0x00030000, /* EMC_DLL_XFORM_DQS12 */
784                         0x00030000, /* EMC_DLL_XFORM_DQS13 */
785                         0x00030000, /* EMC_DLL_XFORM_DQS14 */
786                         0x00030000, /* EMC_DLL_XFORM_DQS15 */
787                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
788                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
789                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
790                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
791                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
792                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
793                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
794                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
795                         0x00070000, /* EMC_DLL_XFORM_ADDR0 */
796                         0x00070000, /* EMC_DLL_XFORM_ADDR1 */
797                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
798                         0x00070000, /* EMC_DLL_XFORM_ADDR3 */
799                         0x00070000, /* EMC_DLL_XFORM_ADDR4 */
800                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
801                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
802                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
803                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
804                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
805                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
806                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
807                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
808                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
809                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
810                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
811                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
812                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
813                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
814                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
815                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
816                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
817                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
818                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
819                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
820                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
821                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
822                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
823                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
824                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
825                         0x00038000, /* EMC_DLL_XFORM_DQ0 */
826                         0x00038000, /* EMC_DLL_XFORM_DQ1 */
827                         0x00038000, /* EMC_DLL_XFORM_DQ2 */
828                         0x00038000, /* EMC_DLL_XFORM_DQ3 */
829                         0x00003800, /* EMC_DLL_XFORM_DQ4 */
830                         0x00003800, /* EMC_DLL_XFORM_DQ5 */
831                         0x00003800, /* EMC_DLL_XFORM_DQ6 */
832                         0x00003800, /* EMC_DLL_XFORM_DQ7 */
833                         0x10000280, /* EMC_XM2CMDPADCTRL */
834                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
835                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
836                         0x01231339, /* EMC_XM2DQSPADCTRL2 */
837                         0x00000000, /* EMC_XM2DQPADCTRL2 */
838                         0x00000000, /* EMC_XM2DQPADCTRL3 */
839                         0x77ffc081, /* EMC_XM2CLKPADCTRL */
840                         0x00000505, /* EMC_XM2CLKPADCTRL2 */
841                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
842                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
843                         0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
844                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
845                         0x51451420, /* EMC_XM2DQSPADCTRL3 */
846                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
847                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
848                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
849                         0x0000003f, /* EMC_DSR_VTTGEN_DRV */
850                         0x000000c6, /* EMC_TXDSRVTTGEN */
851                         0x00000000, /* EMC_FBIO_SPARE */
852                         0x00020000, /* EMC_ZCAL_INTERVAL */
853                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
854                         0x015b000e, /* EMC_MRS_WAIT_CNT */
855                         0x015b000e, /* EMC_MRS_WAIT_CNT2 */
856                         0x00000000, /* EMC_CTT */
857                         0x00000003, /* EMC_CTT_DURATION */
858                         0x000052a3, /* EMC_CFG_PIPE */
859                         0x8000188b, /* EMC_DYN_SELF_REF_CONTROL */
860                         0x00000009, /* EMC_QPOP */
861                         0x0f000005, /* MC_EMEM_ARB_CFG */
862                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
863                         0x00000001, /* MC_EMEM_ARB_TIMING_RCD */
864                         0x00000002, /* MC_EMEM_ARB_TIMING_RP */
865                         0x00000009, /* MC_EMEM_ARB_TIMING_RC */
866                         0x00000005, /* MC_EMEM_ARB_TIMING_RAS */
867                         0x00000007, /* MC_EMEM_ARB_TIMING_FAW */
868                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
869                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
870                         0x00000008, /* MC_EMEM_ARB_TIMING_WAP2PRE */
871                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
872                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
873                         0x00000004, /* MC_EMEM_ARB_TIMING_R2W */
874                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
875                         0x06040202, /* MC_EMEM_ARB_DA_TURNS */
876                         0x000d0709, /* MC_EMEM_ARB_DA_COVERS */
877                         0x7586120a, /* MC_EMEM_ARB_MISC0 */
878                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
879                 },
880                 {
881                         0x0000000a, /* MC_MLL_MPCORER_PTSA_RATE */
882                         0x000000be, /* MC_PTSA_GRANT_DECREMENT */
883                         0x00ff0038, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
884                         0x00ff0038, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
885                         0x00ff003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
886                         0x00ff0090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
887                         0x00ff0041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
888                         0x00ff0090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
889                         0x00ff0041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
890                         0x00280049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
891                         0x00ff0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
892                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
893                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
894                         0x0008002d, /* MC_LATENCY_ALLOWANCE_HC_0 */
895                         0x000000ff, /* MC_LATENCY_ALLOWANCE_HC_1 */
896                         0x00ff0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
897                         0x00ff0033, /* MC_LATENCY_ALLOWANCE_GPU_0 */
898                         0x00ff0022, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
899                         0x00ff0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
900                         0x00ff0037, /* MC_LATENCY_ALLOWANCE_VIC_0 */
901                         0x000000ff, /* MC_LATENCY_ALLOWANCE_VI2_0 */
902                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
903                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
904                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
905                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
906                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
907                         0x00510029, /* MC_LATENCY_ALLOWANCE_VDE_1 */
908                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_2 */
909                         0x00ff00ff, /* MC_LATENCY_ALLOWANCE_VDE_3 */
910                         0x00ff0066, /* MC_LATENCY_ALLOWANCE_SATA_0 */
911                         0x00ff0038, /* MC_LATENCY_ALLOWANCE_AFI_0 */
912                 },
913                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
914                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
915                 0x00000802, /* EMC_CTT_TERM_CTRL */
916                 0x73340000, /* EMC_CFG */
917                 0x00000895, /* EMC_CFG_2 */
918                 0x00040008, /* EMC_SEL_DPD_CTRL */
919                 0x002c0068, /* EMC_CFG_DIG_DLL */
920                 0x00000000, /* EMC_BGBIAS_CTL0 */
921                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
922                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
923                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
924                 0x80000521, /* Mode Register 0 */
925                 0x80100002, /* Mode Register 1 */
926                 0x80200000, /* Mode Register 2 */
927                 0x00000000, /* Mode Register 4 */
928                 2180,       /* expected dvfs latency (ns) */
929         },
930         {
931                 0x18,       /* V5.0.12 */
932                 "03_528000_04_V5.0.12_V0.9", /* DVFS table version */
933                 526500,     /* SDRAM frequency */
934                 870,        /* min voltage */
935                 900,        /* gpu min voltage */
936                 "pllm_ud",  /* clock source id */
937                 0x80000000, /* CLK_SOURCE_EMC */
938                 164,        /* number of burst_regs */
939                 31,         /* number of up_down_regs */
940                 {
941                         0x00000018, /* EMC_RC */
942                         0x00000088, /* EMC_RFC */
943                         0x00000000, /* EMC_RFC_SLR */
944                         0x00000010, /* EMC_RAS */
945                         0x00000006, /* EMC_RP */
946                         0x00000006, /* EMC_R2W */
947                         0x00000009, /* EMC_W2R */
948                         0x00000002, /* EMC_R2P */
949                         0x0000000d, /* EMC_W2P */
950                         0x00000006, /* EMC_RD_RCD */
951                         0x00000006, /* EMC_WR_RCD */
952                         0x00000002, /* EMC_RRD */
953                         0x00000002, /* EMC_REXT */
954                         0x00000000, /* EMC_WEXT */
955                         0x00000003, /* EMC_WDV */
956                         0x00000003, /* EMC_WDV_MASK */
957                         0x00000006, /* EMC_QUSE */
958                         0x00000002, /* EMC_QUSE_WIDTH */
959                         0x00000000, /* EMC_IBDLY */
960                         0x00000001, /* EMC_EINPUT */
961                         0x00000009, /* EMC_EINPUT_DURATION */
962                         0x00030000, /* EMC_PUTERM_EXTRA */
963                         0x00000003, /* EMC_PUTERM_WIDTH */
964                         0x00000000, /* EMC_PUTERM_ADJ */
965                         0x00000000, /* EMC_CDB_CNTL_1 */
966                         0x00000000, /* EMC_CDB_CNTL_2 */
967                         0x00000000, /* EMC_CDB_CNTL_3 */
968                         0x00000000, /* EMC_QRST */
969                         0x00000010, /* EMC_QSAFE */
970                         0x00000012, /* EMC_RDV */
971                         0x00000014, /* EMC_RDV_MASK */
972                         0x00000fd6, /* EMC_REFRESH */
973                         0x00000000, /* EMC_BURST_REFRESH_NUM */
974                         0x000003f5, /* EMC_PRE_REFRESH_REQ_CNT */
975                         0x00000002, /* EMC_PDEX2WR */
976                         0x0000000b, /* EMC_PDEX2RD */
977                         0x00000001, /* EMC_PCHG2PDEN */
978                         0x00000000, /* EMC_ACT2PDEN */
979                         0x00000085, /* EMC_AR2PDEN */
980                         0x00000012, /* EMC_RW2PDEN */
981                         0x00000090, /* EMC_TXSR */
982                         0x00000200, /* EMC_TXSRDLL */
983                         0x00000004, /* EMC_TCKE */
984                         0x00000005, /* EMC_TCKESR */
985                         0x00000004, /* EMC_TPD */
986                         0x00000013, /* EMC_TFAW */
987                         0x00000000, /* EMC_TRPAB */
988                         0x00000006, /* EMC_TCLKSTABLE */
989                         0x00000006, /* EMC_TCLKSTOP */
990                         0x00001017, /* EMC_TREFBW */
991                         0x00000000, /* EMC_FBIO_CFG6 */
992                         0x00000000, /* EMC_ODT_WRITE */
993                         0x00000000, /* EMC_ODT_READ */
994                         0x104ab098, /* EMC_FBIO_CFG5 */
995                         0xe01200b1, /* EMC_CFG_DIG_DLL */
996                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
997                         0x0000000a, /* EMC_DLL_XFORM_DQS0 */
998                         0x0000000a, /* EMC_DLL_XFORM_DQS1 */
999                         0x0000000a, /* EMC_DLL_XFORM_DQS2 */
1000                         0x0000000a, /* EMC_DLL_XFORM_DQS3 */
1001                         0x0000000a, /* EMC_DLL_XFORM_DQS4 */
1002                         0x0000000a, /* EMC_DLL_XFORM_DQS5 */
1003                         0x0000000a, /* EMC_DLL_XFORM_DQS6 */
1004                         0x0000000a, /* EMC_DLL_XFORM_DQS7 */
1005                         0x0000000a, /* EMC_DLL_XFORM_DQS8 */
1006                         0x0000000a, /* EMC_DLL_XFORM_DQS9 */
1007                         0x0000000a, /* EMC_DLL_XFORM_DQS10 */
1008                         0x0000000a, /* EMC_DLL_XFORM_DQS11 */
1009                         0x0000000a, /* EMC_DLL_XFORM_DQS12 */
1010                         0x0000000a, /* EMC_DLL_XFORM_DQS13 */
1011                         0x0000000a, /* EMC_DLL_XFORM_DQS14 */
1012                         0x0000000a, /* EMC_DLL_XFORM_DQS15 */
1013                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1014                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1015                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1016                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1017                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
1018                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
1019                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
1020                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
1021                         0x00054000, /* EMC_DLL_XFORM_ADDR0 */
1022                         0x00054000, /* EMC_DLL_XFORM_ADDR1 */
1023                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
1024                         0x00054000, /* EMC_DLL_XFORM_ADDR3 */
1025                         0x00054000, /* EMC_DLL_XFORM_ADDR4 */
1026                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
1027                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
1028                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
1029                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
1030                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
1031                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
1032                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
1033                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
1034                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
1035                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1036                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1037                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1038                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1039                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1040                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1041                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1042                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1043                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
1044                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
1045                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
1046                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
1047                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
1048                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
1049                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
1050                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
1051                         0x0000000e, /* EMC_DLL_XFORM_DQ0 */
1052                         0x0000000e, /* EMC_DLL_XFORM_DQ1 */
1053                         0x0000000e, /* EMC_DLL_XFORM_DQ2 */
1054                         0x0000000e, /* EMC_DLL_XFORM_DQ3 */
1055                         0x0000000e, /* EMC_DLL_XFORM_DQ4 */
1056                         0x0000000e, /* EMC_DLL_XFORM_DQ5 */
1057                         0x0000000e, /* EMC_DLL_XFORM_DQ6 */
1058                         0x0000000e, /* EMC_DLL_XFORM_DQ7 */
1059                         0x100002a0, /* EMC_XM2CMDPADCTRL */
1060                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
1061                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
1062                         0x0123133d, /* EMC_XM2DQSPADCTRL2 */
1063                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1064                         0x00000000, /* EMC_XM2DQPADCTRL3 */
1065                         0x77ffc085, /* EMC_XM2CLKPADCTRL */
1066                         0x00000505, /* EMC_XM2CLKPADCTRL2 */
1067                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
1068                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
1069                         0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
1070                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
1071                         0x51451420, /* EMC_XM2DQSPADCTRL3 */
1072                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
1073                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
1074                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
1075                         0x0606003f, /* EMC_DSR_VTTGEN_DRV */
1076                         0x00000000, /* EMC_TXDSRVTTGEN */
1077                         0x00000000, /* EMC_FBIO_SPARE */
1078                         0x00020000, /* EMC_ZCAL_INTERVAL */
1079                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
1080                         0x0139000e, /* EMC_MRS_WAIT_CNT */
1081                         0x0139000e, /* EMC_MRS_WAIT_CNT2 */
1082                         0x00000000, /* EMC_CTT */
1083                         0x00000003, /* EMC_CTT_DURATION */
1084                         0x000042a0, /* EMC_CFG_PIPE */
1085                         0x80002062, /* EMC_DYN_SELF_REF_CONTROL */
1086                         0x0000000a, /* EMC_QPOP */
1087                         0x0f000007, /* MC_EMEM_ARB_CFG */
1088                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1089                         0x00000002, /* MC_EMEM_ARB_TIMING_RCD */
1090                         0x00000003, /* MC_EMEM_ARB_TIMING_RP */
1091                         0x0000000c, /* MC_EMEM_ARB_TIMING_RC */
1092                         0x00000007, /* MC_EMEM_ARB_TIMING_RAS */
1093                         0x0000000a, /* MC_EMEM_ARB_TIMING_FAW */
1094                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
1095                         0x00000002, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1096                         0x00000009, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1097                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
1098                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
1099                         0x00000005, /* MC_EMEM_ARB_TIMING_R2W */
1100                         0x00000006, /* MC_EMEM_ARB_TIMING_W2R */
1101                         0x06050202, /* MC_EMEM_ARB_DA_TURNS */
1102                         0x0010090c, /* MC_EMEM_ARB_DA_COVERS */
1103                         0x7428180d, /* MC_EMEM_ARB_MISC0 */
1104                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1105                 },
1106                 {
1107                         0x0000000d, /* MC_MLL_MPCORER_PTSA_RATE */
1108                         0x000000fd, /* MC_PTSA_GRANT_DECREMENT */
1109                         0x00c10038, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
1110                         0x00c10038, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
1111                         0x00c1003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
1112                         0x00c10090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
1113                         0x00c10041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
1114                         0x00c10090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
1115                         0x00c10041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
1116                         0x00270049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
1117                         0x00c10080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
1118                         0x00c10004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
1119                         0x00c10004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
1120                         0x00080021, /* MC_LATENCY_ALLOWANCE_HC_0 */
1121                         0x000000c1, /* MC_LATENCY_ALLOWANCE_HC_1 */
1122                         0x00c10004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
1123                         0x00c10026, /* MC_LATENCY_ALLOWANCE_GPU_0 */
1124                         0x00c1001a, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
1125                         0x00c10024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
1126                         0x00c10029, /* MC_LATENCY_ALLOWANCE_VIC_0 */
1127                         0x000000c1, /* MC_LATENCY_ALLOWANCE_VI2_0 */
1128                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
1129                         0x00c100c1, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
1130                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
1131                         0x00c100c1, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
1132                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
1133                         0x00510029, /* MC_LATENCY_ALLOWANCE_VDE_1 */
1134                         0x00c100c1, /* MC_LATENCY_ALLOWANCE_VDE_2 */
1135                         0x00c100c1, /* MC_LATENCY_ALLOWANCE_VDE_3 */
1136                         0x00c10065, /* MC_LATENCY_ALLOWANCE_SATA_0 */
1137                         0x00c1002a, /* MC_LATENCY_ALLOWANCE_AFI_0 */
1138                 },
1139                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
1140                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1141                 0x00000802, /* EMC_CTT_TERM_CTRL */
1142                 0x73300000, /* EMC_CFG */
1143                 0x0000089d, /* EMC_CFG_2 */
1144                 0x00040008, /* EMC_SEL_DPD_CTRL */
1145                 0xe0120069, /* EMC_CFG_DIG_DLL */
1146                 0x00000000, /* EMC_BGBIAS_CTL0 */
1147                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
1148                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
1149                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
1150                 0x80000941, /* Mode Register 0 */
1151                 0x80100002, /* Mode Register 1 */
1152                 0x80200008, /* Mode Register 2 */
1153                 0x00000000, /* Mode Register 4 */
1154                 1440,       /* expected dvfs latency (ns) */
1155         },
1156         {
1157                 0x18,       /* V5.0.12 */
1158                 "03_600000_02_V5.0.12_V0.9", /* DVFS table version */
1159                 598000,     /* SDRAM frequency */
1160                 910,        /* min voltage */
1161                 900,        /* gpu min voltage */
1162                 "pllm_ud",  /* clock source id */
1163                 0x80000000, /* CLK_SOURCE_EMC */
1164                 164,        /* number of burst_regs */
1165                 31,         /* number of up_down_regs */
1166                 {
1167                         0x0000001b, /* EMC_RC */
1168                         0x0000009b, /* EMC_RFC */
1169                         0x00000000, /* EMC_RFC_SLR */
1170                         0x00000013, /* EMC_RAS */
1171                         0x00000007, /* EMC_RP */
1172                         0x00000007, /* EMC_R2W */
1173                         0x0000000b, /* EMC_W2R */
1174                         0x00000003, /* EMC_R2P */
1175                         0x00000010, /* EMC_W2P */
1176                         0x00000007, /* EMC_RD_RCD */
1177                         0x00000007, /* EMC_WR_RCD */
1178                         0x00000002, /* EMC_RRD */
1179                         0x00000002, /* EMC_REXT */
1180                         0x00000000, /* EMC_WEXT */
1181                         0x00000005, /* EMC_WDV */
1182                         0x00000005, /* EMC_WDV_MASK */
1183                         0x0000000a, /* EMC_QUSE */
1184                         0x00000002, /* EMC_QUSE_WIDTH */
1185                         0x00000000, /* EMC_IBDLY */
1186                         0x00000003, /* EMC_EINPUT */
1187                         0x0000000b, /* EMC_EINPUT_DURATION */
1188                         0x00070000, /* EMC_PUTERM_EXTRA */
1189                         0x00000003, /* EMC_PUTERM_WIDTH */
1190                         0x00000000, /* EMC_PUTERM_ADJ */
1191                         0x00000000, /* EMC_CDB_CNTL_1 */
1192                         0x00000000, /* EMC_CDB_CNTL_2 */
1193                         0x00000000, /* EMC_CDB_CNTL_3 */
1194                         0x00000002, /* EMC_QRST */
1195                         0x00000012, /* EMC_QSAFE */
1196                         0x00000016, /* EMC_RDV */
1197                         0x00000018, /* EMC_RDV_MASK */
1198                         0x00001208, /* EMC_REFRESH */
1199                         0x00000000, /* EMC_BURST_REFRESH_NUM */
1200                         0x00000482, /* EMC_PRE_REFRESH_REQ_CNT */
1201                         0x00000002, /* EMC_PDEX2WR */
1202                         0x0000000d, /* EMC_PDEX2RD */
1203                         0x00000001, /* EMC_PCHG2PDEN */
1204                         0x00000000, /* EMC_ACT2PDEN */
1205                         0x00000097, /* EMC_AR2PDEN */
1206                         0x00000015, /* EMC_RW2PDEN */
1207                         0x000000a3, /* EMC_TXSR */
1208                         0x00000200, /* EMC_TXSRDLL */
1209                         0x00000004, /* EMC_TCKE */
1210                         0x00000005, /* EMC_TCKESR */
1211                         0x00000004, /* EMC_TPD */
1212                         0x00000015, /* EMC_TFAW */
1213                         0x00000000, /* EMC_TRPAB */
1214                         0x00000006, /* EMC_TCLKSTABLE */
1215                         0x00000006, /* EMC_TCLKSTOP */
1216                         0x00001248, /* EMC_TREFBW */
1217                         0x00000000, /* EMC_FBIO_CFG6 */
1218                         0x00000000, /* EMC_ODT_WRITE */
1219                         0x00000000, /* EMC_ODT_READ */
1220                         0x104ab098, /* EMC_FBIO_CFG5 */
1221                         0xe00e00b1, /* EMC_CFG_DIG_DLL */
1222                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1223                         0x0000000a, /* EMC_DLL_XFORM_DQS0 */
1224                         0x0000000a, /* EMC_DLL_XFORM_DQS1 */
1225                         0x0000000a, /* EMC_DLL_XFORM_DQS2 */
1226                         0x0000000a, /* EMC_DLL_XFORM_DQS3 */
1227                         0x0000000a, /* EMC_DLL_XFORM_DQS4 */
1228                         0x0000000a, /* EMC_DLL_XFORM_DQS5 */
1229                         0x0000000a, /* EMC_DLL_XFORM_DQS6 */
1230                         0x0000000a, /* EMC_DLL_XFORM_DQS7 */
1231                         0x0000000a, /* EMC_DLL_XFORM_DQS8 */
1232                         0x0000000a, /* EMC_DLL_XFORM_DQS9 */
1233                         0x0000000a, /* EMC_DLL_XFORM_DQS10 */
1234                         0x0000000a, /* EMC_DLL_XFORM_DQS11 */
1235                         0x0000000a, /* EMC_DLL_XFORM_DQS12 */
1236                         0x0000000a, /* EMC_DLL_XFORM_DQS13 */
1237                         0x0000000a, /* EMC_DLL_XFORM_DQS14 */
1238                         0x0000000a, /* EMC_DLL_XFORM_DQS15 */
1239                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1240                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1241                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1242                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1243                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
1244                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
1245                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
1246                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
1247                         0x00048000, /* EMC_DLL_XFORM_ADDR0 */
1248                         0x00048000, /* EMC_DLL_XFORM_ADDR1 */
1249                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
1250                         0x00048000, /* EMC_DLL_XFORM_ADDR3 */
1251                         0x00048000, /* EMC_DLL_XFORM_ADDR4 */
1252                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
1253                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
1254                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
1255                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
1256                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
1257                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
1258                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
1259                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
1260                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
1261                         0x00000000, /* EMC_DLI_TRIM_TXDQS0 */
1262                         0x00000000, /* EMC_DLI_TRIM_TXDQS1 */
1263                         0x00000000, /* EMC_DLI_TRIM_TXDQS2 */
1264                         0x00000000, /* EMC_DLI_TRIM_TXDQS3 */
1265                         0x00000000, /* EMC_DLI_TRIM_TXDQS4 */
1266                         0x00000000, /* EMC_DLI_TRIM_TXDQS5 */
1267                         0x00000000, /* EMC_DLI_TRIM_TXDQS6 */
1268                         0x00000000, /* EMC_DLI_TRIM_TXDQS7 */
1269                         0x00000000, /* EMC_DLI_TRIM_TXDQS8 */
1270                         0x00000000, /* EMC_DLI_TRIM_TXDQS9 */
1271                         0x00000000, /* EMC_DLI_TRIM_TXDQS10 */
1272                         0x00000000, /* EMC_DLI_TRIM_TXDQS11 */
1273                         0x00000000, /* EMC_DLI_TRIM_TXDQS12 */
1274                         0x00000000, /* EMC_DLI_TRIM_TXDQS13 */
1275                         0x00000000, /* EMC_DLI_TRIM_TXDQS14 */
1276                         0x00000000, /* EMC_DLI_TRIM_TXDQS15 */
1277                         0x0000000d, /* EMC_DLL_XFORM_DQ0 */
1278                         0x0000000d, /* EMC_DLL_XFORM_DQ1 */
1279                         0x0000000d, /* EMC_DLL_XFORM_DQ2 */
1280                         0x0000000d, /* EMC_DLL_XFORM_DQ3 */
1281                         0x0000000d, /* EMC_DLL_XFORM_DQ4 */
1282                         0x0000000d, /* EMC_DLL_XFORM_DQ5 */
1283                         0x0000000d, /* EMC_DLL_XFORM_DQ6 */
1284                         0x0000000d, /* EMC_DLL_XFORM_DQ7 */
1285                         0x100002a0, /* EMC_XM2CMDPADCTRL */
1286                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
1287                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
1288                         0x0121113d, /* EMC_XM2DQSPADCTRL2 */
1289                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1290                         0x00000000, /* EMC_XM2DQPADCTRL3 */
1291                         0x77ffc085, /* EMC_XM2CLKPADCTRL */
1292                         0x00000505, /* EMC_XM2CLKPADCTRL2 */
1293                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
1294                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
1295                         0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
1296                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
1297                         0x51451420, /* EMC_XM2DQSPADCTRL3 */
1298                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
1299                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
1300                         0x51451400, /* EMC_XM2DQSPADCTRL6 */
1301                         0x0606003f, /* EMC_DSR_VTTGEN_DRV */
1302                         0x00000000, /* EMC_TXDSRVTTGEN */
1303                         0x00000000, /* EMC_FBIO_SPARE */
1304                         0x00020000, /* EMC_ZCAL_INTERVAL */
1305                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
1306                         0x0127000e, /* EMC_MRS_WAIT_CNT */
1307                         0x0127000e, /* EMC_MRS_WAIT_CNT2 */
1308                         0x00000000, /* EMC_CTT */
1309                         0x00000003, /* EMC_CTT_DURATION */
1310                         0x000040a0, /* EMC_CFG_PIPE */
1311                         0x800024a9, /* EMC_DYN_SELF_REF_CONTROL */
1312                         0x0000000e, /* EMC_QPOP */
1313                         0x00000009, /* MC_EMEM_ARB_CFG */
1314                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1315                         0x00000003, /* MC_EMEM_ARB_TIMING_RCD */
1316                         0x00000004, /* MC_EMEM_ARB_TIMING_RP */
1317                         0x0000000e, /* MC_EMEM_ARB_TIMING_RC */
1318                         0x00000009, /* MC_EMEM_ARB_TIMING_RAS */
1319                         0x0000000b, /* MC_EMEM_ARB_TIMING_FAW */
1320                         0x00000001, /* MC_EMEM_ARB_TIMING_RRD */
1321                         0x00000003, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1322                         0x0000000b, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1323                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
1324                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
1325                         0x00000005, /* MC_EMEM_ARB_TIMING_R2W */
1326                         0x00000007, /* MC_EMEM_ARB_TIMING_W2R */
1327                         0x07050202, /* MC_EMEM_ARB_DA_TURNS */
1328                         0x00130b0e, /* MC_EMEM_ARB_DA_COVERS */
1329                         0x73a91b0f, /* MC_EMEM_ARB_MISC0 */
1330                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1331                 },
1332                 {
1333                         0x0000000f, /* MC_MLL_MPCORER_PTSA_RATE */
1334                         0x00000120, /* MC_PTSA_GRANT_DECREMENT */
1335                         0x00aa0038, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
1336                         0x00aa0038, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
1337                         0x00aa003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
1338                         0x00aa0090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
1339                         0x00aa0041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
1340                         0x00aa0090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
1341                         0x00aa0041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
1342                         0x00270049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
1343                         0x00aa0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
1344                         0x00aa0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
1345                         0x00aa0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
1346                         0x0008001d, /* MC_LATENCY_ALLOWANCE_HC_0 */
1347                         0x000000aa, /* MC_LATENCY_ALLOWANCE_HC_1 */
1348                         0x00aa0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
1349                         0x00aa0022, /* MC_LATENCY_ALLOWANCE_GPU_0 */
1350                         0x00aa0018, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
1351                         0x00aa0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
1352                         0x00aa0024, /* MC_LATENCY_ALLOWANCE_VIC_0 */
1353                         0x000000aa, /* MC_LATENCY_ALLOWANCE_VI2_0 */
1354                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
1355                         0x00aa00aa, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
1356                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
1357                         0x00aa00aa, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
1358                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
1359                         0x00510029, /* MC_LATENCY_ALLOWANCE_VDE_1 */
1360                         0x00aa00aa, /* MC_LATENCY_ALLOWANCE_VDE_2 */
1361                         0x00aa00aa, /* MC_LATENCY_ALLOWANCE_VDE_3 */
1362                         0x00aa0065, /* MC_LATENCY_ALLOWANCE_SATA_0 */
1363                         0x00aa0025, /* MC_LATENCY_ALLOWANCE_AFI_0 */
1364                 },
1365                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
1366                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1367                 0x00000802, /* EMC_CTT_TERM_CTRL */
1368                 0x73300000, /* EMC_CFG */
1369                 0x0000089d, /* EMC_CFG_2 */
1370                 0x00040008, /* EMC_SEL_DPD_CTRL */
1371                 0xe00e0069, /* EMC_CFG_DIG_DLL */
1372                 0x00000000, /* EMC_BGBIAS_CTL0 */
1373                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
1374                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
1375                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
1376                 0x80000b61, /* Mode Register 0 */
1377                 0x80100002, /* Mode Register 1 */
1378                 0x80200010, /* Mode Register 2 */
1379                 0x00000000, /* Mode Register 4 */
1380                 1440,       /* expected dvfs latency (ns) */
1381         },
1382         {
1383                 0x18,       /* V5.0.12 */
1384                 "03_792000_06_V5.0.12_V0.9", /* DVFS table version */
1385                 786500,     /* SDRAM frequency */
1386                 980,        /* min voltage */
1387                 1100,       /* gpu min voltage */
1388                 "pllm_ud",  /* clock source id */
1389                 0x80000000, /* CLK_SOURCE_EMC */
1390                 164,        /* number of burst_regs */
1391                 31,         /* number of up_down_regs */
1392                 {
1393                         0x00000024, /* EMC_RC */
1394                         0x000000cd, /* EMC_RFC */
1395                         0x00000000, /* EMC_RFC_SLR */
1396                         0x00000019, /* EMC_RAS */
1397                         0x0000000a, /* EMC_RP */
1398                         0x00000008, /* EMC_R2W */
1399                         0x0000000d, /* EMC_W2R */
1400                         0x00000004, /* EMC_R2P */
1401                         0x00000013, /* EMC_W2P */
1402                         0x0000000a, /* EMC_RD_RCD */
1403                         0x0000000a, /* EMC_WR_RCD */
1404                         0x00000003, /* EMC_RRD */
1405                         0x00000002, /* EMC_REXT */
1406                         0x00000000, /* EMC_WEXT */
1407                         0x00000006, /* EMC_WDV */
1408                         0x00000006, /* EMC_WDV_MASK */
1409                         0x0000000b, /* EMC_QUSE */
1410                         0x00000002, /* EMC_QUSE_WIDTH */
1411                         0x00000000, /* EMC_IBDLY */
1412                         0x00000002, /* EMC_EINPUT */
1413                         0x0000000d, /* EMC_EINPUT_DURATION */
1414                         0x00080000, /* EMC_PUTERM_EXTRA */
1415                         0x00000004, /* EMC_PUTERM_WIDTH */
1416                         0x00000000, /* EMC_PUTERM_ADJ */
1417                         0x00000000, /* EMC_CDB_CNTL_1 */
1418                         0x00000000, /* EMC_CDB_CNTL_2 */
1419                         0x00000000, /* EMC_CDB_CNTL_3 */
1420                         0x00000001, /* EMC_QRST */
1421                         0x00000014, /* EMC_QSAFE */
1422                         0x00000018, /* EMC_RDV */
1423                         0x0000001a, /* EMC_RDV_MASK */
1424                         0x000017e2, /* EMC_REFRESH */
1425                         0x00000000, /* EMC_BURST_REFRESH_NUM */
1426                         0x000005f8, /* EMC_PRE_REFRESH_REQ_CNT */
1427                         0x00000003, /* EMC_PDEX2WR */
1428                         0x00000011, /* EMC_PDEX2RD */
1429                         0x00000001, /* EMC_PCHG2PDEN */
1430                         0x00000000, /* EMC_ACT2PDEN */
1431                         0x000000c7, /* EMC_AR2PDEN */
1432                         0x00000018, /* EMC_RW2PDEN */
1433                         0x000000d7, /* EMC_TXSR */
1434                         0x00000200, /* EMC_TXSRDLL */
1435                         0x00000005, /* EMC_TCKE */
1436                         0x00000006, /* EMC_TCKESR */
1437                         0x00000005, /* EMC_TPD */
1438                         0x0000001d, /* EMC_TFAW */
1439                         0x00000000, /* EMC_TRPAB */
1440                         0x00000008, /* EMC_TCLKSTABLE */
1441                         0x00000008, /* EMC_TCLKSTOP */
1442                         0x00001822, /* EMC_TREFBW */
1443                         0x00000000, /* EMC_FBIO_CFG6 */
1444                         0x00000000, /* EMC_ODT_WRITE */
1445                         0x00000000, /* EMC_ODT_READ */
1446                         0x104ab098, /* EMC_FBIO_CFG5 */
1447                         0xe00700b1, /* EMC_CFG_DIG_DLL */
1448                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1449                         0x00000008, /* EMC_DLL_XFORM_DQS0 */
1450                         0x00000008, /* EMC_DLL_XFORM_DQS1 */
1451                         0x00000008, /* EMC_DLL_XFORM_DQS2 */
1452                         0x00000008, /* EMC_DLL_XFORM_DQS3 */
1453                         0x00000008, /* EMC_DLL_XFORM_DQS4 */
1454                         0x00000008, /* EMC_DLL_XFORM_DQS5 */
1455                         0x00000008, /* EMC_DLL_XFORM_DQS6 */
1456                         0x00000008, /* EMC_DLL_XFORM_DQS7 */
1457                         0x00000008, /* EMC_DLL_XFORM_DQS8 */
1458                         0x00000008, /* EMC_DLL_XFORM_DQS9 */
1459                         0x00000008, /* EMC_DLL_XFORM_DQS10 */
1460                         0x00000008, /* EMC_DLL_XFORM_DQS11 */
1461                         0x00000008, /* EMC_DLL_XFORM_DQS12 */
1462                         0x00000008, /* EMC_DLL_XFORM_DQS13 */
1463                         0x00000008, /* EMC_DLL_XFORM_DQS14 */
1464                         0x00000008, /* EMC_DLL_XFORM_DQS15 */
1465                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1466                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1467                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1468                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1469                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
1470                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
1471                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
1472                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
1473                         0x00034000, /* EMC_DLL_XFORM_ADDR0 */
1474                         0x00034000, /* EMC_DLL_XFORM_ADDR1 */
1475                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
1476                         0x00034000, /* EMC_DLL_XFORM_ADDR3 */
1477                         0x00034000, /* EMC_DLL_XFORM_ADDR4 */
1478                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
1479                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
1480                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
1481                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
1482                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
1483                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
1484                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
1485                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
1486                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
1487                         0x00000005, /* EMC_DLI_TRIM_TXDQS0 */
1488                         0x00000005, /* EMC_DLI_TRIM_TXDQS1 */
1489                         0x00000005, /* EMC_DLI_TRIM_TXDQS2 */
1490                         0x00000005, /* EMC_DLI_TRIM_TXDQS3 */
1491                         0x00000005, /* EMC_DLI_TRIM_TXDQS4 */
1492                         0x00000005, /* EMC_DLI_TRIM_TXDQS5 */
1493                         0x00000005, /* EMC_DLI_TRIM_TXDQS6 */
1494                         0x00000005, /* EMC_DLI_TRIM_TXDQS7 */
1495                         0x00000005, /* EMC_DLI_TRIM_TXDQS8 */
1496                         0x00000005, /* EMC_DLI_TRIM_TXDQS9 */
1497                         0x00000005, /* EMC_DLI_TRIM_TXDQS10 */
1498                         0x00000005, /* EMC_DLI_TRIM_TXDQS11 */
1499                         0x00000005, /* EMC_DLI_TRIM_TXDQS12 */
1500                         0x00000005, /* EMC_DLI_TRIM_TXDQS13 */
1501                         0x00000005, /* EMC_DLI_TRIM_TXDQS14 */
1502                         0x00000005, /* EMC_DLI_TRIM_TXDQS15 */
1503                         0x0000000a, /* EMC_DLL_XFORM_DQ0 */
1504                         0x0000000a, /* EMC_DLL_XFORM_DQ1 */
1505                         0x0000000a, /* EMC_DLL_XFORM_DQ2 */
1506                         0x0000000a, /* EMC_DLL_XFORM_DQ3 */
1507                         0x0000000a, /* EMC_DLL_XFORM_DQ4 */
1508                         0x0000000a, /* EMC_DLL_XFORM_DQ5 */
1509                         0x0000000a, /* EMC_DLL_XFORM_DQ6 */
1510                         0x0000000a, /* EMC_DLL_XFORM_DQ7 */
1511                         0x100002a0, /* EMC_XM2CMDPADCTRL */
1512                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
1513                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
1514                         0x0120113d, /* EMC_XM2DQSPADCTRL2 */
1515                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1516                         0x00000000, /* EMC_XM2DQPADCTRL3 */
1517                         0x77ffc085, /* EMC_XM2CLKPADCTRL */
1518                         0x00000000, /* EMC_XM2CLKPADCTRL2 */
1519                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
1520                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
1521                         0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
1522                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
1523                         0x61861820, /* EMC_XM2DQSPADCTRL3 */
1524                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
1525                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
1526                         0x61861800, /* EMC_XM2DQSPADCTRL6 */
1527                         0x0606003f, /* EMC_DSR_VTTGEN_DRV */
1528                         0x00000000, /* EMC_TXDSRVTTGEN */
1529                         0x00000000, /* EMC_FBIO_SPARE */
1530                         0x00020000, /* EMC_ZCAL_INTERVAL */
1531                         0x00000100, /* EMC_ZCAL_WAIT_CNT */
1532                         0x00f7000e, /* EMC_MRS_WAIT_CNT */
1533                         0x00f7000e, /* EMC_MRS_WAIT_CNT2 */
1534                         0x00000000, /* EMC_CTT */
1535                         0x00000004, /* EMC_CTT_DURATION */
1536                         0x00004080, /* EMC_CFG_PIPE */
1537                         0x80003012, /* EMC_DYN_SELF_REF_CONTROL */
1538                         0x0000000f, /* EMC_QPOP */
1539                         0x0e00000b, /* MC_EMEM_ARB_CFG */
1540                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1541                         0x00000004, /* MC_EMEM_ARB_TIMING_RCD */
1542                         0x00000005, /* MC_EMEM_ARB_TIMING_RP */
1543                         0x00000013, /* MC_EMEM_ARB_TIMING_RC */
1544                         0x0000000c, /* MC_EMEM_ARB_TIMING_RAS */
1545                         0x0000000f, /* MC_EMEM_ARB_TIMING_FAW */
1546                         0x00000002, /* MC_EMEM_ARB_TIMING_RRD */
1547                         0x00000003, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1548                         0x0000000c, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1549                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
1550                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
1551                         0x00000006, /* MC_EMEM_ARB_TIMING_R2W */
1552                         0x00000008, /* MC_EMEM_ARB_TIMING_W2R */
1553                         0x08060202, /* MC_EMEM_ARB_DA_TURNS */
1554                         0x00170e13, /* MC_EMEM_ARB_DA_COVERS */
1555                         0x736c2414, /* MC_EMEM_ARB_MISC0 */
1556                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1557                 },
1558                 {
1559                         0x00000013, /* MC_MLL_MPCORER_PTSA_RATE */
1560                         0x0000017c, /* MC_PTSA_GRANT_DECREMENT */
1561                         0x00810038, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
1562                         0x00810038, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
1563                         0x0081003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
1564                         0x00810090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
1565                         0x00810041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
1566                         0x00810090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
1567                         0x00810041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
1568                         0x00270049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
1569                         0x00810080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
1570                         0x00810004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
1571                         0x00810004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
1572                         0x00080016, /* MC_LATENCY_ALLOWANCE_HC_0 */
1573                         0x00000081, /* MC_LATENCY_ALLOWANCE_HC_1 */
1574                         0x00810004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
1575                         0x00810019, /* MC_LATENCY_ALLOWANCE_GPU_0 */
1576                         0x00810018, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
1577                         0x00810024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
1578                         0x0081001c, /* MC_LATENCY_ALLOWANCE_VIC_0 */
1579                         0x00000081, /* MC_LATENCY_ALLOWANCE_VI2_0 */
1580                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
1581                         0x00810081, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
1582                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
1583                         0x00810081, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
1584                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
1585                         0x00510029, /* MC_LATENCY_ALLOWANCE_VDE_1 */
1586                         0x00810081, /* MC_LATENCY_ALLOWANCE_VDE_2 */
1587                         0x00810081, /* MC_LATENCY_ALLOWANCE_VDE_3 */
1588                         0x00810065, /* MC_LATENCY_ALLOWANCE_SATA_0 */
1589                         0x0081001c, /* MC_LATENCY_ALLOWANCE_AFI_0 */
1590                 },
1591                 0x00000042, /* EMC_ZCAL_WAIT_CNT after clock change */
1592                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1593                 0x00000802, /* EMC_CTT_TERM_CTRL */
1594                 0x73300000, /* EMC_CFG */
1595                 0x0000089d, /* EMC_CFG_2 */
1596                 0x00040000, /* EMC_SEL_DPD_CTRL */
1597                 0xe0070069, /* EMC_CFG_DIG_DLL */
1598                 0x00000000, /* EMC_BGBIAS_CTL0 */
1599                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
1600                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
1601                 0xa1430000, /* EMC_AUTO_CAL_CONFIG */
1602                 0x80000d71, /* Mode Register 0 */
1603                 0x80100002, /* Mode Register 1 */
1604                 0x80200018, /* Mode Register 2 */
1605                 0x00000000, /* Mode Register 4 */
1606                 1200,       /* expected dvfs latency (ns) */
1607         },
1608         {
1609                 0x18,       /* V5.0.12 */
1610                 "03_924000_06_V5.0.12_V0.9", /* DVFS table version */
1611                 923000,     /* SDRAM frequency */
1612                 1010,       /* min voltage */
1613                 1100,       /* gpu min voltage */
1614                 "pllm_ud",  /* clock source id */
1615                 0x80000000, /* CLK_SOURCE_EMC */
1616                 164,        /* number of burst_regs */
1617                 31,         /* number of up_down_regs */
1618                 {
1619                         0x0000002b, /* EMC_RC */
1620                         0x000000f0, /* EMC_RFC */
1621                         0x00000000, /* EMC_RFC_SLR */
1622                         0x0000001e, /* EMC_RAS */
1623                         0x0000000b, /* EMC_RP */
1624                         0x00000009, /* EMC_R2W */
1625                         0x0000000f, /* EMC_W2R */
1626                         0x00000005, /* EMC_R2P */
1627                         0x00000016, /* EMC_W2P */
1628                         0x0000000b, /* EMC_RD_RCD */
1629                         0x0000000b, /* EMC_WR_RCD */
1630                         0x00000004, /* EMC_RRD */
1631                         0x00000002, /* EMC_REXT */
1632                         0x00000000, /* EMC_WEXT */
1633                         0x00000007, /* EMC_WDV */
1634                         0x00000007, /* EMC_WDV_MASK */
1635                         0x0000000d, /* EMC_QUSE */
1636                         0x00000002, /* EMC_QUSE_WIDTH */
1637                         0x00000000, /* EMC_IBDLY */
1638                         0x00000002, /* EMC_EINPUT */
1639                         0x0000000f, /* EMC_EINPUT_DURATION */
1640                         0x000a0000, /* EMC_PUTERM_EXTRA */
1641                         0x00000004, /* EMC_PUTERM_WIDTH */
1642                         0x00000000, /* EMC_PUTERM_ADJ */
1643                         0x00000000, /* EMC_CDB_CNTL_1 */
1644                         0x00000000, /* EMC_CDB_CNTL_2 */
1645                         0x00000000, /* EMC_CDB_CNTL_3 */
1646                         0x00000001, /* EMC_QRST */
1647                         0x00000016, /* EMC_QSAFE */
1648                         0x0000001a, /* EMC_RDV */
1649                         0x0000001c, /* EMC_RDV_MASK */
1650                         0x00001be7, /* EMC_REFRESH */
1651                         0x00000000, /* EMC_BURST_REFRESH_NUM */
1652                         0x000006f9, /* EMC_PRE_REFRESH_REQ_CNT */
1653                         0x00000004, /* EMC_PDEX2WR */
1654                         0x00000015, /* EMC_PDEX2RD */
1655                         0x00000001, /* EMC_PCHG2PDEN */
1656                         0x00000000, /* EMC_ACT2PDEN */
1657                         0x000000e7, /* EMC_AR2PDEN */
1658                         0x0000001b, /* EMC_RW2PDEN */
1659                         0x000000fb, /* EMC_TXSR */
1660                         0x00000200, /* EMC_TXSRDLL */
1661                         0x00000006, /* EMC_TCKE */
1662                         0x00000007, /* EMC_TCKESR */
1663                         0x00000006, /* EMC_TPD */
1664                         0x00000022, /* EMC_TFAW */
1665                         0x00000000, /* EMC_TRPAB */
1666                         0x0000000a, /* EMC_TCLKSTABLE */
1667                         0x0000000a, /* EMC_TCLKSTOP */
1668                         0x00001c28, /* EMC_TREFBW */
1669                         0x00000000, /* EMC_FBIO_CFG6 */
1670                         0x00000000, /* EMC_ODT_WRITE */
1671                         0x00000000, /* EMC_ODT_READ */
1672                         0x104ab898, /* EMC_FBIO_CFG5 */
1673                         0xe00400b1, /* EMC_CFG_DIG_DLL */
1674                         0x00008000, /* EMC_CFG_DIG_DLL_PERIOD */
1675                         0x007f800a, /* EMC_DLL_XFORM_DQS0 */
1676                         0x007f800a, /* EMC_DLL_XFORM_DQS1 */
1677                         0x007f800a, /* EMC_DLL_XFORM_DQS2 */
1678                         0x007f800a, /* EMC_DLL_XFORM_DQS3 */
1679                         0x007f800a, /* EMC_DLL_XFORM_DQS4 */
1680                         0x007f800a, /* EMC_DLL_XFORM_DQS5 */
1681                         0x007f800a, /* EMC_DLL_XFORM_DQS6 */
1682                         0x007f800a, /* EMC_DLL_XFORM_DQS7 */
1683                         0x007f800a, /* EMC_DLL_XFORM_DQS8 */
1684                         0x007f800a, /* EMC_DLL_XFORM_DQS9 */
1685                         0x007f800a, /* EMC_DLL_XFORM_DQS10 */
1686                         0x007f800a, /* EMC_DLL_XFORM_DQS11 */
1687                         0x007f800a, /* EMC_DLL_XFORM_DQS12 */
1688                         0x007f800a, /* EMC_DLL_XFORM_DQS13 */
1689                         0x007f800a, /* EMC_DLL_XFORM_DQS14 */
1690                         0x007f800a, /* EMC_DLL_XFORM_DQS15 */
1691                         0x00000000, /* EMC_DLL_XFORM_QUSE0 */
1692                         0x00000000, /* EMC_DLL_XFORM_QUSE1 */
1693                         0x00000000, /* EMC_DLL_XFORM_QUSE2 */
1694                         0x00000000, /* EMC_DLL_XFORM_QUSE3 */
1695                         0x00000000, /* EMC_DLL_XFORM_QUSE4 */
1696                         0x00000000, /* EMC_DLL_XFORM_QUSE5 */
1697                         0x00000000, /* EMC_DLL_XFORM_QUSE6 */
1698                         0x00000000, /* EMC_DLL_XFORM_QUSE7 */
1699                         0x0002c000, /* EMC_DLL_XFORM_ADDR0 */
1700                         0x0002c000, /* EMC_DLL_XFORM_ADDR1 */
1701                         0x00000000, /* EMC_DLL_XFORM_ADDR2 */
1702                         0x0002c000, /* EMC_DLL_XFORM_ADDR3 */
1703                         0x0002c000, /* EMC_DLL_XFORM_ADDR4 */
1704                         0x00000000, /* EMC_DLL_XFORM_ADDR5 */
1705                         0x00000000, /* EMC_DLL_XFORM_QUSE8 */
1706                         0x00000000, /* EMC_DLL_XFORM_QUSE9 */
1707                         0x00000000, /* EMC_DLL_XFORM_QUSE10 */
1708                         0x00000000, /* EMC_DLL_XFORM_QUSE11 */
1709                         0x00000000, /* EMC_DLL_XFORM_QUSE12 */
1710                         0x00000000, /* EMC_DLL_XFORM_QUSE13 */
1711                         0x00000000, /* EMC_DLL_XFORM_QUSE14 */
1712                         0x00000000, /* EMC_DLL_XFORM_QUSE15 */
1713                         0x00000005, /* EMC_DLI_TRIM_TXDQS0 */
1714                         0x00000005, /* EMC_DLI_TRIM_TXDQS1 */
1715                         0x00000005, /* EMC_DLI_TRIM_TXDQS2 */
1716                         0x00000005, /* EMC_DLI_TRIM_TXDQS3 */
1717                         0x00000005, /* EMC_DLI_TRIM_TXDQS4 */
1718                         0x00000005, /* EMC_DLI_TRIM_TXDQS5 */
1719                         0x00000005, /* EMC_DLI_TRIM_TXDQS6 */
1720                         0x00000005, /* EMC_DLI_TRIM_TXDQS7 */
1721                         0x00000005, /* EMC_DLI_TRIM_TXDQS8 */
1722                         0x00000005, /* EMC_DLI_TRIM_TXDQS9 */
1723                         0x00000005, /* EMC_DLI_TRIM_TXDQS10 */
1724                         0x00000005, /* EMC_DLI_TRIM_TXDQS11 */
1725                         0x00000005, /* EMC_DLI_TRIM_TXDQS12 */
1726                         0x00000005, /* EMC_DLI_TRIM_TXDQS13 */
1727                         0x00000005, /* EMC_DLI_TRIM_TXDQS14 */
1728                         0x00000005, /* EMC_DLI_TRIM_TXDQS15 */
1729                         0x00000008, /* EMC_DLL_XFORM_DQ0 */
1730                         0x00000008, /* EMC_DLL_XFORM_DQ1 */
1731                         0x00000008, /* EMC_DLL_XFORM_DQ2 */
1732                         0x00000008, /* EMC_DLL_XFORM_DQ3 */
1733                         0x00000008, /* EMC_DLL_XFORM_DQ4 */
1734                         0x00000008, /* EMC_DLL_XFORM_DQ5 */
1735                         0x00000008, /* EMC_DLL_XFORM_DQ6 */
1736                         0x00000008, /* EMC_DLL_XFORM_DQ7 */
1737                         0x100002a0, /* EMC_XM2CMDPADCTRL */
1738                         0x00000000, /* EMC_XM2CMDPADCTRL4 */
1739                         0x00111111, /* EMC_XM2CMDPADCTRL5 */
1740                         0x0120113d, /* EMC_XM2DQSPADCTRL2 */
1741                         0x00000000, /* EMC_XM2DQPADCTRL2 */
1742                         0x00000000, /* EMC_XM2DQPADCTRL3 */
1743                         0x77ffc085, /* EMC_XM2CLKPADCTRL */
1744                         0x00000000, /* EMC_XM2CLKPADCTRL2 */
1745                         0x81f1f108, /* EMC_XM2COMPPADCTRL */
1746                         0x07070004, /* EMC_XM2VTTGENPADCTRL */
1747                         0x00000000, /* EMC_XM2VTTGENPADCTRL2 */
1748                         0x016eeeee, /* EMC_XM2VTTGENPADCTRL3 */
1749                         0x5d75d720, /* EMC_XM2DQSPADCTRL3 */
1750                         0x00514514, /* EMC_XM2DQSPADCTRL4 */
1751                         0x00514514, /* EMC_XM2DQSPADCTRL5 */
1752                         0x5d75d700, /* EMC_XM2DQSPADCTRL6 */
1753                         0x0606003f, /* EMC_DSR_VTTGEN_DRV */
1754                         0x00000000, /* EMC_TXDSRVTTGEN */
1755                         0x00000000, /* EMC_FBIO_SPARE */
1756                         0x00020000, /* EMC_ZCAL_INTERVAL */
1757                         0x00000128, /* EMC_ZCAL_WAIT_CNT */
1758                         0x00cd000e, /* EMC_MRS_WAIT_CNT */
1759                         0x00cd000e, /* EMC_MRS_WAIT_CNT2 */
1760                         0x00000000, /* EMC_CTT */
1761                         0x00000004, /* EMC_CTT_DURATION */
1762                         0x00004080, /* EMC_CFG_PIPE */
1763                         0x800037ea, /* EMC_DYN_SELF_REF_CONTROL */
1764                         0x00000011, /* EMC_QPOP */
1765                         0x0e00000d, /* MC_EMEM_ARB_CFG */
1766                         0x80000040, /* MC_EMEM_ARB_OUTSTANDING_REQ */
1767                         0x00000005, /* MC_EMEM_ARB_TIMING_RCD */
1768                         0x00000006, /* MC_EMEM_ARB_TIMING_RP */
1769                         0x00000016, /* MC_EMEM_ARB_TIMING_RC */
1770                         0x0000000e, /* MC_EMEM_ARB_TIMING_RAS */
1771                         0x00000011, /* MC_EMEM_ARB_TIMING_FAW */
1772                         0x00000002, /* MC_EMEM_ARB_TIMING_RRD */
1773                         0x00000004, /* MC_EMEM_ARB_TIMING_RAP2PRE */
1774                         0x0000000e, /* MC_EMEM_ARB_TIMING_WAP2PRE */
1775                         0x00000002, /* MC_EMEM_ARB_TIMING_R2R */
1776                         0x00000002, /* MC_EMEM_ARB_TIMING_W2W */
1777                         0x00000006, /* MC_EMEM_ARB_TIMING_R2W */
1778                         0x00000009, /* MC_EMEM_ARB_TIMING_W2R */
1779                         0x09060202, /* MC_EMEM_ARB_DA_TURNS */
1780                         0x001a1016, /* MC_EMEM_ARB_DA_COVERS */
1781                         0x734e2a17, /* MC_EMEM_ARB_MISC0 */
1782                         0x001f0000, /* MC_EMEM_ARB_RING1_THROTTLE */
1783                 },
1784                 {
1785                         0x00000017, /* MC_MLL_MPCORER_PTSA_RATE */
1786                         0x000001bb, /* MC_PTSA_GRANT_DECREMENT */
1787                         0x006e0038, /* MC_LATENCY_ALLOWANCE_XUSB_0 */
1788                         0x006e0038, /* MC_LATENCY_ALLOWANCE_XUSB_1 */
1789                         0x006e003c, /* MC_LATENCY_ALLOWANCE_TSEC_0 */
1790                         0x006e0090, /* MC_LATENCY_ALLOWANCE_SDMMCA_0 */
1791                         0x006e0041, /* MC_LATENCY_ALLOWANCE_SDMMCAA_0 */
1792                         0x006e0090, /* MC_LATENCY_ALLOWANCE_SDMMC_0 */
1793                         0x006e0041, /* MC_LATENCY_ALLOWANCE_SDMMCAB_0 */
1794                         0x00270049, /* MC_LATENCY_ALLOWANCE_PPCS_0 */
1795                         0x006e0080, /* MC_LATENCY_ALLOWANCE_PPCS_1 */
1796                         0x006e0004, /* MC_LATENCY_ALLOWANCE_MPCORE_0 */
1797                         0x006e0004, /* MC_LATENCY_ALLOWANCE_MPCORELP_0 */
1798                         0x00080016, /* MC_LATENCY_ALLOWANCE_HC_0 */
1799                         0x0000006e, /* MC_LATENCY_ALLOWANCE_HC_1 */
1800                         0x006e0004, /* MC_LATENCY_ALLOWANCE_AVPC_0 */
1801                         0x006e0019, /* MC_LATENCY_ALLOWANCE_GPU_0 */
1802                         0x006e0018, /* MC_LATENCY_ALLOWANCE_MSENC_0 */
1803                         0x006e0024, /* MC_LATENCY_ALLOWANCE_HDA_0 */
1804                         0x006e001b, /* MC_LATENCY_ALLOWANCE_VIC_0 */
1805                         0x0000006e, /* MC_LATENCY_ALLOWANCE_VI2_0 */
1806                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2_0 */
1807                         0x006e006e, /* MC_LATENCY_ALLOWANCE_ISP2_1 */
1808                         0x00000036, /* MC_LATENCY_ALLOWANCE_ISP2B_0 */
1809                         0x006e006e, /* MC_LATENCY_ALLOWANCE_ISP2B_1 */
1810                         0x00d400ff, /* MC_LATENCY_ALLOWANCE_VDE_0 */
1811                         0x00510029, /* MC_LATENCY_ALLOWANCE_VDE_1 */
1812                         0x006e006e, /* MC_LATENCY_ALLOWANCE_VDE_2 */
1813                         0x006e006e, /* MC_LATENCY_ALLOWANCE_VDE_3 */
1814                         0x006e0065, /* MC_LATENCY_ALLOWANCE_SATA_0 */
1815                         0x006e001c, /* MC_LATENCY_ALLOWANCE_AFI_0 */
1816                 },
1817                 0x0000004c, /* EMC_ZCAL_WAIT_CNT after clock change */
1818                 0x001fffff, /* EMC_AUTO_CAL_INTERVAL */
1819                 0x00000802, /* EMC_CTT_TERM_CTRL */
1820                 0x73300000, /* EMC_CFG */
1821                 0x0000089d, /* EMC_CFG_2 */
1822                 0x00040000, /* EMC_SEL_DPD_CTRL */
1823                 0xe0040069, /* EMC_CFG_DIG_DLL */
1824                 0x00000000, /* EMC_BGBIAS_CTL0 */
1825                 0x00000000, /* EMC_AUTO_CAL_CONFIG2 */
1826                 0x00000000, /* EMC_AUTO_CAL_CONFIG3 */
1827                 0xa1430303, /* EMC_AUTO_CAL_CONFIG */
1828                 0x80000f15, /* Mode Register 0 */
1829                 0x80100002, /* Mode Register 1 */
1830                 0x80200020, /* Mode Register 2 */
1831                 0x00000000, /* Mode Register 4 */
1832                 1180,       /* expected dvfs latency (ns) */
1833         },
1834 };
1835
1836 static struct tegra21_emc_pdata t210_emc_pdata_granada = {
1837         .description = "ardbeg_emc_tables",
1838         .tables = t210_emc_table_granada,
1839         .num_tables = ARRAY_SIZE(t210_emc_table_granada),
1840 };
1841 #endif
1842
1843 int __init t210_emc_init(void)
1844 {
1845 #if TEGRA_DEBUG_EMC_DVFS_IN_KERNEL
1846         tegra_emc_device.dev.platform_data = &t210_emc_pdata_granada;
1847         platform_device_register(&tegra_emc_device);
1848 #endif
1849         tegra21_emc_init();
1850         return 0;
1851 }