clocksource: tegra210: use old timers
[linux-3.10.git] / arch / arm64 / boot / dts / tegra210.dtsi
1 /*
2  * arch/arm64/boot/dts/tegra210.dtsi
3  *
4  * Copyright (c) 2013-2014, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; version 2 of the License.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  *
19  */
20
21 / {
22         compatible = "nvidia,tegra210";
23         interrupt-parent = <&intc>;
24         #address-cells = <2>;
25         #size-cells = <2>;
26
27         aliases {
28                 i2c0 = &i2c1;
29                 i2c1 = &i2c2;
30                 i2c2 = &i2c3;
31                 i2c3 = &i2c4;
32                 i2c4 = &i2c5;
33                 i2c5 = &i2c6;
34                 spi0 = &spi0;
35                 spi1 = &spi1;
36                 spi2 = &spi2;
37                 spi3 = &spi3;
38                 serial2 = &uartc;
39         };
40
41         cpus {
42                 #address-cells = <2>;
43                 #size-cells = <0>;
44
45                 cpu@0 {
46                         device_type = "cpu";
47                         compatible = "arm,cortex-a57-64bit", "arm,armv8";
48                         reg = <0x0 0x0>;
49                         enable-method = "psci";
50                 };
51
52                 cpu@1 {
53                         device_type = "cpu";
54                         compatible = "arm,cortex-a57-64bit", "arm,armv8";
55                         reg = <0x0 0x1>;
56                         enable-method = "psci";
57                 };
58
59                 cpu@2 {
60                         device_type = "cpu";
61                         compatible = "arm,cortex-a57-64bit", "arm,armv8";
62                         reg = <0x0 0x2>;
63                         enable-method = "psci";
64                 };
65
66                 cpu@3 {
67                         device_type = "cpu";
68                         compatible = "arm,cortex-a57-64bit", "arm,armv8";
69                         reg = <0x0 0x3>;
70                         enable-method = "psci";
71                 };
72         };
73
74         psci {
75                 compatible = "arm,psci";
76                 method = "smc";
77                 cpu_off = <0x84000002>;
78                 cpu_on = <0xC4000003>;
79                 cpu_suspend = <0xC4000001>;
80         };
81
82         mc {
83                 compatible = "nvidia,tegra-mc";
84
85                 reg-ranges = <10>; /* Per channel. */
86                 reg = <0x0 0x70019000 0x0 0x00c>,
87                       <0x0 0x70019050 0x0 0x19c>,
88                       <0x0 0x70019200 0x0 0x024>,
89                       <0x0 0x7001929c 0x0 0x1b8>,
90                       <0x0 0x70019464 0x0 0x198>,
91                       <0x0 0x70019604 0x0 0x3b0>,
92                       <0x0 0x700199bc 0x0 0x020>,
93                       <0x0 0x700199f8 0x0 0x08c>,
94                       <0x0 0x70019ae4 0x0 0x0b0>,
95                       <0x0 0x70019ba0 0x0 0x460>,
96
97                       /* MC0 */
98                       <0x0 0x7001c000 0x0 0x00c>,
99                       <0x0 0x7001c050 0x0 0x198>,
100                       <0x0 0x7001c200 0x0 0x024>,
101                       <0x0 0x7001c29c 0x0 0x1b8>,
102                       <0x0 0x7001c464 0x0 0x198>,
103                       <0x0 0x7001c604 0x0 0x3b0>,
104                       <0x0 0x7001c9bc 0x0 0x020>,
105                       <0x0 0x7001c9f8 0x0 0x08c>,
106                       <0x0 0x7001cae4 0x0 0x0b0>,
107                       <0x0 0x7001cba0 0x0 0x460>,
108
109                       /* MC1 */
110                       <0x0 0x7001d000 0x0 0x00c>,
111                       <0x0 0x7001d050 0x0 0x198>,
112                       <0x0 0x7001d200 0x0 0x024>,
113                       <0x0 0x7001d29c 0x0 0x1b8>,
114                       <0x0 0x7001d464 0x0 0x198>,
115                       <0x0 0x7001d604 0x0 0x3b0>,
116                       <0x0 0x7001d9bc 0x0 0x020>,
117                       <0x0 0x7001d9f8 0x0 0x08c>,
118                       <0x0 0x7001dae4 0x0 0x0b0>,
119                       <0x0 0x7001dba0 0x0 0x460>;
120
121                 interrupts = <0 77 0x4>;
122                 int_count  = <8>;
123                 int_mask   = <0x23D40>;
124
125                 channels = <2>;
126         };
127
128         intc: interrupt-controller {
129                 compatible = "arm,cortex-a15-gic";
130                 #interrupt-cells = <3>;
131                 interrupt-controller;
132                 reg = <0x0 0x50041000 0x0 0x1000
133                        0x0 0x50042000 0x0 0x0100>;
134         };
135
136         lic: interrupt-controller@60004000 {
137                 compatible = "nvidia,tegra-gic";
138                 interrupt-controller;
139                 reg = <0x0 0x60004000 0x0 0x40>,
140                       <0x0 0x60004100 0x0 0x40>,
141                       <0x0 0x60004200 0x0 0x40>,
142                       <0x0 0x60004300 0x0 0x40>,
143                       <0x0 0x60004400 0x0 0x40>,
144                       <0x0 0x60004500 0x0 0x40>;
145         };
146
147 /* The interrupt controller parser does not support the */
148 /* property "status", hence is commented                */
149 /*                                                      */
150 /*      agic-controller {                               */
151 /*              compatible = "nvidia,tegra210-agic";    */
152 /*              interrupt-controller;                   */
153 /*              no-gic-extension;                       */
154 /*              not-per-cpu;                            */
155 /*              reg = <0x0 0x702f9000 0x0 0x2000>,      */
156 /*                    <0x0 0x702fa000 0x0 0x2000>;      */
157 /*              interrupts = <0 102 0xf04>;             */
158 /*      };                                              */
159
160         timer@60005000 {
161                 compatible = "nvidia,tegra210-timer";
162                 reg = <0x0 0x60005000 0x0 0x400>;
163                 interrupts = <0 41 4>,
164                              <0 42 4>,
165                              <0 121 4>,
166                              <0 152 4>;
167                 clock-frequency = <38400000>;
168         };
169
170         apbdma: dma@60020000 {
171                 compatible = "nvidia,tegra124-apbdma";
172                 reg = <0x0 0x60020000 0x0 0x1400>;
173                 interrupts = <0 104 0x04
174                               0 105 0x04
175                               0 106 0x04
176                               0 107 0x04
177                               0 108 0x04
178                               0 109 0x04
179                               0 110 0x04
180                               0 111 0x04
181                               0 112 0x04
182                               0 113 0x04
183                               0 114 0x04
184                               0 115 0x04
185                               0 116 0x04
186                               0 117 0x04
187                               0 118 0x04
188                               0 119 0x04
189                               0 128 0x04
190                               0 129 0x04
191                               0 130 0x04
192                               0 131 0x04
193                               0 132 0x04
194                               0 133 0x04
195                               0 134 0x04
196                               0 135 0x04
197                               0 136 0x04
198                               0 137 0x04
199                               0 138 0x04
200                               0 139 0x04
201                               0 140 0x04
202                               0 141 0x04
203                               0 142 0x04
204                               0 143 0x04>;
205                 #dma-cells = <1>;
206         };
207
208         pinmux: pinmux {
209                 compatible = "nvidia,tegra210-pinmux";
210                 reg = <0x0 0x700008d4 0x0 0x299    /* Pad control registers */
211                        0x0 0x70003000 0x0 0x290>; /* Mux registers */
212                 status = "okay";
213         };
214
215         gpio: gpio@6000d000 {
216                 compatible = "nvidia,tegra210-gpio", "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
217                 reg = <0x0 0x6000d000 0x0 0x1000>;
218                 interrupts = <0 32 0x04
219                                 0 33 0x04
220                                 0 34 0x04
221                                 0 35 0x04
222                                 0 55 0x04
223                                 0 87 0x04
224                                 0 89 0x04
225                                 0 125 0x04>;
226                 #gpio-cells = <2>;
227                 gpio-controller;
228                 #interrupt-cells = <2>;
229                 interrupt-controller;
230         };
231
232         uarta: serial@70006000 {
233                 compatible = "nvidia,tegra210-uart";
234                 reg = <0x0 0x70006000 0x0 0x40>;
235                 reg-shift = <2>;
236                 interrupts = <0 36 0x04>;
237                 nvidia,memory-clients = <14>;
238         };
239
240         uartb: serial@70006040 {
241                 compatible = "nvidia,tegra210-uart";
242                 reg = <0x0 0x70006040 0x0 0x40>;
243                 reg-shift = <2>;
244                 interrupts = <0 37 0x04>;
245                 nvidia,memory-clients = <14>;
246         };
247
248         uartc: serial@70006200 {
249                 compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
250                 reg = <0x0 0x70006200 0x0 0x40>;
251                 reg-shift = <2>;
252                 interrupts = <0 46 0x04>;
253                 nvidia,dma-request-selector = <&apbdma 10>;
254                 nvidia,memory-clients = <14>;
255                 dmas = <&apbdma 10>, <&apbdma 10>;
256                 dma-names = "rx", "tx";
257                 status = "disabled";
258         };
259
260         spi0: spi@7000d400 {
261                 compatible = "nvidia,tegra210-spi";
262                 reg = <0x0 0x7000d400 0x0 0x200>;
263                 interrupts = <0 59 0x04>;
264                 nvidia,dma-request-selector = <&apbdma 15>;
265                 nvidia,memory-clients = <14>;
266                 #address-cells = <1>;
267                 #size-cells = <0>;
268                 dmas = <&apbdma 15>, <&apbdma 15>;
269                 dma-names = "rx", "tx";
270                 status = "disabled";
271         };
272
273         spi1: spi@7000d600 {
274                 compatible = "nvidia,tegra210-spi";
275                 reg = <0x0 0x7000d600 0x0 0x200>;
276                 interrupts = <0 82 0x04>;
277                 nvidia,dma-request-selector = <&apbdma 16>;
278                 nvidia,memory-clients = <14>;
279                 #address-cells = <1>;
280                 #size-cells = <0>;
281                 dmas = <&apbdma 16>, <&apbdma 16>;
282                 dma-names = "rx", "tx";
283                 status = "disabled";
284         };
285
286         spi2: spi@7000d800 {
287                 compatible = "nvidia,tegra210-spi";
288                 reg = <0x0 0x7000d800 0x0 0x200>;
289                 interrupts = <0 83 0x04>;
290                 nvidia,dma-request-selector = <&apbdma 17>;
291                 nvidia,memory-clients = <14>;
292                 #address-cells = <1>;
293                 #size-cells = <0>;
294                 dmas = <&apbdma 17>, <&apbdma 17>;
295                 dma-names = "rx", "tx";
296                 status = "disabled";
297         };
298
299         spi3: spi@7000da00 {
300                 compatible = "nvidia,tegra210-spi";
301                 reg = <0x0 0x7000da00 0x0 0x200>;
302                 interrupts = <0 93 0x04>;
303                 nvidia,dma-request-selector = <&apbdma 18>;
304                 nvidia,memory-clients = <14>;
305                 #address-cells = <1>;
306                 #size-cells = <0>;
307                 dmas = <&apbdma 18>, <&apbdma 18>;
308                 dma-names = "rx", "tx";
309                 status = "disabled";
310         };
311
312         host1x: host1x {
313                 compatible = "nvidia,tegra210-host1x", "simple-bus";
314                 reg = <0x0 0x50000000 0x0 0x00034000>;
315                 interrupts = <0 65 0x04   /* mpcore syncpt */
316                               0 67 0x04>; /* mpcore general */
317                 nvidia,memory-clients = <6>;
318
319                 #address-cells = <1>;
320                 #size-cells = <1>;
321
322                 ranges;
323
324                 vi {
325                         compatible = "nvidia,tegra210-vi";
326                         reg = <0x54080000 0x00040000>;
327                         interrupts = <0 69 0x04>;
328                         nvidia,memory-clients = <18>;
329                 };
330
331                 isp@54600000 {
332                         compatible = "nvidia,tegra210-isp";
333                         reg = <0x54600000 0x00040000>;
334                         interrupts = <0 71 0x04>;
335                         nvidia,memory-clients = <8>;
336                 };
337
338                 isp@54680000 {
339                         compatible = "nvidia,tegra210-isp";
340                         reg = <0x54680000 0x00040000>;
341                         interrupts = <0 72 0x04>;
342                         nvidia,memory-clients = <29>;
343                 };
344
345                 vic {
346                         compatible = "nvidia,tegra210-vic";
347                         reg = <0x54340000 0x00040000>;
348                         nvidia,memory-clients = <19>;
349                 };
350
351                 nvenc {
352                         compatible = "nvidia,tegra210-nvenc";
353                         reg = <0x544c0000 0x00040000>;
354                         nvidia,memory-clients = <11>;
355                 };
356
357                 tsec {
358                         compatible = "nvidia,tegra210-tsec";
359                         reg = <0x54500000 0x00040000>;
360                         nvidia,memory-clients = <23>;
361                 };
362
363                 tsecb {
364                         compatible = "nvidia,tegra210-tsec";
365                         reg = <0x54100000 0x00040000>;
366                         nvidia,memory-clients = <41>;
367                 };
368
369                 nvdec {
370                         compatible = "nvidia,tegra210-nvdec";
371                         reg = <0x54480000 0x00040000>;
372                         nvidia,memory-clients = <33>;
373                 };
374
375                 nvjpg {
376                         compatible = "nvidia,tegra210-nvjpg";
377                         reg = <0x54380000 0x00040000>;
378                         nvidia,memory-clients = <36>;
379                 };
380
381         };
382
383         gm20b {
384                 compatible = "nvidia,tegra210-gm20b";
385                 nvidia,host1x = <&host1x>;
386                 reg = <0x0 0x57000000 0x0 0x01000000>,
387                     <0x0 0x58000000 0x0 0x01000000>,
388                     <0x0 0x538f0000 0x0 0x00001000>;
389                     interrupts = <0 157 0x04
390                             0 158 0x04>;
391                 nvidia,memory-clients = <30 31>;
392         };
393
394         pmc {
395                 compatible = "nvidia,tegra210-pmc";
396                 reg = <0x0 0x7000e400 0x0 0x400>;
397         };
398
399         adma: dma@702e2000 {
400                 compatible = "nvidia,tegra210-adma";
401                 reg = <0x0 0x702e2000 0x0 0x2000>;
402                 interrupts = <0 24 0x04
403                               0 25 0x04
404                               0 26 0x04
405                               0 27 0x04
406                               0 28 0x04
407                               0 29 0x04
408                               0 30 0x04
409                               0 31 0x04
410                               0 32 0x04
411                               0 33 0x04
412                               0 34 0x04
413                               0 35 0x04
414                               0 36 0x04
415                               0 37 0x04
416                               0 38 0x04
417                               0 39 0x04
418                               0 40 0x04
419                               0 41 0x04
420                               0 42 0x04
421                               0 43 0x04
422                               0 44 0x04
423                               0 45 0x04>;
424                         #dma-cells = <1>;
425         };
426
427         se: se@70012000 {
428                 compatible = "nvidia,tegra210-se";
429                 reg = <0x0 0x70012000 0x0 0x2000 /* SE base */
430                         0x0 0x7000e400 0x0 0x400>; /* PMC base */
431                 interrupts = <0 58 0x04>;
432         };
433
434         tegra_axbar: ahub {
435                 compatible = "nvidia,tegra210-axbar";
436                 reg = <0x0 0x702d0800 0x0 0x800>;
437                 status = "disabled";
438
439                 #address-cells = <1>;
440                 #size-cells = <1>;
441                 ranges = <0x702d0000 0x0 0x702d0000 0x00010000>;
442
443                 tegra_admaif: admaif@0x702d0000 {
444                         compatible = "nvidia,tegra210-admaif";
445                         reg = <0x702d0000 0x800>;
446                         status = "disabled";
447                 };
448
449                 ope@702d8000 {
450                         compatible = "nvidia,tegra210-ope";
451                         reg = <0x702d8000 0x100>;
452                         nvidia,ahub-ope-id = <0>;
453                         status = "disabled";
454
455                         #address-cells = <1>;
456                         #size-cells = <1>;
457                         ranges;
458
459                         peq@702d8100 {
460                                 compatible = "nvidia,tegra210-peq";
461                                 reg = <0x702d8100 0x100>;
462                                 nvidia,ahub-peq-id = <0>;
463                                 status = "disabled";
464                         };
465                         mbdrc@702d8200 {
466                                 compatible = "nvidia,tegra210-mbdrc";
467                                 reg = <0x702d8200 0x200>;
468                                 nvidia,ahub-mbdrc-id = <0>;
469                                 status = "disabled";
470                         };
471                 };
472
473                 ope@702d8400 {
474                         compatible = "nvidia,tegra210-ope";
475                         reg = <0x702d8400 0x100>;
476                         nvidia,ahub-ope-id = <1>;
477                         status = "disabled";
478
479                         #address-cells = <1>;
480                         #size-cells = <1>;
481                         ranges;
482
483                         peq@702d8500 {
484                                 compatible = "nvidia,tegra210-peq";
485                                 reg = <0x702d8500 0x100>;
486                                 nvidia,ahub-peq-id = <1>;
487                                 status = "disabled";
488                         };
489                         mbdrc@702d8600 {
490                                 compatible = "nvidia,tegra210-mbdrc";
491                                 reg = <0x702d8600 0x200>;
492                                 nvidia,ahub-mbdrc-id = <1>;
493                                 status = "disabled";
494                         };
495                 };
496
497                 tegra_sfc1: sfc@702d2000 {
498                         compatible = "nvidia,tegra210-sfc";
499                         reg = <0x702d2000 0x200>;
500                         nvidia,ahub-sfc-id = <0>;
501                         status = "disabled";
502                 };
503
504                 tegra_sfc2: sfc@702d2200 {
505                         compatible = "nvidia,tegra210-sfc";
506                         reg = <0x702d2200 0x200>;
507                         nvidia,ahub-sfc-id = <1>;
508                         status = "disabled";
509                 };
510
511                 tegra_sfc3: sfc@702d2400 {
512                         compatible = "nvidia,tegra210-sfc";
513                         reg = <0x702d2400 0x200>;
514                         nvidia,ahub-sfc-id = <2>;
515                         status = "disabled";
516                 };
517
518                 tegra_sfc4: sfc@702d2600 {
519                         compatible = "nvidia,tegra210-sfc";
520                         reg = <0x702d2600 0x200>;
521                         nvidia,ahub-sfc-id = <3>;
522                         status = "disabled";
523                 };
524
525                 spkprot@702d8c00 {
526                         compatible = "nvidia,tegra210-spkprot";
527                         reg = <0x702d8c00 0x400>;
528                         nvidia,ahub-spkprot-id = <0>;
529                         status = "disabled";
530                 };
531
532                 tegra_amixer: amixer@702dbb00 {
533                         compatible = "nvidia,tegra210-amixer";
534                         reg = <0x702dbb00 0x800>;
535                         nvidia,ahub-amixer-id = <0>;
536                         status = "disabled";
537                 };
538
539                 tegra_i2s1: i2s@702d1000 {
540                         compatible = "nvidia,tegra210-i2s";
541                         reg = <0x702d1000 0x100>;
542                         nvidia,ahub-i2s-id = <0>;
543                         status = "disabled";
544                 };
545
546                 tegra_i2s2: i2s@702d1100 {
547                         compatible = "nvidia,tegra210-i2s";
548                         reg = <0x702d1100 0x100>;
549                         nvidia,ahub-i2s-id = <1>;
550                         status = "disabled";
551                 };
552
553                 tegra_i2s3: i2s@702d1200 {
554                         compatible = "nvidia,tegra210-i2s";
555                         reg = <0x702d1200 0x100>;
556                         nvidia,ahub-i2s-id = <2>;
557                         status = "disabled";
558                 };
559
560                 tegra_i2s4: i2s@702d1300 {
561                         compatible = "nvidia,tegra210-i2s";
562                         reg = <0x702d1300 0x100>;
563                         nvidia,ahub-i2s-id = <3>;
564                         status = "disabled";
565                 };
566
567                 tegra_i2s5: i2s@702d1400 {
568                         compatible = "nvidia,tegra210-i2s";
569                         reg = <0x702d1400 0x100>;
570                         nvidia,ahub-i2s-id = <4>;
571                         status = "disabled";
572                 };
573
574                 tegra_amx1: amx@702d3000 {
575                         compatible = "nvidia,tegra210-amx";
576                         reg = <0x702d3000 0x100>;
577                         nvidia,ahub-amx-id = <0>;
578                         status = "disabled";
579                 };
580
581                 tegra_amx2: amx@702d3100 {
582                         compatible = "nvidia,tegra210-amx";
583                         reg = <0x702d3100 0x100>;
584                         nvidia,ahub-amx-id = <1>;
585                         status = "disabled";
586                 };
587
588                 tegra_adx1: adx@702d3800 {
589                         compatible = "nvidia,tegra210-adx";
590                         reg = <0x702d3800 0x100>;
591                         nvidia,ahub-adx-id = <0>;
592                         status = "disabled";
593                 };
594
595                 tegra_adx2: adx@702d3900 {
596                         compatible = "nvidia,tegra210-adx";
597                         reg = <0x702d3900 0x100>;
598                         nvidia,ahub-adx-id = <1>;
599                         status = "disabled";
600                 };
601
602                 dmic@702d4000 {
603                         compatible = "nvidia,tegra210-dmic";
604                         reg = <0x702d4000 0x100>;
605                         nvidia,ahub-dmic-id = <0>;
606                         status = "disabled";
607                 };
608
609                 dmic@702d4100 {
610                         compatible = "nvidia,tegra210-dmic";
611                         reg = <0x702d4100 0x100>;
612                         nvidia,ahub-dmic-id = <1>;
613                         status = "disabled";
614                 };
615
616                 dmic@702d4200 {
617                         compatible = "nvidia,tegra210-dmic";
618                         reg = <0x702d4200 0x100>;
619                         nvidia,ahub-dmic-id = <2>;
620                         status = "disabled";
621                 };
622
623                 tegra_afc1: afc@702d7000 {
624                         compatible = "nvidia,tegra210-afc";
625                         reg = <0x702d7000 0x100>;
626                         nvidia,ahub-afc-id = <0>;
627                         status = "disabled";
628                 };
629
630                 tegra_afc2: afc@702d7100 {
631                         compatible = "nvidia,tegra210-afc";
632                         reg = <0x702d7100 0x100>;
633                         nvidia,ahub-afc-id = <1>;
634                         status = "disabled";
635                 };
636
637                 tegra_afc3: afc@702d7200 {
638                         compatible = "nvidia,tegra210-afc";
639                         reg = <0x702d7200 0x100>;
640                         nvidia,ahub-afc-id = <2>;
641                         status = "disabled";
642                 };
643
644                 tegra_afc4: afc@702d7300 {
645                         compatible = "nvidia,tegra210-afc";
646                         reg = <0x702d7300 0x100>;
647                         nvidia,ahub-afc-id = <3>;
648                         status = "disabled";
649                 };
650
651                 tegra_afc5: afc@702d7400 {
652                         compatible = "nvidia,tegra210-afc";
653                         reg = <0x702d7400 0x100>;
654                         nvidia,ahub-afc-id = <4>;
655                         status = "disabled";
656                 };
657
658                 tegra_afc6: afc@702d7500 {
659                         compatible = "nvidia,tegra210-afc";
660                         reg = <0x702d7500 0x100>;
661                         nvidia,ahub-afc-id = <5>;
662                         status = "disabled";
663                 };
664
665                 tegra_mvc1: mvc@702da000 {
666                         compatible = "nvidia,tegra210-mvc";
667                         reg = <0x702da000 0x200>;
668                         nvidia,ahub-mvc-id = <0>;
669                         status = "disabled";
670                 };
671
672                 tegra_mvc2: mvc@702da200 {
673                         compatible = "nvidia,tegra210-mvc";
674                         reg = <0x702da200 0x200>;
675                         nvidia,ahub-mvc-id = <1>;
676                         status = "disabled";
677                 };
678
679                 tegra_spdif: spdif@702d6000 {
680                         compatible = "nvidia,tegra210-spdif";
681                         reg = <0x702d6000 0x200>;
682                         nvidia,ahub-spdif-id = <0>;
683                         status = "disabled";
684                 };
685
686 };
687
688         adsp {
689              compatible = "nvidia,tegra210-adsp";
690              reg = <0x0 0x702ef000 0x0 0x1000>, /* AMC */
691                    <0x0 0x702ec000 0x0 0x2000>; /* AMISC */
692              nvidia,memory-clients = <34>;
693              status = "disabled";
694         };
695
696         pcie-controller {
697                 compatible = "nvidia,tegra210-pcie", "nvidia,tegra124-pcie";
698                 status = "disabled";
699         };
700
701         i2c1: i2c@7000c000 {
702                 #address-cells = <1>;
703                 #size-cells = <0>;
704                 compatible = "nvidia,tegra210-i2c";
705                 reg = <0x0 0x7000c000 0x0 0x100>;
706                 interrupts = <0 38 0x04>;
707                 nvidia,memory-clients = <14>;
708                 status = "okay";
709                 clock-frequency = <400000>;
710         };
711
712         i2c2: i2c@7000c400 {
713                 #address-cells = <1>;
714                 #size-cells = <0>;
715                 compatible = "nvidia,tegra210-i2c";
716                 reg = <0x0 0x7000c400 0x0 0x100>;
717                 interrupts = <0 84 0x04>;
718                 nvidia,memory-clients = <14>;
719                 status = "okay";
720                 clock-frequency = <100000>;
721         };
722
723         i2c3: i2c@7000c500 {
724                 #address-cells = <1>;
725                 #size-cells = <0>;
726                 compatible = "nvidia,tegra210-i2c";
727                 reg = <0x0 0x7000c500 0x0 0x100>;
728                 interrupts = <0 92 0x04>;
729                 nvidia,memory-clients = <14>;
730                 status = "okay";
731                 clock-frequency = <400000>;
732         };
733
734         i2c4: i2c@7000c700 {
735                 #address-cells = <1>;
736                 #size-cells = <0>;
737                 compatible = "nvidia,tegra210-i2c";
738                 reg = <0x0 0x7000c700 0x0 0x100>;
739                 interrupts = <0 120 0x04>;
740                 nvidia,memory-clients = <14>;
741                 status = "okay";
742                 clock-frequency = <100000>;
743         };
744
745         i2c5: i2c@7000d000 {
746                 #address-cells = <1>;
747                 #size-cells = <0>;
748                 compatible = "nvidia,tegra210-i2c";
749                 reg = <0x0 0x7000d000 0x0 0x100>;
750                 interrupts = <0 53 0x04>;
751                 nvidia,require-cldvfs-clock;
752                 nvidia,memory-clients = <14>;
753                 status = "okay";
754                 clock-frequency = <400000>;
755         };
756
757         i2c6: i2c@7000d100 {
758                 #address-cells = <1>;
759                 #size-cells = <0>;
760                 compatible = "nvidia,tegra210-i2c";
761                 reg = <0x0 0x7000d100 0x0 0x100>;
762                 interrupts = <0 63 0x04>;
763                 nvidia,memory-clients = <14>;
764                 status = "okay";
765                 clock-frequency = <400000>;
766         };
767
768         sdhci@700b0600 {
769                 compatible = "nvidia,tegra210-sdhci";
770                 reg = <0x0 0x700b0600 0x0 0x200>;
771                 interrupts = < 0 31 0x04 >;
772                 status = "disabled";
773         };
774
775         sdhci@700b0400 {
776                 compatible = "nvidia,tegra210-sdhci";
777                 reg = <0x0 0x700b0400 0x0 0x200>;
778                 interrupts = < 0 19 0x04 >;
779                 status = "disabled";
780         };
781
782         sdhci@700b0200 {
783                 compatible = "nvidia,tegra210-sdhci";
784                 reg = <0x0 0x700b0200 0x0 0x200>;
785                 interrupts = < 0 15 0x04 >;
786                 status = "disabled";
787         };
788
789         sdhci@700b0000 {
790                 compatible = "nvidia,tegra210-sdhci";
791                 reg = <0x0 0x700b0000 0x0 0x200>;
792                 interrupts = < 0 14 0x04 >;
793                 status = "disabled";
794         };
795
796         efuse@7000f800 {
797                 compatible = "nvidia,tegra210-efuse";
798                 reg = <0x0 0x7000f800 0x0 0x400>;
799         };
800 };