36440c899583b9131143e9fc30a54fb8b9be70ab
[linux-3.10.git] / arch / arm / mm / alignment.c
1 /*
2  *  linux/arch/arm/mm/alignment.c
3  *
4  *  Copyright (C) 1995  Linus Torvalds
5  *  Modifications for ARM processor (c) 1995-2001 Russell King
6  *  Thumb alignment fault fixups (c) 2004 MontaVista Software, Inc.
7  *  - Adapted from gdb/sim/arm/thumbemu.c -- Thumb instruction emulation.
8  *    Copyright (C) 1996, Cygnus Software Technologies Ltd.
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13  */
14 #include <linux/compiler.h>
15 #include <linux/kernel.h>
16 #include <linux/errno.h>
17 #include <linux/string.h>
18 #include <linux/proc_fs.h>
19 #include <linux/init.h>
20
21 #include <asm/uaccess.h>
22 #include <asm/unaligned.h>
23
24 #include "fault.h"
25
26 /*
27  * 32-bit misaligned trap handler (c) 1998 San Mehat (CCC) -July 1998
28  * /proc/sys/debug/alignment, modified and integrated into
29  * Linux 2.1 by Russell King
30  *
31  * Speed optimisations and better fault handling by Russell King.
32  *
33  * *** NOTE ***
34  * This code is not portable to processors with late data abort handling.
35  */
36 #define CODING_BITS(i)  (i & 0x0e000000)
37
38 #define LDST_I_BIT(i)   (i & (1 << 26))         /* Immediate constant   */
39 #define LDST_P_BIT(i)   (i & (1 << 24))         /* Preindex             */
40 #define LDST_U_BIT(i)   (i & (1 << 23))         /* Add offset           */
41 #define LDST_W_BIT(i)   (i & (1 << 21))         /* Writeback            */
42 #define LDST_L_BIT(i)   (i & (1 << 20))         /* Load                 */
43
44 #define LDST_P_EQ_U(i)  ((((i) ^ ((i) >> 1)) & (1 << 23)) == 0)
45
46 #define LDSTHD_I_BIT(i) (i & (1 << 22))         /* double/half-word immed */
47 #define LDM_S_BIT(i)    (i & (1 << 22))         /* write CPSR from SPSR */
48
49 #define RN_BITS(i)      ((i >> 16) & 15)        /* Rn                   */
50 #define RD_BITS(i)      ((i >> 12) & 15)        /* Rd                   */
51 #define RM_BITS(i)      (i & 15)                /* Rm                   */
52
53 #define REGMASK_BITS(i) (i & 0xffff)
54 #define OFFSET_BITS(i)  (i & 0x0fff)
55
56 #define IS_SHIFT(i)     (i & 0x0ff0)
57 #define SHIFT_BITS(i)   ((i >> 7) & 0x1f)
58 #define SHIFT_TYPE(i)   (i & 0x60)
59 #define SHIFT_LSL       0x00
60 #define SHIFT_LSR       0x20
61 #define SHIFT_ASR       0x40
62 #define SHIFT_RORRRX    0x60
63
64 static unsigned long ai_user;
65 static unsigned long ai_sys;
66 static unsigned long ai_skipped;
67 static unsigned long ai_half;
68 static unsigned long ai_word;
69 static unsigned long ai_dword;
70 static unsigned long ai_multi;
71 static int ai_usermode;
72
73 #ifdef CONFIG_PROC_FS
74 static const char *usermode_action[] = {
75         "ignored",
76         "warn",
77         "fixup",
78         "fixup+warn",
79         "signal",
80         "signal+warn"
81 };
82
83 static int
84 proc_alignment_read(char *page, char **start, off_t off, int count, int *eof,
85                     void *data)
86 {
87         char *p = page;
88         int len;
89
90         p += sprintf(p, "User:\t\t%lu\n", ai_user);
91         p += sprintf(p, "System:\t\t%lu\n", ai_sys);
92         p += sprintf(p, "Skipped:\t%lu\n", ai_skipped);
93         p += sprintf(p, "Half:\t\t%lu\n", ai_half);
94         p += sprintf(p, "Word:\t\t%lu\n", ai_word);
95         if (cpu_architecture() >= CPU_ARCH_ARMv5TE)
96                 p += sprintf(p, "DWord:\t\t%lu\n", ai_dword);
97         p += sprintf(p, "Multi:\t\t%lu\n", ai_multi);
98         p += sprintf(p, "User faults:\t%i (%s)\n", ai_usermode,
99                         usermode_action[ai_usermode]);
100
101         len = (p - page) - off;
102         if (len < 0)
103                 len = 0;
104
105         *eof = (len <= count) ? 1 : 0;
106         *start = page + off;
107
108         return len;
109 }
110
111 static int proc_alignment_write(struct file *file, const char __user *buffer,
112                                 unsigned long count, void *data)
113 {
114         char mode;
115
116         if (count > 0) {
117                 if (get_user(mode, buffer))
118                         return -EFAULT;
119                 if (mode >= '0' && mode <= '5')
120                         ai_usermode = mode - '0';
121         }
122         return count;
123 }
124
125 #endif /* CONFIG_PROC_FS */
126
127 union offset_union {
128         unsigned long un;
129           signed long sn;
130 };
131
132 #define TYPE_ERROR      0
133 #define TYPE_FAULT      1
134 #define TYPE_LDST       2
135 #define TYPE_DONE       3
136
137 #ifdef __ARMEB__
138 #define BE              1
139 #define FIRST_BYTE_16   "mov    %1, %1, ror #8\n"
140 #define FIRST_BYTE_32   "mov    %1, %1, ror #24\n"
141 #define NEXT_BYTE       "ror #24"
142 #else
143 #define BE              0
144 #define FIRST_BYTE_16
145 #define FIRST_BYTE_32
146 #define NEXT_BYTE       "lsr #8"
147 #endif
148
149 #define __get8_unaligned_check(ins,val,addr,err)        \
150         __asm__(                                        \
151         "1:     "ins"   %1, [%2], #1\n"                 \
152         "2:\n"                                          \
153         "       .section .fixup,\"ax\"\n"               \
154         "       .align  2\n"                            \
155         "3:     mov     %0, #1\n"                       \
156         "       b       2b\n"                           \
157         "       .previous\n"                            \
158         "       .section __ex_table,\"a\"\n"            \
159         "       .align  3\n"                            \
160         "       .long   1b, 3b\n"                       \
161         "       .previous\n"                            \
162         : "=r" (err), "=&r" (val), "=r" (addr)          \
163         : "0" (err), "2" (addr))
164
165 #define __get16_unaligned_check(ins,val,addr)                   \
166         do {                                                    \
167                 unsigned int err = 0, v, a = addr;              \
168                 __get8_unaligned_check(ins,v,a,err);            \
169                 val =  v << ((BE) ? 8 : 0);                     \
170                 __get8_unaligned_check(ins,v,a,err);            \
171                 val |= v << ((BE) ? 0 : 8);                     \
172                 if (err)                                        \
173                         goto fault;                             \
174         } while (0)
175
176 #define get16_unaligned_check(val,addr) \
177         __get16_unaligned_check("ldrb",val,addr)
178
179 #define get16t_unaligned_check(val,addr) \
180         __get16_unaligned_check("ldrbt",val,addr)
181
182 #define __get32_unaligned_check(ins,val,addr)                   \
183         do {                                                    \
184                 unsigned int err = 0, v, a = addr;              \
185                 __get8_unaligned_check(ins,v,a,err);            \
186                 val =  v << ((BE) ? 24 :  0);                   \
187                 __get8_unaligned_check(ins,v,a,err);            \
188                 val |= v << ((BE) ? 16 :  8);                   \
189                 __get8_unaligned_check(ins,v,a,err);            \
190                 val |= v << ((BE) ?  8 : 16);                   \
191                 __get8_unaligned_check(ins,v,a,err);            \
192                 val |= v << ((BE) ?  0 : 24);                   \
193                 if (err)                                        \
194                         goto fault;                             \
195         } while (0)
196
197 #define get32_unaligned_check(val,addr) \
198         __get32_unaligned_check("ldrb",val,addr)
199
200 #define get32t_unaligned_check(val,addr) \
201         __get32_unaligned_check("ldrbt",val,addr)
202
203 #define __put16_unaligned_check(ins,val,addr)                   \
204         do {                                                    \
205                 unsigned int err = 0, v = val, a = addr;        \
206                 __asm__( FIRST_BYTE_16                          \
207                 "1:     "ins"   %1, [%2], #1\n"                 \
208                 "       mov     %1, %1, "NEXT_BYTE"\n"          \
209                 "2:     "ins"   %1, [%2]\n"                     \
210                 "3:\n"                                          \
211                 "       .section .fixup,\"ax\"\n"               \
212                 "       .align  2\n"                            \
213                 "4:     mov     %0, #1\n"                       \
214                 "       b       3b\n"                           \
215                 "       .previous\n"                            \
216                 "       .section __ex_table,\"a\"\n"            \
217                 "       .align  3\n"                            \
218                 "       .long   1b, 4b\n"                       \
219                 "       .long   2b, 4b\n"                       \
220                 "       .previous\n"                            \
221                 : "=r" (err), "=&r" (v), "=&r" (a)              \
222                 : "0" (err), "1" (v), "2" (a));                 \
223                 if (err)                                        \
224                         goto fault;                             \
225         } while (0)
226
227 #define put16_unaligned_check(val,addr)  \
228         __put16_unaligned_check("strb",val,addr)
229
230 #define put16t_unaligned_check(val,addr) \
231         __put16_unaligned_check("strbt",val,addr)
232
233 #define __put32_unaligned_check(ins,val,addr)                   \
234         do {                                                    \
235                 unsigned int err = 0, v = val, a = addr;        \
236                 __asm__( FIRST_BYTE_32                          \
237                 "1:     "ins"   %1, [%2], #1\n"                 \
238                 "       mov     %1, %1, "NEXT_BYTE"\n"          \
239                 "2:     "ins"   %1, [%2], #1\n"                 \
240                 "       mov     %1, %1, "NEXT_BYTE"\n"          \
241                 "3:     "ins"   %1, [%2], #1\n"                 \
242                 "       mov     %1, %1, "NEXT_BYTE"\n"          \
243                 "4:     "ins"   %1, [%2]\n"                     \
244                 "5:\n"                                          \
245                 "       .section .fixup,\"ax\"\n"               \
246                 "       .align  2\n"                            \
247                 "6:     mov     %0, #1\n"                       \
248                 "       b       5b\n"                           \
249                 "       .previous\n"                            \
250                 "       .section __ex_table,\"a\"\n"            \
251                 "       .align  3\n"                            \
252                 "       .long   1b, 6b\n"                       \
253                 "       .long   2b, 6b\n"                       \
254                 "       .long   3b, 6b\n"                       \
255                 "       .long   4b, 6b\n"                       \
256                 "       .previous\n"                            \
257                 : "=r" (err), "=&r" (v), "=&r" (a)              \
258                 : "0" (err), "1" (v), "2" (a));                 \
259                 if (err)                                        \
260                         goto fault;                             \
261         } while (0)
262
263 #define put32_unaligned_check(val,addr) \
264         __put32_unaligned_check("strb", val, addr)
265
266 #define put32t_unaligned_check(val,addr) \
267         __put32_unaligned_check("strbt", val, addr)
268
269 static void
270 do_alignment_finish_ldst(unsigned long addr, unsigned long instr, struct pt_regs *regs, union offset_union offset)
271 {
272         if (!LDST_U_BIT(instr))
273                 offset.un = -offset.un;
274
275         if (!LDST_P_BIT(instr))
276                 addr += offset.un;
277
278         if (!LDST_P_BIT(instr) || LDST_W_BIT(instr))
279                 regs->uregs[RN_BITS(instr)] = addr;
280 }
281
282 static int
283 do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *regs)
284 {
285         unsigned int rd = RD_BITS(instr);
286
287         ai_half += 1;
288
289         if (user_mode(regs))
290                 goto user;
291
292         if (LDST_L_BIT(instr)) {
293                 unsigned long val;
294                 get16_unaligned_check(val, addr);
295
296                 /* signed half-word? */
297                 if (instr & 0x40)
298                         val = (signed long)((signed short) val);
299
300                 regs->uregs[rd] = val;
301         } else
302                 put16_unaligned_check(regs->uregs[rd], addr);
303
304         return TYPE_LDST;
305
306  user:
307         if (LDST_L_BIT(instr)) {
308                 unsigned long val;
309                 get16t_unaligned_check(val, addr);
310
311                 /* signed half-word? */
312                 if (instr & 0x40)
313                         val = (signed long)((signed short) val);
314
315                 regs->uregs[rd] = val;
316         } else
317                 put16t_unaligned_check(regs->uregs[rd], addr);
318
319         return TYPE_LDST;
320
321  fault:
322         return TYPE_FAULT;
323 }
324
325 static int
326 do_alignment_ldrdstrd(unsigned long addr, unsigned long instr,
327                       struct pt_regs *regs)
328 {
329         unsigned int rd = RD_BITS(instr);
330
331         if (((rd & 1) == 1) || (rd == 14))
332                 goto bad;
333
334         ai_dword += 1;
335
336         if (user_mode(regs))
337                 goto user;
338
339         if ((instr & 0xf0) == 0xd0) {
340                 unsigned long val;
341                 get32_unaligned_check(val, addr);
342                 regs->uregs[rd] = val;
343                 get32_unaligned_check(val, addr + 4);
344                 regs->uregs[rd + 1] = val;
345         } else {
346                 put32_unaligned_check(regs->uregs[rd], addr);
347                 put32_unaligned_check(regs->uregs[rd + 1], addr + 4);
348         }
349
350         return TYPE_LDST;
351
352  user:
353         if ((instr & 0xf0) == 0xd0) {
354                 unsigned long val;
355                 get32t_unaligned_check(val, addr);
356                 regs->uregs[rd] = val;
357                 get32t_unaligned_check(val, addr + 4);
358                 regs->uregs[rd + 1] = val;
359         } else {
360                 put32t_unaligned_check(regs->uregs[rd], addr);
361                 put32t_unaligned_check(regs->uregs[rd + 1], addr + 4);
362         }
363
364         return TYPE_LDST;
365  bad:
366         return TYPE_ERROR;
367  fault:
368         return TYPE_FAULT;
369 }
370
371 static int
372 do_alignment_ldrstr(unsigned long addr, unsigned long instr, struct pt_regs *regs)
373 {
374         unsigned int rd = RD_BITS(instr);
375
376         ai_word += 1;
377
378         if ((!LDST_P_BIT(instr) && LDST_W_BIT(instr)) || user_mode(regs))
379                 goto trans;
380
381         if (LDST_L_BIT(instr)) {
382                 unsigned int val;
383                 get32_unaligned_check(val, addr);
384                 regs->uregs[rd] = val;
385         } else
386                 put32_unaligned_check(regs->uregs[rd], addr);
387         return TYPE_LDST;
388
389  trans:
390         if (LDST_L_BIT(instr)) {
391                 unsigned int val;
392                 get32t_unaligned_check(val, addr);
393                 regs->uregs[rd] = val;
394         } else
395                 put32t_unaligned_check(regs->uregs[rd], addr);
396         return TYPE_LDST;
397
398  fault:
399         return TYPE_FAULT;
400 }
401
402 /*
403  * LDM/STM alignment handler.
404  *
405  * There are 4 variants of this instruction:
406  *
407  * B = rn pointer before instruction, A = rn pointer after instruction
408  *              ------ increasing address ----->
409  *              |    | r0 | r1 | ... | rx |    |
410  * PU = 01             B                    A
411  * PU = 11        B                    A
412  * PU = 00        A                    B
413  * PU = 10             A                    B
414  */
415 static int
416 do_alignment_ldmstm(unsigned long addr, unsigned long instr, struct pt_regs *regs)
417 {
418         unsigned int rd, rn, correction, nr_regs, regbits;
419         unsigned long eaddr, newaddr;
420
421         if (LDM_S_BIT(instr))
422                 goto bad;
423
424         correction = 4; /* processor implementation defined */
425         regs->ARM_pc += correction;
426
427         ai_multi += 1;
428
429         /* count the number of registers in the mask to be transferred */
430         nr_regs = hweight16(REGMASK_BITS(instr)) * 4;
431
432         rn = RN_BITS(instr);
433         newaddr = eaddr = regs->uregs[rn];
434
435         if (!LDST_U_BIT(instr))
436                 nr_regs = -nr_regs;
437         newaddr += nr_regs;
438         if (!LDST_U_BIT(instr))
439                 eaddr = newaddr;
440
441         if (LDST_P_EQ_U(instr)) /* U = P */
442                 eaddr += 4;
443
444         /*
445          * For alignment faults on the ARM922T/ARM920T the MMU  makes
446          * the FSR (and hence addr) equal to the updated base address
447          * of the multiple access rather than the restored value.
448          * Switch this message off if we've got a ARM92[02], otherwise
449          * [ls]dm alignment faults are noisy!
450          */
451 #if !(defined CONFIG_CPU_ARM922T)  && !(defined CONFIG_CPU_ARM920T)
452         /*
453          * This is a "hint" - we already have eaddr worked out by the
454          * processor for us.
455          */
456         if (addr != eaddr) {
457                 printk(KERN_ERR "LDMSTM: PC = %08lx, instr = %08lx, "
458                         "addr = %08lx, eaddr = %08lx\n",
459                          instruction_pointer(regs), instr, addr, eaddr);
460                 show_regs(regs);
461         }
462 #endif
463
464         if (user_mode(regs)) {
465                 for (regbits = REGMASK_BITS(instr), rd = 0; regbits;
466                      regbits >>= 1, rd += 1)
467                         if (regbits & 1) {
468                                 if (LDST_L_BIT(instr)) {
469                                         unsigned int val;
470                                         get32t_unaligned_check(val, eaddr);
471                                         regs->uregs[rd] = val;
472                                 } else
473                                         put32t_unaligned_check(regs->uregs[rd], eaddr);
474                                 eaddr += 4;
475                         }
476         } else {
477                 for (regbits = REGMASK_BITS(instr), rd = 0; regbits;
478                      regbits >>= 1, rd += 1)
479                         if (regbits & 1) {
480                                 if (LDST_L_BIT(instr)) {
481                                         unsigned int val;
482                                         get32_unaligned_check(val, eaddr);
483                                         regs->uregs[rd] = val;
484                                 } else
485                                         put32_unaligned_check(regs->uregs[rd], eaddr);
486                                 eaddr += 4;
487                         }
488         }
489
490         if (LDST_W_BIT(instr))
491                 regs->uregs[rn] = newaddr;
492         if (!LDST_L_BIT(instr) || !(REGMASK_BITS(instr) & (1 << 15)))
493                 regs->ARM_pc -= correction;
494         return TYPE_DONE;
495
496 fault:
497         regs->ARM_pc -= correction;
498         return TYPE_FAULT;
499
500 bad:
501         printk(KERN_ERR "Alignment trap: not handling ldm with s-bit set\n");
502         return TYPE_ERROR;
503 }
504
505 /*
506  * Convert Thumb ld/st instruction forms to equivalent ARM instructions so
507  * we can reuse ARM userland alignment fault fixups for Thumb.
508  *
509  * This implementation was initially based on the algorithm found in
510  * gdb/sim/arm/thumbemu.c. It is basically just a code reduction of same
511  * to convert only Thumb ld/st instruction forms to equivalent ARM forms.
512  *
513  * NOTES:
514  * 1. Comments below refer to ARM ARM DDI0100E Thumb Instruction sections.
515  * 2. If for some reason we're passed an non-ld/st Thumb instruction to
516  *    decode, we return 0xdeadc0de. This should never happen under normal
517  *    circumstances but if it does, we've got other problems to deal with
518  *    elsewhere and we obviously can't fix those problems here.
519  */
520
521 static unsigned long
522 thumb2arm(u16 tinstr)
523 {
524         u32 L = (tinstr & (1<<11)) >> 11;
525
526         switch ((tinstr & 0xf800) >> 11) {
527         /* 6.5.1 Format 1: */
528         case 0x6000 >> 11:                              /* 7.1.52 STR(1) */
529         case 0x6800 >> 11:                              /* 7.1.26 LDR(1) */
530         case 0x7000 >> 11:                              /* 7.1.55 STRB(1) */
531         case 0x7800 >> 11:                              /* 7.1.30 LDRB(1) */
532                 return 0xe5800000 |
533                         ((tinstr & (1<<12)) << (22-12)) |       /* fixup */
534                         (L<<20) |                               /* L==1? */
535                         ((tinstr & (7<<0)) << (12-0)) |         /* Rd */
536                         ((tinstr & (7<<3)) << (16-3)) |         /* Rn */
537                         ((tinstr & (31<<6)) >>                  /* immed_5 */
538                                 (6 - ((tinstr & (1<<12)) ? 0 : 2)));
539         case 0x8000 >> 11:                              /* 7.1.57 STRH(1) */
540         case 0x8800 >> 11:                              /* 7.1.32 LDRH(1) */
541                 return 0xe1c000b0 |
542                         (L<<20) |                               /* L==1? */
543                         ((tinstr & (7<<0)) << (12-0)) |         /* Rd */
544                         ((tinstr & (7<<3)) << (16-3)) |         /* Rn */
545                         ((tinstr & (7<<6)) >> (6-1)) |   /* immed_5[2:0] */
546                         ((tinstr & (3<<9)) >> (9-8));    /* immed_5[4:3] */
547
548         /* 6.5.1 Format 2: */
549         case 0x5000 >> 11:
550         case 0x5800 >> 11:
551                 {
552                         static const u32 subset[8] = {
553                                 0xe7800000,             /* 7.1.53 STR(2) */
554                                 0xe18000b0,             /* 7.1.58 STRH(2) */
555                                 0xe7c00000,             /* 7.1.56 STRB(2) */
556                                 0xe19000d0,             /* 7.1.34 LDRSB */
557                                 0xe7900000,             /* 7.1.27 LDR(2) */
558                                 0xe19000b0,             /* 7.1.33 LDRH(2) */
559                                 0xe7d00000,             /* 7.1.31 LDRB(2) */
560                                 0xe19000f0              /* 7.1.35 LDRSH */
561                         };
562                         return subset[(tinstr & (7<<9)) >> 9] |
563                             ((tinstr & (7<<0)) << (12-0)) |     /* Rd */
564                             ((tinstr & (7<<3)) << (16-3)) |     /* Rn */
565                             ((tinstr & (7<<6)) >> (6-0));       /* Rm */
566                 }
567
568         /* 6.5.1 Format 3: */
569         case 0x4800 >> 11:                              /* 7.1.28 LDR(3) */
570                 /* NOTE: This case is not technically possible. We're
571                  *       loading 32-bit memory data via PC relative
572                  *       addressing mode. So we can and should eliminate
573                  *       this case. But I'll leave it here for now.
574                  */
575                 return 0xe59f0000 |
576                     ((tinstr & (7<<8)) << (12-8)) |             /* Rd */
577                     ((tinstr & 255) << (2-0));                  /* immed_8 */
578
579         /* 6.5.1 Format 4: */
580         case 0x9000 >> 11:                              /* 7.1.54 STR(3) */
581         case 0x9800 >> 11:                              /* 7.1.29 LDR(4) */
582                 return 0xe58d0000 |
583                         (L<<20) |                               /* L==1? */
584                         ((tinstr & (7<<8)) << (12-8)) |         /* Rd */
585                         ((tinstr & 255) << 2);                  /* immed_8 */
586
587         /* 6.6.1 Format 1: */
588         case 0xc000 >> 11:                              /* 7.1.51 STMIA */
589         case 0xc800 >> 11:                              /* 7.1.25 LDMIA */
590                 {
591                         u32 Rn = (tinstr & (7<<8)) >> 8;
592                         u32 W = ((L<<Rn) & (tinstr&255)) ? 0 : 1<<21;
593
594                         return 0xe8800000 | W | (L<<20) | (Rn<<16) |
595                                 (tinstr&255);
596                 }
597
598         /* 6.6.1 Format 2: */
599         case 0xb000 >> 11:                              /* 7.1.48 PUSH */
600         case 0xb800 >> 11:                              /* 7.1.47 POP */
601                 if ((tinstr & (3 << 9)) == 0x0400) {
602                         static const u32 subset[4] = {
603                                 0xe92d0000,     /* STMDB sp!,{registers} */
604                                 0xe92d4000,     /* STMDB sp!,{registers,lr} */
605                                 0xe8bd0000,     /* LDMIA sp!,{registers} */
606                                 0xe8bd8000      /* LDMIA sp!,{registers,pc} */
607                         };
608                         return subset[(L<<1) | ((tinstr & (1<<8)) >> 8)] |
609                             (tinstr & 255);             /* register_list */
610                 }
611                 /* Else fall through for illegal instruction case */
612
613         default:
614                 return 0xdeadc0de;
615         }
616 }
617
618 static int
619 do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
620 {
621         union offset_union offset;
622         unsigned long instr = 0, instrptr;
623         int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs);
624         unsigned int type;
625         mm_segment_t fs;
626         unsigned int fault;
627         u16 tinstr = 0;
628
629         instrptr = instruction_pointer(regs);
630
631         fs = get_fs();
632         set_fs(KERNEL_DS);
633         if thumb_mode(regs) {
634                 fault = __get_user(tinstr, (u16 *)(instrptr & ~1));
635                 if (!(fault))
636                         instr = thumb2arm(tinstr);
637         } else
638                 fault = __get_user(instr, (u32 *)instrptr);
639         set_fs(fs);
640
641         if (fault) {
642                 type = TYPE_FAULT;
643                 goto bad_or_fault;
644         }
645
646         if (user_mode(regs))
647                 goto user;
648
649         ai_sys += 1;
650
651  fixup:
652
653         regs->ARM_pc += thumb_mode(regs) ? 2 : 4;
654
655         switch (CODING_BITS(instr)) {
656         case 0x00000000:        /* 3.13.4 load/store instruction extensions */
657                 if (LDSTHD_I_BIT(instr))
658                         offset.un = (instr & 0xf00) >> 4 | (instr & 15);
659                 else
660                         offset.un = regs->uregs[RM_BITS(instr)];
661
662                 if ((instr & 0x000000f0) == 0x000000b0 || /* LDRH, STRH */
663                     (instr & 0x001000f0) == 0x001000f0)   /* LDRSH */
664                         handler = do_alignment_ldrhstrh;
665                 else if ((instr & 0x001000f0) == 0x000000d0 || /* LDRD */
666                          (instr & 0x001000f0) == 0x000000f0)   /* STRD */
667                         handler = do_alignment_ldrdstrd;
668                 else if ((instr & 0x01f00ff0) == 0x01000090) /* SWP */
669                         goto swp;
670                 else
671                         goto bad;
672                 break;
673
674         case 0x04000000:        /* ldr or str immediate */
675                 offset.un = OFFSET_BITS(instr);
676                 handler = do_alignment_ldrstr;
677                 break;
678
679         case 0x06000000:        /* ldr or str register */
680                 offset.un = regs->uregs[RM_BITS(instr)];
681
682                 if (IS_SHIFT(instr)) {
683                         unsigned int shiftval = SHIFT_BITS(instr);
684
685                         switch(SHIFT_TYPE(instr)) {
686                         case SHIFT_LSL:
687                                 offset.un <<= shiftval;
688                                 break;
689
690                         case SHIFT_LSR:
691                                 offset.un >>= shiftval;
692                                 break;
693
694                         case SHIFT_ASR:
695                                 offset.sn >>= shiftval;
696                                 break;
697
698                         case SHIFT_RORRRX:
699                                 if (shiftval == 0) {
700                                         offset.un >>= 1;
701                                         if (regs->ARM_cpsr & PSR_C_BIT)
702                                                 offset.un |= 1 << 31;
703                                 } else
704                                         offset.un = offset.un >> shiftval |
705                                                           offset.un << (32 - shiftval);
706                                 break;
707                         }
708                 }
709                 handler = do_alignment_ldrstr;
710                 break;
711
712         case 0x08000000:        /* ldm or stm */
713                 handler = do_alignment_ldmstm;
714                 break;
715
716         default:
717                 goto bad;
718         }
719
720         type = handler(addr, instr, regs);
721
722         if (type == TYPE_ERROR || type == TYPE_FAULT)
723                 goto bad_or_fault;
724
725         if (type == TYPE_LDST)
726                 do_alignment_finish_ldst(addr, instr, regs, offset);
727
728         return 0;
729
730  bad_or_fault:
731         if (type == TYPE_ERROR)
732                 goto bad;
733         regs->ARM_pc -= thumb_mode(regs) ? 2 : 4;
734         /*
735          * We got a fault - fix it up, or die.
736          */
737         do_bad_area(addr, fsr, regs);
738         return 0;
739
740  swp:
741         printk(KERN_ERR "Alignment trap: not handling swp instruction\n");
742
743  bad:
744         /*
745          * Oops, we didn't handle the instruction.
746          */
747         printk(KERN_ERR "Alignment trap: not handling instruction "
748                 "%0*lx at [<%08lx>]\n",
749                 thumb_mode(regs) ? 4 : 8,
750                 thumb_mode(regs) ? tinstr : instr, instrptr);
751         ai_skipped += 1;
752         return 1;
753
754  user:
755         ai_user += 1;
756
757         if (ai_usermode & 1)
758                 printk("Alignment trap: %s (%d) PC=0x%08lx Instr=0x%0*lx "
759                        "Address=0x%08lx FSR 0x%03x\n", current->comm,
760                         current->pid, instrptr,
761                         thumb_mode(regs) ? 4 : 8,
762                         thumb_mode(regs) ? tinstr : instr,
763                         addr, fsr);
764
765         if (ai_usermode & 2)
766                 goto fixup;
767
768         if (ai_usermode & 4)
769                 force_sig(SIGBUS, current);
770         else
771                 set_cr(cr_no_alignment);
772
773         return 0;
774 }
775
776 /*
777  * This needs to be done after sysctl_init, otherwise sys/ will be
778  * overwritten.  Actually, this shouldn't be in sys/ at all since
779  * it isn't a sysctl, and it doesn't contain sysctl information.
780  * We now locate it in /proc/cpu/alignment instead.
781  */
782 static int __init alignment_init(void)
783 {
784 #ifdef CONFIG_PROC_FS
785         struct proc_dir_entry *res;
786
787         res = proc_mkdir("cpu", NULL);
788         if (!res)
789                 return -ENOMEM;
790
791         res = create_proc_entry("alignment", S_IWUSR | S_IRUGO, res);
792         if (!res)
793                 return -ENOMEM;
794
795         res->read_proc = proc_alignment_read;
796         res->write_proc = proc_alignment_write;
797 #endif
798
799         hook_fault_code(1, do_alignment, SIGILL, "alignment exception");
800         hook_fault_code(3, do_alignment, SIGILL, "alignment exception");
801
802         return 0;
803 }
804
805 fs_initcall(alignment_init);