ARM: tegra: enable Ardbeg USB2 UHSIC PHY wakeup
[linux-3.10.git] / arch / arm / mach-tegra / wakeups-t12x.c
1 /*
2  * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  */
14
15 #include <linux/kernel.h>
16 #include <linux/gpio.h>
17 #include <linux/init.h>
18 #include <linux/io.h>
19
20 #include <mach/irqs.h>
21 #include <mach/gpio-tegra.h>
22
23 #include "gpio-names.h"
24 #include "iomap.h"
25
26 static int tegra_gpio_wakes[] = {
27         TEGRA_GPIO_PO5,                         /* wake0 */
28         TEGRA_GPIO_PV1,                         /* wake1 */
29         -EINVAL,                                /* wake2 */
30         TEGRA_GPIO_PB6,                         /* wake3 */
31         TEGRA_GPIO_PN7,                         /* wake4 */
32         -EINVAL,                                /* wake5 */
33         TEGRA_GPIO_PU5,                         /* wake6 */
34         TEGRA_GPIO_PU6,                         /* wake7 */
35         TEGRA_GPIO_PC7,                         /* wake8 */
36         TEGRA_GPIO_PS2,                         /* wake9 */
37         TEGRA_GPIO_PAA1,                        /* wake10 */
38         TEGRA_GPIO_PW3,                         /* wake11 */
39         TEGRA_GPIO_PW2,                         /* wake12 */
40         TEGRA_GPIO_PY6,                         /* wake13 */
41         TEGRA_GPIO_PDD3,                        /* wake14 */
42         TEGRA_GPIO_PJ2,                         /* wake15 */
43         -EINVAL,                                /* wake16 */
44         -EINVAL,                                /* wake17 */
45         -EINVAL,                                /* wake18 */
46         -EINVAL,                                /* wake19 */
47         -EINVAL,                                /* wake20 */
48         -EINVAL,                                /* wake21 */
49         -EINVAL,                                /* wake22 */
50         TEGRA_GPIO_PI5,                         /* wake23 */
51         TEGRA_GPIO_PV0,                         /* wake24 */
52         TEGRA_GPIO_PS4,                         /* wake25 */
53         TEGRA_GPIO_PS5,                         /* wake26 */
54         TEGRA_GPIO_PS0,                         /* wake27 */
55         TEGRA_GPIO_PS6,                         /* wake28 */
56         TEGRA_GPIO_PS7,                         /* wake29 */
57         TEGRA_GPIO_PN2,                         /* wake30 */
58         -EINVAL,                                /* wake31 */
59         TEGRA_GPIO_PO4,                         /* wake32 */
60         TEGRA_GPIO_PJ0,                         /* wake33 */
61         TEGRA_GPIO_PK2,                         /* wake34 */
62         TEGRA_GPIO_PI6,                         /* wake35 */
63         -EINVAL,                                /* wake36 */
64         -EINVAL,                                /* wake37 */
65         -EINVAL,                                /* wake38 */
66         -EINVAL,                                /* wake39 */
67         -EINVAL,                                /* wake40 */
68         -EINVAL,                                /* wake41 */
69         -EINVAL,                                /* wake42 */
70         -EINVAL,                                /* wake43 */
71         TEGRA_GPIO_PC5,                         /* wake44 */
72         TEGRA_GPIO_PBB6,                        /* wake45 */
73         TEGRA_GPIO_PZ7,                         /* wake46 */
74         TEGRA_GPIO_PT6,                         /* wake47 */
75         TEGRA_GPIO_PBB6,                        /* wake48 */
76         TEGRA_GPIO_PR7,                         /* wake49 */
77         TEGRA_GPIO_PR4,                         /* wake50 */
78         TEGRA_GPIO_PQ0,                         /* wake51 */
79         TEGRA_GPIO_PEE3,                        /* wake52 */
80         TEGRA_GPIO_PBB1,                        /* wake53 */
81         TEGRA_GPIO_PQ5,                         /* wake54 */
82         TEGRA_GPIO_PA1,                         /* wake55 */
83         TEGRA_GPIO_PV2,                         /* wake56 */
84         TEGRA_GPIO_PK6,                         /* wake57 */
85         -EINVAL,                                /* wake58 */
86         TEGRA_GPIO_PFF2,                        /* wake59 */
87         -EINVAL,                                /* wake60 */
88 };
89
90 static int tegra_wake_event_irq[] = {
91         -EAGAIN, /* ULPI DATA4 */               /* wake0 */
92         -EAGAIN,                                /* wake1 */
93         -EINVAL,                                /* wake2 */
94         -EAGAIN, /* SDMMC3 DAT1 */              /* wake3 */
95         -EAGAIN, /* HDMI INT */         /* wake4 */
96         -EAGAIN,                                /* wake5 */
97         -EAGAIN,                                /* wake6 */
98         -EAGAIN,                                /* wake7 */
99         -EAGAIN,                                /* wake8 */
100         -EAGAIN, /* UART3 RXD */                /* wake9 */
101         -EAGAIN, /* SDMMC4 DAT1 */              /* wake10 */
102         -EAGAIN,                                /* wake11 */
103         -EAGAIN,                                /* wake12 */
104         -EAGAIN, /* SDMMC1 DAT1 */              /* wake13 */
105         -EAGAIN, /* PEX_WAKE_N */               /* wake14 */
106         -EAGAIN, /* soc_therm_oc4_n:i, PG_OC */ /* wake15 */
107         INT_RTC,                                /* wake16 */
108         INT_KBC,                                /* wake17 */
109         INT_EXTERNAL_PMU,                       /* wake18 */
110         -EINVAL, /* INT_USB */                  /* wake19 */
111         -EINVAL,                                /* wake20 */
112         -EINVAL, /* INT_USB */                  /* wake21 */
113         -EINVAL,                                /* wake22 */
114         -EAGAIN,                                /* wake23 */
115         -EAGAIN,                                /* wake24 */
116         -EAGAIN,                                /* wake25 */
117         -EAGAIN,                                /* wake26 */
118         -EAGAIN,                                /* wake27 */
119         -EAGAIN,                                /* wake28 */
120         -EAGAIN, /* soc_therm_oc1_n:i, GPU_OC_INT */    /* wake29 */
121         -EAGAIN, /* I2S0 SDATA OUT */           /* wake30 */
122         -EINVAL,                                /* wake31 */
123         -EAGAIN, /* ULPI DATA3 */               /* wake32 */
124         -EAGAIN,                                /* wake33 */
125         -EAGAIN,                                /* wake34 */
126         -EAGAIN,                                /* wake35 */
127         -EINVAL,                                /* wake36 */
128         -EINVAL,                                /* wake37 */
129         -EINVAL,                                /* wake38 */
130         INT_USB, /* TEGRA_USB1_UTMIP, */        /* wake39 */
131         INT_USB2, /* TEGRA_USB2_UTMIP */        /* wake40 */
132         INT_USB3, /* TEGRA_USB3_UTMIP, */       /* wake41 */
133         INT_USB2, /* TEGRA_USB2_UHSIC */        /* wake42 */
134         INT_USB3, /* TEGRA_USB3_UHSIC */        /* wake43 */
135         -EAGAIN, /* I2C1 DAT */                 /* wake44 */
136         -EAGAIN,                                /* wake45 */
137         -EAGAIN, /* PWR I2C DAT */              /* wake46 */
138         -EAGAIN, /* I2C2 DAT */                 /* wake47 */
139         -EAGAIN, /* I2C3 DAT */                 /* wake48 */
140         -EAGAIN,                                /* wake49 */
141         -EAGAIN,                                /* wake50 */
142         -EAGAIN, /* KBC11 */                    /* wake51 */
143         -EAGAIN, /* HDMI CEC */                 /* wake52 */
144         -EAGAIN, /* I2C3 CLK */                 /* wake53 */
145         -EAGAIN,                                /* wake54 */
146         -EAGAIN, /* UART3 CTS */                /* wake55 */
147         -EAGAIN, /* SDMMC3 CD */                /* wake56 */
148         -EAGAIN, /* EN_VDD_HDMI, */             /* wake57 */
149         INT_XUSB_PADCTL,                        /* wake58 */
150         -EAGAIN,                                /* wake59 */
151         -EINVAL,                                /* wake60 */
152 };
153
154 static int last_gpio = -1;
155
156 int tegra_gpio_to_wake(int gpio)
157 {
158         int i;
159
160         for (i = 0; i < ARRAY_SIZE(tegra_gpio_wakes); i++) {
161                 if (tegra_gpio_wakes[i] == gpio) {
162                         pr_info("gpio wake%d for gpio=%d\n", i, gpio);
163                         last_gpio = i;
164                         return i;
165                 }
166         }
167
168         return -EINVAL;
169 }
170
171 void tegra_irq_to_wake(int irq, int *wak_list, int *wak_size)
172 {
173         int i;
174
175         *wak_size = 0;
176         for (i = 0; i < ARRAY_SIZE(tegra_wake_event_irq); i++) {
177                 if (tegra_wake_event_irq[i] == irq) {
178                         pr_info("Wake%d for irq=%d\n", i, irq);
179                         wak_list[*wak_size] = i;
180                         *wak_size = *wak_size + 1;
181                 }
182         }
183         if (*wak_size)
184                 goto out;
185
186         /* The gpio set_wake code bubbles the set_wake call up to the irq
187          * set_wake code. This insures that the nested irq set_wake call
188          * succeeds, even though it doesn't have to do any pm setup for the
189          * bank.
190          *
191          * This is very fragile - there's no locking, so two callers could
192          * cause issues with this.
193          */
194         if (last_gpio < 0)
195                 goto out;
196
197         if (tegra_gpio_get_bank_int_nr(tegra_gpio_wakes[last_gpio]) == irq) {
198                 pr_info("gpio bank wake found: wake%d for irq=%d\n", i, irq);
199                 wak_list[*wak_size] = last_gpio;
200                 *wak_size = 1;
201         }
202
203 out:
204         return;
205 }
206
207 int tegra_wake_to_irq(int wake)
208 {
209         int ret;
210
211         if (wake < 0)
212                 return -EINVAL;
213
214         if (wake >= ARRAY_SIZE(tegra_wake_event_irq))
215                 return -EINVAL;
216
217         ret = tegra_wake_event_irq[wake];
218         if (ret == -EAGAIN) {
219                 ret = tegra_gpio_wakes[wake];
220                 if (ret != -EINVAL)
221                         ret = gpio_to_irq(ret);
222         }
223
224         return ret;
225 }
226
227 int tegra_set_wake_source(int wake, int irq)
228 {
229         if (wake < 0)
230                 return -EINVAL;
231
232         if (wake >= ARRAY_SIZE(tegra_wake_event_irq))
233                 return -EINVAL;
234
235         tegra_wake_event_irq[wake] = irq;
236         return 0;
237 }
238
239 int tegra_disable_wake_source(int wake)
240 {
241         return tegra_set_wake_source(wake, -EINVAL);
242 }