2 * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/kernel.h>
16 #include <linux/gpio.h>
17 #include <linux/init.h>
20 #include <mach/irqs.h>
21 #include <mach/gpio-tegra.h>
23 #include "tegra-board-id.h"
24 #include "gpio-names.h"
27 static int tegra_gpio_wakes[] = {
28 TEGRA_GPIO_PO5, /* wake0 */
29 TEGRA_GPIO_PV1, /* wake1 */
34 TEGRA_GPIO_PU5, /* wake6 */
35 TEGRA_GPIO_PU6, /* wake7 */
36 TEGRA_GPIO_PC7, /* wake8 */
37 TEGRA_GPIO_PS2, /* wake9 */
39 TEGRA_GPIO_PW3, /* wake11 */
40 TEGRA_GPIO_PW2, /* wake12 */
42 TEGRA_GPIO_PDD3, /* wake14 */
43 TEGRA_GPIO_PJ2, /* wake15 */
51 TEGRA_GPIO_PI5, /* wake23 */
52 TEGRA_GPIO_PV0, /* wake24 */
55 TEGRA_GPIO_PS0, /* wake27 */
61 TEGRA_GPIO_PJ0, /* wake33 */
62 TEGRA_GPIO_PK2, /* wake34 */
63 TEGRA_GPIO_PI6, /* wake35 */
73 TEGRA_GPIO_PBB6, /* wake45 */
75 TEGRA_GPIO_PT6, /* wake47 */
77 TEGRA_GPIO_PR7, /* wake49 */
78 TEGRA_GPIO_PR4, /* wake50 */
79 TEGRA_GPIO_PQ0, /* wake51 */
80 TEGRA_GPIO_PEE3, /* wake52 */
82 TEGRA_GPIO_PQ5, /* wake54 */
84 TEGRA_GPIO_PV2, /* wake56 */
89 static int tegra_wake_event_irq[] = {
90 -EAGAIN, /* ULPI DATA4 */ /* wake0 */
93 INT_SDMMC3, /* SDMMC3 DAT1 */ /* wake3 */
94 INT_HDMI, /* HDMI INT */ /* wake4 */
99 INT_UARTC, /* UART3 RXD */ /* wake9 */
100 INT_SDMMC4, /* SDMMC4 DAT1 */ /* wake10 */
101 -EAGAIN, /* wake11 */
102 -EAGAIN, /* wake12 */
103 INT_SDMMC1, /* SDMMC1 DAT1 */ /* wake13 */
104 -EAGAIN, /* wake14 */
105 INT_EDP, /* wake15 */
106 INT_RTC, /* wake16 */
107 INT_KBC, /* wake17 */
108 INT_EXTERNAL_PMU, /* wake18 */
109 -EINVAL, /* wake19 */
110 -EINVAL, /* wake20 */
111 -EINVAL, /* wake21 */
112 -EINVAL, /* wake22 */
113 -EAGAIN, /* wake23 */
114 -EAGAIN, /* wake24 */
115 -EAGAIN, /* wake25 */
116 -EAGAIN, /* wake26 */
117 -EAGAIN, /* wake27 */
118 -EAGAIN, /* wake28 */
119 -EAGAIN, /* wake29 */
120 INT_AUDIO_CLUSTER, /* I2S0 SDATA OUT */ /* wake30 */
121 -EINVAL, /* wake31 */
122 -EINVAL, /* ULPI DATA3 */ /* wake32 */
123 -EAGAIN, /* wake33 */
124 -EAGAIN, /* wake34 */
125 -EAGAIN, /* wake35 */
126 -EAGAIN, /* wake36 */
127 -EINVAL, /* TEGRA_USB3_VBUS, */ /* wake37 */
128 -EINVAL, /* TEGRA_USB3_ID, */ /* wake38 */
129 INT_USB, /* TEGRA_USB1_UTMIP, */ /* wake39 */
130 -EINVAL, /* wake40 */
131 -EINVAL, /* wake41 */
132 INT_USB2, /* USB1 UHSIC PHY */ /* wake42 */
133 INT_USB3, /* USB3 UHSIC PHY */ /* wake43 */
134 INT_I2C, /* I2C1 DAT */ /* wake44 */
135 -EAGAIN, /* wake45 */
136 INT_I2C5, /* PWR I2C DAT */ /* wake46 */
137 INT_I2C2, /* I2C2 DAT */ /* wake47 */
138 INT_I2C3, /* I2C3 DAT */ /* wake48 */
139 -EAGAIN, /* wake49 */
140 -EAGAIN, /* wake50 */
141 INT_KBC, /* KBC11 */ /* wake51 */
142 INT_HDMI, /* HDMI CEC */ /* wake52 */
143 INT_I2C3, /* I2C3 CLK */ /* wake53 */
144 -EAGAIN, /* wake54 */
145 INT_UARTC, /* UART3 CTS */ /* wake55 */
146 -EAGAIN, /* SDMMC3 CD */ /* wake56 */
147 INT_USB, /* TEGRA_USB1_VBUS_EN1, */ /* wake57 */
148 INT_XUSB_PADCTL, /* XUSB superspeed wake */ /* wake58 */
151 static int last_gpio = -1;
153 int tegra_gpio_to_wake(int gpio)
157 for (i = 0; i < ARRAY_SIZE(tegra_gpio_wakes); i++) {
158 if (tegra_gpio_wakes[i] == gpio) {
159 pr_info("gpio wake%d for gpio=%d\n", i, gpio);
168 void tegra_set_usb_wake_source(void)
170 struct board_info board_info;
172 tegra_get_board_info(&board_info);
174 if (board_info.board_id == BOARD_E1611) {
175 tegra_wake_event_irq[41] = INT_USB3;
176 tegra_wake_event_irq[43] = -EINVAL;
180 int tegra_irq_to_wake(int irq)
185 for (i = 0; i < ARRAY_SIZE(tegra_wake_event_irq); i++) {
186 if (tegra_wake_event_irq[i] == irq) {
187 pr_info("Wake%d for irq=%d\n", i, irq);
193 /* The gpio set_wake code bubbles the set_wake call up to the irq
194 * set_wake code. This insures that the nested irq set_wake call
195 * succeeds, even though it doesn't have to do any pm setup for the
198 * This is very fragile - there's no locking, so two callers could
199 * cause issues with this.
204 if (tegra_gpio_get_bank_int_nr(tegra_gpio_wakes[last_gpio]) == irq) {
205 pr_info("gpio bank wake found: wake%d for irq=%d\n", i, irq);
213 int tegra_wake_to_irq(int wake)
220 if (wake >= ARRAY_SIZE(tegra_wake_event_irq))
223 ret = tegra_wake_event_irq[wake];
224 if (ret == -EAGAIN) {
225 ret = tegra_gpio_wakes[wake];
227 ret = gpio_to_irq(ret);
233 int tegra_disable_wake_source(int wake)
235 if (wake >= ARRAY_SIZE(tegra_wake_event_irq))
238 tegra_wake_event_irq[wake] = -EINVAL;