ARM: tegra12: set CPU rate to 2.2GHz for sku 0x87
[linux-3.10.git] / arch / arm / mach-tegra / wakeups-t11x.c
1 /*
2  * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms and conditions of the GNU General Public License,
6  * version 2, as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope it will be useful, but WITHOUT
9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11  * more details.
12  *
13  * You should have received a copy of the GNU General Public License
14  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
15  */
16
17 #include <linux/kernel.h>
18 #include <linux/gpio.h>
19 #include <linux/init.h>
20 #include <linux/io.h>
21 #include <linux/irqchip/tegra.h>
22
23 #include <mach/irqs.h>
24 #include <mach/gpio-tegra.h>
25 #include "board.h"
26 #include "tegra-board-id.h"
27 #include "gpio-names.h"
28 #include "iomap.h"
29
30 /* Tegra USB1 wake source index */
31 #define USB1_VBUS_WAKE 19
32 #define USB1_ID_WAKE 21
33 #define USB1_REM_WAKE 39
34
35 /* constants for USB1 wake sources - VBUS and ID */
36 #define USB1_IF_USB_PHY_VBUS_SENSORS_0 0x408
37 #define VBUS_WAKEUP_STS_BIT 10
38 #define ID_STS_BIT 2
39
40 static int tegra_gpio_wakes[] = {
41         TEGRA_GPIO_PO5,                         /* wake0 */
42         TEGRA_GPIO_PV1,                         /* wake1 */
43         -EINVAL,                                /* wake2 */
44         -EINVAL,                                /* wake3 */
45         -EINVAL,                                /* wake4 */
46         -EINVAL,                                /* wake5 */
47         TEGRA_GPIO_PU5,                         /* wake6 */
48         TEGRA_GPIO_PU6,                         /* wake7 */
49         TEGRA_GPIO_PC7,                         /* wake8 */
50         TEGRA_GPIO_PS2,                         /* wake9 */
51         -EINVAL,                                /* wake10 */
52         TEGRA_GPIO_PW3,                         /* wake11 */
53         TEGRA_GPIO_PW2,                         /* wake12 */
54         -EINVAL,                                /* wake13 */
55         TEGRA_GPIO_PDD3,                        /* wake14 */
56         TEGRA_GPIO_PJ2,                         /* wake15 */
57         -EINVAL,                                /* wake16 */
58         -EINVAL,                                /* wake17 */
59         -EINVAL,                                /* wake18 */
60         -EINVAL,                                /* wake19 */
61         -EINVAL,                                /* wake20 */
62         -EINVAL,                                /* wake21 */
63         -EINVAL,                                /* wake22 */
64         TEGRA_GPIO_PI5,                         /* wake23 */
65         TEGRA_GPIO_PV0,                         /* wake24 */
66         -EINVAL,                                /* wake25 */
67         -EINVAL,                                /* wake26 */
68         TEGRA_GPIO_PS0,                         /* wake27 */
69         -EINVAL,                                /* wake28 */
70         -EINVAL,                                /* wake29 */
71         -EINVAL,                                /* wake30 */
72         -EINVAL,                                /* wake31 */
73         -EINVAL,                                /* wake32 */
74         TEGRA_GPIO_PJ0,                         /* wake33 */
75         TEGRA_GPIO_PK2,                         /* wake34 */
76         TEGRA_GPIO_PI6,                         /* wake35 */
77         -EINVAL,                                /* wake36 */
78         -EINVAL,                                /* wake37 */
79         -EINVAL,                                /* wake38 */
80         -EINVAL,                                /* wake39 */
81         -EINVAL,                                /* wake40 */
82         -EINVAL,                                /* wake41 */
83         -EINVAL,                                /* wake42 */
84         -EINVAL,                                /* wake43 */
85         -EINVAL,                                /* wake44 */
86         TEGRA_GPIO_PBB6,                        /* wake45 */
87         -EINVAL,                                /* wake46 */
88         TEGRA_GPIO_PT6,                         /* wake47 */
89         -EINVAL,                                /* wake48 */
90         TEGRA_GPIO_PR7,                         /* wake49 */
91         TEGRA_GPIO_PR4,                         /* wake50 */
92         TEGRA_GPIO_PQ0,                         /* wake51 */
93         TEGRA_GPIO_PEE3,                        /* wake52 */
94         -EINVAL,                                /* wake53 */
95         TEGRA_GPIO_PQ5,                         /* wake54 */
96         -EINVAL,                                /* wake55 */
97         TEGRA_GPIO_PV2,                         /* wake56 */
98         -EINVAL,                                /* wake57 */
99         -EINVAL,                                /* wake58 */
100 };
101
102 static int tegra_wake_event_irq[] = {
103         -EAGAIN, /* ULPI DATA4 */               /* wake0 */
104         -EAGAIN,                                /* wake1 */
105         -EAGAIN,                                /* wake2 */
106         -EINVAL, /* SDMMC3 DAT1 */              /* wake3 */
107         -EINVAL, /* HDMI INT */                 /* wake4 */
108         -EAGAIN,                                /* wake5 */
109         -EAGAIN,                                /* wake6 */
110         -EAGAIN,                                /* wake7 */
111         -EAGAIN,                                /* wake8 */
112         -EAGAIN, /* UART3 RXD */                /* wake9 */
113         -EINVAL, /* SDMMC4 DAT1 */              /* wake10 */
114         -EAGAIN,                                /* wake11 */
115         -EAGAIN,                                /* wake12 */
116         -EINVAL, /* SDMMC1 DAT1 */              /* wake13 */
117         -EAGAIN,                                /* wake14 */
118         INT_EDP,                                /* wake15 */
119         INT_RTC, /* Tegra RTC */                /* wake16 */
120         INT_KBC, /* Tegra KBC */                /* wake17 */
121         INT_EXTERNAL_PMU,                       /* wake18 */
122         INT_USB,                                /* wake19 */
123         -EINVAL,                                /* wake20 */
124         INT_USB,                                /* wake21 */
125         -EINVAL,                                /* wake22 */
126         -EAGAIN,                                /* wake23 */
127         -EAGAIN,                                /* wake24 */
128         -EAGAIN,                                /* wake25 */
129         -EAGAIN,                                /* wake26 */
130         -EAGAIN,                                /* wake27 */
131         -EAGAIN,                                /* wake28 */
132         -EAGAIN,                                /* wake29 */
133         -EINVAL, /* I2S0 SDATA OUT */           /* wake30 */
134         -EINVAL,                                /* wake31 */
135         -EINVAL, /* ULPI DATA3 */               /* wake32 */
136         -EAGAIN,                                /* wake33 */
137         -EAGAIN,                                /* wake34 */
138         -EAGAIN,                                /* wake35 */
139         -EAGAIN,                                /* wake36 */
140         -EINVAL, /* usb_vbus_wakeup[2] not on t35 */    /* wake37 */
141         -EINVAL, /* usb_iddig[2] not on t35 */  /* wake38 */
142         INT_USB, /* utmip0 line wakeup event - USB1 */  /* wake39 */
143         -EINVAL, /* utmip1 line wakeup - USB2 , not on t35 */   /* wake40 */
144         -EINVAL, /* utmip2 line wakeup event - USB3 */  /* wake41 */
145         INT_USB2, /* uhsic line wakeup event - USB2 */  /* wake42 */
146         INT_USB3, /* uhsic2 line wakeup event - USB3 */ /* wake43 */
147         -EINVAL, /* I2C1 DAT */                 /* wake44 */
148         -EAGAIN,                                /* wake45 */
149         -EINVAL, /* PWR I2C DAT */              /* wake46 */
150         -EAGAIN, /* I2C2 DAT */                 /* wake47 */
151         -EINVAL, /* I2C3 DAT */                 /* wake48 */
152         -EAGAIN,                                /* wake49 */
153         -EAGAIN,                                /* wake50 */
154         -EAGAIN, /* KBC11 */                    /* wake51 */
155         -EAGAIN, /* HDMI CEC */                 /* wake52 */
156         -EINVAL, /* I2C3 CLK */                 /* wake53 */
157         -EAGAIN,                                /* wake54 */
158         -EINVAL, /* UART3 CTS */                /* wake55 */
159         -EAGAIN, /* SDMMC3 CD */                /* wake56 */
160         -EINVAL, /* spdif_in */                 /* wake57 */
161         INT_XUSB_PADCTL, /* XUSB superspeed wake */     /* wake58 */
162 };
163
164 #ifdef CONFIG_TEGRA_INTERNAL_USB_CABLE_WAKE_SUPPORT
165 /* USB1 VBUS and ID wake sources are handled as special case
166  * Note: SD card detect is an ANY wake source but is
167  * mostly a GPIO which can handle any edge wakeup.
168  */
169 static u8 any_wake_t11x[] = {
170         /* DO NOT EDIT this list */
171         [ANY_WAKE_INDEX_VBUS] = USB1_VBUS_WAKE,
172         [ANY_WAKE_INDEX_ID] = USB1_ID_WAKE,
173 };
174
175 void tegra_get_internal_any_wake_list(u8 *wake_count, u8 **any_wake,
176         u8 *remote_usb)
177 {
178         *wake_count = ARRAY_SIZE(any_wake_t11x);
179         *any_wake = any_wake_t11x;
180         *remote_usb = USB1_REM_WAKE;
181 }
182
183 /* Needed on dalmore today hence exposed this API */
184 int get_vbus_id_cable_connect_state(bool *is_vbus_connected,
185                 bool *is_id_connected)
186 {
187         static void __iomem *usb1_base = IO_ADDRESS(TEGRA_USB_BASE);
188         u32 reg;
189
190         reg = readl(usb1_base + USB1_IF_USB_PHY_VBUS_SENSORS_0);
191
192         /* ID bit when 0 - ID cable connected */
193         *is_id_connected = (reg & (1 << ID_STS_BIT)) ? false : true;
194
195         /*
196          * VBUS_WAKEUP_STS_BIT is also set when ID is connected
197          * and we are supplying VBUS, hence below conditional assignment
198          */
199         if (*is_id_connected)
200                 *is_vbus_connected = false;
201         else
202                 /* VBUS bit when 1 - VBUS cable connected */
203                 *is_vbus_connected = (reg & (1 << VBUS_WAKEUP_STS_BIT)) ?
204                         true : false;
205         return 0;
206 }
207 #endif
208
209 void tegra_set_usb_wake_source(void)
210 {
211         struct board_info board_info;
212
213         tegra_get_board_info(&board_info);
214         /* For Dalmore */
215         if (board_info.board_id == BOARD_E1611) {
216                 tegra_wake_event_irq[41] = INT_USB3;
217                 tegra_wake_event_irq[43] = -EINVAL;
218         }
219 }
220
221 static int __init tegra11x_wakeup_table_init(void)
222 {
223         tegra_gpio_wake_table = tegra_gpio_wakes;
224         tegra_irq_wake_table = tegra_wake_event_irq;
225         tegra_wake_table_len = ARRAY_SIZE(tegra_gpio_wakes);
226         return 0;
227 }
228 postcore_initcall(tegra11x_wakeup_table_init);