arm: tegra: update tn8 emc DVFS table to v7
[linux-3.10.git] / arch / arm / mach-tegra / tegra_emc_dt_parse.c
1 /*
2  * arch/arm/mach-tegra/tegra_emc_dt_parse.c
3  *
4  * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  *
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/err.h>
23 #include <linux/of.h>
24 #include <linux/module.h>
25 #include <linux/platform_device.h>
26
27 #include <linux/platform_data/tegra_emc.h>
28
29 #include "common.h"
30
31 #ifdef CONFIG_OF
32 static struct device_node *tegra_emc_ramcode_devnode(
33         struct device_node *np)
34 {
35         struct device_node *iter;
36         u32 reg;
37
38         for_each_child_of_node(np, iter) {
39                 if (of_property_read_u32(np, "nvidia,ram-code", &reg))
40                         continue;
41                 if (reg == tegra_get_bct_strapping())
42                         return of_node_get(iter);
43         }
44
45         return NULL;
46 }
47
48 void *tegra_emc_dt_parse_pdata(struct platform_device *pdev)
49 {
50         struct device_node *np = pdev->dev.of_node;
51         struct device_node *tnp, *iter;
52         int ret, i, num_tables;
53         u32 tegra_bct_strapping;
54 #if defined(CONFIG_ARCH_TEGRA_12x_SOC)
55         struct tegra12_emc_pdata *pdata = NULL;
56         const char *comp = "nvidia,tegra12-emc-table";
57         const char *emc_mode = "nvidia,emc-mode-0";
58 #elif defined(CONFIG_ARCH_TEGRA_11x_SOC)
59         struct tegra11_emc_pdata *pdata = NULL;
60         const char *comp = "nvidia,tegra11-emc-table";
61         const char *emc_mode = "nvidia,emc-mode-reset";
62 #endif
63
64         if (!np) {
65                 dev_err(&pdev->dev,
66                         "Unable to find memory-controller node\n");
67                 return NULL;
68         }
69
70         tegra_bct_strapping = tegra_get_bct_strapping();
71
72         if (of_find_property(np, "nvidia,use-ram-code", NULL)) {
73                 tnp = tegra_emc_ramcode_devnode(np);
74
75                 if (!tnp) {
76                         dev_warn(&pdev->dev,
77                                 "can't find emc table for ram-code 0x%02x\n",
78                                 tegra_bct_strapping);
79                         return NULL;
80                 }
81         } else
82                 tnp = of_node_get(np);
83
84         num_tables = 0;
85         for_each_child_of_node(tnp, iter) {
86                 if (of_device_is_compatible(iter, comp))
87                         num_tables++;
88         }
89
90         if (!num_tables) {
91                 pdata = NULL;
92                 goto out;
93         }
94
95         pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
96         pdata->tables = devm_kzalloc(&pdev->dev,
97                                 sizeof(*pdata->tables) * num_tables,
98                                         GFP_KERNEL);
99
100         if (!pdata->tables)
101                 goto out;
102
103         i = 0;
104         for_each_child_of_node(tnp, iter) {
105                 u32 u;
106                 const char *source_name;
107                 const char *dvfs_ver;
108
109                 ret = of_property_read_u32(iter, "nvidia,revision", &u);
110                 if (ret) {
111                         dev_err(&pdev->dev, "no revision in %s\n",
112                                 iter->full_name);
113                         continue;
114                 }
115                 pdata->tables[i].rev = u;
116
117                 ret = of_property_read_u32(iter, "clock-frequency", &u);
118                 if (ret) {
119                         dev_err(&pdev->dev, "no clock-frequency in %s\n",
120                                 iter->full_name);
121                         continue;
122                 }
123                 pdata->tables[i].rate = u;
124
125                 ret = of_property_read_u32(iter, "nvidia,emc-min-mv", &u);
126                 if (ret) {
127                         dev_err(&pdev->dev, "no emc-min-mv in %s\n",
128                                 iter->full_name);
129                         continue;
130                 }
131                 pdata->tables[i].emc_min_mv = u;
132
133                 ret = of_property_read_string(iter,
134                                         "nvidia,source", &source_name);
135                 if (ret) {
136                         dev_err(&pdev->dev, "no source name in %s\n",
137                                 iter->full_name);
138                         continue;
139                 }
140 #if defined(CONFIG_ARCH_TEGRA_12x_SOC)
141                 strncpy(pdata->tables[i].src_name, source_name, 16);
142 #else
143                 pdata->tables[i].src_name = source_name;
144 #endif
145                 ret = of_property_read_u32(iter, "nvidia,src-sel-reg", &u);
146                 if (ret) {
147                         dev_err(&pdev->dev, "no src-sel-reg in %s\n",
148                                 iter->full_name);
149                         continue;
150                 }
151                 pdata->tables[i].src_sel_reg = u;
152
153                 ret = of_property_read_u32(iter, "nvidia,burst-regs-num", &u);
154                 if (ret) {
155                         dev_err(&pdev->dev, "no burst-regs-num in %s\n",
156                                 iter->full_name);
157                         continue;
158                 }
159                 pdata->tables[i].burst_regs_num = u;
160
161                 ret = of_property_read_u32(iter,
162                                         "nvidia,burst-up-down-regs-num", &u);
163                 if (ret) {
164                         dev_err(&pdev->dev, "no burst-up-down-regs-num in %s\n",
165                                 iter->full_name);
166                         continue;
167                 }
168                 pdata->tables[i].burst_up_down_regs_num = u;
169
170                 ret = of_property_read_u32_array(iter, "nvidia,emc-registers",
171                                         pdata->tables[i].burst_regs,
172                                         pdata->tables[i].burst_regs_num);
173                 if (ret) {
174                         dev_err(&pdev->dev,
175                                 "malformed emc-registers property in %s\n",
176                                 iter->full_name);
177                         continue;
178                 }
179
180                 ret = of_property_read_u32_array(iter,
181                                 "nvidia,emc-burst-up-down-regs",
182                                 pdata->tables[i].burst_up_down_regs,
183                                 pdata->tables[i].burst_up_down_regs_num);
184                 if (ret) {
185                         dev_err(&pdev->dev,
186                                 "malformed emc-burst-up-down-regs "
187                                 "property in %s\n",
188                                 iter->full_name);
189                         continue;
190                 }
191
192                 ret = of_property_read_u32(iter,
193                                 "nvidia,emc-zcal-cnt-long", &u);
194                 if (ret) {
195                         dev_err(&pdev->dev,
196                                 "malformed emc-zcal-cnt-long property in %s\n",
197                                 iter->full_name);
198                         continue;
199                 }
200                 pdata->tables[i].emc_zcal_cnt_long = u;
201
202                 ret = of_property_read_u32(iter,
203                                 "nvidia,emc-acal-interval", &u);
204                 if (ret) {
205                         dev_err(&pdev->dev,
206                                 "malformed emc-acal-interval property in %s\n",
207                                 iter->full_name);
208                         continue;
209                 }
210                 pdata->tables[i].emc_acal_interval = u;
211
212                 ret = of_property_read_u32(iter, "nvidia,emc-cfg", &u);
213                 if (ret) {
214                         dev_err(&pdev->dev,
215                                 "malformed emc-cfg property in %s\n",
216                                 iter->full_name);
217                         continue;
218                 }
219                 pdata->tables[i].emc_cfg = u;
220
221                 ret = of_property_read_u32(iter, emc_mode, &u);
222                 if (ret) {
223                         dev_err(&pdev->dev, "malformed %s property in %s\n",
224                                 emc_mode, iter->full_name);
225                         continue;
226                 }
227                 pdata->tables[i].emc_mode_reset = u;
228
229                 ret = of_property_read_u32(iter, "nvidia,emc-mode-1", &u);
230                 if (ret) {
231                         dev_err(&pdev->dev,
232                                 "malformed emc-mode-1 property in %s\n",
233                                 iter->full_name);
234                         continue;
235                 }
236                 pdata->tables[i].emc_mode_1 = u;
237
238                 ret = of_property_read_u32(iter, "nvidia,emc-mode-2", &u);
239                 if (ret) {
240                         dev_err(&pdev->dev,
241                                 "malformed emc-mode-2 property in %s\n",
242                                 iter->full_name);
243                         continue;
244                 }
245                 pdata->tables[i].emc_mode_2 = u;
246
247                 ret = of_property_read_u32(iter, "nvidia,emc-mode-4", &u);
248                 if (ret) {
249                         dev_err(&pdev->dev,
250                                 "malformed emc-mode-4 property in %s\n",
251                                 iter->full_name);
252                         continue;
253                 }
254                 pdata->tables[i].emc_mode_4 = u;
255 #if defined(CONFIG_ARCH_TEGRA_12x_SOC)
256
257                 ret = of_property_read_string(iter,
258                         "nvidia,dvfs-version", &dvfs_ver);
259                 if (ret) {
260                         dev_err(&pdev->dev, "no dvfs version in %s\n",
261                                 iter->full_name);
262                         continue;
263                 }
264                 strncpy(pdata->tables[i].table_id, dvfs_ver,
265                         TEGRA12_MAX_TABLE_ID_LEN);
266
267                 ret = of_property_read_u32(iter, "nvidia,gk20a-min-mv", &u);
268                 if (ret) {
269                         dev_err(&pdev->dev,
270                                 "malformed gk20a-min-mv property in %s\n",
271                                 iter->full_name);
272                         continue;
273                 }
274                 pdata->tables[i].gk20a_min_mv = u;
275
276                 ret = of_property_read_u32(iter,
277                                 "nvidia,emc-ctt-term_ctrl", &u);
278                 if (ret) {
279                         dev_err(&pdev->dev,
280                                 "malformed emc-ctt-term_ctrl property in %s\n",
281                                 iter->full_name);
282                         continue;
283                 }
284                 pdata->tables[i].emc_ctt_term_ctrl = u;
285
286                 ret = of_property_read_u32(iter, "nvidia,emc-cfg-2", &u);
287                 if (ret) {
288                         dev_err(&pdev->dev,
289                                 "malformed emc-cfg-2 property in %s\n",
290                                 iter->full_name);
291                         continue;
292                 }
293                 pdata->tables[i].emc_cfg_2 = u;
294
295                 ret = of_property_read_u32(iter, "nvidia,emc-sel-dpd-ctrl", &u);
296                 if (ret) {
297                         dev_err(&pdev->dev,
298                                 "malformed emc-sel-dpd-ctrl property in %s\n",
299                                 iter->full_name);
300                         continue;
301                 }
302                 pdata->tables[i].emc_sel_dpd_ctrl = u;
303
304                 ret = of_property_read_u32(iter, "nvidia,emc-cfg-dig-dll", &u);
305                 if (ret) {
306                         dev_err(&pdev->dev,
307                                 "malformed emc-cfg-dig-dll property in %s\n",
308                                 iter->full_name);
309                         continue;
310                 }
311                 pdata->tables[i].emc_cfg_dig_dll = u;
312
313                 ret = of_property_read_u32(iter, "nvidia,emc-bgbias-ctl0", &u);
314                 if (ret) {
315                         dev_err(&pdev->dev,
316                                 "malformed emc-bgbias-ctl0 property in %s\n",
317                                 iter->full_name);
318                         continue;
319                 }
320                 pdata->tables[i].emc_bgbias_ctl0 = u;
321
322                 ret = of_property_read_u32(iter, "nvidia,emc-auto-cal-config2", &u);
323                 if (ret) {
324                         dev_err(&pdev->dev,
325                                 "malformed emc-auto-cal-config2 property in %s\n",
326                                 iter->full_name);
327                         continue;
328                 }
329                 pdata->tables[i].emc_auto_cal_config2 = u;
330
331                 ret = of_property_read_u32(iter, "nvidia,emc-auto-cal-config3", &u);
332                 if (ret) {
333                         dev_err(&pdev->dev,
334                                 "malformed emc-auto-cal-config3 property in %s\n",
335                                 iter->full_name);
336                         continue;
337                 }
338                 pdata->tables[i].emc_auto_cal_config3 = u;
339
340                 ret = of_property_read_u32(iter, "nvidia,emc-auto-cal-config", &u);
341                 if (ret) {
342                         dev_err(&pdev->dev,
343                                 "malformed emc-auto-cal-config property in %s\n",
344                                 iter->full_name);
345                         continue;
346                 }
347                 pdata->tables[i].emc_auto_cal_config = u;
348 #endif
349
350 #if defined(CONFIG_ARCH_TEGRA_11x_SOC)
351
352                 ret = of_property_read_u32(iter, "nvidia,emc-trimmers-num", &u);
353                 if (ret) {
354                         dev_err(&pdev->dev, "no emc-trimmers-num in %s\n",
355                                 iter->full_name);
356                         continue;
357                 }
358                 pdata->tables[i].emc_trimmers_num = u;
359
360                 ret = of_property_read_u32_array(iter, "nvidia,emc-trimmers-0",
361                                         pdata->tables[i].emc_trimmers_0,
362                                         pdata->tables[i].emc_trimmers_num);
363                 if (ret) {
364                         dev_err(&pdev->dev,
365                                 "malformed emc-trimmers-0 property in %s\n",
366                                 iter->full_name);
367                         continue;
368                 }
369                 ret = of_property_read_u32_array(iter, "nvidia,emc-trimmers-1",
370                                         pdata->tables[i].emc_trimmers_1,
371                                         pdata->tables[i].emc_trimmers_num);
372                 if (ret) {
373                         dev_err(&pdev->dev,
374                                 "malformed emc-trimmers-1 property in %s\n",
375                                 iter->full_name);
376                         continue;
377                 }
378
379                 ret = of_property_read_u32(iter,
380                                 "nvidia,emc-clock-latency-change", &u);
381                 if (ret) {
382                         dev_err(&pdev->dev,
383                                 "malformed emc-clock-latency-change in %s\n",
384                                 iter->full_name);
385                         continue;
386                 }
387                 pdata->tables[i].clock_change_latency = u;
388 #endif
389                 i++;
390         }
391         pdata->num_tables = i;
392
393 out:
394         of_node_put(tnp);
395         return pdata;
396 }
397 #else
398 void *tegra_emc_dt_parse_pdata(struct platform_device *pdev)
399 {
400         return NULL;
401 }
402 #endif