2 * arch/arm/mach-tegra/tegra_emc_dt_parse.c
4 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
21 #include <linux/kernel.h>
22 #include <linux/err.h>
24 #include <linux/module.h>
25 #include <linux/platform_device.h>
27 #include <linux/platform_data/tegra_emc.h>
32 static struct device_node *tegra_emc_ramcode_devnode(
33 struct device_node *np)
35 struct device_node *iter;
38 for_each_child_of_node(np, iter) {
39 if (of_property_read_u32(np, "nvidia,ram-code", ®))
41 if (reg == tegra_get_bct_strapping())
42 return of_node_get(iter);
48 void *tegra_emc_dt_parse_pdata(struct platform_device *pdev)
50 struct device_node *np = pdev->dev.of_node;
51 struct device_node *tnp, *iter;
52 int ret, i, num_tables;
53 u32 tegra_bct_strapping;
54 #if defined(CONFIG_ARCH_TEGRA_12x_SOC)
55 struct tegra12_emc_pdata *pdata = NULL;
56 const char *comp = "nvidia,tegra12-emc-table";
57 const char *emc_mode = "nvidia,emc-mode-0";
58 #elif defined(CONFIG_ARCH_TEGRA_11x_SOC)
59 struct tegra11_emc_pdata *pdata = NULL;
60 const char *comp = "nvidia,tegra11-emc-table";
61 const char *emc_mode = "nvidia,emc-mode-reset";
66 "Unable to find memory-controller node\n");
70 tegra_bct_strapping = tegra_get_bct_strapping();
72 if (of_find_property(np, "nvidia,use-ram-code", NULL)) {
73 tnp = tegra_emc_ramcode_devnode(np);
77 "can't find emc table for ram-code 0x%02x\n",
82 tnp = of_node_get(np);
85 for_each_child_of_node(tnp, iter) {
86 if (of_device_is_compatible(iter, comp))
95 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
96 pdata->tables = devm_kzalloc(&pdev->dev,
97 sizeof(*pdata->tables) * num_tables,
104 for_each_child_of_node(tnp, iter) {
106 const char *source_name;
107 const char *dvfs_ver;
109 ret = of_property_read_u32(iter, "nvidia,revision", &u);
111 dev_err(&pdev->dev, "no revision in %s\n",
115 pdata->tables[i].rev = u;
117 ret = of_property_read_u32(iter, "clock-frequency", &u);
119 dev_err(&pdev->dev, "no clock-frequency in %s\n",
123 pdata->tables[i].rate = u;
125 ret = of_property_read_u32(iter, "nvidia,emc-min-mv", &u);
127 dev_err(&pdev->dev, "no emc-min-mv in %s\n",
131 pdata->tables[i].emc_min_mv = u;
133 ret = of_property_read_string(iter,
134 "nvidia,source", &source_name);
136 dev_err(&pdev->dev, "no source name in %s\n",
140 #if defined(CONFIG_ARCH_TEGRA_12x_SOC)
141 strncpy(pdata->tables[i].src_name, source_name, 16);
143 pdata->tables[i].src_name = source_name;
145 ret = of_property_read_u32(iter, "nvidia,src-sel-reg", &u);
147 dev_err(&pdev->dev, "no src-sel-reg in %s\n",
151 pdata->tables[i].src_sel_reg = u;
153 ret = of_property_read_u32(iter, "nvidia,burst-regs-num", &u);
155 dev_err(&pdev->dev, "no burst-regs-num in %s\n",
159 pdata->tables[i].burst_regs_num = u;
161 ret = of_property_read_u32(iter,
162 "nvidia,burst-up-down-regs-num", &u);
164 dev_err(&pdev->dev, "no burst-up-down-regs-num in %s\n",
168 pdata->tables[i].burst_up_down_regs_num = u;
170 ret = of_property_read_u32_array(iter, "nvidia,emc-registers",
171 pdata->tables[i].burst_regs,
172 pdata->tables[i].burst_regs_num);
175 "malformed emc-registers property in %s\n",
180 ret = of_property_read_u32_array(iter,
181 "nvidia,emc-burst-up-down-regs",
182 pdata->tables[i].burst_up_down_regs,
183 pdata->tables[i].burst_up_down_regs_num);
186 "malformed emc-burst-up-down-regs "
192 ret = of_property_read_u32(iter,
193 "nvidia,emc-zcal-cnt-long", &u);
196 "malformed emc-zcal-cnt-long property in %s\n",
200 pdata->tables[i].emc_zcal_cnt_long = u;
202 ret = of_property_read_u32(iter,
203 "nvidia,emc-acal-interval", &u);
206 "malformed emc-acal-interval property in %s\n",
210 pdata->tables[i].emc_acal_interval = u;
212 ret = of_property_read_u32(iter, "nvidia,emc-cfg", &u);
215 "malformed emc-cfg property in %s\n",
219 pdata->tables[i].emc_cfg = u;
221 ret = of_property_read_u32(iter, emc_mode, &u);
223 dev_err(&pdev->dev, "malformed %s property in %s\n",
224 emc_mode, iter->full_name);
227 pdata->tables[i].emc_mode_reset = u;
229 ret = of_property_read_u32(iter, "nvidia,emc-mode-1", &u);
232 "malformed emc-mode-1 property in %s\n",
236 pdata->tables[i].emc_mode_1 = u;
238 ret = of_property_read_u32(iter, "nvidia,emc-mode-2", &u);
241 "malformed emc-mode-2 property in %s\n",
245 pdata->tables[i].emc_mode_2 = u;
247 ret = of_property_read_u32(iter, "nvidia,emc-mode-4", &u);
250 "malformed emc-mode-4 property in %s\n",
254 pdata->tables[i].emc_mode_4 = u;
255 #if defined(CONFIG_ARCH_TEGRA_12x_SOC)
257 ret = of_property_read_string(iter,
258 "nvidia,dvfs-version", &dvfs_ver);
260 dev_err(&pdev->dev, "no dvfs version in %s\n",
264 strncpy(pdata->tables[i].table_id, dvfs_ver,
265 TEGRA12_MAX_TABLE_ID_LEN);
267 ret = of_property_read_u32(iter, "nvidia,gk20a-min-mv", &u);
270 "malformed gk20a-min-mv property in %s\n",
274 pdata->tables[i].gk20a_min_mv = u;
276 ret = of_property_read_u32(iter,
277 "nvidia,emc-ctt-term_ctrl", &u);
280 "malformed emc-ctt-term_ctrl property in %s\n",
284 pdata->tables[i].emc_ctt_term_ctrl = u;
286 ret = of_property_read_u32(iter, "nvidia,emc-cfg-2", &u);
289 "malformed emc-cfg-2 property in %s\n",
293 pdata->tables[i].emc_cfg_2 = u;
295 ret = of_property_read_u32(iter, "nvidia,emc-sel-dpd-ctrl", &u);
298 "malformed emc-sel-dpd-ctrl property in %s\n",
302 pdata->tables[i].emc_sel_dpd_ctrl = u;
304 ret = of_property_read_u32(iter, "nvidia,emc-cfg-dig-dll", &u);
307 "malformed emc-cfg-dig-dll property in %s\n",
311 pdata->tables[i].emc_cfg_dig_dll = u;
314 #if defined(CONFIG_ARCH_TEGRA_11x_SOC)
316 ret = of_property_read_u32(iter, "nvidia,emc-trimmers-num", &u);
318 dev_err(&pdev->dev, "no emc-trimmers-num in %s\n",
322 pdata->tables[i].emc_trimmers_num = u;
324 ret = of_property_read_u32_array(iter, "nvidia,emc-trimmers-0",
325 pdata->tables[i].emc_trimmers_0,
326 pdata->tables[i].emc_trimmers_num);
329 "malformed emc-trimmers-0 property in %s\n",
333 ret = of_property_read_u32_array(iter, "nvidia,emc-trimmers-1",
334 pdata->tables[i].emc_trimmers_1,
335 pdata->tables[i].emc_trimmers_num);
338 "malformed emc-trimmers-1 property in %s\n",
343 ret = of_property_read_u32(iter,
344 "nvidia,emc-clock-latency-change", &u);
347 "malformed emc-clock-latency-change in %s\n",
351 pdata->tables[i].clock_change_latency = u;
355 pdata->num_tables = i;
362 void *tegra_emc_dt_parse_pdata(struct platform_device *pdev)