ARM: tegra: fix regulator_get() return value check
[linux-3.10.git] / arch / arm / mach-tegra / tegra_bb.c
1 /*
2  * arch/arm/mach-tegra/tegra_bb.c
3  *
4  * Copyright (C) 2012-2013 NVIDIA Corporation. All rights reserved.
5  *
6  *
7  * This software is licensed under the terms of the GNU General Public
8  * License version 2, as published by the Free Software Foundation, and
9  * may be copied, distributed, and modified under those terms.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  */
17 #include <linux/types.h>
18 #include <linux/debugfs.h>
19 #include <linux/device.h>
20 #include <linux/module.h>
21 #include <linux/miscdevice.h>
22 #include <linux/platform_device.h>
23 #include <linux/slab.h>
24 #include <linux/vmalloc.h>
25 #include <linux/mm.h>
26 #include <linux/io.h>
27 #include <linux/interrupt.h>
28 #include <linux/irq.h>
29 #include <linux/delay.h>
30 #include <asm/io.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/clk.h>
33 #include <linux/clk/tegra.h>
34 #include <linux/suspend.h>
35 #include <linux/pm_runtime.h>
36
37 #include <mach/tegra_bb.h>
38 #include <mach/tegra_bbc_proxy.h>
39 #include <mach/pm_domains.h>
40 #include <linux/platform_data/nvshm.h>
41
42 #include "clock.h"
43 #include "iomap.h"
44 #include "sleep.h"
45 #include "tegra_emc.h"
46 #include "pm.h"
47
48 /* BB mailbox offset */
49 #define TEGRA_BB_REG_MAILBOX (0x0)
50 /* BB mailbox return code (MOSD) offset */
51 #define TEGRA_BB_REG_RETCODE (0x4)
52 /* BB status mask */
53 #define TEGRA_BB_STATUS_MASK  (0xffff)
54 #define TEGRA_BB_IPC_COLDBOOT  (0x0001)
55 #define TEGRA_BB_IPC_READY  (0x0005)
56 #define TEGRA_BB_BOOT_RESTART_FW_REQ    (0x0003)
57
58 #define BBC_MC_MIN_FREQ         600000000
59 #define BBC_MC_MAX_FREQ         700000000
60
61 #define PMC_EVENT_COUNTER_0             (0x44c)
62 #define PMC_EVENT_COUNTER_0_EN_MASK     (1<<20)
63 #define PMC_EVENT_COUNTER_0_LP0BB       (0<<16)
64 #define PMC_EVENT_COUNTER_0_LP0ACTIVE   (1<<16)
65
66 #define PMC_IPC_STS_0                   (0x500)
67 #define AP2BB_RESET_SHIFT               (1)
68 #define AP2BB_RESET_DEFAULT_MASK        (1)
69 #define BB2AP_MEM_REQ_SHIFT             (3)
70 #define BB2AP_MEM_REQ_SOON_SHIFT        (4)
71
72 #define PMC_IPC_SET_0                   (0x504)
73 #define AP2BB_MEM_STS_SHIFT             (5)
74
75 #define PMC_IPC_CLEAR_0                 (0x508)
76
77 #define FLOW_IPC_STS_0                  (0x500)
78 #define AP2BB_MSC_STS_SHIFT             (4)
79 #define BB2AP_INT1_STS_SHIFT            (3)
80 #define BB2AP_INT0_STS_SHIFT            (2)
81 #define AP2BB_INT0_STS_SHIFT            (0)
82
83 #define FLOW_IPC_SET_0                  (0x504)
84 #define FLOW_IPC_CLR_0                  (0x508)
85
86 #define MC_BBC_MEM_REGIONS_0_OFFSET (0xF0)
87
88 #define MC_BBC_MEM_REGIONS_0_PRIV_SIZE_MASK  (0x3)
89 #define MC_BBC_MEM_REGIONS_0_PRIV_SIZE_SHIFT (0)
90
91 #define MC_BBC_MEM_REGIONS_0_PRIV_BASE_MASK  (0x1FF)
92 #define MC_BBC_MEM_REGIONS_0_PRIV_BASE_SHIFT (3)
93
94 #define MC_BBC_MEM_REGIONS_0_IPC_SIZE_MASK   (0x3)
95 #define MC_BBC_MEM_REGIONS_0_IPC_SIZE_SHIFT  (16)
96
97 #define MC_BBC_MEM_REGIONS_0_IPC_BASE_MASK   (0x1FF)
98 #define MC_BBC_MEM_REGIONS_0_IPC_BASE_SHIFT  (19)
99
100 enum bbc_pm_state {
101         BBC_REMOVE_FLOOR = 1,
102         BBC_SET_FLOOR,
103         BBC_CRASHDUMP_FLOOR,
104 };
105
106 struct tegra_bb {
107         spinlock_t lock;
108         int status;
109         int instance;
110         char name[16];
111         char priv_name[16];
112         char ipc_name[16];
113         unsigned long priv_phy;
114         unsigned long ipc_phy;
115         void *ipc_virt;
116         void *mb_virt;
117         unsigned long priv_size;
118         unsigned long ipc_size;
119         unsigned long ipc_irq;
120         unsigned long emc_min_freq;
121         u32 emc_flags;
122         char ipc_serial[NVSHM_SERIAL_BYTE_SIZE];
123         unsigned int irq;
124         unsigned int mem_req_soon;
125         enum bbc_pm_state state, prev_state;
126         struct regulator *vdd_bb_core;
127         struct regulator *vdd_bb_pll;
128         void (*ipc_cb)(void *data);
129         void  *ipc_cb_data;
130         struct miscdevice dev_priv;
131         struct miscdevice dev_ipc;
132         struct device *dev;
133         struct sysfs_dirent *sd;
134         struct nvshm_platform_data nvshm_pdata;
135         struct platform_device nvshm_device;
136         struct workqueue_struct *workqueue;
137         struct work_struct work;
138         struct clk *emc_clk;
139         struct device *proxy_dev;
140         struct notifier_block pm_notifier;
141         bool is_suspending;
142 };
143
144
145 static int tegra_bb_open(struct inode *inode, struct file *filp);
146 static int tegra_bb_map(struct file *filp, struct vm_area_struct *vma);
147 static int tegra_bb_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
148
149 static const struct file_operations tegra_bb_priv_fops = {
150         .owner          = THIS_MODULE,
151         .open           = tegra_bb_open,
152         .mmap           = tegra_bb_map,
153 };
154
155 static const struct file_operations tegra_bb_ipc_fops = {
156         .owner          = THIS_MODULE,
157         .open           = tegra_bb_open,
158         .mmap           = tegra_bb_map,
159 };
160
161 static const struct vm_operations_struct tegra_bb_vm_ops = {
162         .fault = tegra_bb_vm_fault,
163 };
164
165 void tegra_bb_register_ipc(struct platform_device *pdev,
166                            void (*cb)(void *data), void *cb_data)
167 {
168         struct tegra_bb *bb = platform_get_drvdata(pdev);
169
170         if (!bb) {
171                 dev_err(&pdev->dev, "%s tegra_bb not found!\n", __func__);
172                 return;
173         }
174         bb->ipc_cb = cb;
175         bb->ipc_cb_data = cb_data;
176 }
177 EXPORT_SYMBOL_GPL(tegra_bb_register_ipc);
178
179 void tegra_bb_generate_ipc(struct platform_device *pdev)
180 {
181         struct tegra_bb *bb = platform_get_drvdata(pdev);
182 #ifndef CONFIG_TEGRA_BASEBAND_SIMU
183         void __iomem *flow = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE);
184 #endif
185
186         if (!bb) {
187                 dev_err(&pdev->dev, "%s tegra_bb not found!\n", __func__);
188                 return;
189         }
190
191 #ifdef CONFIG_TEGRA_BASEBAND_SIMU
192         {
193                 int sts;
194                 if (bb->ipc_cb)
195                         bb->ipc_cb(bb->ipc_cb_data);
196                 /* Notify sysfs */
197                 sts = *(unsigned int *)bb->mb_virt & TEGRA_BB_STATUS_MASK;
198
199                 if ((bb->status != TEGRA_BB_IPC_READY) ||
200                     (bb->status != sts)) {
201                         sysfs_notify(&bb->dev->kobj, NULL, "status");
202                 }
203                 bb->status = sts;
204         }
205 #else
206         {
207                 u32 sts = readl(flow + FLOW_IPC_STS_0);
208                 sts |= 1 << AP2BB_INT0_STS_SHIFT;
209                 writel(sts, flow + FLOW_IPC_SET_0);
210         }
211 #endif
212 }
213 EXPORT_SYMBOL_GPL(tegra_bb_generate_ipc);
214
215 void tegra_bb_clear_ipc(struct platform_device *dev)
216 {
217         void __iomem *fctrl = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE);
218
219         /* clear BB2AP INT status */
220         writel(1 << BB2AP_INT0_STS_SHIFT, fctrl + FLOW_IPC_CLR_0);
221 }
222 EXPORT_SYMBOL_GPL(tegra_bb_clear_ipc);
223
224 void tegra_bb_abort_ipc(struct platform_device *dev)
225 {
226         void __iomem *fctrl = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE);
227
228         /* clear AP2BB INT status */
229         writel(1 << AP2BB_INT0_STS_SHIFT, fctrl + FLOW_IPC_CLR_0);
230 }
231 EXPORT_SYMBOL_GPL(tegra_bb_abort_ipc);
232
233 int tegra_bb_check_ipc(struct platform_device *dev)
234 {
235         void __iomem *fctrl = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE);
236         int sts;
237
238         sts = readl(fctrl + FLOW_IPC_STS_0);
239         if (sts & (1 << AP2BB_INT0_STS_SHIFT))
240                 return 0;
241         return 1;
242 }
243 EXPORT_SYMBOL_GPL(tegra_bb_check_ipc);
244
245 int tegra_bb_check_bb2ap_ipc(void)
246 {
247         void __iomem *fctrl = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE);
248         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
249         int sts;
250
251         sts = readl(pmc + PMC_IPC_STS_0);
252         sts = sts >> AP2BB_RESET_SHIFT;
253         sts &= AP2BB_RESET_DEFAULT_MASK;
254         if (!sts)
255                 return 0;
256
257         sts = readl(fctrl + FLOW_IPC_STS_0);
258         if (sts & (1 << BB2AP_INT0_STS_SHIFT))
259                 return 1;
260         return 0;
261 }
262 EXPORT_SYMBOL_GPL(tegra_bb_check_bb2ap_ipc);
263
264 static int tegra_bb_open(struct inode *inode, struct file *filp)
265 {
266         int ret;
267
268         ret = nonseekable_open(inode, filp);
269         return ret;
270 }
271
272 static int tegra_bb_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
273 {
274         pr_warn("%s  vma->vm_start=0x%x vma->vm_end=0x%x vma->vm_pgoff=0x%x\n"
275                 , __func__,
276                 (unsigned int)vma->vm_start,
277                 (unsigned int)vma->vm_end,
278                 (unsigned int)vma->vm_pgoff);
279         vmf = vmf;
280         return VM_FAULT_NOPAGE;
281 }
282
283 static inline void tegra_bb_enable_mem_req_soon(void)
284 {
285         void __iomem *fctrl = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE);
286         int val = readl(fctrl + FLOW_IPC_STS_0);
287
288         /* AP2BB_MSC_STS[3] is to mask or unmask
289          * mem_req_soon interrupt to interrupt controller */
290         val = val | (0x8 << AP2BB_MSC_STS_SHIFT);
291         writel(val, fctrl + FLOW_IPC_SET_0);
292
293         pr_debug("%s: fctrl ipc_sts = %x\n", __func__, val);
294 }
295
296 static int tegra_bb_map(struct file *filp, struct vm_area_struct *vma)
297 {
298         struct miscdevice *miscdev = filp->private_data;
299         struct tegra_bb *bb;
300         unsigned long phy;
301         unsigned long off;
302         unsigned long vsize;
303         unsigned long psize;
304         int ret;
305
306         off = vma->vm_pgoff << PAGE_SHIFT;
307         vsize = vma->vm_end - vma->vm_start;
308         bb = dev_get_drvdata(miscdev->parent);
309         if (miscdev->fops == &tegra_bb_priv_fops) {
310                 phy = bb->priv_phy + off;
311                 pr_debug("%s map priv section @0x%x\n",
312                         __func__,
313                         (unsigned int)phy);
314                 psize = bb->priv_size - off;
315         } else {
316                 phy = bb->ipc_phy + off;
317                 pr_debug("%s map ipc section @0x%x\n",
318                         __func__,
319                         (unsigned int)phy);
320                 psize =  bb->ipc_size - off;
321         }
322         if (vsize > psize) {
323                 pr_err("%s request exceed mapping!\n",
324                        __func__);
325                 return -EINVAL;
326         }
327
328         vma->vm_ops = &tegra_bb_vm_ops;
329         ret = remap_pfn_range(vma, vma->vm_start, __phys_to_pfn(phy),
330                               vsize, pgprot_noncached(vma->vm_page_prot));
331         if (ret) {
332                 pr_err("%s remap_pfn_range ret %d\n", __func__, (int)ret);
333                 return -EAGAIN;
334         }
335         return ret;
336 }
337
338 static ssize_t show_tegra_bb_retcode(struct device *dev,
339                                   struct device_attribute *attr, char *buf)
340 {
341         struct tegra_bb *bb = dev_get_drvdata(dev);
342         int retcode;
343
344         if (!bb) {
345                 dev_err(dev, "%s tegra_bb not found!\n", __func__);
346                 return 0;
347         }
348
349         retcode = *(int *)((unsigned long)bb->mb_virt + TEGRA_BB_REG_RETCODE);
350         dev_dbg(dev, "%s retcode=%d\n", __func__, (int)retcode);
351         return sprintf(buf, "%d\n", retcode);
352 }
353 static DEVICE_ATTR(retcode, S_IRUSR | S_IRGRP, show_tegra_bb_retcode, NULL);
354
355 static ssize_t show_tegra_bb_status(struct device *dev,
356                                      struct device_attribute *attr, char *buf)
357 {
358         struct tegra_bb *bb = dev_get_drvdata(dev);
359         unsigned int *ptr;
360         int status;
361
362         if (!bb) {
363                 dev_err(dev, "%s tegra_bb not found!\n", __func__);
364                 return 0;
365         }
366
367         ptr = bb->mb_virt + TEGRA_BB_REG_MAILBOX;
368         status = *ptr & 0xFFFF;
369
370         dev_dbg(dev, "%s status=%x\n", __func__, status);
371         return sprintf(buf, "%d\n", status);
372 }
373
374 static ssize_t store_tegra_bb_status(struct device *dev,
375                                       struct device_attribute *attr,
376                                       const char *buf, size_t count)
377 {
378         int ret, value;
379         unsigned int *ptr;
380         struct tegra_bb *bb = dev_get_drvdata(dev);
381         struct platform_device *pdev = container_of(dev, struct platform_device,
382                                                     dev);
383         if (!bb) {
384                 dev_err(dev, "%s tegra_bb not found!\n", __func__);
385                 return 0;
386         }
387
388         ret = sscanf(buf, "%d", &value);
389         if (ret != 1)
390                 return -1;
391         value &= 0xFFFF;
392         ptr = bb->mb_virt + TEGRA_BB_REG_MAILBOX;
393         *ptr = (value & 0xFFFF) | ((~value << 16) & 0xFFFF0000);
394         tegra_bb_generate_ipc(pdev);
395         dev_dbg(dev, "%s status=0x%x\n",  __func__, (unsigned int)value);
396         return count;
397 }
398
399 static DEVICE_ATTR(status, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP,
400                    show_tegra_bb_status, store_tegra_bb_status);
401
402 static ssize_t show_tegra_bb_priv_size(struct device *dev,
403                                     struct device_attribute *attr,
404                                     char *buf)
405 {
406         struct tegra_bb *bb = dev_get_drvdata(dev);
407
408         if (!bb) {
409                 dev_err(dev, "%s tegra_bb not found!\n", __func__);
410                 return 0;
411         }
412
413         dev_dbg(dev, "%s priv_size=%d\n", __func__,
414                  (unsigned int)bb->priv_size);
415         return sprintf(buf, "%d\n", (int)bb->priv_size);
416 }
417 static DEVICE_ATTR(priv_size, S_IRUSR | S_IRGRP, show_tegra_bb_priv_size, NULL);
418
419 static ssize_t show_tegra_bb_ipc_size(struct device *dev,
420                                       struct device_attribute *attr,
421                                       char *buf)
422 {
423         struct tegra_bb *bb = dev_get_drvdata(dev);
424
425         if (!bb) {
426                 dev_err(dev, "%s tegra_bb not found!\n", __func__);
427                 return 0;
428         }
429
430         dev_dbg(dev, "%s ipc_size=%d\n", __func__, (unsigned int)bb->ipc_size);
431         return sprintf(buf, "%d\n", (int)bb->ipc_size);
432 }
433 static DEVICE_ATTR(ipc_size, S_IRUSR | S_IRGRP, show_tegra_bb_ipc_size, NULL);
434
435 static ssize_t store_tegra_bb_reset(struct device *dev,
436                                       struct device_attribute *attr,
437                                       const char *buf, size_t count)
438 {
439         int ret, value;
440         static bool regulator_status;
441         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
442         struct tegra_bb *bb = dev_get_drvdata(dev);
443
444         if (!bb) {
445                 dev_err(dev, "%s tegra_bb not found!\n", __func__);
446                 return 0;
447         }
448
449         ret = sscanf(buf, "%d", &value);
450
451         if (ret != 1)
452                 return -1;
453
454         if ((value < 0) || (value > 1))
455                 return -EINVAL;
456
457         dev_dbg(dev, "%s reset=%d\n",  __func__, (unsigned int)value);
458
459         /* reset is active low - sysfs interface assume reset is active high */
460         if (value) {
461                 writel(1 << AP2BB_RESET_SHIFT | 1 << AP2BB_MEM_STS_SHIFT,
462                         pmc + PMC_IPC_CLEAR_0);
463
464                 if (regulator_status == true) {
465                         pr_debug("%s: disabling bbc regulators\n", __func__);
466                         regulator_disable(bb->vdd_bb_core);
467                         regulator_disable(bb->vdd_bb_pll);
468
469                         regulator_status = false;
470                 }
471
472                 bb->state = BBC_REMOVE_FLOOR;
473                 queue_work(bb->workqueue, &bb->work);
474         } else {
475                 /* power on bbc rails */
476                 if (bb->vdd_bb_core && bb->vdd_bb_pll &&
477                                 regulator_status == false) {
478                         pr_debug("%s: enabling bbc regulators\n", __func__);
479                         regulator_set_voltage(bb->vdd_bb_core, 1100000,
480                                                         1100000);
481                         regulator_enable(bb->vdd_bb_core);
482
483                         regulator_set_voltage(bb->vdd_bb_pll, 1100000,
484                                                         1100000);
485                         regulator_enable(bb->vdd_bb_pll);
486                         regulator_status = true;
487
488                         tegra_bb_enable_mem_req_soon();
489                 }
490
491                 writel(1 << AP2BB_RESET_SHIFT | 1 << AP2BB_MEM_STS_SHIFT,
492                         pmc + PMC_IPC_SET_0);
493         }
494
495         return ret;
496 }
497
498 static ssize_t show_tegra_bb_reset(struct device *dev,
499                                       struct device_attribute *attr,
500                                       char *buf)
501 {
502         int sts;
503         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
504         /* reset is active low - sysfs interface assume reset is active high */
505
506         sts = readl(pmc + PMC_IPC_STS_0);
507         dev_dbg(dev, "%s IPC_STS=0x%x\n", __func__, (unsigned int)sts);
508         sts = ~sts >> AP2BB_RESET_SHIFT;
509         sts &= AP2BB_RESET_DEFAULT_MASK;
510
511         dev_dbg(dev, "%s reset=%d\n", __func__, (unsigned int)sts);
512         return sprintf(buf, "%d\n", (int)sts);
513 }
514
515 static DEVICE_ATTR(reset, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP,
516                    show_tegra_bb_reset, store_tegra_bb_reset);
517
518 static ssize_t show_tegra_bb_state(struct device *dev,
519                                       struct device_attribute *attr,
520                                       char *buf)
521 {
522         unsigned int sts, mem_req, mem_req_soon;
523         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
524
525         sts = readl(pmc + PMC_IPC_STS_0);
526         dev_dbg(dev, "%s IPC_STS=0x%x\n", __func__, (unsigned int)sts);
527
528         mem_req = (sts >> BB2AP_MEM_REQ_SHIFT) & 1;
529         mem_req_soon = (sts >> BB2AP_MEM_REQ_SOON_SHIFT) & 1;
530
531         dev_dbg(dev, "%s mem_req=%d mem_req_soon=%d\n", __func__,
532                                         mem_req, mem_req_soon);
533         return sprintf(buf, "%d\n", (unsigned int)mem_req);
534 }
535
536 static DEVICE_ATTR(state, S_IRUSR | S_IRGRP, show_tegra_bb_state, NULL);
537
538 static ssize_t show_tegra_bb_serial(struct device *dev,
539                                       struct device_attribute *attr, char *buf)
540 {
541         struct tegra_bb *bb = dev_get_drvdata(dev);
542         int idx, ret;
543
544         if (!bb) {
545                 dev_err(dev, "%s tegra_bb not found!\n", __func__);
546                 return 0;
547         }
548
549         for (idx = 0; NVSHM_SERIAL_BYTE_SIZE > idx; ++idx) {
550                 ret = sprintf(buf+2*idx, "%02X", bb->ipc_serial[idx]);
551                 if (ret < 0) {
552                         dev_err(dev, "%s sprintf shm serial failure!\n",
553                                         __func__);
554                         return 0;
555                 }
556         }
557
558         buf[2*NVSHM_SERIAL_BYTE_SIZE] = '\n';
559
560         return (2*NVSHM_SERIAL_BYTE_SIZE+1);
561 }
562
563 static DEVICE_ATTR(serial, S_IRUSR | S_IRGRP, show_tegra_bb_serial, NULL);
564
565 void tegra_bb_set_ipc_serial(struct platform_device *pdev, char *serial)
566 {
567         struct tegra_bb *bb = platform_get_drvdata(pdev);
568
569         if (!bb) {
570                 dev_err(&pdev->dev, "%s tegra_bb not found!\n", __func__);
571                 return;
572         }
573
574         if (serial == NULL) {
575                 /* Remove sysfs entry */
576                 device_remove_file(&pdev->dev, &dev_attr_serial);
577                 return;
578         }
579
580         /* Create sysfs entry */
581         device_create_file(&pdev->dev, &dev_attr_serial);
582
583         /* Locally store serail number for future sysfs access */
584         memcpy(bb->ipc_serial, serial, sizeof(bb->ipc_serial));
585 }
586 EXPORT_SYMBOL_GPL(tegra_bb_set_ipc_serial);
587
588 #ifndef CONFIG_TEGRA_BASEBAND_SIMU
589 static irqreturn_t tegra_bb_isr_handler(int irq, void *data)
590 {
591         struct tegra_bb *bb = (struct tegra_bb *)data;
592         void __iomem *fctrl = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE);
593         unsigned long irq_flags;
594         int sts;
595
596         disable_irq_nosync(irq);
597 #ifdef CONFIG_PM
598         if (bb->is_suspending)
599                 pm_wakeup_event(bb->dev, 0);
600 #endif
601
602         spin_lock_irqsave(&bb->lock, irq_flags);
603         /* read/clear INT status */
604         sts = readl(fctrl + FLOW_IPC_STS_0);
605         if (sts & (1 << BB2AP_INT0_STS_SHIFT))
606                 writel(1 << BB2AP_INT0_STS_SHIFT, fctrl + FLOW_IPC_CLR_0);
607
608         spin_unlock_irqrestore(&bb->lock, irq_flags);
609         /* wake IPC mechanism */
610         if (bb->ipc_cb)
611                 bb->ipc_cb(bb->ipc_cb_data);
612
613         /* Notify sysfs */
614         sts = *(unsigned int *)bb->mb_virt & TEGRA_BB_STATUS_MASK;
615
616         if ((bb->status != TEGRA_BB_IPC_READY) ||
617             (bb->status != sts)) {
618                 pr_debug("%s: notify sysfs status %d\n", __func__, sts);
619                 sysfs_notify_dirent(bb->sd);
620         }
621
622         if (sts == TEGRA_BB_BOOT_RESTART_FW_REQ) {
623                 pr_debug("%s: boot_restart_fw_req\n", __func__);
624                 bb->state = BBC_CRASHDUMP_FLOOR;
625                 queue_work(bb->workqueue, &bb->work);
626         }
627
628         bb->status = sts;
629         return IRQ_HANDLED;
630 }
631
632 static irqreturn_t tegra_bb_mem_req_soon(int irq, void *data)
633 {
634         struct tegra_bb *bb = (struct tegra_bb *)data;
635         void __iomem *fctrl = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE);
636         u32 fc_sts;
637
638         spin_lock(&bb->lock);
639         /* clear the interrupt */
640         fc_sts = readl(fctrl + FLOW_IPC_STS_0);
641         if (fc_sts & (0x8 << AP2BB_MSC_STS_SHIFT)) {
642
643                 writel((0x8 << AP2BB_MSC_STS_SHIFT), fctrl + FLOW_IPC_CLR_0);
644
645                 irq_set_irq_type(bb->mem_req_soon, IRQF_TRIGGER_RISING);
646                 bb->state = BBC_SET_FLOOR;
647                 queue_work(bb->workqueue, &bb->work);
648         }
649         spin_unlock(&bb->lock);
650
651         return IRQ_HANDLED;
652 }
653
654 static inline void pmc_32kwritel(u32 val, unsigned long offs)
655 {
656         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
657         writel(val, pmc + offs);
658         udelay(130);
659 }
660
661 static void tegra_bb_enable_pmc_wake(void)
662 {
663         /* Set PMC wake interrupt on active low
664          * please see Bug 1181348 for details of SW WAR
665          */
666         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
667         u32 reg = readl(pmc + PMC_CTRL2);
668         reg &= ~(PMC_CTRL2_WAKE_DET_EN);
669         pmc_32kwritel(reg, PMC_CTRL2);
670
671         reg = readl(pmc + PMC_WAKE2_LEVEL);
672         reg &= ~(PMC_WAKE2_BB_MEM_REQ);
673         pmc_32kwritel(reg, PMC_WAKE2_LEVEL);
674
675         usleep_range(1000, 1100);
676         pmc_32kwritel(1, PMC_AUTO_WAKE_LVL);
677
678         usleep_range(1000, 1100);
679         reg = readl(pmc + PMC_WAKE2_MASK);
680         reg |= PMC_WAKE2_BB_MEM_REQ;
681         pmc_32kwritel(reg, PMC_WAKE2_MASK);
682
683         reg = readl(pmc + PMC_CTRL2);
684         reg |= PMC_CTRL2_WAKE_DET_EN;
685         pmc_32kwritel(reg, PMC_CTRL2);
686
687         pr_debug("%s\n", __func__);
688 }
689
690 static irqreturn_t tegra_pmc_wake_intr(int irq, void *data)
691 {
692         struct tegra_bb *bb = (struct tegra_bb *)data;
693         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
694         static void __iomem *tert_ictlr = IO_ADDRESS(TEGRA_TERTIARY_ICTLR_BASE);
695         u32 lic, sts;
696         int mem_req_soon;
697
698         spin_lock(&bb->lock);
699         sts = readl(pmc + PMC_IPC_STS_0);
700         mem_req_soon = (sts >> BB2AP_MEM_REQ_SOON_SHIFT) & 1;
701
702         /* clear interrupt */
703         lic = readl(tert_ictlr + TRI_ICTLR_VIRQ_CPU);
704         if (lic & TRI_ICTLR_PMC_WAKE_INT)
705                 writel(TRI_ICTLR_PMC_WAKE_INT,
706                                 tert_ictlr + TRI_ICTLR_CPU_IER_CLR);
707
708         irq_set_irq_type(INT_PMC_WAKE_INT, IRQF_TRIGGER_RISING);
709         if (!mem_req_soon) {
710
711                 bb->state = BBC_REMOVE_FLOOR;
712                 queue_work(bb->workqueue, &bb->work);
713         }
714         spin_unlock(&bb->lock);
715
716         return IRQ_HANDLED;
717 }
718
719 static void tegra_bb_emc_dvfs(struct work_struct *work)
720 {
721         struct tegra_bb *bb = container_of(work, struct tegra_bb, work);
722         unsigned long flags;
723
724         if (!bb)
725                 return;
726
727         spin_lock_irqsave(&bb->lock, flags);
728         if (bb->prev_state == bb->state) {
729                 spin_unlock_irqrestore(&bb->lock, flags);
730                 return;
731         }
732
733         switch (bb->state) {
734         case BBC_SET_FLOOR:
735                 bb->prev_state = bb->state;
736                 spin_unlock_irqrestore(&bb->lock, flags);
737
738                 pm_runtime_get_sync(bb->dev);
739                 /* going from 0 to high */
740                 clk_prepare_enable(bb->emc_clk);
741                 if (bb->emc_flags & EMC_DSR)
742                         tegra_emc_dsr_override(TEGRA_EMC_DSR_OVERRIDE);
743                 clk_set_rate(bb->emc_clk, bb->emc_min_freq);
744                 pr_debug("bbc setting floor to %lu\nMHz",
745                                                 bb->emc_min_freq/1000000);
746
747                 /* restore iso bw request*/
748                 tegra_bbc_proxy_restore_iso(bb->proxy_dev);
749
750                 /* reenable pmc_wake_det irq */
751                 tegra_bb_enable_pmc_wake();
752                 irq_set_irq_type(INT_PMC_WAKE_INT, IRQF_TRIGGER_HIGH);
753                 return;
754         case BBC_REMOVE_FLOOR:
755                 /* discard erroneous request */
756                 if (bb->prev_state != BBC_SET_FLOOR) {
757                         spin_unlock_irqrestore(&bb->lock, flags);
758                         return;
759                 }
760                 bb->prev_state = bb->state;
761                 spin_unlock_irqrestore(&bb->lock, flags);
762
763                 /* remove iso bandwitdh request from bbc */
764                 tegra_bbc_proxy_clear_iso(bb->proxy_dev);
765
766                 /* going from high to 0 */
767                 if (bb->emc_flags & EMC_DSR)
768                         tegra_emc_dsr_override(TEGRA_EMC_DSR_NORMAL);
769                 clk_set_rate(bb->emc_clk, 0);
770                 clk_disable_unprepare(bb->emc_clk);
771                 pr_debug("bbc removing emc floor\n");
772
773                 /* reenable mem_req_soon irq */
774                 tegra_bb_enable_mem_req_soon();
775                 irq_set_irq_type(bb->mem_req_soon, IRQF_TRIGGER_HIGH);
776                 pm_runtime_put(bb->dev);
777                 return;
778
779         case BBC_CRASHDUMP_FLOOR:
780                 /* BBC is crashed and ready to send coredump.
781                  * do not store prev_state */
782                 spin_unlock_irqrestore(&bb->lock, flags);
783
784                 pr_info("%s: bbc crash detected, set EMC to max\n", __func__);
785                 if (bb->prev_state != BBC_SET_FLOOR) {
786                         pm_runtime_get_sync(bb->dev);
787                         clk_prepare_enable(bb->emc_clk);
788                 }
789
790                 tegra_emc_dsr_override(TEGRA_EMC_DSR_OVERRIDE);
791                 clk_set_rate(bb->emc_clk, BBC_MC_MAX_FREQ);
792                 return;
793         default:
794                 spin_unlock_irqrestore(&bb->lock, flags);
795                 break;
796         }
797
798         return;
799 }
800
801 void tegra_bb_set_emc_floor(struct device *dev, unsigned long freq, u32 flags)
802 {
803         struct tegra_bb *bb = dev_get_drvdata(dev);
804
805         if (!bb) {
806                 dev_err(dev, "%s tegra_bb not found!\n", __func__);
807                 return;
808         }
809
810         if (bb->emc_min_freq != freq) {
811                 bb->emc_min_freq = freq;
812                 clk_set_rate(bb->emc_clk, bb->emc_min_freq);
813         }
814
815         bb->emc_flags = flags;
816         return;
817 }
818 EXPORT_SYMBOL(tegra_bb_set_emc_floor);
819
820 #endif
821
822 static int tegra_bb_pm_notifier_event(struct notifier_block *this,
823                                         unsigned long event, void *ptr)
824 {
825         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
826         struct tegra_bb *bb = container_of(this, struct tegra_bb, pm_notifier);
827         int sts, mem_req_soon;
828
829         if (!bb) {
830                 pr_err("tegra_bb not found!\n");
831                 return NOTIFY_OK;
832         }
833
834         sts = readl(pmc + PMC_IPC_STS_0);
835         mem_req_soon = (sts >> BB2AP_MEM_REQ_SOON_SHIFT) & 1;
836         sts = sts >> AP2BB_RESET_SHIFT;
837         sts &= AP2BB_RESET_DEFAULT_MASK;
838
839         switch (event) {
840         case PM_SUSPEND_PREPARE:
841                 /* make sure IRQ will send a pm wake event */
842                 bb->is_suspending = true;
843
844                 /* inform tegra_common_suspend about EMC requirement */
845                 tegra_lp1bb_suspend_emc_rate(bb->emc_min_freq, BBC_MC_MIN_FREQ);
846
847                 /* prepare for possible LP1BB state */
848                 if (sts)
849                         clk_set_rate(bb->emc_clk, BBC_MC_MIN_FREQ);
850
851                 return NOTIFY_OK;
852
853         case PM_POST_SUSPEND:
854                 /* no need for IRQ to send a pm wake events anymore */
855                 bb->is_suspending = false;
856
857                 if (sts && !mem_req_soon) {
858                         pr_debug("bbc is inactive, remove floor\n");
859                         clk_set_rate(bb->emc_clk, 0);
860                 }
861                 /* else, wait for IRQs to do the job */
862                 return NOTIFY_OK;
863         }
864         return NOTIFY_DONE;
865 }
866
867 static int tegra_bb_probe(struct platform_device *pdev)
868 {
869         struct tegra_bb *bb;
870         int ret;
871         struct tegra_bb_platform_data *pdata;
872         void __iomem *tegra_mc = IO_ADDRESS(TEGRA_MC_BASE);
873         unsigned int size, bbc_mem_regions_0;
874         struct clk *c;
875         unsigned int mb_size = SZ_4K + SZ_128K; /* config + stats */
876
877         if (!pdev) {
878                 pr_err("%s platform device is NULL!\n", __func__);
879                 return -EINVAL;
880         }
881
882         pdata = pdev->dev.platform_data;
883
884         if (!pdata) {
885                 dev_err(&pdev->dev, "%s tegra_bb not found!\n", __func__);
886                 return -EINVAL;
887         }
888
889         dev_dbg(&pdev->dev, "%s\n", __func__);
890         bb =  kzalloc(sizeof(struct tegra_bb), GFP_KERNEL);
891
892         if (bb == NULL) {
893                 kfree(bb);
894                 return -ENOMEM;
895         }
896
897         spin_lock_init(&bb->lock);
898
899         /* Private region */
900         bbc_mem_regions_0 = readl(tegra_mc + MC_BBC_MEM_REGIONS_0_OFFSET);
901
902         pr_info("%s MC_BBC_MEM_REGIONS_0=0x%x\n", __func__, bbc_mem_regions_0);
903
904         size = (bbc_mem_regions_0 >> MC_BBC_MEM_REGIONS_0_PRIV_SIZE_SHIFT) &
905                 MC_BBC_MEM_REGIONS_0_PRIV_SIZE_MASK;
906
907         /* Private */
908         switch (size) {
909         case 0:
910                 bb->priv_size = SZ_8M;
911                 break;
912         case 1:
913                 bb->priv_size = SZ_16M;
914                 break;
915         case 2:
916                 bb->priv_size = SZ_32M;
917                 break;
918         case 3:
919                 bb->priv_size = SZ_64M;
920                 break;
921         case 7:
922                 pr_err("%s no private memory mapped\n", __func__);
923                 break;
924         default:
925                 pr_err("%s invalid private memory size 0x%x\n", __func__, size);
926                 break;
927         }
928
929         bb->priv_phy =
930                 ((bbc_mem_regions_0 >> MC_BBC_MEM_REGIONS_0_PRIV_BASE_SHIFT)
931                  & MC_BBC_MEM_REGIONS_0_PRIV_BASE_MASK) << 23;
932
933         /* IPC */
934         size = (bbc_mem_regions_0 >> MC_BBC_MEM_REGIONS_0_IPC_SIZE_SHIFT) &
935                 MC_BBC_MEM_REGIONS_0_IPC_SIZE_MASK;
936
937         switch (size) {
938         case 0:
939                 bb->ipc_size = SZ_8M;
940                 break;
941         case 1:
942                 bb->ipc_size = SZ_16M;
943                 break;
944         case 2:
945                 bb->ipc_size = SZ_32M;
946                 break;
947         case 3:
948                 bb->ipc_size = SZ_64M;
949                 break;
950         case 7:
951                 pr_err("%s no IPC memory mapped\n", __func__);
952                 break;
953         default:
954                 pr_err("%s invalid IPC  memory size 0x%x\n", __func__, size);
955                 break;
956         }
957
958         bb->ipc_phy =
959                 ((bbc_mem_regions_0 >> MC_BBC_MEM_REGIONS_0_IPC_BASE_SHIFT)
960                  & MC_BBC_MEM_REGIONS_0_IPC_BASE_MASK) << 23;
961
962         pr_info("%s  priv@0x%lx/0x%lx\n", __func__,
963                  (unsigned long)bb->priv_phy,
964                 bb->priv_size);
965
966         pr_info("%s  ipc@0x%lx/0x%lx\n", __func__,
967                  (unsigned long)bb->ipc_phy,
968                 bb->ipc_size);
969
970         if (!(bb->ipc_size && bb->priv_size)) {
971                 pr_err("%s: invalid tegra_bb regions\n", __func__);
972                 BUG();
973         }
974
975         bb->irq = pdata->bb_irq;
976         bb->mem_req_soon = pdata->mem_req_soon;
977
978         /* Map mb_virt uncached (first 132K of IPC for config + statistics) */
979         bb->mb_virt = ioremap_nocache(bb->ipc_phy, mb_size);
980         pr_debug("%s: uncached IPC Virtual=0x%p\n", __func__, bb->mb_virt);
981
982         /* IPC memory is cached */
983         bb->ipc_virt =  ioremap_cached(bb->ipc_phy, bb->ipc_size);
984         pr_debug("%s: IPC Virtual=0x%p\n", __func__, bb->ipc_virt);
985
986         /* clear the first 4K of IPC memory */
987         memset(bb->mb_virt, 0, SZ_1K*4);
988
989         /* init value of cold boot */
990         *(unsigned int *)bb->mb_virt = TEGRA_BB_IPC_COLDBOOT |
991                 ((~TEGRA_BB_IPC_COLDBOOT) << 16);
992
993         /* Register devs */
994         bb->dev_priv.minor = MISC_DYNAMIC_MINOR;
995         snprintf(bb->priv_name, sizeof(bb->priv_name),
996                  "tegra_bb_priv%d", pdev->id);
997
998         bb->dev_priv.name = bb->priv_name;
999         bb->dev_priv.fops = &tegra_bb_priv_fops;
1000         bb->dev_priv.parent = &pdev->dev;
1001
1002         bb->dev_ipc.minor = MISC_DYNAMIC_MINOR;
1003         snprintf(bb->ipc_name, sizeof(bb->ipc_name),
1004                  "tegra_bb_ipc%d",
1005                  pdev->id);
1006
1007         bb->dev_ipc.name = bb->ipc_name;
1008         bb->dev_ipc.fops = &tegra_bb_ipc_fops;
1009         bb->dev_ipc.parent = &pdev->dev;
1010
1011         ret = misc_register(&bb->dev_priv);
1012         if (ret) {
1013                 dev_err(&pdev->dev, "unable to register miscdevice %s\n",
1014                         bb->dev_priv.name);
1015                 kfree(bb);
1016                 return -EAGAIN;
1017         }
1018
1019         ret = misc_register(&bb->dev_ipc);
1020         if (ret) {
1021                 dev_err(&pdev->dev, "unable to register miscdevice %s\n",
1022                         bb->dev_ipc.name);
1023                 kfree(bb);
1024                 return -EAGAIN;
1025         }
1026
1027         bb->dev = &pdev->dev;
1028         bb->instance = pdev->id;
1029         bb->status = 0;
1030
1031         ret = device_create_file(&pdev->dev, &dev_attr_status);
1032         ret = device_create_file(&pdev->dev, &dev_attr_retcode);
1033         ret = device_create_file(&pdev->dev, &dev_attr_priv_size);
1034         ret = device_create_file(&pdev->dev, &dev_attr_ipc_size);
1035         ret = device_create_file(&pdev->dev, &dev_attr_reset);
1036         ret = device_create_file(&pdev->dev, &dev_attr_state);
1037
1038         bb->sd = sysfs_get_dirent(pdev->dev.kobj.sd, NULL, "status");
1039
1040         bb->vdd_bb_core = regulator_get(NULL, "vdd_bb");
1041         if (IS_ERR(bb->vdd_bb_core)) {
1042                 pr_err("vdd_bb regulator get failed\n");
1043                 bb->vdd_bb_core = NULL;
1044         }
1045
1046         bb->vdd_bb_pll = regulator_get(NULL, "avdd_bb_pll");
1047         if (IS_ERR(bb->vdd_bb_pll)) {
1048                 pr_err("avdd_bb_pll regulator get failed\n");
1049                 bb->vdd_bb_pll = NULL;
1050         }
1051
1052         /* clk enable for mc_bbc / pll_p_bbc */
1053         c = tegra_get_clock_by_name("mc_bbc");
1054         if (IS_ERR(c))
1055                 pr_err("mc_bbc get failed\n");
1056         else
1057                 clk_enable(c);
1058         c = tegra_get_clock_by_name("pll_p_bbc");
1059         if (IS_ERR(c))
1060                 pr_err("pll_p_bbc get failed\n");
1061         else
1062                 clk_enable(c);
1063
1064         bb->nvshm_pdata.ipc_base_virt = bb->ipc_virt;
1065         bb->nvshm_pdata.ipc_size = bb->ipc_size;
1066         bb->nvshm_pdata.mb_base_virt = bb->mb_virt;
1067         bb->nvshm_pdata.mb_size = mb_size;
1068         bb->nvshm_pdata.bb_irq = bb->irq;
1069         bb->nvshm_pdata.tegra_bb = pdev;
1070         bb->nvshm_device.name = "nvshm";
1071         bb->nvshm_device.id = bb->instance;
1072         bb->nvshm_device.dev.platform_data = &bb->nvshm_pdata;
1073         platform_device_register(&bb->nvshm_device);
1074
1075         tegra_pd_add_device(&pdev->dev);
1076         pm_runtime_enable(&pdev->dev);
1077
1078 #ifndef CONFIG_TEGRA_BASEBAND_SIMU
1079         snprintf(bb->name, sizeof(bb->name), "tegra_bb%d", pdev->id);
1080
1081         ret = request_irq(bb->irq, tegra_bb_isr_handler, IRQF_TRIGGER_HIGH,
1082                                 bb->name, bb);
1083         if (ret) {
1084                 dev_err(&pdev->dev, "Could not register irq handler\n");
1085                 kfree(bb);
1086                 return -EAGAIN;
1087         }
1088
1089         ret = enable_irq_wake(bb->irq);
1090         if (ret) {
1091                 dev_err(&pdev->dev, "set enable_irq_wake failed\n");
1092                 kfree(bb);
1093                 return -EAGAIN;
1094         }
1095
1096         /* setup emc dvfs request framework */
1097         bb->emc_clk = clk_get(&pdev->dev, "emc_fl");
1098         if (IS_ERR(bb->emc_clk)) {
1099                 dev_err(&pdev->dev, "can't get emc clock\n");
1100                 kfree(bb);
1101                 return -ENOENT;
1102         }
1103
1104         bb->workqueue = alloc_workqueue("bbc-pm", WQ_HIGHPRI, 1);
1105         if (!bb->workqueue) {
1106                 dev_err(&pdev->dev, "failed to create workqueue\n");
1107                 kfree(bb);
1108                 return -ENOMEM;
1109         }
1110         INIT_WORK(&bb->work, tegra_bb_emc_dvfs);
1111
1112         bb->emc_min_freq = BBC_MC_MIN_FREQ;
1113         bb->emc_flags = EMC_DSR;
1114
1115         /* get bbc proxy device struct, it should be registered
1116          * before this driver.
1117          */
1118         bb->proxy_dev = bus_find_device_by_name(&platform_bus_type,  NULL,
1119                                 "tegra_bbc_proxy");
1120         if (!bb->proxy_dev)
1121                 dev_warn(&pdev->dev, "%s: bbc proxy device not found!\n",
1122                                 __func__);
1123
1124         ret = request_irq(bb->mem_req_soon, tegra_bb_mem_req_soon,
1125                         IRQF_TRIGGER_RISING, "bb_mem_req_soon", bb);
1126         if (ret) {
1127                 dev_err(&pdev->dev, "Could not register mem_req_soon irq\n");
1128                 kfree(bb);
1129                 return -EAGAIN;
1130         }
1131         tegra_bb_enable_mem_req_soon();
1132
1133         ret = request_irq(INT_PMC_WAKE_INT, tegra_pmc_wake_intr,
1134                         IRQF_TRIGGER_RISING, "tegra_pmc_wake_intr", bb);
1135         if (ret) {
1136                 dev_err(&pdev->dev,
1137                         "Could not register pmc_wake_int irq handler\n");
1138                 kfree(bb);
1139                 return -EAGAIN;
1140         }
1141
1142         bb->pm_notifier.notifier_call = tegra_bb_pm_notifier_event;
1143         register_pm_notifier(&bb->pm_notifier);
1144 #endif
1145         bb->is_suspending = false;
1146
1147         dev_set_drvdata(&pdev->dev, bb);
1148         return 0;
1149 }
1150
1151 #ifdef CONFIG_PM
1152 static int tegra_bb_suspend(struct device *dev)
1153 {
1154         dev_dbg(dev, "%s\n", __func__);
1155
1156         return 0;
1157 }
1158
1159 static int tegra_bb_resume(struct device *dev)
1160 {
1161 #ifndef CONFIG_TEGRA_BASEBAND_SIMU
1162         struct tegra_bb *bb = dev_get_drvdata(dev);
1163 #endif
1164         dev_dbg(dev, "%s\n", __func__);
1165
1166 #ifndef CONFIG_TEGRA_BASEBAND_SIMU
1167
1168         tegra_bb_enable_mem_req_soon();
1169         irq_set_irq_type(bb->mem_req_soon, IRQF_TRIGGER_HIGH);
1170
1171         tegra_bb_enable_pmc_wake();
1172         irq_set_irq_type(INT_PMC_WAKE_INT, IRQF_TRIGGER_HIGH);
1173 #endif
1174         return 0;
1175 }
1176
1177 static int tegra_bb_suspend_noirq(struct device *dev)
1178 {
1179         dev_dbg(dev, "%s\n", __func__);
1180
1181         /* abort suspend if IPC interrupt is pending*/
1182         if (tegra_bb_check_bb2ap_ipc())
1183                 return -EBUSY;
1184         return 0;
1185 }
1186
1187 static int tegra_bb_resume_noirq(struct device *dev)
1188 {
1189         return 0;
1190 }
1191
1192 static const struct dev_pm_ops tegra_bb_pm_ops = {
1193         .suspend_noirq = tegra_bb_suspend_noirq,
1194         .resume_noirq = tegra_bb_resume_noirq,
1195         .suspend = tegra_bb_suspend,
1196         .resume = tegra_bb_resume,
1197 };
1198 #endif
1199
1200 static struct platform_driver tegra_bb_driver = {
1201         .driver = {
1202                 .name = "tegra_bb",
1203                 .owner = THIS_MODULE,
1204 #ifdef CONFIG_PM
1205                 .pm = &tegra_bb_pm_ops,
1206 #endif
1207         },
1208         .probe = tegra_bb_probe,
1209 };
1210
1211 static int __init tegra_bb_init(void)
1212 {
1213         int ret;
1214         ret = platform_driver_register(&tegra_bb_driver);
1215         pr_debug("%s ret %d\n", __func__, ret);
1216         return ret;
1217 }
1218
1219 static void __exit tegra_bb_exit(void)
1220 {
1221         pr_debug("%s\n", __func__);
1222         platform_driver_unregister(&tegra_bb_driver);
1223 }
1224
1225 fs_initcall(tegra_bb_init);
1226 module_exit(tegra_bb_exit);
1227
1228 #ifdef CONFIG_DEBUG_FS
1229 static struct dentry *bb_debugfs_root;
1230 static enum pmc_event_sel {
1231         PMC_EVENT_NONE,
1232         PMC_EVENT_LP0BB,
1233         PMC_EVENT_LP0ACTIVE,
1234 } pmc_event_sel;
1235
1236 static int lp0bb_transitions_set(void *data, u64 val)
1237 {
1238         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
1239         u32 reg;
1240
1241         if (!val) {
1242                 /* disable event counting and clear counter */
1243                 reg = 0;
1244                 writel(reg, pmc + PMC_EVENT_COUNTER_0);
1245                 pmc_event_sel = PMC_EVENT_NONE;
1246         } else if (val == 1) {
1247                 reg = PMC_EVENT_COUNTER_0_EN_MASK | PMC_EVENT_COUNTER_0_LP0BB;
1248                  /* lp0->lp0bb transitions */
1249                 writel(reg, pmc + PMC_EVENT_COUNTER_0);
1250                 pmc_event_sel = PMC_EVENT_LP0BB;
1251         }
1252         return 0;
1253 }
1254
1255 static inline unsigned long read_pmc_event_counter(void)
1256 {
1257         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
1258         u32 reg = readl(pmc + PMC_EVENT_COUNTER_0);
1259         /* hw event counter is 16 bit */
1260         reg = reg & 0xffff;
1261         return reg;
1262 }
1263
1264 static int lp0bb_transitions_get(void *data, u64 *val)
1265 {
1266         if (pmc_event_sel == PMC_EVENT_LP0BB)
1267                 *val = (u32) read_pmc_event_counter();
1268         else
1269                 *val = 0;
1270         return 0;
1271 }
1272 DEFINE_SIMPLE_ATTRIBUTE(lp0bb_fops, lp0bb_transitions_get,
1273                 lp0bb_transitions_set, "%lld\n");
1274
1275 static int lp0active_transitions_set(void *data, u64 val)
1276 {
1277         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
1278         u32 reg;
1279
1280         if (!val) {
1281                 /* disable event counting and clear counter */
1282                 reg = 0;
1283                 writel(reg, pmc + PMC_EVENT_COUNTER_0);
1284                 pmc_event_sel = PMC_EVENT_NONE;
1285         } else if (val == 1) {
1286                 reg = PMC_EVENT_COUNTER_0_EN_MASK |
1287                                 PMC_EVENT_COUNTER_0_LP0ACTIVE;
1288                  /* lp0->active transitions */
1289                 writel(reg, pmc + PMC_EVENT_COUNTER_0);
1290                 pmc_event_sel = PMC_EVENT_LP0ACTIVE;
1291         }
1292         return 0;
1293 }
1294 static int lp0active_transitions_get(void *data, u64 *val)
1295 {
1296         if (pmc_event_sel == PMC_EVENT_LP0ACTIVE)
1297                 *val = (u32) read_pmc_event_counter();
1298         else
1299                 *val = 0;
1300         return 0;
1301 }
1302 DEFINE_SIMPLE_ATTRIBUTE(lp0active_fops, lp0active_transitions_get,
1303                 lp0active_transitions_set, "%lld\n");
1304
1305 static int __init tegra_bb_debug_init(void)
1306 {
1307         struct dentry *d;
1308
1309         bb_debugfs_root = debugfs_create_dir("tegra_bb", NULL);
1310         if (!bb_debugfs_root)
1311                 return -ENOMEM;
1312
1313         d = debugfs_create_file("lp0bb_transitions", S_IWUSR | S_IRUGO,
1314                         bb_debugfs_root, NULL, &lp0bb_fops);
1315         if (!d)
1316                 goto err;
1317
1318         d = debugfs_create_file("lp0active_transitions", S_IWUSR | S_IRUGO,
1319                         bb_debugfs_root, NULL, &lp0active_fops);
1320         if (!d)
1321                 goto err;
1322
1323         return 0;
1324 err:
1325         debugfs_remove_recursive(bb_debugfs_root);
1326         return -ENOMEM;
1327 }
1328
1329 late_initcall(tegra_bb_debug_init);
1330 #endif
1331
1332 MODULE_DESCRIPTION("Tegra T148 BB Module");
1333 MODULE_LICENSE("GPL");