f76554dd3fc55688dff7ac7c43af683497211517
[linux-3.10.git] / arch / arm / mach-tegra / tegra3_actmon.c
1 /*
2  * Copyright (c) 2012-2013, NVIDIA CORPORATION.  All rights reserved
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; version 2 of the License.
7  *
8  * This program is distributed in the hope that it will be useful, but WITHOUT
9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11  * more details.
12  *
13  * You should have received a copy of the GNU General Public License along
14  * with this program; if not, write to the Free Software Foundation, Inc.,
15  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
16  */
17
18 #include <linux/kernel.h>
19 #include <linux/spinlock.h>
20 #include <linux/err.h>
21 #include <linux/io.h>
22 #include <linux/clk.h>
23 #include <linux/clk/tegra.h>
24 #include <linux/interrupt.h>
25 #include <linux/suspend.h>
26 #include <linux/debugfs.h>
27 #include <linux/seq_file.h>
28 #include <linux/uaccess.h>
29 #include <linux/module.h>
30
31 #include <mach/irqs.h>
32
33 #include "clock.h"
34 #include "iomap.h"
35
36 #define ACTMON_GLB_STATUS                       0x00
37 #define ACTMON_GLB_PERIOD_CTRL                  0x04
38
39 #define ACTMON_DEV_CTRL                         0x00
40 #define ACTMON_DEV_CTRL_ENB                     (0x1 << 31)
41 #define ACTMON_DEV_CTRL_UP_WMARK_ENB            (0x1 << 30)
42 #define ACTMON_DEV_CTRL_DOWN_WMARK_ENB          (0x1 << 29)
43 #define ACTMON_DEV_CTRL_UP_WMARK_NUM_SHIFT      26
44 #define ACTMON_DEV_CTRL_UP_WMARK_NUM_MASK       (0x7 << 26)
45 #define ACTMON_DEV_CTRL_DOWN_WMARK_NUM_SHIFT    23
46 #define ACTMON_DEV_CTRL_DOWN_WMARK_NUM_MASK     (0x7 << 23)
47 #define ACTMON_DEV_CTRL_AVG_UP_WMARK_ENB        (0x1 << 21)
48 #define ACTMON_DEV_CTRL_AVG_DOWN_WMARK_ENB      (0x1 << 20)
49 #define ACTMON_DEV_CTRL_PERIODIC_ENB            (0x1 << 18)
50 #define ACTMON_DEV_CTRL_K_VAL_SHIFT             10
51 #define ACTMON_DEV_CTRL_K_VAL_MASK              (0x7 << 10)
52
53 #define ACTMON_DEV_UP_WMARK                     0x04
54 #define ACTMON_DEV_DOWN_WMARK                   0x08
55 #define ACTMON_DEV_INIT_AVG                     0x0c
56 #define ACTMON_DEV_AVG_UP_WMARK                 0x10
57 #define ACTMON_DEV_AVG_DOWN_WMARK                       0x14
58
59 #define ACTMON_DEV_COUNT_WEGHT                  0x18
60 #define ACTMON_DEV_COUNT                        0x1c
61 #define ACTMON_DEV_AVG_COUNT                    0x20
62
63 #define ACTMON_DEV_INTR_STATUS                  0x24
64 #define ACTMON_DEV_INTR_UP_WMARK                (0x1 << 31)
65 #define ACTMON_DEV_INTR_DOWN_WMARK              (0x1 << 30)
66 #define ACTMON_DEV_INTR_AVG_DOWN_WMARK          (0x1 << 25)
67 #define ACTMON_DEV_INTR_AVG_UP_WMARK            (0x1 << 24)
68
69 #define ACTMON_DEFAULT_AVG_WINDOW_LOG2          6
70 #define ACTMON_DEFAULT_AVG_BAND                 6       /* 1/10 of % */
71
72 enum actmon_type {
73         ACTMON_LOAD_SAMPLER,
74         ACTMON_FREQ_SAMPLER,
75 };
76
77 enum actmon_state {
78         ACTMON_UNINITIALIZED = -1,
79         ACTMON_OFF = 0,
80         ACTMON_ON  = 1,
81         ACTMON_SUSPENDED = 2,
82 };
83
84 #define ACTMON_DEFAULT_SAMPLING_PERIOD          12
85 static u8 actmon_sampling_period;
86
87 static unsigned long actmon_clk_freq;
88
89 /* Maximum frequency EMC is running at when sourced from PLLP. This is
90  * really a short-cut, but it is true for all Tegra3  platforms
91  */
92 #define EMC_PLLP_FREQ_MAX                       204000
93
94 /* Units:
95  * - frequency in kHz
96  * - coefficients, and thresholds in %
97  * - sampling period in ms
98  * - window in sample periods (value = setting + 1)
99  */
100 struct actmon_dev {
101         u32             reg;
102         u32             glb_status_irq_mask;
103         const char      *dev_id;
104         const char      *con_id;
105         struct clk      *clk;
106
107         unsigned long   max_freq;
108         unsigned long   target_freq;
109         unsigned long   cur_freq;
110         unsigned long   suspend_freq;
111
112         unsigned long   avg_actv_freq;
113         unsigned long   avg_band_freq;
114         unsigned int    avg_sustain_coef;
115         u32             avg_count;
116
117         unsigned long   boost_freq;
118         unsigned long   boost_freq_step;
119         unsigned int    boost_up_coef;
120         unsigned int    boost_down_coef;
121         unsigned int    boost_up_threshold;
122         unsigned int    boost_down_threshold;
123
124         u8              up_wmark_window;
125         u8              down_wmark_window;
126         u8              avg_window_log2;
127         u32             count_weight;
128
129         enum actmon_type        type;
130         enum actmon_state       state;
131         enum actmon_state       saved_state;
132
133         spinlock_t      lock;
134
135         struct notifier_block   rate_change_nb;
136 };
137
138 static void __iomem *actmon_base = IO_ADDRESS(TEGRA_ACTMON_BASE);
139
140 static inline u32 actmon_readl(u32 offset)
141 {
142         return __raw_readl(actmon_base + offset);
143 }
144 static inline void actmon_writel(u32 val, u32 offset)
145 {
146         __raw_writel(val, actmon_base + offset);
147 }
148 static inline void actmon_wmb(void)
149 {
150         wmb();
151         actmon_readl(ACTMON_GLB_STATUS);
152 }
153
154 #define offs(x)         (dev->reg + x)
155
156 static inline unsigned long do_percent(unsigned long val, unsigned int pct)
157 {
158         return val * pct / 100;
159 }
160
161 static inline void actmon_dev_up_wmark_set(struct actmon_dev *dev)
162 {
163         u32 val;
164         unsigned long freq = (dev->type == ACTMON_FREQ_SAMPLER) ?
165                 dev->cur_freq : actmon_clk_freq;
166
167         val = freq * actmon_sampling_period;
168         actmon_writel(do_percent(val, dev->boost_up_threshold),
169                       offs(ACTMON_DEV_UP_WMARK));
170 }
171
172 static inline void actmon_dev_down_wmark_set(struct actmon_dev *dev)
173 {
174         u32 val;
175         unsigned long freq = (dev->type == ACTMON_FREQ_SAMPLER) ?
176                 dev->cur_freq : actmon_clk_freq;
177
178         val = freq * actmon_sampling_period;
179         actmon_writel(do_percent(val, dev->boost_down_threshold),
180                       offs(ACTMON_DEV_DOWN_WMARK));
181 }
182
183 static inline void actmon_dev_wmark_set(struct actmon_dev *dev)
184 {
185         u32 val;
186         unsigned long freq = (dev->type == ACTMON_FREQ_SAMPLER) ?
187                 dev->cur_freq : actmon_clk_freq;
188
189         val = freq * actmon_sampling_period;
190         actmon_writel(do_percent(val, dev->boost_up_threshold),
191                       offs(ACTMON_DEV_UP_WMARK));
192         actmon_writel(do_percent(val, dev->boost_down_threshold),
193                       offs(ACTMON_DEV_DOWN_WMARK));
194 }
195
196 static inline void actmon_dev_avg_wmark_set(struct actmon_dev *dev)
197 {
198         u32 avg = dev->avg_count;
199         u32 band = dev->avg_band_freq * actmon_sampling_period;
200
201         actmon_writel(avg + band, offs(ACTMON_DEV_AVG_UP_WMARK));
202         avg = max(avg, band);
203         actmon_writel(avg - band, offs(ACTMON_DEV_AVG_DOWN_WMARK));
204 }
205
206 static unsigned long actmon_dev_avg_freq_get(struct actmon_dev *dev)
207 {
208         u64 val;
209
210         if (dev->type == ACTMON_FREQ_SAMPLER)
211                 return dev->avg_count / actmon_sampling_period;
212
213         val = (u64)dev->avg_count * dev->cur_freq;
214         do_div(val, actmon_clk_freq * actmon_sampling_period);
215         return (u32)val;
216 }
217
218 /* Activity monitor sampling operations */
219 irqreturn_t actmon_dev_isr(int irq, void *dev_id)
220 {
221         u32 val;
222         unsigned long flags;
223         struct actmon_dev *dev = (struct actmon_dev *)dev_id;
224
225         val = actmon_readl(ACTMON_GLB_STATUS) & dev->glb_status_irq_mask;
226         if (!val)
227                 return IRQ_NONE;
228
229         spin_lock_irqsave(&dev->lock, flags);
230
231         dev->avg_count = actmon_readl(offs(ACTMON_DEV_AVG_COUNT));
232         actmon_dev_avg_wmark_set(dev);
233
234         val = actmon_readl(offs(ACTMON_DEV_INTR_STATUS));
235         if (val & ACTMON_DEV_INTR_UP_WMARK) {
236                 val = actmon_readl(offs(ACTMON_DEV_CTRL)) |
237                         ACTMON_DEV_CTRL_UP_WMARK_ENB |
238                         ACTMON_DEV_CTRL_DOWN_WMARK_ENB;
239
240                 dev->boost_freq = dev->boost_freq_step +
241                         do_percent(dev->boost_freq, dev->boost_up_coef);
242                 if (dev->boost_freq >= dev->max_freq) {
243                         dev->boost_freq = dev->max_freq;
244                         val &= ~ACTMON_DEV_CTRL_UP_WMARK_ENB;
245                 }
246                 actmon_writel(val, offs(ACTMON_DEV_CTRL));
247         } else if (val & ACTMON_DEV_INTR_DOWN_WMARK) {
248                 val = actmon_readl(offs(ACTMON_DEV_CTRL)) |
249                         ACTMON_DEV_CTRL_UP_WMARK_ENB |
250                         ACTMON_DEV_CTRL_DOWN_WMARK_ENB;
251
252                 dev->boost_freq =
253                         do_percent(dev->boost_freq, dev->boost_down_coef);
254                 if (dev->boost_freq < (dev->boost_freq_step >> 1)) {
255                         dev->boost_freq = 0;
256                         val &= ~ACTMON_DEV_CTRL_DOWN_WMARK_ENB;
257                 }
258                 actmon_writel(val, offs(ACTMON_DEV_CTRL));
259         }
260         if (dev->avg_dependency_threshold) {
261                 val = actmon_readl(offs(ACTMON_DEV_CTRL));
262                 if (dev->avg_count >= dev->avg_dependency_threshold)
263                         val |= ACTMON_DEV_CTRL_DOWN_WMARK_ENB;
264                 else if (dev->boost_freq == 0)
265                         val &= ~ACTMON_DEV_CTRL_DOWN_WMARK_ENB;
266                 actmon_writel(val, offs(ACTMON_DEV_CTRL));
267         }
268
269         actmon_writel(0xffffffff, offs(ACTMON_DEV_INTR_STATUS)); /* clr all */
270         actmon_wmb();
271
272         spin_unlock_irqrestore(&dev->lock, flags);
273         return IRQ_WAKE_THREAD;
274 }
275
276 irqreturn_t actmon_dev_fn(int irq, void *dev_id)
277 {
278         unsigned long flags, freq;
279         struct actmon_dev *dev = (struct actmon_dev *)dev_id;
280
281         spin_lock_irqsave(&dev->lock, flags);
282
283         if (dev->state != ACTMON_ON) {
284                 spin_unlock_irqrestore(&dev->lock, flags);
285                 return IRQ_HANDLED;
286         }
287
288         freq = actmon_dev_avg_freq_get(dev);
289         dev->avg_actv_freq = freq;
290         freq = do_percent(freq, dev->avg_sustain_coef);
291         freq += dev->boost_freq;
292         dev->target_freq = freq;
293
294         spin_unlock_irqrestore(&dev->lock, flags);
295
296         pr_debug("%s.%s(kHz): avg: %lu, target: %lu current: %lu\n",
297                         dev->dev_id, dev->con_id, dev->avg_actv_freq,
298                         dev->target_freq, dev->cur_freq);
299         clk_set_rate(dev->clk, freq * 1000);
300
301         return IRQ_HANDLED;
302 }
303
304 static int actmon_rate_notify_cb(
305         struct notifier_block *nb, unsigned long rate, void *v)
306 {
307         unsigned long flags;
308         struct actmon_dev *dev = container_of(
309                 nb, struct actmon_dev, rate_change_nb);
310
311         spin_lock_irqsave(&dev->lock, flags);
312
313         dev->cur_freq = rate / 1000;
314         if (dev->type == ACTMON_FREQ_SAMPLER) {
315                 actmon_dev_wmark_set(dev);
316                 actmon_wmb();
317         }
318
319         spin_unlock_irqrestore(&dev->lock, flags);
320         return NOTIFY_OK;
321 };
322
323 /* Activity monitor configuration and control */
324 static void actmon_dev_configure(struct actmon_dev *dev, unsigned long freq)
325 {
326         u32 val;
327
328         dev->cur_freq = freq;
329         dev->target_freq = freq;
330         dev->avg_actv_freq = freq;
331
332         if (dev->type == ACTMON_FREQ_SAMPLER) {
333                 dev->avg_count = dev->cur_freq * actmon_sampling_period;
334                 dev->avg_band_freq = dev->max_freq *
335                         ACTMON_DEFAULT_AVG_BAND / 1000;
336         } else {
337                 dev->avg_count = actmon_clk_freq * actmon_sampling_period;
338                 dev->avg_band_freq = actmon_clk_freq *
339                         ACTMON_DEFAULT_AVG_BAND / 1000;
340         }
341         actmon_writel(dev->avg_count, offs(ACTMON_DEV_INIT_AVG));
342
343         BUG_ON(!dev->boost_up_threshold);
344         dev->avg_sustain_coef = 100 * 100 / dev->boost_up_threshold;
345         actmon_dev_avg_wmark_set(dev);
346         actmon_dev_wmark_set(dev);
347
348         actmon_writel(dev->count_weight, offs(ACTMON_DEV_COUNT_WEGHT));
349         actmon_writel(0xffffffff, offs(ACTMON_DEV_INTR_STATUS)); /* clr all */
350
351         val = ACTMON_DEV_CTRL_PERIODIC_ENB | ACTMON_DEV_CTRL_AVG_UP_WMARK_ENB |
352                 ACTMON_DEV_CTRL_AVG_DOWN_WMARK_ENB;
353         val |= ((dev->avg_window_log2 - 1) << ACTMON_DEV_CTRL_K_VAL_SHIFT) &
354                 ACTMON_DEV_CTRL_K_VAL_MASK;
355         val |= ((dev->down_wmark_window - 1) <<
356                 ACTMON_DEV_CTRL_DOWN_WMARK_NUM_SHIFT) &
357                 ACTMON_DEV_CTRL_DOWN_WMARK_NUM_MASK;
358         val |=  ((dev->up_wmark_window - 1) <<
359                 ACTMON_DEV_CTRL_UP_WMARK_NUM_SHIFT) &
360                 ACTMON_DEV_CTRL_UP_WMARK_NUM_MASK;
361         val |= ACTMON_DEV_CTRL_DOWN_WMARK_ENB | ACTMON_DEV_CTRL_UP_WMARK_ENB;
362         actmon_writel(val, offs(ACTMON_DEV_CTRL));
363         actmon_wmb();
364 }
365
366 static void actmon_dev_enable(struct actmon_dev *dev)
367 {
368         u32 val;
369         unsigned long flags;
370
371         spin_lock_irqsave(&dev->lock, flags);
372
373         if (dev->state == ACTMON_OFF) {
374                 dev->state = ACTMON_ON;
375
376                 val = actmon_readl(offs(ACTMON_DEV_CTRL));
377                 val |= ACTMON_DEV_CTRL_ENB;
378                 actmon_writel(val, offs(ACTMON_DEV_CTRL));
379                 actmon_wmb();
380         }
381         spin_unlock_irqrestore(&dev->lock, flags);
382 }
383
384 static void actmon_dev_disable(struct actmon_dev *dev)
385 {
386         u32 val;
387         unsigned long flags;
388
389         spin_lock_irqsave(&dev->lock, flags);
390
391         if (dev->state == ACTMON_ON) {
392                 dev->state = ACTMON_OFF;
393
394                 val = actmon_readl(offs(ACTMON_DEV_CTRL));
395                 val &= ~ACTMON_DEV_CTRL_ENB;
396                 actmon_writel(val, offs(ACTMON_DEV_CTRL));
397                 actmon_writel(0xffffffff, offs(ACTMON_DEV_INTR_STATUS));
398                 actmon_wmb();
399         }
400         spin_unlock_irqrestore(&dev->lock, flags);
401 }
402
403 static void actmon_dev_suspend(struct actmon_dev *dev)
404 {
405         u32 val;
406         unsigned long flags;
407
408         spin_lock_irqsave(&dev->lock, flags);
409
410         if ((dev->state == ACTMON_ON) || (dev->state == ACTMON_OFF)){
411                 dev->saved_state = dev->state;
412                 dev->state = ACTMON_SUSPENDED;
413
414                 val = actmon_readl(offs(ACTMON_DEV_CTRL));
415                 val &= ~ACTMON_DEV_CTRL_ENB;
416                 actmon_writel(val, offs(ACTMON_DEV_CTRL));
417                 actmon_writel(0xffffffff, offs(ACTMON_DEV_INTR_STATUS));
418                 actmon_wmb();
419         }
420         spin_unlock_irqrestore(&dev->lock, flags);
421
422         if (dev->suspend_freq)
423                 clk_set_rate(dev->clk, dev->suspend_freq * 1000);
424 }
425
426 static void actmon_dev_resume(struct actmon_dev *dev)
427 {
428         u32 val;
429         unsigned long flags;
430         unsigned long freq = clk_get_rate(dev->clk) / 1000;
431
432         spin_lock_irqsave(&dev->lock, flags);
433
434         if (dev->state == ACTMON_SUSPENDED) {
435                 actmon_dev_configure(dev, freq);
436                 dev->state = dev->saved_state;
437                 if (dev->state == ACTMON_ON) {
438                         val = actmon_readl(offs(ACTMON_DEV_CTRL));
439                         val |= ACTMON_DEV_CTRL_ENB;
440                         actmon_writel(val, offs(ACTMON_DEV_CTRL));
441                         actmon_wmb();
442                 }
443         }
444         spin_unlock_irqrestore(&dev->lock, flags);
445 }
446
447 static int __init actmon_dev_init(struct actmon_dev *dev)
448 {
449         int ret;
450         struct clk *p;
451         unsigned long freq;
452
453         spin_lock_init(&dev->lock);
454
455         dev->clk = clk_get_sys(dev->dev_id, dev->con_id);
456         if (IS_ERR(dev->clk)) {
457                 pr_err("Failed to find %s.%s clock\n",
458                        dev->dev_id, dev->con_id);
459                 return -ENODEV;
460         }
461         dev->max_freq = clk_round_rate(dev->clk, ULONG_MAX);
462         clk_set_rate(dev->clk, dev->max_freq);
463         dev->max_freq /= 1000;
464         freq = clk_get_rate(dev->clk) / 1000;
465         actmon_dev_configure(dev, freq);
466
467         /* actmon device controls shared bus user clock, but rate
468            change notification should come from bus clock itself */
469         p = clk_get_parent(dev->clk);
470         BUG_ON(!p);
471
472         if (dev->rate_change_nb.notifier_call) {
473                 ret = tegra_register_clk_rate_notifier(p, &dev->rate_change_nb);
474                 if (ret) {
475                         pr_err("Failed to register %s rate change notifier"
476                                " for %s\n", p->name, dev->dev_id);
477                         return ret;
478                 }
479         }
480
481         ret = request_threaded_irq(INT_ACTMON, actmon_dev_isr, actmon_dev_fn,
482                                    IRQF_SHARED, dev->dev_id, dev);
483         if (ret) {
484                 pr_err("Failed irq %d request for %s.%s\n",
485                        INT_ACTMON, dev->dev_id, dev->con_id);
486                 tegra_unregister_clk_rate_notifier(p, &dev->rate_change_nb);
487                 return ret;
488         }
489
490         dev->state = ACTMON_OFF;
491         actmon_dev_enable(dev);
492         tegra_clk_prepare_enable(dev->clk);
493         return 0;
494 }
495
496 /* EMC activity monitor: frequency sampling device:
497  * activity counter is incremented every 256 memory transactions, and
498  * each transaction takes 2 EMC clocks; count_weight = 512 on Tegra3.
499  * On Tegra11 there is only 1 clock per transaction, hence weight = 256.
500  */
501 static struct actmon_dev actmon_dev_emc = {
502         .reg    = 0x1c0,
503         .glb_status_irq_mask = (0x1 << 26),
504         .dev_id = "tegra_actmon",
505         .con_id = "emc",
506
507         /* EMC suspend floor to guarantee suspend entry on PLLM */
508         .suspend_freq           = EMC_PLLP_FREQ_MAX + 2000,
509
510         .boost_freq_step        = 16000,
511         .boost_up_coef          = 200,
512         .boost_down_coef        = 50,
513 #if defined(CONFIG_ARCH_TEGRA_14x_SOC)
514         .boost_up_threshold     = 70,
515         .boost_down_threshold   = 50,
516 #else
517         .boost_up_threshold     = 60,
518         .boost_down_threshold   = 40,
519 #endif
520
521         .up_wmark_window        = 1,
522         .down_wmark_window      = 3,
523         .avg_window_log2        = ACTMON_DEFAULT_AVG_WINDOW_LOG2,
524 #if defined(CONFIG_ARCH_TEGRA_3x_SOC) || defined(CONFIG_ARCH_TEGRA_14x_SOC)
525         .count_weight           = 0x200,
526 #elif defined(CONFIG_ARCH_TEGRA_12x_SOC)
527         .count_weight           = 0x400,
528 #else
529         .count_weight           = 0x100,
530 #endif
531
532         .type                   = ACTMON_FREQ_SAMPLER,
533         .state                  = ACTMON_UNINITIALIZED,
534
535         .rate_change_nb = {
536                 .notifier_call = actmon_rate_notify_cb,
537         },
538 };
539
540 /* AVP activity monitor: load sampling device:
541  * activity counter is incremented on every actmon clock pulse while
542  * AVP is not halted by flow controller; count_weight = 1.
543  */
544 static struct actmon_dev actmon_dev_avp = {
545         .reg    = 0x0c0,
546         .glb_status_irq_mask = (0x1 << 30),
547         .dev_id = "tegra_actmon",
548         .con_id = "avp",
549
550         /* AVP/SCLK suspend activity floor */
551         .suspend_freq           = 40000,
552
553         .boost_freq_step        = 8000,
554         .boost_up_coef          = 200,
555         .boost_down_coef        = 50,
556         .boost_up_threshold     = 85,
557         .boost_down_threshold   = 50,
558
559         .up_wmark_window        = 1,
560         .down_wmark_window      = 3,
561         .avg_window_log2        = ACTMON_DEFAULT_AVG_WINDOW_LOG2,
562         .count_weight           = 0x1,
563
564         .type                   = ACTMON_LOAD_SAMPLER,
565         .state                  = ACTMON_UNINITIALIZED,
566
567         .rate_change_nb = {
568                 .notifier_call = actmon_rate_notify_cb,
569         },
570 };
571
572 static struct actmon_dev *actmon_devices[] = {
573         &actmon_dev_emc,
574         &actmon_dev_avp,
575 };
576
577 /* Activity monitor suspend/resume */
578 static int actmon_pm_notify(struct notifier_block *nb,
579                             unsigned long event, void *data)
580 {
581         int i;
582
583         switch (event) {
584         case PM_SUSPEND_PREPARE:
585                 for (i = 0; i < ARRAY_SIZE(actmon_devices); i++)
586                         actmon_dev_suspend(actmon_devices[i]);
587                 break;
588         case PM_POST_SUSPEND:
589                 actmon_writel(actmon_sampling_period - 1,
590                               ACTMON_GLB_PERIOD_CTRL);
591                 for (i = 0; i < ARRAY_SIZE(actmon_devices); i++)
592                         actmon_dev_resume(actmon_devices[i]);
593                 break;
594         }
595
596         return NOTIFY_OK;
597 };
598
599 static struct notifier_block actmon_pm_nb = {
600         .notifier_call = actmon_pm_notify,
601 };
602
603 #ifdef CONFIG_DEBUG_FS
604
605 #define RW_MODE (S_IWUSR | S_IRUGO)
606 #define RO_MODE S_IRUGO
607
608 static struct dentry *clk_debugfs_root;
609
610 static int type_show(struct seq_file *s, void *data)
611 {
612         struct actmon_dev *dev = s->private;
613
614         seq_printf(s, "%s\n", (dev->type == ACTMON_LOAD_SAMPLER) ?
615                    "Load Activity Monitor" : "Frequency Activity Monitor");
616         return 0;
617 }
618 static int type_open(struct inode *inode, struct file *file)
619 {
620         return single_open(file, type_show, inode->i_private);
621 }
622 static const struct file_operations type_fops = {
623         .open           = type_open,
624         .read           = seq_read,
625         .llseek         = seq_lseek,
626         .release        = single_release,
627 };
628
629 static int actv_get(void *data, u64 *val)
630 {
631         unsigned long flags;
632         struct actmon_dev *dev = data;
633
634         spin_lock_irqsave(&dev->lock, flags);
635         *val = actmon_dev_avg_freq_get(dev);
636         spin_unlock_irqrestore(&dev->lock, flags);
637         return 0;
638 }
639 DEFINE_SIMPLE_ATTRIBUTE(actv_fops, actv_get, NULL, "%llu\n");
640
641 static int step_get(void *data, u64 *val)
642 {
643         struct actmon_dev *dev = data;
644         *val = dev->boost_freq_step * 100 / dev->max_freq;
645         return 0;
646 }
647 static int step_set(void *data, u64 val)
648 {
649         unsigned long flags;
650         struct actmon_dev *dev = data;
651
652         if (val > 100)
653                 val = 100;
654
655         spin_lock_irqsave(&dev->lock, flags);
656         dev->boost_freq_step = do_percent(dev->max_freq, (unsigned int)val);
657         spin_unlock_irqrestore(&dev->lock, flags);
658         return 0;
659 }
660 DEFINE_SIMPLE_ATTRIBUTE(step_fops, step_get, step_set, "%llu\n");
661
662 static int up_threshold_get(void *data, u64 *val)
663 {
664         struct actmon_dev *dev = data;
665         *val = dev->boost_up_threshold;
666         return 0;
667 }
668 static int up_threshold_set(void *data, u64 val)
669 {
670         unsigned long flags;
671         struct actmon_dev *dev = data;
672         unsigned int up_threshold = (unsigned int)val;
673
674         if (up_threshold > 100)
675                 up_threshold = 100;
676
677         spin_lock_irqsave(&dev->lock, flags);
678
679         if (up_threshold <= dev->boost_down_threshold)
680                 up_threshold = dev->boost_down_threshold;
681         if (up_threshold)
682                 dev->avg_sustain_coef = 100 * 100 / up_threshold;
683         dev->boost_up_threshold = up_threshold;
684
685         actmon_dev_up_wmark_set(dev);
686         actmon_wmb();
687
688         spin_unlock_irqrestore(&dev->lock, flags);
689         return 0;
690 }
691 DEFINE_SIMPLE_ATTRIBUTE(up_threshold_fops, up_threshold_get,
692                         up_threshold_set, "%llu\n");
693
694 static int down_threshold_get(void *data, u64 *val)
695 {
696         struct actmon_dev *dev = data;
697         *val = dev->boost_down_threshold;
698         return 0;
699 }
700 static int down_threshold_set(void *data, u64 val)
701 {
702         unsigned long flags;
703         struct actmon_dev *dev = data;
704         unsigned int down_threshold = (unsigned int)val;
705
706         spin_lock_irqsave(&dev->lock, flags);
707
708         if (down_threshold >= dev->boost_up_threshold)
709                 down_threshold = dev->boost_up_threshold;
710         dev->boost_down_threshold = down_threshold;
711
712         actmon_dev_down_wmark_set(dev);
713         actmon_wmb();
714
715         spin_unlock_irqrestore(&dev->lock, flags);
716         return 0;
717 }
718 DEFINE_SIMPLE_ATTRIBUTE(down_threshold_fops, down_threshold_get,
719                         down_threshold_set, "%llu\n");
720
721 static int state_get(void *data, u64 *val)
722 {
723         struct actmon_dev *dev = data;
724         *val = dev->state;
725         return 0;
726 }
727 static int state_set(void *data, u64 val)
728 {
729         struct actmon_dev *dev = data;
730
731         if (val)
732                 actmon_dev_enable(dev);
733         else
734                 actmon_dev_disable(dev);
735         return 0;
736 }
737 DEFINE_SIMPLE_ATTRIBUTE(state_fops, state_get, state_set, "%llu\n");
738
739 static int period_get(void *data, u64 *val)
740 {
741         *val = actmon_sampling_period;
742         return 0;
743 }
744 static int period_set(void *data, u64 val)
745 {
746         int i;
747         unsigned long flags;
748         u8 period = (u8)val;
749
750         if (period) {
751                 actmon_sampling_period = period;
752                 actmon_writel(period - 1, ACTMON_GLB_PERIOD_CTRL);
753
754                 for (i = 0; i < ARRAY_SIZE(actmon_devices); i++) {
755                         struct actmon_dev *dev = actmon_devices[i];
756                         spin_lock_irqsave(&dev->lock, flags);
757                         actmon_dev_wmark_set(dev);
758                         spin_unlock_irqrestore(&dev->lock, flags);
759                 }
760                 actmon_wmb();
761                 return 0;
762         }
763         return -EINVAL;
764 }
765 DEFINE_SIMPLE_ATTRIBUTE(period_fops, period_get, period_set, "%llu\n");
766
767
768 static int actmon_debugfs_create_dev(struct actmon_dev *dev)
769 {
770         struct dentry *dir, *d;
771
772         if (dev->state == ACTMON_UNINITIALIZED)
773                 return 0;
774
775         dir = debugfs_create_dir(dev->con_id, clk_debugfs_root);
776         if (!dir)
777                 return -ENOMEM;
778
779         d = debugfs_create_file(
780                 "actv_type", RO_MODE, dir, dev, &type_fops);
781         if (!d)
782                 return -ENOMEM;
783
784         d = debugfs_create_file(
785                 "avg_activity", RO_MODE, dir, dev, &actv_fops);
786         if (!d)
787                 return -ENOMEM;
788
789         d = debugfs_create_file(
790                 "boost_step", RW_MODE, dir, dev, &step_fops);
791         if (!d)
792                 return -ENOMEM;
793
794         d = debugfs_create_u32(
795                 "boost_rate_dec", RW_MODE, dir, (u32 *)&dev->boost_down_coef);
796         if (!d)
797                 return -ENOMEM;
798
799         d = debugfs_create_u32(
800                 "boost_rate_inc", RW_MODE, dir, (u32 *)&dev->boost_up_coef);
801         if (!d)
802                 return -ENOMEM;
803
804         d = debugfs_create_file(
805                 "boost_threshold_dn", RW_MODE, dir, dev, &down_threshold_fops);
806         if (!d)
807                 return -ENOMEM;
808
809         d = debugfs_create_file(
810                 "boost_threshold_up", RW_MODE, dir, dev, &up_threshold_fops);
811         if (!d)
812                 return -ENOMEM;
813
814         d = debugfs_create_file(
815                 "state", RW_MODE, dir, dev, &state_fops);
816         if (!d)
817                 return -ENOMEM;
818
819         return 0;
820 }
821
822 static int __init actmon_debugfs_init(void)
823 {
824         int i;
825         int ret = -ENOMEM;
826         struct dentry *d;
827
828         d = debugfs_create_dir("tegra_actmon", NULL);
829         if (!d)
830                 return ret;
831         clk_debugfs_root = d;
832
833         d = debugfs_create_file("period", RW_MODE, d, NULL, &period_fops);
834         if (!d)
835                 goto err_out;
836
837         for (i = 0; i < ARRAY_SIZE(actmon_devices); i++) {
838                 ret = actmon_debugfs_create_dev(actmon_devices[i]);
839                 if (ret)
840                         goto err_out;
841         }
842         return 0;
843
844 err_out:
845         debugfs_remove_recursive(clk_debugfs_root);
846         return ret;
847 }
848
849 #endif
850
851 static int __init tegra_actmon_init(void)
852 {
853         int i, ret;
854         struct clk *c = tegra_get_clock_by_name("actmon");
855
856         if (!c) {
857                 pr_err("%s: Failed to find actmon clock\n", __func__);
858                 return 0;
859         }
860         actmon_clk_freq = clk_get_rate(c) / 1000;
861         ret = tegra_clk_prepare_enable(c);
862         if (ret) {
863                 pr_err("%s: Failed to enable actmon clock\n", __func__);
864                 return 0;
865         }
866         actmon_sampling_period = ACTMON_DEFAULT_SAMPLING_PERIOD;
867         actmon_writel(actmon_sampling_period - 1, ACTMON_GLB_PERIOD_CTRL);
868
869         for (i = 0; i < ARRAY_SIZE(actmon_devices); i++) {
870                 ret = actmon_dev_init(actmon_devices[i]);
871                 pr_info("%s.%s: %s initialization (%d)\n",
872                         actmon_devices[i]->dev_id, actmon_devices[i]->con_id,
873                         ret ? "Failed" : "Completed", ret);
874         }
875         register_pm_notifier(&actmon_pm_nb);
876
877 #ifdef CONFIG_DEBUG_FS
878         actmon_debugfs_init();
879 #endif
880         return 0;
881 }
882 late_initcall(tegra_actmon_init);