fuse: cleanup unwanted fuse related data
[linux-3.10.git] / arch / arm / mach-tegra / tegra11_edp.c
1 /*
2  * arch/arm/mach-tegra/tegra11_edp.c
3  *
4  * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  */
18
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/string.h>
22 #include <linux/module.h>
23 #include <linux/clk.h>
24 #include <linux/kobject.h>
25 #include <linux/err.h>
26 #include <linux/tegra-fuse.h>
27
28 #include <mach/edp.h>
29
30 #include "clock.h"
31 #include "common.h"
32
33 #define CORE_MODULES_STATES 1
34 #define TEMPERATURE_RANGES 4
35 #define CAP_CLKS_NUM 2
36 #define TOTAL_CAPS (CORE_EDP_PROFILES_NUM * CORE_MODULES_STATES *\
37                         TEMPERATURE_RANGES * CAP_CLKS_NUM)
38
39 struct core_edp_entry {
40         int sku;
41         int process_id;
42         unsigned int cap_mA;
43         int mult;
44         unsigned long cap_scpu_on[CORE_EDP_PROFILES_NUM][
45                 CORE_MODULES_STATES][TEMPERATURE_RANGES][CAP_CLKS_NUM];
46         unsigned long cap_scpu_off[CORE_EDP_PROFILES_NUM][
47                 CORE_MODULES_STATES][TEMPERATURE_RANGES][CAP_CLKS_NUM];
48 };
49
50 static int temperatures[] = { 50, 70, 90, 105 };
51
52 #ifdef CONFIG_TEGRA_DUAL_CBUS
53 static char *cap_clks_names[] = { "edp.emc", "edp.c2bus" };
54 #else
55 static char *cap_clks_names[] = { "edp.emc", "edp.cbus" };
56 #endif
57 static struct clk *cap_clks[CAP_CLKS_NUM];
58
59 static struct core_edp_entry core_edp_table[] = {
60         /* SKU 3 */
61         {
62                 .sku            = 0x3,          /* SKU = 3 */
63                 .process_id     = -1,           /* any process id */
64                 .cap_mA         = 6000,         /* 6A cap */
65                 .mult           = 1000000,      /* MHZ */
66                 .cap_scpu_on    = {
67                         /* favor emc */
68                         {       /* core modules power state 0 (all ON) */
69                                 {{ 924, 636 },
70                                  { 924, 612 },
71                                  { 924, 564 },
72                                  { 924, 384 },
73                                 },
74                         },
75                         /* balanced profile */
76                         {       /* core modules power state 0 (all ON) */
77                                 {{ 792, 636 },
78                                  { 792, 636 },
79                                  { 792, 636 },
80                                  { 792, 384 },
81                                 },
82                         },
83                         /* favor gpu */
84                         {       /* core modules power state 0 (all ON) */
85                                 {{ 624, 672 },
86                                  { 624, 672 },
87                                  { 528, 672 },
88                                  { 528, 384 },
89                                 }
90                         },
91                 },
92                 .cap_scpu_off   = {
93                         /* favor emc */
94                         {       /* core modules power state 0 (all ON) */
95                                 {{ 924, 672 },
96                                  { 924, 648 },
97                                  { 924, 636 },
98                                  { 924, 516 },
99                                 },
100                         },
101                         /* balanced profile */
102                         {       /* core modules power state 0 (all ON) */
103                                 {{ 924, 672 },
104                                  { 792, 672 },
105                                  { 792, 672 },
106                                  { 792, 516 },
107                                 },
108                         },
109                         /* favor gpu */
110                         {       /* core modules power state 0 (all ON) */
111                                 {{ 924, 672 },
112                                  { 792, 672 },
113                                  { 792, 672 },
114                                  { 792, 516 },
115                                 }
116                         },
117                 },
118         },
119         {
120                 .sku            = 0x3,          /* SKU = 3 */
121                 .process_id     = -1,           /* any process id */
122                 .cap_mA         = 8000,         /* 8A cap */
123                 .mult           = 1000000,      /* MHZ */
124                 .cap_scpu_on    = {
125                         /* favor emc */
126                         {       /* core modules power state 0 (all ON) */
127                                 {{ 924, 672 },
128                                  { 924, 672 },
129                                  { 924, 672 },
130                                  { 924, 588 },
131                                 },
132                         },
133                         /* balanced profile */
134                         {       /* core modules power state 0 (all ON) */
135                                 {{ 924, 672 },
136                                  { 924, 672 },
137                                  { 924, 672 },
138                                  { 924, 588 },
139                                 },
140                         },
141                         /* favor gpu */
142                         {       /* core modules power state 0 (all ON) */
143                                 {{ 924, 672 },
144                                  { 924, 672 },
145                                  { 924, 672 },
146                                  { 924, 588 },
147                                 }
148                         },
149                 },
150                 .cap_scpu_off   = {
151                         /* favor emc */
152                         {       /* core modules power state 0 (all ON) */
153                                 {{ 924, 672 },
154                                  { 924, 672 },
155                                  { 924, 672 },
156                                  { 924, 588 },
157                                 },
158                         },
159                         /* balanced profile */
160                         {       /* core modules power state 0 (all ON) */
161                                 {{ 924, 672 },
162                                  { 924, 672 },
163                                  { 924, 672 },
164                                  { 924, 588 },
165                                 },
166                         },
167                         /* favor gpu */
168                         {       /* core modules power state 0 (all ON) */
169                                 {{ 924, 672 },
170                                  { 924, 672 },
171                                  { 924, 672 },
172                                  { 924, 588 },
173                                 }
174                         },
175                 },
176         },
177         /* SKU 4 */
178         {
179                 .sku            = 0x4,          /* SKU = 4 */
180                 .process_id     = -1,           /* any process id */
181                 .cap_mA         = 6000,         /* 6A cap */
182                 .mult           = 1000000,      /* MHZ */
183                 .cap_scpu_on    = {
184                         /* favor emc */
185                         {       /* core modules power state 0 (all ON) */
186                                 {{ 924, 636 },
187                                  { 924, 624 },
188                                  { 924, 588 },
189                                  { 924, 526 },
190                                 },
191                         },
192                         /* balanced profile */
193                         {       /* core modules power state 0 (all ON) */
194                                 {{ 792, 672 },
195                                  { 792, 636 },
196                                  { 792, 636 },
197                                  { 792, 576 },
198                                 },
199                         },
200                         /* favor gpu */
201                         {       /* core modules power state 0 (all ON) */
202                                 {{ 792, 672 },
203                                  { 624, 672 },
204                                  { 624, 672 },
205                                  { 624, 636 },
206                                 }
207                         },
208                 },
209                 .cap_scpu_off   = {
210                         /* favor emc */
211                         {       /* core modules power state 0 (all ON) */
212                                 {{ 924, 672 },
213                                  { 924, 660 },
214                                  { 924, 636 },
215                                  { 924, 588 },
216                                 },
217                         },
218                         /* balanced profile */
219                         {       /* core modules power state 0 (all ON) */
220                                 {{ 924, 672 },
221                                  { 792, 672 },
222                                  { 792, 672 },
223                                  { 792, 648 },
224                                 },
225                         },
226                         /* favor gpu */
227                         {       /* core modules power state 0 (all ON) */
228                                 {{ 924, 672 },
229                                  { 792, 672 },
230                                  { 792, 672 },
231                                  { 792, 648 },
232                                 }
233                         },
234                 },
235         },
236         {
237                 .sku            = 0x4,          /* SKU = 4 */
238                 .process_id     = -1,           /* any process id */
239                 .cap_mA         = 8000,         /* 8A cap */
240                 .mult           = 1000000,      /* MHZ */
241                 .cap_scpu_on    = {
242                         /* favor emc */
243                         {       /* core modules power state 0 (all ON) */
244                                 {{ 924, 672 },
245                                  { 924, 672 },
246                                  { 924, 672 },
247                                  { 924, 648 },
248                                 },
249                         },
250                         /* balanced profile */
251                         {       /* core modules power state 0 (all ON) */
252                                 {{ 924, 672 },
253                                  { 924, 672 },
254                                  { 924, 672 },
255                                  { 924, 648 },
256                                 },
257                         },
258                         /* favor gpu */
259                         {       /* core modules power state 0 (all ON) */
260                                 {{ 924, 672 },
261                                  { 924, 672 },
262                                  { 924, 672 },
263                                  { 924, 648 },
264                                 }
265                         },
266                 },
267                 .cap_scpu_off   = {
268                         /* favor emc */
269                         {       /* core modules power state 0 (all ON) */
270                                 {{ 924, 672 },
271                                  { 924, 672 },
272                                  { 924, 672 },
273                                  { 924, 648 },
274                                 },
275                         },
276                         /* balanced profile */
277                         {       /* core modules power state 0 (all ON) */
278                                 {{ 924, 672 },
279                                  { 924, 672 },
280                                  { 924, 672 },
281                                  { 924, 648 },
282                                 },
283                         },
284                         /* favor gpu */
285                         {       /* core modules power state 0 (all ON) */
286                                 {{ 924, 828 },
287                                  { 924, 816 },
288                                  { 924, 804 },
289                                  { 924, 648 },
290                                 }
291                         },
292                 },
293         },
294         /* SKU 5 */
295         {
296                 .sku            = 0x5,          /* SKU = 5 */
297                 .process_id     = 0,            /* bin 0 */
298                 .cap_mA         = 4000,         /* 4A cap */
299                 .mult           = 1000000,      /* MHZ */
300                 .cap_scpu_on    = {
301                         /* favor emc */
302                         {       /* core modules power state 0 (all ON) */
303                                 {{ 792, 336 },
304                                  { 792, 336 },
305                                  { 792, 300 },
306                                  { 792, 240 },
307                                 },
308                         },
309                         /* balanced profile */
310                         {       /* core modules power state 0 (all ON) */
311                                 {{ 624, 396 },
312                                  { 660, 372 },
313                                  { 660, 324 },
314                                  { 660, 288 },
315                                 },
316                         },
317                         /* favor gpu */
318                         {       /* core modules power state 0 (all ON) */
319                                 {{ 408, 492 },
320                                  { 408, 396 },
321                                  { 408, 396 },
322                                  { 408, 396 },
323                                 }
324                         },
325                 },
326                 .cap_scpu_off   = {
327                         /* favor emc */
328                         {       /* core modules power state 0 (all ON) */
329                                 {{ 792, 432 },
330                                  { 792, 432 },
331                                  { 792, 396 },
332                                  { 792, 348 },
333                                 },
334                         },
335                         /* balanced profile */
336                         {       /* core modules power state 0 (all ON) */
337                                 {{ 624, 492 },
338                                  { 660, 492 },
339                                  { 660, 444 },
340                                  { 660, 384 },
341                                 },
342                         },
343                         /* favor gpu */
344                         {       /* core modules power state 0 (all ON) */
345                                 {{ 408, 516 },
346                                  { 408, 516 },
347                                  { 408, 516 },
348                                  { 408, 492 },
349                                 }
350                         },
351                 },
352         },
353         {
354                 .sku            = 0x5,          /* SKU = 5 */
355                 .process_id     = 1,            /* bin 1 */
356                 .cap_mA         = 4000,         /* 4A cap */
357                 .mult           = 1000000,      /* MHZ */
358                 .cap_scpu_on    = {
359                         /* favor emc */
360                         {       /* core modules power state 0 (all ON) */
361                                 {{ 792, 348 },
362                                  { 792, 336 },
363                                  { 792, 300 },
364                                  { 792, 240 },
365                                 },
366                         },
367                         /* balanced profile */
368                         {       /* core modules power state 0 (all ON) */
369                                 {{ 624, 420 },
370                                  { 660, 372 },
371                                  { 660, 324 },
372                                  { 660, 288 },
373                                 },
374                         },
375                         /* favor gpu */
376                         {       /* core modules power state 0 (all ON) */
377                                 {{ 408, 528 },
378                                  { 408, 492 },
379                                  { 408, 420 },
380                                  { 408, 420 },
381                                 }
382                         },
383                 },
384                 .cap_scpu_off   = {
385                         /* favor emc */
386                         {       /* core modules power state 0 (all ON) */
387                                 {{ 792, 432 },
388                                  { 792, 432 },
389                                  { 792, 396 },
390                                  { 792, 348 },
391                                 },
392                         },
393                         /* balanced profile */
394                         {       /* core modules power state 0 (all ON) */
395                                 {{ 624, 528 },
396                                  { 660, 492 },
397                                  { 660, 444 },
398                                  { 660, 384 },
399                                 },
400                         },
401                         /* favor gpu */
402                         {       /* core modules power state 0 (all ON) */
403                                 {{ 408, 564 },
404                                  { 408, 564 },
405                                  { 408, 528 },
406                                  { 408, 528 },
407                                 }
408                         },
409                 },
410         },
411         {
412                 .sku            = 0x5,          /* SKU = 5 */
413                 .process_id     = -1,           /* any process id */
414                 .cap_mA         = 6000,         /* 6A cap */
415                 .mult           = 1000000,      /* MHZ */
416                 .cap_scpu_on    = {
417                         /* favor emc */
418                         {       /* core modules power state 0 (all ON) */
419                                 {{ 792, 600 },
420                                  { 792, 600 },
421                                  { 792, 600 },
422                                  { 792, 516 },
423                                 },
424                         },
425                         /* balanced profile */
426                         {       /* core modules power state 0 (all ON) */
427                                 {{ 792, 600 },
428                                  { 792, 600 },
429                                  { 660, 600 },
430                                  { 660, 564 },
431                                 },
432                         },
433                         /* favor gpu */
434                         {       /* core modules power state 0 (all ON) */
435                                 {{ 792, 600 },
436                                  { 792, 600 },
437                                  { 660, 600 },
438                                  { 528, 600 },
439                                 }
440                         },
441                 },
442                 .cap_scpu_off   = {
443                         /* favor emc */
444                         {       /* core modules power state 0 (all ON) */
445                                 {{ 792, 600 },
446                                  { 792, 600 },
447                                  { 792, 600 },
448                                  { 792, 600 },
449                                 },
450                         },
451                         /* balanced profile */
452                         {       /* core modules power state 0 (all ON) */
453                                 {{ 792, 600 },
454                                  { 792, 600 },
455                                  { 792, 600 },
456                                  { 624, 600 },
457                                 },
458                         },
459                         /* favor gpu */
460                         {       /* core modules power state 0 (all ON) */
461                                 {{ 792, 600 },
462                                  { 792, 600 },
463                                  { 792, 600 },
464                                  { 624, 600 },
465                                 }
466                         },
467                 },
468         },
469         /* SKU 6 */
470         {
471                 .sku            = 0x6,          /* SKU = 6 */
472                 .process_id     = 0,            /* bin 0 */
473                 .cap_mA         = 4000,         /* 4A cap */
474                 .mult           = 1000000,      /* MHZ */
475                 .cap_scpu_on    = {
476                         /* favor emc */
477                         {       /* core modules power state 0 (all ON) */
478                                 {{ 792, 348 },
479                                  { 792, 348 },
480                                  { 792, 312 },
481                                  { 792, 264 },
482                                 },
483                         },
484                         /* balanced profile */
485                         {       /* core modules power state 0 (all ON) */
486                                 {{ 660, 372 },
487                                  { 660, 372 },
488                                  { 660, 336 },
489                                  { 660, 300 },
490                                 },
491                         },
492                         /* favor gpu */
493                         {       /* core modules power state 0 (all ON) */
494                                 {{ 408, 492 },
495                                  { 408, 396 },
496                                  { 408, 396 },
497                                  { 408, 396 },
498                                 }
499                         },
500                 },
501                 .cap_scpu_off   = {
502                         /* favor emc */
503                         {       /* core modules power state 0 (all ON) */
504                                 {{ 792, 444 },
505                                  { 792, 444 },
506                                  { 792, 408 },
507                                  { 792, 372 },
508                                 },
509                         },
510                         /* balanced profile */
511                         {       /* core modules power state 0 (all ON) */
512                                 {{ 660, 492 },
513                                  { 660, 492 },
514                                  { 660, 456 },
515                                  { 660, 408 },
516                                 },
517                         },
518                         /* favor gpu */
519                         {       /* core modules power state 0 (all ON) */
520                                 {{ 408, 552 },
521                                  { 408, 516 },
522                                  { 408, 516 },
523                                  { 408, 516 },
524                                 }
525                         },
526                 },
527         },
528         {
529                 .sku            = 0x6,          /* SKU = 6 */
530                 .process_id     = 1,            /* bin 1 */
531                 .cap_mA         = 4000,         /* 4A cap */
532                 .mult           = 1000000,      /* MHZ */
533                 .cap_scpu_on    = {
534                         /* favor emc */
535                         {       /* core modules power state 0 (all ON) */
536                                 {{ 792, 348 },
537                                  { 792, 348 },
538                                  { 792, 312 },
539                                  { 792, 264 },
540                                 },
541                         },
542                         /* balanced profile */
543                         {       /* core modules power state 0 (all ON) */
544                                 {{ 660, 420 },
545                                  { 660, 372 },
546                                  { 660, 336 },
547                                  { 660, 300 },
548                                 },
549                         },
550                         /* favor gpu */
551                         {       /* core modules power state 0 (all ON) */
552                                 {{ 408, 528 },
553                                  { 408, 492 },
554                                  { 408, 420 },
555                                  { 408, 420 },
556                                 }
557                         },
558                 },
559                 .cap_scpu_off   = {
560                         /* favor emc */
561                         {       /* core modules power state 0 (all ON) */
562                                 {{ 792, 444 },
563                                  { 792, 444 },
564                                  { 792, 408 },
565                                  { 792, 372 },
566                                 },
567                         },
568                         /* balanced profile */
569                         {       /* core modules power state 0 (all ON) */
570                                 {{ 660, 492 },
571                                  { 660, 492 },
572                                  { 660, 456 },
573                                  { 660, 408 },
574                                 },
575                         },
576                         /* favor gpu */
577                         {       /* core modules power state 0 (all ON) */
578                                 {{ 408, 564 },
579                                  { 408, 564 },
580                                  { 408, 564 },
581                                  { 408, 528 },
582                                 }
583                         },
584                 },
585         },
586         {
587                 .sku            = 0x6,          /* SKU = 6 */
588                 .process_id     = -1,           /* any process id */
589                 .cap_mA         = 6000,         /* 6A cap */
590                 .mult           = 1000000,      /* MHZ */
591                 .cap_scpu_on    = {
592                         /* favor emc */
593                         {       /* core modules power state 0 (all ON) */
594                                 {{ 792, 600 },
595                                  { 792, 600 },
596                                  { 792, 600 },
597                                  { 792, 516 },
598                                 },
599                         },
600                         /* balanced profile */
601                         {       /* core modules power state 0 (all ON) */
602                                 {{ 792, 600 },
603                                  { 792, 600 },
604                                  { 792, 600 },
605                                  { 660, 600 },
606                                 },
607                         },
608                         /* favor gpu */
609                         {       /* core modules power state 0 (all ON) */
610                                 {{ 792, 600 },
611                                  { 792, 600 },
612                                  { 792, 600 },
613                                  { 660, 600 },
614                                 }
615                         },
616                 },
617                 .cap_scpu_off   = {
618                         /* favor emc */
619                         {       /* core modules power state 0 (all ON) */
620                                 {{ 792, 600 },
621                                  { 792, 600 },
622                                  { 792, 600 },
623                                  { 792, 600 },
624                                 },
625                         },
626                         /* balanced profile */
627                         {       /* core modules power state 0 (all ON) */
628                                 {{ 792, 600 },
629                                  { 792, 600 },
630                                  { 792, 600 },
631                                  { 792, 600 },
632                                 },
633                         },
634                         /* favor gpu */
635                         {       /* core modules power state 0 (all ON) */
636                                 {{ 792, 600 },
637                                  { 792, 600 },
638                                  { 792, 600 },
639                                  { 792, 600 },
640                                 }
641                         },
642                 },
643         },
644         /* SKU 8 */
645         {
646                 .sku            = 0x8,          /* SKU = 8 */
647                 .process_id     = -1,           /* any process id */
648                 .cap_mA         = 6000,         /* 6A cap */
649                 .mult           = 1000000,      /* MHZ */
650                 .cap_scpu_on    = {
651                         /* favor emc */
652                         {       /* core modules power state 0 (all ON) */
653                                 {{ 744, 672 },
654                                  { 744, 636 },
655                                  { 744, 636 },
656                                  { 744, 576 },
657                                 },
658                         },
659                         /* balanced profile */
660                         {       /* core modules power state 0 (all ON) */
661                                 {{ 744, 672 },
662                                  { 744, 636 },
663                                  { 744, 636 },
664                                  { 744, 576 },
665                                 },
666                         },
667                         /* favor gpu */
668                         {       /* core modules power state 0 (all ON) */
669                                 {{ 744, 672 },
670                                  { 624, 672 },
671                                  { 624, 672 },
672                                  { 624, 636 },
673                                 }
674                         },
675                 },
676                 .cap_scpu_off   = {
677                         /* favor emc */
678                         {       /* core modules power state 0 (all ON) */
679                                 {{ 744, 672 },
680                                  { 744, 672 },
681                                  { 744, 672 },
682                                  { 744, 648 },
683                                 },
684                         },
685                         /* balanced profile */
686                         {       /* core modules power state 0 (all ON) */
687                                 {{ 744, 672 },
688                                  { 744, 672 },
689                                  { 744, 672 },
690                                  { 744, 648 },
691                                 },
692                         },
693                         /* favor gpu */
694                         {       /* core modules power state 0 (all ON) */
695                                 {{ 744, 672 },
696                                  { 744, 672 },
697                                  { 744, 672 },
698                                  { 744, 648 },
699                                 }
700                         },
701                 },
702         },
703         {
704                 .sku            = 0x8,          /* SKU = 8 */
705                 .process_id     = -1,           /* any process id */
706                 .cap_mA         = 8000,         /* 8A cap */
707                 .mult           = 1000000,      /* MHZ */
708                 .cap_scpu_on    = {
709                         /* favor emc */
710                         {       /* core modules power state 0 (all ON) */
711                                 {{ 744, 672 },
712                                  { 744, 672 },
713                                  { 744, 672 },
714                                  { 744, 648 },
715                                 },
716                         },
717                         /* balanced profile */
718                         {       /* core modules power state 0 (all ON) */
719                                 {{ 744, 672 },
720                                  { 744, 672 },
721                                  { 744, 672 },
722                                  { 744, 648 },
723                                 },
724                         },
725                         /* favor gpu */
726                         {       /* core modules power state 0 (all ON) */
727                                 {{ 744, 672 },
728                                  { 744, 672 },
729                                  { 744, 672 },
730                                  { 744, 648 },
731                                 }
732                         },
733                 },
734                 .cap_scpu_off   = {
735                         /* favor emc */
736                         {       /* core modules power state 0 (all ON) */
737                                 {{ 744, 672 },
738                                  { 744, 672 },
739                                  { 744, 672 },
740                                  { 744, 648 },
741                                 },
742                         },
743                         /* balanced profile */
744                         {       /* core modules power state 0 (all ON) */
745                                 {{ 744, 672 },
746                                  { 744, 672 },
747                                  { 744, 672 },
748                                  { 744, 648 },
749                                 },
750                         },
751                         /* favor gpu */
752                         {       /* core modules power state 0 (all ON) */
753                                 {{ 792, 828 },
754                                  { 792, 816 },
755                                  { 792, 804 },
756                                  { 792, 648 },
757                                 }
758                         },
759                 },
760         },
761 };
762
763 #ifdef CONFIG_TEGRA_EDP_LIMITS
764 #define LEAKAGE_CONSTS_IJK_COMMON                                       \
765         {                                                               \
766                 /* i = 0 */                                             \
767                 { {   13919916,  -28721837,   7560552,  -570495, },     \
768                   {  -39991855,   87294629, -22972570,  1734058, },     \
769                   {   36869935,  -86826110,  22833611, -1723750, },     \
770                   {  -10611796,   28192235,  -7407903,   559012, },     \
771                 },                                                      \
772                 /* i = 1 */                                             \
773                 { {  -37335213,   53397584, -16025243,  1341064, },     \
774                   {  111121782, -160756323,  48421377, -4049609, },     \
775                   { -107149149,  157911131, -47786861,  3994796, },     \
776                   {   32802647,  -49872380,  15236453, -1268662, },     \
777                 },                                                      \
778                 /* i = 2 */                                             \
779                 { {    3315214,  -21010655,   7718286,  -789185, },     \
780                   {   -4336249,   59786076, -22312653,  2313754, },     \
781                   {   -3346058,  -54529998,  20777469, -2198700, },     \
782                   {    4810027,   15417133,  -6086955,   665766, },     \
783                 },                                                      \
784                 /* i = 3 */                                             \
785                 { {    4681958,   -1470999,   -232691,    73384, },     \
786                   {  -15445149,    5487248,    422447,  -201475, },     \
787                   {   16983482,   -6716242,    -65917,   174128, },     \
788                   {   -6293336,    2756799,   -140100,   -44673, },     \
789                 },                                                      \
790         }
791
792 #define LEAKAGE_PARAMS_COMMON_PART                                      \
793         .temp_scaled        = 10,                                       \
794         .dyn_scaled         = 1000000,                                  \
795         .dyn_consts_n       = { 1410000, 2440000, 3450000, 4440000 },   \
796         .consts_scaled      = 1000000,                                  \
797         .leakage_consts_n   = {  400000,  650000,  850000, 1050000 },   \
798         .ijk_scaled         = 10000,                                    \
799         .leakage_min        = 30,                                       \
800         .volt_temp_cap      = { 70, 1300 },                             \
801         .leakage_consts_ijk = LEAKAGE_CONSTS_IJK_COMMON
802
803 static struct tegra_edp_cpu_leakage_params t11x_leakage_params[] = {
804         {
805                 .cpu_speedo_id      = 0, /* A01 CPU */
806                 .max_current_cap = { /* values are from tegra4 datasheet */
807                         { .max_cur = 9000, .max_temp = 60,
808                                 { 1900000, 1900000, 1600000, 1600000 }
809                         },
810                         { .max_cur = 9000, .max_temp = 75,
811                                 { 1900000, 1900000, 1530000, 1530000 }
812                         },
813                         { .max_cur = 9000, .max_temp = 90,
814                                 { 1900000, 1900000, 1500000, 1500000 }
815                         },
816                         { .max_cur = 12000, .max_temp = 90,
817                                 { 1900000, 1900000, 1700000, 1700000 }
818                         },
819                         { .max_cur = 15000, .max_temp = 90,
820                                 { 1900000, 1900000, 1900000, 1900000 }
821                         },
822                 },
823                 LEAKAGE_PARAMS_COMMON_PART,
824         },
825         {
826                 .cpu_speedo_id      = 1, /* A01P+ CPU */
827                 .safety_cap         = { 1810500, 1810500, 1606500, 1606500 },
828                 .max_current_cap = { /* values are from tegra4 datasheet */
829                         { .max_cur = 7500, .max_temp = 90,
830                                 { 1800000, 1700000, 1320000, 1320000 }
831                         },
832                         { .max_cur = 7500, .max_temp = 75,
833                                 { 1800000, 1700000, 1420000, 1420000 }
834                         },
835                         { .max_cur = 7500, .max_temp = 60,
836                                 { 1800000, 1800000, 1420000, 1420000 }
837                         },
838                         { .max_cur = 7500, .max_temp = 45,
839                                 { 1800000, 1800000, 1530000, 1530000 }
840                         },
841                         { .max_cur = 9000, .max_temp = 90,
842                                 { 1800000, 1800000, 1500000, 1500000 }
843                         },
844                         { .max_cur = 9000, .max_temp = 75,
845                                 { 1800000, 1800000, 1530000, 1530000 }
846                         },
847                         { .max_cur = 9000, .max_temp = 60,
848                                 { 1800000, 1800000, 1600000, 1600000 }
849                         },
850                         { .max_cur = 12000, .max_temp = 45,
851                                 { 1800000, 1800000, 1600000, 1600000 }
852                         },
853                 },
854                 LEAKAGE_PARAMS_COMMON_PART,
855         },
856         {
857                 .cpu_speedo_id      = 2, /* A01P+ fast CPU */
858                 .safety_cap         = { 1912500, 1912500, 1912500, 1912500 },
859                 .max_current_cap = { /* values are from tegra4 datasheet */
860                         { .max_cur = 9000, .max_temp = 90,
861                                 { 1900000, 1900000, 1500000, 1500000 }
862                         },
863                         { .max_cur = 9000, .max_temp = 75,
864                                 { 1900000, 1900000, 1530000, 1530000 }
865                         },
866                         { .max_cur = 9000, .max_temp = 60,
867                                 { 1900000, 1900000, 1600000, 1600000 }
868                         },
869                         { .max_cur = 12000, .max_temp = 90,
870                                 { 1900000, 1900000, 1700000, 1700000 }
871                         },
872                         { .max_cur = 15000, .max_temp = 90,
873                                 { 1900000, 1900000, 1900000, 1900000 }
874                         },
875                 },
876                 LEAKAGE_PARAMS_COMMON_PART,
877         },
878         {
879                 .cpu_speedo_id      = 3,
880                 .safety_cap = { 1810500, 1810500, 1810500, 1810500 },
881                 .max_current_cap = { /* fixed values */
882                         { .max_cur = 9000, .max_temp = 105,
883                                 { 1810500, 1810500, 1530000, 1530000 }
884                         },
885                         { .max_cur = 9000, .max_temp = 90,
886                                 { 1810500, 1810500, 1606500, 1606500 }
887                         },
888                         { .max_cur = 12000, .max_temp = 105,
889                                 { 1810500, 1810500, 1708500, 1708500 }
890                         },
891                         { .max_cur = 15000, .max_temp = 105,
892                                 { 1810500, 1810500, 1810500, 1810500 }
893                         },
894                 },
895                 LEAKAGE_PARAMS_COMMON_PART,
896         },
897 };
898
899 struct tegra_edp_cpu_leakage_params *tegra11x_get_leakage_params(int index,
900                                                         unsigned int *sz)
901 {
902         BUG_ON(index >= ARRAY_SIZE(t11x_leakage_params));
903         if (sz)
904                 *sz = ARRAY_SIZE(t11x_leakage_params);
905         return &t11x_leakage_params[index];
906 }
907 #endif
908
909 static struct core_edp_entry *find_edp_entry(int sku, unsigned int regulator_mA)
910 {
911         int i;
912         int pid = tegra_core_process_id();
913
914         if ((sku == 0x5) || (sku == 0x6)) {
915                 if (regulator_mA >= 8000)
916                         return NULL;            /* no edp limits above 8A */
917         } else if ((sku == 0x3) || (sku == 0x4) || (sku == 0x8)) {
918                 if (regulator_mA >= 8000)
919                         regulator_mA = 8000;    /* apply 8A table above 8A */
920         } else {
921                 return NULL;                    /* no edp limits at all */
922         }
923
924         for (i = 0; i < ARRAY_SIZE(core_edp_table); i++) {
925                 struct core_edp_entry *entry = &core_edp_table[i];
926                 if ((entry->sku == sku) && (entry->cap_mA == regulator_mA) &&
927                     ((entry->process_id == -1) || (entry->process_id == pid)))
928                         return entry;
929         }
930         return ERR_PTR(-ENOENT);
931 }
932
933 static unsigned long clip_cap_rate(struct clk *cap_clk, unsigned long rate)
934 {
935         unsigned long floor, ceiling;
936         struct clk *p = clk_get_parent(cap_clk);
937
938         if (!p || !p->ops || !p->ops->shared_bus_update) {
939                 WARN(1, "%s: edp cap clk %s is not a shared bus user\n",
940                         __func__, cap_clk->name);
941                 return rate;
942         }
943
944         /*
945          * Clip cap rate to shared bus possible rates (going up via shared
946          * bus * ladder since bus clocks always rounds up with resolution of
947          * at least 2kHz)
948          */
949         ceiling = clk_round_rate(p, clk_get_min_rate(p));
950         do {
951                 floor = ceiling;
952                 ceiling = clk_round_rate(p, floor + 2000);
953                 if (IS_ERR_VALUE(ceiling)) {
954                         pr_err("%s: failed to clip %lu to %s possible rates\n",
955                                __func__, rate, p->name);
956                         return rate;
957                 }
958         } while ((floor < ceiling) && (ceiling <= rate));
959
960         if (floor > rate)
961                 WARN(1, "%s: %s cap rate %lu is below %s floor %lu\n",
962                         __func__, cap_clk->name, rate, p->name, floor);
963         return floor;
964 }
965
966 int __init tegra11x_select_core_edp_table(unsigned int regulator_mA,
967                                           struct tegra_core_edp_limits *limits)
968 {
969         int i;
970         int sku;
971         unsigned long *cap_rates;
972         struct core_edp_entry *edp_entry;
973
974         BUG_ON(ARRAY_SIZE(temperatures) != TEMPERATURE_RANGES);
975         BUG_ON(ARRAY_SIZE(cap_clks_names) != CAP_CLKS_NUM);
976         for (i = 0; i < CAP_CLKS_NUM; i++) {
977                 struct clk *c = tegra_get_clock_by_name(cap_clks_names[i]);
978                 if (!c) {
979                         pr_err("%s: failed to find edp cap clock %s\n",
980                                __func__, cap_clks_names[i]);
981                         return -ENODEV;
982                 }
983                 cap_clks[i] = c;
984         }
985
986         sku = tegra_get_sku_id();
987         edp_entry = find_edp_entry(sku, regulator_mA);
988         if (!edp_entry) {
989                 pr_info("%s: no core edp table for sku %d, %d mA\n",
990                        __func__, sku, regulator_mA);
991                 return -ENODATA;
992         } else if (IS_ERR(edp_entry)) {
993                 WARN(1, "%s: missing core edp table for sku %d, %d mA\n",
994                        __func__, sku, regulator_mA);
995                 return PTR_ERR(edp_entry);
996         }
997
998         limits->sku = sku;
999         limits->cap_clocks = cap_clks;
1000         limits->cap_clocks_num = CAP_CLKS_NUM;
1001         limits->temperatures = temperatures;
1002         limits->temperature_ranges = TEMPERATURE_RANGES;
1003         limits->core_modules_states = CORE_MODULES_STATES;
1004
1005         cap_rates = &edp_entry->cap_scpu_on[0][0][0][0];
1006         limits->cap_rates_scpu_on = cap_rates;
1007         for (i = 0; i < TOTAL_CAPS; i++, cap_rates++) {
1008                 unsigned long rate = *cap_rates * edp_entry->mult;
1009                 *cap_rates = clip_cap_rate(cap_clks[i % CAP_CLKS_NUM], rate);
1010         }
1011
1012         cap_rates = &edp_entry->cap_scpu_off[0][0][0][0];
1013         limits->cap_rates_scpu_off = cap_rates;
1014         for (i = 0; i < TOTAL_CAPS; i++, cap_rates++) {
1015                 unsigned long rate = *cap_rates * edp_entry->mult;
1016                 *cap_rates = clip_cap_rate(cap_clks[i % CAP_CLKS_NUM], rate);
1017         }
1018
1019         return 0;
1020 }