e10c796b1e2a398df8d7d642b0beeffd801c7072
[linux-3.10.git] / arch / arm / mach-tegra / pinmux-t12-tables.c
1 /*
2  * linux/arch/arm/mach-tegra/pinmux-t12-tables.c
3  *
4  * Common pinmux configurations for Tegra 12x SoCs
5  *
6  * Copyright (C) 2011-2012 NVIDIA Corporation
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful, but WITHOUT
14  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
16  * more details.
17  *
18  * You should have received a copy of the GNU General Public License along
19  * with this program; if not, write to the Free Software Foundation, Inc.,
20  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
21  */
22
23 #include <linux/kernel.h>
24 #include <linux/errno.h>
25 #include <linux/spinlock.h>
26 #include <linux/io.h>
27 #include <linux/init.h>
28 #include <linux/string.h>
29 #include <linux/syscore_ops.h>
30 #include <linux/bug.h>
31 #include <linux/bitops.h>
32
33 #include <mach/pinmux.h>
34 #include <mach/pinmux-t12.h>
35
36 #include "gpio-names.h"
37 #include "iomap.h"
38
39 #define PINGROUP_REG_A  0x868
40 #define MUXCTL_REG_A    0x3000
41
42 #define SET_DRIVE_PINGROUP(pg_name, r, drv_down_offset, drv_down_mask, drv_up_offset, drv_up_mask,      \
43         slew_rise_offset, slew_rise_mask, slew_fall_offset, slew_fall_mask)     \
44         [TEGRA_DRIVE_PINGROUP_ ## pg_name] = {                  \
45                 .name = #pg_name,                               \
46                 .reg_bank = 0,                                  \
47                 .reg = ((r) - PINGROUP_REG_A),                  \
48                 .drvup_offset = drv_up_offset,                  \
49                 .drvup_mask = drv_up_mask,                      \
50                 .drvdown_offset = drv_down_offset,              \
51                 .drvdown_mask = drv_down_mask,                  \
52                 .slewrise_offset = slew_rise_offset,            \
53                 .slewrise_mask = slew_rise_mask,                \
54                 .slewfall_offset = slew_fall_offset,            \
55                 .slewfall_mask = slew_fall_mask,                \
56         }
57
58 #define DEFAULT_DRIVE_PINGROUP(pg_name, r)              \
59         [TEGRA_DRIVE_PINGROUP_ ## pg_name] = {          \
60                 .name = #pg_name,                       \
61                 .reg_bank = 0,                          \
62                 .reg = ((r) - PINGROUP_REG_A),          \
63                 .drvup_offset = 20,                     \
64                 .drvup_mask = 0x1f,                     \
65                 .drvdown_offset = 12,                   \
66                 .drvdown_mask = 0x1f,                   \
67                 .slewrise_offset = 28,                  \
68                 .slewrise_mask = 0x3,                   \
69                 .slewfall_offset = 30,                  \
70                 .slewfall_mask = 0x3,                   \
71         }
72
73 const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE_PINGROUP] = {
74         DEFAULT_DRIVE_PINGROUP(AO1,             0x868),
75         DEFAULT_DRIVE_PINGROUP(AO2,             0x86c),
76         DEFAULT_DRIVE_PINGROUP(AT1,             0x870),
77         DEFAULT_DRIVE_PINGROUP(AT2,             0x874),
78         DEFAULT_DRIVE_PINGROUP(AT3,             0x878),
79         DEFAULT_DRIVE_PINGROUP(AT4,             0x87c),
80         DEFAULT_DRIVE_PINGROUP(AT5,             0x880),
81         DEFAULT_DRIVE_PINGROUP(CDEV1,           0x884),
82         DEFAULT_DRIVE_PINGROUP(CDEV2,           0x888),
83         DEFAULT_DRIVE_PINGROUP(CSUS,            0x88c),
84         DEFAULT_DRIVE_PINGROUP(DAP1,            0x890),
85         DEFAULT_DRIVE_PINGROUP(DAP2,            0x894),
86         DEFAULT_DRIVE_PINGROUP(DAP3,            0x898),
87         DEFAULT_DRIVE_PINGROUP(DAP4,            0x89c),
88         DEFAULT_DRIVE_PINGROUP(DBG,             0x8a0),
89         DEFAULT_DRIVE_PINGROUP(SDIO3,           0x8b0),
90         DEFAULT_DRIVE_PINGROUP(SPI,             0x8b4),
91         DEFAULT_DRIVE_PINGROUP(UAA,             0x8b8),
92         DEFAULT_DRIVE_PINGROUP(UAB,             0x8bc),
93         DEFAULT_DRIVE_PINGROUP(UART2,           0x8c0),
94         DEFAULT_DRIVE_PINGROUP(UART3,           0x8c4),
95         DEFAULT_DRIVE_PINGROUP(SDIO1,           0x8ec),
96         DEFAULT_DRIVE_PINGROUP(CRT,             0x8f8),
97         DEFAULT_DRIVE_PINGROUP(DDC,             0x8fc),
98         DEFAULT_DRIVE_PINGROUP(GMA,             0x900),
99         DEFAULT_DRIVE_PINGROUP(GME,             0x910),
100         DEFAULT_DRIVE_PINGROUP(GMF,             0x914),
101         DEFAULT_DRIVE_PINGROUP(GMG,             0x918),
102         DEFAULT_DRIVE_PINGROUP(GMH,             0x91c),
103         DEFAULT_DRIVE_PINGROUP(OWR,             0x920),
104         DEFAULT_DRIVE_PINGROUP(UAD,             0x924),
105         DEFAULT_DRIVE_PINGROUP(GPV,             0x928),
106         DEFAULT_DRIVE_PINGROUP(DEV3,            0x92c),
107         DEFAULT_DRIVE_PINGROUP(CEC,             0x938),
108         DEFAULT_DRIVE_PINGROUP(AT6,             0x994),
109         DEFAULT_DRIVE_PINGROUP(DAP5,            0x998),
110         DEFAULT_DRIVE_PINGROUP(VBUS,            0x99C),
111 };
112
113 #define PINGROUP(pg_name, gpio_nr, vdd, f0, f1, f2, f3, fs, iod, reg)   \
114         [TEGRA_PINGROUP_ ## pg_name] = {                        \
115                 .name = #pg_name,                               \
116                 .vddio = TEGRA_VDDIO_ ## vdd,                   \
117                 .funcs = {                                      \
118                         TEGRA_MUX_ ## f0,                       \
119                         TEGRA_MUX_ ## f1,                       \
120                         TEGRA_MUX_ ## f2,                       \
121                         TEGRA_MUX_ ## f3,                       \
122                 },                                              \
123                 .gpionr = TEGRA_GPIO_ ## gpio_nr,               \
124                 .func_safe = TEGRA_MUX_ ## fs,                  \
125                 .tri_bank = 1,                                  \
126                 .tri_reg = ((reg) - MUXCTL_REG_A),              \
127                 .tri_bit = 4,                                   \
128                 .mux_bank = 1,                                  \
129                 .mux_reg = ((reg) - MUXCTL_REG_A),              \
130                 .mux_bit = 0,                                   \
131                 .pupd_bank = 1,                                 \
132                 .pupd_reg = ((reg) - MUXCTL_REG_A),             \
133                 .pupd_bit = 2,                                  \
134                 .io_default = TEGRA_PIN_ ## iod,                \
135                 .od_bit = 6,                                    \
136                 .lock_bit = 7,                                  \
137                 .ioreset_bit = 8,                               \
138         }
139
140 /* !!!FIXME!!! FILL IN fSafe COLUMN IN TABLE ....... */
141 #define PINGROUPS       \
142         /*       NAME             GPIO          VDD         f0          f1          f2          f3          fSafe       io      reg */\
143         PINGROUP(ULPI_DATA0,      PO1,          BB,         SPI3,       HSI,        UARTA,      ULPI,       RSVD,       INPUT,  0x3000),\
144         PINGROUP(ULPI_DATA1,      PO2,          BB,         SPI3,       HSI,        UARTA,      ULPI,       RSVD,       INPUT,  0x3004),\
145         PINGROUP(ULPI_DATA2,      PO3,          BB,         SPI3,       HSI,        UARTA,      ULPI,       RSVD,       INPUT,  0x3008),\
146         PINGROUP(ULPI_DATA3,      PO4,          BB,         SPI3,       HSI,        UARTA,      ULPI,       RSVD,       INPUT,  0x300c),\
147         PINGROUP(ULPI_DATA4,      PO5,          BB,         SPI2,       HSI,        UARTA,      ULPI,       RSVD,       INPUT,  0x3010),\
148         PINGROUP(ULPI_DATA5,      PO6,          BB,         SPI2,       HSI,        UARTA,      ULPI,       RSVD,       INPUT,  0x3014),\
149         PINGROUP(ULPI_DATA6,      PO7,          BB,         SPI2,       HSI,        UARTA,      ULPI,       RSVD,       INPUT,  0x3018),\
150         PINGROUP(ULPI_DATA7,      PO0,          BB,         SPI2,       HSI,        UARTA,      ULPI,       RSVD,       INPUT,  0x301c),\
151         PINGROUP(ULPI_CLK,        PY0,          BB,         SPI1,       SPI5,       UARTD,      ULPI,       RSVD,       INPUT,  0x3020),\
152         PINGROUP(ULPI_DIR,        PY1,          BB,         SPI1,       SPI5,       UARTD,      ULPI,       RSVD,       INPUT,  0x3024),\
153         PINGROUP(ULPI_NXT,        PY2,          BB,         SPI1,       SPI5,       UARTD,      ULPI,       RSVD,       INPUT,  0x3028),\
154         PINGROUP(ULPI_STP,        PY3,          BB,         SPI1,       SPI5,       UARTD,      ULPI,       RSVD,       INPUT,  0x302c),\
155         PINGROUP(DAP3_FS,         PP0,          BB,         I2S2,       SPI5,       DISPLAYA,   DISPLAYB,   RSVD,       INPUT,  0x3030),\
156         PINGROUP(DAP3_DIN,        PP1,          BB,         I2S2,       SPI5,       DISPLAYA,   DISPLAYB,   RSVD,       INPUT,  0x3034),\
157         PINGROUP(DAP3_DOUT,       PP2,          BB,         I2S2,       SPI5,       DISPLAYA,   DISPLAYB,   RSVD,       INPUT,  0x3038),\
158         PINGROUP(DAP3_SCLK,       PP3,          BB,         I2S2,       SPI5,       DISPLAYA,   DISPLAYB,   RSVD,       INPUT,  0x303c),\
159         PINGROUP(GPIO_PV0,        PV0,          BB,         RSVD,       RSVD,       RSVD,       RSVD,       RSVD,       INPUT,  0x3040),\
160         PINGROUP(GPIO_PV1,        PV1,          BB,         RSVD,       RSVD,       RSVD,       RSVD,       RSVD,       INPUT,  0x3044),\
161         PINGROUP(SDMMC1_CLK,      PZ0,          SDMMC1,     SDMMC1,     CLK12,      RSVD1,      RSVD2,      RSVD,       INPUT,  0x3048),\
162         PINGROUP(SDMMC1_CMD,      PZ1,          SDMMC1,     SDMMC1,     SPDIF,      SPI4,       UARTA,      RSVD,       INPUT,  0x304c),\
163         PINGROUP(SDMMC1_DAT3,     PY4,          SDMMC1,     SDMMC1,     SPDIF,      SPI4,       UARTA,      RSVD,       INPUT,  0x3050),\
164         PINGROUP(SDMMC1_DAT2,     PY5,          SDMMC1,     SDMMC1,     PWM0,       SPI4,       UARTA,      RSVD,       INPUT,  0x3054),\
165         PINGROUP(SDMMC1_DAT1,     PY6,          SDMMC1,     SDMMC1,     PWM1,       SPI4,       UARTA,      RSVD,       INPUT,  0x3058),\
166         PINGROUP(SDMMC1_DAT0,     PY7,          SDMMC1,     SDMMC1,     RSVD1,      RSVD2,      UARTA,      RSVD,       INPUT,  0x305c),\
167         PINGROUP(CLK2_OUT,        PW5,          SDMMC1,     EXTPERIPH2, RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x3068),\
168         PINGROUP(CLK2_REQ,        PCC5,         SDMMC1,     DAP,        RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x306c),\
169         PINGROUP(HDMI_INT,        PN7,          LCD,        RSVD,       RSVD,       RSVD,       RSVD,       RSVD,       INPUT,  0x3110),\
170         PINGROUP(DDC_SCL,         PV4,          LCD,        I2C4,       RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x3114),\
171         PINGROUP(DDC_SDA,         PV5,          LCD,        I2C4,       RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x3118),\
172         PINGROUP(UART2_RXD,       PC3,          UART,       IRDA,       SPDIF,      UARTA,      SPI4,       RSVD,       INPUT,  0x3164),\
173         PINGROUP(UART2_TXD,       PC2,          UART,       IRDA,       SPDIF,      UARTA,      SPI4,       RSVD,       INPUT,  0x3168),\
174         PINGROUP(UART2_RTS_N,     PJ6,          UART,       UARTA,      UARTB,      RSVD,       SPI4,       RSVD,       INPUT,  0x316c),\
175         PINGROUP(UART2_CTS_N,     PJ5,          UART,       UARTA,      UARTB,      RSVD,       SPI4,       RSVD,       INPUT,  0x3170),\
176         PINGROUP(UART3_TXD,       PW6,          UART,       UARTC,      RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x3174),\
177         PINGROUP(UART3_RXD,       PW7,          UART,       UARTC,      RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x3178),\
178         PINGROUP(UART3_CTS_N,     PA1,          UART,       UARTC,      SDMMC1,     RSVD1,      RSVD2,      RSVD,       INPUT,  0x317c),\
179         PINGROUP(UART3_RTS_N,     PC0,          UART,       UARTC,      PWM0,       RSVD1,      RSVD2,      RSVD,       INPUT,  0x3180),\
180         PINGROUP(GPIO_PU0,        PU0,          UART,       OWR,        UARTA,      GMI,        RSVD3,      RSVD,       INPUT,  0x3184),\
181         PINGROUP(GPIO_PU1,        PU1,          UART,       RSVD0,      UARTA,      GMI,        RSVD3,      RSVD,       INPUT,  0x3188),\
182         PINGROUP(GPIO_PU2,        PU2,          UART,       RSVD1,      UARTA,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x318c),\
183         PINGROUP(GPIO_PU3,        PU3,          UART,       PWM0,       UARTA,      RSVD1,      RSVD2,      RSVD,       INPUT,  0x3190),\
184         PINGROUP(GPIO_PU4,        PU4,          UART,       PWM1,       UARTA,      RSVD1,      RSVD2,      RSVD,       INPUT,  0x3194),\
185         PINGROUP(GPIO_PU5,        PU5,          UART,       PWM2,       UARTA,      RSVD1,      RSVD2,      RSVD,       INPUT,  0x3198),\
186         PINGROUP(GPIO_PU6,        PU6,          UART,       PWM3,       UARTA,      USB,        RSVD2,      RSVD,       INPUT,  0x319c),\
187         PINGROUP(GEN1_I2C_SDA,    PC5,          UART,       I2C1,       RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x31a0),\
188         PINGROUP(GEN1_I2C_SCL,    PC4,          UART,       I2C1,       RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x31a4),\
189         PINGROUP(DAP4_FS,         PP4,          UART,       I2S3,       RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x31a8),\
190         PINGROUP(DAP4_DIN,        PP5,          UART,       I2S3,       RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x31ac),\
191         PINGROUP(DAP4_DOUT,       PP6,          UART,       I2S3,       RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x31b0),\
192         PINGROUP(DAP4_SCLK,       PP7,          UART,       I2S3,       RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x31b4),\
193         PINGROUP(CLK3_OUT,        PEE0,         UART,       EXTPERIPH3, RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x31b8),\
194         PINGROUP(CLK3_REQ,        PEE1,         UART,       DEV3,       RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x31bc),\
195         PINGROUP(GMI_WP_N,        PC7,          GMI,        RSVD1,      NAND,       GMI,        GMI_ALT,    RSVD,       INPUT,  0x31c0),\
196         PINGROUP(GMI_IORDY,       PI5,          GMI,        SDMMC2,     NAND,       GMI,        TRACE,      RSVD,       INPUT,  0x31c4),\
197         PINGROUP(GMI_WAIT,        PI7,          GMI,        RSVD1,      NAND,       GMI,        TRACE,      RSVD,       INPUT,  0x31c8),\
198         PINGROUP(GMI_ADV_N,       PK0,          GMI,        SDMMC2,     NAND,       GMI,        TRACE,      RSVD,       INPUT,  0x31cc),\
199         PINGROUP(GMI_CLK,         PK1,          GMI,        SDMMC2,     NAND,       GMI,        TRACE,      RSVD,       INPUT,  0x31d0),\
200         PINGROUP(GMI_CS0_N,       PJ0,          GMI,        RSVD1,      NAND,       GMI,        RSVD,       RSVD,       INPUT,  0x31d4),\
201         PINGROUP(GMI_CS1_N,       PJ2,          GMI,        RSVD1,      NAND,       GMI,        RSVD2,      RSVD,       INPUT,  0x31d8),\
202         PINGROUP(GMI_CS2_N,       PK3,          GMI,        SDMMC2,     NAND,       GMI,        RSVD2,      RSVD,       INPUT,  0x31dc),\
203         PINGROUP(GMI_CS3_N,       PK4,          GMI,        SDMMC2,     NAND,       GMI,        GMI_ALT,    RSVD,       INPUT,  0x31e0),\
204         PINGROUP(GMI_CS4_N,       PK2,          GMI,        USB,        NAND,       GMI,        TRACE,      RSVD,       INPUT,  0x31e4),\
205         PINGROUP(GMI_CS6_N,       PI3,          GMI,        NAND,       NAND_ALT,   GMI,        SATA,       RSVD,       INPUT,  0x31e8),\
206         PINGROUP(GMI_CS7_N,       PI6,          GMI,        NAND,       NAND_ALT,   GMI,        RSVD,       RSVD,       INPUT,  0x31ec),\
207         PINGROUP(GMI_AD0,         PG0,          GMI,        RSVD1,      NAND,       GMI,        RSVD2,      RSVD,       INPUT,  0x31f0),\
208         PINGROUP(GMI_AD1,         PG1,          GMI,        RSVD1,      NAND,       GMI,        RSVD2,      RSVD,       INPUT,  0x31f4),\
209         PINGROUP(GMI_AD2,         PG2,          GMI,        RSVD1,      NAND,       GMI,        RSVD2,      RSVD,       INPUT,  0x31f8),\
210         PINGROUP(GMI_AD3,         PG3,          GMI,        RSVD1,      NAND,       GMI,        RSVD2,      RSVD,       INPUT,  0x31fc),\
211         PINGROUP(GMI_AD4,         PG4,          GMI,        RSVD1,      NAND,       GMI,        SPI4,       RSVD,       INPUT,  0x3200),\
212         PINGROUP(GMI_AD5,         PG5,          GMI,        RSVD1,      NAND,       GMI,        SPI4,       RSVD,       INPUT,  0x3204),\
213         PINGROUP(GMI_AD6,         PG6,          GMI,        RSVD1,      NAND,       GMI,        SPI4,       RSVD,       INPUT,  0x3208),\
214         PINGROUP(GMI_AD7,         PG7,          GMI,        RSVD1,      NAND,       GMI,        SPI4,       RSVD,       INPUT,  0x320c),\
215         PINGROUP(GMI_AD8,         PH0,          GMI,        PWM0,       NAND,       GMI,        RSVD2,      RSVD,       INPUT,  0x3210),\
216         PINGROUP(GMI_AD9,         PH1,          GMI,        PWM1,       NAND,       GMI,        RSVD2,      RSVD,       INPUT,  0x3214),\
217         PINGROUP(GMI_AD10,        PH2,          GMI,        PWM2,       NAND,       GMI,        RSVD2,      RSVD,       INPUT,  0x3218),\
218         PINGROUP(GMI_AD11,        PH3,          GMI,        PWM3,       NAND,       GMI,        RSVD2,      RSVD,       INPUT,  0x321c),\
219         PINGROUP(GMI_AD12,        PH4,          GMI,        SDMMC2,     NAND,       GMI,        RSVD2,      RSVD,       INPUT,  0x3220),\
220         PINGROUP(GMI_AD13,        PH5,          GMI,        SDMMC2,     NAND,       GMI,        RSVD2,      RSVD,       INPUT,  0x3224),\
221         PINGROUP(GMI_AD14,        PH6,          GMI,        SDMMC2,     NAND,       GMI,        RSVD2,      RSVD,       INPUT,  0x3228),\
222         PINGROUP(GMI_AD15,        PH7,          GMI,        SDMMC2,     NAND,       GMI,        RSVD2,      RSVD,       INPUT,  0x322c),\
223         PINGROUP(GMI_A16,         PJ7,          GMI,        UARTD,      SPI4,       GMI,        GMI_ALT,    RSVD,       INPUT,  0x3230),\
224         PINGROUP(GMI_A17,         PB0,          GMI,        UARTD,      SPI4,       GMI,        TRACE,      RSVD,       INPUT,  0x3234),\
225         PINGROUP(GMI_A18,         PB1,          GMI,        UARTD,      SPI4,       GMI,        TRACE,      RSVD,       INPUT,  0x3238),\
226         PINGROUP(GMI_A19,         PK7,          GMI,        UARTD,      SPI4,       GMI,        TRACE,      RSVD,       INPUT,  0x323c),\
227         PINGROUP(GMI_WR_N,        PI0,          GMI,        RSVD1,      NAND,       GMI,        RSVD3,      RSVD,       INPUT,  0x3240),\
228         PINGROUP(GMI_OE_N,        PI1,          GMI,        RSVD1,      NAND,       GMI,        RSVD3,      RSVD,       INPUT,  0x3244),\
229         PINGROUP(GMI_DQS_P,       PJ3,          GMI,        SDMMC2,     NAND,       GMI,        TRACE,      RSVD,       INPUT,  0x3248),\
230         PINGROUP(GMI_RST_N,       PI4,          GMI,        NAND,       NAND_ALT,   GMI,        SDMMC2,     RSVD,       INPUT,  0x324c),\
231         PINGROUP(GEN2_I2C_SCL,    PT5,          GMI,        I2C2,       RSVD1,      GMI,        RSVD3,      RSVD,       INPUT,  0x3250),\
232         PINGROUP(GEN2_I2C_SDA,    PT6,          GMI,        I2C2,       RSVD1,      GMI,        RSVD3,      RSVD,       INPUT,  0x3254),\
233         PINGROUP(SDMMC4_CLK,      PCC4,         SDMMC4,     SDMMC4,     RSVD1,      GMI,        RSVD2,      RSVD,       INPUT,  0x3258),\
234         PINGROUP(SDMMC4_CMD,      PT7,          SDMMC4,     SDMMC4,     RSVD1,      GMI,        RSVD2,      RSVD,       INPUT,  0x325c),\
235         PINGROUP(SDMMC4_DAT0,     PAA0,         SDMMC4,     SDMMC4,     SPI3,       GMI,        RSVD2,      RSVD,       INPUT,  0x3260),\
236         PINGROUP(SDMMC4_DAT1,     PAA1,         SDMMC4,     SDMMC4,     SPI3,       GMI,        RSVD2,      RSVD,       INPUT,  0x3264),\
237         PINGROUP(SDMMC4_DAT2,     PAA2,         SDMMC4,     SDMMC4,     SPI3,       GMI,        RSVD2,      RSVD,       INPUT,  0x3268),\
238         PINGROUP(SDMMC4_DAT3,     PAA3,         SDMMC4,     SDMMC4,     SPI3,       GMI,        RSVD2,      RSVD,       INPUT,  0x326c),\
239         PINGROUP(SDMMC4_DAT4,     PAA4,         SDMMC4,     SDMMC4,     RSVD1,      GMI,        RSVD2,      RSVD,       INPUT,  0x3270),\
240         PINGROUP(SDMMC4_DAT5,     PAA5,         SDMMC4,     SDMMC4,     RSVD1,      GMI,        RSVD2,      RSVD,       INPUT,  0x3274),\
241         PINGROUP(SDMMC4_DAT6,     PAA6,         SDMMC4,     SDMMC4,     RSVD1,      GMI,        RSVD2,      RSVD,       INPUT,  0x3278),\
242         PINGROUP(SDMMC4_DAT7,     PAA7,         SDMMC4,     SDMMC4,     RSVD1,      GMI,        RSVD2,      RSVD,       INPUT,  0x327c),\
243         PINGROUP(SDMMC4_RST_N,    INVALID,      SDMMC4,     RSVD1,      RSVD2,      RSVD3,      SDMMC4,     RSVD,       INPUT,  0x3280),\
244         PINGROUP(CAM_MCLK,        PCC0,         CAM,        VI,         INVALID,    VI_ALT2,    RSVD,       RSVD,       INPUT,  0x3284),\
245         PINGROUP(GPIO_PCC1,       PCC1,         CAM,        I2S4,       RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x3288),\
246         PINGROUP(GPIO_PBB0,       PBB0,         CAM,        I2S4,       RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x328c),\
247         PINGROUP(CAM_I2C_SCL,     PBB1,         CAM,        INVALID,    I2C3,       RSVD2,      RSVD3,      RSVD,       INPUT,  0x3290),\
248         PINGROUP(CAM_I2C_SDA,     PBB2,         CAM,        INVALID,    I2C3,       RSVD2,      RSVD3,      RSVD,       INPUT,  0x3294),\
249         PINGROUP(GPIO_PBB3,       PBB3,         CAM,        VGP3,       DISPLAYA,   DISPLAYB,   RSVD2,      RSVD,       INPUT,  0x3298),\
250         PINGROUP(GPIO_PBB4,       PBB4,         CAM,        VGP4,       DISPLAYA,   DISPLAYB,   RSVD2,      RSVD,       INPUT,  0x329c),\
251         PINGROUP(GPIO_PBB5,       PBB5,         CAM,        VGP5,       DISPLAYA,   DISPLAYB,   RSVD,       RSVD,       INPUT,  0x32a0),\
252         PINGROUP(GPIO_PBB6,       PBB6,         CAM,        VGP6,       DISPLAYA,   DISPLAYB,   POPSDMMC4,  RSVD,       INPUT,  0x32a4),\
253         PINGROUP(GPIO_PBB7,       PBB7,         CAM,        I2S4,       RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x32a8),\
254         PINGROUP(GPIO_PCC2,       PCC2,         CAM,        I2S4,       RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x32ac),\
255         PINGROUP(JTAG_RTCK,       PU7,          SYS,        RTCK,       RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x32b0),\
256         PINGROUP(PWR_I2C_SCL,     PZ6,          SYS,        I2CPWR,     RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x32b4),\
257         PINGROUP(PWR_I2C_SDA,     PZ7,          SYS,        I2CPWR,     RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x32b8),\
258         PINGROUP(KB_ROW0,         PR0,          SYS,        KBC,        RSVD2,      DTV,        RSVD3,      RSVD,       INPUT,  0x32bc),\
259         PINGROUP(KB_ROW1,         PR1,          SYS,        KBC,        RSVD2,      DTV,        RSVD3,      RSVD,       INPUT,  0x32c0),\
260         PINGROUP(KB_ROW2,         PR2,          SYS,        KBC,        RSVD2,      DTV,        RSVD3,      RSVD,       INPUT,  0x32c4),\
261         PINGROUP(KB_ROW3,         PR3,          SYS,        KBC,        DISPLAYA,   DTV,        DISPLAYB,   RSVD,       INPUT,  0x32c8),\
262         PINGROUP(KB_ROW4,         PR4,          SYS,        KBC,        DISPLAYA,   SPI2,       DISPLAYB,   RSVD,       INPUT,  0x32cc),\
263         PINGROUP(KB_ROW5,         PR5,          SYS,        KBC,        DISPLAYA,   SPI2,       DISPLAYB,   RSVD,       INPUT,  0x32d0),\
264         PINGROUP(KB_ROW6,         PR6,          SYS,        KBC,        DISPLAYA,   RSVD,       DISPLAYB,   RSVD,       INPUT,  0x32d4),\
265         PINGROUP(KB_ROW7,         PR7,          SYS,        KBC,        RSVD,       RSVD2,      UARTA,      RSVD,       INPUT,  0x32d8),\
266         PINGROUP(KB_ROW8,         PS0,          SYS,        KBC,        RSVD,       RSVD2,      UARTA,      RSVD,       INPUT,  0x32dc),\
267         PINGROUP(KB_ROW9,         PS1,          SYS,        KBC,        RSVD,       RSVD2,      UARTA,      RSVD,       INPUT,  0x32e0),\
268         PINGROUP(KB_ROW10,        PS2,          SYS,        KBC,        RSVD,       RSVD2,      UARTA,      RSVD,       INPUT,  0x32e4),\
269         PINGROUP(KB_COL0,         PQ0,          SYS,        KBC,        USB,        SPI2,       EMC_DLL,    RSVD,       INPUT,  0x32fc),\
270         PINGROUP(KB_COL1,         PQ1,          SYS,        KBC,        RSVD2,      SPI2,       EMC_DLL,    RSVD,       INPUT,  0x3300),\
271         PINGROUP(KB_COL2,         PQ2,          SYS,        KBC,        RSVD2,      SPI2,       RSVD,       RSVD,       INPUT,  0x3304),\
272         PINGROUP(KB_COL3,         PQ3,          SYS,        KBC,        RSVD2,      PWM2,       UARTA,      RSVD,       INPUT,  0x3308),\
273         PINGROUP(KB_COL4,         PQ4,          SYS,        KBC,        OWR,        SDMMC3,     UARTA,      RSVD,       INPUT,  0x330c),\
274         PINGROUP(KB_COL5,         PQ5,          SYS,        KBC,        RSVD1,      SDMMC1,     RSVD2,      RSVD,       INPUT,  0x3310),\
275         PINGROUP(KB_COL6,         PQ6,          SYS,        KBC,        RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x3314),\
276         PINGROUP(KB_COL7,         PQ7,          SYS,        KBC,        RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x3318),\
277         PINGROUP(CLK_32K_OUT,     PA0,          SYS,        BLINK,      RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x331c),\
278         PINGROUP(SYS_CLK_REQ,     PZ5,          SYS,        SYSCLK,     RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x3320),\
279         PINGROUP(CORE_PWR_REQ,    INVALID,      SYS,        RSVD,       RSVD,       RSVD,       RSVD,       RSVD,       INPUT,  0x3324),\
280         PINGROUP(CPU_PWR_REQ,     INVALID,      SYS,        RSVD,       RSVD,       RSVD,       RSVD,       RSVD,       INPUT,  0x3328),\
281         PINGROUP(PWR_INT_N,       INVALID,      SYS,        RSVD,       RSVD,       RSVD,       RSVD,       RSVD,       INPUT,  0x332c),\
282         PINGROUP(CLK_32K_IN,      INVALID,      SYS,        RSVD,       RSVD,       RSVD,       RSVD,       RSVD,       INPUT,  0x3330),\
283         PINGROUP(OWR,             INVALID,      SYS,        RSVD,       RSVD,       RSVD,       RSVD,       RSVD,       INPUT,  0x3334),\
284         PINGROUP(DAP1_FS,         PN0,          AUDIO,      I2S0,       HDA,        GMI,        RSVD,       RSVD,       INPUT,  0x3338),\
285         PINGROUP(DAP1_DIN,        PN1,          AUDIO,      I2S0,       HDA,        GMI,        RSVD,       RSVD,       INPUT,  0x333c),\
286         PINGROUP(DAP1_DOUT,       PN2,          AUDIO,      I2S0,       HDA,        GMI,        RSVD,       RSVD,       INPUT,  0x3340),\
287         PINGROUP(DAP1_SCLK,       PN3,          AUDIO,      I2S0,       HDA,        GMI,        RSVD,       RSVD,       INPUT,  0x3344),\
288         PINGROUP(CLK1_REQ,        PEE2,         AUDIO,      DAP,        HDA,        RSVD2,      RSVD3,      RSVD,       INPUT,  0x3348),\
289         PINGROUP(CLK1_OUT,        PW4,          AUDIO,      EXTPERIPH1, DAP2,       RSVD2,      RSVD3,      RSVD,       INPUT,  0x334c),\
290         PINGROUP(SPDIF_IN,        PK6,          AUDIO,      SPDIF,      RSVD1,      I2C1,       RSVD2,      RSVD,       INPUT,  0x3350),\
291         PINGROUP(SPDIF_OUT,       PK5,          AUDIO,      SPDIF,      RSVD1,      I2C1,       RSVD2,      RSVD,       INPUT,  0x3354),\
292         PINGROUP(DAP2_FS,         PA2,          AUDIO,      I2S1,       HDA,        RSVD1,      RSVD2,      RSVD,       INPUT,  0x3358),\
293         PINGROUP(DAP2_DIN,        PA4,          AUDIO,      I2S1,       HDA,        RSVD1,      RSVD2,      RSVD,       INPUT,  0x335c),\
294         PINGROUP(DAP2_DOUT,       PA5,          AUDIO,      I2S1,       HDA,        RSVD1,      RSVD2,      RSVD,       INPUT,  0x3360),\
295         PINGROUP(DAP2_SCLK,       PA3,          AUDIO,      I2S1,       HDA,        RSVD1,      RSVD2,      RSVD,       INPUT,  0x3364),\
296         PINGROUP(SPI2_MOSI,       PX0,          AUDIO,      SPI6,       RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x3368),\
297         PINGROUP(SPI2_MISO,       PX1,          AUDIO,      SPI6,       RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x336c),\
298         PINGROUP(SPI2_CS0_N,      PX3,          AUDIO,      SPI6,       RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x3370),\
299         PINGROUP(SPI2_SCK,        PX2,          AUDIO,      SPI6,       RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x3374),\
300         PINGROUP(SPI1_MOSI,       PX4,          AUDIO,      SPI6,       RSVD1,      RSVD2,      DAP2,       RSVD,       INPUT,  0x3378),\
301         PINGROUP(SPI1_SCK,        PX5,          AUDIO,      SPI2,       SPI1,       INVALID,    GMI,        RSVD,       INPUT,  0x337c),\
302         PINGROUP(SPI1_CS0_N,      PX6,          AUDIO,      SPI2,       SPI1,       INVALID,    GMI,        RSVD,       INPUT,  0x3380),\
303         PINGROUP(SPI1_MISO,       PX7,          AUDIO,      RSVD1,      SPI1,       SPI2,       RSVD2,      RSVD,       INPUT,  0x3384),\
304         PINGROUP(SDMMC3_CLK,      PA6,          SDMMC3,     SDMMC3,     RSVD1,      RSVD2,      SPI3,       RSVD,       INPUT,  0x3390),\
305         PINGROUP(SDMMC3_CMD,      PA7,          SDMMC3,     SDMMC3,     PWM3,       UARTA,      RSVD,       RSVD,       INPUT,  0x3394),\
306         PINGROUP(SDMMC3_DAT0,     PB7,          SDMMC3,     SDMMC3,     PWM3,       RSVD3,      SPI3,       RSVD,       INPUT,  0x3398),\
307         PINGROUP(SDMMC3_DAT1,     PB6,          SDMMC3,     SDMMC3,     RSVD1,      UARTA,      SPI3,       RSVD,       INPUT,  0x339c),\
308         PINGROUP(SDMMC3_DAT2,     PB5,          SDMMC3,     SDMMC3,     PWM2,       RSVD,       SPI3,       RSVD,       INPUT,  0x33a0),\
309         PINGROUP(SDMMC3_DAT3,     PB4,          SDMMC3,     SDMMC3,     PWM1,       RSVD,       SPI3,       RSVD,       INPUT,  0x33a4),\
310         PINGROUP(HDMI_CEC,        PEE3,         SYS,        CEC,        SDMMC3,     RSVD2,      RSVD3,      RSVD,       INPUT,  0x33e0),\
311         PINGROUP(SDMMC1_WP_N,     PV3,          SDMMC1,     SDMMC1,     CLK12,      RSVD2,      UARTA,      RSVD,       INPUT,  0x33e4),\
312         PINGROUP(SDMMC3_CD_N,     PV2,          SDMMC3,     CLK12,      RSVD1,      RSVD2,      RSVD3,      RSVD,       INPUT,  0x33e8),\
313         PINGROUP(SPI1_CS1_N,      PW2,          AUDIO,      RSVD1,      SPI1,       SPI2,       I2C1,       RSVD,       INPUT,  0x33ec),\
314         PINGROUP(SPI1_CS2_N,      PW3,          AUDIO,      RSVD1,      SPI1,       SPI2,       I2C1,       RSVD,       INPUT,  0x33f0),\
315         PINGROUP(USB_VBUS_EN0,    PN4,          SYS,        RSVD,       RSVD,       RSVD,       RSVD,       RSVD,       INPUT,  0x33f4),\
316         PINGROUP(USB_VBUS_EN1,    PM5,          SYS,        RSVD,       RSVD,       RSVD,       RSVD,       RSVD,       INPUT,  0x33f8),\
317
318 const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] = {
319         PINGROUPS
320 };
321
322 #undef PINGROUP
323
324 #define PINGROUP(pg_name, gpio_nr, vdd, f0, f1, f2, f3, fs, iod, reg)   \
325         [TEGRA_GPIO_##gpio_nr] =  TEGRA_PINGROUP_ ##pg_name\
326
327 const int gpio_to_pingroup[TEGRA_MAX_GPIO] = {
328         PINGROUPS
329
330 };
331
332 #define SET_DRIVE(_name, _hsm, _schmitt, _drive, _pulldn_drive, _pullup_drive, _pulldn_slew, _pullup_slew) \
333         {                                                       \
334                 .pingroup = TEGRA_DRIVE_PINGROUP_##_name,       \
335                 .hsm = TEGRA_HSM_##_hsm,                        \
336                 .schmitt = TEGRA_SCHMITT_##_schmitt,            \
337                 .drive = TEGRA_DRIVE_##_drive,                  \
338                 .pull_down = TEGRA_PULL_##_pulldn_drive,        \
339                 .pull_up = TEGRA_PULL_##_pullup_drive,          \
340                 .slew_rising = TEGRA_SLEW_##_pulldn_slew,       \
341                 .slew_falling = TEGRA_SLEW_##_pullup_slew,      \
342         }
343
344 static __initdata struct tegra_drive_pingroup_config t12x_def_drive_pinmux[] = {
345         SET_DRIVE(DAP2, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST),
346 };
347
348 #ifdef CONFIG_PM_SLEEP
349
350 static u32 pinmux_reg[TEGRA_MAX_PINGROUP + ARRAY_SIZE(tegra_soc_drive_pingroups)];
351
352 static int tegra12x_pinmux_suspend(void)
353 {
354         unsigned int i;
355         u32 *ctx = pinmux_reg;
356
357         for (i = 0; i < TEGRA_MAX_PINGROUP; i++)
358                 *ctx++ = pg_readl(tegra_soc_pingroups[i].mux_bank,
359                                 tegra_soc_pingroups[i].mux_reg);
360
361         for (i = 0; i < ARRAY_SIZE(tegra_soc_drive_pingroups); i++)
362                 *ctx++ = pg_readl(tegra_soc_drive_pingroups[i].reg_bank,
363                                 tegra_soc_drive_pingroups[i].reg);
364
365         return 0;
366 }
367
368 #define PMC_IO_DPD_REQ          0x1B8
369 #define PMC_IO_DPD2_REQ         0x1C0
370
371 static void tegra12x_pinmux_resume(void)
372 {
373         void __iomem *pmc_base = IO_ADDRESS(TEGRA_PMC_BASE);
374         unsigned int i;
375         u32 *ctx = pinmux_reg;
376         u32 *tmp = pinmux_reg;
377         u32 reg_value;
378
379         for (i = 0; i < TEGRA_MAX_PINGROUP; i++) {
380                 reg_value = *tmp++;
381                 reg_value |= BIT(4); /* tristate */
382                 pg_writel(reg_value, tegra_soc_pingroups[i].mux_bank,
383                         tegra_soc_pingroups[i].mux_reg);
384         }
385
386         writel(0x400fffff, pmc_base + PMC_IO_DPD_REQ);
387         writel(0x40001fff, pmc_base + PMC_IO_DPD2_REQ);
388
389         for (i = 0; i < TEGRA_MAX_PINGROUP; i++)
390                 pg_writel(*ctx++, tegra_soc_pingroups[i].mux_bank,
391                         tegra_soc_pingroups[i].mux_reg);
392
393         for (i = 0; i < ARRAY_SIZE(tegra_soc_drive_pingroups); i++)
394                 pg_writel(*ctx++, tegra_soc_drive_pingroups[i].reg_bank,
395                         tegra_soc_drive_pingroups[i].reg);
396 }
397
398 static struct syscore_ops tegra_pinmux_syscore_ops = {
399         .suspend = tegra12x_pinmux_suspend,
400         .resume = tegra12x_pinmux_resume,
401 };
402 #endif
403
404 void tegra12x_pinmux_init(const struct tegra_pingroup_desc **pg,
405                 int *pg_max, const struct tegra_drive_pingroup_desc **pgdrive,
406                 int *pgdrive_max, const int **gpiomap, int *gpiomap_max)
407 {
408         *pg = tegra_soc_pingroups;
409         *pg_max = TEGRA_MAX_PINGROUP;
410         *pgdrive = tegra_soc_drive_pingroups;
411         *pgdrive_max = TEGRA_MAX_DRIVE_PINGROUP;
412         *gpiomap = gpio_to_pingroup;
413         *gpiomap_max = TEGRA_MAX_GPIO;
414
415 #ifdef CONFIG_PM_SLEEP
416         register_syscore_ops(&tegra_pinmux_syscore_ops);
417 #endif
418 }
419
420 void tegra12x_default_pinmux(void)
421 {
422         tegra_drive_pinmux_config_table(t12x_def_drive_pinmux,
423                                         ARRAY_SIZE(t12x_def_drive_pinmux));
424 }