ARM: tegra12: set CPU rate to 2.2GHz for sku 0x87
[linux-3.10.git] / arch / arm / mach-tegra / panel-s-edp-uhdtv-15-6.c
1 /*
2  * arch/arm/mach-tegra/panel-s-uhdtv-15-6.c
3  *
4  * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  */
18
19 #include <mach/dc.h>
20 #include <linux/delay.h>
21 #include <linux/gpio.h>
22 #include <linux/tegra_pwm_bl.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/pwm_backlight.h>
25 #include <linux/leds.h>
26 #include <linux/ioport.h>
27 #include "board.h"
28 #include "board-panel.h"
29 #include "devices.h"
30 #include "gpio-names.h"
31 #include "tegra12_host1x_devices.h"
32
33 #define DC_CTRL_MODE    TEGRA_DC_OUT_CONTINUOUS_MODE
34
35 #define EDP_PANEL_BL_PWM        TEGRA_GPIO_PH1
36
37 static bool reg_requested;
38 static struct platform_device *disp_device;
39
40 static struct regulator *vdd_lcd_bl_en; /* VDD_LCD_BL_EN */
41
42 static struct regulator *vdd_ds_1v8; /* VDD_1V8_AON */
43 static struct regulator *avdd_3v3_dp; /* EDP_3V3_IN: LCD_RST_GPIO */
44 static struct regulator *avdd_lcd; /* VDD_LCD_HV */
45
46 static struct tegra_dc_sd_settings edp_s_uhdtv_15_6_sd_settings = {
47         .enable = 1, /* enabled by default. */
48         .use_auto_pwm = false,
49         .hw_update_delay = 0,
50         .bin_width = -1,
51         .aggressiveness = 5,
52         .use_vid_luma = false,
53         .phase_in_adjustments = 0,
54         .k_limit_enable = true,
55         .k_limit = 200,
56         .sd_window_enable = false,
57         .soft_clipping_enable = true,
58         /* Low soft clipping threshold to compensate for aggressive k_limit */
59         .soft_clipping_threshold = 128,
60         .smooth_k_enable = false,
61         .smooth_k_incr = 64,
62         /* Default video coefficients */
63         .coeff = {5, 9, 2},
64         .fc = {0, 0},
65         /* Immediate backlight changes */
66         .blp = {1024, 255},
67         /* Gammas: R: 2.2 G: 2.2 B: 2.2 */
68         /* Default BL TF */
69         .bltf = {
70                         {
71                                 {57, 65, 73, 82},
72                                 {92, 103, 114, 125},
73                                 {138, 150, 164, 178},
74                                 {193, 208, 224, 241},
75                         },
76                 },
77         /* Default LUT */
78         .lut = {
79                         {
80                                 {255, 255, 255},
81                                 {199, 199, 199},
82                                 {153, 153, 153},
83                                 {116, 116, 116},
84                                 {85, 85, 85},
85                                 {59, 59, 59},
86                                 {36, 36, 36},
87                                 {17, 17, 17},
88                                 {0, 0, 0},
89                         },
90                 },
91         .sd_brightness = &sd_brightness,
92         .use_vpulse2 = true,
93 };
94
95 static int shield_edp_regulator_get(struct device *dev)
96 {
97         int err = 0;
98
99         if (reg_requested)
100                 return 0;
101
102         vdd_ds_1v8 = regulator_get(dev, "vdd_ds_1v8");
103         if (IS_ERR(vdd_ds_1v8)) {
104                 pr_err("vdd_ds_1v8 regulator get failed\n");
105                 err = PTR_ERR(vdd_ds_1v8);
106                 vdd_ds_1v8 = NULL;
107                 goto fail;
108         }
109
110         /* backlight */
111         vdd_lcd_bl_en = regulator_get(dev, "vdd_lcd_bl_en");
112         if (IS_ERR(vdd_lcd_bl_en)) {
113                 pr_err("vdd_lcd_bl_en regulator get failed\n");
114                 err = PTR_ERR(vdd_lcd_bl_en);
115                 vdd_lcd_bl_en = NULL;
116                 goto fail;
117         }
118
119         /* lcd */
120         avdd_lcd = regulator_get(dev, "avdd_lcd");
121         if (IS_ERR(avdd_lcd)) {
122                 pr_err("avdd_lcd regulator get failed\n");
123                 err = PTR_ERR(avdd_lcd);
124                 avdd_lcd = NULL;
125                 goto fail;
126         }
127
128         /* LCD_RST */
129         avdd_3v3_dp = regulator_get(dev, "avdd_3v3_dp");
130         if (IS_ERR(avdd_3v3_dp)) {
131                 pr_err("avdd_3v3_dp regulator get failed\n");
132                 err = PTR_ERR(avdd_3v3_dp);
133                 avdd_3v3_dp = NULL;
134                 goto fail;
135         }
136
137         reg_requested = true;
138         return 0;
139 fail:
140         return err;
141 }
142
143 static int edp_s_uhdtv_15_6_enable(struct device *dev)
144 {
145         int err = 0;
146
147         err = shield_edp_regulator_get(dev);
148         if (err < 0) {
149                 pr_err("edp regulator get failed\n");
150                 goto fail;
151         }
152
153         if (vdd_ds_1v8) {
154                 err = regulator_enable(vdd_ds_1v8);
155                 if (err < 0) {
156                         pr_err("vdd_ds_1v8 regulator enable failed\n");
157                         goto fail;
158                 }
159         }
160
161         if (avdd_lcd) {
162                 err = regulator_enable(avdd_lcd);
163                 if (err < 0) {
164                         pr_err("avdd_lcd regulator enable failed\n");
165                         goto fail;
166                 }
167         }
168
169         /* LCD_RST */
170         if (avdd_3v3_dp) {
171                 err = regulator_enable(avdd_3v3_dp);
172                 if (err < 0) {
173                         pr_err("avdd_3v3_dp regulator enable failed\n");
174                         goto fail;
175                 }
176         }
177
178         msleep(110);
179
180         if (vdd_lcd_bl_en) {
181                 err = regulator_enable(vdd_lcd_bl_en);
182                 if (err < 0) {
183                         pr_err("vdd_lcd_bl_en regulator enable failed\n");
184                         goto fail;
185                 }
186         }
187         msleep(180);
188
189         return 0;
190 fail:
191         return err;
192 }
193
194 static int edp_s_uhdtv_15_6_disable(void)
195 {
196         if (vdd_lcd_bl_en)
197                 regulator_disable(vdd_lcd_bl_en);
198
199         if (avdd_3v3_dp)
200                 regulator_disable(avdd_3v3_dp);
201
202         if (avdd_lcd)
203                 regulator_disable(avdd_lcd);
204
205         if (vdd_ds_1v8)
206                 regulator_disable(vdd_ds_1v8);
207
208         msleep(500);
209
210         return 0;
211 }
212
213 static int edp_s_uhdtv_15_6_postsuspend(void)
214 {
215         return 0;
216 }
217
218 static struct tegra_dc_out_pin edp_out_pins[] = {
219         {
220                 .name   = TEGRA_DC_OUT_PIN_H_SYNC,
221                 .pol    = TEGRA_DC_OUT_PIN_POL_LOW,
222         },
223         {
224                 .name   = TEGRA_DC_OUT_PIN_V_SYNC,
225                 .pol    = TEGRA_DC_OUT_PIN_POL_LOW,
226         },
227         {
228                 .name   = TEGRA_DC_OUT_PIN_PIXEL_CLOCK,
229                 .pol    = TEGRA_DC_OUT_PIN_POL_LOW,
230         },
231         {
232                 .name   = TEGRA_DC_OUT_PIN_DATA_ENABLE,
233                 .pol    = TEGRA_DC_OUT_PIN_POL_HIGH,
234         },
235 };
236
237 static struct tegra_dc_mode edp_s_uhdtv_15_6_modes[] = {
238         {
239                 .pclk = 522090000,
240                 .h_ref_to_sync = 1,
241                 .v_ref_to_sync = 1,
242                 .h_sync_width = 32,
243                 .v_sync_width = 5,
244                 .h_back_porch = 80,
245                 .v_back_porch = 54,
246                 .h_active = 3840,
247                 .v_active = 2160,
248                 .h_front_porch = 48,
249                 .v_front_porch = 3,
250         },
251 };
252
253 static int edp_s_uhdtv_15_6_bl_notify(struct device *unused, int brightness)
254 {
255         int cur_sd_brightness = atomic_read(&sd_brightness);
256
257         /* SD brightness is a percentage */
258         brightness = (brightness * cur_sd_brightness) / 255;
259
260         /* Apply any backlight response curve */
261         if (brightness > 255)
262                 pr_info("Error: Brightness > 255!\n");
263
264         return brightness;
265 }
266
267 static int edp_s_uhdtv_15_6_check_fb(struct device *dev, struct fb_info *info)
268 {
269         return info->device == &disp_device->dev;
270 }
271
272 static struct platform_pwm_backlight_data edp_s_uhdtv_15_6_bl_data = {
273         .pwm_id         = 1,
274         .max_brightness = 255,
275         .dft_brightness = 224,
276         .pwm_period_ns  = 5000000,
277         .pwm_gpio       = EDP_PANEL_BL_PWM,
278         .notify         = edp_s_uhdtv_15_6_bl_notify,
279         /* Only toggle backlight on fb blank notifications for disp1 */
280         .check_fb       = edp_s_uhdtv_15_6_check_fb,
281 };
282
283 static struct platform_device __maybe_unused
284                 edp_s_uhdtv_15_6_bl_device = {
285         .name   = "pwm-backlight",
286         .id     = -1,
287         .dev    = {
288                 .platform_data = &edp_s_uhdtv_15_6_bl_data,
289         },
290 };
291
292 static struct platform_device __maybe_unused
293                         *edp_s_uhdtv_15_6_bl_devices[] __initdata = {
294         &tegra_pwfm_device,
295         &edp_s_uhdtv_15_6_bl_device,
296 };
297
298 static int  __init edp_s_uhdtv_15_6_register_bl_dev(void)
299 {
300         int err = 0;
301         err = platform_add_devices(edp_s_uhdtv_15_6_bl_devices,
302                                 ARRAY_SIZE(edp_s_uhdtv_15_6_bl_devices));
303         if (err) {
304                 pr_err("disp1 bl device registration failed");
305                 return err;
306         }
307         return err;
308 }
309
310 static void edp_s_uhdtv_15_6_set_disp_device(
311         struct platform_device *shield_display_device)
312 {
313         disp_device = shield_display_device;
314 }
315
316 static void edp_s_uhdtv_15_6_dc_out_init(struct tegra_dc_out *out)
317 {
318         out->align = TEGRA_DC_ALIGN_MSB;
319         out->order = TEGRA_DC_ORDER_RED_BLUE;
320         out->flags = DC_CTRL_MODE;
321         out->modes = edp_s_uhdtv_15_6_modes;
322         out->n_modes = ARRAY_SIZE(edp_s_uhdtv_15_6_modes);
323         out->out_pins = edp_out_pins;
324         out->n_out_pins = ARRAY_SIZE(edp_out_pins);
325         out->depth = 16;
326         out->parent_clk = "pll_d_out0";
327         out->enable = edp_s_uhdtv_15_6_enable;
328         out->disable = edp_s_uhdtv_15_6_disable;
329         out->postsuspend = edp_s_uhdtv_15_6_postsuspend;
330         out->width = 346;
331         out->height = 194;
332         out->hotplug_gpio = TEGRA_GPIO_PFF0;
333 }
334
335 static void edp_s_uhdtv_15_6_fb_data_init(struct tegra_fb_data *fb)
336 {
337         fb->xres = edp_s_uhdtv_15_6_modes[0].h_active;
338         fb->yres = edp_s_uhdtv_15_6_modes[0].v_active;
339 }
340
341 static void
342 edp_s_uhdtv_15_6_sd_settings_init(struct tegra_dc_sd_settings *settings)
343 {
344         *settings = edp_s_uhdtv_15_6_sd_settings;
345         settings->bl_device_name = "pwm-backlight";
346 }
347
348 struct tegra_panel __initdata edp_s_uhdtv_15_6 = {
349         .init_sd_settings = edp_s_uhdtv_15_6_sd_settings_init,
350         .init_dc_out = edp_s_uhdtv_15_6_dc_out_init,
351         .init_fb_data = edp_s_uhdtv_15_6_fb_data_init,
352         .register_bl_dev = edp_s_uhdtv_15_6_register_bl_dev,
353         .set_disp_device = edp_s_uhdtv_15_6_set_disp_device,
354 };
355 EXPORT_SYMBOL(edp_s_uhdtv_15_6);