ARM: tegra: fix regulator_get() return value check
[linux-3.10.git] / arch / arm / mach-tegra / panel-lgd-wxga-7-0.c
1 /*
2  * arch/arm/mach-tegra/panel-lgd-wxga-7-0.c
3  *
4  * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  */
18
19 #include <linux/delay.h>
20 #include <linux/gpio.h>
21 #include <linux/tegra_pwm_bl.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/pwm_backlight.h>
24 #include <linux/max8831_backlight.h>
25 #include <linux/leds.h>
26 #include <linux/ioport.h>
27
28 #include <mach/dc.h>
29
30 #include "board.h"
31 #include "board-panel.h"
32 #include "devices.h"
33 #include "gpio-names.h"
34 #include "tegra11_host1x_devices.h"
35
36
37 #define DSI_PANEL_RESET         0
38 #define DSI_PANEL_BL_PWM        TEGRA_GPIO_PH1
39 #define DC_CTRL_MODE    TEGRA_DC_OUT_CONTINUOUS_MODE
40
41 static bool reg_requested;
42 static bool gpio_requested;
43 static struct platform_device *disp_device;
44 static struct regulator *avdd_lcd_3v3;
45 static struct regulator *vdd_lcd_bl_en;
46
47 static struct tegra_dsi_cmd dsi_lgd_wxga_7_0_init_cmd[] = {
48         DSI_CMD_SHORT(0x15, 0x01, 0x0),
49         DSI_DLY_MS(20),
50         DSI_CMD_SHORT(0x15, 0xAE, 0x0B),
51         DSI_CMD_SHORT(0x15, 0xEE, 0xEA),
52         DSI_CMD_SHORT(0x15, 0xEF, 0x5F),
53         DSI_CMD_SHORT(0x15, 0xF2, 0x68),
54         DSI_CMD_SHORT(0x15, 0xEE, 0x0),
55         DSI_CMD_SHORT(0x15, 0xEF, 0x0),
56 };
57
58 static struct tegra_dsi_cmd dsi_lgd_wxga_7_0_late_resume_cmd[] = {
59         DSI_CMD_SHORT(0x15, 0x10, 0x0),
60         DSI_DLY_MS(120),
61 };
62
63 static struct tegra_dsi_cmd dsi_lgd_wxga_7_0_early_suspend_cmd[] = {
64         DSI_CMD_SHORT(0x15, 0x11, 0x0),
65         DSI_DLY_MS(160),
66 };
67
68 static struct tegra_dsi_cmd dsi_lgd_wxga_7_0_suspend_cmd[] = {
69         DSI_CMD_SHORT(0x15, 0x11, 0x0),
70         DSI_DLY_MS(160),
71 };
72
73 static struct tegra_dsi_out dsi_lgd_wxga_7_0_pdata = {
74 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
75         .n_data_lanes = 2,
76         .controller_vs = DSI_VS_0,
77 #else
78         .controller_vs = DSI_VS_1,
79 #endif
80
81         .n_data_lanes = 4,
82         .video_burst_mode = TEGRA_DSI_VIDEO_NONE_BURST_MODE,
83
84         .pixel_format = TEGRA_DSI_PIXEL_FORMAT_24BIT_P,
85         .refresh_rate = 60,
86         .virtual_channel = TEGRA_DSI_VIRTUAL_CHANNEL_0,
87
88         .dsi_instance = DSI_INSTANCE_0,
89
90         .panel_reset = DSI_PANEL_RESET,
91         .power_saving_suspend = true,
92         .video_data_type = TEGRA_DSI_VIDEO_TYPE_VIDEO_MODE,
93
94         .video_clock_mode = TEGRA_DSI_VIDEO_CLOCK_TX_ONLY,
95
96         .dsi_init_cmd = dsi_lgd_wxga_7_0_init_cmd,
97         .n_init_cmd = ARRAY_SIZE(dsi_lgd_wxga_7_0_init_cmd),
98
99         .dsi_early_suspend_cmd = dsi_lgd_wxga_7_0_early_suspend_cmd,
100         .n_early_suspend_cmd = ARRAY_SIZE(dsi_lgd_wxga_7_0_early_suspend_cmd),
101
102         .dsi_late_resume_cmd = dsi_lgd_wxga_7_0_late_resume_cmd,
103         .n_late_resume_cmd = ARRAY_SIZE(dsi_lgd_wxga_7_0_late_resume_cmd),
104
105         .dsi_suspend_cmd = dsi_lgd_wxga_7_0_suspend_cmd,
106         .n_suspend_cmd = ARRAY_SIZE(dsi_lgd_wxga_7_0_suspend_cmd),
107
108         .phy_timing = {
109                 .t_clkprepare_ns = 27,
110                 .t_clkzero_ns = 330,
111                 .t_hsprepare_ns = 30,
112                 .t_datzero_ns = 270,
113         },
114 };
115
116 static int tegratab_dsi_regulator_get(struct device *dev)
117 {
118         int err = 0;
119
120         if (reg_requested)
121                 return 0;
122         avdd_lcd_3v3 = regulator_get(dev, "avdd_lcd");
123         if (IS_ERR(avdd_lcd_3v3)) {
124                 pr_err("avdd_lcd regulator get failed\n");
125                 err = PTR_ERR(avdd_lcd_3v3);
126                 avdd_lcd_3v3 = NULL;
127                 goto fail;
128         }
129
130         vdd_lcd_bl_en = regulator_get(dev, "vdd_lcd_bl_en");
131         if (IS_ERR(vdd_lcd_bl_en)) {
132                 pr_err("vdd_lcd_bl_en regulator get failed\n");
133                 err = PTR_ERR(vdd_lcd_bl_en);
134                 vdd_lcd_bl_en = NULL;
135                 goto fail;
136         }
137         reg_requested = true;
138         return 0;
139 fail:
140         return err;
141 }
142
143 static int tegratab_dsi_gpio_get(void)
144 {
145         int err = 0;
146
147         if (gpio_requested)
148                 return 0;
149
150         /* free pwm GPIO */
151         err = gpio_request(DSI_PANEL_BL_PWM, "panel pwm");
152         if (err < 0) {
153                 pr_err("panel pwm gpio request failed\n");
154                 goto fail;
155         }
156         gpio_free(DSI_PANEL_BL_PWM);
157         gpio_requested = true;
158         return 0;
159 fail:
160         return err;
161 }
162
163 static int dsi_lgd_wxga_7_0_enable(struct device *dev)
164 {
165         int err = 0;
166
167         err = tegratab_dsi_regulator_get(dev);
168
169         if (err < 0) {
170                 pr_err("dsi regulator get failed\n");
171                 goto fail;
172         }
173
174         err = tegratab_dsi_gpio_get();
175
176         if (err < 0) {
177                 pr_err("dsi gpio request failed\n");
178                 goto fail;
179         }
180
181         /*
182          * Turning on 1.8V then AVDD after 5ms is required per spec.
183          */
184         msleep(20);
185
186         if (avdd_lcd_3v3) {
187                 err = regulator_enable(avdd_lcd_3v3);
188                 if (err < 0) {
189                         pr_err("avdd_lcd regulator enable failed\n");
190                         goto fail;
191                 }
192                 regulator_set_voltage(avdd_lcd_3v3, 3300000, 3300000);
193         }
194
195         msleep(150);
196         if (vdd_lcd_bl_en) {
197                 err = regulator_enable(vdd_lcd_bl_en);
198                 if (err < 0) {
199                         pr_err("vdd_lcd_bl_en regulator enable failed\n");
200                         goto fail;
201                 }
202         }
203
204         msleep(100);
205 #if DSI_PANEL_RESET
206 /*
207  * Nothing is requested.
208  */
209 #endif
210
211         return 0;
212 fail:
213         return err;
214 }
215
216 static int dsi_lgd_wxga_7_0_disable(void)
217 {
218         if (vdd_lcd_bl_en)
219                 regulator_disable(vdd_lcd_bl_en);
220
221         if (avdd_lcd_3v3)
222                 regulator_disable(avdd_lcd_3v3);
223
224         return 0;
225 }
226
227 static int dsi_lgd_wxga_7_0_postsuspend(void)
228 {
229         return 0;
230 }
231
232 /*
233  * See display standard timings and a few constraints underneath
234  * \vendor\nvidia\tegra\core\drivers\hwinc
235  *
236  * Class: Display Standard Timings
237  *
238  * Programming of display timing registers must meet these restrictions:
239  * Constraint 1: H_REF_TO_SYNC + H_SYNC_WIDTH + H_BACK_PORCH > 11.
240  * Constraint 2: V_REF_TO_SYNC + V_SYNC_WIDTH + V_BACK_PORCH > 1.
241  * Constraint 3: V_FRONT_PORCH + V_SYNC_WIDTH +
242                                 V_BACK_PORCH > 1 (vertical blank).
243  * Constraint 4: V_SYNC_WIDTH >= 1, H_SYNC_WIDTH >= 1
244  * Constraint 5: V_REF_TO_SYNC >= 1, H_REF_TO_SYNC >= 0
245  * Constraint 6: V_FRONT_PORT >= (V_REF_TO_SYNC + 1),
246                                 H_FRONT_PORT >= (H_REF_TO_SYNC + 1)
247  * Constraint 7: H_DISP_ACTIVE >= 16, V_DISP_ACTIVE >= 16
248  */
249
250 /*
251  * how to determine pclk
252  * h_total =
253  * Horiz_BackPorch + Horiz_SyncWidth + Horiz_DispActive + Horiz_FrontPorch;
254  *
255  * v_total =
256  * Vert_BackPorch + Vert_SyncWidth + Vert_DispActive + Vert_FrontPorch;
257  * panel_freq = ( h_total * v_total * refresh_freq );
258  */
259
260 static struct tegra_dc_mode dsi_lgd_wxga_7_0_modes[] = {
261         {
262                 .pclk = 71000000, /* 890 *1323 *60 = 70648200 */
263                 .h_ref_to_sync = 10,
264                 .v_ref_to_sync = 1,
265                 .h_sync_width = 1,
266                 .v_sync_width = 1,
267                 .h_back_porch = 57,
268                 .v_back_porch = 14,
269                 .h_active = 800,
270                 .v_active = 1280,
271                 .h_front_porch = 32,
272                 .v_front_porch = 28,
273         },
274 };
275
276 static int dsi_lgd_wxga_7_0_bl_notify(struct device *unused, int brightness)
277 {
278         /*
279          * In early panel bring-up, we will
280          * not enable PRISM.
281          * Just use same brightness that is delivered from user side.
282          * TODO...
283          * use PRSIM brightness later.
284          */
285         if (brightness > 255) {
286                 pr_info("Error: Brightness > 255!\n");
287                 brightness = 255;
288         }
289         return brightness;
290 }
291
292 static int dsi_lgd_wxga_7_0_check_fb(struct device *dev, struct fb_info *info)
293 {
294         return info->device == &disp_device->dev;
295 }
296
297 static struct platform_pwm_backlight_data dsi_lgd_wxga_7_0_bl_data = {
298         .pwm_id         = 1,
299         .max_brightness = 255,
300         .dft_brightness = 224,
301         .pwm_period_ns  = 1000000,
302         .notify         = dsi_lgd_wxga_7_0_bl_notify,
303         /* Only toggle backlight on fb blank notifications for disp1 */
304         .check_fb       = dsi_lgd_wxga_7_0_check_fb,
305 };
306
307 static struct platform_device __maybe_unused
308                 dsi_lgd_wxga_7_0_bl_device = {
309         .name   = "pwm-backlight",
310         .id     = -1,
311         .dev    = {
312                 .platform_data = &dsi_lgd_wxga_7_0_bl_data,
313         },
314 };
315
316 static struct platform_device __maybe_unused
317                         *dsi_lgd_wxga_7_0_bl_devices[] __initdata = {
318         &tegra_pwfm_device,
319         &dsi_lgd_wxga_7_0_bl_device,
320 };
321
322 static unsigned int dsi_lgd_wxga_7_0_shield_edp_states[] = {
323         909, 809, 709, 609, 509, 410, 310, 210, 110, 0
324 };
325 static unsigned int dsi_lgd_wxga_7_0_shield_edp_brightness[] = {
326         255, 227, 199, 171, 143, 115, 87, 59, 31, 0
327 };
328 static unsigned int dsi_lgd_wxga_7_0_tn8_edp_states[] = {
329         909, 809, 709, 609, 509, 410, 310, 210, 110, 0
330 };
331 static unsigned int dsi_lgd_wxga_7_0_tn8_edp_brightness[] = {
332         255, 227, 199, 171, 143, 115, 87, 59, 31, 0
333 };
334
335 static int  __init dsi_lgd_wxga_7_0_register_bl_dev(void)
336 {
337         int err = 0;
338         struct board_info board_info;
339         tegra_get_board_info(&board_info);
340
341         if (board_info.board_id == BOARD_E1780) {
342                 if (board_info.sku == 1000) {
343                         dsi_lgd_wxga_7_0_bl_data.edp_states =
344                                 dsi_lgd_wxga_7_0_shield_edp_states;
345                         dsi_lgd_wxga_7_0_bl_data.edp_brightness =
346                                 dsi_lgd_wxga_7_0_shield_edp_brightness;
347                 } else if (board_info.sku == 1100) {
348                         dsi_lgd_wxga_7_0_bl_data.edp_states =
349                                 dsi_lgd_wxga_7_0_tn8_edp_states;
350                         dsi_lgd_wxga_7_0_bl_data.edp_brightness =
351                                 dsi_lgd_wxga_7_0_tn8_edp_brightness;
352                 }
353         }
354
355         err = platform_add_devices(dsi_lgd_wxga_7_0_bl_devices,
356                                 ARRAY_SIZE(dsi_lgd_wxga_7_0_bl_devices));
357         if (err) {
358                 pr_err("disp1 bl device registration failed");
359                 return err;
360         }
361         return err;
362 }
363
364 static void dsi_lgd_wxga_7_0_set_disp_device(
365         struct platform_device *display_device)
366 {
367         disp_device = display_device;
368 }
369
370 static void dsi_lgd_wxga_7_0_dc_out_init(struct tegra_dc_out *dc)
371 {
372         dc->dsi = &dsi_lgd_wxga_7_0_pdata;
373         dc->parent_clk = "pll_d_out0";
374         dc->modes = dsi_lgd_wxga_7_0_modes;
375         dc->n_modes = ARRAY_SIZE(dsi_lgd_wxga_7_0_modes);
376         dc->enable = dsi_lgd_wxga_7_0_enable;
377         dc->disable = dsi_lgd_wxga_7_0_disable;
378         dc->postsuspend = dsi_lgd_wxga_7_0_postsuspend,
379         dc->width = 94;
380         dc->height = 150;
381         dc->flags = DC_CTRL_MODE;
382 }
383
384 static void dsi_lgd_wxga_7_0_fb_data_init(struct tegra_fb_data *fb)
385 {
386         fb->xres = dsi_lgd_wxga_7_0_modes[0].h_active;
387         fb->yres = dsi_lgd_wxga_7_0_modes[0].v_active;
388 }
389
390 static void
391 dsi_lgd_wxga_7_0_sd_settings_init(struct tegra_dc_sd_settings *settings)
392 {
393         settings->bl_device_name = "pwm-backlight";
394 }
395
396 static void dsi_lgd_wxga_7_0_cmu_init(struct tegra_dc_platform_data *pdata)
397 {
398         pdata->cmu = NULL; /* will write CMU stuff after calibration */
399 }
400
401 struct tegra_panel __initdata dsi_lgd_wxga_7_0 = {
402         .init_sd_settings = dsi_lgd_wxga_7_0_sd_settings_init,
403         .init_dc_out = dsi_lgd_wxga_7_0_dc_out_init,
404         .init_fb_data = dsi_lgd_wxga_7_0_fb_data_init,
405         .register_bl_dev = dsi_lgd_wxga_7_0_register_bl_dev,
406         .init_cmu_data = dsi_lgd_wxga_7_0_cmu_init,
407         .set_disp_device = dsi_lgd_wxga_7_0_set_disp_device,
408 };
409 EXPORT_SYMBOL(dsi_lgd_wxga_7_0);
410