2 * arch/arm/mach-tegra/mc-timing-t12x.c
4 * Copyright (c) 2013, NVIDIA Corporation. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26 #define MC_LA_REG(mod) MC_LATENCY_ALLOWANCE_ ## mod
28 static u32 mc_timing_reg_table[] = {
41 MC_LA_REG(MPCORELP_0),
69 #define NUM_LA_REGS ARRAY_SIZE(mc_timing_reg_table)
71 void tegra12_mc_latency_allowance_save(u32 **pctx)
75 for (i = 0; i < NUM_LA_REGS; ++i)
76 *ctx++ = readl(IOMEM(mc +
77 mc_timing_reg_table[i]));
80 void tegra12_mc_latency_allowance_restore(u32 **pctx)
84 for (i = 0; i < NUM_LA_REGS; ++i)
85 __raw_writel(*ctx++, IOMEM(mc +
86 mc_timing_reg_table[i]));