ARM: tegra: thermal: Refactor struct balanced_throttle
[linux-3.10.git] / arch / arm / mach-tegra / include / mach / pinmux-tegra30.h
1 /*
2  * linux/arch/arm/mach-tegra/include/mach/pinmux-tegra30.h
3  *
4  * Copyright (C) 2010 Google, Inc.
5  * Copyright (C) 2010,2011 Nvidia, Inc.
6  *
7  * This software is licensed under the terms of the GNU General Public
8  * License version 2, as published by the Free Software Foundation, and
9  * may be copied, distributed, and modified under those terms.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  */
17
18 #ifndef __MACH_TEGRA_PINMUX_TEGRA30_H
19 #define __MACH_TEGRA_PINMUX_TEGRA30_H
20
21 void tegra30_default_pinmux(void);
22
23 enum tegra_pingroup {
24         TEGRA_PINGROUP_ULPI_DATA0 = 0,
25         TEGRA_PINGROUP_ULPI_DATA1,
26         TEGRA_PINGROUP_ULPI_DATA2,
27         TEGRA_PINGROUP_ULPI_DATA3,
28         TEGRA_PINGROUP_ULPI_DATA4,
29         TEGRA_PINGROUP_ULPI_DATA5,
30         TEGRA_PINGROUP_ULPI_DATA6,
31         TEGRA_PINGROUP_ULPI_DATA7,
32         TEGRA_PINGROUP_ULPI_CLK,
33         TEGRA_PINGROUP_ULPI_DIR,
34         TEGRA_PINGROUP_ULPI_NXT,
35         TEGRA_PINGROUP_ULPI_STP,
36         TEGRA_PINGROUP_DAP3_FS,
37         TEGRA_PINGROUP_DAP3_DIN,
38         TEGRA_PINGROUP_DAP3_DOUT,
39         TEGRA_PINGROUP_DAP3_SCLK,
40         TEGRA_PINGROUP_GPIO_PV0,
41         TEGRA_PINGROUP_GPIO_PV1,
42         TEGRA_PINGROUP_SDMMC1_CLK,
43         TEGRA_PINGROUP_SDMMC1_CMD,
44         TEGRA_PINGROUP_SDMMC1_DAT3,
45         TEGRA_PINGROUP_SDMMC1_DAT2,
46         TEGRA_PINGROUP_SDMMC1_DAT1,
47         TEGRA_PINGROUP_SDMMC1_DAT0,
48         TEGRA_PINGROUP_GPIO_PV2,
49         TEGRA_PINGROUP_GPIO_PV3,
50         TEGRA_PINGROUP_CLK2_OUT,
51         TEGRA_PINGROUP_CLK2_REQ,
52         TEGRA_PINGROUP_LCD_PWR1,
53         TEGRA_PINGROUP_LCD_PWR2,
54         TEGRA_PINGROUP_LCD_SDIN,
55         TEGRA_PINGROUP_LCD_SDOUT,
56         TEGRA_PINGROUP_LCD_WR_N,
57         TEGRA_PINGROUP_LCD_CS0_N,
58         TEGRA_PINGROUP_LCD_DC0,
59         TEGRA_PINGROUP_LCD_SCK,
60         TEGRA_PINGROUP_LCD_PWR0,
61         TEGRA_PINGROUP_LCD_PCLK,
62         TEGRA_PINGROUP_LCD_DE,
63         TEGRA_PINGROUP_LCD_HSYNC,
64         TEGRA_PINGROUP_LCD_VSYNC,
65         TEGRA_PINGROUP_LCD_D0,
66         TEGRA_PINGROUP_LCD_D1,
67         TEGRA_PINGROUP_LCD_D2,
68         TEGRA_PINGROUP_LCD_D3,
69         TEGRA_PINGROUP_LCD_D4,
70         TEGRA_PINGROUP_LCD_D5,
71         TEGRA_PINGROUP_LCD_D6,
72         TEGRA_PINGROUP_LCD_D7,
73         TEGRA_PINGROUP_LCD_D8,
74         TEGRA_PINGROUP_LCD_D9,
75         TEGRA_PINGROUP_LCD_D10,
76         TEGRA_PINGROUP_LCD_D11,
77         TEGRA_PINGROUP_LCD_D12,
78         TEGRA_PINGROUP_LCD_D13,
79         TEGRA_PINGROUP_LCD_D14,
80         TEGRA_PINGROUP_LCD_D15,
81         TEGRA_PINGROUP_LCD_D16,
82         TEGRA_PINGROUP_LCD_D17,
83         TEGRA_PINGROUP_LCD_D18,
84         TEGRA_PINGROUP_LCD_D19,
85         TEGRA_PINGROUP_LCD_D20,
86         TEGRA_PINGROUP_LCD_D21,
87         TEGRA_PINGROUP_LCD_D22,
88         TEGRA_PINGROUP_LCD_D23,
89         TEGRA_PINGROUP_LCD_CS1_N,
90         TEGRA_PINGROUP_LCD_M1,
91         TEGRA_PINGROUP_LCD_DC1,
92         TEGRA_PINGROUP_HDMI_INT,
93         TEGRA_PINGROUP_DDC_SCL,
94         TEGRA_PINGROUP_DDC_SDA,
95         TEGRA_PINGROUP_CRT_HSYNC,
96         TEGRA_PINGROUP_CRT_VSYNC,
97         TEGRA_PINGROUP_VI_D0,
98         TEGRA_PINGROUP_VI_D1,
99         TEGRA_PINGROUP_VI_D2,
100         TEGRA_PINGROUP_VI_D3,
101         TEGRA_PINGROUP_VI_D4,
102         TEGRA_PINGROUP_VI_D5,
103         TEGRA_PINGROUP_VI_D6,
104         TEGRA_PINGROUP_VI_D7,
105         TEGRA_PINGROUP_VI_D8,
106         TEGRA_PINGROUP_VI_D9,
107         TEGRA_PINGROUP_VI_D10,
108         TEGRA_PINGROUP_VI_D11,
109         TEGRA_PINGROUP_VI_PCLK,
110         TEGRA_PINGROUP_VI_MCLK,
111         TEGRA_PINGROUP_VI_VSYNC,
112         TEGRA_PINGROUP_VI_HSYNC,
113         TEGRA_PINGROUP_UART2_RXD,
114         TEGRA_PINGROUP_UART2_TXD,
115         TEGRA_PINGROUP_UART2_RTS_N,
116         TEGRA_PINGROUP_UART2_CTS_N,
117         TEGRA_PINGROUP_UART3_TXD,
118         TEGRA_PINGROUP_UART3_RXD,
119         TEGRA_PINGROUP_UART3_CTS_N,
120         TEGRA_PINGROUP_UART3_RTS_N,
121         TEGRA_PINGROUP_GPIO_PU0,
122         TEGRA_PINGROUP_GPIO_PU1,
123         TEGRA_PINGROUP_GPIO_PU2,
124         TEGRA_PINGROUP_GPIO_PU3,
125         TEGRA_PINGROUP_GPIO_PU4,
126         TEGRA_PINGROUP_GPIO_PU5,
127         TEGRA_PINGROUP_GPIO_PU6,
128         TEGRA_PINGROUP_GEN1_I2C_SDA,
129         TEGRA_PINGROUP_GEN1_I2C_SCL,
130         TEGRA_PINGROUP_DAP4_FS,
131         TEGRA_PINGROUP_DAP4_DIN,
132         TEGRA_PINGROUP_DAP4_DOUT,
133         TEGRA_PINGROUP_DAP4_SCLK,
134         TEGRA_PINGROUP_CLK3_OUT,
135         TEGRA_PINGROUP_CLK3_REQ,
136         TEGRA_PINGROUP_GMI_WP_N,
137         TEGRA_PINGROUP_GMI_IORDY,
138         TEGRA_PINGROUP_GMI_WAIT,
139         TEGRA_PINGROUP_GMI_ADV_N,
140         TEGRA_PINGROUP_GMI_CLK,
141         TEGRA_PINGROUP_GMI_CS0_N,
142         TEGRA_PINGROUP_GMI_CS1_N,
143         TEGRA_PINGROUP_GMI_CS2_N,
144         TEGRA_PINGROUP_GMI_CS3_N,
145         TEGRA_PINGROUP_GMI_CS4_N,
146         TEGRA_PINGROUP_GMI_CS6_N,
147         TEGRA_PINGROUP_GMI_CS7_N,
148         TEGRA_PINGROUP_GMI_AD0,
149         TEGRA_PINGROUP_GMI_AD1,
150         TEGRA_PINGROUP_GMI_AD2,
151         TEGRA_PINGROUP_GMI_AD3,
152         TEGRA_PINGROUP_GMI_AD4,
153         TEGRA_PINGROUP_GMI_AD5,
154         TEGRA_PINGROUP_GMI_AD6,
155         TEGRA_PINGROUP_GMI_AD7,
156         TEGRA_PINGROUP_GMI_AD8,
157         TEGRA_PINGROUP_GMI_AD9,
158         TEGRA_PINGROUP_GMI_AD10,
159         TEGRA_PINGROUP_GMI_AD11,
160         TEGRA_PINGROUP_GMI_AD12,
161         TEGRA_PINGROUP_GMI_AD13,
162         TEGRA_PINGROUP_GMI_AD14,
163         TEGRA_PINGROUP_GMI_AD15,
164         TEGRA_PINGROUP_GMI_A16,
165         TEGRA_PINGROUP_GMI_A17,
166         TEGRA_PINGROUP_GMI_A18,
167         TEGRA_PINGROUP_GMI_A19,
168         TEGRA_PINGROUP_GMI_WR_N,
169         TEGRA_PINGROUP_GMI_OE_N,
170         TEGRA_PINGROUP_GMI_DQS,
171         TEGRA_PINGROUP_GMI_RST_N,
172         TEGRA_PINGROUP_GEN2_I2C_SCL,
173         TEGRA_PINGROUP_GEN2_I2C_SDA,
174         TEGRA_PINGROUP_SDMMC4_CLK,
175         TEGRA_PINGROUP_SDMMC4_CMD,
176         TEGRA_PINGROUP_SDMMC4_DAT0,
177         TEGRA_PINGROUP_SDMMC4_DAT1,
178         TEGRA_PINGROUP_SDMMC4_DAT2,
179         TEGRA_PINGROUP_SDMMC4_DAT3,
180         TEGRA_PINGROUP_SDMMC4_DAT4,
181         TEGRA_PINGROUP_SDMMC4_DAT5,
182         TEGRA_PINGROUP_SDMMC4_DAT6,
183         TEGRA_PINGROUP_SDMMC4_DAT7,
184         TEGRA_PINGROUP_SDMMC4_RST_N,
185         TEGRA_PINGROUP_CAM_MCLK,
186         TEGRA_PINGROUP_GPIO_PCC1,
187         TEGRA_PINGROUP_GPIO_PBB0,
188         TEGRA_PINGROUP_CAM_I2C_SCL,
189         TEGRA_PINGROUP_CAM_I2C_SDA,
190         TEGRA_PINGROUP_GPIO_PBB3,
191         TEGRA_PINGROUP_GPIO_PBB4,
192         TEGRA_PINGROUP_GPIO_PBB5,
193         TEGRA_PINGROUP_GPIO_PBB6,
194         TEGRA_PINGROUP_GPIO_PBB7,
195         TEGRA_PINGROUP_GPIO_PCC2,
196         TEGRA_PINGROUP_JTAG_RTCK,
197         TEGRA_PINGROUP_PWR_I2C_SCL,
198         TEGRA_PINGROUP_PWR_I2C_SDA,
199         TEGRA_PINGROUP_KB_ROW0,
200         TEGRA_PINGROUP_KB_ROW1,
201         TEGRA_PINGROUP_KB_ROW2,
202         TEGRA_PINGROUP_KB_ROW3,
203         TEGRA_PINGROUP_KB_ROW4,
204         TEGRA_PINGROUP_KB_ROW5,
205         TEGRA_PINGROUP_KB_ROW6,
206         TEGRA_PINGROUP_KB_ROW7,
207         TEGRA_PINGROUP_KB_ROW8,
208         TEGRA_PINGROUP_KB_ROW9,
209         TEGRA_PINGROUP_KB_ROW10,
210         TEGRA_PINGROUP_KB_ROW11,
211         TEGRA_PINGROUP_KB_ROW12,
212         TEGRA_PINGROUP_KB_ROW13,
213         TEGRA_PINGROUP_KB_ROW14,
214         TEGRA_PINGROUP_KB_ROW15,
215         TEGRA_PINGROUP_KB_COL0,
216         TEGRA_PINGROUP_KB_COL1,
217         TEGRA_PINGROUP_KB_COL2,
218         TEGRA_PINGROUP_KB_COL3,
219         TEGRA_PINGROUP_KB_COL4,
220         TEGRA_PINGROUP_KB_COL5,
221         TEGRA_PINGROUP_KB_COL6,
222         TEGRA_PINGROUP_KB_COL7,
223         TEGRA_PINGROUP_CLK_32K_OUT,
224         TEGRA_PINGROUP_SYS_CLK_REQ,
225         TEGRA_PINGROUP_CORE_PWR_REQ,
226         TEGRA_PINGROUP_CPU_PWR_REQ,
227         TEGRA_PINGROUP_PWR_INT_N,
228         TEGRA_PINGROUP_CLK_32K_IN,
229         TEGRA_PINGROUP_OWR,
230         TEGRA_PINGROUP_DAP1_FS,
231         TEGRA_PINGROUP_DAP1_DIN,
232         TEGRA_PINGROUP_DAP1_DOUT,
233         TEGRA_PINGROUP_DAP1_SCLK,
234         TEGRA_PINGROUP_CLK1_REQ,
235         TEGRA_PINGROUP_CLK1_OUT,
236         TEGRA_PINGROUP_SPDIF_IN,
237         TEGRA_PINGROUP_SPDIF_OUT,
238         TEGRA_PINGROUP_DAP2_FS,
239         TEGRA_PINGROUP_DAP2_DIN,
240         TEGRA_PINGROUP_DAP2_DOUT,
241         TEGRA_PINGROUP_DAP2_SCLK,
242         TEGRA_PINGROUP_SPI2_MOSI,
243         TEGRA_PINGROUP_SPI2_MISO,
244         TEGRA_PINGROUP_SPI2_CS0_N,
245         TEGRA_PINGROUP_SPI2_SCK,
246         TEGRA_PINGROUP_SPI1_MOSI,
247         TEGRA_PINGROUP_SPI1_SCK,
248         TEGRA_PINGROUP_SPI1_CS0_N,
249         TEGRA_PINGROUP_SPI1_MISO,
250         TEGRA_PINGROUP_SPI2_CS1_N,
251         TEGRA_PINGROUP_SPI2_CS2_N,
252         TEGRA_PINGROUP_SDMMC3_CLK,
253         TEGRA_PINGROUP_SDMMC3_CMD,
254         TEGRA_PINGROUP_SDMMC3_DAT0,
255         TEGRA_PINGROUP_SDMMC3_DAT1,
256         TEGRA_PINGROUP_SDMMC3_DAT2,
257         TEGRA_PINGROUP_SDMMC3_DAT3,
258         TEGRA_PINGROUP_SDMMC3_DAT4,
259         TEGRA_PINGROUP_SDMMC3_DAT5,
260         TEGRA_PINGROUP_SDMMC3_DAT6,
261         TEGRA_PINGROUP_SDMMC3_DAT7,
262         TEGRA_PINGROUP_PEX_L0_PRSNT_N,
263         TEGRA_PINGROUP_PEX_L0_RST_N,
264         TEGRA_PINGROUP_PEX_L0_CLKREQ_N,
265         TEGRA_PINGROUP_PEX_WAKE_N,
266         TEGRA_PINGROUP_PEX_L1_PRSNT_N,
267         TEGRA_PINGROUP_PEX_L1_RST_N,
268         TEGRA_PINGROUP_PEX_L1_CLKREQ_N,
269         TEGRA_PINGROUP_PEX_L2_PRSNT_N,
270         TEGRA_PINGROUP_PEX_L2_RST_N,
271         TEGRA_PINGROUP_PEX_L2_CLKREQ_N,
272         TEGRA_PINGROUP_HDMI_CEC,
273         TEGRA_MAX_PINGROUP,
274 };
275
276 enum tegra_drive_pingroup {
277         TEGRA_DRIVE_PINGROUP_AO1 = 0,
278         TEGRA_DRIVE_PINGROUP_AO2,
279         TEGRA_DRIVE_PINGROUP_AT1,
280         TEGRA_DRIVE_PINGROUP_AT2,
281         TEGRA_DRIVE_PINGROUP_AT3,
282         TEGRA_DRIVE_PINGROUP_AT4,
283         TEGRA_DRIVE_PINGROUP_AT5,
284         TEGRA_DRIVE_PINGROUP_CDEV1,
285         TEGRA_DRIVE_PINGROUP_CDEV2,
286         TEGRA_DRIVE_PINGROUP_CSUS,
287         TEGRA_DRIVE_PINGROUP_DAP1,
288         TEGRA_DRIVE_PINGROUP_DAP2,
289         TEGRA_DRIVE_PINGROUP_DAP3,
290         TEGRA_DRIVE_PINGROUP_DAP4,
291         TEGRA_DRIVE_PINGROUP_DBG,
292         TEGRA_DRIVE_PINGROUP_LCD1,
293         TEGRA_DRIVE_PINGROUP_LCD2,
294         TEGRA_DRIVE_PINGROUP_SDIO2,
295         TEGRA_DRIVE_PINGROUP_SDIO3,
296         TEGRA_DRIVE_PINGROUP_SPI,
297         TEGRA_DRIVE_PINGROUP_UAA,
298         TEGRA_DRIVE_PINGROUP_UAB,
299         TEGRA_DRIVE_PINGROUP_UART2,
300         TEGRA_DRIVE_PINGROUP_UART3,
301         TEGRA_DRIVE_PINGROUP_VI1,
302         TEGRA_DRIVE_PINGROUP_SDIO1,
303         TEGRA_DRIVE_PINGROUP_CRT,
304         TEGRA_DRIVE_PINGROUP_DDC,
305         TEGRA_DRIVE_PINGROUP_GMA,
306         TEGRA_DRIVE_PINGROUP_GMB,
307         TEGRA_DRIVE_PINGROUP_GMC,
308         TEGRA_DRIVE_PINGROUP_GMD,
309         TEGRA_DRIVE_PINGROUP_GME,
310         TEGRA_DRIVE_PINGROUP_GMF,
311         TEGRA_DRIVE_PINGROUP_GMG,
312         TEGRA_DRIVE_PINGROUP_GMH,
313         TEGRA_DRIVE_PINGROUP_OWR,
314         TEGRA_DRIVE_PINGROUP_UAD,
315         TEGRA_DRIVE_PINGROUP_GPV,
316         TEGRA_DRIVE_PINGROUP_DEV3,
317         TEGRA_DRIVE_PINGROUP_CEC,
318         TEGRA_MAX_DRIVE_PINGROUP,
319 };
320
321 #endif
322