arm: tegra: refactor Tegra14x leakage and dynamic model
[linux-3.10.git] / arch / arm / mach-tegra / edp.c
1 /*
2  * arch/arm/mach-tegra/edp.c
3  *
4  * Copyright (c) 2011-2013, NVIDIA CORPORATION. All Rights Reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  */
18
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/seq_file.h>
22 #include <linux/slab.h>
23 #include <linux/module.h>
24 #include <linux/uaccess.h>
25 #include <linux/edp.h>
26
27 #include <mach/edp.h>
28 #include <mach/hardware.h>
29
30 #include "fuse.h"
31 #include "dvfs.h"
32 #include "clock.h"
33 #include "cpu-tegra.h"
34
35 #define FREQ_STEP 12750000
36 #define OVERRIDE_DEFAULT 6000
37
38 static struct tegra_edp_limits *edp_limits;
39 static int edp_limits_size;
40 static unsigned int regulator_cur;
41 /* Value to subtract from regulator current limit */
42 static unsigned int edp_reg_override_mA = OVERRIDE_DEFAULT;
43
44 static const unsigned int *system_edp_limits;
45
46 static struct tegra_system_edp_entry *power_edp_limits;
47 static int power_edp_limits_size;
48
49 /*
50  * Temperature step size cannot be less than 4C because of hysteresis
51  * delta
52  * Code assumes different temperatures for the same speedo_id /
53  * regulator_cur are adjacent in the table, and higest regulator_cur
54  * comes first
55  */
56 static char __initdata tegra_edp_vdd_cpu_map[] = {
57         0x00, 0x2f, 0x17, 0x7d, 0x73, 0x73, 0x73, 0x00,
58         0x2f, 0x2d, 0x82, 0x78, 0x78, 0x78, 0x00, 0x2f,
59         0x3c, 0x82, 0x78, 0x78, 0x78, 0x00, 0x2f, 0x4b,
60         0x82, 0x78, 0x78, 0x78, 0x00, 0x2f, 0x55, 0x82,
61         0x78, 0x78, 0x78, 0x00, 0x28, 0x17, 0x7d, 0x73,
62         0x73, 0x73, 0x00, 0x28, 0x2d, 0x82, 0x78, 0x78,
63         0x78, 0x00, 0x28, 0x3c, 0x82, 0x78, 0x78, 0x78,
64         0x00, 0x28, 0x4b, 0x82, 0x78, 0x78, 0x73, 0x00,
65         0x28, 0x55, 0x82, 0x78, 0x78, 0x69, 0x00, 0x23,
66         0x17, 0x7d, 0x73, 0x73, 0x73, 0x00, 0x23, 0x2d,
67         0x82, 0x78, 0x78, 0x78, 0x00, 0x23, 0x3c, 0x82,
68         0x78, 0x78, 0x6e, 0x00, 0x23, 0x4b, 0x82, 0x78,
69         0x78, 0x64, 0x00, 0x23, 0x55, 0x82, 0x78, 0x6e,
70         0x5a, 0x00, 0x1e, 0x17, 0x7d, 0x73, 0x73, 0x64,
71         0x00, 0x1e, 0x2d, 0x82, 0x78, 0x78, 0x69, 0x00,
72         0x1e, 0x3c, 0x82, 0x78, 0x78, 0x64, 0x00, 0x1e,
73         0x4b, 0x82, 0x78, 0x6e, 0x5a, 0x00, 0x1e, 0x55,
74         0x82, 0x78, 0x64, 0x50, 0x00, 0x19, 0x17, 0x7d,
75         0x73, 0x69, 0x55, 0x00, 0x19, 0x2d, 0x82, 0x78,
76         0x6e, 0x5a, 0x00, 0x19, 0x3c, 0x82, 0x78, 0x69,
77         0x55, 0x00, 0x19, 0x4b, 0x82, 0x78, 0x5f, 0x4b,
78         0x00, 0x19, 0x55, 0x82, 0x73, 0x55, 0x3c, 0x01,
79         0x2f, 0x17, 0x7d, 0x73, 0x73, 0x73, 0x01, 0x2f,
80         0x2d, 0x82, 0x78, 0x78, 0x78, 0x01, 0x2f, 0x3c,
81         0x82, 0x78, 0x78, 0x78, 0x01, 0x2f, 0x4b, 0x82,
82         0x78, 0x78, 0x78, 0x01, 0x2f, 0x55, 0x82, 0x78,
83         0x78, 0x78, 0x01, 0x28, 0x17, 0x7d, 0x73, 0x73,
84         0x73, 0x01, 0x28, 0x2d, 0x82, 0x78, 0x78, 0x78,
85         0x01, 0x28, 0x3c, 0x82, 0x78, 0x78, 0x78, 0x01,
86         0x28, 0x4b, 0x82, 0x78, 0x78, 0x73, 0x01, 0x28,
87         0x55, 0x82, 0x78, 0x78, 0x69, 0x01, 0x23, 0x17,
88         0x7d, 0x73, 0x73, 0x73, 0x01, 0x23, 0x2d, 0x82,
89         0x78, 0x78, 0x78, 0x01, 0x23, 0x3c, 0x82, 0x78,
90         0x78, 0x6e, 0x01, 0x23, 0x4b, 0x82, 0x78, 0x78,
91         0x64, 0x01, 0x23, 0x55, 0x82, 0x78, 0x6e, 0x5a,
92         0x01, 0x1e, 0x17, 0x7d, 0x73, 0x73, 0x64, 0x01,
93         0x1e, 0x2d, 0x82, 0x78, 0x78, 0x69, 0x01, 0x1e,
94         0x3c, 0x82, 0x78, 0x78, 0x64, 0x01, 0x1e, 0x4b,
95         0x82, 0x78, 0x6e, 0x5a, 0x01, 0x1e, 0x55, 0x82,
96         0x78, 0x64, 0x50, 0x01, 0x19, 0x17, 0x7d, 0x73,
97         0x69, 0x55, 0x01, 0x19, 0x2d, 0x82, 0x78, 0x6e,
98         0x5a, 0x01, 0x19, 0x3c, 0x82, 0x78, 0x69, 0x55,
99         0x01, 0x19, 0x4b, 0x82, 0x78, 0x5f, 0x4b, 0x01,
100         0x19, 0x55, 0x82, 0x73, 0x55, 0x3c, 0x02, 0x3d,
101         0x17, 0x87, 0x7d, 0x7d, 0x7d, 0x02, 0x3d, 0x2d,
102         0x8c, 0x82, 0x82, 0x82, 0x02, 0x3d, 0x3c, 0x8c,
103         0x82, 0x82, 0x82, 0x02, 0x3d, 0x4b, 0x8c, 0x82,
104         0x82, 0x82, 0x02, 0x3d, 0x55, 0x8c, 0x82, 0x82,
105         0x82, 0x02, 0x32, 0x17, 0x87, 0x7d, 0x7d, 0x7d,
106         0x02, 0x32, 0x2d, 0x8c, 0x82, 0x82, 0x82, 0x02,
107         0x32, 0x3c, 0x8c, 0x82, 0x82, 0x82, 0x02, 0x32,
108         0x4b, 0x8c, 0x82, 0x82, 0x78, 0x02, 0x32, 0x55,
109         0x8c, 0x82, 0x82, 0x6e, 0x02, 0x28, 0x17, 0x87,
110         0x7d, 0x7d, 0x73, 0x02, 0x28, 0x2d, 0x8c, 0x82,
111         0x82, 0x78, 0x02, 0x28, 0x3c, 0x8c, 0x82, 0x82,
112         0x73, 0x02, 0x28, 0x4b, 0x8c, 0x82, 0x78, 0x69,
113         0x02, 0x28, 0x55, 0x8c, 0x82, 0x6e, 0x5a, 0x02,
114         0x23, 0x17, 0x87, 0x7d, 0x7d, 0x69, 0x02, 0x23,
115         0x2d, 0x8c, 0x82, 0x82, 0x6e, 0x02, 0x23, 0x3c,
116         0x8c, 0x82, 0x78, 0x69, 0x02, 0x23, 0x4b, 0x8c,
117         0x82, 0x6e, 0x5a, 0x02, 0x23, 0x55, 0x8c, 0x82,
118         0x64, 0x50, 0x03, 0x3d, 0x17, 0x87, 0x7d, 0x7d,
119         0x7d, 0x03, 0x3d, 0x2d, 0x8c, 0x82, 0x82, 0x82,
120         0x03, 0x3d, 0x3c, 0x8c, 0x82, 0x82, 0x82, 0x03,
121         0x3d, 0x4b, 0x8c, 0x82, 0x82, 0x82, 0x03, 0x3d,
122         0x55, 0x8c, 0x82, 0x82, 0x82, 0x03, 0x32, 0x17,
123         0x87, 0x7d, 0x7d, 0x7d, 0x03, 0x32, 0x2d, 0x8c,
124         0x82, 0x82, 0x82, 0x03, 0x32, 0x3c, 0x8c, 0x82,
125         0x82, 0x82, 0x03, 0x32, 0x4b, 0x8c, 0x82, 0x82,
126         0x78, 0x03, 0x32, 0x55, 0x8c, 0x82, 0x82, 0x6e,
127         0x03, 0x28, 0x17, 0x87, 0x7d, 0x7d, 0x73, 0x03,
128         0x28, 0x2d, 0x8c, 0x82, 0x82, 0x78, 0x03, 0x28,
129         0x3c, 0x8c, 0x82, 0x82, 0x73, 0x03, 0x28, 0x4b,
130         0x8c, 0x82, 0x78, 0x69, 0x03, 0x28, 0x55, 0x8c,
131         0x82, 0x6e, 0x5a, 0x03, 0x23, 0x17, 0x87, 0x7d,
132         0x7d, 0x69, 0x03, 0x23, 0x2d, 0x8c, 0x82, 0x82,
133         0x6e, 0x03, 0x23, 0x3c, 0x8c, 0x82, 0x78, 0x69,
134         0x03, 0x23, 0x4b, 0x8c, 0x82, 0x6e, 0x5a, 0x03,
135         0x23, 0x55, 0x8c, 0x82, 0x64, 0x50, 0x04, 0x32,
136         0x17, 0x91, 0x87, 0x87, 0x87, 0x04, 0x32, 0x2d,
137         0x96, 0x8c, 0x8c, 0x8c, 0x04, 0x32, 0x3c, 0x96,
138         0x8c, 0x8c, 0x8c, 0x04, 0x32, 0x46, 0x96, 0x8c,
139         0x8c, 0x8c, 0x04, 0x32, 0x4b, 0x82, 0x78, 0x78,
140         0x78, 0x04, 0x32, 0x55, 0x82, 0x78, 0x78, 0x78,
141         0x04, 0x2f, 0x17, 0x91, 0x87, 0x87, 0x87, 0x04,
142         0x2f, 0x2d, 0x96, 0x8c, 0x8c, 0x8c, 0x04, 0x2f,
143         0x3c, 0x96, 0x8c, 0x8c, 0x8c, 0x04, 0x2f, 0x46,
144         0x96, 0x8c, 0x8c, 0x82, 0x04, 0x2f, 0x4b, 0x82,
145         0x78, 0x78, 0x78, 0x04, 0x2f, 0x55, 0x82, 0x78,
146         0x78, 0x78, 0x04, 0x28, 0x17, 0x91, 0x87, 0x87,
147         0x87, 0x04, 0x28, 0x2d, 0x96, 0x8c, 0x8c, 0x82,
148         0x04, 0x28, 0x3c, 0x96, 0x8c, 0x8c, 0x82, 0x04,
149         0x28, 0x46, 0x96, 0x8c, 0x8c, 0x78, 0x04, 0x28,
150         0x4b, 0x82, 0x78, 0x78, 0x78, 0x04, 0x28, 0x55,
151         0x82, 0x78, 0x78, 0x6e, 0x04, 0x23, 0x17, 0x91,
152         0x87, 0x87, 0x73, 0x04, 0x23, 0x2d, 0x96, 0x8c,
153         0x8c, 0x78, 0x04, 0x23, 0x3c, 0x96, 0x8c, 0x82,
154         0x78, 0x04, 0x23, 0x46, 0x96, 0x8c, 0x82, 0x6e,
155         0x04, 0x23, 0x4b, 0x82, 0x78, 0x78, 0x6e, 0x04,
156         0x23, 0x55, 0x82, 0x78, 0x78, 0x64, 0x04, 0x1e,
157         0x17, 0x91, 0x87, 0x7d, 0x69, 0x04, 0x1e, 0x2d,
158         0x96, 0x8c, 0x82, 0x6e, 0x04, 0x1e, 0x3c, 0x96,
159         0x8c, 0x78, 0x64, 0x04, 0x1e, 0x46, 0x96, 0x8c,
160         0x78, 0x5a, 0x04, 0x1e, 0x4b, 0x82, 0x78, 0x78,
161         0x5a, 0x04, 0x1e, 0x55, 0x82, 0x78, 0x64, 0x50,
162         0x04, 0x19, 0x17, 0x91, 0x87, 0x69, 0x55, 0x04,
163         0x19, 0x2d, 0x96, 0x8c, 0x6e, 0x5a, 0x04, 0x19,
164         0x3c, 0x96, 0x82, 0x6e, 0x55, 0x04, 0x19, 0x46,
165         0x96, 0x82, 0x64, 0x50, 0x04, 0x19, 0x4b, 0x82,
166         0x78, 0x64, 0x50, 0x04, 0x19, 0x55, 0x82, 0x78,
167         0x55, 0x3c, 0x05, 0x64, 0x17, 0xa5, 0x9b, 0x9b,
168         0x9b, 0x05, 0x64, 0x2d, 0xaa, 0xa0, 0xa0, 0xa0,
169         0x05, 0x64, 0x3c, 0xaa, 0xa0, 0xa0, 0xa0, 0x05,
170         0x64, 0x46, 0xaa, 0xa0, 0xa0, 0xa0, 0x05, 0x64,
171         0x4b, 0x8c, 0x82, 0x82, 0x82, 0x05, 0x64, 0x55,
172         0x8c, 0x82, 0x82, 0x82, 0x05, 0x50, 0x17, 0xa5,
173         0x9b, 0x9b, 0x9b, 0x05, 0x50, 0x2d, 0xaa, 0xa0,
174         0xa0, 0xa0, 0x05, 0x50, 0x3c, 0xaa, 0xa0, 0xa0,
175         0x96, 0x05, 0x50, 0x46, 0xaa, 0xa0, 0xa0, 0x96,
176         0x05, 0x50, 0x4b, 0x8c, 0x82, 0x82, 0x82, 0x05,
177         0x50, 0x55, 0x8c, 0x82, 0x82, 0x82, 0x05, 0x3c,
178         0x17, 0xa5, 0x9b, 0x9b, 0x87, 0x05, 0x3c, 0x2d,
179         0xaa, 0xa0, 0xa0, 0x8c, 0x05, 0x3c, 0x3c, 0xaa,
180         0xa0, 0x96, 0x82, 0x05, 0x3c, 0x46, 0xaa, 0xa0,
181         0x96, 0x78, 0x05, 0x3c, 0x4b, 0x8c, 0x82, 0x82,
182         0x78, 0x05, 0x3c, 0x55, 0x8c, 0x82, 0x82, 0x6e,
183         0x05, 0x28, 0x17, 0xa5, 0x91, 0x7d, 0x69, 0x05,
184         0x28, 0x2d, 0xaa, 0x96, 0x82, 0x6e, 0x05, 0x28,
185         0x3c, 0xaa, 0x96, 0x78, 0x64, 0x05, 0x28, 0x46,
186         0xaa, 0x8c, 0x6e, 0x5a, 0x05, 0x28, 0x4b, 0x8c,
187         0x82, 0x6e, 0x5a, 0x05, 0x28, 0x55, 0x8c, 0x82,
188         0x64, 0x50, 0x06, 0x3d, 0x17, 0xa5, 0x9b, 0x7d,
189         0x7d, 0x06, 0x3d, 0x2d, 0xaa, 0xa0, 0x82, 0x82,
190         0x06, 0x3d, 0x3c, 0xaa, 0xa0, 0x82, 0x82, 0x06,
191         0x3d, 0x46, 0xaa, 0xa0, 0x82, 0x82, 0x06, 0x3d,
192         0x4b, 0x8c, 0x82, 0x82, 0x82, 0x06, 0x3d, 0x55,
193         0x8c, 0x82, 0x82, 0x82, 0x06, 0x32, 0x17, 0xa5,
194         0x9b, 0x7d, 0x7d, 0x06, 0x32, 0x2d, 0xaa, 0xa0,
195         0x82, 0x82, 0x06, 0x32, 0x3c, 0xaa, 0xa0, 0x82,
196         0x82, 0x06, 0x32, 0x46, 0xaa, 0xa0, 0x82, 0x78,
197         0x06, 0x32, 0x4b, 0x8c, 0x82, 0x82, 0x78, 0x06,
198         0x32, 0x55, 0x8c, 0x82, 0x82, 0x6e, 0x06, 0x28,
199         0x17, 0xa5, 0x9b, 0x7d, 0x73, 0x06, 0x28, 0x2d,
200         0xaa, 0xa0, 0x82, 0x78, 0x06, 0x28, 0x3c, 0xaa,
201         0x96, 0x82, 0x73, 0x06, 0x28, 0x46, 0xaa, 0x96,
202         0x78, 0x69, 0x06, 0x28, 0x4b, 0x8c, 0x82, 0x78,
203         0x69, 0x06, 0x28, 0x55, 0x8c, 0x82, 0x6e, 0x5a,
204         0x06, 0x23, 0x17, 0xa5, 0x91, 0x7d, 0x69, 0x06,
205         0x23, 0x2d, 0xaa, 0x96, 0x82, 0x6e, 0x06, 0x23,
206         0x3c, 0xaa, 0x96, 0x78, 0x69, 0x06, 0x23, 0x46,
207         0xaa, 0x8c, 0x6e, 0x5a, 0x06, 0x23, 0x4b, 0x8c,
208         0x82, 0x6e, 0x5a, 0x06, 0x23, 0x55, 0x8c, 0x82,
209         0x64, 0x50, 0x07, 0x3b, 0x17, 0x7d, 0x73, 0x73,
210         0x73, 0x07, 0x3b, 0x2d, 0x82, 0x78, 0x78, 0x78,
211         0x07, 0x3b, 0x3c, 0x82, 0x78, 0x78, 0x78, 0x07,
212         0x3b, 0x4b, 0x82, 0x78, 0x78, 0x78, 0x07, 0x3b,
213         0x5a, 0x82, 0x78, 0x78, 0x78, 0x07, 0x32, 0x17,
214         0x7d, 0x73, 0x73, 0x73, 0x07, 0x32, 0x2d, 0x82,
215         0x78, 0x78, 0x78, 0x07, 0x32, 0x3c, 0x82, 0x78,
216         0x78, 0x78, 0x07, 0x32, 0x4b, 0x82, 0x78, 0x78,
217         0x78, 0x07, 0x32, 0x5a, 0x82, 0x78, 0x6e, 0x64,
218         0x07, 0x28, 0x17, 0x7d, 0x73, 0x73, 0x69, 0x07,
219         0x28, 0x2d, 0x82, 0x78, 0x78, 0x6e, 0x07, 0x28,
220         0x3c, 0x82, 0x78, 0x78, 0x64, 0x07, 0x28, 0x4b,
221         0x82, 0x78, 0x78, 0x64, 0x07, 0x28, 0x5a, 0x82,
222         0x78, 0x64, 0x50, 0x07, 0x23, 0x17, 0x7d, 0x73,
223         0x73, 0x5f, 0x07, 0x23, 0x2d, 0x82, 0x78, 0x78,
224         0x64, 0x07, 0x23, 0x3c, 0x82, 0x78, 0x78, 0x64,
225         0x07, 0x23, 0x4b, 0x82, 0x78, 0x64, 0x50, 0x07,
226         0x23, 0x5a, 0x82, 0x78, 0x5a, 0x46, 0x08, 0x3b,
227         0x17, 0x7d, 0x73, 0x73, 0x73, 0x08, 0x3b, 0x2d,
228         0x82, 0x78, 0x78, 0x78, 0x08, 0x3b, 0x3c, 0x82,
229         0x78, 0x78, 0x78, 0x08, 0x3b, 0x4b, 0x82, 0x78,
230         0x78, 0x78, 0x08, 0x3b, 0x5a, 0x82, 0x78, 0x78,
231         0x78, 0x08, 0x32, 0x17, 0x7d, 0x73, 0x73, 0x73,
232         0x08, 0x32, 0x2d, 0x82, 0x78, 0x78, 0x78, 0x08,
233         0x32, 0x3c, 0x82, 0x78, 0x78, 0x78, 0x08, 0x32,
234         0x4b, 0x82, 0x78, 0x78, 0x78, 0x08, 0x32, 0x5a,
235         0x82, 0x78, 0x6e, 0x64, 0x08, 0x28, 0x17, 0x7d,
236         0x73, 0x73, 0x69, 0x08, 0x28, 0x2d, 0x82, 0x78,
237         0x78, 0x6e, 0x08, 0x28, 0x3c, 0x82, 0x78, 0x78,
238         0x64, 0x08, 0x28, 0x4b, 0x82, 0x78, 0x78, 0x64,
239         0x08, 0x28, 0x5a, 0x82, 0x78, 0x64, 0x50, 0x08,
240         0x23, 0x17, 0x7d, 0x73, 0x73, 0x5f, 0x08, 0x23,
241         0x2d, 0x82, 0x78, 0x78, 0x64, 0x08, 0x23, 0x3c,
242         0x82, 0x78, 0x78, 0x64, 0x08, 0x23, 0x4b, 0x82,
243         0x78, 0x64, 0x50, 0x08, 0x23, 0x5a, 0x82, 0x78,
244         0x5a, 0x46, 0x0c, 0x52, 0x17, 0xa5, 0x9b, 0x9b,
245         0x9b, 0x0c, 0x52, 0x2d, 0xaa, 0xa0, 0xa0, 0xa0,
246         0x0c, 0x52, 0x3c, 0xaa, 0xa0, 0xa0, 0xa0, 0x0c,
247         0x52, 0x46, 0xaa, 0xa0, 0xa0, 0xa0, 0x0c, 0x52,
248         0x4b, 0x8c, 0x82, 0x82, 0x82, 0x0c, 0x52, 0x55,
249         0x8c, 0x82, 0x82, 0x82, 0x0c, 0x42, 0x17, 0xa5,
250         0x9b, 0x9b, 0x91, 0x0c, 0x42, 0x2d, 0xaa, 0xa0,
251         0xa0, 0x96, 0x0c, 0x42, 0x3c, 0xaa, 0xa0, 0xa0,
252         0x96, 0x0c, 0x42, 0x46, 0xaa, 0xa0, 0xa0, 0x96,
253         0x0c, 0x42, 0x4b, 0x8c, 0x82, 0x82, 0x82, 0x0c,
254         0x42, 0x55, 0x8c, 0x82, 0x82, 0x82, 0x0c, 0x3d,
255         0x17, 0xa5, 0x9b, 0x9b, 0x91, 0x0c, 0x3d, 0x2d,
256         0xaa, 0xa0, 0xa0, 0x96, 0x0c, 0x3d, 0x3c, 0xaa,
257         0xa0, 0xa0, 0x8c, 0x0c, 0x3d, 0x46, 0xaa, 0xa0,
258         0x96, 0x8c, 0x0c, 0x3d, 0x4b, 0x8c, 0x82, 0x82,
259         0x82, 0x0c, 0x3d, 0x55, 0x8c, 0x82, 0x82, 0x82,
260         0x0c, 0x32, 0x17, 0xa5, 0x9b, 0x91, 0x87, 0x0c,
261         0x32, 0x2d, 0xaa, 0xa0, 0x96, 0x8c, 0x0c, 0x32,
262         0x3c, 0xaa, 0xa0, 0x96, 0x82, 0x0c, 0x32, 0x46,
263         0xaa, 0xa0, 0x8c, 0x78, 0x0c, 0x32, 0x4b, 0x8c,
264         0x82, 0x82, 0x78, 0x0c, 0x32, 0x55, 0x8c, 0x82,
265         0x82, 0x6e, 0x0c, 0x28, 0x17, 0xa5, 0x9b, 0x87,
266         0x73, 0x0c, 0x28, 0x2d, 0xaa, 0xa0, 0x8c, 0x78,
267         0x0c, 0x28, 0x3c, 0xaa, 0x96, 0x82, 0x73, 0x0c,
268         0x28, 0x46, 0xaa, 0x96, 0x78, 0x69, 0x0c, 0x28,
269         0x4b, 0x8c, 0x82, 0x78, 0x69, 0x0c, 0x28, 0x55,
270         0x8c, 0x82, 0x6e, 0x5a, 0x0c, 0x23, 0x17, 0xa5,
271         0x91, 0x7d, 0x69, 0x0c, 0x23, 0x2d, 0xaa, 0x96,
272         0x82, 0x6e, 0x0c, 0x23, 0x3c, 0xaa, 0x96, 0x78,
273         0x69, 0x0c, 0x23, 0x46, 0xaa, 0x8c, 0x6e, 0x5a,
274         0x0c, 0x23, 0x4b, 0x8c, 0x82, 0x6e, 0x5a, 0x0c,
275         0x23, 0x55, 0x8c, 0x82, 0x64, 0x50, 0x0d, 0x64,
276         0x17, 0xa5, 0x9b, 0x9b, 0x9b, 0x0d, 0x64, 0x2d,
277         0xaa, 0xa0, 0xa0, 0xa0, 0x0d, 0x64, 0x3c, 0xaa,
278         0xa0, 0xa0, 0xa0, 0x0d, 0x64, 0x46, 0xaa, 0xa0,
279         0xa0, 0xa0, 0x0d, 0x64, 0x4b, 0x8c, 0x82, 0x82,
280         0x82, 0x0d, 0x64, 0x55, 0x8c, 0x82, 0x82, 0x82,
281         0x0d, 0x50, 0x17, 0xa5, 0x9b, 0x9b, 0x9b, 0x0d,
282         0x50, 0x2d, 0xaa, 0xa0, 0xa0, 0xa0, 0x0d, 0x50,
283         0x3c, 0xaa, 0xa0, 0xa0, 0x96, 0x0d, 0x50, 0x46,
284         0xaa, 0xa0, 0xa0, 0x96, 0x0d, 0x50, 0x4b, 0x8c,
285         0x82, 0x82, 0x82, 0x0d, 0x50, 0x55, 0x8c, 0x82,
286         0x82, 0x82, 0x0d, 0x3c, 0x17, 0xa5, 0x9b, 0x9b,
287         0x87, 0x0d, 0x3c, 0x2d, 0xaa, 0xa0, 0xa0, 0x8c,
288         0x0d, 0x3c, 0x3c, 0xaa, 0xa0, 0x96, 0x82, 0x0d,
289         0x3c, 0x46, 0xaa, 0xa0, 0x96, 0x78, 0x0d, 0x3c,
290         0x4b, 0x8c, 0x82, 0x82, 0x78, 0x0d, 0x3c, 0x55,
291         0x8c, 0x82, 0x82, 0x6e, 0x0d, 0x28, 0x17, 0xa5,
292         0x91, 0x7d, 0x69, 0x0d, 0x28, 0x2d, 0xaa, 0x96,
293         0x82, 0x6e, 0x0d, 0x28, 0x3c, 0xaa, 0x96, 0x78,
294         0x64, 0x0d, 0x28, 0x46, 0xaa, 0x8c, 0x6e, 0x5a,
295         0x0d, 0x28, 0x4b, 0x8c, 0x82, 0x6e, 0x5a, 0x0d,
296         0x28, 0x55, 0x8c, 0x82, 0x64, 0x50,
297 };
298
299
300 static struct tegra_system_edp_entry __initdata tegra_system_edp_map[] = {
301
302 /* {SKU, power-limit (in 100mW), {freq limits (in 10Mhz)} } */
303
304         {  1,  49, {130, 120, 120, 120} },
305         {  1,  44, {130, 120, 120, 110} },
306         {  1,  37, {130, 120, 110, 100} },
307         {  1,  35, {130, 120, 110,  90} },
308         {  1,  29, {130, 120, 100,  80} },
309         {  1,  27, {130, 120,  90,  80} },
310         {  1,  25, {130, 110,  80,  60} },
311         {  1,  21, {130, 100,  80,  40} },
312
313         {  4,  49, {130, 120, 120, 120} },
314         {  4,  44, {130, 120, 120, 110} },
315         {  4,  37, {130, 120, 110, 100} },
316         {  4,  35, {130, 120, 110,  90} },
317         {  4,  29, {130, 120, 100,  80} },
318         {  4,  27, {130, 120,  90,  80} },
319         {  4,  25, {130, 110,  80,  60} },
320         {  4,  21, {130, 100,  80,  40} },
321 };
322
323 /*
324  * "Safe entry" to be used when no match for speedo_id /
325  * regulator_cur is found; must be the last one
326  */
327 static struct tegra_edp_limits edp_default_limits[] = {
328         {85, {1000000, 1000000, 1000000, 1000000} },
329 };
330
331 static struct tegra_system_edp_entry power_edp_default_limits[] = {
332         {0, 20, {1000000, 1000000, 1000000, 1000000} },
333 };
334
335 /* Constants for EDP calculations */
336 static const int temperatures[] = { /* degree celcius (C) */
337         23, 40, 50, 60, 70, 74, 78, 82, 86, 90, 94, 98, 102,
338 };
339
340 static const int power_cap_levels[] = { /* milliwatts (mW) */
341           700,  1700,  2700,  3700,  3800,  3900,  4500,  4600,
342          4700,  4800,  4900,  5200,  5300,  5400,  5500,  5800,
343          5900,  6200,  6400,  6500,  6800,  7200,  7500,  8200,
344          8500,  9200,  9500, 10200, 10500, 11200, 11500, 12200,
345         12500, 13200, 13500, 14200, 14500, 15200, 15500, 16500,
346         17500
347 };
348
349 static struct tegra_edp_freq_voltage_table *freq_voltage_lut_saved;
350 static unsigned int freq_voltage_lut_size_saved;
351 static struct tegra_edp_freq_voltage_table *freq_voltage_lut;
352 static unsigned int freq_voltage_lut_size;
353
354 static inline s64 edp_pow(s64 val, int pwr)
355 {
356         s64 retval = 1;
357
358         while (val && pwr) {
359                 if (pwr & 1)
360                         retval *= val;
361                 pwr >>= 1;
362                 if (pwr)
363                         val *= val;
364         }
365
366         return retval;
367 }
368
369 /*
370  * Find the maximum frequency that results in dynamic and leakage current that
371  * is less than the regulator current limit.
372  * temp_C - always valid
373  * power_mW - valid or -1 (infinite)
374  */
375 static unsigned int edp_calculate_maxf(
376                                 struct tegra_edp_cpu_leakage_params *params,
377                                 int temp_C, int power_mW,
378                                 int iddq_mA,
379                                 int n_cores_idx)
380 {
381         unsigned int voltage_mV, freq_KHz;
382         unsigned int cur_effective = regulator_cur - edp_reg_override_mA;
383         int f, i, j, k;
384         s64 leakage_mA, dyn_mA, leakage_calc_step;
385         s64 leakage_mW, dyn_mW;
386
387         for (f = freq_voltage_lut_size - 1; f >= 0; f--) {
388                 freq_KHz = freq_voltage_lut[f].freq / 1000;
389                 voltage_mV = freq_voltage_lut[f].voltage_mV;
390
391                 /* Constrain Volt-Temp */
392                 if (params->volt_temp_cap.temperature &&
393                     temp_C > params->volt_temp_cap.temperature &&
394                     params->volt_temp_cap.voltage_limit_mV &&
395                     voltage_mV > params->volt_temp_cap.voltage_limit_mV)
396                         continue;
397
398                 /* Calculate leakage current */
399                 leakage_mA = 0;
400                 for (i = 0; i <= 3; i++) {
401                         for (j = 0; j <= 3; j++) {
402                                 for (k = 0; k <= 3; k++) {
403                                         leakage_calc_step =
404                                                 params->leakage_consts_ijk
405                                                 [i][j][k] * edp_pow(iddq_mA, i);
406                                         /* Convert (mA)^i to (A)^i */
407                                         leakage_calc_step =
408                                                 div64_s64(leakage_calc_step,
409                                                           edp_pow(1000, i));
410                                         leakage_calc_step *=
411                                                 edp_pow(voltage_mV, j);
412                                         /* Convert (mV)^j to (V)^j */
413                                         leakage_calc_step =
414                                                 div64_s64(leakage_calc_step,
415                                                           edp_pow(1000, j));
416                                         leakage_calc_step *=
417                                                 edp_pow(temp_C, k);
418                                         /* Convert (C)^k to (scaled_C)^k */
419                                         leakage_calc_step =
420                                                 div64_s64(leakage_calc_step,
421                                                 edp_pow(params->temp_scaled,
422                                                         k));
423                                         /* leakage_consts_ijk was scaled */
424                                         leakage_calc_step =
425                                                 div64_s64(leakage_calc_step,
426                                                           params->ijk_scaled);
427                                         leakage_mA += leakage_calc_step;
428                                 }
429                         }
430                 }
431
432                 /* if specified, set floor for leakage current */
433                 if (params->leakage_min && leakage_mA <= params->leakage_min)
434                         leakage_mA = params->leakage_min;
435
436                 /* leakage cannot be negative => leakage model has error */
437                 if (leakage_mA <= 0) {
438                         pr_err("VDD_CPU EDP failed: IDDQ too high (%d mA)\n",
439                                iddq_mA);
440                         return -EINVAL;
441                 }
442
443                 leakage_mA *= params->leakage_consts_n[n_cores_idx];
444
445                 /* leakage_const_n was scaled */
446                 leakage_mA = div64_s64(leakage_mA, params->consts_scaled);
447
448                 /* Calculate dynamic current */
449                 dyn_mA = voltage_mV * freq_KHz / 1000;
450                 /* Convert mV to V */
451                 dyn_mA = div64_s64(dyn_mA, 1000);
452                 dyn_mA *= params->dyn_consts_n[n_cores_idx];
453                 /* dyn_const_n was scaled */
454                 dyn_mA = div64_s64(dyn_mA, params->dyn_scaled);
455
456                 if (power_mW != -1) {
457                         leakage_mW = leakage_mA * voltage_mV;
458                         dyn_mW = dyn_mA * voltage_mV;
459                         if (div64_s64(leakage_mW + dyn_mW, 1000) <= power_mW)
460                                 return freq_KHz;
461                 } else if ((leakage_mA + dyn_mA) <= cur_effective) {
462                         return freq_KHz;
463                 }
464         }
465         return 0;
466 }
467
468 static int edp_relate_freq_voltage(struct clk *clk_cpu_g,
469                         unsigned int cpu_speedo_idx,
470                         unsigned int freq_volt_lut_size,
471                         struct tegra_edp_freq_voltage_table *freq_volt_lut)
472 {
473         unsigned int i, j, freq;
474         int voltage_mV;
475
476         for (i = 0, j = 0, freq = 0;
477                  i < freq_volt_lut_size;
478                  i++, freq += FREQ_STEP) {
479
480                 /* Predict voltages */
481                 voltage_mV = tegra_dvfs_predict_millivolts(clk_cpu_g, freq);
482                 if (voltage_mV < 0) {
483                         pr_err("%s: couldn't predict voltage: freq %u; err %d",
484                                __func__, freq, voltage_mV);
485                         return -EINVAL;
486                 }
487
488                 /* Cache frequency / voltage / voltage constant relationship */
489                 freq_volt_lut[i].freq = freq;
490                 freq_volt_lut[i].voltage_mV = voltage_mV;
491         }
492         return 0;
493 }
494
495 unsigned int tegra_edp_find_maxf(int volt)
496 {
497         unsigned int i;
498
499         for (i = 0; i < freq_voltage_lut_size_saved; i++) {
500                 if (freq_voltage_lut_saved[i].voltage_mV > volt)
501                         break;
502         }
503         return freq_voltage_lut[i - 1].freq;
504 }
505
506
507 static int edp_find_speedo_idx(int cpu_speedo_id, unsigned int *cpu_speedo_idx)
508 {
509         int i, array_size;
510         struct tegra_edp_cpu_leakage_params *params;
511
512         switch (tegra_chip_id) {
513         case TEGRA_CHIPID_TEGRA11:
514                 params = tegra11x_get_leakage_params(0, &array_size);
515                 break;
516         case TEGRA_CHIPID_TEGRA14:
517                 params = tegra14x_get_leakage_params(0, &array_size);
518                 break;
519         case TEGRA_CHIPID_TEGRA3:
520         case TEGRA_CHIPID_TEGRA2:
521         default:
522                 array_size = 0;
523                 break;
524         }
525
526         for (i = 0; i < array_size; i++)
527                 if (cpu_speedo_id == params[i].cpu_speedo_id) {
528                         *cpu_speedo_idx = i;
529                         return 0;
530                 }
531
532         pr_err("%s: couldn't find cpu speedo id %d in freq/voltage LUT\n",
533                __func__, cpu_speedo_id);
534         return -EINVAL;
535 }
536
537 static int init_cpu_edp_limits_calculated(void)
538 {
539         unsigned int temp_idx, n_cores_idx, pwr_idx;
540         unsigned int cpu_g_minf, cpu_g_maxf;
541         unsigned int iddq_mA;
542         unsigned int cpu_speedo_idx;
543         unsigned int cap, limit;
544         struct tegra_edp_limits *edp_calculated_limits;
545         struct tegra_system_edp_entry *power_edp_calc_limits;
546         struct tegra_edp_cpu_leakage_params *params;
547         int ret;
548         struct clk *clk_cpu_g = tegra_get_clock_by_name("cpu_g");
549         int cpu_speedo_id = tegra_cpu_speedo_id();
550
551         /* Determine all inputs to EDP formula */
552         iddq_mA = tegra_get_cpu_iddq_value();
553         ret = edp_find_speedo_idx(cpu_speedo_id, &cpu_speedo_idx);
554         if (ret)
555                 return ret;
556
557         switch (tegra_chip_id) {
558         case TEGRA_CHIPID_TEGRA11:
559                 params = tegra11x_get_leakage_params(cpu_speedo_idx, NULL);
560                 break;
561         case TEGRA_CHIPID_TEGRA14:
562                 params = tegra14x_get_leakage_params(cpu_speedo_idx, NULL);
563                 break;
564         case TEGRA_CHIPID_TEGRA3:
565         case TEGRA_CHIPID_TEGRA2:
566         default:
567                 return -EINVAL;
568         }
569
570         edp_calculated_limits = kmalloc(sizeof(struct tegra_edp_limits)
571                                         * ARRAY_SIZE(temperatures), GFP_KERNEL);
572         BUG_ON(!edp_calculated_limits);
573
574         power_edp_calc_limits = kmalloc(sizeof(struct tegra_system_edp_entry)
575                                 * ARRAY_SIZE(power_cap_levels), GFP_KERNEL);
576         BUG_ON(!power_edp_calc_limits);
577
578         cpu_g_minf = 0;
579         cpu_g_maxf = clk_get_max_rate(clk_cpu_g);
580         freq_voltage_lut_size = (cpu_g_maxf - cpu_g_minf) / FREQ_STEP + 1;
581         freq_voltage_lut = kmalloc(sizeof(struct tegra_edp_freq_voltage_table)
582                                    * freq_voltage_lut_size, GFP_KERNEL);
583         if (!freq_voltage_lut) {
584                 pr_err("%s: failed alloc mem for freq/voltage LUT\n", __func__);
585                 kfree(power_edp_calc_limits);
586                 kfree(edp_calculated_limits);
587                 return -ENOMEM;
588         }
589
590         ret = edp_relate_freq_voltage(clk_cpu_g, cpu_speedo_idx,
591                                 freq_voltage_lut_size, freq_voltage_lut);
592         if (ret) {
593                 kfree(power_edp_calc_limits);
594                 kfree(edp_calculated_limits);
595                 kfree(freq_voltage_lut);
596                 return ret;
597         }
598
599         if (freq_voltage_lut_size != freq_voltage_lut_size_saved) {
600                 /* release previous table if present */
601                 kfree(freq_voltage_lut_saved);
602                 /* create table to save */
603                 freq_voltage_lut_saved =
604                         kmalloc(sizeof(struct tegra_edp_freq_voltage_table) *
605                         freq_voltage_lut_size, GFP_KERNEL);
606                 if (!freq_voltage_lut_saved) {
607                         pr_err("%s: failed alloc mem for freq/voltage LUT\n",
608                                 __func__);
609                         kfree(freq_voltage_lut);
610                         return -ENOMEM;
611                 }
612                 freq_voltage_lut_size_saved = freq_voltage_lut_size;
613         }
614         memcpy(freq_voltage_lut_saved,
615                 freq_voltage_lut,
616                 sizeof(struct tegra_edp_freq_voltage_table) *
617                         freq_voltage_lut_size);
618
619         /* Calculate EDP table */
620         for (n_cores_idx = 0; n_cores_idx < NR_CPUS; n_cores_idx++) {
621                 for (temp_idx = 0;
622                      temp_idx < ARRAY_SIZE(temperatures); temp_idx++) {
623                         edp_calculated_limits[temp_idx].temperature =
624                                 temperatures[temp_idx];
625                         limit = edp_calculate_maxf(params,
626                                                    temperatures[temp_idx],
627                                                    -1,
628                                                    iddq_mA,
629                                                    n_cores_idx);
630                         /* apply safety cap if it is specified */
631                         if (n_cores_idx < 4) {
632                                 cap = params->safety_cap[n_cores_idx];
633                                 if (cap && cap < limit)
634                                         limit = cap;
635                         }
636                         edp_calculated_limits[temp_idx].
637                                 freq_limits[n_cores_idx] = limit;
638                 }
639
640                 for (pwr_idx = 0;
641                      pwr_idx < ARRAY_SIZE(power_cap_levels); pwr_idx++) {
642                         power_edp_calc_limits[pwr_idx].power_limit_100mW =
643                                 power_cap_levels[pwr_idx] / 100;
644                         limit = edp_calculate_maxf(params,
645                                                    90,
646                                                    power_cap_levels[pwr_idx],
647                                                    iddq_mA,
648                                                    n_cores_idx);
649                         power_edp_calc_limits[pwr_idx].
650                                 freq_limits[n_cores_idx] = limit;
651                 }
652         }
653
654         /*
655          * If this is an EDP table update, need to overwrite old table.
656          * The old table's address must remain valid.
657          */
658         if (edp_limits != edp_default_limits) {
659                 memcpy(edp_limits, edp_calculated_limits,
660                        sizeof(struct tegra_edp_limits)
661                        * ARRAY_SIZE(temperatures));
662                 kfree(edp_calculated_limits);
663         }
664         else {
665                 edp_limits = edp_calculated_limits;
666                 edp_limits_size = ARRAY_SIZE(temperatures);
667         }
668
669         if (power_edp_limits != power_edp_default_limits) {
670                 memcpy(power_edp_limits, power_edp_calc_limits,
671                        sizeof(struct tegra_system_edp_entry)
672                        * ARRAY_SIZE(power_cap_levels));
673                 kfree(power_edp_calc_limits);
674         } else {
675                 power_edp_limits = power_edp_calc_limits;
676                 power_edp_limits_size = ARRAY_SIZE(power_cap_levels);
677         }
678
679         kfree(freq_voltage_lut);
680         return 0;
681 }
682
683 static int __init init_cpu_edp_limits_lookup(void)
684 {
685         int i, j;
686         struct tegra_edp_limits *e;
687         struct tegra_edp_vdd_cpu_entry *t;
688         int tsize;
689         int cpu_speedo_id = tegra_cpu_speedo_id();
690
691         t = (struct tegra_edp_vdd_cpu_entry *)tegra_edp_vdd_cpu_map;
692         tsize = sizeof(tegra_edp_vdd_cpu_map)
693                 / sizeof(struct tegra_edp_vdd_cpu_entry);
694
695         for (i = 0; i < tsize; i++) {
696                 if (t[i].speedo_id == cpu_speedo_id &&
697                     t[i].regulator_100mA <= regulator_cur / 100)
698                         break;
699         }
700
701         /* No entry found in tegra_edp_vdd_cpu_map */
702         if (i >= tsize)
703                 return -EINVAL;
704
705         /* Find all rows for this entry */
706         for (j = i + 1; j < tsize; j++) {
707                 if (t[i].speedo_id != t[j].speedo_id ||
708                     t[i].regulator_100mA != t[j].regulator_100mA)
709                         break;
710         }
711
712         edp_limits_size = j - i;
713         e = kmalloc(sizeof(struct tegra_edp_limits) * edp_limits_size,
714                     GFP_KERNEL);
715         BUG_ON(!e);
716
717         for (j = 0; j < edp_limits_size; j++) {
718                 e[j].temperature = (int)t[i+j].temperature;
719                 e[j].freq_limits[0] = (unsigned int)t[i+j].freq_limits[0]*10000;
720                 e[j].freq_limits[1] = (unsigned int)t[i+j].freq_limits[1]*10000;
721                 e[j].freq_limits[2] = (unsigned int)t[i+j].freq_limits[2]*10000;
722                 e[j].freq_limits[3] = (unsigned int)t[i+j].freq_limits[3]*10000;
723         }
724
725         if (edp_limits != edp_default_limits)
726                 kfree(edp_limits);
727
728         edp_limits = e;
729         return 0;
730 }
731
732 void tegra_recalculate_cpu_edp_limits(void)
733 {
734         if (tegra_chip_id == TEGRA_CHIPID_TEGRA11 ||
735             tegra_chip_id == TEGRA_CHIPID_TEGRA14)
736                 init_cpu_edp_limits_calculated();
737 }
738
739 /*
740  * Specify regulator current in mA, e.g. 5000mA
741  * Use 0 for default
742  */
743 void __init tegra_init_cpu_edp_limits(unsigned int regulator_mA)
744 {
745         if (!regulator_mA)
746                 goto end;
747         regulator_cur = regulator_mA + OVERRIDE_DEFAULT;
748
749         switch (tegra_chip_id) {
750         case TEGRA_CHIPID_TEGRA3:
751                 if (init_cpu_edp_limits_lookup() == 0)
752                         return;
753                 break;
754         case TEGRA_CHIPID_TEGRA11:
755         case TEGRA_CHIPID_TEGRA14:
756                 if (init_cpu_edp_limits_calculated() == 0)
757                         return;
758                 break;
759         case TEGRA_CHIPID_TEGRA2:
760         default:
761                 BUG();
762                 break;
763         }
764
765  end:
766         edp_limits = edp_default_limits;
767         edp_limits_size = ARRAY_SIZE(edp_default_limits);
768
769         power_edp_limits = power_edp_default_limits;
770         power_edp_limits_size = ARRAY_SIZE(power_edp_default_limits);
771 }
772
773 void __init tegra_init_system_edp_limits(unsigned int power_limit_mW)
774 {
775         int cpu_speedo_id = tegra_cpu_speedo_id();
776         int i;
777         unsigned int *e;
778         struct tegra_system_edp_entry *t = tegra_system_edp_map;
779         int tsize = ARRAY_SIZE(tegra_system_edp_map);
780
781         if (!power_limit_mW) {
782                 e = NULL;
783                 goto out;
784         }
785
786         for (i = 0; i < tsize; i++)
787                 if (t[i].speedo_id == cpu_speedo_id)
788                         break;
789
790         if (i >= tsize) {
791                 e = NULL;
792                 goto out;
793         }
794
795         do {
796                 if (t[i].power_limit_100mW <= power_limit_mW / 100)
797                         break;
798                 i++;
799         } while (i < tsize && t[i].speedo_id == cpu_speedo_id);
800
801         if (i >= tsize || t[i].speedo_id != cpu_speedo_id)
802                 i--; /* No low enough entry in the table, use best possible */
803
804         e = kmalloc(sizeof(unsigned int) * 4, GFP_KERNEL);
805         BUG_ON(!e);
806
807         e[0] = (unsigned int)t[i].freq_limits[0] * 10000;
808         e[1] = (unsigned int)t[i].freq_limits[1] * 10000;
809         e[2] = (unsigned int)t[i].freq_limits[2] * 10000;
810         e[3] = (unsigned int)t[i].freq_limits[3] * 10000;
811
812 out:
813         kfree(system_edp_limits);
814
815         system_edp_limits = e;
816 }
817
818
819 void tegra_get_cpu_edp_limits(const struct tegra_edp_limits **limits, int *size)
820 {
821         *limits = edp_limits;
822         *size = edp_limits_size;
823 }
824
825 void tegra_get_system_edp_limits(const unsigned int **limits)
826 {
827         *limits = system_edp_limits;
828 }
829
830 void tegra_platform_edp_init(struct thermal_trip_info *trips,
831                                 int *num_trips, int margin)
832 {
833         const struct tegra_edp_limits *cpu_edp_limits;
834         struct thermal_trip_info *trip_state;
835         int i, cpu_edp_limits_size;
836
837         if (!trips || !num_trips)
838                 return;
839
840         /* edp capping */
841         tegra_get_cpu_edp_limits(&cpu_edp_limits, &cpu_edp_limits_size);
842
843         if (cpu_edp_limits_size > MAX_THROT_TABLE_SIZE)
844                 BUG();
845
846         for (i = 0; i < cpu_edp_limits_size-1; i++) {
847                 trip_state = &trips[*num_trips];
848
849                 trip_state->cdev_type = "cpu_edp";
850                 trip_state->trip_temp =
851                         (cpu_edp_limits[i].temperature * 1000) - margin;
852                 trip_state->trip_type = THERMAL_TRIP_ACTIVE;
853                 trip_state->upper = trip_state->lower = i + 1;
854
855                 (*num_trips)++;
856
857                 if (*num_trips >= THERMAL_MAX_TRIPS)
858                         BUG();
859         }
860 }
861
862 struct tegra_system_edp_entry *tegra_get_system_edp_entries(int *size)
863 {
864         *size = power_edp_limits_size;
865         return power_edp_limits;
866 }
867
868 #ifdef CONFIG_DEBUG_FS
869
870 static int edp_limit_debugfs_show(struct seq_file *s, void *data)
871 {
872 #ifdef CONFIG_CPU_FREQ
873         seq_printf(s, "%u\n", tegra_get_edp_limit(NULL));
874 #endif
875         return 0;
876 }
877
878 static int edp_debugfs_show(struct seq_file *s, void *data)
879 {
880         int i, th_idx;
881
882 #ifdef CONFIG_CPU_FREQ
883         tegra_get_edp_limit(&th_idx);
884 #else
885         th_idx = 0;
886 #endif
887         seq_printf(s, "-- VDD_CPU %sEDP table (%umA = %umA - %umA) --\n",
888                    edp_limits == edp_default_limits ? "default " : "",
889                    regulator_cur - edp_reg_override_mA,
890                    regulator_cur, edp_reg_override_mA);
891         seq_printf(s, "%6s %10s %10s %10s %10s\n",
892                    " Temp.", "1-core", "2-cores", "3-cores", "4-cores");
893         for (i = 0; i < edp_limits_size; i++) {
894                 seq_printf(s, "%c%3dC: %10u %10u %10u %10u\n",
895                            i == th_idx ? '>' : ' ',
896                            edp_limits[i].temperature,
897                            edp_limits[i].freq_limits[0],
898                            edp_limits[i].freq_limits[1],
899                            edp_limits[i].freq_limits[2],
900                            edp_limits[i].freq_limits[3]);
901         }
902
903         seq_printf(s, "-- VDD_CPU Power EDP table --\n");
904         seq_printf(s, "%6s %10s %10s %10s %10s\n",
905                    " Power", "1-core", "2-cores", "3-cores", "4-cores");
906         for (i = 0; i < power_edp_limits_size; i++) {
907                 seq_printf(s, "%5dmW: %10u %10u %10u %10u\n",
908                            power_edp_limits[i].power_limit_100mW * 100,
909                            power_edp_limits[i].freq_limits[0],
910                            power_edp_limits[i].freq_limits[1],
911                            power_edp_limits[i].freq_limits[2],
912                            power_edp_limits[i].freq_limits[3]);
913         }
914
915         if (system_edp_limits) {
916                 seq_printf(s, "\n-- System EDP table --\n");
917                 seq_printf(s, "%10u %10u %10u %10u\n",
918                            system_edp_limits[0],
919                            system_edp_limits[1],
920                            system_edp_limits[2],
921                            system_edp_limits[3]);
922         }
923
924         return 0;
925 }
926
927 static int edp_reg_override_show(struct seq_file *s, void *data)
928 {
929         seq_printf(s, "Limit override: %u mA. Effective limit: %u mA\n",
930                    edp_reg_override_mA, regulator_cur - edp_reg_override_mA);
931         return 0;
932 }
933
934 static int edp_reg_override_write(struct file *file,
935         const char __user *userbuf, size_t count, loff_t *ppos)
936 {
937         char buf[32], *end;
938         unsigned int edp_reg_override_mA_temp;
939         unsigned int edp_reg_override_mA_prev = edp_reg_override_mA;
940
941         if (sizeof(buf) <= count)
942                 goto override_err;
943
944         if (copy_from_user(buf, userbuf, count))
945                 goto override_err;
946
947         /* terminate buffer and trim - white spaces may be appended
948          *  at the end when invoked from shell command line */
949         buf[count]='\0';
950         strim(buf);
951
952         edp_reg_override_mA_temp = simple_strtoul(buf, &end, 10);
953         if (*end != '\0')
954                 goto override_err;
955
956         if (edp_reg_override_mA_temp >= regulator_cur)
957                 goto override_err;
958
959         if (edp_reg_override_mA == edp_reg_override_mA_temp)
960                 return count;
961
962         edp_reg_override_mA = edp_reg_override_mA_temp;
963         if (init_cpu_edp_limits_calculated()) {
964                 /* Revert to previous override value if new value fails */
965                 edp_reg_override_mA = edp_reg_override_mA_prev;
966                 goto override_err;
967         }
968
969 #ifdef CONFIG_CPU_FREQ
970         if (tegra_cpu_set_speed_cap(NULL)) {
971                 pr_err("FAILED: Set CPU freq cap with new VDD_CPU EDP table\n");
972                 goto override_out;
973         }
974
975         pr_info("Reinitialized VDD_CPU EDP table with regulator current limit"
976                         " %u mA\n", regulator_cur - edp_reg_override_mA);
977 #else
978         pr_err("FAILED: tegra_cpu_set_speed_cap() does not exist, failed to reinitialize VDD_CPU EDP table");
979 #endif
980
981         return count;
982
983 override_err:
984         pr_err("FAILED: Reinitialize VDD_CPU EDP table with override \"%s\"",
985                buf);
986 #ifdef CONFIG_CPU_FREQ
987 override_out:
988 #endif
989         return -EINVAL;
990 }
991
992 static int edp_debugfs_open(struct inode *inode, struct file *file)
993 {
994         return single_open(file, edp_debugfs_show, inode->i_private);
995 }
996
997 static int edp_limit_debugfs_open(struct inode *inode, struct file *file)
998 {
999         return single_open(file, edp_limit_debugfs_show, inode->i_private);
1000 }
1001
1002 static int edp_reg_override_open(struct inode *inode, struct file *file)
1003 {
1004         return single_open(file, edp_reg_override_show, inode->i_private);
1005 }
1006
1007 static const struct file_operations edp_debugfs_fops = {
1008         .open           = edp_debugfs_open,
1009         .read           = seq_read,
1010         .llseek         = seq_lseek,
1011         .release        = single_release,
1012 };
1013
1014 static const struct file_operations edp_limit_debugfs_fops = {
1015         .open           = edp_limit_debugfs_open,
1016         .read           = seq_read,
1017         .llseek         = seq_lseek,
1018         .release        = single_release,
1019 };
1020
1021 static const struct file_operations edp_reg_override_debugfs_fops = {
1022         .open           = edp_reg_override_open,
1023         .read           = seq_read,
1024         .write          = edp_reg_override_write,
1025         .llseek         = seq_lseek,
1026         .release        = single_release,
1027 };
1028
1029 #ifdef CONFIG_EDP_FRAMEWORK
1030 static __init struct dentry *tegra_edp_debugfs_dir(void)
1031 {
1032         return edp_debugfs_dir;
1033 }
1034 #else
1035 static __init struct dentry *tegra_edp_debugfs_dir(void)
1036 {
1037         return debugfs_create_dir("edp", NULL);
1038 }
1039 #endif
1040
1041 static int __init tegra_edp_debugfs_init(void)
1042 {
1043         struct dentry *d_edp;
1044         struct dentry *d_edp_limit;
1045         struct dentry *d_edp_reg_override;
1046         struct dentry *edp_dir;
1047         struct dentry *vdd_cpu_dir;
1048
1049         edp_dir = tegra_edp_debugfs_dir();
1050
1051         if (!edp_dir)
1052                 goto edp_dir_err;
1053
1054         vdd_cpu_dir = debugfs_create_dir("vdd_cpu", edp_dir);
1055
1056         if (!vdd_cpu_dir)
1057                 goto vdd_cpu_dir_err;
1058
1059         d_edp = debugfs_create_file("edp", S_IRUGO, vdd_cpu_dir, NULL,
1060                                 &edp_debugfs_fops);
1061
1062         if (!d_edp)
1063                 goto edp_err;
1064
1065         d_edp_limit = debugfs_create_file("edp_limit", S_IRUGO, vdd_cpu_dir,
1066                                 NULL, &edp_limit_debugfs_fops);
1067
1068         if (!d_edp_limit)
1069                 goto edp_limit_err;
1070
1071         d_edp_reg_override = debugfs_create_file("edp_reg_override",
1072                                 S_IRUGO | S_IWUSR, vdd_cpu_dir, NULL,
1073                                 &edp_reg_override_debugfs_fops);
1074
1075         if (!d_edp_reg_override)
1076                 goto edp_reg_override_err;
1077
1078         if (tegra_core_edp_debugfs_init(edp_dir))
1079                 goto edp_reg_override_err;
1080
1081         return 0;
1082
1083 edp_reg_override_err:
1084         debugfs_remove(d_edp_limit);
1085 edp_limit_err:
1086         debugfs_remove(d_edp);
1087 edp_err:
1088         debugfs_remove(vdd_cpu_dir);
1089 vdd_cpu_dir_err:
1090         debugfs_remove(edp_dir);
1091 edp_dir_err:
1092         return -ENOMEM;
1093 }
1094
1095 late_initcall(tegra_edp_debugfs_init);
1096 #endif /* CONFIG_DEBUG_FS */